java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv -tc ../../../trunk/examples/toolchains/AutomizerCTransformed.xml -s ../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_Fixed_noBitfields+AI_EQ_SS.epf -i ../../../trunk/examples/svcomp/ldv-memsafety/ArraysWithLenghtAtDeclaration_true-valid-memsafety_true-termination.c -------------------------------------------------------------------------------- This is Ultimate 0.1.23-4cf2d92 [2018-03-28 15:24:51,586 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-03-28 15:24:51,588 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-03-28 15:24:51,602 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-03-28 15:24:51,603 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-03-28 15:24:51,604 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-03-28 15:24:51,605 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-03-28 15:24:51,607 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-03-28 15:24:51,609 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-03-28 15:24:51,610 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-03-28 15:24:51,611 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-03-28 15:24:51,611 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-03-28 15:24:51,612 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-03-28 15:24:51,614 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-03-28 15:24:51,615 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-03-28 15:24:51,617 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-03-28 15:24:51,619 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-03-28 15:24:51,621 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-03-28 15:24:51,623 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-03-28 15:24:51,624 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-03-28 15:24:51,626 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-03-28 15:24:51,627 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-03-28 15:24:51,627 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-03-28 15:24:51,628 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-03-28 15:24:51,629 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-03-28 15:24:51,630 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-03-28 15:24:51,631 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-03-28 15:24:51,631 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-03-28 15:24:51,632 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-03-28 15:24:51,633 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-03-28 15:24:51,633 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-03-28 15:24:51,634 INFO L98 SettingsManager]: Beginning loading settings from /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_Fixed_noBitfields+AI_EQ_SS.epf [2018-03-28 15:24:51,659 INFO L110 SettingsManager]: Loading preferences was successful [2018-03-28 15:24:51,659 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-03-28 15:24:51,660 INFO L131 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2018-03-28 15:24:51,660 INFO L133 SettingsManager]: * ultimate.logging.details=de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation=DEBUG; [2018-03-28 15:24:51,660 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-03-28 15:24:51,661 INFO L133 SettingsManager]: * to procedures, called more than once=true [2018-03-28 15:24:51,661 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-03-28 15:24:51,661 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=VPDomain [2018-03-28 15:24:51,661 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-03-28 15:24:51,661 INFO L131 SettingsManager]: Preferences of LTL2Aut differ from their defaults: [2018-03-28 15:24:51,662 INFO L133 SettingsManager]: * Property to check=[] a a: x > 42 [2018-03-28 15:24:51,662 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-03-28 15:24:51,662 INFO L133 SettingsManager]: * sizeof long=4 [2018-03-28 15:24:51,662 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-03-28 15:24:51,662 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-03-28 15:24:51,663 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-03-28 15:24:51,663 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-03-28 15:24:51,663 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-03-28 15:24:51,663 INFO L133 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2018-03-28 15:24:51,663 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-03-28 15:24:51,663 INFO L133 SettingsManager]: * sizeof long double=12 [2018-03-28 15:24:51,664 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-03-28 15:24:51,664 INFO L133 SettingsManager]: * Size of a code block=SingleStatement [2018-03-28 15:24:51,664 INFO L133 SettingsManager]: * Add additional assume for each assert=false [2018-03-28 15:24:51,664 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-03-28 15:24:51,664 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-03-28 15:24:51,665 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-03-28 15:24:51,665 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-03-28 15:24:51,665 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-03-28 15:24:51,665 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-03-28 15:24:51,665 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-03-28 15:24:51,666 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-03-28 15:24:51,666 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-03-28 15:24:51,667 INFO L131 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2018-03-28 15:24:51,667 INFO L133 SettingsManager]: * TransformationType=HEAP_SEPARATOR [2018-03-28 15:24:51,667 INFO L131 SettingsManager]: Preferences of Boogie Printer differ from their defaults: [2018-03-28 15:24:51,667 INFO L133 SettingsManager]: * Dump path:=C:\Users\alex\AppData\Local\Temp\ [2018-03-28 15:24:51,703 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-03-28 15:24:51,716 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully (re)initialized [2018-03-28 15:24:51,720 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-03-28 15:24:51,722 INFO L271 PluginConnector]: Initializing CDTParser... [2018-03-28 15:24:51,723 INFO L276 PluginConnector]: CDTParser initialized [2018-03-28 15:24:51,723 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/ldv-memsafety/ArraysWithLenghtAtDeclaration_true-valid-memsafety_true-termination.c [2018-03-28 15:24:52,027 INFO L228 CDTParser]: Created temporary CDT project at /storage/ultimate/releaseScripts/default/UAutomizer-linux/data/FLAG4890354c4 [2018-03-28 15:24:52,151 INFO L291 CDTParser]: IsIndexed: true [2018-03-28 15:24:52,151 INFO L292 CDTParser]: Found 1 translation units. [2018-03-28 15:24:52,152 INFO L171 CDTParser]: Scanning ArraysWithLenghtAtDeclaration_true-valid-memsafety_true-termination.c [2018-03-28 15:24:52,153 INFO L210 ultiparseSymbolTable]: Include resolver: [2018-03-28 15:24:52,153 INFO L215 ultiparseSymbolTable]: [2018-03-28 15:24:52,153 INFO L218 ultiparseSymbolTable]: Function table: [2018-03-28 15:24:52,153 INFO L221 ultiparseSymbolTable]: Function definition of null ('main') in ArraysWithLenghtAtDeclaration_true-valid-memsafety_true-termination.c [2018-03-28 15:24:52,153 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo ('foo') in ArraysWithLenghtAtDeclaration_true-valid-memsafety_true-termination.c [2018-03-28 15:24:52,153 INFO L227 ultiparseSymbolTable]: Global variable table: [2018-03-28 15:24:52,153 INFO L233 ultiparseSymbolTable]: [2018-03-28 15:24:52,168 INFO L334 CDTParser]: Deleted temporary CDT project at /storage/ultimate/releaseScripts/default/UAutomizer-linux/data/FLAG4890354c4 [2018-03-28 15:24:52,173 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-03-28 15:24:52,176 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2018-03-28 15:24:52,177 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-03-28 15:24:52,178 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-03-28 15:24:52,184 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-03-28 15:24:52,186 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.03 03:24:52" (1/1) ... [2018-03-28 15:24:52,188 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@247932c2 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.03 03:24:52, skipping insertion in model container [2018-03-28 15:24:52,189 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.03 03:24:52" (1/1) ... [2018-03-28 15:24:52,202 INFO L167 Dispatcher]: Using SV-COMP mode [2018-03-28 15:24:52,213 INFO L167 Dispatcher]: Using SV-COMP mode [2018-03-28 15:24:52,356 INFO L175 PostProcessor]: Settings: Checked method=main [2018-03-28 15:24:52,380 INFO L175 PostProcessor]: Settings: Checked method=main [2018-03-28 15:24:52,384 INFO L100 SccComputation]: Graph consists of 0 InCaSumBalls and 9 non ball SCCs. Number of states in SCCs 9. [2018-03-28 15:24:52,392 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.03 03:24:52 WrapperNode [2018-03-28 15:24:52,392 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-03-28 15:24:52,392 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-03-28 15:24:52,392 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-03-28 15:24:52,393 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-03-28 15:24:52,402 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.03 03:24:52" (1/1) ... [2018-03-28 15:24:52,403 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.03 03:24:52" (1/1) ... [2018-03-28 15:24:52,409 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.03 03:24:52" (1/1) ... [2018-03-28 15:24:52,410 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.03 03:24:52" (1/1) ... [2018-03-28 15:24:52,413 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.03 03:24:52" (1/1) ... [2018-03-28 15:24:52,417 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.03 03:24:52" (1/1) ... [2018-03-28 15:24:52,418 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.03 03:24:52" (1/1) ... [2018-03-28 15:24:52,419 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-03-28 15:24:52,419 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-03-28 15:24:52,419 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-03-28 15:24:52,419 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-03-28 15:24:52,420 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.03 03:24:52" (1/1) ... No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-03-28 15:24:52,469 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-03-28 15:24:52,470 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-03-28 15:24:52,470 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo [2018-03-28 15:24:52,470 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-03-28 15:24:52,470 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo [2018-03-28 15:24:52,470 INFO L128 BoogieDeclarations]: Found specification of procedure read~int [2018-03-28 15:24:52,470 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-03-28 15:24:52,470 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-03-28 15:24:52,470 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-03-28 15:24:52,470 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-03-28 15:24:52,471 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-03-28 15:24:52,471 INFO L128 BoogieDeclarations]: Found specification of procedure write~unchecked~int [2018-03-28 15:24:52,471 INFO L128 BoogieDeclarations]: Found specification of procedure write~int [2018-03-28 15:24:52,765 INFO L259 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-03-28 15:24:52,766 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.03 03:24:52 BoogieIcfgContainer [2018-03-28 15:24:52,766 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-03-28 15:24:52,767 INFO L113 PluginConnector]: ------------------------IcfgTransformer---------------------------- [2018-03-28 15:24:52,767 INFO L271 PluginConnector]: Initializing IcfgTransformer... [2018-03-28 15:24:52,768 INFO L276 PluginConnector]: IcfgTransformer initialized [2018-03-28 15:24:52,771 INFO L185 PluginConnector]: Executing the observer IcfgTransformationObserver from plugin IcfgTransformer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.03 03:24:52" (1/1) ... [2018-03-28 15:24:52,778 INFO L112 apSepIcfgTransformer]: HeapSepIcfgTransformer: Starting heap partitioning [2018-03-28 15:24:52,779 INFO L113 apSepIcfgTransformer]: To be partitioned heap arrays found [#memory_int] [2018-03-28 15:24:52,795 INFO L255 apSepIcfgTransformer]: Heap separator: starting memloc-array-style preprocessing [2018-03-28 15:24:52,802 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:52,802 DEBUG L183 ransitionTransformer]: Formula: true InVars {} OutVars{#valid=|v_#valid_3|, #NULL.offset=|v_#NULL.offset_2|, #NULL.base=|v_#NULL.base_2|} AuxVars[] AssignedVars[#valid, #NULL.offset, #NULL.base] [2018-03-28 15:24:52,802 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:52,802 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:52,802 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: true InVars {} OutVars{#valid=|v_#valid_3|, #NULL.offset=|v_#NULL.offset_2|, #NULL.base=|v_#NULL.base_2|} AuxVars[] AssignedVars[#valid, #NULL.offset, #NULL.base] [2018-03-28 15:24:52,804 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-03-28 15:24:52,804 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:52,804 DEBUG L183 ransitionTransformer]: Formula: (= |v_#valid_6| |v_#valid_5|) InVars {#valid=|v_#valid_6|} OutVars{#valid=|v_#valid_5|, #length=|v_#length_1|, ULTIMATE.start_#t~ret5=|v_ULTIMATE.start_#t~ret5_1|} AuxVars[] AssignedVars[#valid, #length, ULTIMATE.start_#t~ret5] [2018-03-28 15:24:52,805 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:52,805 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:52,805 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: (= |v_#valid_6| |v_#valid_5|) InVars {#valid=|v_#valid_6|} OutVars{#valid=|v_#valid_5|, #length=|v_#length_1|, ULTIMATE.start_#t~ret5=|v_ULTIMATE.start_#t~ret5_1|} AuxVars[] AssignedVars[#valid, #length, ULTIMATE.start_#t~ret5] [2018-03-28 15:24:52,805 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-03-28 15:24:52,806 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:52,806 DEBUG L183 ransitionTransformer]: Formula: (and (= |v_#NULL.offset_1| 0) (= |v_#NULL.base_1| 0)) InVars {} OutVars{#NULL.offset=|v_#NULL.offset_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] [2018-03-28 15:24:52,806 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:52,806 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:52,807 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: (and (= |v_#NULL.offset_1| 0) (= |v_#NULL.base_1| 0)) InVars {} OutVars{#NULL.offset=|v_#NULL.offset_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] [2018-03-28 15:24:52,807 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:52,807 DEBUG L183 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-03-28 15:24:52,808 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:52,808 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:52,808 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-03-28 15:24:52,808 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:52,809 DEBUG L183 ransitionTransformer]: Formula: true InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] [2018-03-28 15:24:52,809 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:52,809 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:52,809 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: true InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] [2018-03-28 15:24:52,809 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:52,810 DEBUG L183 ransitionTransformer]: Formula: (= |v_#valid_1| (store |v_#valid_2| 0 0)) InVars {#valid=|v_#valid_2|} OutVars{#valid=|v_#valid_1|} AuxVars[] AssignedVars[#valid] [2018-03-28 15:24:52,810 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:52,810 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:52,810 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: (= |v_#valid_1| (store |v_#valid_2| 0 0)) InVars {#valid=|v_#valid_2|} OutVars{#valid=|v_#valid_1|} AuxVars[] AssignedVars[#valid] [2018-03-28 15:24:52,810 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:52,810 DEBUG L183 ransitionTransformer]: Formula: true InVars {} OutVars{main_~b~0=v_main_~b~0_1} AuxVars[] AssignedVars[main_~b~0] [2018-03-28 15:24:52,810 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:52,811 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:52,811 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: true InVars {} OutVars{main_~b~0=v_main_~b~0_1} AuxVars[] AssignedVars[main_~b~0] [2018-03-28 15:24:52,811 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:52,811 DEBUG L183 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-03-28 15:24:52,811 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:52,811 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:52,811 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-03-28 15:24:52,812 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:52,812 DEBUG L183 ransitionTransformer]: Formula: (and (= 0 |v_main_~#mask~0.offset_1|) (= |v_#valid_7| (store |v_#valid_8| |v_main_~#mask~0.base_1| 1)) (not (= 0 |v_main_~#mask~0.base_1|)) (= 0 (select |v_#valid_8| |v_main_~#mask~0.base_1|)) (= |v_#length_3| (store |v_#length_4| |v_main_~#mask~0.base_1| 32))) InVars {#valid=|v_#valid_8|, #length=|v_#length_4|} OutVars{main_~#mask~0.base=|v_main_~#mask~0.base_1|, main_~#mask~0.offset=|v_main_~#mask~0.offset_1|, #valid=|v_#valid_7|, #length=|v_#length_3|} AuxVars[] AssignedVars[main_~#mask~0.base, main_~#mask~0.offset, #valid, #length] [2018-03-28 15:24:52,812 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:52,812 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:52,813 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: (and (= 0 |v_main_~#mask~0.offset_1|) (= |v_#valid_7| (store |v_#valid_8| |v_main_~#mask~0.base_1| 1)) (not (= 0 |v_main_~#mask~0.base_1|)) (= 0 (select |v_#valid_8| |v_main_~#mask~0.base_1|)) (= |v_#length_3| (store |v_#length_4| |v_main_~#mask~0.base_1| 32))) InVars {#valid=|v_#valid_8|, #length=|v_#length_4|} OutVars{main_~#mask~0.base=|v_main_~#mask~0.base_1|, main_~#mask~0.offset=|v_main_~#mask~0.offset_1|, #valid=|v_#valid_7|, #length=|v_#length_3|} AuxVars[] AssignedVars[main_~#mask~0.base, main_~#mask~0.offset, #valid, #length] [2018-03-28 15:24:52,813 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:52,813 DEBUG L183 ransitionTransformer]: Formula: (= v_main_~i~1_2 0) InVars {} OutVars{main_~i~1=v_main_~i~1_2} AuxVars[] AssignedVars[main_~i~1] [2018-03-28 15:24:52,814 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:52,814 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:52,814 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: (= v_main_~i~1_2 0) InVars {} OutVars{main_~i~1=v_main_~i~1_2} AuxVars[] AssignedVars[main_~i~1] [2018-03-28 15:24:52,814 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:52,814 DEBUG L183 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-03-28 15:24:52,815 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:52,815 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:52,815 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-03-28 15:24:52,815 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:52,815 DEBUG L183 ransitionTransformer]: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-03-28 15:24:52,815 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:52,816 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:52,816 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-03-28 15:24:52,816 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:52,816 DEBUG L183 ransitionTransformer]: Formula: (not (< v_main_~i~1_3 32)) InVars {main_~i~1=v_main_~i~1_3} OutVars{main_~i~1=v_main_~i~1_3} AuxVars[] AssignedVars[] [2018-03-28 15:24:52,817 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:52,817 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:52,817 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: (not (< v_main_~i~1_3 32)) InVars {main_~i~1=v_main_~i~1_3} OutVars{main_~i~1=v_main_~i~1_3} AuxVars[] AssignedVars[] [2018-03-28 15:24:52,817 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:52,818 DEBUG L183 ransitionTransformer]: Formula: (< v_main_~i~1_4 32) InVars {main_~i~1=v_main_~i~1_4} OutVars{main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[] [2018-03-28 15:24:52,818 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:52,818 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:52,818 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: (< v_main_~i~1_4 32) InVars {main_~i~1=v_main_~i~1_4} OutVars{main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[] [2018-03-28 15:24:52,819 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:52,819 DEBUG L183 ransitionTransformer]: Formula: (= v_main_~i~1_10 0) InVars {} OutVars{main_~i~1=v_main_~i~1_10} AuxVars[] AssignedVars[main_~i~1] [2018-03-28 15:24:52,819 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:52,819 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:52,819 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: (= v_main_~i~1_10 0) InVars {} OutVars{main_~i~1=v_main_~i~1_10} AuxVars[] AssignedVars[main_~i~1] [2018-03-28 15:24:52,820 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:52,820 DEBUG L183 ransitionTransformer]: Formula: (or (not (< v_main_~i~1_5 32)) (not (<= 0 v_main_~i~1_5))) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_~i~1=v_main_~i~1_5} AuxVars[] AssignedVars[] [2018-03-28 15:24:52,820 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:52,820 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:52,820 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: (or (not (< v_main_~i~1_5 32)) (not (<= 0 v_main_~i~1_5))) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_~i~1=v_main_~i~1_5} AuxVars[] AssignedVars[] [2018-03-28 15:24:52,820 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:52,821 DEBUG L183 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-03-28 15:24:52,821 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:52,821 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:52,821 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-03-28 15:24:52,821 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:52,821 DEBUG L183 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-03-28 15:24:52,822 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:52,822 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:52,822 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-03-28 15:24:52,822 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:52,822 DEBUG L183 ransitionTransformer]: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-03-28 15:24:52,822 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:52,822 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:52,823 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-03-28 15:24:52,823 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:52,823 DEBUG L183 ransitionTransformer]: Formula: true InVars {} OutVars{main_#t~ret3=|v_main_#t~ret3_1|} AuxVars[] AssignedVars[main_#t~ret3] [2018-03-28 15:24:52,823 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:52,823 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:52,824 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: true InVars {} OutVars{main_#t~ret3=|v_main_#t~ret3_1|} AuxVars[] AssignedVars[main_#t~ret3] [2018-03-28 15:24:52,824 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: (and (= |v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~b.baseInParam_1| |v_main_~#mask~0.base_7|) (= |v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~sizeInParam_1| v_main_~i~1_18) (= |v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~b.offsetInParam_1| |v_main_~#mask~0.offset_7|)) InVars {main_~#mask~0.base=|v_main_~#mask~0.base_7|, main_~#mask~0.offset=|v_main_~#mask~0.offset_7|, main_~i~1=v_main_~i~1_18} OutVars{__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~size=|v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~sizeInParam_1|, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~b.offset=|v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~b.offsetInParam_1|, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~b.base=|v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~b.baseInParam_1|} AuxVars[] AssignedVars[__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~size, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~b.offset, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~b.base] [2018-03-28 15:24:52,824 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:52,825 DEBUG L183 ransitionTransformer]: Formula: (not (< v_main_~i~1_11 32)) InVars {main_~i~1=v_main_~i~1_11} OutVars{main_~i~1=v_main_~i~1_11} AuxVars[] AssignedVars[] [2018-03-28 15:24:52,825 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:52,825 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:52,825 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: (not (< v_main_~i~1_11 32)) InVars {main_~i~1=v_main_~i~1_11} OutVars{main_~i~1=v_main_~i~1_11} AuxVars[] AssignedVars[] [2018-03-28 15:24:52,825 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:52,826 DEBUG L183 ransitionTransformer]: Formula: (< v_main_~i~1_12 32) InVars {main_~i~1=v_main_~i~1_12} OutVars{main_~i~1=v_main_~i~1_12} AuxVars[] AssignedVars[] [2018-03-28 15:24:52,826 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:52,826 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:52,826 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: (< v_main_~i~1_12 32) InVars {main_~i~1=v_main_~i~1_12} OutVars{main_~i~1=v_main_~i~1_12} AuxVars[] AssignedVars[] [2018-03-28 15:24:52,827 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:52,827 DEBUG L183 ransitionTransformer]: Formula: (= |v_main_#res_2| 0) InVars {} OutVars{main_#res=|v_main_#res_2|} AuxVars[] AssignedVars[main_#res] [2018-03-28 15:24:52,827 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:52,827 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:52,827 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: (= |v_main_#res_2| 0) InVars {} OutVars{main_#res=|v_main_#res_2|} AuxVars[] AssignedVars[main_#res] [2018-03-28 15:24:52,828 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:52,828 DEBUG L183 ransitionTransformer]: Formula: (and (<= |v_main_#t~ret3_2| 2147483647) (<= 0 (+ |v_main_#t~ret3_2| 2147483648))) InVars {main_#t~ret3=|v_main_#t~ret3_2|} OutVars{main_#t~ret3=|v_main_#t~ret3_2|} AuxVars[] AssignedVars[] [2018-03-28 15:24:52,828 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:52,828 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:52,829 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: (and (<= |v_main_#t~ret3_2| 2147483647) (<= 0 (+ |v_main_#t~ret3_2| 2147483648))) InVars {main_#t~ret3=|v_main_#t~ret3_2|} OutVars{main_#t~ret3=|v_main_#t~ret3_2|} AuxVars[] AssignedVars[] [2018-03-28 15:24:52,829 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:52,829 DEBUG L183 ransitionTransformer]: Formula: (and (= v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base_1 |v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~b.base_1|) (= v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.offset_1 |v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~b.offset_1|)) InVars {__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~b.offset=|v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~b.offset_1|, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~b.base=|v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~b.base_1|} OutVars{__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base_1, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.offset=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.offset_1, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~b.offset=|v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~b.offset_1|, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~b.base=|v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~b.base_1|} AuxVars[] AssignedVars[__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.offset] [2018-03-28 15:24:52,829 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:52,829 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:52,830 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: (and (= v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base_1 |v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~b.base_1|) (= v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.offset_1 |v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~b.offset_1|)) InVars {__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~b.offset=|v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~b.offset_1|, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~b.base=|v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~b.base_1|} OutVars{__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base_1, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.offset=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.offset_1, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~b.offset=|v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~b.offset_1|, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~b.base=|v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~b.base_1|} AuxVars[] AssignedVars[__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.offset] [2018-03-28 15:24:52,830 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:52,830 DEBUG L183 ransitionTransformer]: Formula: (or (not (< v_main_~i~1_13 32)) (not (<= 0 v_main_~i~1_13))) InVars {main_~i~1=v_main_~i~1_13} OutVars{main_~i~1=v_main_~i~1_13} AuxVars[] AssignedVars[] [2018-03-28 15:24:52,830 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:52,830 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:52,830 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: (or (not (< v_main_~i~1_13 32)) (not (<= 0 v_main_~i~1_13))) InVars {main_~i~1=v_main_~i~1_13} OutVars{main_~i~1=v_main_~i~1_13} AuxVars[] AssignedVars[] [2018-03-28 15:24:52,830 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:52,831 DEBUG L183 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-03-28 15:24:52,831 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:52,831 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:52,831 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-03-28 15:24:52,831 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:52,832 DEBUG L183 ransitionTransformer]: Formula: (= |v_#valid_11| (store |v_#valid_12| |v_main_~#mask~0.base_5| 0)) InVars {main_~#mask~0.base=|v_main_~#mask~0.base_5|, #valid=|v_#valid_12|} OutVars{main_~#mask~0.base=|v_main_~#mask~0.base_5|, #valid=|v_#valid_11|} AuxVars[] AssignedVars[#valid] [2018-03-28 15:24:52,832 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:52,832 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:52,832 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: (= |v_#valid_11| (store |v_#valid_12| |v_main_~#mask~0.base_5| 0)) InVars {main_~#mask~0.base=|v_main_~#mask~0.base_5|, #valid=|v_#valid_12|} OutVars{main_~#mask~0.base=|v_main_~#mask~0.base_5|, #valid=|v_#valid_11|} AuxVars[] AssignedVars[#valid] [2018-03-28 15:24:52,833 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:52,833 DEBUG L183 ransitionTransformer]: Formula: (= v_main_~b~0_2 (store v_main_~b~0_3 v_main_~i~1_7 |v_main_#t~ret3_3|)) InVars {main_#t~ret3=|v_main_#t~ret3_3|, main_~i~1=v_main_~i~1_7, main_~b~0=v_main_~b~0_3} OutVars{main_#t~ret3=|v_main_#t~ret3_3|, main_~i~1=v_main_~i~1_7, main_~b~0=v_main_~b~0_2} AuxVars[] AssignedVars[main_~b~0] [2018-03-28 15:24:52,833 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:52,833 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:52,833 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: (= v_main_~b~0_2 (store v_main_~b~0_3 v_main_~i~1_7 |v_main_#t~ret3_3|)) InVars {main_#t~ret3=|v_main_#t~ret3_3|, main_~i~1=v_main_~i~1_7, main_~b~0=v_main_~b~0_3} OutVars{main_#t~ret3=|v_main_#t~ret3_3|, main_~i~1=v_main_~i~1_7, main_~b~0=v_main_~b~0_2} AuxVars[] AssignedVars[main_~b~0] [2018-03-28 15:24:52,834 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:52,834 DEBUG L183 ransitionTransformer]: Formula: (= v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~size_1 |v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~size_1|) InVars {__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~size=|v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~size_1|} OutVars{__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~size=|v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~size_1|, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~size=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~size_1} AuxVars[] AssignedVars[__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~size] [2018-03-28 15:24:52,834 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:52,834 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:52,835 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: (= v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~size_1 |v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~size_1|) InVars {__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~size=|v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~size_1|} OutVars{__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~size=|v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~size_1|, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~size=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~size_1} AuxVars[] AssignedVars[__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~size] [2018-03-28 15:24:52,835 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:52,835 DEBUG L183 ransitionTransformer]: Formula: (not (= v_main_~i~1_14 (select v_main_~b~0_4 v_main_~i~1_14))) InVars {main_~i~1=v_main_~i~1_14, main_~b~0=v_main_~b~0_4} OutVars{main_~i~1=v_main_~i~1_14, main_~b~0=v_main_~b~0_4} AuxVars[] AssignedVars[] [2018-03-28 15:24:52,835 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:52,835 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:52,836 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: (not (= v_main_~i~1_14 (select v_main_~b~0_4 v_main_~i~1_14))) InVars {main_~i~1=v_main_~i~1_14, main_~b~0=v_main_~b~0_4} OutVars{main_~i~1=v_main_~i~1_14, main_~b~0=v_main_~b~0_4} AuxVars[] AssignedVars[] [2018-03-28 15:24:52,836 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:52,836 DEBUG L183 ransitionTransformer]: Formula: (= v_main_~i~1_15 (select v_main_~b~0_5 v_main_~i~1_15)) InVars {main_~i~1=v_main_~i~1_15, main_~b~0=v_main_~b~0_5} OutVars{main_~i~1=v_main_~i~1_15, main_~b~0=v_main_~b~0_5} AuxVars[] AssignedVars[] [2018-03-28 15:24:52,836 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:52,837 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:52,837 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: (= v_main_~i~1_15 (select v_main_~b~0_5 v_main_~i~1_15)) InVars {main_~i~1=v_main_~i~1_15, main_~b~0=v_main_~b~0_5} OutVars{main_~i~1=v_main_~i~1_15, main_~b~0=v_main_~b~0_5} AuxVars[] AssignedVars[] [2018-03-28 15:24:52,837 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:52,837 DEBUG L183 ransitionTransformer]: Formula: true InVars {} OutVars{main_~#mask~0.base=|v_main_~#mask~0.base_6|, main_~#mask~0.offset=|v_main_~#mask~0.offset_6|} AuxVars[] AssignedVars[main_~#mask~0.base, main_~#mask~0.offset] [2018-03-28 15:24:52,837 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:52,838 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:52,838 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: true InVars {} OutVars{main_~#mask~0.base=|v_main_~#mask~0.base_6|, main_~#mask~0.offset=|v_main_~#mask~0.offset_6|} AuxVars[] AssignedVars[main_~#mask~0.base, main_~#mask~0.offset] [2018-03-28 15:24:52,838 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:52,838 DEBUG L183 ransitionTransformer]: Formula: true InVars {} OutVars{main_#t~ret3=|v_main_#t~ret3_4|} AuxVars[] AssignedVars[main_#t~ret3] [2018-03-28 15:24:52,838 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:52,839 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:52,839 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: true InVars {} OutVars{main_#t~ret3=|v_main_#t~ret3_4|} AuxVars[] AssignedVars[main_#t~ret3] [2018-03-28 15:24:52,839 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:52,839 DEBUG L183 ransitionTransformer]: Formula: true InVars {} OutVars{__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~a~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~a~0_1} AuxVars[] AssignedVars[__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~a~0] [2018-03-28 15:24:52,839 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:52,840 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:52,840 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: true InVars {} OutVars{__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~a~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~a~0_1} AuxVars[] AssignedVars[__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~a~0] [2018-03-28 15:24:52,840 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:52,840 DEBUG L183 ransitionTransformer]: Formula: (= |v_main_#res_1| 1) InVars {} OutVars{main_#res=|v_main_#res_1|} AuxVars[] AssignedVars[main_#res] [2018-03-28 15:24:52,840 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:52,840 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:52,841 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: (= |v_main_#res_1| 1) InVars {} OutVars{main_#res=|v_main_#res_1|} AuxVars[] AssignedVars[main_#res] [2018-03-28 15:24:52,841 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:52,841 DEBUG L183 ransitionTransformer]: Formula: (= |v_main_#t~post4_1| v_main_~i~1_16) InVars {main_~i~1=v_main_~i~1_16} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_16} AuxVars[] AssignedVars[main_#t~post4] [2018-03-28 15:24:52,841 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:52,841 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:52,841 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: (= |v_main_#t~post4_1| v_main_~i~1_16) InVars {main_~i~1=v_main_~i~1_16} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_16} AuxVars[] AssignedVars[main_#t~post4] [2018-03-28 15:24:52,842 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:52,842 DEBUG L183 ransitionTransformer]: Formula: (= |v_#valid_13| |old(#valid)|) InVars {#valid=|v_#valid_13|, old(#valid)=|old(#valid)|} OutVars{#valid=|v_#valid_13|, old(#valid)=|old(#valid)|} AuxVars[] AssignedVars[] [2018-03-28 15:24:52,842 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:52,842 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:52,842 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: (= |v_#valid_13| |old(#valid)|) InVars {#valid=|v_#valid_13|, old(#valid)=|old(#valid)|} OutVars{#valid=|v_#valid_13|, old(#valid)=|old(#valid)|} AuxVars[] AssignedVars[] [2018-03-28 15:24:52,842 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:52,843 DEBUG L183 ransitionTransformer]: Formula: (not (= |v_#valid_14| |old(#valid)|)) InVars {#valid=|v_#valid_14|, old(#valid)=|old(#valid)|} OutVars{#valid=|v_#valid_14|, old(#valid)=|old(#valid)|} AuxVars[] AssignedVars[] [2018-03-28 15:24:52,843 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:52,843 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:52,843 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: (not (= |v_#valid_14| |old(#valid)|)) InVars {#valid=|v_#valid_14|, old(#valid)=|old(#valid)|} OutVars{#valid=|v_#valid_14|, old(#valid)=|old(#valid)|} AuxVars[] AssignedVars[] [2018-03-28 15:24:52,843 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:52,843 DEBUG L183 ransitionTransformer]: Formula: (= |v_main_#t~post2_1| v_main_~i~1_8) InVars {main_~i~1=v_main_~i~1_8} OutVars{main_~i~1=v_main_~i~1_8, main_#t~post2=|v_main_#t~post2_1|} AuxVars[] AssignedVars[main_#t~post2] [2018-03-28 15:24:52,843 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:52,844 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:52,844 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: (= |v_main_#t~post2_1| v_main_~i~1_8) InVars {main_~i~1=v_main_~i~1_8} OutVars{main_~i~1=v_main_~i~1_8, main_#t~post2=|v_main_#t~post2_1|} AuxVars[] AssignedVars[main_#t~post2] [2018-03-28 15:24:52,844 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:52,844 DEBUG L183 ransitionTransformer]: Formula: true InVars {} OutVars{__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_1} AuxVars[] AssignedVars[__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0] [2018-03-28 15:24:52,844 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:52,844 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:52,845 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: true InVars {} OutVars{__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_1} AuxVars[] AssignedVars[__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0] [2018-03-28 15:24:52,845 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:52,845 DEBUG L183 ransitionTransformer]: Formula: (= |v_#valid_9| (store |v_#valid_10| |v_main_~#mask~0.base_3| 0)) InVars {main_~#mask~0.base=|v_main_~#mask~0.base_3|, #valid=|v_#valid_10|} OutVars{main_~#mask~0.base=|v_main_~#mask~0.base_3|, #valid=|v_#valid_9|} AuxVars[] AssignedVars[#valid] [2018-03-28 15:24:52,845 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:52,845 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:52,846 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: (= |v_#valid_9| (store |v_#valid_10| |v_main_~#mask~0.base_3| 0)) InVars {main_~#mask~0.base=|v_main_~#mask~0.base_3|, #valid=|v_#valid_10|} OutVars{main_~#mask~0.base=|v_main_~#mask~0.base_3|, #valid=|v_#valid_9|} AuxVars[] AssignedVars[#valid] [2018-03-28 15:24:52,846 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:52,846 DEBUG L183 ransitionTransformer]: Formula: (= v_main_~i~1_17 (+ |v_main_#t~post4_2| 1)) InVars {main_#t~post4=|v_main_#t~post4_2|} OutVars{main_#t~post4=|v_main_#t~post4_2|, main_~i~1=v_main_~i~1_17} AuxVars[] AssignedVars[main_~i~1] [2018-03-28 15:24:52,846 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:52,847 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:52,847 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: (= v_main_~i~1_17 (+ |v_main_#t~post4_2| 1)) InVars {main_#t~post4=|v_main_#t~post4_2|} OutVars{main_#t~post4=|v_main_#t~post4_2|, main_~i~1=v_main_~i~1_17} AuxVars[] AssignedVars[main_~i~1] [2018-03-28 15:24:52,847 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:52,847 DEBUG L183 ransitionTransformer]: Formula: (= v_main_~i~1_9 (+ |v_main_#t~post2_2| 1)) InVars {main_#t~post2=|v_main_#t~post2_2|} OutVars{main_~i~1=v_main_~i~1_9, main_#t~post2=|v_main_#t~post2_2|} AuxVars[] AssignedVars[main_~i~1] [2018-03-28 15:24:52,848 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:52,848 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:52,848 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: (= v_main_~i~1_9 (+ |v_main_#t~post2_2| 1)) InVars {main_#t~post2=|v_main_#t~post2_2|} OutVars{main_~i~1=v_main_~i~1_9, main_#t~post2=|v_main_#t~post2_2|} AuxVars[] AssignedVars[main_~i~1] [2018-03-28 15:24:52,848 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:52,849 DEBUG L183 ransitionTransformer]: Formula: (= v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_2 0) InVars {} OutVars{__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_2} AuxVars[] AssignedVars[__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0] [2018-03-28 15:24:52,849 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:52,849 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:52,849 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: (= v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_2 0) InVars {} OutVars{__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_2} AuxVars[] AssignedVars[__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0] [2018-03-28 15:24:52,849 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:52,849 DEBUG L183 ransitionTransformer]: Formula: true InVars {} OutVars{main_~#mask~0.base=|v_main_~#mask~0.base_4|, main_~#mask~0.offset=|v_main_~#mask~0.offset_4|} AuxVars[] AssignedVars[main_~#mask~0.base, main_~#mask~0.offset] [2018-03-28 15:24:52,849 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:52,850 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:52,850 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: true InVars {} OutVars{main_~#mask~0.base=|v_main_~#mask~0.base_4|, main_~#mask~0.offset=|v_main_~#mask~0.offset_4|} AuxVars[] AssignedVars[main_~#mask~0.base, main_~#mask~0.offset] [2018-03-28 15:24:52,850 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:52,850 DEBUG L183 ransitionTransformer]: Formula: true InVars {} OutVars{main_#t~post4=|v_main_#t~post4_3|} AuxVars[] AssignedVars[main_#t~post4] [2018-03-28 15:24:52,850 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:52,850 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:52,850 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: true InVars {} OutVars{main_#t~post4=|v_main_#t~post4_3|} AuxVars[] AssignedVars[main_#t~post4] [2018-03-28 15:24:52,850 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:52,851 DEBUG L183 ransitionTransformer]: Formula: true InVars {} OutVars{main_#t~post2=|v_main_#t~post2_3|} AuxVars[] AssignedVars[main_#t~post2] [2018-03-28 15:24:52,851 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:52,851 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:52,851 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: true InVars {} OutVars{main_#t~post2=|v_main_#t~post2_3|} AuxVars[] AssignedVars[main_#t~post2] [2018-03-28 15:24:52,851 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:52,851 DEBUG L183 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-03-28 15:24:52,852 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:52,852 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:52,852 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-03-28 15:24:52,852 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:52,852 DEBUG L183 ransitionTransformer]: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-03-28 15:24:52,853 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:52,853 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:52,853 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-03-28 15:24:52,853 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:52,853 DEBUG L183 ransitionTransformer]: Formula: (not (<= v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_3 v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~size_2)) InVars {__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~size=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~size_2, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_3} OutVars{__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~size=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~size_2, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_3} AuxVars[] AssignedVars[] [2018-03-28 15:24:52,854 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:52,854 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:52,854 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: (not (<= v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_3 v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~size_2)) InVars {__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~size=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~size_2, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_3} OutVars{__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~size=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~size_2, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_3} AuxVars[] AssignedVars[] [2018-03-28 15:24:52,854 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:52,854 DEBUG L183 ransitionTransformer]: Formula: (<= v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_4 v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~size_3) InVars {__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~size=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~size_3, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_4} OutVars{__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~size=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~size_3, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_4} AuxVars[] AssignedVars[] [2018-03-28 15:24:52,855 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:52,855 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:52,855 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: (<= v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_4 v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~size_3) InVars {__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~size=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~size_3, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_4} OutVars{__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~size=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~size_3, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_4} AuxVars[] AssignedVars[] [2018-03-28 15:24:52,855 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:52,855 DEBUG L183 ransitionTransformer]: Formula: (= |v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#res_1| v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_11) InVars {__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_11} OutVars{__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#res=|v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#res_1|, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_11} AuxVars[] AssignedVars[__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#res] [2018-03-28 15:24:52,856 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:52,856 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:52,856 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: (= |v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#res_1| v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_11) InVars {__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_11} OutVars{__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#res=|v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#res_1|, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_11} AuxVars[] AssignedVars[__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#res] [2018-03-28 15:24:52,856 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:52,857 DEBUG L183 ransitionTransformer]: Formula: (or (not (<= 0 v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_5)) (not (< v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_5 32))) InVars {__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_5} OutVars{__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_5} AuxVars[] AssignedVars[] [2018-03-28 15:24:52,857 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:52,857 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:52,857 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: (or (not (<= 0 v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_5)) (not (< v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_5 32))) InVars {__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_5} OutVars{__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_5} AuxVars[] AssignedVars[] [2018-03-28 15:24:52,857 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:52,858 DEBUG L183 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-03-28 15:24:52,858 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:52,858 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:52,858 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-03-28 15:24:52,858 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:52,858 DEBUG L183 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-03-28 15:24:52,859 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:52,859 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:52,859 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-03-28 15:24:52,859 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:52,860 DEBUG L183 ransitionTransformer]: Formula: (let ((.cse0 (+ v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_6 v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.offset_2))) (and (<= 0 .cse0) (= |v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~mem1_1| (select (select |v_#memory_int_1| v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base_2) .cse0)) (<= (+ v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_6 v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.offset_2 1) (select |v_#length_5| v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base_2)) (= 1 (select |v_#valid_15| v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base_2)))) InVars {#valid=|v_#valid_15|, #memory_int=|v_#memory_int_1|, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base_2, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.offset=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.offset_2, #length=|v_#length_5|, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_6} OutVars{#valid=|v_#valid_15|, #memory_int=|v_#memory_int_1|, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base_2, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.offset=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.offset_2, #length=|v_#length_5|, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~mem1=|v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~mem1_1|, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_6} AuxVars[] AssignedVars[__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~mem1] [2018-03-28 15:24:52,860 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:52,860 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:52,860 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: (let ((.cse0 (+ v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_6 v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.offset_2))) (and (<= 0 .cse0) (= |v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~mem1_1| (select (select |v_#memory_int_1| v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base_2) .cse0)) (<= (+ v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_6 v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.offset_2 1) (select |v_#length_5| v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base_2)) (= 1 (select |v_#valid_15| v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base_2)))) InVars {#valid=|v_#valid_15|, #memory_int=|v_#memory_int_1|, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base_2, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.offset=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.offset_2, #length=|v_#length_5|, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_6} OutVars{#valid=|v_#valid_15|, #memory_int=|v_#memory_int_1|, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base_2, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.offset=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.offset_2, #length=|v_#length_5|, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~mem1=|v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~mem1_1|, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_6} AuxVars[] AssignedVars[__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~mem1] [2018-03-28 15:24:52,861 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:52,861 DEBUG L183 ransitionTransformer]: Formula: (not (= (select |v_#valid_16| v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base_3) 1)) InVars {#valid=|v_#valid_16|, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base_3} OutVars{#valid=|v_#valid_16|, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base_3} AuxVars[] AssignedVars[] [2018-03-28 15:24:52,861 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:52,861 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:52,861 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: (not (= (select |v_#valid_16| v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base_3) 1)) InVars {#valid=|v_#valid_16|, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base_3} OutVars{#valid=|v_#valid_16|, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base_3} AuxVars[] AssignedVars[] [2018-03-28 15:24:52,861 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:52,862 DEBUG L183 ransitionTransformer]: Formula: (or (not (<= (+ v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.offset_3 v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_7 1) (select |v_#length_6| v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base_4))) (not (<= 0 (+ v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.offset_3 v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_7)))) InVars {__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.offset=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.offset_3, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base_4, #length=|v_#length_6|, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_7} OutVars{__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.offset=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.offset_3, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base_4, #length=|v_#length_6|, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_7} AuxVars[] AssignedVars[] [2018-03-28 15:24:52,862 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:52,862 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:52,862 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: (or (not (<= (+ v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.offset_3 v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_7 1) (select |v_#length_6| v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base_4))) (not (<= 0 (+ v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.offset_3 v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_7)))) InVars {__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.offset=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.offset_3, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base_4, #length=|v_#length_6|, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_7} OutVars{__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.offset=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.offset_3, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base_4, #length=|v_#length_6|, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_7} AuxVars[] AssignedVars[] [2018-03-28 15:24:52,862 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:52,863 DEBUG L183 ransitionTransformer]: Formula: (= v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~a~0_2 (store v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~a~0_3 v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_8 |v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~mem1_2|)) InVars {__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~a~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~a~0_3, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~mem1=|v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~mem1_2|, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_8} OutVars{__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~a~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~a~0_2, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~mem1=|v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~mem1_2|, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_8} AuxVars[] AssignedVars[__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~a~0] [2018-03-28 15:24:52,863 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:52,863 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:52,863 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: (= v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~a~0_2 (store v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~a~0_3 v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_8 |v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~mem1_2|)) InVars {__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~a~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~a~0_3, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~mem1=|v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~mem1_2|, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_8} OutVars{__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~a~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~a~0_2, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~mem1=|v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~mem1_2|, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_8} AuxVars[] AssignedVars[__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~a~0] [2018-03-28 15:24:52,863 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:52,864 DEBUG L183 ransitionTransformer]: Formula: true InVars {} OutVars{__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~mem1=|v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~mem1_3|} AuxVars[] AssignedVars[__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~mem1] [2018-03-28 15:24:52,864 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:52,864 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:52,864 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: true InVars {} OutVars{__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~mem1=|v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~mem1_3|} AuxVars[] AssignedVars[__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~mem1] [2018-03-28 15:24:52,864 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:52,865 DEBUG L183 ransitionTransformer]: Formula: (= |v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~post0_1| v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_9) InVars {__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_9} OutVars{__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~post0=|v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~post0_1|, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_9} AuxVars[] AssignedVars[__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~post0] [2018-03-28 15:24:52,865 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:52,865 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:52,865 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: (= |v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~post0_1| v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_9) InVars {__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_9} OutVars{__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~post0=|v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~post0_1|, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_9} AuxVars[] AssignedVars[__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~post0] [2018-03-28 15:24:52,865 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:52,866 DEBUG L183 ransitionTransformer]: Formula: (= v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_10 (+ |v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~post0_2| 1)) InVars {__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~post0=|v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~post0_2|} OutVars{__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~post0=|v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~post0_2|, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_10} AuxVars[] AssignedVars[__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0] [2018-03-28 15:24:52,866 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:52,866 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:52,866 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: (= v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_10 (+ |v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~post0_2| 1)) InVars {__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~post0=|v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~post0_2|} OutVars{__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~post0=|v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~post0_2|, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_10} AuxVars[] AssignedVars[__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0] [2018-03-28 15:24:52,866 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:52,867 DEBUG L183 ransitionTransformer]: Formula: true InVars {} OutVars{__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~post0=|v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~post0_3|} AuxVars[] AssignedVars[__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~post0] [2018-03-28 15:24:52,867 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:52,867 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:52,867 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: true InVars {} OutVars{__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~post0=|v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~post0_3|} AuxVars[] AssignedVars[__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~post0] [2018-03-28 15:24:52,868 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-03-28 15:24:52,868 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-03-28 15:24:52,868 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: (= |v_ULTIMATE.start_#t~ret5_2| |v_main_#resOutParam_1|) InVars {main_#res=|v_main_#resOutParam_1|} OutVars{ULTIMATE.start_#t~ret5=|v_ULTIMATE.start_#t~ret5_2|} AuxVars[] AssignedVars[ULTIMATE.start_#t~ret5] [2018-03-28 15:24:52,868 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-03-28 15:24:52,868 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: (= |v_main_#t~ret3_5| |v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#resOutParam_1|) InVars {__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#res=|v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#resOutParam_1|} OutVars{main_#t~ret3=|v_main_#t~ret3_5|} AuxVars[] AssignedVars[main_#t~ret3] [2018-03-28 15:24:52,869 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: (and (= |v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~b.baseInParam_1| |v_main_~#mask~0.base_7|) (= |v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~sizeInParam_1| v_main_~i~1_18) (= |v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~b.offsetInParam_1| |v_main_~#mask~0.offset_7|)) InVars {main_~#mask~0.base=|v_main_~#mask~0.base_7|, main_~#mask~0.offset=|v_main_~#mask~0.offset_7|, main_~i~1=v_main_~i~1_18} OutVars{__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~size=|v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~sizeInParam_1|, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~b.offset=|v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~b.offsetInParam_1|, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~b.base=|v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~b.baseInParam_1|} AuxVars[] AssignedVars[__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~size, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~b.offset, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~b.base] [2018-03-28 15:24:52,869 INFO L271 apSepIcfgTransformer]: finished MemlocArrayUpdater, created 0 location literals (each corresponds to one heap write) [2018-03-28 15:24:52,870 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:52,871 DEBUG L183 ransitionTransformer]: Formula: true InVars {} OutVars{#NULL.offset=|v_#NULL.offset_2|, #NULL.base=|v_#NULL.base_2|, #valid=|v_#valid_3|} AuxVars[] AssignedVars[#valid, #NULL.offset, #NULL.base] [2018-03-28 15:24:52,871 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:52,871 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:52,871 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: true InVars {} OutVars{#NULL.offset=|v_#NULL.offset_2|, #NULL.base=|v_#NULL.base_2|, #valid=|v_#valid_3|} AuxVars[] AssignedVars[#valid, #NULL.offset, #NULL.base] [2018-03-28 15:24:52,871 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-03-28 15:24:52,871 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:52,872 DEBUG L183 ransitionTransformer]: Formula: (= |v_#valid_6| |v_#valid_5|) InVars {#valid=|v_#valid_6|} OutVars{#length=|v_#length_1|, #valid=|v_#valid_5|, ULTIMATE.start_#t~ret5=|v_ULTIMATE.start_#t~ret5_1|} AuxVars[] AssignedVars[#valid, #length, ULTIMATE.start_#t~ret5] [2018-03-28 15:24:52,872 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:52,872 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:52,872 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: (= |v_#valid_6| |v_#valid_5|) InVars {#valid=|v_#valid_6|} OutVars{#length=|v_#length_1|, #valid=|v_#valid_5|, ULTIMATE.start_#t~ret5=|v_ULTIMATE.start_#t~ret5_1|} AuxVars[] AssignedVars[#valid, #length, ULTIMATE.start_#t~ret5] [2018-03-28 15:24:52,872 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-03-28 15:24:52,872 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:52,872 DEBUG L183 ransitionTransformer]: Formula: (and (= |v_#NULL.offset_1| 0) (= |v_#NULL.base_1| 0)) InVars {} OutVars{#NULL.offset=|v_#NULL.offset_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] [2018-03-28 15:24:52,872 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:52,872 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:52,873 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: (and (= |v_#NULL.offset_1| 0) (= |v_#NULL.base_1| 0)) InVars {} OutVars{#NULL.offset=|v_#NULL.offset_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] [2018-03-28 15:24:52,873 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:52,873 DEBUG L183 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-03-28 15:24:52,873 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:52,873 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:52,873 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-03-28 15:24:52,873 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:52,873 DEBUG L183 ransitionTransformer]: Formula: true InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] [2018-03-28 15:24:52,874 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:52,874 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:52,874 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: true InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] [2018-03-28 15:24:52,874 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:52,874 DEBUG L183 ransitionTransformer]: Formula: (= |v_#valid_1| (store |v_#valid_2| 0 0)) InVars {#valid=|v_#valid_2|} OutVars{#valid=|v_#valid_1|} AuxVars[] AssignedVars[#valid] [2018-03-28 15:24:52,874 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:52,874 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:52,874 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: (= |v_#valid_1| (store |v_#valid_2| 0 0)) InVars {#valid=|v_#valid_2|} OutVars{#valid=|v_#valid_1|} AuxVars[] AssignedVars[#valid] [2018-03-28 15:24:52,875 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:52,875 DEBUG L183 ransitionTransformer]: Formula: true InVars {} OutVars{main_~b~0=v_main_~b~0_1} AuxVars[] AssignedVars[main_~b~0] [2018-03-28 15:24:52,875 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:52,875 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:52,875 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: true InVars {} OutVars{main_~b~0=v_main_~b~0_1} AuxVars[] AssignedVars[main_~b~0] [2018-03-28 15:24:52,875 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:52,876 DEBUG L183 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-03-28 15:24:52,876 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:52,876 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:52,876 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-03-28 15:24:52,876 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:52,877 DEBUG L183 ransitionTransformer]: Formula: (and (= 0 |v_main_~#mask~0.offset_1|) (= |v_#valid_7| (store |v_#valid_8| |v_main_~#mask~0.base_1| 1)) (not (= 0 |v_main_~#mask~0.base_1|)) (= 0 (select |v_#valid_8| |v_main_~#mask~0.base_1|)) (= |v_#length_3| (store |v_#length_4| |v_main_~#mask~0.base_1| 32))) InVars {#length=|v_#length_4|, #valid=|v_#valid_8|} OutVars{#length=|v_#length_3|, main_~#mask~0.base=|v_main_~#mask~0.base_1|, main_~#mask~0.offset=|v_main_~#mask~0.offset_1|, #valid=|v_#valid_7|} AuxVars[] AssignedVars[main_~#mask~0.base, main_~#mask~0.offset, #valid, #length] [2018-03-28 15:24:52,877 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:52,877 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:52,877 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: (and (= 0 |v_main_~#mask~0.offset_1|) (= |v_#valid_7| (store |v_#valid_8| |v_main_~#mask~0.base_1| 1)) (not (= 0 |v_main_~#mask~0.base_1|)) (= 0 (select |v_#valid_8| |v_main_~#mask~0.base_1|)) (= |v_#length_3| (store |v_#length_4| |v_main_~#mask~0.base_1| 32))) InVars {#length=|v_#length_4|, #valid=|v_#valid_8|} OutVars{#length=|v_#length_3|, main_~#mask~0.base=|v_main_~#mask~0.base_1|, main_~#mask~0.offset=|v_main_~#mask~0.offset_1|, #valid=|v_#valid_7|} AuxVars[] AssignedVars[main_~#mask~0.base, main_~#mask~0.offset, #valid, #length] [2018-03-28 15:24:52,878 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:52,878 DEBUG L183 ransitionTransformer]: Formula: (= v_main_~i~1_2 0) InVars {} OutVars{main_~i~1=v_main_~i~1_2} AuxVars[] AssignedVars[main_~i~1] [2018-03-28 15:24:52,878 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:52,878 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:52,878 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: (= v_main_~i~1_2 0) InVars {} OutVars{main_~i~1=v_main_~i~1_2} AuxVars[] AssignedVars[main_~i~1] [2018-03-28 15:24:52,879 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:52,879 DEBUG L183 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-03-28 15:24:52,879 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:52,879 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:52,879 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-03-28 15:24:52,880 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:52,880 DEBUG L183 ransitionTransformer]: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-03-28 15:24:52,880 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:52,880 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:52,880 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-03-28 15:24:52,880 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:52,881 DEBUG L183 ransitionTransformer]: Formula: (not (< v_main_~i~1_3 32)) InVars {main_~i~1=v_main_~i~1_3} OutVars{main_~i~1=v_main_~i~1_3} AuxVars[] AssignedVars[] [2018-03-28 15:24:52,881 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:52,881 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:52,881 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: (not (< v_main_~i~1_3 32)) InVars {main_~i~1=v_main_~i~1_3} OutVars{main_~i~1=v_main_~i~1_3} AuxVars[] AssignedVars[] [2018-03-28 15:24:52,881 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:52,882 DEBUG L183 ransitionTransformer]: Formula: (< v_main_~i~1_4 32) InVars {main_~i~1=v_main_~i~1_4} OutVars{main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[] [2018-03-28 15:24:52,882 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:52,882 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:52,882 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: (< v_main_~i~1_4 32) InVars {main_~i~1=v_main_~i~1_4} OutVars{main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[] [2018-03-28 15:24:52,882 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:52,883 DEBUG L183 ransitionTransformer]: Formula: (= v_main_~i~1_10 0) InVars {} OutVars{main_~i~1=v_main_~i~1_10} AuxVars[] AssignedVars[main_~i~1] [2018-03-28 15:24:52,883 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:52,883 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:52,883 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: (= v_main_~i~1_10 0) InVars {} OutVars{main_~i~1=v_main_~i~1_10} AuxVars[] AssignedVars[main_~i~1] [2018-03-28 15:24:52,883 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:52,883 DEBUG L183 ransitionTransformer]: Formula: (or (not (< v_main_~i~1_5 32)) (not (<= 0 v_main_~i~1_5))) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_~i~1=v_main_~i~1_5} AuxVars[] AssignedVars[] [2018-03-28 15:24:52,884 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:52,884 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:52,884 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: (or (not (< v_main_~i~1_5 32)) (not (<= 0 v_main_~i~1_5))) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_~i~1=v_main_~i~1_5} AuxVars[] AssignedVars[] [2018-03-28 15:24:52,884 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:52,884 DEBUG L183 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-03-28 15:24:52,885 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:52,885 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:52,885 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-03-28 15:24:52,885 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:52,885 DEBUG L183 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-03-28 15:24:52,885 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:52,886 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:52,886 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-03-28 15:24:52,886 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:52,886 DEBUG L183 ransitionTransformer]: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-03-28 15:24:52,886 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:52,887 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:52,887 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-03-28 15:24:52,887 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:52,887 DEBUG L183 ransitionTransformer]: Formula: true InVars {} OutVars{main_#t~ret3=|v_main_#t~ret3_1|} AuxVars[] AssignedVars[main_#t~ret3] [2018-03-28 15:24:52,887 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:52,887 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:52,888 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: true InVars {} OutVars{main_#t~ret3=|v_main_#t~ret3_1|} AuxVars[] AssignedVars[main_#t~ret3] [2018-03-28 15:24:52,888 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: (and (= |v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~b.baseInParam_1| |v_main_~#mask~0.base_7|) (= |v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~sizeInParam_1| v_main_~i~1_18) (= |v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~b.offsetInParam_1| |v_main_~#mask~0.offset_7|)) InVars {main_~i~1=v_main_~i~1_18, main_~#mask~0.base=|v_main_~#mask~0.base_7|, main_~#mask~0.offset=|v_main_~#mask~0.offset_7|} OutVars{__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~size=|v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~sizeInParam_1|, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~b.offset=|v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~b.offsetInParam_1|, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~b.base=|v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~b.baseInParam_1|} AuxVars[] AssignedVars[__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~size, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~b.offset, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~b.base] [2018-03-28 15:24:52,888 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:52,888 DEBUG L183 ransitionTransformer]: Formula: (not (< v_main_~i~1_11 32)) InVars {main_~i~1=v_main_~i~1_11} OutVars{main_~i~1=v_main_~i~1_11} AuxVars[] AssignedVars[] [2018-03-28 15:24:52,889 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:52,889 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:52,889 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: (not (< v_main_~i~1_11 32)) InVars {main_~i~1=v_main_~i~1_11} OutVars{main_~i~1=v_main_~i~1_11} AuxVars[] AssignedVars[] [2018-03-28 15:24:52,889 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:52,889 DEBUG L183 ransitionTransformer]: Formula: (< v_main_~i~1_12 32) InVars {main_~i~1=v_main_~i~1_12} OutVars{main_~i~1=v_main_~i~1_12} AuxVars[] AssignedVars[] [2018-03-28 15:24:52,889 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:52,889 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:52,889 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: (< v_main_~i~1_12 32) InVars {main_~i~1=v_main_~i~1_12} OutVars{main_~i~1=v_main_~i~1_12} AuxVars[] AssignedVars[] [2018-03-28 15:24:52,890 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:52,890 DEBUG L183 ransitionTransformer]: Formula: (= |v_main_#res_2| 0) InVars {} OutVars{main_#res=|v_main_#res_2|} AuxVars[] AssignedVars[main_#res] [2018-03-28 15:24:52,890 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:52,890 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:52,890 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: (= |v_main_#res_2| 0) InVars {} OutVars{main_#res=|v_main_#res_2|} AuxVars[] AssignedVars[main_#res] [2018-03-28 15:24:52,890 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:52,891 DEBUG L183 ransitionTransformer]: Formula: (and (<= |v_main_#t~ret3_2| 2147483647) (<= 0 (+ |v_main_#t~ret3_2| 2147483648))) InVars {main_#t~ret3=|v_main_#t~ret3_2|} OutVars{main_#t~ret3=|v_main_#t~ret3_2|} AuxVars[] AssignedVars[] [2018-03-28 15:24:52,891 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:52,891 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:52,891 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: (and (<= |v_main_#t~ret3_2| 2147483647) (<= 0 (+ |v_main_#t~ret3_2| 2147483648))) InVars {main_#t~ret3=|v_main_#t~ret3_2|} OutVars{main_#t~ret3=|v_main_#t~ret3_2|} AuxVars[] AssignedVars[] [2018-03-28 15:24:52,891 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:52,891 DEBUG L183 ransitionTransformer]: Formula: (and (= v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base_1 |v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~b.base_1|) (= v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.offset_1 |v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~b.offset_1|)) InVars {__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~b.offset=|v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~b.offset_1|, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~b.base=|v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~b.base_1|} OutVars{__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base_1, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.offset=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.offset_1, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~b.offset=|v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~b.offset_1|, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~b.base=|v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~b.base_1|} AuxVars[] AssignedVars[__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.offset] [2018-03-28 15:24:52,891 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:52,891 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:52,891 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: (and (= v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base_1 |v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~b.base_1|) (= v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.offset_1 |v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~b.offset_1|)) InVars {__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~b.offset=|v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~b.offset_1|, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~b.base=|v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~b.base_1|} OutVars{__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base_1, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.offset=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.offset_1, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~b.offset=|v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~b.offset_1|, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~b.base=|v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~b.base_1|} AuxVars[] AssignedVars[__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.offset] [2018-03-28 15:24:52,892 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:52,892 DEBUG L183 ransitionTransformer]: Formula: (or (not (< v_main_~i~1_13 32)) (not (<= 0 v_main_~i~1_13))) InVars {main_~i~1=v_main_~i~1_13} OutVars{main_~i~1=v_main_~i~1_13} AuxVars[] AssignedVars[] [2018-03-28 15:24:52,892 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:52,892 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:52,892 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: (or (not (< v_main_~i~1_13 32)) (not (<= 0 v_main_~i~1_13))) InVars {main_~i~1=v_main_~i~1_13} OutVars{main_~i~1=v_main_~i~1_13} AuxVars[] AssignedVars[] [2018-03-28 15:24:52,892 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:52,893 DEBUG L183 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-03-28 15:24:52,893 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:52,893 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:52,893 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-03-28 15:24:52,893 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:52,893 DEBUG L183 ransitionTransformer]: Formula: (= |v_#valid_11| (store |v_#valid_12| |v_main_~#mask~0.base_5| 0)) InVars {main_~#mask~0.base=|v_main_~#mask~0.base_5|, #valid=|v_#valid_12|} OutVars{main_~#mask~0.base=|v_main_~#mask~0.base_5|, #valid=|v_#valid_11|} AuxVars[] AssignedVars[#valid] [2018-03-28 15:24:52,894 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:52,894 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:52,894 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: (= |v_#valid_11| (store |v_#valid_12| |v_main_~#mask~0.base_5| 0)) InVars {main_~#mask~0.base=|v_main_~#mask~0.base_5|, #valid=|v_#valid_12|} OutVars{main_~#mask~0.base=|v_main_~#mask~0.base_5|, #valid=|v_#valid_11|} AuxVars[] AssignedVars[#valid] [2018-03-28 15:24:52,894 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:52,894 DEBUG L183 ransitionTransformer]: Formula: (= v_main_~b~0_2 (store v_main_~b~0_3 v_main_~i~1_7 |v_main_#t~ret3_3|)) InVars {main_~i~1=v_main_~i~1_7, main_~b~0=v_main_~b~0_3, main_#t~ret3=|v_main_#t~ret3_3|} OutVars{main_~i~1=v_main_~i~1_7, main_~b~0=v_main_~b~0_2, main_#t~ret3=|v_main_#t~ret3_3|} AuxVars[] AssignedVars[main_~b~0] [2018-03-28 15:24:52,895 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:52,895 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:52,895 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: (= v_main_~b~0_2 (store v_main_~b~0_3 v_main_~i~1_7 |v_main_#t~ret3_3|)) InVars {main_~i~1=v_main_~i~1_7, main_~b~0=v_main_~b~0_3, main_#t~ret3=|v_main_#t~ret3_3|} OutVars{main_~i~1=v_main_~i~1_7, main_~b~0=v_main_~b~0_2, main_#t~ret3=|v_main_#t~ret3_3|} AuxVars[] AssignedVars[main_~b~0] [2018-03-28 15:24:52,895 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:52,896 DEBUG L183 ransitionTransformer]: Formula: (= v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~size_1 |v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~size_1|) InVars {__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~size=|v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~size_1|} OutVars{__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~size=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~size_1, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~size=|v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~size_1|} AuxVars[] AssignedVars[__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~size] [2018-03-28 15:24:52,896 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:52,896 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:52,896 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: (= v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~size_1 |v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~size_1|) InVars {__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~size=|v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~size_1|} OutVars{__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~size=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~size_1, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~size=|v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~size_1|} AuxVars[] AssignedVars[__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~size] [2018-03-28 15:24:52,897 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:52,897 DEBUG L183 ransitionTransformer]: Formula: (not (= v_main_~i~1_14 (select v_main_~b~0_4 v_main_~i~1_14))) InVars {main_~b~0=v_main_~b~0_4, main_~i~1=v_main_~i~1_14} OutVars{main_~b~0=v_main_~b~0_4, main_~i~1=v_main_~i~1_14} AuxVars[] AssignedVars[] [2018-03-28 15:24:52,897 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:52,897 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:52,897 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: (not (= v_main_~i~1_14 (select v_main_~b~0_4 v_main_~i~1_14))) InVars {main_~b~0=v_main_~b~0_4, main_~i~1=v_main_~i~1_14} OutVars{main_~b~0=v_main_~b~0_4, main_~i~1=v_main_~i~1_14} AuxVars[] AssignedVars[] [2018-03-28 15:24:52,897 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:52,897 DEBUG L183 ransitionTransformer]: Formula: (= v_main_~i~1_15 (select v_main_~b~0_5 v_main_~i~1_15)) InVars {main_~b~0=v_main_~b~0_5, main_~i~1=v_main_~i~1_15} OutVars{main_~b~0=v_main_~b~0_5, main_~i~1=v_main_~i~1_15} AuxVars[] AssignedVars[] [2018-03-28 15:24:52,898 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:52,898 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:52,898 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: (= v_main_~i~1_15 (select v_main_~b~0_5 v_main_~i~1_15)) InVars {main_~b~0=v_main_~b~0_5, main_~i~1=v_main_~i~1_15} OutVars{main_~b~0=v_main_~b~0_5, main_~i~1=v_main_~i~1_15} AuxVars[] AssignedVars[] [2018-03-28 15:24:52,898 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:52,898 DEBUG L183 ransitionTransformer]: Formula: true InVars {} OutVars{main_~#mask~0.base=|v_main_~#mask~0.base_6|, main_~#mask~0.offset=|v_main_~#mask~0.offset_6|} AuxVars[] AssignedVars[main_~#mask~0.base, main_~#mask~0.offset] [2018-03-28 15:24:52,898 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:52,898 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:52,898 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: true InVars {} OutVars{main_~#mask~0.base=|v_main_~#mask~0.base_6|, main_~#mask~0.offset=|v_main_~#mask~0.offset_6|} AuxVars[] AssignedVars[main_~#mask~0.base, main_~#mask~0.offset] [2018-03-28 15:24:52,899 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:52,899 DEBUG L183 ransitionTransformer]: Formula: true InVars {} OutVars{main_#t~ret3=|v_main_#t~ret3_4|} AuxVars[] AssignedVars[main_#t~ret3] [2018-03-28 15:24:52,899 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:52,899 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:52,899 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: true InVars {} OutVars{main_#t~ret3=|v_main_#t~ret3_4|} AuxVars[] AssignedVars[main_#t~ret3] [2018-03-28 15:24:52,899 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:52,900 DEBUG L183 ransitionTransformer]: Formula: true InVars {} OutVars{__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~a~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~a~0_1} AuxVars[] AssignedVars[__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~a~0] [2018-03-28 15:24:52,900 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:52,900 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:52,900 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: true InVars {} OutVars{__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~a~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~a~0_1} AuxVars[] AssignedVars[__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~a~0] [2018-03-28 15:24:52,900 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:52,900 DEBUG L183 ransitionTransformer]: Formula: (= |v_main_#res_1| 1) InVars {} OutVars{main_#res=|v_main_#res_1|} AuxVars[] AssignedVars[main_#res] [2018-03-28 15:24:52,901 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:52,901 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:52,901 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: (= |v_main_#res_1| 1) InVars {} OutVars{main_#res=|v_main_#res_1|} AuxVars[] AssignedVars[main_#res] [2018-03-28 15:24:52,901 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:52,901 DEBUG L183 ransitionTransformer]: Formula: (= |v_main_#t~post4_1| v_main_~i~1_16) InVars {main_~i~1=v_main_~i~1_16} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_16} AuxVars[] AssignedVars[main_#t~post4] [2018-03-28 15:24:52,902 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:52,902 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:52,902 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: (= |v_main_#t~post4_1| v_main_~i~1_16) InVars {main_~i~1=v_main_~i~1_16} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_16} AuxVars[] AssignedVars[main_#t~post4] [2018-03-28 15:24:52,902 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:52,902 DEBUG L183 ransitionTransformer]: Formula: (= |v_#valid_13| |old(#valid)|) InVars {#valid=|v_#valid_13|, old(#valid)=|old(#valid)|} OutVars{#valid=|v_#valid_13|, old(#valid)=|old(#valid)|} AuxVars[] AssignedVars[] [2018-03-28 15:24:52,902 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:52,903 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:52,903 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: (= |v_#valid_13| |old(#valid)|) InVars {#valid=|v_#valid_13|, old(#valid)=|old(#valid)|} OutVars{#valid=|v_#valid_13|, old(#valid)=|old(#valid)|} AuxVars[] AssignedVars[] [2018-03-28 15:24:52,903 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:52,903 DEBUG L183 ransitionTransformer]: Formula: (not (= |v_#valid_14| |old(#valid)|)) InVars {#valid=|v_#valid_14|, old(#valid)=|old(#valid)|} OutVars{#valid=|v_#valid_14|, old(#valid)=|old(#valid)|} AuxVars[] AssignedVars[] [2018-03-28 15:24:52,903 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:52,903 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:52,904 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: (not (= |v_#valid_14| |old(#valid)|)) InVars {#valid=|v_#valid_14|, old(#valid)=|old(#valid)|} OutVars{#valid=|v_#valid_14|, old(#valid)=|old(#valid)|} AuxVars[] AssignedVars[] [2018-03-28 15:24:52,904 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:52,904 DEBUG L183 ransitionTransformer]: Formula: (= |v_main_#t~post2_1| v_main_~i~1_8) InVars {main_~i~1=v_main_~i~1_8} OutVars{main_~i~1=v_main_~i~1_8, main_#t~post2=|v_main_#t~post2_1|} AuxVars[] AssignedVars[main_#t~post2] [2018-03-28 15:24:52,904 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:52,904 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:52,904 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: (= |v_main_#t~post2_1| v_main_~i~1_8) InVars {main_~i~1=v_main_~i~1_8} OutVars{main_~i~1=v_main_~i~1_8, main_#t~post2=|v_main_#t~post2_1|} AuxVars[] AssignedVars[main_#t~post2] [2018-03-28 15:24:52,904 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:52,904 DEBUG L183 ransitionTransformer]: Formula: true InVars {} OutVars{__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_1} AuxVars[] AssignedVars[__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0] [2018-03-28 15:24:52,904 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:52,904 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:52,905 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: true InVars {} OutVars{__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_1} AuxVars[] AssignedVars[__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0] [2018-03-28 15:24:52,905 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:52,905 DEBUG L183 ransitionTransformer]: Formula: (= |v_#valid_9| (store |v_#valid_10| |v_main_~#mask~0.base_3| 0)) InVars {main_~#mask~0.base=|v_main_~#mask~0.base_3|, #valid=|v_#valid_10|} OutVars{main_~#mask~0.base=|v_main_~#mask~0.base_3|, #valid=|v_#valid_9|} AuxVars[] AssignedVars[#valid] [2018-03-28 15:24:52,905 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:52,905 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:52,905 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: (= |v_#valid_9| (store |v_#valid_10| |v_main_~#mask~0.base_3| 0)) InVars {main_~#mask~0.base=|v_main_~#mask~0.base_3|, #valid=|v_#valid_10|} OutVars{main_~#mask~0.base=|v_main_~#mask~0.base_3|, #valid=|v_#valid_9|} AuxVars[] AssignedVars[#valid] [2018-03-28 15:24:52,905 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:52,905 DEBUG L183 ransitionTransformer]: Formula: (= v_main_~i~1_17 (+ |v_main_#t~post4_2| 1)) InVars {main_#t~post4=|v_main_#t~post4_2|} OutVars{main_#t~post4=|v_main_#t~post4_2|, main_~i~1=v_main_~i~1_17} AuxVars[] AssignedVars[main_~i~1] [2018-03-28 15:24:52,905 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:52,906 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:52,906 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: (= v_main_~i~1_17 (+ |v_main_#t~post4_2| 1)) InVars {main_#t~post4=|v_main_#t~post4_2|} OutVars{main_#t~post4=|v_main_#t~post4_2|, main_~i~1=v_main_~i~1_17} AuxVars[] AssignedVars[main_~i~1] [2018-03-28 15:24:52,906 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:52,906 DEBUG L183 ransitionTransformer]: Formula: (= v_main_~i~1_9 (+ |v_main_#t~post2_2| 1)) InVars {main_#t~post2=|v_main_#t~post2_2|} OutVars{main_~i~1=v_main_~i~1_9, main_#t~post2=|v_main_#t~post2_2|} AuxVars[] AssignedVars[main_~i~1] [2018-03-28 15:24:52,906 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:52,906 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:52,906 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: (= v_main_~i~1_9 (+ |v_main_#t~post2_2| 1)) InVars {main_#t~post2=|v_main_#t~post2_2|} OutVars{main_~i~1=v_main_~i~1_9, main_#t~post2=|v_main_#t~post2_2|} AuxVars[] AssignedVars[main_~i~1] [2018-03-28 15:24:52,907 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:52,907 DEBUG L183 ransitionTransformer]: Formula: (= v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_2 0) InVars {} OutVars{__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_2} AuxVars[] AssignedVars[__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0] [2018-03-28 15:24:52,907 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:52,907 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:52,907 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: (= v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_2 0) InVars {} OutVars{__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_2} AuxVars[] AssignedVars[__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0] [2018-03-28 15:24:52,907 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:52,907 DEBUG L183 ransitionTransformer]: Formula: true InVars {} OutVars{main_~#mask~0.base=|v_main_~#mask~0.base_4|, main_~#mask~0.offset=|v_main_~#mask~0.offset_4|} AuxVars[] AssignedVars[main_~#mask~0.base, main_~#mask~0.offset] [2018-03-28 15:24:52,907 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:52,907 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:52,908 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: true InVars {} OutVars{main_~#mask~0.base=|v_main_~#mask~0.base_4|, main_~#mask~0.offset=|v_main_~#mask~0.offset_4|} AuxVars[] AssignedVars[main_~#mask~0.base, main_~#mask~0.offset] [2018-03-28 15:24:52,908 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:52,908 DEBUG L183 ransitionTransformer]: Formula: true InVars {} OutVars{main_#t~post4=|v_main_#t~post4_3|} AuxVars[] AssignedVars[main_#t~post4] [2018-03-28 15:24:52,908 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:52,908 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:52,908 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: true InVars {} OutVars{main_#t~post4=|v_main_#t~post4_3|} AuxVars[] AssignedVars[main_#t~post4] [2018-03-28 15:24:52,908 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:52,908 DEBUG L183 ransitionTransformer]: Formula: true InVars {} OutVars{main_#t~post2=|v_main_#t~post2_3|} AuxVars[] AssignedVars[main_#t~post2] [2018-03-28 15:24:52,908 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:52,909 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:52,909 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: true InVars {} OutVars{main_#t~post2=|v_main_#t~post2_3|} AuxVars[] AssignedVars[main_#t~post2] [2018-03-28 15:24:52,909 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:52,909 DEBUG L183 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-03-28 15:24:52,909 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:52,909 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:52,909 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-03-28 15:24:52,909 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:52,909 DEBUG L183 ransitionTransformer]: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-03-28 15:24:52,909 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:52,910 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:52,910 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-03-28 15:24:52,910 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:52,910 DEBUG L183 ransitionTransformer]: Formula: (not (<= v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_3 v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~size_2)) InVars {__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~size=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~size_2, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_3} OutVars{__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~size=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~size_2, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_3} AuxVars[] AssignedVars[] [2018-03-28 15:24:52,910 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:52,910 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:52,910 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: (not (<= v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_3 v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~size_2)) InVars {__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~size=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~size_2, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_3} OutVars{__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~size=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~size_2, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_3} AuxVars[] AssignedVars[] [2018-03-28 15:24:52,911 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:52,911 DEBUG L183 ransitionTransformer]: Formula: (<= v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_4 v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~size_3) InVars {__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~size=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~size_3, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_4} OutVars{__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~size=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~size_3, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_4} AuxVars[] AssignedVars[] [2018-03-28 15:24:52,911 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:52,911 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:52,911 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: (<= v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_4 v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~size_3) InVars {__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~size=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~size_3, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_4} OutVars{__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~size=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~size_3, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_4} AuxVars[] AssignedVars[] [2018-03-28 15:24:52,911 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:52,911 DEBUG L183 ransitionTransformer]: Formula: (= |v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#res_1| v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_11) InVars {__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_11} OutVars{__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#res=|v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#res_1|, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_11} AuxVars[] AssignedVars[__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#res] [2018-03-28 15:24:52,911 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:52,911 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:52,912 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: (= |v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#res_1| v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_11) InVars {__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_11} OutVars{__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#res=|v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#res_1|, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_11} AuxVars[] AssignedVars[__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#res] [2018-03-28 15:24:52,912 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:52,912 DEBUG L183 ransitionTransformer]: Formula: (or (not (<= 0 v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_5)) (not (< v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_5 32))) InVars {__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_5} OutVars{__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_5} AuxVars[] AssignedVars[] [2018-03-28 15:24:52,912 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:52,912 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:52,912 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: (or (not (<= 0 v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_5)) (not (< v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_5 32))) InVars {__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_5} OutVars{__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_5} AuxVars[] AssignedVars[] [2018-03-28 15:24:52,912 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:52,913 DEBUG L183 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-03-28 15:24:52,913 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:52,913 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:52,913 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-03-28 15:24:52,913 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:52,913 DEBUG L183 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-03-28 15:24:52,913 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:52,913 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:52,914 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-03-28 15:24:52,914 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:52,914 DEBUG L183 ransitionTransformer]: Formula: (let ((.cse0 (+ v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_6 v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.offset_2))) (and (<= 0 .cse0) (= |v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~mem1_1| (select (select |v_#memory_int_1| v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base_2) .cse0)) (<= (+ v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_6 v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.offset_2 1) (select |v_#length_5| v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base_2)) (= 1 (select |v_#valid_15| v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base_2)))) InVars {#valid=|v_#valid_15|, #memory_int=|v_#memory_int_1|, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base_2, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.offset=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.offset_2, #length=|v_#length_5|, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_6} OutVars{#valid=|v_#valid_15|, #memory_int=|v_#memory_int_1|, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base_2, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.offset=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.offset_2, #length=|v_#length_5|, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~mem1=|v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~mem1_1|, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_6} AuxVars[] AssignedVars[__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~mem1] [2018-03-28 15:24:52,914 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:52,914 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:52,914 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: (let ((.cse0 (+ v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_6 v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.offset_2))) (and (<= 0 .cse0) (= |v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~mem1_1| (select (select |v_#memory_int_1| v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base_2) .cse0)) (<= (+ v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_6 v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.offset_2 1) (select |v_#length_5| v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base_2)) (= 1 (select |v_#valid_15| v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base_2)))) InVars {#valid=|v_#valid_15|, #memory_int=|v_#memory_int_1|, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base_2, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.offset=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.offset_2, #length=|v_#length_5|, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_6} OutVars{#valid=|v_#valid_15|, #memory_int=|v_#memory_int_1|, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base_2, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.offset=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.offset_2, #length=|v_#length_5|, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~mem1=|v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~mem1_1|, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_6} AuxVars[] AssignedVars[__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~mem1] [2018-03-28 15:24:52,915 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:52,915 DEBUG L183 ransitionTransformer]: Formula: (not (= (select |v_#valid_16| v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base_3) 1)) InVars {__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base_3, #valid=|v_#valid_16|} OutVars{__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base_3, #valid=|v_#valid_16|} AuxVars[] AssignedVars[] [2018-03-28 15:24:52,915 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:52,915 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:52,915 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: (not (= (select |v_#valid_16| v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base_3) 1)) InVars {__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base_3, #valid=|v_#valid_16|} OutVars{__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base_3, #valid=|v_#valid_16|} AuxVars[] AssignedVars[] [2018-03-28 15:24:52,915 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:52,915 DEBUG L183 ransitionTransformer]: Formula: (or (not (<= (+ v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.offset_3 v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_7 1) (select |v_#length_6| v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base_4))) (not (<= 0 (+ v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.offset_3 v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_7)))) InVars {__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.offset=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.offset_3, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base_4, #length=|v_#length_6|, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_7} OutVars{__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.offset=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.offset_3, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base_4, #length=|v_#length_6|, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_7} AuxVars[] AssignedVars[] [2018-03-28 15:24:52,916 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:52,916 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:52,916 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: (or (not (<= (+ v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.offset_3 v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_7 1) (select |v_#length_6| v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base_4))) (not (<= 0 (+ v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.offset_3 v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_7)))) InVars {__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.offset=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.offset_3, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base_4, #length=|v_#length_6|, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_7} OutVars{__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.offset=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.offset_3, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base_4, #length=|v_#length_6|, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_7} AuxVars[] AssignedVars[] [2018-03-28 15:24:52,916 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:52,916 DEBUG L183 ransitionTransformer]: Formula: (= v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~a~0_2 (store v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~a~0_3 v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_8 |v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~mem1_2|)) InVars {__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~mem1=|v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~mem1_2|, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~a~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~a~0_3, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_8} OutVars{__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~mem1=|v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~mem1_2|, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~a~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~a~0_2, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_8} AuxVars[] AssignedVars[__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~a~0] [2018-03-28 15:24:52,917 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:52,917 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:52,917 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: (= v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~a~0_2 (store v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~a~0_3 v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_8 |v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~mem1_2|)) InVars {__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~mem1=|v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~mem1_2|, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~a~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~a~0_3, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_8} OutVars{__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~mem1=|v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~mem1_2|, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~a~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~a~0_2, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_8} AuxVars[] AssignedVars[__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~a~0] [2018-03-28 15:24:52,917 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:52,917 DEBUG L183 ransitionTransformer]: Formula: true InVars {} OutVars{__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~mem1=|v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~mem1_3|} AuxVars[] AssignedVars[__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~mem1] [2018-03-28 15:24:52,918 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:52,918 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:52,918 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: true InVars {} OutVars{__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~mem1=|v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~mem1_3|} AuxVars[] AssignedVars[__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~mem1] [2018-03-28 15:24:52,918 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:52,918 DEBUG L183 ransitionTransformer]: Formula: (= |v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~post0_1| v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_9) InVars {__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_9} OutVars{__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~post0=|v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~post0_1|, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_9} AuxVars[] AssignedVars[__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~post0] [2018-03-28 15:24:52,918 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:52,918 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:52,919 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: (= |v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~post0_1| v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_9) InVars {__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_9} OutVars{__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~post0=|v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~post0_1|, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_9} AuxVars[] AssignedVars[__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~post0] [2018-03-28 15:24:52,919 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:52,919 DEBUG L183 ransitionTransformer]: Formula: (= v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_10 (+ |v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~post0_2| 1)) InVars {__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~post0=|v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~post0_2|} OutVars{__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~post0=|v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~post0_2|, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_10} AuxVars[] AssignedVars[__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0] [2018-03-28 15:24:52,919 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:52,919 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:52,920 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: (= v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_10 (+ |v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~post0_2| 1)) InVars {__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~post0=|v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~post0_2|} OutVars{__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~post0=|v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~post0_2|, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_10} AuxVars[] AssignedVars[__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0] [2018-03-28 15:24:52,920 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:52,920 DEBUG L183 ransitionTransformer]: Formula: true InVars {} OutVars{__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~post0=|v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~post0_3|} AuxVars[] AssignedVars[__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~post0] [2018-03-28 15:24:52,920 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:52,920 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:52,920 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: true InVars {} OutVars{__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~post0=|v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~post0_3|} AuxVars[] AssignedVars[__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~post0] [2018-03-28 15:24:52,921 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-03-28 15:24:52,921 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-03-28 15:24:52,921 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: (= |v_ULTIMATE.start_#t~ret5_2| |v_main_#resOutParam_1|) InVars {main_#res=|v_main_#resOutParam_1|} OutVars{ULTIMATE.start_#t~ret5=|v_ULTIMATE.start_#t~ret5_2|} AuxVars[] AssignedVars[ULTIMATE.start_#t~ret5] [2018-03-28 15:24:52,921 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-03-28 15:24:52,921 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: (= |v_main_#t~ret3_5| |v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#resOutParam_1|) InVars {__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#res=|v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#resOutParam_1|} OutVars{main_#t~ret3=|v_main_#t~ret3_5|} AuxVars[] AssignedVars[main_#t~ret3] [2018-03-28 15:24:52,922 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: (and (= |v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~b.baseInParam_1| |v_main_~#mask~0.base_7|) (= |v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~sizeInParam_1| v_main_~i~1_18) (= |v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~b.offsetInParam_1| |v_main_~#mask~0.offset_7|)) InVars {main_~i~1=v_main_~i~1_18, main_~#mask~0.base=|v_main_~#mask~0.base_7|, main_~#mask~0.offset=|v_main_~#mask~0.offset_7|} OutVars{__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~size=|v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~sizeInParam_1|, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~b.offset=|v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~b.offsetInParam_1|, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~b.base=|v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~b.baseInParam_1|} AuxVars[] AssignedVars[__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~size, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~b.offset, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~b.base] [2018-03-28 15:24:52,924 INFO L322 apSepIcfgTransformer]: finished preprocessing for the equality analysis [2018-03-28 15:24:52,925 DEBUG L326 apSepIcfgTransformer]: storeIndexInfoToLocLiteral: Map: [2018-03-28 15:24:52,926 DEBUG L328 apSepIcfgTransformer]: edgeToIndexToStoreIndexInfo: NestedMap2: [2018-03-28 15:24:52,973 INFO L101 FixpointEngine]: Starting fixpoint engine with domain VPDomain (maxUnwinding=3, maxParallelStates=2) [2018-03-28 15:24:56,269 INFO L314 AbstractInterpreter]: Visited 70 different actions 337 times. Merged at 46 different actions 162 times. Never widened. Found 30 fixpoints after 12 different actions. Largest state had 21 variables. [2018-03-28 15:24:56,272 INFO L334 apSepIcfgTransformer]: finished equality analysis [2018-03-28 15:24:56,281 INFO L195 HeapSepPreAnalysis]: Number of read from array group [#memory_int] : 1 [2018-03-28 15:24:56,282 INFO L344 apSepIcfgTransformer]: Finished pre analysis before partitioning [2018-03-28 15:24:56,282 INFO L345 apSepIcfgTransformer]: array groups: Set: [#memory_int] [2018-03-28 15:24:56,282 INFO L347 apSepIcfgTransformer]: select infos: Set: ((select (select |v_#memory_int_1| v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base_2) (+ v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_6 v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.offset_2)), at (SUMMARY for call #t~mem1 := read~int(~b.base, ~b.offset + ~i~0 * 1, 1); srcloc: L18')) [2018-03-28 15:24:56,287 DEBUG L354 HeapPartitionManager]: creating LocationBlock locs_30 [2018-03-28 15:24:56,287 DEBUG L355 HeapPartitionManager]: with contents [NoStoreIndexInfo] [2018-03-28 15:24:56,287 DEBUG L304 HeapPartitionManager]: adding LocationBlock locs_30 [2018-03-28 15:24:56,288 DEBUG L305 HeapPartitionManager]: at dimension 0 for ((select (select |v_#memory_int_1| v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base_2) (+ v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_6 v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.offset_2)), at (SUMMARY for call #t~mem1 := read~int(~b.base, ~b.offset + ~i~0 * 1, 1); srcloc: L18')) [2018-03-28 15:24:56,288 DEBUG L306 HeapPartitionManager]: write locations: [NoStoreIndexInfo] [2018-03-28 15:24:56,288 DEBUG L354 HeapPartitionManager]: creating LocationBlock locs_30 [2018-03-28 15:24:56,288 DEBUG L355 HeapPartitionManager]: with contents [NoStoreIndexInfo] [2018-03-28 15:24:56,288 DEBUG L304 HeapPartitionManager]: adding LocationBlock locs_30 [2018-03-28 15:24:56,288 DEBUG L305 HeapPartitionManager]: at dimension 1 for ((select (select |v_#memory_int_1| v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base_2) (+ v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_6 v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.offset_2)), at (SUMMARY for call #t~mem1 := read~int(~b.base, ~b.offset + ~i~0 * 1, 1); srcloc: L18')) [2018-03-28 15:24:56,289 DEBUG L306 HeapPartitionManager]: write locations: [NoStoreIndexInfo] [2018-03-28 15:24:56,289 INFO L311 HeapPartitionManager]: partitioning result: [2018-03-28 15:24:56,289 INFO L316 HeapPartitionManager]: location blocks for array group [#memory_int] [2018-03-28 15:24:56,289 INFO L325 HeapPartitionManager]: at dimension 0 [2018-03-28 15:24:56,289 INFO L326 HeapPartitionManager]: # array writes (possibly including 1 dummy write/NoStoreIndexInfo) : 1 [2018-03-28 15:24:56,290 INFO L327 HeapPartitionManager]: # location blocks :1 [2018-03-28 15:24:56,290 DEBUG L334 HeapPartitionManager]: location block contents: [2018-03-28 15:24:56,290 DEBUG L337 HeapPartitionManager]: [NoStoreIndexInfo] [2018-03-28 15:24:56,290 INFO L325 HeapPartitionManager]: at dimension 1 [2018-03-28 15:24:56,290 INFO L326 HeapPartitionManager]: # array writes (possibly including 1 dummy write/NoStoreIndexInfo) : 1 [2018-03-28 15:24:56,290 INFO L327 HeapPartitionManager]: # location blocks :1 [2018-03-28 15:24:56,291 DEBUG L334 HeapPartitionManager]: location block contents: [2018-03-28 15:24:56,291 DEBUG L337 HeapPartitionManager]: [NoStoreIndexInfo] [2018-03-28 15:24:56,292 INFO L86 ransitionTransformer]: executing heap partitioning transformation [2018-03-28 15:24:56,295 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:56,295 DEBUG L183 ransitionTransformer]: Formula: true InVars {} OutVars{#NULL.offset=|v_#NULL.offset_2|, #NULL.base=|v_#NULL.base_2|, #valid=|v_#valid_3|} AuxVars[] AssignedVars[#valid, #NULL.offset, #NULL.base] [2018-03-28 15:24:56,296 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:56,296 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:56,296 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: true InVars {} OutVars{#NULL.offset=|v_#NULL.offset_2|, #NULL.base=|v_#NULL.base_2|, #valid=|v_#valid_3|} AuxVars[] AssignedVars[#valid, #NULL.offset, #NULL.base] [2018-03-28 15:24:56,296 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-03-28 15:24:56,297 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:56,297 DEBUG L183 ransitionTransformer]: Formula: (= |v_#valid_6| |v_#valid_5|) InVars {#valid=|v_#valid_6|} OutVars{#length=|v_#length_1|, #valid=|v_#valid_5|, ULTIMATE.start_#t~ret5=|v_ULTIMATE.start_#t~ret5_1|} AuxVars[] AssignedVars[#valid, #length, ULTIMATE.start_#t~ret5] [2018-03-28 15:24:56,297 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:56,297 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:56,297 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: (= |v_#valid_6| |v_#valid_5|) InVars {#valid=|v_#valid_6|} OutVars{#length=|v_#length_1|, #valid=|v_#valid_5|, ULTIMATE.start_#t~ret5=|v_ULTIMATE.start_#t~ret5_1|} AuxVars[] AssignedVars[#valid, #length, ULTIMATE.start_#t~ret5] [2018-03-28 15:24:56,298 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-03-28 15:24:56,298 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:56,298 DEBUG L183 ransitionTransformer]: Formula: (and (= |v_#NULL.offset_1| 0) (= |v_#NULL.base_1| 0)) InVars {} OutVars{#NULL.offset=|v_#NULL.offset_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] [2018-03-28 15:24:56,298 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:56,299 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:56,299 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: (and (= |v_#NULL.offset_1| 0) (= |v_#NULL.base_1| 0)) InVars {} OutVars{#NULL.offset=|v_#NULL.offset_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] [2018-03-28 15:24:56,299 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:56,299 DEBUG L183 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-03-28 15:24:56,299 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:56,299 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:56,299 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-03-28 15:24:56,300 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:56,300 DEBUG L183 ransitionTransformer]: Formula: true InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] [2018-03-28 15:24:56,300 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:56,300 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:56,300 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: true InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] [2018-03-28 15:24:56,301 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:56,301 DEBUG L183 ransitionTransformer]: Formula: (= |v_#valid_1| (store |v_#valid_2| 0 0)) InVars {#valid=|v_#valid_2|} OutVars{#valid=|v_#valid_1|} AuxVars[] AssignedVars[#valid] [2018-03-28 15:24:56,301 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:56,301 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:56,301 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: (= |v_#valid_1| (store |v_#valid_2| 0 0)) InVars {#valid=|v_#valid_2|} OutVars{#valid=|v_#valid_1|} AuxVars[] AssignedVars[#valid] [2018-03-28 15:24:56,301 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:56,301 DEBUG L183 ransitionTransformer]: Formula: true InVars {} OutVars{main_~b~0=v_main_~b~0_1} AuxVars[] AssignedVars[main_~b~0] [2018-03-28 15:24:56,302 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:56,302 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:56,302 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: true InVars {} OutVars{main_~b~0=v_main_~b~0_1} AuxVars[] AssignedVars[main_~b~0] [2018-03-28 15:24:56,302 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:56,302 DEBUG L183 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-03-28 15:24:56,302 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:56,302 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:56,303 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-03-28 15:24:56,303 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:56,303 DEBUG L183 ransitionTransformer]: Formula: (and (= 0 |v_main_~#mask~0.offset_1|) (= |v_#valid_7| (store |v_#valid_8| |v_main_~#mask~0.base_1| 1)) (not (= 0 |v_main_~#mask~0.base_1|)) (= 0 (select |v_#valid_8| |v_main_~#mask~0.base_1|)) (= |v_#length_3| (store |v_#length_4| |v_main_~#mask~0.base_1| 32))) InVars {#length=|v_#length_4|, #valid=|v_#valid_8|} OutVars{#length=|v_#length_3|, main_~#mask~0.base=|v_main_~#mask~0.base_1|, main_~#mask~0.offset=|v_main_~#mask~0.offset_1|, #valid=|v_#valid_7|} AuxVars[] AssignedVars[main_~#mask~0.base, main_~#mask~0.offset, #valid, #length] [2018-03-28 15:24:56,303 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:56,303 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:56,304 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: (and (= 0 |v_main_~#mask~0.offset_1|) (= |v_#valid_7| (store |v_#valid_8| |v_main_~#mask~0.base_1| 1)) (not (= 0 |v_main_~#mask~0.base_1|)) (= 0 (select |v_#valid_8| |v_main_~#mask~0.base_1|)) (= |v_#length_3| (store |v_#length_4| |v_main_~#mask~0.base_1| 32))) InVars {#length=|v_#length_4|, #valid=|v_#valid_8|} OutVars{#length=|v_#length_3|, main_~#mask~0.base=|v_main_~#mask~0.base_1|, main_~#mask~0.offset=|v_main_~#mask~0.offset_1|, #valid=|v_#valid_7|} AuxVars[] AssignedVars[main_~#mask~0.base, main_~#mask~0.offset, #valid, #length] [2018-03-28 15:24:56,304 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:56,304 DEBUG L183 ransitionTransformer]: Formula: (= v_main_~i~1_2 0) InVars {} OutVars{main_~i~1=v_main_~i~1_2} AuxVars[] AssignedVars[main_~i~1] [2018-03-28 15:24:56,304 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:56,304 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:56,304 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: (= v_main_~i~1_2 0) InVars {} OutVars{main_~i~1=v_main_~i~1_2} AuxVars[] AssignedVars[main_~i~1] [2018-03-28 15:24:56,305 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:56,305 DEBUG L183 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-03-28 15:24:56,305 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:56,305 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:56,305 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-03-28 15:24:56,305 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:56,306 DEBUG L183 ransitionTransformer]: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-03-28 15:24:56,306 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:56,306 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:56,306 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-03-28 15:24:56,306 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:56,306 DEBUG L183 ransitionTransformer]: Formula: (not (< v_main_~i~1_3 32)) InVars {main_~i~1=v_main_~i~1_3} OutVars{main_~i~1=v_main_~i~1_3} AuxVars[] AssignedVars[] [2018-03-28 15:24:56,306 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:56,307 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:56,307 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: (not (< v_main_~i~1_3 32)) InVars {main_~i~1=v_main_~i~1_3} OutVars{main_~i~1=v_main_~i~1_3} AuxVars[] AssignedVars[] [2018-03-28 15:24:56,307 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:56,307 DEBUG L183 ransitionTransformer]: Formula: (< v_main_~i~1_4 32) InVars {main_~i~1=v_main_~i~1_4} OutVars{main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[] [2018-03-28 15:24:56,307 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:56,307 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:56,307 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: (< v_main_~i~1_4 32) InVars {main_~i~1=v_main_~i~1_4} OutVars{main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[] [2018-03-28 15:24:56,308 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:56,308 DEBUG L183 ransitionTransformer]: Formula: (= v_main_~i~1_10 0) InVars {} OutVars{main_~i~1=v_main_~i~1_10} AuxVars[] AssignedVars[main_~i~1] [2018-03-28 15:24:56,308 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:56,308 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:56,308 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: (= v_main_~i~1_10 0) InVars {} OutVars{main_~i~1=v_main_~i~1_10} AuxVars[] AssignedVars[main_~i~1] [2018-03-28 15:24:56,309 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:56,309 DEBUG L183 ransitionTransformer]: Formula: (or (not (< v_main_~i~1_5 32)) (not (<= 0 v_main_~i~1_5))) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_~i~1=v_main_~i~1_5} AuxVars[] AssignedVars[] [2018-03-28 15:24:56,309 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:56,309 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:56,309 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: (or (not (< v_main_~i~1_5 32)) (not (<= 0 v_main_~i~1_5))) InVars {main_~i~1=v_main_~i~1_5} OutVars{main_~i~1=v_main_~i~1_5} AuxVars[] AssignedVars[] [2018-03-28 15:24:56,309 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:56,309 DEBUG L183 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-03-28 15:24:56,310 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:56,310 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:56,310 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-03-28 15:24:56,310 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:56,310 DEBUG L183 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-03-28 15:24:56,310 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:56,310 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:56,311 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-03-28 15:24:56,311 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:56,311 DEBUG L183 ransitionTransformer]: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-03-28 15:24:56,311 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:56,311 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:56,311 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-03-28 15:24:56,312 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:56,312 DEBUG L183 ransitionTransformer]: Formula: true InVars {} OutVars{main_#t~ret3=|v_main_#t~ret3_1|} AuxVars[] AssignedVars[main_#t~ret3] [2018-03-28 15:24:56,312 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:56,312 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:56,312 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: true InVars {} OutVars{main_#t~ret3=|v_main_#t~ret3_1|} AuxVars[] AssignedVars[main_#t~ret3] [2018-03-28 15:24:56,312 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: (and (= |v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~b.baseInParam_1| |v_main_~#mask~0.base_7|) (= |v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~sizeInParam_1| v_main_~i~1_18) (= |v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~b.offsetInParam_1| |v_main_~#mask~0.offset_7|)) InVars {main_~i~1=v_main_~i~1_18, main_~#mask~0.base=|v_main_~#mask~0.base_7|, main_~#mask~0.offset=|v_main_~#mask~0.offset_7|} OutVars{__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~size=|v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~sizeInParam_1|, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~b.offset=|v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~b.offsetInParam_1|, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~b.base=|v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~b.baseInParam_1|} AuxVars[] AssignedVars[__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~size, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~b.offset, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~b.base] [2018-03-28 15:24:56,313 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:56,313 DEBUG L183 ransitionTransformer]: Formula: (not (< v_main_~i~1_11 32)) InVars {main_~i~1=v_main_~i~1_11} OutVars{main_~i~1=v_main_~i~1_11} AuxVars[] AssignedVars[] [2018-03-28 15:24:56,313 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:56,313 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:56,313 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: (not (< v_main_~i~1_11 32)) InVars {main_~i~1=v_main_~i~1_11} OutVars{main_~i~1=v_main_~i~1_11} AuxVars[] AssignedVars[] [2018-03-28 15:24:56,313 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:56,313 DEBUG L183 ransitionTransformer]: Formula: (< v_main_~i~1_12 32) InVars {main_~i~1=v_main_~i~1_12} OutVars{main_~i~1=v_main_~i~1_12} AuxVars[] AssignedVars[] [2018-03-28 15:24:56,314 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:56,314 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:56,314 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: (< v_main_~i~1_12 32) InVars {main_~i~1=v_main_~i~1_12} OutVars{main_~i~1=v_main_~i~1_12} AuxVars[] AssignedVars[] [2018-03-28 15:24:56,314 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:56,314 DEBUG L183 ransitionTransformer]: Formula: (= |v_main_#res_2| 0) InVars {} OutVars{main_#res=|v_main_#res_2|} AuxVars[] AssignedVars[main_#res] [2018-03-28 15:24:56,314 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:56,314 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:56,315 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: (= |v_main_#res_2| 0) InVars {} OutVars{main_#res=|v_main_#res_2|} AuxVars[] AssignedVars[main_#res] [2018-03-28 15:24:56,315 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:56,315 DEBUG L183 ransitionTransformer]: Formula: (and (<= |v_main_#t~ret3_2| 2147483647) (<= 0 (+ |v_main_#t~ret3_2| 2147483648))) InVars {main_#t~ret3=|v_main_#t~ret3_2|} OutVars{main_#t~ret3=|v_main_#t~ret3_2|} AuxVars[] AssignedVars[] [2018-03-28 15:24:56,315 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:56,315 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:56,315 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: (and (<= |v_main_#t~ret3_2| 2147483647) (<= 0 (+ |v_main_#t~ret3_2| 2147483648))) InVars {main_#t~ret3=|v_main_#t~ret3_2|} OutVars{main_#t~ret3=|v_main_#t~ret3_2|} AuxVars[] AssignedVars[] [2018-03-28 15:24:56,316 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:56,316 DEBUG L183 ransitionTransformer]: Formula: (and (= v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base_1 |v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~b.base_1|) (= v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.offset_1 |v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~b.offset_1|)) InVars {__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~b.offset=|v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~b.offset_1|, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~b.base=|v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~b.base_1|} OutVars{__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base_1, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.offset=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.offset_1, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~b.offset=|v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~b.offset_1|, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~b.base=|v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~b.base_1|} AuxVars[] AssignedVars[__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.offset] [2018-03-28 15:24:56,316 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:56,316 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:56,316 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: (and (= v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base_1 |v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~b.base_1|) (= v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.offset_1 |v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~b.offset_1|)) InVars {__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~b.offset=|v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~b.offset_1|, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~b.base=|v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~b.base_1|} OutVars{__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base_1, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.offset=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.offset_1, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~b.offset=|v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~b.offset_1|, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~b.base=|v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~b.base_1|} AuxVars[] AssignedVars[__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.offset] [2018-03-28 15:24:56,316 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:56,317 DEBUG L183 ransitionTransformer]: Formula: (or (not (< v_main_~i~1_13 32)) (not (<= 0 v_main_~i~1_13))) InVars {main_~i~1=v_main_~i~1_13} OutVars{main_~i~1=v_main_~i~1_13} AuxVars[] AssignedVars[] [2018-03-28 15:24:56,317 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:56,317 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:56,317 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: (or (not (< v_main_~i~1_13 32)) (not (<= 0 v_main_~i~1_13))) InVars {main_~i~1=v_main_~i~1_13} OutVars{main_~i~1=v_main_~i~1_13} AuxVars[] AssignedVars[] [2018-03-28 15:24:56,317 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:56,317 DEBUG L183 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-03-28 15:24:56,317 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:56,318 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:56,318 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-03-28 15:24:56,318 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:56,318 DEBUG L183 ransitionTransformer]: Formula: (= |v_#valid_11| (store |v_#valid_12| |v_main_~#mask~0.base_5| 0)) InVars {main_~#mask~0.base=|v_main_~#mask~0.base_5|, #valid=|v_#valid_12|} OutVars{main_~#mask~0.base=|v_main_~#mask~0.base_5|, #valid=|v_#valid_11|} AuxVars[] AssignedVars[#valid] [2018-03-28 15:24:56,318 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:56,318 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:56,318 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: (= |v_#valid_11| (store |v_#valid_12| |v_main_~#mask~0.base_5| 0)) InVars {main_~#mask~0.base=|v_main_~#mask~0.base_5|, #valid=|v_#valid_12|} OutVars{main_~#mask~0.base=|v_main_~#mask~0.base_5|, #valid=|v_#valid_11|} AuxVars[] AssignedVars[#valid] [2018-03-28 15:24:56,319 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:56,319 DEBUG L183 ransitionTransformer]: Formula: (= v_main_~b~0_2 (store v_main_~b~0_3 v_main_~i~1_7 |v_main_#t~ret3_3|)) InVars {main_~i~1=v_main_~i~1_7, main_~b~0=v_main_~b~0_3, main_#t~ret3=|v_main_#t~ret3_3|} OutVars{main_~i~1=v_main_~i~1_7, main_~b~0=v_main_~b~0_2, main_#t~ret3=|v_main_#t~ret3_3|} AuxVars[] AssignedVars[main_~b~0] [2018-03-28 15:24:56,319 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:56,319 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:56,319 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: (= v_main_~b~0_2 (store v_main_~b~0_3 v_main_~i~1_7 |v_main_#t~ret3_3|)) InVars {main_~i~1=v_main_~i~1_7, main_~b~0=v_main_~b~0_3, main_#t~ret3=|v_main_#t~ret3_3|} OutVars{main_~i~1=v_main_~i~1_7, main_~b~0=v_main_~b~0_2, main_#t~ret3=|v_main_#t~ret3_3|} AuxVars[] AssignedVars[main_~b~0] [2018-03-28 15:24:56,320 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:56,320 DEBUG L183 ransitionTransformer]: Formula: (= v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~size_1 |v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~size_1|) InVars {__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~size=|v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~size_1|} OutVars{__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~size=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~size_1, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~size=|v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~size_1|} AuxVars[] AssignedVars[__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~size] [2018-03-28 15:24:56,320 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:56,320 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:56,320 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: (= v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~size_1 |v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~size_1|) InVars {__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~size=|v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~size_1|} OutVars{__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~size=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~size_1, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~size=|v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~size_1|} AuxVars[] AssignedVars[__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~size] [2018-03-28 15:24:56,321 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:56,321 DEBUG L183 ransitionTransformer]: Formula: (not (= v_main_~i~1_14 (select v_main_~b~0_4 v_main_~i~1_14))) InVars {main_~b~0=v_main_~b~0_4, main_~i~1=v_main_~i~1_14} OutVars{main_~b~0=v_main_~b~0_4, main_~i~1=v_main_~i~1_14} AuxVars[] AssignedVars[] [2018-03-28 15:24:56,321 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:56,321 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:56,321 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: (not (= v_main_~i~1_14 (select v_main_~b~0_4 v_main_~i~1_14))) InVars {main_~b~0=v_main_~b~0_4, main_~i~1=v_main_~i~1_14} OutVars{main_~b~0=v_main_~b~0_4, main_~i~1=v_main_~i~1_14} AuxVars[] AssignedVars[] [2018-03-28 15:24:56,321 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:56,322 DEBUG L183 ransitionTransformer]: Formula: (= v_main_~i~1_15 (select v_main_~b~0_5 v_main_~i~1_15)) InVars {main_~b~0=v_main_~b~0_5, main_~i~1=v_main_~i~1_15} OutVars{main_~b~0=v_main_~b~0_5, main_~i~1=v_main_~i~1_15} AuxVars[] AssignedVars[] [2018-03-28 15:24:56,322 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:56,322 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:56,322 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: (= v_main_~i~1_15 (select v_main_~b~0_5 v_main_~i~1_15)) InVars {main_~b~0=v_main_~b~0_5, main_~i~1=v_main_~i~1_15} OutVars{main_~b~0=v_main_~b~0_5, main_~i~1=v_main_~i~1_15} AuxVars[] AssignedVars[] [2018-03-28 15:24:56,322 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:56,323 DEBUG L183 ransitionTransformer]: Formula: true InVars {} OutVars{main_~#mask~0.base=|v_main_~#mask~0.base_6|, main_~#mask~0.offset=|v_main_~#mask~0.offset_6|} AuxVars[] AssignedVars[main_~#mask~0.base, main_~#mask~0.offset] [2018-03-28 15:24:56,323 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:56,323 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:56,323 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: true InVars {} OutVars{main_~#mask~0.base=|v_main_~#mask~0.base_6|, main_~#mask~0.offset=|v_main_~#mask~0.offset_6|} AuxVars[] AssignedVars[main_~#mask~0.base, main_~#mask~0.offset] [2018-03-28 15:24:56,323 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:56,324 DEBUG L183 ransitionTransformer]: Formula: true InVars {} OutVars{main_#t~ret3=|v_main_#t~ret3_4|} AuxVars[] AssignedVars[main_#t~ret3] [2018-03-28 15:24:56,324 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:56,324 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:56,324 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: true InVars {} OutVars{main_#t~ret3=|v_main_#t~ret3_4|} AuxVars[] AssignedVars[main_#t~ret3] [2018-03-28 15:24:56,324 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:56,324 DEBUG L183 ransitionTransformer]: Formula: true InVars {} OutVars{__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~a~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~a~0_1} AuxVars[] AssignedVars[__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~a~0] [2018-03-28 15:24:56,324 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:56,324 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:56,325 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: true InVars {} OutVars{__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~a~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~a~0_1} AuxVars[] AssignedVars[__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~a~0] [2018-03-28 15:24:56,325 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:56,325 DEBUG L183 ransitionTransformer]: Formula: (= |v_main_#res_1| 1) InVars {} OutVars{main_#res=|v_main_#res_1|} AuxVars[] AssignedVars[main_#res] [2018-03-28 15:24:56,325 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:56,325 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:56,325 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: (= |v_main_#res_1| 1) InVars {} OutVars{main_#res=|v_main_#res_1|} AuxVars[] AssignedVars[main_#res] [2018-03-28 15:24:56,326 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:56,326 DEBUG L183 ransitionTransformer]: Formula: (= |v_main_#t~post4_1| v_main_~i~1_16) InVars {main_~i~1=v_main_~i~1_16} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_16} AuxVars[] AssignedVars[main_#t~post4] [2018-03-28 15:24:56,326 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:56,326 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:56,326 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: (= |v_main_#t~post4_1| v_main_~i~1_16) InVars {main_~i~1=v_main_~i~1_16} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_16} AuxVars[] AssignedVars[main_#t~post4] [2018-03-28 15:24:56,326 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:56,327 DEBUG L183 ransitionTransformer]: Formula: (= |v_#valid_13| |old(#valid)|) InVars {#valid=|v_#valid_13|, old(#valid)=|old(#valid)|} OutVars{#valid=|v_#valid_13|, old(#valid)=|old(#valid)|} AuxVars[] AssignedVars[] [2018-03-28 15:24:56,327 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:56,327 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:56,327 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: (= |v_#valid_13| |old(#valid)|) InVars {#valid=|v_#valid_13|, old(#valid)=|old(#valid)|} OutVars{#valid=|v_#valid_13|, old(#valid)=|old(#valid)|} AuxVars[] AssignedVars[] [2018-03-28 15:24:56,327 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:56,327 DEBUG L183 ransitionTransformer]: Formula: (not (= |v_#valid_14| |old(#valid)|)) InVars {#valid=|v_#valid_14|, old(#valid)=|old(#valid)|} OutVars{#valid=|v_#valid_14|, old(#valid)=|old(#valid)|} AuxVars[] AssignedVars[] [2018-03-28 15:24:56,328 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:56,328 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:56,328 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: (not (= |v_#valid_14| |old(#valid)|)) InVars {#valid=|v_#valid_14|, old(#valid)=|old(#valid)|} OutVars{#valid=|v_#valid_14|, old(#valid)=|old(#valid)|} AuxVars[] AssignedVars[] [2018-03-28 15:24:56,328 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:56,328 DEBUG L183 ransitionTransformer]: Formula: (= |v_main_#t~post2_1| v_main_~i~1_8) InVars {main_~i~1=v_main_~i~1_8} OutVars{main_~i~1=v_main_~i~1_8, main_#t~post2=|v_main_#t~post2_1|} AuxVars[] AssignedVars[main_#t~post2] [2018-03-28 15:24:56,328 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:56,328 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:56,329 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: (= |v_main_#t~post2_1| v_main_~i~1_8) InVars {main_~i~1=v_main_~i~1_8} OutVars{main_~i~1=v_main_~i~1_8, main_#t~post2=|v_main_#t~post2_1|} AuxVars[] AssignedVars[main_#t~post2] [2018-03-28 15:24:56,329 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:56,329 DEBUG L183 ransitionTransformer]: Formula: true InVars {} OutVars{__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_1} AuxVars[] AssignedVars[__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0] [2018-03-28 15:24:56,329 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:56,329 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:56,329 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: true InVars {} OutVars{__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_1} AuxVars[] AssignedVars[__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0] [2018-03-28 15:24:56,330 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:56,330 DEBUG L183 ransitionTransformer]: Formula: (= |v_#valid_9| (store |v_#valid_10| |v_main_~#mask~0.base_3| 0)) InVars {main_~#mask~0.base=|v_main_~#mask~0.base_3|, #valid=|v_#valid_10|} OutVars{main_~#mask~0.base=|v_main_~#mask~0.base_3|, #valid=|v_#valid_9|} AuxVars[] AssignedVars[#valid] [2018-03-28 15:24:56,330 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:56,330 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:56,330 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: (= |v_#valid_9| (store |v_#valid_10| |v_main_~#mask~0.base_3| 0)) InVars {main_~#mask~0.base=|v_main_~#mask~0.base_3|, #valid=|v_#valid_10|} OutVars{main_~#mask~0.base=|v_main_~#mask~0.base_3|, #valid=|v_#valid_9|} AuxVars[] AssignedVars[#valid] [2018-03-28 15:24:56,330 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:56,331 DEBUG L183 ransitionTransformer]: Formula: (= v_main_~i~1_17 (+ |v_main_#t~post4_2| 1)) InVars {main_#t~post4=|v_main_#t~post4_2|} OutVars{main_#t~post4=|v_main_#t~post4_2|, main_~i~1=v_main_~i~1_17} AuxVars[] AssignedVars[main_~i~1] [2018-03-28 15:24:56,331 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:56,331 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:56,331 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: (= v_main_~i~1_17 (+ |v_main_#t~post4_2| 1)) InVars {main_#t~post4=|v_main_#t~post4_2|} OutVars{main_#t~post4=|v_main_#t~post4_2|, main_~i~1=v_main_~i~1_17} AuxVars[] AssignedVars[main_~i~1] [2018-03-28 15:24:56,331 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:56,331 DEBUG L183 ransitionTransformer]: Formula: (= v_main_~i~1_9 (+ |v_main_#t~post2_2| 1)) InVars {main_#t~post2=|v_main_#t~post2_2|} OutVars{main_~i~1=v_main_~i~1_9, main_#t~post2=|v_main_#t~post2_2|} AuxVars[] AssignedVars[main_~i~1] [2018-03-28 15:24:56,331 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:56,332 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:56,332 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: (= v_main_~i~1_9 (+ |v_main_#t~post2_2| 1)) InVars {main_#t~post2=|v_main_#t~post2_2|} OutVars{main_~i~1=v_main_~i~1_9, main_#t~post2=|v_main_#t~post2_2|} AuxVars[] AssignedVars[main_~i~1] [2018-03-28 15:24:56,332 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:56,332 DEBUG L183 ransitionTransformer]: Formula: (= v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_2 0) InVars {} OutVars{__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_2} AuxVars[] AssignedVars[__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0] [2018-03-28 15:24:56,332 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:56,332 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:56,333 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: (= v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_2 0) InVars {} OutVars{__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_2} AuxVars[] AssignedVars[__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0] [2018-03-28 15:24:56,333 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:56,333 DEBUG L183 ransitionTransformer]: Formula: true InVars {} OutVars{main_~#mask~0.base=|v_main_~#mask~0.base_4|, main_~#mask~0.offset=|v_main_~#mask~0.offset_4|} AuxVars[] AssignedVars[main_~#mask~0.base, main_~#mask~0.offset] [2018-03-28 15:24:56,333 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:56,333 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:56,333 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: true InVars {} OutVars{main_~#mask~0.base=|v_main_~#mask~0.base_4|, main_~#mask~0.offset=|v_main_~#mask~0.offset_4|} AuxVars[] AssignedVars[main_~#mask~0.base, main_~#mask~0.offset] [2018-03-28 15:24:56,333 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:56,334 DEBUG L183 ransitionTransformer]: Formula: true InVars {} OutVars{main_#t~post4=|v_main_#t~post4_3|} AuxVars[] AssignedVars[main_#t~post4] [2018-03-28 15:24:56,334 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:56,334 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:56,334 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: true InVars {} OutVars{main_#t~post4=|v_main_#t~post4_3|} AuxVars[] AssignedVars[main_#t~post4] [2018-03-28 15:24:56,334 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:56,334 DEBUG L183 ransitionTransformer]: Formula: true InVars {} OutVars{main_#t~post2=|v_main_#t~post2_3|} AuxVars[] AssignedVars[main_#t~post2] [2018-03-28 15:24:56,334 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:56,335 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:56,335 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: true InVars {} OutVars{main_#t~post2=|v_main_#t~post2_3|} AuxVars[] AssignedVars[main_#t~post2] [2018-03-28 15:24:56,335 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:56,335 DEBUG L183 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-03-28 15:24:56,335 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:56,335 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:56,335 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-03-28 15:24:56,336 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:56,336 DEBUG L183 ransitionTransformer]: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-03-28 15:24:56,336 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:56,336 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:56,336 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-03-28 15:24:56,336 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:56,336 DEBUG L183 ransitionTransformer]: Formula: (not (<= v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_3 v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~size_2)) InVars {__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~size=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~size_2, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_3} OutVars{__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~size=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~size_2, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_3} AuxVars[] AssignedVars[] [2018-03-28 15:24:56,337 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:56,337 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:56,337 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: (not (<= v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_3 v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~size_2)) InVars {__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~size=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~size_2, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_3} OutVars{__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~size=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~size_2, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_3} AuxVars[] AssignedVars[] [2018-03-28 15:24:56,337 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:56,337 DEBUG L183 ransitionTransformer]: Formula: (<= v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_4 v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~size_3) InVars {__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~size=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~size_3, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_4} OutVars{__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~size=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~size_3, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_4} AuxVars[] AssignedVars[] [2018-03-28 15:24:56,337 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:56,337 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:56,338 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: (<= v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_4 v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~size_3) InVars {__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~size=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~size_3, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_4} OutVars{__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~size=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~size_3, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_4} AuxVars[] AssignedVars[] [2018-03-28 15:24:56,338 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:56,338 DEBUG L183 ransitionTransformer]: Formula: (= |v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#res_1| v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_11) InVars {__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_11} OutVars{__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#res=|v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#res_1|, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_11} AuxVars[] AssignedVars[__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#res] [2018-03-28 15:24:56,338 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:56,338 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:56,338 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: (= |v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#res_1| v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_11) InVars {__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_11} OutVars{__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#res=|v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#res_1|, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_11} AuxVars[] AssignedVars[__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#res] [2018-03-28 15:24:56,339 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:56,339 DEBUG L183 ransitionTransformer]: Formula: (or (not (<= 0 v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_5)) (not (< v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_5 32))) InVars {__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_5} OutVars{__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_5} AuxVars[] AssignedVars[] [2018-03-28 15:24:56,339 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:56,339 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:56,339 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: (or (not (<= 0 v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_5)) (not (< v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_5 32))) InVars {__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_5} OutVars{__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_5} AuxVars[] AssignedVars[] [2018-03-28 15:24:56,339 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:56,340 DEBUG L183 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-03-28 15:24:56,340 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:56,340 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:56,340 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-03-28 15:24:56,340 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:56,340 DEBUG L183 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-03-28 15:24:56,340 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:56,340 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:56,341 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-03-28 15:24:56,343 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:56,344 DEBUG L183 ransitionTransformer]: Formula: (let ((.cse0 (+ v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_6 v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.offset_2))) (and (<= 0 .cse0) (= |v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~mem1_1| (select (select |v_#memory_int_part_locs_30_locs_30_1| v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base_2) .cse0)) (<= (+ v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_6 v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.offset_2 1) (select |v_#length_5| v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base_2)) (= 1 (select |v_#valid_15| v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base_2)))) InVars {#valid=|v_#valid_15|, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base_2, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.offset=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.offset_2, #length=|v_#length_5|, #memory_int_part_locs_30_locs_30=|v_#memory_int_part_locs_30_locs_30_1|, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_6} OutVars{#valid=|v_#valid_15|, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base_2, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.offset=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.offset_2, #length=|v_#length_5|, #memory_int_part_locs_30_locs_30=|v_#memory_int_part_locs_30_locs_30_1|, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~mem1=|v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~mem1_1|, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_6} AuxVars[] AssignedVars[__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~mem1] [2018-03-28 15:24:56,344 DEBUG L190 ransitionTransformer]: formula has changed [2018-03-28 15:24:56,344 DEBUG L191 ransitionTransformer]: old formula: [2018-03-28 15:24:56,344 DEBUG L192 ransitionTransformer]: (let ((.cse0 (+ v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_6 v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.offset_2))) (and (<= 0 .cse0) (= |v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~mem1_1| (select (select |v_#memory_int_1| v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base_2) .cse0)) (<= (+ v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_6 v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.offset_2 1) (select |v_#length_5| v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base_2)) (= 1 (select |v_#valid_15| v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base_2)))) [2018-03-28 15:24:56,344 DEBUG L193 ransitionTransformer]: new formula: [2018-03-28 15:24:56,344 DEBUG L194 ransitionTransformer]: (let ((.cse0 (+ v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_6 v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.offset_2))) (and (<= 0 .cse0) (= |v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~mem1_1| (select (select |v_#memory_int_part_locs_30_locs_30_1| v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base_2) .cse0)) (<= (+ v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_6 v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.offset_2 1) (select |v_#length_5| v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base_2)) (= 1 (select |v_#valid_15| v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base_2)))) [2018-03-28 15:24:56,345 DEBUG L198 ransitionTransformer]: invars have changed [2018-03-28 15:24:56,345 DEBUG L199 ransitionTransformer]: old invars: [2018-03-28 15:24:56,345 DEBUG L200 ransitionTransformer]: {#valid=|v_#valid_15|, #memory_int=|v_#memory_int_1|, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base_2, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.offset=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.offset_2, #length=|v_#length_5|, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_6} [2018-03-28 15:24:56,345 DEBUG L201 ransitionTransformer]: new invars: [2018-03-28 15:24:56,345 DEBUG L202 ransitionTransformer]: {#valid=|v_#valid_15|, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base_2, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.offset=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.offset_2, #length=|v_#length_5|, #memory_int_part_locs_30_locs_30=|v_#memory_int_part_locs_30_locs_30_1|, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_6} [2018-03-28 15:24:56,345 DEBUG L206 ransitionTransformer]: outvars have changed [2018-03-28 15:24:56,345 DEBUG L207 ransitionTransformer]: old outvars: [2018-03-28 15:24:56,345 DEBUG L208 ransitionTransformer]: {#valid=|v_#valid_15|, #memory_int=|v_#memory_int_1|, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base_2, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.offset=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.offset_2, #length=|v_#length_5|, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~mem1=|v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~mem1_1|, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_6} [2018-03-28 15:24:56,346 DEBUG L209 ransitionTransformer]: new outvars: [2018-03-28 15:24:56,346 DEBUG L210 ransitionTransformer]: {#valid=|v_#valid_15|, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base_2, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.offset=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.offset_2, #length=|v_#length_5|, #memory_int_part_locs_30_locs_30=|v_#memory_int_part_locs_30_locs_30_1|, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~mem1=|v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~mem1_1|, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_6} [2018-03-28 15:24:56,346 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:56,346 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: (let ((.cse0 (+ v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_6 v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.offset_2))) (and (<= 0 .cse0) (= |v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~mem1_1| (select (select |v_#memory_int_part_locs_30_locs_30_1| v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base_2) .cse0)) (<= (+ v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_6 v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.offset_2 1) (select |v_#length_5| v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base_2)) (= 1 (select |v_#valid_15| v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base_2)))) InVars {#valid=|v_#valid_15|, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base_2, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.offset=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.offset_2, #length=|v_#length_5|, #memory_int_part_locs_30_locs_30=|v_#memory_int_part_locs_30_locs_30_1|, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_6} OutVars{#valid=|v_#valid_15|, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base_2, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.offset=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.offset_2, #length=|v_#length_5|, #memory_int_part_locs_30_locs_30=|v_#memory_int_part_locs_30_locs_30_1|, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~mem1=|v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~mem1_1|, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_6} AuxVars[] AssignedVars[__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~mem1] [2018-03-28 15:24:56,346 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:56,347 DEBUG L183 ransitionTransformer]: Formula: (not (= (select |v_#valid_16| v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base_3) 1)) InVars {__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base_3, #valid=|v_#valid_16|} OutVars{__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base_3, #valid=|v_#valid_16|} AuxVars[] AssignedVars[] [2018-03-28 15:24:56,347 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:56,347 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:56,347 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: (not (= (select |v_#valid_16| v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base_3) 1)) InVars {__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base_3, #valid=|v_#valid_16|} OutVars{__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base_3, #valid=|v_#valid_16|} AuxVars[] AssignedVars[] [2018-03-28 15:24:56,347 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:56,347 DEBUG L183 ransitionTransformer]: Formula: (or (not (<= (+ v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.offset_3 v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_7 1) (select |v_#length_6| v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base_4))) (not (<= 0 (+ v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.offset_3 v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_7)))) InVars {__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.offset=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.offset_3, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base_4, #length=|v_#length_6|, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_7} OutVars{__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.offset=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.offset_3, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base_4, #length=|v_#length_6|, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_7} AuxVars[] AssignedVars[] [2018-03-28 15:24:56,348 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:56,348 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:56,348 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: (or (not (<= (+ v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.offset_3 v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_7 1) (select |v_#length_6| v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base_4))) (not (<= 0 (+ v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.offset_3 v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_7)))) InVars {__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.offset=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.offset_3, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base_4, #length=|v_#length_6|, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_7} OutVars{__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.offset=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.offset_3, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~b.base_4, #length=|v_#length_6|, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_7} AuxVars[] AssignedVars[] [2018-03-28 15:24:56,348 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:56,348 DEBUG L183 ransitionTransformer]: Formula: (= v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~a~0_2 (store v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~a~0_3 v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_8 |v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~mem1_2|)) InVars {__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~mem1=|v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~mem1_2|, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~a~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~a~0_3, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_8} OutVars{__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~mem1=|v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~mem1_2|, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~a~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~a~0_2, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_8} AuxVars[] AssignedVars[__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~a~0] [2018-03-28 15:24:56,348 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:56,349 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:56,349 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: (= v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~a~0_2 (store v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~a~0_3 v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_8 |v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~mem1_2|)) InVars {__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~mem1=|v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~mem1_2|, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~a~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~a~0_3, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_8} OutVars{__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~mem1=|v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~mem1_2|, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~a~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~a~0_2, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_8} AuxVars[] AssignedVars[__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~a~0] [2018-03-28 15:24:56,349 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:56,349 DEBUG L183 ransitionTransformer]: Formula: true InVars {} OutVars{__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~mem1=|v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~mem1_3|} AuxVars[] AssignedVars[__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~mem1] [2018-03-28 15:24:56,349 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:56,349 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:56,350 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: true InVars {} OutVars{__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~mem1=|v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~mem1_3|} AuxVars[] AssignedVars[__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~mem1] [2018-03-28 15:24:56,350 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:56,350 DEBUG L183 ransitionTransformer]: Formula: (= |v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~post0_1| v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_9) InVars {__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_9} OutVars{__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~post0=|v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~post0_1|, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_9} AuxVars[] AssignedVars[__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~post0] [2018-03-28 15:24:56,350 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:56,350 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:56,350 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: (= |v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~post0_1| v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_9) InVars {__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_9} OutVars{__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~post0=|v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~post0_1|, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_9} AuxVars[] AssignedVars[__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~post0] [2018-03-28 15:24:56,351 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:56,351 DEBUG L183 ransitionTransformer]: Formula: (= v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_10 (+ |v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~post0_2| 1)) InVars {__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~post0=|v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~post0_2|} OutVars{__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~post0=|v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~post0_2|, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_10} AuxVars[] AssignedVars[__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0] [2018-03-28 15:24:56,351 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:56,351 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:56,351 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: (= v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_10 (+ |v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~post0_2| 1)) InVars {__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~post0=|v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~post0_2|} OutVars{__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~post0=|v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~post0_2|, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0_10} AuxVars[] AssignedVars[__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_~i~0] [2018-03-28 15:24:56,352 DEBUG L182 ransitionTransformer]: transformed transition [2018-03-28 15:24:56,352 DEBUG L183 ransitionTransformer]: Formula: true InVars {} OutVars{__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~post0=|v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~post0_3|} AuxVars[] AssignedVars[__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~post0] [2018-03-28 15:24:56,352 DEBUG L186 ransitionTransformer]: transformula unchanged [2018-03-28 15:24:56,352 DEBUG L212 ransitionTransformer]: [2018-03-28 15:24:56,352 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: true InVars {} OutVars{__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~post0=|v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~post0_3|} AuxVars[] AssignedVars[__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#t~post0] [2018-03-28 15:24:56,352 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-03-28 15:24:56,352 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-03-28 15:24:56,353 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: (= |v_ULTIMATE.start_#t~ret5_2| |v_main_#resOutParam_1|) InVars {main_#res=|v_main_#resOutParam_1|} OutVars{ULTIMATE.start_#t~ret5=|v_ULTIMATE.start_#t~ret5_2|} AuxVars[] AssignedVars[ULTIMATE.start_#t~ret5] [2018-03-28 15:24:56,353 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-03-28 15:24:56,353 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: (= |v_main_#t~ret3_5| |v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#resOutParam_1|) InVars {__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#res=|v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#resOutParam_1|} OutVars{main_#t~ret3=|v_main_#t~ret3_5|} AuxVars[] AssignedVars[main_#t~ret3] [2018-03-28 15:24:56,353 DEBUG L87 nsformulaTransformer]: Performing identity transformation for Formula: (and (= |v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~b.baseInParam_1| |v_main_~#mask~0.base_7|) (= |v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~sizeInParam_1| v_main_~i~1_18) (= |v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~b.offsetInParam_1| |v_main_~#mask~0.offset_7|)) InVars {main_~i~1=v_main_~i~1_18, main_~#mask~0.base=|v_main_~#mask~0.base_7|, main_~#mask~0.offset=|v_main_~#mask~0.offset_7|} OutVars{__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~size=|v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~sizeInParam_1|, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~b.offset=|v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~b.offsetInParam_1|, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~b.base=|v___U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~b.baseInParam_1|} AuxVars[] AssignedVars[__U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~size, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~b.offset, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__foo_#in~b.base] [2018-03-28 15:24:56,355 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 28.03 03:24:56 BasicIcfg [2018-03-28 15:24:56,355 INFO L132 PluginConnector]: ------------------------ END IcfgTransformer---------------------------- [2018-03-28 15:24:56,356 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-03-28 15:24:56,356 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-03-28 15:24:56,359 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-03-28 15:24:56,360 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 28.03 03:24:52" (1/4) ... [2018-03-28 15:24:56,360 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@41aa8de4 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.03 03:24:56, skipping insertion in model container [2018-03-28 15:24:56,361 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.03 03:24:52" (2/4) ... [2018-03-28 15:24:56,361 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@41aa8de4 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.03 03:24:56, skipping insertion in model container [2018-03-28 15:24:56,361 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.03 03:24:52" (3/4) ... [2018-03-28 15:24:56,361 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@41aa8de4 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 28.03 03:24:56, skipping insertion in model container [2018-03-28 15:24:56,361 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 28.03 03:24:56" (4/4) ... [2018-03-28 15:24:56,363 INFO L107 eAbstractionObserver]: Analyzing ICFG HeapSeparatedIcfg [2018-03-28 15:24:56,372 INFO L131 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-03-28 15:24:56,380 INFO L143 ceAbstractionStarter]: Appying trace abstraction to program that has 6 error locations. [2018-03-28 15:24:56,425 INFO L128 ementStrategyFactory]: Using default assertion order modulation [2018-03-28 15:24:56,425 INFO L369 AbstractCegarLoop]: Interprodecural is true [2018-03-28 15:24:56,426 INFO L370 AbstractCegarLoop]: Hoare is true [2018-03-28 15:24:56,426 INFO L371 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-03-28 15:24:56,426 INFO L372 AbstractCegarLoop]: Backedges is TWOTRACK [2018-03-28 15:24:56,426 INFO L373 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-03-28 15:24:56,426 INFO L374 AbstractCegarLoop]: Difference is false [2018-03-28 15:24:56,426 INFO L375 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-03-28 15:24:56,426 INFO L380 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-03-28 15:24:56,427 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-03-28 15:24:56,441 INFO L276 IsEmpty]: Start isEmpty. Operand 61 states. [2018-03-28 15:24:56,448 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 10 [2018-03-28 15:24:56,448 INFO L347 BasicCegarLoop]: Found error trace [2018-03-28 15:24:56,449 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-28 15:24:56,449 INFO L408 AbstractCegarLoop]: === Iteration 1 === [mainErr1AssertViolationARRAY_INDEX, mainErr2EnsuresViolationMEMORY_LEAK, mainErr0AssertViolationARRAY_INDEX, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__fooErr2RequiresViolation, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__fooErr1RequiresViolation, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__fooErr0AssertViolationARRAY_INDEX]=== [2018-03-28 15:24:56,455 INFO L82 PathProgramCache]: Analyzing trace with hash -1068910584, now seen corresponding path program 1 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-03-28 15:24:56,473 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-03-28 15:24:56,499 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-28 15:24:56,507 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-03-28 15:24:56,550 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-28 15:24:56,550 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-03-28 15:24:56,563 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-28 15:24:56,601 INFO L320 seRefinementStrategy]: Constructing automaton from 2 perfect and 0 imperfect interpolant sequences. [2018-03-28 15:24:56,602 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3, 3] imperfect sequences [] total 3 [2018-03-28 15:24:56,604 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-03-28 15:24:56,616 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-03-28 15:24:56,616 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-03-28 15:24:56,619 INFO L87 Difference]: Start difference. First operand 61 states. Second operand 4 states. [2018-03-28 15:24:56,732 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-28 15:24:56,732 INFO L93 Difference]: Finished difference Result 136 states and 163 transitions. [2018-03-28 15:24:56,733 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-03-28 15:24:56,734 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 9 [2018-03-28 15:24:56,735 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-28 15:24:56,747 INFO L225 Difference]: With dead ends: 136 [2018-03-28 15:24:56,747 INFO L226 Difference]: Without dead ends: 80 [2018-03-28 15:24:56,751 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 13 SyntacticMatches, 1 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-03-28 15:24:56,771 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 80 states. [2018-03-28 15:24:56,796 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 80 to 64. [2018-03-28 15:24:56,797 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 64 states. [2018-03-28 15:24:56,799 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 64 states to 64 states and 69 transitions. [2018-03-28 15:24:56,801 INFO L78 Accepts]: Start accepts. Automaton has 64 states and 69 transitions. Word has length 9 [2018-03-28 15:24:56,801 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-28 15:24:56,802 INFO L459 AbstractCegarLoop]: Abstraction has 64 states and 69 transitions. [2018-03-28 15:24:56,802 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-03-28 15:24:56,802 INFO L276 IsEmpty]: Start isEmpty. Operand 64 states and 69 transitions. [2018-03-28 15:24:56,803 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2018-03-28 15:24:56,803 INFO L347 BasicCegarLoop]: Found error trace [2018-03-28 15:24:56,803 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-28 15:24:56,803 INFO L408 AbstractCegarLoop]: === Iteration 2 === [mainErr1AssertViolationARRAY_INDEX, mainErr2EnsuresViolationMEMORY_LEAK, mainErr0AssertViolationARRAY_INDEX, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__fooErr2RequiresViolation, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__fooErr1RequiresViolation, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__fooErr0AssertViolationARRAY_INDEX]=== [2018-03-28 15:24:56,804 INFO L82 PathProgramCache]: Analyzing trace with hash -1115648547, now seen corresponding path program 1 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 3 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-03-28 15:24:56,817 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-03-28 15:24:56,830 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-28 15:24:56,832 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-03-28 15:24:56,841 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-28 15:24:56,841 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-03-28 15:24:56,889 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-28 15:24:56,914 INFO L320 seRefinementStrategy]: Constructing automaton from 2 perfect and 0 imperfect interpolant sequences. [2018-03-28 15:24:56,914 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [2, 2] imperfect sequences [] total 3 [2018-03-28 15:24:56,916 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-03-28 15:24:56,916 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-03-28 15:24:56,916 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-03-28 15:24:56,917 INFO L87 Difference]: Start difference. First operand 64 states and 69 transitions. Second operand 4 states. [2018-03-28 15:24:56,974 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-28 15:24:56,974 INFO L93 Difference]: Finished difference Result 78 states and 84 transitions. [2018-03-28 15:24:56,975 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-03-28 15:24:56,975 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 18 [2018-03-28 15:24:56,975 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-28 15:24:56,979 INFO L225 Difference]: With dead ends: 78 [2018-03-28 15:24:56,979 INFO L226 Difference]: Without dead ends: 77 [2018-03-28 15:24:56,980 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 34 GetRequests, 32 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-03-28 15:24:56,980 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 77 states. [2018-03-28 15:24:56,987 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 77 to 67. [2018-03-28 15:24:56,987 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 67 states. [2018-03-28 15:24:56,989 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 67 states to 67 states and 73 transitions. [2018-03-28 15:24:56,989 INFO L78 Accepts]: Start accepts. Automaton has 67 states and 73 transitions. Word has length 18 [2018-03-28 15:24:56,989 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-28 15:24:56,989 INFO L459 AbstractCegarLoop]: Abstraction has 67 states and 73 transitions. [2018-03-28 15:24:56,989 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-03-28 15:24:56,989 INFO L276 IsEmpty]: Start isEmpty. Operand 67 states and 73 transitions. [2018-03-28 15:24:56,990 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2018-03-28 15:24:56,990 INFO L347 BasicCegarLoop]: Found error trace [2018-03-28 15:24:56,990 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-28 15:24:56,991 INFO L408 AbstractCegarLoop]: === Iteration 3 === [mainErr1AssertViolationARRAY_INDEX, mainErr2EnsuresViolationMEMORY_LEAK, mainErr0AssertViolationARRAY_INDEX, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__fooErr2RequiresViolation, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__fooErr1RequiresViolation, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__fooErr0AssertViolationARRAY_INDEX]=== [2018-03-28 15:24:56,991 INFO L82 PathProgramCache]: Analyzing trace with hash -225366126, now seen corresponding path program 1 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-03-28 15:24:57,001 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-03-28 15:24:57,014 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-28 15:24:57,016 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-03-28 15:24:57,043 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-03-28 15:24:57,044 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-03-28 15:24:57,046 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-28 15:24:57,046 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-03-28 15:24:57,078 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-28 15:24:57,078 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-03-28 15:24:57,082 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-28 15:24:57,119 INFO L320 seRefinementStrategy]: Constructing automaton from 2 perfect and 0 imperfect interpolant sequences. [2018-03-28 15:24:57,119 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4, 4] imperfect sequences [] total 4 [2018-03-28 15:24:57,119 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-03-28 15:24:57,120 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-03-28 15:24:57,120 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-03-28 15:24:57,120 INFO L87 Difference]: Start difference. First operand 67 states and 73 transitions. Second operand 5 states. [2018-03-28 15:24:57,265 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-28 15:24:57,266 INFO L93 Difference]: Finished difference Result 67 states and 73 transitions. [2018-03-28 15:24:57,266 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-03-28 15:24:57,266 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 19 [2018-03-28 15:24:57,266 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-28 15:24:57,267 INFO L225 Difference]: With dead ends: 67 [2018-03-28 15:24:57,267 INFO L226 Difference]: Without dead ends: 66 [2018-03-28 15:24:57,268 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 37 GetRequests, 33 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-03-28 15:24:57,268 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 66 states. [2018-03-28 15:24:57,273 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 66 to 66. [2018-03-28 15:24:57,273 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 66 states. [2018-03-28 15:24:57,275 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 66 states to 66 states and 72 transitions. [2018-03-28 15:24:57,275 INFO L78 Accepts]: Start accepts. Automaton has 66 states and 72 transitions. Word has length 19 [2018-03-28 15:24:57,275 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-28 15:24:57,275 INFO L459 AbstractCegarLoop]: Abstraction has 66 states and 72 transitions. [2018-03-28 15:24:57,276 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-03-28 15:24:57,276 INFO L276 IsEmpty]: Start isEmpty. Operand 66 states and 72 transitions. [2018-03-28 15:24:57,276 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2018-03-28 15:24:57,276 INFO L347 BasicCegarLoop]: Found error trace [2018-03-28 15:24:57,277 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-28 15:24:57,277 INFO L408 AbstractCegarLoop]: === Iteration 4 === [mainErr1AssertViolationARRAY_INDEX, mainErr2EnsuresViolationMEMORY_LEAK, mainErr0AssertViolationARRAY_INDEX, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__fooErr2RequiresViolation, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__fooErr1RequiresViolation, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__fooErr0AssertViolationARRAY_INDEX]=== [2018-03-28 15:24:57,277 INFO L82 PathProgramCache]: Analyzing trace with hash -225366124, now seen corresponding path program 1 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 5 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-03-28 15:24:57,304 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-03-28 15:24:57,318 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-28 15:24:57,321 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-03-28 15:24:57,330 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-03-28 15:24:57,330 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-03-28 15:24:57,335 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-28 15:24:57,335 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-03-28 15:24:57,427 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-28 15:24:57,427 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-03-28 15:24:57,536 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-28 15:24:57,558 INFO L320 seRefinementStrategy]: Constructing automaton from 2 perfect and 0 imperfect interpolant sequences. [2018-03-28 15:24:57,558 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5, 5] imperfect sequences [] total 9 [2018-03-28 15:24:57,558 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-03-28 15:24:57,559 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-03-28 15:24:57,559 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=67, Unknown=0, NotChecked=0, Total=90 [2018-03-28 15:24:57,559 INFO L87 Difference]: Start difference. First operand 66 states and 72 transitions. Second operand 10 states. [2018-03-28 15:24:57,739 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-28 15:24:57,739 INFO L93 Difference]: Finished difference Result 75 states and 81 transitions. [2018-03-28 15:24:57,740 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-03-28 15:24:57,740 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 19 [2018-03-28 15:24:57,740 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-28 15:24:57,741 INFO L225 Difference]: With dead ends: 75 [2018-03-28 15:24:57,741 INFO L226 Difference]: Without dead ends: 74 [2018-03-28 15:24:57,742 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 39 GetRequests, 28 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=47, Invalid=109, Unknown=0, NotChecked=0, Total=156 [2018-03-28 15:24:57,742 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 74 states. [2018-03-28 15:24:57,747 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 74 to 67. [2018-03-28 15:24:57,748 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 67 states. [2018-03-28 15:24:57,749 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 67 states to 67 states and 73 transitions. [2018-03-28 15:24:57,749 INFO L78 Accepts]: Start accepts. Automaton has 67 states and 73 transitions. Word has length 19 [2018-03-28 15:24:57,749 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-28 15:24:57,749 INFO L459 AbstractCegarLoop]: Abstraction has 67 states and 73 transitions. [2018-03-28 15:24:57,749 INFO L460 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-03-28 15:24:57,749 INFO L276 IsEmpty]: Start isEmpty. Operand 67 states and 73 transitions. [2018-03-28 15:24:57,750 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2018-03-28 15:24:57,750 INFO L347 BasicCegarLoop]: Found error trace [2018-03-28 15:24:57,750 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-28 15:24:57,750 INFO L408 AbstractCegarLoop]: === Iteration 5 === [mainErr1AssertViolationARRAY_INDEX, mainErr2EnsuresViolationMEMORY_LEAK, mainErr0AssertViolationARRAY_INDEX, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__fooErr2RequiresViolation, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__fooErr1RequiresViolation, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__fooErr0AssertViolationARRAY_INDEX]=== [2018-03-28 15:24:57,751 INFO L82 PathProgramCache]: Analyzing trace with hash -1537306562, now seen corresponding path program 1 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-03-28 15:24:57,759 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-03-28 15:24:57,766 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-28 15:24:57,768 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-03-28 15:24:57,905 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-28 15:24:57,905 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-03-28 15:24:57,938 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-28 15:24:57,961 INFO L320 seRefinementStrategy]: Constructing automaton from 2 perfect and 0 imperfect interpolant sequences. [2018-03-28 15:24:57,961 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5, 5] imperfect sequences [] total 8 [2018-03-28 15:24:57,961 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-03-28 15:24:57,961 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-03-28 15:24:57,961 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=47, Unknown=0, NotChecked=0, Total=72 [2018-03-28 15:24:57,962 INFO L87 Difference]: Start difference. First operand 67 states and 73 transitions. Second operand 9 states. [2018-03-28 15:24:58,092 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-28 15:24:58,092 INFO L93 Difference]: Finished difference Result 83 states and 90 transitions. [2018-03-28 15:24:58,093 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-03-28 15:24:58,093 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 19 [2018-03-28 15:24:58,093 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-28 15:24:58,094 INFO L225 Difference]: With dead ends: 83 [2018-03-28 15:24:58,094 INFO L226 Difference]: Without dead ends: 82 [2018-03-28 15:24:58,095 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 39 GetRequests, 28 SyntacticMatches, 1 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=50, Invalid=82, Unknown=0, NotChecked=0, Total=132 [2018-03-28 15:24:58,095 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 82 states. [2018-03-28 15:24:58,100 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 82 to 65. [2018-03-28 15:24:58,101 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 65 states. [2018-03-28 15:24:58,101 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 65 states to 65 states and 71 transitions. [2018-03-28 15:24:58,102 INFO L78 Accepts]: Start accepts. Automaton has 65 states and 71 transitions. Word has length 19 [2018-03-28 15:24:58,102 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-28 15:24:58,102 INFO L459 AbstractCegarLoop]: Abstraction has 65 states and 71 transitions. [2018-03-28 15:24:58,102 INFO L460 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-03-28 15:24:58,102 INFO L276 IsEmpty]: Start isEmpty. Operand 65 states and 71 transitions. [2018-03-28 15:24:58,103 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-03-28 15:24:58,103 INFO L347 BasicCegarLoop]: Found error trace [2018-03-28 15:24:58,103 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-28 15:24:58,103 INFO L408 AbstractCegarLoop]: === Iteration 6 === [mainErr1AssertViolationARRAY_INDEX, mainErr2EnsuresViolationMEMORY_LEAK, mainErr0AssertViolationARRAY_INDEX, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__fooErr2RequiresViolation, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__fooErr1RequiresViolation, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__fooErr0AssertViolationARRAY_INDEX]=== [2018-03-28 15:24:58,104 INFO L82 PathProgramCache]: Analyzing trace with hash 184823418, now seen corresponding path program 1 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 7 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-03-28 15:24:58,111 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-03-28 15:24:58,122 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-28 15:24:58,124 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-03-28 15:24:58,159 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-28 15:24:58,159 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-03-28 15:24:58,192 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-28 15:24:58,214 INFO L320 seRefinementStrategy]: Constructing automaton from 2 perfect and 0 imperfect interpolant sequences. [2018-03-28 15:24:58,214 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [8, 8] imperfect sequences [] total 11 [2018-03-28 15:24:58,215 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-03-28 15:24:58,215 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-03-28 15:24:58,215 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=28, Invalid=82, Unknown=0, NotChecked=0, Total=110 [2018-03-28 15:24:58,215 INFO L87 Difference]: Start difference. First operand 65 states and 71 transitions. Second operand 11 states. [2018-03-28 15:24:58,406 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-28 15:24:58,406 INFO L93 Difference]: Finished difference Result 155 states and 170 transitions. [2018-03-28 15:24:58,407 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-03-28 15:24:58,407 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 27 [2018-03-28 15:24:58,407 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-28 15:24:58,408 INFO L225 Difference]: With dead ends: 155 [2018-03-28 15:24:58,408 INFO L226 Difference]: Without dead ends: 102 [2018-03-28 15:24:58,408 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 58 GetRequests, 40 SyntacticMatches, 3 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 19 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=84, Invalid=188, Unknown=0, NotChecked=0, Total=272 [2018-03-28 15:24:58,409 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 102 states. [2018-03-28 15:24:58,416 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 102 to 86. [2018-03-28 15:24:58,416 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 86 states. [2018-03-28 15:24:58,417 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 86 states to 86 states and 94 transitions. [2018-03-28 15:24:58,418 INFO L78 Accepts]: Start accepts. Automaton has 86 states and 94 transitions. Word has length 27 [2018-03-28 15:24:58,418 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-28 15:24:58,418 INFO L459 AbstractCegarLoop]: Abstraction has 86 states and 94 transitions. [2018-03-28 15:24:58,418 INFO L460 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-03-28 15:24:58,418 INFO L276 IsEmpty]: Start isEmpty. Operand 86 states and 94 transitions. [2018-03-28 15:24:58,420 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-03-28 15:24:58,420 INFO L347 BasicCegarLoop]: Found error trace [2018-03-28 15:24:58,420 INFO L355 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-28 15:24:58,420 INFO L408 AbstractCegarLoop]: === Iteration 7 === [mainErr1AssertViolationARRAY_INDEX, mainErr2EnsuresViolationMEMORY_LEAK, mainErr0AssertViolationARRAY_INDEX, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__fooErr2RequiresViolation, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__fooErr1RequiresViolation, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__fooErr0AssertViolationARRAY_INDEX]=== [2018-03-28 15:24:58,420 INFO L82 PathProgramCache]: Analyzing trace with hash 2147178894, now seen corresponding path program 1 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-03-28 15:24:58,433 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-03-28 15:24:58,441 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-28 15:24:58,442 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-03-28 15:24:58,461 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-28 15:24:58,462 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-03-28 15:24:58,480 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-28 15:24:58,501 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-03-28 15:24:58,501 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 8 [2018-03-28 15:24:58,502 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-03-28 15:24:58,502 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-03-28 15:24:58,502 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=36, Unknown=0, NotChecked=0, Total=56 [2018-03-28 15:24:58,502 INFO L87 Difference]: Start difference. First operand 86 states and 94 transitions. Second operand 8 states. [2018-03-28 15:24:58,582 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-28 15:24:58,582 INFO L93 Difference]: Finished difference Result 134 states and 146 transitions. [2018-03-28 15:24:58,583 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-03-28 15:24:58,583 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 27 [2018-03-28 15:24:58,583 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-28 15:24:58,584 INFO L225 Difference]: With dead ends: 134 [2018-03-28 15:24:58,584 INFO L226 Difference]: Without dead ends: 114 [2018-03-28 15:24:58,584 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 56 GetRequests, 46 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=51, Invalid=81, Unknown=0, NotChecked=0, Total=132 [2018-03-28 15:24:58,584 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 114 states. [2018-03-28 15:24:58,591 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 114 to 104. [2018-03-28 15:24:58,592 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 104 states. [2018-03-28 15:24:58,593 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 104 states to 104 states and 114 transitions. [2018-03-28 15:24:58,593 INFO L78 Accepts]: Start accepts. Automaton has 104 states and 114 transitions. Word has length 27 [2018-03-28 15:24:58,593 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-28 15:24:58,594 INFO L459 AbstractCegarLoop]: Abstraction has 104 states and 114 transitions. [2018-03-28 15:24:58,594 INFO L460 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-03-28 15:24:58,594 INFO L276 IsEmpty]: Start isEmpty. Operand 104 states and 114 transitions. [2018-03-28 15:24:58,596 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2018-03-28 15:24:58,597 INFO L347 BasicCegarLoop]: Found error trace [2018-03-28 15:24:58,597 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-28 15:24:58,597 INFO L408 AbstractCegarLoop]: === Iteration 8 === [mainErr1AssertViolationARRAY_INDEX, mainErr2EnsuresViolationMEMORY_LEAK, mainErr0AssertViolationARRAY_INDEX, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__fooErr2RequiresViolation, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__fooErr1RequiresViolation, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__fooErr0AssertViolationARRAY_INDEX]=== [2018-03-28 15:24:58,597 INFO L82 PathProgramCache]: Analyzing trace with hash -1232886480, now seen corresponding path program 1 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 9 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-03-28 15:24:58,604 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-03-28 15:24:58,614 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-28 15:24:58,615 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-03-28 15:24:58,626 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-03-28 15:24:58,626 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-03-28 15:24:58,650 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-03-28 15:24:58,671 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-03-28 15:24:58,671 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4] total 7 [2018-03-28 15:24:58,671 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-03-28 15:24:58,671 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-03-28 15:24:58,672 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=38, Unknown=0, NotChecked=0, Total=56 [2018-03-28 15:24:58,672 INFO L87 Difference]: Start difference. First operand 104 states and 114 transitions. Second operand 8 states. [2018-03-28 15:24:58,764 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-28 15:24:58,765 INFO L93 Difference]: Finished difference Result 141 states and 157 transitions. [2018-03-28 15:24:58,765 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-03-28 15:24:58,765 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 37 [2018-03-28 15:24:58,766 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-28 15:24:58,767 INFO L225 Difference]: With dead ends: 141 [2018-03-28 15:24:58,767 INFO L226 Difference]: Without dead ends: 140 [2018-03-28 15:24:58,768 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 76 GetRequests, 66 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=46, Invalid=86, Unknown=0, NotChecked=0, Total=132 [2018-03-28 15:24:58,768 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 140 states. [2018-03-28 15:24:58,776 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 140 to 121. [2018-03-28 15:24:58,776 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 121 states. [2018-03-28 15:24:58,777 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 121 states to 121 states and 134 transitions. [2018-03-28 15:24:58,778 INFO L78 Accepts]: Start accepts. Automaton has 121 states and 134 transitions. Word has length 37 [2018-03-28 15:24:58,778 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-28 15:24:58,778 INFO L459 AbstractCegarLoop]: Abstraction has 121 states and 134 transitions. [2018-03-28 15:24:58,778 INFO L460 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-03-28 15:24:58,778 INFO L276 IsEmpty]: Start isEmpty. Operand 121 states and 134 transitions. [2018-03-28 15:24:58,779 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-03-28 15:24:58,780 INFO L347 BasicCegarLoop]: Found error trace [2018-03-28 15:24:58,780 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-28 15:24:58,780 INFO L408 AbstractCegarLoop]: === Iteration 9 === [mainErr1AssertViolationARRAY_INDEX, mainErr2EnsuresViolationMEMORY_LEAK, mainErr0AssertViolationARRAY_INDEX, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__fooErr2RequiresViolation, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__fooErr1RequiresViolation, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__fooErr0AssertViolationARRAY_INDEX]=== [2018-03-28 15:24:58,780 INFO L82 PathProgramCache]: Analyzing trace with hash 435225249, now seen corresponding path program 1 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-03-28 15:24:58,786 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-03-28 15:24:58,796 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-28 15:24:58,798 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-03-28 15:24:58,801 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-03-28 15:24:58,801 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-03-28 15:24:58,804 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-28 15:24:58,805 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-03-28 15:24:58,850 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-03-28 15:24:58,850 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-03-28 15:24:58,917 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-03-28 15:24:58,938 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-03-28 15:24:58,938 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 13 [2018-03-28 15:24:58,939 INFO L442 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-03-28 15:24:58,939 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-03-28 15:24:58,939 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=39, Invalid=143, Unknown=0, NotChecked=0, Total=182 [2018-03-28 15:24:58,939 INFO L87 Difference]: Start difference. First operand 121 states and 134 transitions. Second operand 14 states. [2018-03-28 15:24:59,160 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-28 15:24:59,160 INFO L93 Difference]: Finished difference Result 135 states and 151 transitions. [2018-03-28 15:24:59,160 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-03-28 15:24:59,160 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 38 [2018-03-28 15:24:59,161 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-28 15:24:59,161 INFO L225 Difference]: With dead ends: 135 [2018-03-28 15:24:59,162 INFO L226 Difference]: Without dead ends: 134 [2018-03-28 15:24:59,162 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 82 GetRequests, 62 SyntacticMatches, 0 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 53 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=130, Invalid=332, Unknown=0, NotChecked=0, Total=462 [2018-03-28 15:24:59,162 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 134 states. [2018-03-28 15:24:59,170 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 134 to 122. [2018-03-28 15:24:59,170 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 122 states. [2018-03-28 15:24:59,171 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 122 states to 122 states and 134 transitions. [2018-03-28 15:24:59,172 INFO L78 Accepts]: Start accepts. Automaton has 122 states and 134 transitions. Word has length 38 [2018-03-28 15:24:59,172 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-28 15:24:59,172 INFO L459 AbstractCegarLoop]: Abstraction has 122 states and 134 transitions. [2018-03-28 15:24:59,172 INFO L460 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-03-28 15:24:59,172 INFO L276 IsEmpty]: Start isEmpty. Operand 122 states and 134 transitions. [2018-03-28 15:24:59,174 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-03-28 15:24:59,174 INFO L347 BasicCegarLoop]: Found error trace [2018-03-28 15:24:59,174 INFO L355 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-28 15:24:59,175 INFO L408 AbstractCegarLoop]: === Iteration 10 === [mainErr1AssertViolationARRAY_INDEX, mainErr2EnsuresViolationMEMORY_LEAK, mainErr0AssertViolationARRAY_INDEX, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__fooErr2RequiresViolation, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__fooErr1RequiresViolation, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__fooErr0AssertViolationARRAY_INDEX]=== [2018-03-28 15:24:59,175 INFO L82 PathProgramCache]: Analyzing trace with hash 154524538, now seen corresponding path program 2 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 11 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-03-28 15:24:59,189 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-03-28 15:24:59,200 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-28 15:24:59,202 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-03-28 15:24:59,258 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-28 15:24:59,259 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-03-28 15:24:59,315 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-28 15:24:59,337 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-03-28 15:24:59,337 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9] total 16 [2018-03-28 15:24:59,338 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-03-28 15:24:59,338 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-03-28 15:24:59,338 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=72, Invalid=168, Unknown=0, NotChecked=0, Total=240 [2018-03-28 15:24:59,338 INFO L87 Difference]: Start difference. First operand 122 states and 134 transitions. Second operand 16 states. [2018-03-28 15:24:59,515 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-28 15:24:59,515 INFO L93 Difference]: Finished difference Result 192 states and 216 transitions. [2018-03-28 15:24:59,515 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-03-28 15:24:59,515 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 47 [2018-03-28 15:24:59,516 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-28 15:24:59,517 INFO L225 Difference]: With dead ends: 192 [2018-03-28 15:24:59,517 INFO L226 Difference]: Without dead ends: 172 [2018-03-28 15:24:59,518 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 104 GetRequests, 78 SyntacticMatches, 0 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 113 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=259, Invalid=497, Unknown=0, NotChecked=0, Total=756 [2018-03-28 15:24:59,518 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 172 states. [2018-03-28 15:24:59,526 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 172 to 162. [2018-03-28 15:24:59,526 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 162 states. [2018-03-28 15:24:59,527 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 162 states to 162 states and 182 transitions. [2018-03-28 15:24:59,527 INFO L78 Accepts]: Start accepts. Automaton has 162 states and 182 transitions. Word has length 47 [2018-03-28 15:24:59,527 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-28 15:24:59,527 INFO L459 AbstractCegarLoop]: Abstraction has 162 states and 182 transitions. [2018-03-28 15:24:59,527 INFO L460 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-03-28 15:24:59,527 INFO L276 IsEmpty]: Start isEmpty. Operand 162 states and 182 transitions. [2018-03-28 15:24:59,528 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2018-03-28 15:24:59,528 INFO L347 BasicCegarLoop]: Found error trace [2018-03-28 15:24:59,529 INFO L355 BasicCegarLoop]: trace histogram [4, 4, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-28 15:24:59,529 INFO L408 AbstractCegarLoop]: === Iteration 11 === [mainErr1AssertViolationARRAY_INDEX, mainErr2EnsuresViolationMEMORY_LEAK, mainErr0AssertViolationARRAY_INDEX, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__fooErr2RequiresViolation, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__fooErr1RequiresViolation, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__fooErr0AssertViolationARRAY_INDEX]=== [2018-03-28 15:24:59,529 INFO L82 PathProgramCache]: Analyzing trace with hash -739772656, now seen corresponding path program 2 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 12 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-03-28 15:24:59,534 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-03-28 15:24:59,547 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-28 15:24:59,549 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-03-28 15:24:59,604 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 35 proven. 4 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-03-28 15:24:59,604 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-03-28 15:24:59,680 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 35 proven. 4 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-03-28 15:24:59,701 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-03-28 15:24:59,701 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12] total 17 [2018-03-28 15:24:59,702 INFO L442 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-03-28 15:24:59,702 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-03-28 15:24:59,702 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=54, Invalid=218, Unknown=0, NotChecked=0, Total=272 [2018-03-28 15:24:59,702 INFO L87 Difference]: Start difference. First operand 162 states and 182 transitions. Second operand 17 states. [2018-03-28 15:24:59,898 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-28 15:24:59,899 INFO L93 Difference]: Finished difference Result 326 states and 364 transitions. [2018-03-28 15:24:59,899 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-03-28 15:24:59,899 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 55 [2018-03-28 15:24:59,899 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-28 15:24:59,900 INFO L225 Difference]: With dead ends: 326 [2018-03-28 15:24:59,900 INFO L226 Difference]: Without dead ends: 207 [2018-03-28 15:24:59,901 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 120 GetRequests, 88 SyntacticMatches, 5 SemanticMatches, 27 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 115 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=187, Invalid=625, Unknown=0, NotChecked=0, Total=812 [2018-03-28 15:24:59,902 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 207 states. [2018-03-28 15:24:59,912 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 207 to 190. [2018-03-28 15:24:59,912 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 190 states. [2018-03-28 15:24:59,914 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 190 states to 190 states and 211 transitions. [2018-03-28 15:24:59,914 INFO L78 Accepts]: Start accepts. Automaton has 190 states and 211 transitions. Word has length 55 [2018-03-28 15:24:59,914 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-28 15:24:59,914 INFO L459 AbstractCegarLoop]: Abstraction has 190 states and 211 transitions. [2018-03-28 15:24:59,914 INFO L460 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-03-28 15:24:59,914 INFO L276 IsEmpty]: Start isEmpty. Operand 190 states and 211 transitions. [2018-03-28 15:24:59,916 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2018-03-28 15:24:59,916 INFO L347 BasicCegarLoop]: Found error trace [2018-03-28 15:24:59,916 INFO L355 BasicCegarLoop]: trace histogram [4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-28 15:24:59,916 INFO L408 AbstractCegarLoop]: === Iteration 12 === [mainErr1AssertViolationARRAY_INDEX, mainErr2EnsuresViolationMEMORY_LEAK, mainErr0AssertViolationARRAY_INDEX, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__fooErr2RequiresViolation, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__fooErr1RequiresViolation, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__fooErr0AssertViolationARRAY_INDEX]=== [2018-03-28 15:24:59,916 INFO L82 PathProgramCache]: Analyzing trace with hash -1928929082, now seen corresponding path program 3 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 13 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-03-28 15:24:59,922 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-03-28 15:24:59,941 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-28 15:24:59,944 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-03-28 15:25:00,111 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 36 proven. 18 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-28 15:25:00,111 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-03-28 15:25:00,207 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 36 proven. 18 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-28 15:25:00,244 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-03-28 15:25:00,244 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 16] total 23 [2018-03-28 15:25:00,245 INFO L442 AbstractCegarLoop]: Interpolant automaton has 23 states [2018-03-28 15:25:00,245 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2018-03-28 15:25:00,245 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=88, Invalid=418, Unknown=0, NotChecked=0, Total=506 [2018-03-28 15:25:00,245 INFO L87 Difference]: Start difference. First operand 190 states and 211 transitions. Second operand 23 states. [2018-03-28 15:25:00,648 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-28 15:25:00,648 INFO L93 Difference]: Finished difference Result 362 states and 400 transitions. [2018-03-28 15:25:00,648 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-03-28 15:25:00,648 INFO L78 Accepts]: Start accepts. Automaton has 23 states. Word has length 65 [2018-03-28 15:25:00,649 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-28 15:25:00,651 INFO L225 Difference]: With dead ends: 362 [2018-03-28 15:25:00,651 INFO L226 Difference]: Without dead ends: 253 [2018-03-28 15:25:00,653 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 146 GetRequests, 100 SyntacticMatches, 7 SemanticMatches, 39 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 306 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=328, Invalid=1312, Unknown=0, NotChecked=0, Total=1640 [2018-03-28 15:25:00,653 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 253 states. [2018-03-28 15:25:00,664 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 253 to 227. [2018-03-28 15:25:00,664 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 227 states. [2018-03-28 15:25:00,666 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 227 states to 227 states and 250 transitions. [2018-03-28 15:25:00,666 INFO L78 Accepts]: Start accepts. Automaton has 227 states and 250 transitions. Word has length 65 [2018-03-28 15:25:00,666 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-28 15:25:00,666 INFO L459 AbstractCegarLoop]: Abstraction has 227 states and 250 transitions. [2018-03-28 15:25:00,666 INFO L460 AbstractCegarLoop]: Interpolant automaton has 23 states. [2018-03-28 15:25:00,666 INFO L276 IsEmpty]: Start isEmpty. Operand 227 states and 250 transitions. [2018-03-28 15:25:00,667 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 76 [2018-03-28 15:25:00,667 INFO L347 BasicCegarLoop]: Found error trace [2018-03-28 15:25:00,667 INFO L355 BasicCegarLoop]: trace histogram [4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-28 15:25:00,667 INFO L408 AbstractCegarLoop]: === Iteration 13 === [mainErr1AssertViolationARRAY_INDEX, mainErr2EnsuresViolationMEMORY_LEAK, mainErr0AssertViolationARRAY_INDEX, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__fooErr2RequiresViolation, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__fooErr1RequiresViolation, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__fooErr0AssertViolationARRAY_INDEX]=== [2018-03-28 15:25:00,667 INFO L82 PathProgramCache]: Analyzing trace with hash -101867780, now seen corresponding path program 4 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 14 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-03-28 15:25:00,675 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-03-28 15:25:00,689 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-28 15:25:00,691 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-03-28 15:25:00,741 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2018-03-28 15:25:00,742 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-03-28 15:25:00,815 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2018-03-28 15:25:00,836 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-03-28 15:25:00,836 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8] total 15 [2018-03-28 15:25:00,836 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-03-28 15:25:00,836 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-03-28 15:25:00,836 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=54, Invalid=186, Unknown=0, NotChecked=0, Total=240 [2018-03-28 15:25:00,837 INFO L87 Difference]: Start difference. First operand 227 states and 250 transitions. Second operand 16 states. [2018-03-28 15:25:01,181 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-28 15:25:01,181 INFO L93 Difference]: Finished difference Result 311 states and 362 transitions. [2018-03-28 15:25:01,182 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-03-28 15:25:01,182 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 75 [2018-03-28 15:25:01,182 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-28 15:25:01,183 INFO L225 Difference]: With dead ends: 311 [2018-03-28 15:25:01,183 INFO L226 Difference]: Without dead ends: 310 [2018-03-28 15:25:01,184 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 162 GetRequests, 134 SyntacticMatches, 0 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 116 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=244, Invalid=626, Unknown=0, NotChecked=0, Total=870 [2018-03-28 15:25:01,184 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 310 states. [2018-03-28 15:25:01,200 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 310 to 262. [2018-03-28 15:25:01,200 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 262 states. [2018-03-28 15:25:01,202 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 262 states to 262 states and 292 transitions. [2018-03-28 15:25:01,202 INFO L78 Accepts]: Start accepts. Automaton has 262 states and 292 transitions. Word has length 75 [2018-03-28 15:25:01,202 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-28 15:25:01,202 INFO L459 AbstractCegarLoop]: Abstraction has 262 states and 292 transitions. [2018-03-28 15:25:01,202 INFO L460 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-03-28 15:25:01,203 INFO L276 IsEmpty]: Start isEmpty. Operand 262 states and 292 transitions. [2018-03-28 15:25:01,204 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2018-03-28 15:25:01,204 INFO L347 BasicCegarLoop]: Found error trace [2018-03-28 15:25:01,204 INFO L355 BasicCegarLoop]: trace histogram [4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-28 15:25:01,204 INFO L408 AbstractCegarLoop]: === Iteration 14 === [mainErr1AssertViolationARRAY_INDEX, mainErr2EnsuresViolationMEMORY_LEAK, mainErr0AssertViolationARRAY_INDEX, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__fooErr2RequiresViolation, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__fooErr1RequiresViolation, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__fooErr0AssertViolationARRAY_INDEX]=== [2018-03-28 15:25:01,204 INFO L82 PathProgramCache]: Analyzing trace with hash 1137066581, now seen corresponding path program 2 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 15 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-03-28 15:25:01,213 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-03-28 15:25:01,227 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-28 15:25:01,230 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-03-28 15:25:01,232 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-03-28 15:25:01,232 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-03-28 15:25:01,240 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-28 15:25:01,240 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-03-28 15:25:01,335 INFO L134 CoverageAnalysis]: Checked inductivity of 81 backedges. 0 proven. 39 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2018-03-28 15:25:01,335 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-03-28 15:25:01,476 INFO L134 CoverageAnalysis]: Checked inductivity of 81 backedges. 0 proven. 39 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2018-03-28 15:25:01,497 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-03-28 15:25:01,497 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11] total 21 [2018-03-28 15:25:01,497 INFO L442 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-03-28 15:25:01,497 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-03-28 15:25:01,498 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=83, Invalid=379, Unknown=0, NotChecked=0, Total=462 [2018-03-28 15:25:01,498 INFO L87 Difference]: Start difference. First operand 262 states and 292 transitions. Second operand 22 states. [2018-03-28 15:25:02,232 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-28 15:25:02,232 INFO L93 Difference]: Finished difference Result 303 states and 354 transitions. [2018-03-28 15:25:02,233 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-03-28 15:25:02,233 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 76 [2018-03-28 15:25:02,233 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-28 15:25:02,234 INFO L225 Difference]: With dead ends: 303 [2018-03-28 15:25:02,234 INFO L226 Difference]: Without dead ends: 302 [2018-03-28 15:25:02,235 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 170 GetRequests, 130 SyntacticMatches, 0 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 286 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=430, Invalid=1292, Unknown=0, NotChecked=0, Total=1722 [2018-03-28 15:25:02,235 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 302 states. [2018-03-28 15:25:02,250 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 302 to 263. [2018-03-28 15:25:02,250 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 263 states. [2018-03-28 15:25:02,252 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 263 states to 263 states and 290 transitions. [2018-03-28 15:25:02,252 INFO L78 Accepts]: Start accepts. Automaton has 263 states and 290 transitions. Word has length 76 [2018-03-28 15:25:02,253 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-28 15:25:02,253 INFO L459 AbstractCegarLoop]: Abstraction has 263 states and 290 transitions. [2018-03-28 15:25:02,253 INFO L460 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-03-28 15:25:02,253 INFO L276 IsEmpty]: Start isEmpty. Operand 263 states and 290 transitions. [2018-03-28 15:25:02,254 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 88 [2018-03-28 15:25:02,255 INFO L347 BasicCegarLoop]: Found error trace [2018-03-28 15:25:02,255 INFO L355 BasicCegarLoop]: trace histogram [8, 7, 7, 7, 7, 7, 7, 7, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-28 15:25:02,255 INFO L408 AbstractCegarLoop]: === Iteration 15 === [mainErr1AssertViolationARRAY_INDEX, mainErr2EnsuresViolationMEMORY_LEAK, mainErr0AssertViolationARRAY_INDEX, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__fooErr2RequiresViolation, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__fooErr1RequiresViolation, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__fooErr0AssertViolationARRAY_INDEX]=== [2018-03-28 15:25:02,255 INFO L82 PathProgramCache]: Analyzing trace with hash 45438290, now seen corresponding path program 3 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 16 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-03-28 15:25:02,264 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-03-28 15:25:02,279 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-28 15:25:02,282 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-03-28 15:25:02,433 INFO L134 CoverageAnalysis]: Checked inductivity of 224 backedges. 0 proven. 224 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-28 15:25:02,434 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-03-28 15:25:02,662 INFO L134 CoverageAnalysis]: Checked inductivity of 224 backedges. 0 proven. 224 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-28 15:25:02,693 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-03-28 15:25:02,693 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17] total 32 [2018-03-28 15:25:02,694 INFO L442 AbstractCegarLoop]: Interpolant automaton has 32 states [2018-03-28 15:25:02,694 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2018-03-28 15:25:02,695 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=272, Invalid=720, Unknown=0, NotChecked=0, Total=992 [2018-03-28 15:25:02,695 INFO L87 Difference]: Start difference. First operand 263 states and 290 transitions. Second operand 32 states. [2018-03-28 15:25:03,223 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-28 15:25:03,223 INFO L93 Difference]: Finished difference Result 373 states and 424 transitions. [2018-03-28 15:25:03,223 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 45 states. [2018-03-28 15:25:03,223 INFO L78 Accepts]: Start accepts. Automaton has 32 states. Word has length 87 [2018-03-28 15:25:03,223 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-28 15:25:03,225 INFO L225 Difference]: With dead ends: 373 [2018-03-28 15:25:03,225 INFO L226 Difference]: Without dead ends: 353 [2018-03-28 15:25:03,226 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 200 GetRequests, 142 SyntacticMatches, 0 SemanticMatches, 58 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 681 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=1155, Invalid=2385, Unknown=0, NotChecked=0, Total=3540 [2018-03-28 15:25:03,226 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 353 states. [2018-03-28 15:25:03,242 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 353 to 343. [2018-03-28 15:25:03,242 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 343 states. [2018-03-28 15:25:03,243 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 343 states to 343 states and 386 transitions. [2018-03-28 15:25:03,244 INFO L78 Accepts]: Start accepts. Automaton has 343 states and 386 transitions. Word has length 87 [2018-03-28 15:25:03,244 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-28 15:25:03,244 INFO L459 AbstractCegarLoop]: Abstraction has 343 states and 386 transitions. [2018-03-28 15:25:03,244 INFO L460 AbstractCegarLoop]: Interpolant automaton has 32 states. [2018-03-28 15:25:03,244 INFO L276 IsEmpty]: Start isEmpty. Operand 343 states and 386 transitions. [2018-03-28 15:25:03,245 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 112 [2018-03-28 15:25:03,245 INFO L347 BasicCegarLoop]: Found error trace [2018-03-28 15:25:03,245 INFO L355 BasicCegarLoop]: trace histogram [8, 8, 7, 7, 7, 7, 7, 7, 7, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-28 15:25:03,245 INFO L408 AbstractCegarLoop]: === Iteration 16 === [mainErr1AssertViolationARRAY_INDEX, mainErr2EnsuresViolationMEMORY_LEAK, mainErr0AssertViolationARRAY_INDEX, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__fooErr2RequiresViolation, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__fooErr1RequiresViolation, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__fooErr0AssertViolationARRAY_INDEX]=== [2018-03-28 15:25:03,246 INFO L82 PathProgramCache]: Analyzing trace with hash 665687228, now seen corresponding path program 5 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 17 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-03-28 15:25:03,251 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-03-28 15:25:03,273 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-28 15:25:03,276 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-03-28 15:25:03,400 INFO L134 CoverageAnalysis]: Checked inductivity of 252 backedges. 180 proven. 42 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2018-03-28 15:25:03,400 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-03-28 15:25:03,534 INFO L134 CoverageAnalysis]: Checked inductivity of 252 backedges. 180 proven. 42 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2018-03-28 15:25:03,556 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-03-28 15:25:03,556 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 20] total 29 [2018-03-28 15:25:03,556 INFO L442 AbstractCegarLoop]: Interpolant automaton has 29 states [2018-03-28 15:25:03,556 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2018-03-28 15:25:03,557 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=130, Invalid=682, Unknown=0, NotChecked=0, Total=812 [2018-03-28 15:25:03,557 INFO L87 Difference]: Start difference. First operand 343 states and 386 transitions. Second operand 29 states. [2018-03-28 15:25:04,096 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-28 15:25:04,096 INFO L93 Difference]: Finished difference Result 642 states and 721 transitions. [2018-03-28 15:25:04,098 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2018-03-28 15:25:04,098 INFO L78 Accepts]: Start accepts. Automaton has 29 states. Word has length 111 [2018-03-28 15:25:04,098 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-28 15:25:04,101 INFO L225 Difference]: With dead ends: 642 [2018-03-28 15:25:04,101 INFO L226 Difference]: Without dead ends: 427 [2018-03-28 15:25:04,103 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 244 GetRequests, 184 SyntacticMatches, 9 SemanticMatches, 51 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 582 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=507, Invalid=2249, Unknown=0, NotChecked=0, Total=2756 [2018-03-28 15:25:04,104 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 427 states. [2018-03-28 15:25:04,122 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 427 to 389. [2018-03-28 15:25:04,122 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 389 states. [2018-03-28 15:25:04,124 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 389 states to 389 states and 435 transitions. [2018-03-28 15:25:04,125 INFO L78 Accepts]: Start accepts. Automaton has 389 states and 435 transitions. Word has length 111 [2018-03-28 15:25:04,125 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-28 15:25:04,125 INFO L459 AbstractCegarLoop]: Abstraction has 389 states and 435 transitions. [2018-03-28 15:25:04,125 INFO L460 AbstractCegarLoop]: Interpolant automaton has 29 states. [2018-03-28 15:25:04,125 INFO L276 IsEmpty]: Start isEmpty. Operand 389 states and 435 transitions. [2018-03-28 15:25:04,128 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 122 [2018-03-28 15:25:04,128 INFO L347 BasicCegarLoop]: Found error trace [2018-03-28 15:25:04,128 INFO L355 BasicCegarLoop]: trace histogram [8, 8, 7, 7, 7, 7, 7, 7, 7, 5, 5, 5, 4, 4, 4, 4, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-28 15:25:04,128 INFO L408 AbstractCegarLoop]: === Iteration 17 === [mainErr1AssertViolationARRAY_INDEX, mainErr2EnsuresViolationMEMORY_LEAK, mainErr0AssertViolationARRAY_INDEX, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__fooErr2RequiresViolation, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__fooErr1RequiresViolation, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__fooErr0AssertViolationARRAY_INDEX]=== [2018-03-28 15:25:04,128 INFO L82 PathProgramCache]: Analyzing trace with hash 1648092274, now seen corresponding path program 6 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 18 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-03-28 15:25:04,141 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-03-28 15:25:04,172 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-28 15:25:04,176 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-03-28 15:25:04,470 INFO L134 CoverageAnalysis]: Checked inductivity of 286 backedges. 199 proven. 76 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2018-03-28 15:25:04,470 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-03-28 15:25:04,661 INFO L134 CoverageAnalysis]: Checked inductivity of 286 backedges. 199 proven. 76 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2018-03-28 15:25:04,682 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-03-28 15:25:04,682 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 24] total 35 [2018-03-28 15:25:04,682 INFO L442 AbstractCegarLoop]: Interpolant automaton has 35 states [2018-03-28 15:25:04,682 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 35 interpolants. [2018-03-28 15:25:04,683 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=180, Invalid=1010, Unknown=0, NotChecked=0, Total=1190 [2018-03-28 15:25:04,683 INFO L87 Difference]: Start difference. First operand 389 states and 435 transitions. Second operand 35 states. [2018-03-28 15:25:05,577 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-28 15:25:05,577 INFO L93 Difference]: Finished difference Result 702 states and 783 transitions. [2018-03-28 15:25:05,578 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 39 states. [2018-03-28 15:25:05,578 INFO L78 Accepts]: Start accepts. Automaton has 35 states. Word has length 121 [2018-03-28 15:25:05,578 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-28 15:25:05,581 INFO L225 Difference]: With dead ends: 702 [2018-03-28 15:25:05,581 INFO L226 Difference]: Without dead ends: 497 [2018-03-28 15:25:05,584 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 270 GetRequests, 196 SyntacticMatches, 11 SemanticMatches, 63 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 943 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=724, Invalid=3436, Unknown=0, NotChecked=0, Total=4160 [2018-03-28 15:25:05,585 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 497 states. [2018-03-28 15:25:05,603 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 497 to 444. [2018-03-28 15:25:05,603 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 444 states. [2018-03-28 15:25:05,606 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 444 states to 444 states and 494 transitions. [2018-03-28 15:25:05,606 INFO L78 Accepts]: Start accepts. Automaton has 444 states and 494 transitions. Word has length 121 [2018-03-28 15:25:05,606 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-28 15:25:05,606 INFO L459 AbstractCegarLoop]: Abstraction has 444 states and 494 transitions. [2018-03-28 15:25:05,607 INFO L460 AbstractCegarLoop]: Interpolant automaton has 35 states. [2018-03-28 15:25:05,607 INFO L276 IsEmpty]: Start isEmpty. Operand 444 states and 494 transitions. [2018-03-28 15:25:05,609 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 132 [2018-03-28 15:25:05,609 INFO L347 BasicCegarLoop]: Found error trace [2018-03-28 15:25:05,610 INFO L355 BasicCegarLoop]: trace histogram [8, 8, 7, 7, 7, 7, 7, 7, 7, 6, 6, 6, 5, 5, 5, 5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-28 15:25:05,610 INFO L408 AbstractCegarLoop]: === Iteration 18 === [mainErr1AssertViolationARRAY_INDEX, mainErr2EnsuresViolationMEMORY_LEAK, mainErr0AssertViolationARRAY_INDEX, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__fooErr2RequiresViolation, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__fooErr1RequiresViolation, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__fooErr0AssertViolationARRAY_INDEX]=== [2018-03-28 15:25:05,610 INFO L82 PathProgramCache]: Analyzing trace with hash -1324709720, now seen corresponding path program 7 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 19 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-03-28 15:25:05,622 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-03-28 15:25:05,655 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-28 15:25:05,659 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-03-28 15:25:06,260 INFO L134 CoverageAnalysis]: Checked inductivity of 330 backedges. 209 proven. 120 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-03-28 15:25:06,260 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-03-28 15:25:06,635 INFO L134 CoverageAnalysis]: Checked inductivity of 330 backedges. 209 proven. 120 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-03-28 15:25:06,656 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-03-28 15:25:06,662 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [28, 28] total 41 [2018-03-28 15:25:06,662 INFO L442 AbstractCegarLoop]: Interpolant automaton has 41 states [2018-03-28 15:25:06,662 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 41 interpolants. [2018-03-28 15:25:06,663 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=238, Invalid=1402, Unknown=0, NotChecked=0, Total=1640 [2018-03-28 15:25:06,663 INFO L87 Difference]: Start difference. First operand 444 states and 494 transitions. Second operand 41 states. [2018-03-28 15:25:07,738 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-28 15:25:07,738 INFO L93 Difference]: Finished difference Result 774 states and 858 transitions. [2018-03-28 15:25:07,738 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 46 states. [2018-03-28 15:25:07,738 INFO L78 Accepts]: Start accepts. Automaton has 41 states. Word has length 131 [2018-03-28 15:25:07,738 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-28 15:25:07,741 INFO L225 Difference]: With dead ends: 774 [2018-03-28 15:25:07,741 INFO L226 Difference]: Without dead ends: 579 [2018-03-28 15:25:07,743 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 296 GetRequests, 208 SyntacticMatches, 13 SemanticMatches, 75 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1389 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=979, Invalid=4873, Unknown=0, NotChecked=0, Total=5852 [2018-03-28 15:25:07,744 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 579 states. [2018-03-28 15:25:07,767 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 579 to 508. [2018-03-28 15:25:07,767 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 508 states. [2018-03-28 15:25:07,770 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 508 states to 508 states and 563 transitions. [2018-03-28 15:25:07,770 INFO L78 Accepts]: Start accepts. Automaton has 508 states and 563 transitions. Word has length 131 [2018-03-28 15:25:07,771 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-28 15:25:07,771 INFO L459 AbstractCegarLoop]: Abstraction has 508 states and 563 transitions. [2018-03-28 15:25:07,771 INFO L460 AbstractCegarLoop]: Interpolant automaton has 41 states. [2018-03-28 15:25:07,771 INFO L276 IsEmpty]: Start isEmpty. Operand 508 states and 563 transitions. [2018-03-28 15:25:07,774 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 142 [2018-03-28 15:25:07,774 INFO L347 BasicCegarLoop]: Found error trace [2018-03-28 15:25:07,774 INFO L355 BasicCegarLoop]: trace histogram [8, 8, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 6, 6, 6, 6, 6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-28 15:25:07,775 INFO L408 AbstractCegarLoop]: === Iteration 19 === [mainErr1AssertViolationARRAY_INDEX, mainErr2EnsuresViolationMEMORY_LEAK, mainErr0AssertViolationARRAY_INDEX, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__fooErr2RequiresViolation, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__fooErr1RequiresViolation, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__fooErr0AssertViolationARRAY_INDEX]=== [2018-03-28 15:25:07,775 INFO L82 PathProgramCache]: Analyzing trace with hash 1092215134, now seen corresponding path program 8 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 20 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-03-28 15:25:07,784 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-03-28 15:25:07,810 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-28 15:25:07,814 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-03-28 15:25:08,130 INFO L134 CoverageAnalysis]: Checked inductivity of 384 backedges. 210 proven. 174 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-28 15:25:08,130 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-03-28 15:25:08,426 INFO L134 CoverageAnalysis]: Checked inductivity of 384 backedges. 210 proven. 174 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-28 15:25:08,447 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-03-28 15:25:08,447 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [32, 32] total 47 [2018-03-28 15:25:08,447 INFO L442 AbstractCegarLoop]: Interpolant automaton has 47 states [2018-03-28 15:25:08,448 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 47 interpolants. [2018-03-28 15:25:08,448 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=304, Invalid=1858, Unknown=0, NotChecked=0, Total=2162 [2018-03-28 15:25:08,449 INFO L87 Difference]: Start difference. First operand 508 states and 563 transitions. Second operand 47 states. [2018-03-28 15:25:10,044 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-28 15:25:10,044 INFO L93 Difference]: Finished difference Result 858 states and 946 transitions. [2018-03-28 15:25:10,045 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 53 states. [2018-03-28 15:25:10,045 INFO L78 Accepts]: Start accepts. Automaton has 47 states. Word has length 141 [2018-03-28 15:25:10,045 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-28 15:25:10,048 INFO L225 Difference]: With dead ends: 858 [2018-03-28 15:25:10,049 INFO L226 Difference]: Without dead ends: 673 [2018-03-28 15:25:10,052 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 322 GetRequests, 220 SyntacticMatches, 15 SemanticMatches, 87 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1920 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=1272, Invalid=6560, Unknown=0, NotChecked=0, Total=7832 [2018-03-28 15:25:10,053 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 673 states. [2018-03-28 15:25:10,076 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 673 to 581. [2018-03-28 15:25:10,076 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 581 states. [2018-03-28 15:25:10,079 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 581 states to 581 states and 642 transitions. [2018-03-28 15:25:10,080 INFO L78 Accepts]: Start accepts. Automaton has 581 states and 642 transitions. Word has length 141 [2018-03-28 15:25:10,080 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-28 15:25:10,080 INFO L459 AbstractCegarLoop]: Abstraction has 581 states and 642 transitions. [2018-03-28 15:25:10,080 INFO L460 AbstractCegarLoop]: Interpolant automaton has 47 states. [2018-03-28 15:25:10,081 INFO L276 IsEmpty]: Start isEmpty. Operand 581 states and 642 transitions. [2018-03-28 15:25:10,084 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 152 [2018-03-28 15:25:10,084 INFO L347 BasicCegarLoop]: Found error trace [2018-03-28 15:25:10,084 INFO L355 BasicCegarLoop]: trace histogram [8, 8, 8, 8, 8, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-28 15:25:10,084 INFO L408 AbstractCegarLoop]: === Iteration 20 === [mainErr1AssertViolationARRAY_INDEX, mainErr2EnsuresViolationMEMORY_LEAK, mainErr0AssertViolationARRAY_INDEX, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__fooErr2RequiresViolation, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__fooErr1RequiresViolation, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__fooErr0AssertViolationARRAY_INDEX]=== [2018-03-28 15:25:10,085 INFO L82 PathProgramCache]: Analyzing trace with hash -1032696172, now seen corresponding path program 9 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 21 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-03-28 15:25:10,093 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-03-28 15:25:10,130 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-28 15:25:10,134 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-03-28 15:25:10,245 INFO L134 CoverageAnalysis]: Checked inductivity of 448 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 238 trivial. 0 not checked. [2018-03-28 15:25:10,245 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-03-28 15:25:10,504 INFO L134 CoverageAnalysis]: Checked inductivity of 448 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 238 trivial. 0 not checked. [2018-03-28 15:25:10,525 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-03-28 15:25:10,525 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 16] total 31 [2018-03-28 15:25:10,525 INFO L442 AbstractCegarLoop]: Interpolant automaton has 32 states [2018-03-28 15:25:10,526 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2018-03-28 15:25:10,526 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=174, Invalid=818, Unknown=0, NotChecked=0, Total=992 [2018-03-28 15:25:10,526 INFO L87 Difference]: Start difference. First operand 581 states and 642 transitions. Second operand 32 states. [2018-03-28 15:25:11,680 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-28 15:25:11,681 INFO L93 Difference]: Finished difference Result 795 states and 976 transitions. [2018-03-28 15:25:11,681 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 45 states. [2018-03-28 15:25:11,681 INFO L78 Accepts]: Start accepts. Automaton has 32 states. Word has length 151 [2018-03-28 15:25:11,682 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-28 15:25:11,685 INFO L225 Difference]: With dead ends: 795 [2018-03-28 15:25:11,686 INFO L226 Difference]: Without dead ends: 794 [2018-03-28 15:25:11,687 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 334 GetRequests, 270 SyntacticMatches, 0 SemanticMatches, 64 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 716 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=1096, Invalid=3194, Unknown=0, NotChecked=0, Total=4290 [2018-03-28 15:25:11,688 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 794 states. [2018-03-28 15:25:11,718 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 794 to 652. [2018-03-28 15:25:11,718 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 652 states. [2018-03-28 15:25:11,721 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 652 states to 652 states and 728 transitions. [2018-03-28 15:25:11,721 INFO L78 Accepts]: Start accepts. Automaton has 652 states and 728 transitions. Word has length 151 [2018-03-28 15:25:11,722 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-28 15:25:11,722 INFO L459 AbstractCegarLoop]: Abstraction has 652 states and 728 transitions. [2018-03-28 15:25:11,722 INFO L460 AbstractCegarLoop]: Interpolant automaton has 32 states. [2018-03-28 15:25:11,722 INFO L276 IsEmpty]: Start isEmpty. Operand 652 states and 728 transitions. [2018-03-28 15:25:11,724 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 153 [2018-03-28 15:25:11,725 INFO L347 BasicCegarLoop]: Found error trace [2018-03-28 15:25:11,725 INFO L355 BasicCegarLoop]: trace histogram [8, 8, 8, 8, 8, 8, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-28 15:25:11,725 INFO L408 AbstractCegarLoop]: === Iteration 21 === [mainErr1AssertViolationARRAY_INDEX, mainErr2EnsuresViolationMEMORY_LEAK, mainErr0AssertViolationARRAY_INDEX, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__fooErr2RequiresViolation, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__fooErr1RequiresViolation, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__fooErr0AssertViolationARRAY_INDEX]=== [2018-03-28 15:25:11,725 INFO L82 PathProgramCache]: Analyzing trace with hash -1948809795, now seen corresponding path program 3 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 22 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-03-28 15:25:11,734 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-03-28 15:25:11,763 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-28 15:25:11,766 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-03-28 15:25:11,778 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-03-28 15:25:11,778 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-03-28 15:25:11,819 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-28 15:25:11,819 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-03-28 15:25:12,266 INFO L134 CoverageAnalysis]: Checked inductivity of 455 backedges. 0 proven. 217 refuted. 0 times theorem prover too weak. 238 trivial. 0 not checked. [2018-03-28 15:25:12,267 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-03-28 15:25:12,707 INFO L134 CoverageAnalysis]: Checked inductivity of 455 backedges. 0 proven. 217 refuted. 0 times theorem prover too weak. 238 trivial. 0 not checked. [2018-03-28 15:25:12,728 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-03-28 15:25:12,728 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19] total 37 [2018-03-28 15:25:12,729 INFO L442 AbstractCegarLoop]: Interpolant automaton has 38 states [2018-03-28 15:25:12,729 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2018-03-28 15:25:12,729 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=219, Invalid=1187, Unknown=0, NotChecked=0, Total=1406 [2018-03-28 15:25:12,729 INFO L87 Difference]: Start difference. First operand 652 states and 728 transitions. Second operand 38 states. [2018-03-28 15:25:14,940 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-28 15:25:14,941 INFO L93 Difference]: Finished difference Result 783 states and 964 transitions. [2018-03-28 15:25:14,941 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 48 states. [2018-03-28 15:25:14,941 INFO L78 Accepts]: Start accepts. Automaton has 38 states. Word has length 152 [2018-03-28 15:25:14,942 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-28 15:25:14,945 INFO L225 Difference]: With dead ends: 783 [2018-03-28 15:25:14,945 INFO L226 Difference]: Without dead ends: 782 [2018-03-28 15:25:14,947 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 346 GetRequests, 266 SyntacticMatches, 0 SemanticMatches, 80 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1340 ImplicationChecksByTransitivity, 2.3s TimeCoverageRelationStatistics Valid=1510, Invalid=5132, Unknown=0, NotChecked=0, Total=6642 [2018-03-28 15:25:14,948 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 782 states. [2018-03-28 15:25:14,975 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 782 to 653. [2018-03-28 15:25:14,975 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 653 states. [2018-03-28 15:25:14,978 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 653 states to 653 states and 722 transitions. [2018-03-28 15:25:14,979 INFO L78 Accepts]: Start accepts. Automaton has 653 states and 722 transitions. Word has length 152 [2018-03-28 15:25:14,979 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-28 15:25:14,979 INFO L459 AbstractCegarLoop]: Abstraction has 653 states and 722 transitions. [2018-03-28 15:25:14,979 INFO L460 AbstractCegarLoop]: Interpolant automaton has 38 states. [2018-03-28 15:25:14,979 INFO L276 IsEmpty]: Start isEmpty. Operand 653 states and 722 transitions. [2018-03-28 15:25:14,983 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 168 [2018-03-28 15:25:14,983 INFO L347 BasicCegarLoop]: Found error trace [2018-03-28 15:25:14,983 INFO L355 BasicCegarLoop]: trace histogram [16, 15, 15, 15, 15, 15, 15, 15, 15, 15, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-28 15:25:14,983 INFO L408 AbstractCegarLoop]: === Iteration 22 === [mainErr1AssertViolationARRAY_INDEX, mainErr2EnsuresViolationMEMORY_LEAK, mainErr0AssertViolationARRAY_INDEX, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__fooErr2RequiresViolation, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__fooErr1RequiresViolation, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__fooErr0AssertViolationARRAY_INDEX]=== [2018-03-28 15:25:14,983 INFO L82 PathProgramCache]: Analyzing trace with hash 271720706, now seen corresponding path program 4 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 23 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-03-28 15:25:14,993 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-03-28 15:25:15,031 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-28 15:25:15,034 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-03-28 15:25:15,363 INFO L134 CoverageAnalysis]: Checked inductivity of 1080 backedges. 0 proven. 1080 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-28 15:25:15,363 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-03-28 15:25:15,955 INFO L134 CoverageAnalysis]: Checked inductivity of 1080 backedges. 0 proven. 1080 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-28 15:25:15,976 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-03-28 15:25:15,976 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [33, 33] total 64 [2018-03-28 15:25:15,977 INFO L442 AbstractCegarLoop]: Interpolant automaton has 64 states [2018-03-28 15:25:15,977 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 64 interpolants. [2018-03-28 15:25:15,978 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1056, Invalid=2976, Unknown=0, NotChecked=0, Total=4032 [2018-03-28 15:25:15,978 INFO L87 Difference]: Start difference. First operand 653 states and 722 transitions. Second operand 64 states. [2018-03-28 15:25:17,601 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-28 15:25:17,602 INFO L93 Difference]: Finished difference Result 843 states and 960 transitions. [2018-03-28 15:25:17,602 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 93 states. [2018-03-28 15:25:17,602 INFO L78 Accepts]: Start accepts. Automaton has 64 states. Word has length 167 [2018-03-28 15:25:17,603 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-28 15:25:17,605 INFO L225 Difference]: With dead ends: 843 [2018-03-28 15:25:17,606 INFO L226 Difference]: Without dead ends: 823 [2018-03-28 15:25:17,608 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 392 GetRequests, 270 SyntacticMatches, 0 SemanticMatches, 122 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3257 ImplicationChecksByTransitivity, 2.0s TimeCoverageRelationStatistics Valid=4867, Invalid=10385, Unknown=0, NotChecked=0, Total=15252 [2018-03-28 15:25:17,609 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 823 states. [2018-03-28 15:25:17,627 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 823 to 813. [2018-03-28 15:25:17,627 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 813 states. [2018-03-28 15:25:17,629 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 813 states to 813 states and 914 transitions. [2018-03-28 15:25:17,630 INFO L78 Accepts]: Start accepts. Automaton has 813 states and 914 transitions. Word has length 167 [2018-03-28 15:25:17,630 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-28 15:25:17,630 INFO L459 AbstractCegarLoop]: Abstraction has 813 states and 914 transitions. [2018-03-28 15:25:17,630 INFO L460 AbstractCegarLoop]: Interpolant automaton has 64 states. [2018-03-28 15:25:17,630 INFO L276 IsEmpty]: Start isEmpty. Operand 813 states and 914 transitions. [2018-03-28 15:25:17,633 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 224 [2018-03-28 15:25:17,633 INFO L347 BasicCegarLoop]: Found error trace [2018-03-28 15:25:17,634 INFO L355 BasicCegarLoop]: trace histogram [16, 16, 15, 15, 15, 15, 15, 15, 15, 8, 8, 8, 7, 7, 7, 7, 7, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-28 15:25:17,634 INFO L408 AbstractCegarLoop]: === Iteration 23 === [mainErr1AssertViolationARRAY_INDEX, mainErr2EnsuresViolationMEMORY_LEAK, mainErr0AssertViolationARRAY_INDEX, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__fooErr2RequiresViolation, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__fooErr1RequiresViolation, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__fooErr0AssertViolationARRAY_INDEX]=== [2018-03-28 15:25:17,634 INFO L82 PathProgramCache]: Analyzing trace with hash 867467796, now seen corresponding path program 10 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 24 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-03-28 15:25:17,640 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-03-28 15:25:17,680 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-28 15:25:17,685 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-03-28 15:25:18,122 INFO L134 CoverageAnalysis]: Checked inductivity of 1228 backedges. 794 proven. 238 refuted. 0 times theorem prover too weak. 196 trivial. 0 not checked. [2018-03-28 15:25:18,122 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-03-28 15:25:18,512 INFO L134 CoverageAnalysis]: Checked inductivity of 1228 backedges. 794 proven. 238 refuted. 0 times theorem prover too weak. 196 trivial. 0 not checked. [2018-03-28 15:25:18,533 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-03-28 15:25:18,533 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [36, 36] total 53 [2018-03-28 15:25:18,533 INFO L442 AbstractCegarLoop]: Interpolant automaton has 53 states [2018-03-28 15:25:18,534 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 53 interpolants. [2018-03-28 15:25:18,534 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=378, Invalid=2378, Unknown=0, NotChecked=0, Total=2756 [2018-03-28 15:25:18,534 INFO L87 Difference]: Start difference. First operand 813 states and 914 transitions. Second operand 53 states. [2018-03-28 15:25:20,010 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-28 15:25:20,011 INFO L93 Difference]: Finished difference Result 1418 states and 1591 transitions. [2018-03-28 15:25:20,011 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 60 states. [2018-03-28 15:25:20,011 INFO L78 Accepts]: Start accepts. Automaton has 53 states. Word has length 223 [2018-03-28 15:25:20,011 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-28 15:25:20,014 INFO L225 Difference]: With dead ends: 1418 [2018-03-28 15:25:20,014 INFO L226 Difference]: Without dead ends: 1011 [2018-03-28 15:25:20,019 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 492 GetRequests, 376 SyntacticMatches, 17 SemanticMatches, 99 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2536 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=1603, Invalid=8497, Unknown=0, NotChecked=0, Total=10100 [2018-03-28 15:25:20,020 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1011 states. [2018-03-28 15:25:20,051 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1011 to 895. [2018-03-28 15:25:20,051 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 895 states. [2018-03-28 15:25:20,055 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 895 states to 895 states and 1003 transitions. [2018-03-28 15:25:20,055 INFO L78 Accepts]: Start accepts. Automaton has 895 states and 1003 transitions. Word has length 223 [2018-03-28 15:25:20,056 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-28 15:25:20,056 INFO L459 AbstractCegarLoop]: Abstraction has 895 states and 1003 transitions. [2018-03-28 15:25:20,056 INFO L460 AbstractCegarLoop]: Interpolant automaton has 53 states. [2018-03-28 15:25:20,056 INFO L276 IsEmpty]: Start isEmpty. Operand 895 states and 1003 transitions. [2018-03-28 15:25:20,060 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 234 [2018-03-28 15:25:20,060 INFO L347 BasicCegarLoop]: Found error trace [2018-03-28 15:25:20,061 INFO L355 BasicCegarLoop]: trace histogram [16, 16, 15, 15, 15, 15, 15, 15, 15, 9, 9, 9, 8, 8, 8, 8, 8, 8, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-28 15:25:20,061 INFO L408 AbstractCegarLoop]: === Iteration 24 === [mainErr1AssertViolationARRAY_INDEX, mainErr2EnsuresViolationMEMORY_LEAK, mainErr0AssertViolationARRAY_INDEX, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__fooErr2RequiresViolation, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__fooErr1RequiresViolation, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__fooErr0AssertViolationARRAY_INDEX]=== [2018-03-28 15:25:20,061 INFO L82 PathProgramCache]: Analyzing trace with hash 1591975370, now seen corresponding path program 11 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 25 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-03-28 15:25:20,073 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-03-28 15:25:20,129 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-28 15:25:20,135 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-03-28 15:25:20,744 INFO L134 CoverageAnalysis]: Checked inductivity of 1302 backedges. 849 proven. 312 refuted. 0 times theorem prover too weak. 141 trivial. 0 not checked. [2018-03-28 15:25:20,744 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-03-28 15:25:21,247 INFO L134 CoverageAnalysis]: Checked inductivity of 1302 backedges. 849 proven. 312 refuted. 0 times theorem prover too weak. 141 trivial. 0 not checked. [2018-03-28 15:25:21,276 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-03-28 15:25:21,276 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [40, 40] total 59 [2018-03-28 15:25:21,277 INFO L442 AbstractCegarLoop]: Interpolant automaton has 59 states [2018-03-28 15:25:21,277 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 59 interpolants. [2018-03-28 15:25:21,277 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=460, Invalid=2962, Unknown=0, NotChecked=0, Total=3422 [2018-03-28 15:25:21,277 INFO L87 Difference]: Start difference. First operand 895 states and 1003 transitions. Second operand 59 states. [2018-03-28 15:25:23,239 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-28 15:25:23,239 INFO L93 Difference]: Finished difference Result 1526 states and 1705 transitions. [2018-03-28 15:25:23,239 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 67 states. [2018-03-28 15:25:23,239 INFO L78 Accepts]: Start accepts. Automaton has 59 states. Word has length 233 [2018-03-28 15:25:23,240 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-28 15:25:23,244 INFO L225 Difference]: With dead ends: 1526 [2018-03-28 15:25:23,244 INFO L226 Difference]: Without dead ends: 1129 [2018-03-28 15:25:23,248 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 518 GetRequests, 388 SyntacticMatches, 19 SemanticMatches, 111 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3237 ImplicationChecksByTransitivity, 1.8s TimeCoverageRelationStatistics Valid=1972, Invalid=10684, Unknown=0, NotChecked=0, Total=12656 [2018-03-28 15:25:23,249 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1129 states. [2018-03-28 15:25:23,282 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1129 to 986. [2018-03-28 15:25:23,283 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 986 states. [2018-03-28 15:25:23,287 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 986 states to 986 states and 1102 transitions. [2018-03-28 15:25:23,287 INFO L78 Accepts]: Start accepts. Automaton has 986 states and 1102 transitions. Word has length 233 [2018-03-28 15:25:23,287 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-28 15:25:23,288 INFO L459 AbstractCegarLoop]: Abstraction has 986 states and 1102 transitions. [2018-03-28 15:25:23,288 INFO L460 AbstractCegarLoop]: Interpolant automaton has 59 states. [2018-03-28 15:25:23,288 INFO L276 IsEmpty]: Start isEmpty. Operand 986 states and 1102 transitions. [2018-03-28 15:25:23,292 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 244 [2018-03-28 15:25:23,292 INFO L347 BasicCegarLoop]: Found error trace [2018-03-28 15:25:23,292 INFO L355 BasicCegarLoop]: trace histogram [16, 16, 15, 15, 15, 15, 15, 15, 15, 10, 10, 10, 9, 9, 9, 9, 9, 9, 9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-28 15:25:23,292 INFO L408 AbstractCegarLoop]: === Iteration 25 === [mainErr1AssertViolationARRAY_INDEX, mainErr2EnsuresViolationMEMORY_LEAK, mainErr0AssertViolationARRAY_INDEX, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__fooErr2RequiresViolation, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__fooErr1RequiresViolation, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__fooErr0AssertViolationARRAY_INDEX]=== [2018-03-28 15:25:23,293 INFO L82 PathProgramCache]: Analyzing trace with hash -1799090688, now seen corresponding path program 12 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 26 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 26 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-03-28 15:25:23,302 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-03-28 15:25:23,357 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-28 15:25:23,364 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-03-28 15:25:23,986 INFO L134 CoverageAnalysis]: Checked inductivity of 1386 backedges. 895 proven. 396 refuted. 0 times theorem prover too weak. 95 trivial. 0 not checked. [2018-03-28 15:25:23,986 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-03-28 15:25:24,581 INFO L134 CoverageAnalysis]: Checked inductivity of 1386 backedges. 895 proven. 396 refuted. 0 times theorem prover too weak. 95 trivial. 0 not checked. [2018-03-28 15:25:24,602 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-03-28 15:25:24,602 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [44, 44] total 65 [2018-03-28 15:25:24,602 INFO L442 AbstractCegarLoop]: Interpolant automaton has 65 states [2018-03-28 15:25:24,603 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 65 interpolants. [2018-03-28 15:25:24,603 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=550, Invalid=3610, Unknown=0, NotChecked=0, Total=4160 [2018-03-28 15:25:24,603 INFO L87 Difference]: Start difference. First operand 986 states and 1102 transitions. Second operand 65 states. [2018-03-28 15:25:26,991 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-28 15:25:26,991 INFO L93 Difference]: Finished difference Result 1646 states and 1832 transitions. [2018-03-28 15:25:26,991 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 74 states. [2018-03-28 15:25:26,991 INFO L78 Accepts]: Start accepts. Automaton has 65 states. Word has length 243 [2018-03-28 15:25:26,992 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-28 15:25:26,996 INFO L225 Difference]: With dead ends: 1646 [2018-03-28 15:25:26,996 INFO L226 Difference]: Without dead ends: 1259 [2018-03-28 15:25:27,000 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 544 GetRequests, 400 SyntacticMatches, 21 SemanticMatches, 123 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4023 ImplicationChecksByTransitivity, 2.1s TimeCoverageRelationStatistics Valid=2379, Invalid=13121, Unknown=0, NotChecked=0, Total=15500 [2018-03-28 15:25:27,001 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1259 states. [2018-03-28 15:25:27,037 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1259 to 1086. [2018-03-28 15:25:27,037 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1086 states. [2018-03-28 15:25:27,042 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1086 states to 1086 states and 1211 transitions. [2018-03-28 15:25:27,042 INFO L78 Accepts]: Start accepts. Automaton has 1086 states and 1211 transitions. Word has length 243 [2018-03-28 15:25:27,043 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-28 15:25:27,043 INFO L459 AbstractCegarLoop]: Abstraction has 1086 states and 1211 transitions. [2018-03-28 15:25:27,043 INFO L460 AbstractCegarLoop]: Interpolant automaton has 65 states. [2018-03-28 15:25:27,043 INFO L276 IsEmpty]: Start isEmpty. Operand 1086 states and 1211 transitions. [2018-03-28 15:25:27,047 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 254 [2018-03-28 15:25:27,047 INFO L347 BasicCegarLoop]: Found error trace [2018-03-28 15:25:27,047 INFO L355 BasicCegarLoop]: trace histogram [16, 16, 15, 15, 15, 15, 15, 15, 15, 11, 11, 11, 10, 10, 10, 10, 10, 10, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-28 15:25:27,047 INFO L408 AbstractCegarLoop]: === Iteration 26 === [mainErr1AssertViolationARRAY_INDEX, mainErr2EnsuresViolationMEMORY_LEAK, mainErr0AssertViolationARRAY_INDEX, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__fooErr2RequiresViolation, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__fooErr1RequiresViolation, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__fooErr0AssertViolationARRAY_INDEX]=== [2018-03-28 15:25:27,047 INFO L82 PathProgramCache]: Analyzing trace with hash 1763062454, now seen corresponding path program 13 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 27 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 27 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-03-28 15:25:27,056 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-03-28 15:25:27,110 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-28 15:25:27,117 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-03-28 15:25:27,774 INFO L134 CoverageAnalysis]: Checked inductivity of 1480 backedges. 932 proven. 490 refuted. 0 times theorem prover too weak. 58 trivial. 0 not checked. [2018-03-28 15:25:27,774 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-03-28 15:25:28,528 INFO L134 CoverageAnalysis]: Checked inductivity of 1480 backedges. 932 proven. 490 refuted. 0 times theorem prover too weak. 58 trivial. 0 not checked. [2018-03-28 15:25:28,549 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-03-28 15:25:28,573 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [48, 48] total 71 [2018-03-28 15:25:28,574 INFO L442 AbstractCegarLoop]: Interpolant automaton has 71 states [2018-03-28 15:25:28,574 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 71 interpolants. [2018-03-28 15:25:28,575 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=648, Invalid=4322, Unknown=0, NotChecked=0, Total=4970 [2018-03-28 15:25:28,575 INFO L87 Difference]: Start difference. First operand 1086 states and 1211 transitions. Second operand 71 states. [2018-03-28 15:25:30,814 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-28 15:25:30,815 INFO L93 Difference]: Finished difference Result 1778 states and 1972 transitions. [2018-03-28 15:25:30,815 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 81 states. [2018-03-28 15:25:30,815 INFO L78 Accepts]: Start accepts. Automaton has 71 states. Word has length 253 [2018-03-28 15:25:30,815 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-28 15:25:30,819 INFO L225 Difference]: With dead ends: 1778 [2018-03-28 15:25:30,819 INFO L226 Difference]: Without dead ends: 1401 [2018-03-28 15:25:30,822 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 570 GetRequests, 412 SyntacticMatches, 23 SemanticMatches, 135 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4894 ImplicationChecksByTransitivity, 2.5s TimeCoverageRelationStatistics Valid=2824, Invalid=15808, Unknown=0, NotChecked=0, Total=18632 [2018-03-28 15:25:30,822 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1401 states. [2018-03-28 15:25:30,858 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1401 to 1195. [2018-03-28 15:25:30,858 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1195 states. [2018-03-28 15:25:30,863 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1195 states to 1195 states and 1330 transitions. [2018-03-28 15:25:30,863 INFO L78 Accepts]: Start accepts. Automaton has 1195 states and 1330 transitions. Word has length 253 [2018-03-28 15:25:30,864 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-28 15:25:30,864 INFO L459 AbstractCegarLoop]: Abstraction has 1195 states and 1330 transitions. [2018-03-28 15:25:30,864 INFO L460 AbstractCegarLoop]: Interpolant automaton has 71 states. [2018-03-28 15:25:30,864 INFO L276 IsEmpty]: Start isEmpty. Operand 1195 states and 1330 transitions. [2018-03-28 15:25:30,868 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 264 [2018-03-28 15:25:30,868 INFO L347 BasicCegarLoop]: Found error trace [2018-03-28 15:25:30,869 INFO L355 BasicCegarLoop]: trace histogram [16, 16, 15, 15, 15, 15, 15, 15, 15, 12, 12, 12, 11, 11, 11, 11, 11, 11, 11, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-28 15:25:30,869 INFO L408 AbstractCegarLoop]: === Iteration 27 === [mainErr1AssertViolationARRAY_INDEX, mainErr2EnsuresViolationMEMORY_LEAK, mainErr0AssertViolationARRAY_INDEX, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__fooErr2RequiresViolation, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__fooErr1RequiresViolation, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__fooErr0AssertViolationARRAY_INDEX]=== [2018-03-28 15:25:30,869 INFO L82 PathProgramCache]: Analyzing trace with hash -2103284756, now seen corresponding path program 14 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 28 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 28 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-03-28 15:25:30,877 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-03-28 15:25:30,937 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-28 15:25:30,944 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-03-28 15:25:31,668 INFO L134 CoverageAnalysis]: Checked inductivity of 1584 backedges. 960 proven. 594 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2018-03-28 15:25:31,668 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-03-28 15:25:32,428 INFO L134 CoverageAnalysis]: Checked inductivity of 1584 backedges. 960 proven. 594 refuted. 0 times theorem prover too weak. 30 trivial. 0 not checked. [2018-03-28 15:25:32,449 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-03-28 15:25:32,449 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [52, 52] total 77 [2018-03-28 15:25:32,450 INFO L442 AbstractCegarLoop]: Interpolant automaton has 77 states [2018-03-28 15:25:32,450 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 77 interpolants. [2018-03-28 15:25:32,451 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=754, Invalid=5098, Unknown=0, NotChecked=0, Total=5852 [2018-03-28 15:25:32,451 INFO L87 Difference]: Start difference. First operand 1195 states and 1330 transitions. Second operand 77 states. [2018-03-28 15:25:35,198 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-28 15:25:35,198 INFO L93 Difference]: Finished difference Result 1922 states and 2125 transitions. [2018-03-28 15:25:35,199 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 88 states. [2018-03-28 15:25:35,199 INFO L78 Accepts]: Start accepts. Automaton has 77 states. Word has length 263 [2018-03-28 15:25:35,199 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-28 15:25:35,202 INFO L225 Difference]: With dead ends: 1922 [2018-03-28 15:25:35,203 INFO L226 Difference]: Without dead ends: 1555 [2018-03-28 15:25:35,206 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 596 GetRequests, 424 SyntacticMatches, 25 SemanticMatches, 147 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5850 ImplicationChecksByTransitivity, 2.7s TimeCoverageRelationStatistics Valid=3307, Invalid=18745, Unknown=0, NotChecked=0, Total=22052 [2018-03-28 15:25:35,207 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1555 states. [2018-03-28 15:25:35,247 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1555 to 1313. [2018-03-28 15:25:35,247 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1313 states. [2018-03-28 15:25:35,251 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1313 states to 1313 states and 1459 transitions. [2018-03-28 15:25:35,252 INFO L78 Accepts]: Start accepts. Automaton has 1313 states and 1459 transitions. Word has length 263 [2018-03-28 15:25:35,252 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-28 15:25:35,253 INFO L459 AbstractCegarLoop]: Abstraction has 1313 states and 1459 transitions. [2018-03-28 15:25:35,253 INFO L460 AbstractCegarLoop]: Interpolant automaton has 77 states. [2018-03-28 15:25:35,253 INFO L276 IsEmpty]: Start isEmpty. Operand 1313 states and 1459 transitions. [2018-03-28 15:25:35,255 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 274 [2018-03-28 15:25:35,256 INFO L347 BasicCegarLoop]: Found error trace [2018-03-28 15:25:35,256 INFO L355 BasicCegarLoop]: trace histogram [16, 16, 15, 15, 15, 15, 15, 15, 15, 13, 13, 13, 12, 12, 12, 12, 12, 12, 12, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-28 15:25:35,256 INFO L408 AbstractCegarLoop]: === Iteration 28 === [mainErr1AssertViolationARRAY_INDEX, mainErr2EnsuresViolationMEMORY_LEAK, mainErr0AssertViolationARRAY_INDEX, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__fooErr2RequiresViolation, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__fooErr1RequiresViolation, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__fooErr0AssertViolationARRAY_INDEX]=== [2018-03-28 15:25:35,256 INFO L82 PathProgramCache]: Analyzing trace with hash 1899567522, now seen corresponding path program 15 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 29 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 29 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-03-28 15:25:35,275 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-03-28 15:25:35,321 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-28 15:25:35,326 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-03-28 15:25:36,466 INFO L134 CoverageAnalysis]: Checked inductivity of 1698 backedges. 979 proven. 708 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2018-03-28 15:25:36,466 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-03-28 15:25:37,362 INFO L134 CoverageAnalysis]: Checked inductivity of 1698 backedges. 979 proven. 708 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2018-03-28 15:25:37,383 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-03-28 15:25:37,383 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [56, 56] total 83 [2018-03-28 15:25:37,384 INFO L442 AbstractCegarLoop]: Interpolant automaton has 83 states [2018-03-28 15:25:37,384 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 83 interpolants. [2018-03-28 15:25:37,384 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=868, Invalid=5938, Unknown=0, NotChecked=0, Total=6806 [2018-03-28 15:25:37,384 INFO L87 Difference]: Start difference. First operand 1313 states and 1459 transitions. Second operand 83 states. [2018-03-28 15:25:40,427 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-28 15:25:40,428 INFO L93 Difference]: Finished difference Result 2078 states and 2291 transitions. [2018-03-28 15:25:40,428 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 95 states. [2018-03-28 15:25:40,428 INFO L78 Accepts]: Start accepts. Automaton has 83 states. Word has length 273 [2018-03-28 15:25:40,428 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-28 15:25:40,434 INFO L225 Difference]: With dead ends: 2078 [2018-03-28 15:25:40,434 INFO L226 Difference]: Without dead ends: 1721 [2018-03-28 15:25:40,438 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 622 GetRequests, 436 SyntacticMatches, 27 SemanticMatches, 159 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6891 ImplicationChecksByTransitivity, 3.5s TimeCoverageRelationStatistics Valid=3828, Invalid=21932, Unknown=0, NotChecked=0, Total=25760 [2018-03-28 15:25:40,440 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1721 states. [2018-03-28 15:25:40,484 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1721 to 1440. [2018-03-28 15:25:40,484 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1440 states. [2018-03-28 15:25:40,488 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1440 states to 1440 states and 1598 transitions. [2018-03-28 15:25:40,488 INFO L78 Accepts]: Start accepts. Automaton has 1440 states and 1598 transitions. Word has length 273 [2018-03-28 15:25:40,489 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-28 15:25:40,489 INFO L459 AbstractCegarLoop]: Abstraction has 1440 states and 1598 transitions. [2018-03-28 15:25:40,489 INFO L460 AbstractCegarLoop]: Interpolant automaton has 83 states. [2018-03-28 15:25:40,489 INFO L276 IsEmpty]: Start isEmpty. Operand 1440 states and 1598 transitions. [2018-03-28 15:25:40,494 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 284 [2018-03-28 15:25:40,494 INFO L347 BasicCegarLoop]: Found error trace [2018-03-28 15:25:40,494 INFO L355 BasicCegarLoop]: trace histogram [16, 16, 15, 15, 15, 15, 15, 15, 15, 14, 14, 14, 13, 13, 13, 13, 13, 13, 13, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-28 15:25:40,494 INFO L408 AbstractCegarLoop]: === Iteration 29 === [mainErr1AssertViolationARRAY_INDEX, mainErr2EnsuresViolationMEMORY_LEAK, mainErr0AssertViolationARRAY_INDEX, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__fooErr2RequiresViolation, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__fooErr1RequiresViolation, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__fooErr0AssertViolationARRAY_INDEX]=== [2018-03-28 15:25:40,494 INFO L82 PathProgramCache]: Analyzing trace with hash 62036952, now seen corresponding path program 16 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 30 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 30 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-03-28 15:25:40,503 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-03-28 15:25:40,568 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-28 15:25:40,576 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-03-28 15:25:41,791 INFO L134 CoverageAnalysis]: Checked inductivity of 1822 backedges. 989 proven. 832 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-03-28 15:25:41,791 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-03-28 15:25:42,829 INFO L134 CoverageAnalysis]: Checked inductivity of 1822 backedges. 989 proven. 832 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-03-28 15:25:42,850 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-03-28 15:25:42,850 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [60, 60] total 89 [2018-03-28 15:25:42,851 INFO L442 AbstractCegarLoop]: Interpolant automaton has 89 states [2018-03-28 15:25:42,851 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 89 interpolants. [2018-03-28 15:25:42,851 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=990, Invalid=6842, Unknown=0, NotChecked=0, Total=7832 [2018-03-28 15:25:42,851 INFO L87 Difference]: Start difference. First operand 1440 states and 1598 transitions. Second operand 89 states. [2018-03-28 15:25:46,216 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-28 15:25:46,217 INFO L93 Difference]: Finished difference Result 2246 states and 2470 transitions. [2018-03-28 15:25:46,217 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 102 states. [2018-03-28 15:25:46,217 INFO L78 Accepts]: Start accepts. Automaton has 89 states. Word has length 283 [2018-03-28 15:25:46,217 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-28 15:25:46,221 INFO L225 Difference]: With dead ends: 2246 [2018-03-28 15:25:46,221 INFO L226 Difference]: Without dead ends: 1899 [2018-03-28 15:25:46,225 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 648 GetRequests, 448 SyntacticMatches, 29 SemanticMatches, 171 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8017 ImplicationChecksByTransitivity, 3.9s TimeCoverageRelationStatistics Valid=4387, Invalid=25369, Unknown=0, NotChecked=0, Total=29756 [2018-03-28 15:25:46,226 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1899 states. [2018-03-28 15:25:46,254 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1899 to 1576. [2018-03-28 15:25:46,254 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1576 states. [2018-03-28 15:25:46,256 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1576 states to 1576 states and 1747 transitions. [2018-03-28 15:25:46,256 INFO L78 Accepts]: Start accepts. Automaton has 1576 states and 1747 transitions. Word has length 283 [2018-03-28 15:25:46,256 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-28 15:25:46,256 INFO L459 AbstractCegarLoop]: Abstraction has 1576 states and 1747 transitions. [2018-03-28 15:25:46,256 INFO L460 AbstractCegarLoop]: Interpolant automaton has 89 states. [2018-03-28 15:25:46,257 INFO L276 IsEmpty]: Start isEmpty. Operand 1576 states and 1747 transitions. [2018-03-28 15:25:46,259 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 294 [2018-03-28 15:25:46,259 INFO L347 BasicCegarLoop]: Found error trace [2018-03-28 15:25:46,259 INFO L355 BasicCegarLoop]: trace histogram [16, 16, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 14, 14, 14, 14, 14, 14, 14, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-28 15:25:46,259 INFO L408 AbstractCegarLoop]: === Iteration 30 === [mainErr1AssertViolationARRAY_INDEX, mainErr2EnsuresViolationMEMORY_LEAK, mainErr0AssertViolationARRAY_INDEX, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__fooErr2RequiresViolation, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__fooErr1RequiresViolation, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__fooErr0AssertViolationARRAY_INDEX]=== [2018-03-28 15:25:46,259 INFO L82 PathProgramCache]: Analyzing trace with hash 502223502, now seen corresponding path program 17 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 31 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 31 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-03-28 15:25:46,265 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-03-28 15:25:46,306 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-28 15:25:46,310 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-03-28 15:25:47,257 INFO L134 CoverageAnalysis]: Checked inductivity of 1956 backedges. 990 proven. 966 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-28 15:25:47,258 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-03-28 15:25:48,380 INFO L134 CoverageAnalysis]: Checked inductivity of 1956 backedges. 990 proven. 966 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-28 15:25:48,401 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-03-28 15:25:48,401 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [64, 64] total 95 [2018-03-28 15:25:48,401 INFO L442 AbstractCegarLoop]: Interpolant automaton has 95 states [2018-03-28 15:25:48,401 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 95 interpolants. [2018-03-28 15:25:48,402 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1120, Invalid=7810, Unknown=0, NotChecked=0, Total=8930 [2018-03-28 15:25:48,402 INFO L87 Difference]: Start difference. First operand 1576 states and 1747 transitions. Second operand 95 states. [2018-03-28 15:25:52,491 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-28 15:25:52,491 INFO L93 Difference]: Finished difference Result 2426 states and 2662 transitions. [2018-03-28 15:25:52,491 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 109 states. [2018-03-28 15:25:52,491 INFO L78 Accepts]: Start accepts. Automaton has 95 states. Word has length 293 [2018-03-28 15:25:52,491 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-28 15:25:52,496 INFO L225 Difference]: With dead ends: 2426 [2018-03-28 15:25:52,496 INFO L226 Difference]: Without dead ends: 2089 [2018-03-28 15:25:52,499 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 674 GetRequests, 460 SyntacticMatches, 31 SemanticMatches, 183 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9228 ImplicationChecksByTransitivity, 4.0s TimeCoverageRelationStatistics Valid=4984, Invalid=29056, Unknown=0, NotChecked=0, Total=34040 [2018-03-28 15:25:52,500 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2089 states. [2018-03-28 15:25:52,535 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2089 to 1721. [2018-03-28 15:25:52,535 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1721 states. [2018-03-28 15:25:52,537 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1721 states to 1721 states and 1906 transitions. [2018-03-28 15:25:52,537 INFO L78 Accepts]: Start accepts. Automaton has 1721 states and 1906 transitions. Word has length 293 [2018-03-28 15:25:52,538 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-28 15:25:52,538 INFO L459 AbstractCegarLoop]: Abstraction has 1721 states and 1906 transitions. [2018-03-28 15:25:52,538 INFO L460 AbstractCegarLoop]: Interpolant automaton has 95 states. [2018-03-28 15:25:52,538 INFO L276 IsEmpty]: Start isEmpty. Operand 1721 states and 1906 transitions. [2018-03-28 15:25:52,541 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 304 [2018-03-28 15:25:52,541 INFO L347 BasicCegarLoop]: Found error trace [2018-03-28 15:25:52,542 INFO L355 BasicCegarLoop]: trace histogram [16, 16, 16, 16, 16, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-28 15:25:52,542 INFO L408 AbstractCegarLoop]: === Iteration 31 === [mainErr1AssertViolationARRAY_INDEX, mainErr2EnsuresViolationMEMORY_LEAK, mainErr0AssertViolationARRAY_INDEX, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__fooErr2RequiresViolation, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__fooErr1RequiresViolation, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__fooErr0AssertViolationARRAY_INDEX]=== [2018-03-28 15:25:52,542 INFO L82 PathProgramCache]: Analyzing trace with hash 249011652, now seen corresponding path program 18 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 32 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 32 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-03-28 15:25:52,547 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-03-28 15:25:52,604 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-28 15:25:52,608 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-03-28 15:25:52,965 INFO L134 CoverageAnalysis]: Checked inductivity of 2100 backedges. 0 proven. 990 refuted. 0 times theorem prover too weak. 1110 trivial. 0 not checked. [2018-03-28 15:25:52,965 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-03-28 15:25:53,934 INFO L134 CoverageAnalysis]: Checked inductivity of 2100 backedges. 0 proven. 990 refuted. 0 times theorem prover too weak. 1110 trivial. 0 not checked. [2018-03-28 15:25:53,955 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-03-28 15:25:53,955 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [32, 32] total 63 [2018-03-28 15:25:53,955 INFO L442 AbstractCegarLoop]: Interpolant automaton has 64 states [2018-03-28 15:25:53,955 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 64 interpolants. [2018-03-28 15:25:53,956 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=606, Invalid=3426, Unknown=0, NotChecked=0, Total=4032 [2018-03-28 15:25:53,956 INFO L87 Difference]: Start difference. First operand 1721 states and 1906 transitions. Second operand 64 states. [2018-03-28 15:25:59,569 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-28 15:25:59,569 INFO L93 Difference]: Finished difference Result 2339 states and 3020 transitions. [2018-03-28 15:25:59,569 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 93 states. [2018-03-28 15:25:59,569 INFO L78 Accepts]: Start accepts. Automaton has 64 states. Word has length 303 [2018-03-28 15:25:59,569 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-28 15:25:59,575 INFO L225 Difference]: With dead ends: 2339 [2018-03-28 15:25:59,575 INFO L226 Difference]: Without dead ends: 2338 [2018-03-28 15:25:59,576 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 678 GetRequests, 542 SyntacticMatches, 0 SemanticMatches, 136 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3452 ImplicationChecksByTransitivity, 5.4s TimeCoverageRelationStatistics Valid=4624, Invalid=14282, Unknown=0, NotChecked=0, Total=18906 [2018-03-28 15:25:59,577 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2338 states. [2018-03-28 15:25:59,646 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2338 to 1864. [2018-03-28 15:25:59,646 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1864 states. [2018-03-28 15:25:59,649 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1864 states to 1864 states and 2080 transitions. [2018-03-28 15:25:59,649 INFO L78 Accepts]: Start accepts. Automaton has 1864 states and 2080 transitions. Word has length 303 [2018-03-28 15:25:59,650 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-28 15:25:59,650 INFO L459 AbstractCegarLoop]: Abstraction has 1864 states and 2080 transitions. [2018-03-28 15:25:59,650 INFO L460 AbstractCegarLoop]: Interpolant automaton has 64 states. [2018-03-28 15:25:59,650 INFO L276 IsEmpty]: Start isEmpty. Operand 1864 states and 2080 transitions. [2018-03-28 15:25:59,653 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 305 [2018-03-28 15:25:59,653 INFO L347 BasicCegarLoop]: Found error trace [2018-03-28 15:25:59,653 INFO L355 BasicCegarLoop]: trace histogram [16, 16, 16, 16, 16, 16, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-28 15:25:59,653 INFO L408 AbstractCegarLoop]: === Iteration 32 === [mainErr1AssertViolationARRAY_INDEX, mainErr2EnsuresViolationMEMORY_LEAK, mainErr0AssertViolationARRAY_INDEX, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__fooErr2RequiresViolation, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__fooErr1RequiresViolation, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__fooErr0AssertViolationARRAY_INDEX]=== [2018-03-28 15:25:59,653 INFO L82 PathProgramCache]: Analyzing trace with hash -870572915, now seen corresponding path program 4 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 33 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 33 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-03-28 15:25:59,661 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-03-28 15:25:59,702 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-28 15:25:59,709 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-03-28 15:25:59,713 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-03-28 15:25:59,714 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-03-28 15:25:59,723 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-28 15:25:59,723 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-03-28 15:26:00,485 INFO L134 CoverageAnalysis]: Checked inductivity of 2115 backedges. 0 proven. 1005 refuted. 0 times theorem prover too weak. 1110 trivial. 0 not checked. [2018-03-28 15:26:00,485 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-03-28 15:26:01,676 INFO L134 CoverageAnalysis]: Checked inductivity of 2115 backedges. 0 proven. 1005 refuted. 0 times theorem prover too weak. 1110 trivial. 0 not checked. [2018-03-28 15:26:01,696 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-03-28 15:26:01,697 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [35, 35] total 69 [2018-03-28 15:26:01,697 INFO L442 AbstractCegarLoop]: Interpolant automaton has 70 states [2018-03-28 15:26:01,697 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 70 interpolants. [2018-03-28 15:26:01,698 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=683, Invalid=4147, Unknown=0, NotChecked=0, Total=4830 [2018-03-28 15:26:01,698 INFO L87 Difference]: Start difference. First operand 1864 states and 2080 transitions. Second operand 70 states. [2018-03-28 15:26:04,972 WARN L151 SmtUtils]: Spent 106ms on a formula simplification. DAG size of input: 129 DAG size of output 27 [2018-03-28 15:26:05,355 WARN L151 SmtUtils]: Spent 126ms on a formula simplification. DAG size of input: 125 DAG size of output 26 [2018-03-28 15:26:10,994 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-28 15:26:10,995 INFO L93 Difference]: Finished difference Result 2319 states and 3000 transitions. [2018-03-28 15:26:10,995 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 96 states. [2018-03-28 15:26:10,995 INFO L78 Accepts]: Start accepts. Automaton has 70 states. Word has length 304 [2018-03-28 15:26:10,995 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-28 15:26:11,001 INFO L225 Difference]: With dead ends: 2319 [2018-03-28 15:26:11,001 INFO L226 Difference]: Without dead ends: 2318 [2018-03-28 15:26:11,002 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 698 GetRequests, 538 SyntacticMatches, 0 SemanticMatches, 160 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5800 ImplicationChecksByTransitivity, 8.7s TimeCoverageRelationStatistics Valid=5590, Invalid=20492, Unknown=0, NotChecked=0, Total=26082 [2018-03-28 15:26:11,003 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2318 states. [2018-03-28 15:26:11,066 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2318 to 1865. [2018-03-28 15:26:11,066 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1865 states. [2018-03-28 15:26:11,068 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1865 states to 1865 states and 2066 transitions. [2018-03-28 15:26:11,068 INFO L78 Accepts]: Start accepts. Automaton has 1865 states and 2066 transitions. Word has length 304 [2018-03-28 15:26:11,069 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-28 15:26:11,069 INFO L459 AbstractCegarLoop]: Abstraction has 1865 states and 2066 transitions. [2018-03-28 15:26:11,069 INFO L460 AbstractCegarLoop]: Interpolant automaton has 70 states. [2018-03-28 15:26:11,069 INFO L276 IsEmpty]: Start isEmpty. Operand 1865 states and 2066 transitions. [2018-03-28 15:26:11,072 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 328 [2018-03-28 15:26:11,072 INFO L347 BasicCegarLoop]: Found error trace [2018-03-28 15:26:11,072 INFO L355 BasicCegarLoop]: trace histogram [32, 31, 31, 31, 31, 31, 31, 31, 31, 31, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-28 15:26:11,072 INFO L408 AbstractCegarLoop]: === Iteration 33 === [mainErr1AssertViolationARRAY_INDEX, mainErr2EnsuresViolationMEMORY_LEAK, mainErr0AssertViolationARRAY_INDEX, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__fooErr2RequiresViolation, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__fooErr1RequiresViolation, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__fooErr0AssertViolationARRAY_INDEX]=== [2018-03-28 15:26:11,072 INFO L82 PathProgramCache]: Analyzing trace with hash -1413277598, now seen corresponding path program 5 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 34 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 34 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-03-28 15:26:11,078 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-03-28 15:26:11,114 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-28 15:26:11,119 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-03-28 15:26:12,036 INFO L134 CoverageAnalysis]: Checked inductivity of 4712 backedges. 0 proven. 4712 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-28 15:26:12,036 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-03-28 15:26:13,040 INFO L134 CoverageAnalysis]: Checked inductivity of 4712 backedges. 0 proven. 4712 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-28 15:26:13,061 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-03-28 15:26:13,061 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [65, 65] total 65 [2018-03-28 15:26:13,062 INFO L442 AbstractCegarLoop]: Interpolant automaton has 65 states [2018-03-28 15:26:13,063 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 65 interpolants. [2018-03-28 15:26:13,063 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1088, Invalid=3072, Unknown=0, NotChecked=0, Total=4160 [2018-03-28 15:26:13,063 INFO L87 Difference]: Start difference. First operand 1865 states and 2066 transitions. Second operand 65 states. [2018-03-28 15:26:14,615 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-28 15:26:14,615 INFO L93 Difference]: Finished difference Result 1905 states and 2109 transitions. [2018-03-28 15:26:14,616 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 96 states. [2018-03-28 15:26:14,616 INFO L78 Accepts]: Start accepts. Automaton has 65 states. Word has length 327 [2018-03-28 15:26:14,616 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-28 15:26:14,620 INFO L225 Difference]: With dead ends: 1905 [2018-03-28 15:26:14,620 INFO L226 Difference]: Without dead ends: 1885 [2018-03-28 15:26:14,621 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 714 GetRequests, 526 SyntacticMatches, 63 SemanticMatches, 125 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5673 ImplicationChecksByTransitivity, 2.9s TimeCoverageRelationStatistics Valid=5118, Invalid=10884, Unknown=0, NotChecked=0, Total=16002 [2018-03-28 15:26:14,622 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1885 states. [2018-03-28 15:26:14,653 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1885 to 1875. [2018-03-28 15:26:14,653 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1875 states. [2018-03-28 15:26:14,655 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1875 states to 1875 states and 2078 transitions. [2018-03-28 15:26:14,656 INFO L78 Accepts]: Start accepts. Automaton has 1875 states and 2078 transitions. Word has length 327 [2018-03-28 15:26:14,656 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-28 15:26:14,656 INFO L459 AbstractCegarLoop]: Abstraction has 1875 states and 2078 transitions. [2018-03-28 15:26:14,656 INFO L460 AbstractCegarLoop]: Interpolant automaton has 65 states. [2018-03-28 15:26:14,656 INFO L276 IsEmpty]: Start isEmpty. Operand 1875 states and 2078 transitions. [2018-03-28 15:26:14,659 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 338 [2018-03-28 15:26:14,659 INFO L347 BasicCegarLoop]: Found error trace [2018-03-28 15:26:14,660 INFO L355 BasicCegarLoop]: trace histogram [33, 32, 32, 32, 32, 32, 32, 32, 32, 32, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-28 15:26:14,660 INFO L408 AbstractCegarLoop]: === Iteration 34 === [mainErr1AssertViolationARRAY_INDEX, mainErr2EnsuresViolationMEMORY_LEAK, mainErr0AssertViolationARRAY_INDEX, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__fooErr2RequiresViolation, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__fooErr1RequiresViolation, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__fooErr0AssertViolationARRAY_INDEX]=== [2018-03-28 15:26:14,660 INFO L82 PathProgramCache]: Analyzing trace with hash -1802430952, now seen corresponding path program 6 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 35 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 35 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-03-28 15:26:14,665 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-03-28 15:26:14,710 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-28 15:26:14,713 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-03-28 15:26:14,791 WARN L1033 $PredicateComparison]: unable to prove that (exists ((|main_~#mask~0.base| Int)) (and (= (store |c_old(#valid)| |main_~#mask~0.base| 0) |c_#valid|) (= (select |c_old(#valid)| |main_~#mask~0.base|) 0))) is different from true [2018-03-28 15:26:15,067 INFO L134 CoverageAnalysis]: Checked inductivity of 5024 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 5024 trivial. 0 not checked. [2018-03-28 15:26:15,067 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-03-28 15:26:15,097 WARN L1011 $PredicateComparison]: unable to prove that (forall ((|v_main_~#mask~0.base_35| Int)) (or (not (= (select |c_#valid| |v_main_~#mask~0.base_35|) 0)) (= (store |c_#valid| |v_main_~#mask~0.base_35| 0) |c_old(#valid)|))) is different from false [2018-03-28 15:26:15,221 INFO L134 CoverageAnalysis]: Checked inductivity of 5024 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 5024 trivial. 0 not checked. [2018-03-28 15:26:15,254 INFO L320 seRefinementStrategy]: Constructing automaton from 2 perfect and 0 imperfect interpolant sequences. [2018-03-28 15:26:15,255 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4, 4] imperfect sequences [] total 6 [2018-03-28 15:26:15,255 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-03-28 15:26:15,256 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-03-28 15:26:15,256 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=14, Unknown=2, NotChecked=14, Total=42 [2018-03-28 15:26:15,256 INFO L87 Difference]: Start difference. First operand 1875 states and 2078 transitions. Second operand 7 states. [2018-03-28 15:26:15,276 WARN L1011 $PredicateComparison]: unable to prove that (and (forall ((|v_main_~#mask~0.base_35| Int)) (or (not (= (select |c_#valid| |v_main_~#mask~0.base_35|) 0)) (= (store |c_#valid| |v_main_~#mask~0.base_35| 0) |c_old(#valid)|))) (= |c_#valid| |c_old(#valid)|)) is different from false [2018-03-28 15:26:15,384 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-28 15:26:15,384 INFO L93 Difference]: Finished difference Result 1876 states and 2079 transitions. [2018-03-28 15:26:15,384 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-03-28 15:26:15,384 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 337 [2018-03-28 15:26:15,384 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-28 15:26:15,388 INFO L225 Difference]: With dead ends: 1876 [2018-03-28 15:26:15,389 INFO L226 Difference]: Without dead ends: 1867 [2018-03-28 15:26:15,389 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 676 GetRequests, 667 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 3 IntricatePredicates, 1 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=29, Invalid=35, Unknown=4, NotChecked=42, Total=110 [2018-03-28 15:26:15,390 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1867 states. [2018-03-28 15:26:15,430 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1867 to 1867. [2018-03-28 15:26:15,430 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1867 states. [2018-03-28 15:26:15,432 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1867 states to 1867 states and 2069 transitions. [2018-03-28 15:26:15,433 INFO L78 Accepts]: Start accepts. Automaton has 1867 states and 2069 transitions. Word has length 337 [2018-03-28 15:26:15,433 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-28 15:26:15,433 INFO L459 AbstractCegarLoop]: Abstraction has 1867 states and 2069 transitions. [2018-03-28 15:26:15,433 INFO L460 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-03-28 15:26:15,433 INFO L276 IsEmpty]: Start isEmpty. Operand 1867 states and 2069 transitions. [2018-03-28 15:26:15,436 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 340 [2018-03-28 15:26:15,436 INFO L347 BasicCegarLoop]: Found error trace [2018-03-28 15:26:15,436 INFO L355 BasicCegarLoop]: trace histogram [33, 32, 32, 32, 32, 32, 32, 32, 32, 32, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-28 15:26:15,437 INFO L408 AbstractCegarLoop]: === Iteration 35 === [mainErr1AssertViolationARRAY_INDEX, mainErr2EnsuresViolationMEMORY_LEAK, mainErr0AssertViolationARRAY_INDEX, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__fooErr2RequiresViolation, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__fooErr1RequiresViolation, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__fooErr0AssertViolationARRAY_INDEX]=== [2018-03-28 15:26:15,437 INFO L82 PathProgramCache]: Analyzing trace with hash 569815956, now seen corresponding path program 1 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 36 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 36 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-03-28 15:26:15,442 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-03-28 15:26:15,484 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-28 15:26:15,487 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-03-28 15:26:15,615 INFO L134 CoverageAnalysis]: Checked inductivity of 5027 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 5024 trivial. 0 not checked. [2018-03-28 15:26:15,615 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-03-28 15:26:15,677 INFO L134 CoverageAnalysis]: Checked inductivity of 5027 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 5024 trivial. 0 not checked. [2018-03-28 15:26:15,710 INFO L320 seRefinementStrategy]: Constructing automaton from 2 perfect and 0 imperfect interpolant sequences. [2018-03-28 15:26:15,710 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5, 5] imperfect sequences [] total 8 [2018-03-28 15:26:15,711 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-03-28 15:26:15,711 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-03-28 15:26:15,711 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=47, Unknown=0, NotChecked=0, Total=72 [2018-03-28 15:26:15,712 INFO L87 Difference]: Start difference. First operand 1867 states and 2069 transitions. Second operand 9 states. [2018-03-28 15:26:15,869 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-28 15:26:15,869 INFO L93 Difference]: Finished difference Result 1870 states and 2072 transitions. [2018-03-28 15:26:15,870 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-03-28 15:26:15,870 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 339 [2018-03-28 15:26:15,870 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-28 15:26:15,875 INFO L225 Difference]: With dead ends: 1870 [2018-03-28 15:26:15,875 INFO L226 Difference]: Without dead ends: 1855 [2018-03-28 15:26:15,876 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 679 GetRequests, 668 SyntacticMatches, 1 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=50, Invalid=82, Unknown=0, NotChecked=0, Total=132 [2018-03-28 15:26:15,877 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1855 states. [2018-03-28 15:26:15,914 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1855 to 1687. [2018-03-28 15:26:15,914 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1687 states. [2018-03-28 15:26:15,916 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1687 states to 1687 states and 1856 transitions. [2018-03-28 15:26:15,916 INFO L78 Accepts]: Start accepts. Automaton has 1687 states and 1856 transitions. Word has length 339 [2018-03-28 15:26:15,916 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-28 15:26:15,916 INFO L459 AbstractCegarLoop]: Abstraction has 1687 states and 1856 transitions. [2018-03-28 15:26:15,916 INFO L460 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-03-28 15:26:15,916 INFO L276 IsEmpty]: Start isEmpty. Operand 1687 states and 1856 transitions. [2018-03-28 15:26:15,919 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 448 [2018-03-28 15:26:15,919 INFO L347 BasicCegarLoop]: Found error trace [2018-03-28 15:26:15,919 INFO L355 BasicCegarLoop]: trace histogram [32, 32, 31, 31, 31, 31, 31, 31, 31, 16, 16, 16, 15, 15, 15, 15, 15, 15, 15, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-28 15:26:15,919 INFO L408 AbstractCegarLoop]: === Iteration 36 === [mainErr1AssertViolationARRAY_INDEX, mainErr2EnsuresViolationMEMORY_LEAK, mainErr0AssertViolationARRAY_INDEX, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__fooErr2RequiresViolation, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__fooErr1RequiresViolation, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__fooErr0AssertViolationARRAY_INDEX]=== [2018-03-28 15:26:15,920 INFO L82 PathProgramCache]: Analyzing trace with hash 2072847556, now seen corresponding path program 19 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 37 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 37 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-03-28 15:26:15,927 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-03-28 15:26:15,997 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-28 15:26:16,003 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-03-28 15:26:17,150 INFO L134 CoverageAnalysis]: Checked inductivity of 5388 backedges. 3318 proven. 1110 refuted. 0 times theorem prover too weak. 960 trivial. 0 not checked. [2018-03-28 15:26:17,150 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-03-28 15:26:18,867 INFO L134 CoverageAnalysis]: Checked inductivity of 5388 backedges. 3318 proven. 1110 refuted. 0 times theorem prover too weak. 960 trivial. 0 not checked. [2018-03-28 15:26:18,888 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-03-28 15:26:18,888 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [68, 68] total 101 [2018-03-28 15:26:18,888 INFO L442 AbstractCegarLoop]: Interpolant automaton has 101 states [2018-03-28 15:26:18,889 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 101 interpolants. [2018-03-28 15:26:18,889 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1258, Invalid=8842, Unknown=0, NotChecked=0, Total=10100 [2018-03-28 15:26:18,889 INFO L87 Difference]: Start difference. First operand 1687 states and 1856 transitions. Second operand 101 states. [2018-03-28 15:26:22,787 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-28 15:26:22,788 INFO L93 Difference]: Finished difference Result 2567 states and 2788 transitions. [2018-03-28 15:26:22,788 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 116 states. [2018-03-28 15:26:22,788 INFO L78 Accepts]: Start accepts. Automaton has 101 states. Word has length 447 [2018-03-28 15:26:22,788 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-28 15:26:22,792 INFO L225 Difference]: With dead ends: 2567 [2018-03-28 15:26:22,792 INFO L226 Difference]: Without dead ends: 2264 [2018-03-28 15:26:22,794 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 988 GetRequests, 760 SyntacticMatches, 33 SemanticMatches, 195 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10524 ImplicationChecksByTransitivity, 4.9s TimeCoverageRelationStatistics Valid=5619, Invalid=32993, Unknown=0, NotChecked=0, Total=38612 [2018-03-28 15:26:22,795 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2264 states. [2018-03-28 15:26:22,837 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2264 to 1851. [2018-03-28 15:26:22,837 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1851 states. [2018-03-28 15:26:22,839 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1851 states to 1851 states and 2037 transitions. [2018-03-28 15:26:22,839 INFO L78 Accepts]: Start accepts. Automaton has 1851 states and 2037 transitions. Word has length 447 [2018-03-28 15:26:22,839 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-28 15:26:22,839 INFO L459 AbstractCegarLoop]: Abstraction has 1851 states and 2037 transitions. [2018-03-28 15:26:22,839 INFO L460 AbstractCegarLoop]: Interpolant automaton has 101 states. [2018-03-28 15:26:22,839 INFO L276 IsEmpty]: Start isEmpty. Operand 1851 states and 2037 transitions. [2018-03-28 15:26:22,842 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 458 [2018-03-28 15:26:22,842 INFO L347 BasicCegarLoop]: Found error trace [2018-03-28 15:26:22,842 INFO L355 BasicCegarLoop]: trace histogram [32, 32, 31, 31, 31, 31, 31, 31, 31, 17, 17, 17, 16, 16, 16, 16, 16, 16, 16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-28 15:26:22,842 INFO L408 AbstractCegarLoop]: === Iteration 37 === [mainErr1AssertViolationARRAY_INDEX, mainErr2EnsuresViolationMEMORY_LEAK, mainErr0AssertViolationARRAY_INDEX, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__fooErr2RequiresViolation, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__fooErr1RequiresViolation, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__fooErr0AssertViolationARRAY_INDEX]=== [2018-03-28 15:26:22,843 INFO L82 PathProgramCache]: Analyzing trace with hash -419047302, now seen corresponding path program 20 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 38 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 38 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-03-28 15:26:22,848 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-03-28 15:26:22,908 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-28 15:26:22,915 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-03-28 15:26:24,159 INFO L134 CoverageAnalysis]: Checked inductivity of 5542 backedges. 3445 proven. 1264 refuted. 0 times theorem prover too weak. 833 trivial. 0 not checked. [2018-03-28 15:26:24,159 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-03-28 15:26:25,559 INFO L134 CoverageAnalysis]: Checked inductivity of 5542 backedges. 3445 proven. 1264 refuted. 0 times theorem prover too weak. 833 trivial. 0 not checked. [2018-03-28 15:26:25,581 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-03-28 15:26:25,582 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [72, 72] total 107 [2018-03-28 15:26:25,582 INFO L442 AbstractCegarLoop]: Interpolant automaton has 107 states [2018-03-28 15:26:25,583 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 107 interpolants. [2018-03-28 15:26:25,583 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1404, Invalid=9938, Unknown=0, NotChecked=0, Total=11342 [2018-03-28 15:26:25,584 INFO L87 Difference]: Start difference. First operand 1851 states and 2037 transitions. Second operand 107 states. [2018-03-28 15:26:30,217 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-28 15:26:30,217 INFO L93 Difference]: Finished difference Result 2791 states and 3030 transitions. [2018-03-28 15:26:30,218 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 123 states. [2018-03-28 15:26:30,218 INFO L78 Accepts]: Start accepts. Automaton has 107 states. Word has length 457 [2018-03-28 15:26:30,218 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-28 15:26:30,225 INFO L225 Difference]: With dead ends: 2791 [2018-03-28 15:26:30,225 INFO L226 Difference]: Without dead ends: 2488 [2018-03-28 15:26:30,230 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 1014 GetRequests, 772 SyntacticMatches, 35 SemanticMatches, 207 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11905 ImplicationChecksByTransitivity, 5.1s TimeCoverageRelationStatistics Valid=6292, Invalid=37180, Unknown=0, NotChecked=0, Total=43472 [2018-03-28 15:26:30,232 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2488 states. [2018-03-28 15:26:30,285 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2488 to 2024. [2018-03-28 15:26:30,286 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2024 states. [2018-03-28 15:26:30,287 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2024 states to 2024 states and 2228 transitions. [2018-03-28 15:26:30,288 INFO L78 Accepts]: Start accepts. Automaton has 2024 states and 2228 transitions. Word has length 457 [2018-03-28 15:26:30,288 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-28 15:26:30,288 INFO L459 AbstractCegarLoop]: Abstraction has 2024 states and 2228 transitions. [2018-03-28 15:26:30,288 INFO L460 AbstractCegarLoop]: Interpolant automaton has 107 states. [2018-03-28 15:26:30,288 INFO L276 IsEmpty]: Start isEmpty. Operand 2024 states and 2228 transitions. [2018-03-28 15:26:30,291 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 468 [2018-03-28 15:26:30,291 INFO L347 BasicCegarLoop]: Found error trace [2018-03-28 15:26:30,291 INFO L355 BasicCegarLoop]: trace histogram [32, 32, 31, 31, 31, 31, 31, 31, 31, 18, 18, 18, 17, 17, 17, 17, 17, 17, 17, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-28 15:26:30,292 INFO L408 AbstractCegarLoop]: === Iteration 38 === [mainErr1AssertViolationARRAY_INDEX, mainErr2EnsuresViolationMEMORY_LEAK, mainErr0AssertViolationARRAY_INDEX, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__fooErr2RequiresViolation, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__fooErr1RequiresViolation, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__fooErr0AssertViolationARRAY_INDEX]=== [2018-03-28 15:26:30,292 INFO L82 PathProgramCache]: Analyzing trace with hash 538042544, now seen corresponding path program 21 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 39 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 39 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-03-28 15:26:30,311 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-03-28 15:26:30,391 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-28 15:26:30,396 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-03-28 15:26:31,808 INFO L134 CoverageAnalysis]: Checked inductivity of 5706 backedges. 3563 proven. 1428 refuted. 0 times theorem prover too weak. 715 trivial. 0 not checked. [2018-03-28 15:26:31,809 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-03-28 15:26:33,502 INFO L134 CoverageAnalysis]: Checked inductivity of 5706 backedges. 3563 proven. 1428 refuted. 0 times theorem prover too weak. 715 trivial. 0 not checked. [2018-03-28 15:26:33,522 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-03-28 15:26:33,522 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [76, 76] total 113 [2018-03-28 15:26:33,523 INFO L442 AbstractCegarLoop]: Interpolant automaton has 113 states [2018-03-28 15:26:33,523 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 113 interpolants. [2018-03-28 15:26:33,524 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1558, Invalid=11098, Unknown=0, NotChecked=0, Total=12656 [2018-03-28 15:26:33,524 INFO L87 Difference]: Start difference. First operand 2024 states and 2228 transitions. Second operand 113 states. [2018-03-28 15:26:38,691 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-28 15:26:38,691 INFO L93 Difference]: Finished difference Result 3027 states and 3285 transitions. [2018-03-28 15:26:38,721 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 130 states. [2018-03-28 15:26:38,721 INFO L78 Accepts]: Start accepts. Automaton has 113 states. Word has length 467 [2018-03-28 15:26:38,721 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-28 15:26:38,726 INFO L225 Difference]: With dead ends: 3027 [2018-03-28 15:26:38,726 INFO L226 Difference]: Without dead ends: 2724 [2018-03-28 15:26:38,728 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 1040 GetRequests, 784 SyntacticMatches, 37 SemanticMatches, 219 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13371 ImplicationChecksByTransitivity, 5.7s TimeCoverageRelationStatistics Valid=7003, Invalid=41617, Unknown=0, NotChecked=0, Total=48620 [2018-03-28 15:26:38,730 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2724 states. [2018-03-28 15:26:38,792 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2724 to 2206. [2018-03-28 15:26:38,793 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2206 states. [2018-03-28 15:26:38,794 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2206 states to 2206 states and 2429 transitions. [2018-03-28 15:26:38,795 INFO L78 Accepts]: Start accepts. Automaton has 2206 states and 2429 transitions. Word has length 467 [2018-03-28 15:26:38,795 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-28 15:26:38,795 INFO L459 AbstractCegarLoop]: Abstraction has 2206 states and 2429 transitions. [2018-03-28 15:26:38,795 INFO L460 AbstractCegarLoop]: Interpolant automaton has 113 states. [2018-03-28 15:26:38,795 INFO L276 IsEmpty]: Start isEmpty. Operand 2206 states and 2429 transitions. [2018-03-28 15:26:38,798 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 478 [2018-03-28 15:26:38,798 INFO L347 BasicCegarLoop]: Found error trace [2018-03-28 15:26:38,798 INFO L355 BasicCegarLoop]: trace histogram [32, 32, 31, 31, 31, 31, 31, 31, 31, 19, 19, 19, 18, 18, 18, 18, 18, 18, 18, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-28 15:26:38,798 INFO L408 AbstractCegarLoop]: === Iteration 39 === [mainErr1AssertViolationARRAY_INDEX, mainErr2EnsuresViolationMEMORY_LEAK, mainErr0AssertViolationARRAY_INDEX, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__fooErr2RequiresViolation, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__fooErr1RequiresViolation, __U_MULTI_fArraysWithLenghtAtDeclaration_true_valid_memsafety_true_termination_c__fooErr0AssertViolationARRAY_INDEX]=== [2018-03-28 15:26:38,799 INFO L82 PathProgramCache]: Analyzing trace with hash 133274982, now seen corresponding path program 22 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 40 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 40 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-03-28 15:26:38,811 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-03-28 15:26:38,879 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-28 15:26:38,884 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-03-28 15:26:40,285 INFO L134 CoverageAnalysis]: Checked inductivity of 5880 backedges. 3672 proven. 1602 refuted. 0 times theorem prover too weak. 606 trivial. 0 not checked. [2018-03-28 15:26:40,285 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-03-28 15:26:42,015 INFO L134 CoverageAnalysis]: Checked inductivity of 5880 backedges. 3672 proven. 1602 refuted. 0 times theorem prover too weak. 606 trivial. 0 not checked. [2018-03-28 15:26:42,036 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-03-28 15:26:42,036 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [80, 80] total 119 [2018-03-28 15:26:42,036 INFO L442 AbstractCegarLoop]: Interpolant automaton has 119 states [2018-03-28 15:26:42,037 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 119 interpolants. [2018-03-28 15:26:42,037 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1720, Invalid=12322, Unknown=0, NotChecked=0, Total=14042 [2018-03-28 15:26:42,037 INFO L87 Difference]: Start difference. First operand 2206 states and 2429 transitions. Second operand 119 states. Received shutdown request... [2018-03-28 15:26:47,660 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 119 states. [2018-03-28 15:26:47,660 WARN L519 AbstractCegarLoop]: Verification canceled [2018-03-28 15:26:47,663 WARN L197 ceAbstractionStarter]: Timeout [2018-03-28 15:26:47,663 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 28.03 03:26:47 BasicIcfg [2018-03-28 15:26:47,663 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-03-28 15:26:47,664 INFO L168 Benchmark]: Toolchain (without parser) took 115490.27 ms. Allocated memory was 308.8 MB in the beginning and 1.1 GB in the end (delta: 826.3 MB). Free memory was 251.8 MB in the beginning and 686.2 MB in the end (delta: -434.4 MB). Peak memory consumption was 391.9 MB. Max. memory is 5.3 GB. [2018-03-28 15:26:47,664 INFO L168 Benchmark]: CDTParser took 0.20 ms. Allocated memory is still 308.8 MB. Free memory is still 270.8 MB. There was no memory consumed. Max. memory is 5.3 GB. [2018-03-28 15:26:47,664 INFO L168 Benchmark]: CACSL2BoogieTranslator took 214.66 ms. Allocated memory is still 308.8 MB. Free memory was 250.8 MB in the beginning and 241.8 MB in the end (delta: 9.0 MB). Peak memory consumption was 9.0 MB. Max. memory is 5.3 GB. [2018-03-28 15:26:47,665 INFO L168 Benchmark]: Boogie Preprocessor took 26.67 ms. Allocated memory is still 308.8 MB. Free memory was 241.8 MB in the beginning and 239.8 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 5.3 GB. [2018-03-28 15:26:47,665 INFO L168 Benchmark]: RCFGBuilder took 347.01 ms. Allocated memory was 308.8 MB in the beginning and 449.3 MB in the end (delta: 140.5 MB). Free memory was 239.8 MB in the beginning and 415.8 MB in the end (delta: -176.0 MB). Peak memory consumption was 23.6 MB. Max. memory is 5.3 GB. [2018-03-28 15:26:47,665 INFO L168 Benchmark]: IcfgTransformer took 3588.77 ms. Allocated memory was 449.3 MB in the beginning and 623.4 MB in the end (delta: 174.1 MB). Free memory was 415.8 MB in the beginning and 419.7 MB in the end (delta: -3.9 MB). Peak memory consumption was 170.1 MB. Max. memory is 5.3 GB. [2018-03-28 15:26:47,665 INFO L168 Benchmark]: TraceAbstraction took 111306.96 ms. Allocated memory was 623.4 MB in the beginning and 1.1 GB in the end (delta: 511.7 MB). Free memory was 419.7 MB in the beginning and 686.2 MB in the end (delta: -266.5 MB). Peak memory consumption was 245.2 MB. Max. memory is 5.3 GB. [2018-03-28 15:26:47,667 INFO L344 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.20 ms. Allocated memory is still 308.8 MB. Free memory is still 270.8 MB. There was no memory consumed. Max. memory is 5.3 GB. * CACSL2BoogieTranslator took 214.66 ms. Allocated memory is still 308.8 MB. Free memory was 250.8 MB in the beginning and 241.8 MB in the end (delta: 9.0 MB). Peak memory consumption was 9.0 MB. Max. memory is 5.3 GB. * Boogie Preprocessor took 26.67 ms. Allocated memory is still 308.8 MB. Free memory was 241.8 MB in the beginning and 239.8 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 5.3 GB. * RCFGBuilder took 347.01 ms. Allocated memory was 308.8 MB in the beginning and 449.3 MB in the end (delta: 140.5 MB). Free memory was 239.8 MB in the beginning and 415.8 MB in the end (delta: -176.0 MB). Peak memory consumption was 23.6 MB. Max. memory is 5.3 GB. * IcfgTransformer took 3588.77 ms. Allocated memory was 449.3 MB in the beginning and 623.4 MB in the end (delta: 174.1 MB). Free memory was 415.8 MB in the beginning and 419.7 MB in the end (delta: -3.9 MB). Peak memory consumption was 170.1 MB. Max. memory is 5.3 GB. * TraceAbstraction took 111306.96 ms. Allocated memory was 623.4 MB in the beginning and 1.1 GB in the end (delta: 511.7 MB). Free memory was 419.7 MB in the beginning and 686.2 MB in the end (delta: -266.5 MB). Peak memory consumption was 245.2 MB. Max. memory is 5.3 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.analysis.abstractinterpretationv2: - StatisticsResult: ArrayEqualityDomainStatistics #Locations : 59 LocStat_MAX_WEQGRAPH_SIZE : 2 LocStat_MAX_SIZEOF_WEQEDGELABEL : 1 LocStat_NO_SUPPORTING_EQUALITIES : 253 LocStat_NO_SUPPORTING_DISEQUALITIES : 104 LocStat_NO_DISJUNCTIONS : -118 LocStat_MAX_NO_DISJUNCTIONS : -1 #Transitions : 79 TransStat_MAX_WEQGRAPH_SIZE : 2 TransStat_MAX_SIZEOF_WEQEDGELABEL : 1 TransStat_NO_SUPPORTING_EQUALITIES : 60 TransStat_NO_SUPPORTING_DISEQUALITIES : 7 TransStat_NO_DISJUNCTIONS : 80 TransStat_MAX_NO_DISJUNCTIONS : 2 - StatisticsResult: EqConstraintFactoryStatistics CONJOIN_DISJUNCTIVE(MILLISECONDS) : 0.017068 RENAME_VARIABLES(MILLISECONDS) : 0.315118 UNFREEZE(MILLISECONDS) : 0.000000 CONJOIN(MILLISECONDS) : 0.001088 PROJECTAWAY(MILLISECONDS) : 0.262445 ADD_WEAK_EQUALITY(MILLISECONDS) : 0.091644 DISJOIN(MILLISECONDS) : 0.338049 RENAME_VARIABLES_DISJUNCTIVE(MILLISECONDS) : 0.346534 ADD_EQUALITY(MILLISECONDS) : 0.036962 DISJOIN_DISJUNCTIVE(MILLISECONDS) : 0.000000 ADD_DISEQUALITY(MILLISECONDS) : 0.057048 #CONJOIN_DISJUNCTIVE : 433 #RENAME_VARIABLES : 925 #UNFREEZE : 0 #CONJOIN : 543 #PROJECTAWAY : 577 #ADD_WEAK_EQUALITY : 7 #DISJOIN : 92 #RENAME_VARIABLES_DISJUNCTIVE : 918 #ADD_EQUALITY : 60 #DISJOIN_DISJUNCTIVE : 0 #ADD_DISEQUALITY : 4 * Results from de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation: - StatisticsResult: HeapSeparatorStatistics #COUNT_NEW_ARRAY_VARS_[#memory_int] : 1 COUNT_ARRAY_WRITES_for_[#memory_int]_at_dim_0 : 1 COUNT_BLOCKS_for_[#memory_int]_at_dim_0 : 1 COUNT_ARRAY_WRITES_for_[#memory_int]_at_dim_1 : 1 COUNT_BLOCKS_for_[#memory_int]_at_dim_1 : 1 COUNT_ARRAY_READS for [#memory_int] : 1 * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - TimeoutResultAtElement [Line: 30]: Timeout (TraceAbstraction) Unable to prove that array index is always in bounds (line 30). Cancelled while BasicCegarLoop was constructing difference of abstraction (2206states) and interpolant automaton (currently 119 states, 119 states before enhancement), while PredicateComparison was comparing new predicate (quantifier-free) to 215 known predicates. - TimeoutResultAtElement [Line: 23]: Timeout (TraceAbstraction) Unable to prove that all allocated memory was freed (line 23). Cancelled while BasicCegarLoop was constructing difference of abstraction (2206states) and interpolant automaton (currently 119 states, 119 states before enhancement), while PredicateComparison was comparing new predicate (quantifier-free) to 215 known predicates. - TimeoutResultAtElement [Line: 27]: Timeout (TraceAbstraction) Unable to prove that array index is always in bounds (line 27). Cancelled while BasicCegarLoop was constructing difference of abstraction (2206states) and interpolant automaton (currently 119 states, 119 states before enhancement), while PredicateComparison was comparing new predicate (quantifier-free) to 215 known predicates. - TimeoutResultAtElement [Line: 18]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 18). Cancelled while BasicCegarLoop was constructing difference of abstraction (2206states) and interpolant automaton (currently 119 states, 119 states before enhancement), while PredicateComparison was comparing new predicate (quantifier-free) to 215 known predicates. - TimeoutResultAtElement [Line: 18]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 18). Cancelled while BasicCegarLoop was constructing difference of abstraction (2206states) and interpolant automaton (currently 119 states, 119 states before enhancement), while PredicateComparison was comparing new predicate (quantifier-free) to 215 known predicates. - TimeoutResultAtElement [Line: 18]: Timeout (TraceAbstraction) Unable to prove that array index is always in bounds (line 18). Cancelled while BasicCegarLoop was constructing difference of abstraction (2206states) and interpolant automaton (currently 119 states, 119 states before enhancement), while PredicateComparison was comparing new predicate (quantifier-free) to 215 known predicates. - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 61 locations, 6 error locations. TIMEOUT Result, 111.2s OverallTime, 39 OverallIterations, 33 TraceHistogramMax, 70.3s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 3076 SDtfs, 9358 SDslu, 39776 SDs, 0 SdLazy, 62832 SolverSat, 2143 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 21.0s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 15743 GetRequests, 12031 SyntacticMatches, 465 SemanticMatches, 3246 ConstructedPredicates, 3 IntricatePredicates, 1 DeprecatedPredicates, 120788 ImplicationChecksByTransitivity, 74.1s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=2206occurred in iteration=38, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 1.1s AutomataMinimizationTime, 38 MinimizatonAttempts, 5144 StatesRemovedByMinimization, 36 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.3s SsaConstructionTime, 0.9s SatisfiabilityAnalysisTime, 36.8s InterpolantComputationTime, 7114 NumberOfCodeBlocks, 7114 NumberOfCodeBlocksAsserted, 39 NumberOfCheckSat, 14150 ConstructedInterpolants, 5 QuantifiedInterpolants, 17483076 SizeOfPredicates, 1023 NumberOfNonLiveVariables, 11349 ConjunctsInSsa, 1259 ConjunctsInUnsatCore, 78 InterpolantComputations, 16 PerfectInterpolantSequences, 77578/115442 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: Timeout Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/ArraysWithLenghtAtDeclaration_true-valid-memsafety_true-termination.c_svcomp-DerefFreeMemtrack-32bit-Automizer_Fixed_noBitfields+AI_EQ_SS.epf_AutomizerCTransformed.xml/Csv-Benchmark-0-2018-03-28_15-26-47-677.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/ArraysWithLenghtAtDeclaration_true-valid-memsafety_true-termination.c_svcomp-DerefFreeMemtrack-32bit-Automizer_Fixed_noBitfields+AI_EQ_SS.epf_AutomizerCTransformed.xml/Csv-VPDomainBenchmark-0-2018-03-28_15-26-47-677.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/ArraysWithLenghtAtDeclaration_true-valid-memsafety_true-termination.c_svcomp-DerefFreeMemtrack-32bit-Automizer_Fixed_noBitfields+AI_EQ_SS.epf_AutomizerCTransformed.xml/Csv-BenchmarkWithCounters-0-2018-03-28_15-26-47-677.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/ArraysWithLenghtAtDeclaration_true-valid-memsafety_true-termination.c_svcomp-DerefFreeMemtrack-32bit-Automizer_Fixed_noBitfields+AI_EQ_SS.epf_AutomizerCTransformed.xml/Csv-HeapSeparatorBenchmark-0-2018-03-28_15-26-47-677.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/ArraysWithLenghtAtDeclaration_true-valid-memsafety_true-termination.c_svcomp-DerefFreeMemtrack-32bit-Automizer_Fixed_noBitfields+AI_EQ_SS.epf_AutomizerCTransformed.xml/Csv-TraceAbstractionBenchmarks-0-2018-03-28_15-26-47-677.csv Completed graceful shutdown