java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/cade18-smtinterpol/svcomp-DerefFreeMemtrack-32bit-Automizer_Camel.epf -i ../../../trunk/examples/svcomp/ldv-memsafety/memleaks_test22_5_false-valid-deref.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-a74eeac-m [2018-02-02 19:10:58,055 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-02-02 19:10:58,056 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-02-02 19:10:58,066 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-02-02 19:10:58,066 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-02-02 19:10:58,067 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-02-02 19:10:58,068 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-02-02 19:10:58,070 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-02-02 19:10:58,071 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-02-02 19:10:58,072 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-02-02 19:10:58,072 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-02-02 19:10:58,073 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-02-02 19:10:58,073 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-02-02 19:10:58,074 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-02-02 19:10:58,075 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-02-02 19:10:58,077 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-02-02 19:10:58,078 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-02-02 19:10:58,080 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-02-02 19:10:58,081 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-02-02 19:10:58,082 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-02-02 19:10:58,084 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-02-02 19:10:58,084 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-02-02 19:10:58,084 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-02-02 19:10:58,085 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-02-02 19:10:58,086 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-02-02 19:10:58,087 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-02-02 19:10:58,087 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-02-02 19:10:58,087 INFO L177 SettingsManager]: PEA to Boogie provides no preferences, ignoring... [2018-02-02 19:10:58,087 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-02-02 19:10:58,088 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-02-02 19:10:58,088 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-02-02 19:10:58,088 INFO L98 SettingsManager]: Beginning loading settings from /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/cade18-smtinterpol/svcomp-DerefFreeMemtrack-32bit-Automizer_Camel.epf [2018-02-02 19:10:58,098 INFO L110 SettingsManager]: Loading preferences was successful [2018-02-02 19:10:58,098 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-02-02 19:10:58,099 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-02-02 19:10:58,099 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-02-02 19:10:58,100 INFO L133 SettingsManager]: * Use SBE=true [2018-02-02 19:10:58,100 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-02-02 19:10:58,100 INFO L133 SettingsManager]: * sizeof long=4 [2018-02-02 19:10:58,100 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-02-02 19:10:58,100 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-02-02 19:10:58,100 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-02-02 19:10:58,101 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-02-02 19:10:58,101 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-02-02 19:10:58,101 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-02-02 19:10:58,101 INFO L133 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2018-02-02 19:10:58,101 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-02-02 19:10:58,101 INFO L133 SettingsManager]: * sizeof long double=12 [2018-02-02 19:10:58,101 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-02-02 19:10:58,102 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-02-02 19:10:58,102 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-02-02 19:10:58,102 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-02-02 19:10:58,102 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-02-02 19:10:58,102 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-02-02 19:10:58,102 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-02-02 19:10:58,103 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-02-02 19:10:58,103 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL [2018-02-02 19:10:58,130 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-02-02 19:10:58,138 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully initialized [2018-02-02 19:10:58,141 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-02-02 19:10:58,143 INFO L271 PluginConnector]: Initializing CDTParser... [2018-02-02 19:10:58,144 INFO L276 PluginConnector]: CDTParser initialized [2018-02-02 19:10:58,144 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/ldv-memsafety/memleaks_test22_5_false-valid-deref.i [2018-02-02 19:10:58,312 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-02-02 19:10:58,314 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-02-02 19:10:58,314 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-02-02 19:10:58,315 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-02-02 19:10:58,320 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-02-02 19:10:58,320 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 02.02 07:10:58" (1/1) ... [2018-02-02 19:10:58,323 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@75fc950d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.02 07:10:58, skipping insertion in model container [2018-02-02 19:10:58,323 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 02.02 07:10:58" (1/1) ... [2018-02-02 19:10:58,337 INFO L153 Dispatcher]: Using SV-COMP mode [2018-02-02 19:10:58,380 INFO L153 Dispatcher]: Using SV-COMP mode [2018-02-02 19:10:58,468 INFO L450 PostProcessor]: Settings: Checked method=main [2018-02-02 19:10:58,485 INFO L450 PostProcessor]: Settings: Checked method=main [2018-02-02 19:10:58,493 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.02 07:10:58 WrapperNode [2018-02-02 19:10:58,493 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-02-02 19:10:58,494 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-02-02 19:10:58,494 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-02-02 19:10:58,494 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-02-02 19:10:58,506 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.02 07:10:58" (1/1) ... [2018-02-02 19:10:58,507 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.02 07:10:58" (1/1) ... [2018-02-02 19:10:58,516 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.02 07:10:58" (1/1) ... [2018-02-02 19:10:58,516 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.02 07:10:58" (1/1) ... [2018-02-02 19:10:58,520 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.02 07:10:58" (1/1) ... [2018-02-02 19:10:58,522 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.02 07:10:58" (1/1) ... [2018-02-02 19:10:58,524 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.02 07:10:58" (1/1) ... [2018-02-02 19:10:58,526 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-02-02 19:10:58,527 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-02-02 19:10:58,527 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-02-02 19:10:58,527 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-02-02 19:10:58,527 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.02 07:10:58" (1/1) ... No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-02-02 19:10:58,560 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-02-02 19:10:58,561 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-02-02 19:10:58,561 INFO L136 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~TO~VOID [2018-02-02 19:10:58,561 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_malloc [2018-02-02 19:10:58,561 INFO L136 BoogieDeclarations]: Found implementation of procedure LDV_INIT_LIST_HEAD [2018-02-02 19:10:58,561 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_atomic_sub_return [2018-02-02 19:10:58,561 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kref_sub [2018-02-02 19:10:58,561 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kref_init [2018-02-02 19:10:58,561 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kref_put [2018-02-02 19:10:58,562 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_cleanup [2018-02-02 19:10:58,562 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_release [2018-02-02 19:10:58,562 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_put [2018-02-02 19:10:58,562 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_init_internal [2018-02-02 19:10:58,562 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_init [2018-02-02 19:10:58,562 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_create [2018-02-02 19:10:58,562 INFO L136 BoogieDeclarations]: Found implementation of procedure f_22_put [2018-02-02 19:10:58,562 INFO L136 BoogieDeclarations]: Found implementation of procedure entry_point [2018-02-02 19:10:58,562 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-02-02 19:10:58,562 INFO L128 BoogieDeclarations]: Found specification of procedure write~int [2018-02-02 19:10:58,562 INFO L128 BoogieDeclarations]: Found specification of procedure read~int [2018-02-02 19:10:58,562 INFO L128 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2018-02-02 19:10:58,562 INFO L128 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2018-02-02 19:10:58,563 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.free [2018-02-02 19:10:58,563 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-02-02 19:10:58,563 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-02-02 19:10:58,563 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2018-02-02 19:10:58,563 INFO L136 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2018-02-02 19:10:58,563 INFO L128 BoogieDeclarations]: Found specification of procedure malloc [2018-02-02 19:10:58,563 INFO L128 BoogieDeclarations]: Found specification of procedure free [2018-02-02 19:10:58,563 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2018-02-02 19:10:58,563 INFO L128 BoogieDeclarations]: Found specification of procedure memset [2018-02-02 19:10:58,563 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_malloc [2018-02-02 19:10:58,563 INFO L128 BoogieDeclarations]: Found specification of procedure LDV_INIT_LIST_HEAD [2018-02-02 19:10:58,563 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_atomic_sub_return [2018-02-02 19:10:58,564 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kref_sub [2018-02-02 19:10:58,564 INFO L128 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~TO~VOID [2018-02-02 19:10:58,564 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kref_init [2018-02-02 19:10:58,564 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kref_put [2018-02-02 19:10:58,564 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_cleanup [2018-02-02 19:10:58,564 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_release [2018-02-02 19:10:58,564 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_put [2018-02-02 19:10:58,565 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_init_internal [2018-02-02 19:10:58,565 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_init [2018-02-02 19:10:58,565 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_create [2018-02-02 19:10:58,565 INFO L128 BoogieDeclarations]: Found specification of procedure f_22_put [2018-02-02 19:10:58,565 INFO L128 BoogieDeclarations]: Found specification of procedure entry_point [2018-02-02 19:10:58,565 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-02-02 19:10:58,565 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-02-02 19:10:58,565 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-02-02 19:10:58,756 WARN L455 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-02-02 19:10:58,873 INFO L257 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-02-02 19:10:58,873 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 02.02 07:10:58 BoogieIcfgContainer [2018-02-02 19:10:58,873 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-02-02 19:10:58,874 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-02-02 19:10:58,874 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-02-02 19:10:58,877 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-02-02 19:10:58,877 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 02.02 07:10:58" (1/3) ... [2018-02-02 19:10:58,878 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@647d9179 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 02.02 07:10:58, skipping insertion in model container [2018-02-02 19:10:58,878 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.02 07:10:58" (2/3) ... [2018-02-02 19:10:58,878 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@647d9179 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 02.02 07:10:58, skipping insertion in model container [2018-02-02 19:10:58,878 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 02.02 07:10:58" (3/3) ... [2018-02-02 19:10:58,880 INFO L107 eAbstractionObserver]: Analyzing ICFG memleaks_test22_5_false-valid-deref.i [2018-02-02 19:10:58,887 INFO L128 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-02-02 19:10:58,892 INFO L140 ceAbstractionStarter]: Appying trace abstraction to program that has 19 error locations. [2018-02-02 19:10:58,914 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-02-02 19:10:58,915 INFO L323 AbstractCegarLoop]: Hoare is false [2018-02-02 19:10:58,915 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-02-02 19:10:58,915 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-02-02 19:10:58,915 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-02-02 19:10:58,915 INFO L327 AbstractCegarLoop]: Difference is false [2018-02-02 19:10:58,915 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-02-02 19:10:58,915 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-02-02 19:10:58,916 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-02-02 19:10:58,926 INFO L276 IsEmpty]: Start isEmpty. Operand 123 states. [2018-02-02 19:10:58,933 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-02-02 19:10:58,933 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 19:10:58,934 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 19:10:58,934 INFO L371 AbstractCegarLoop]: === Iteration 1 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-02 19:10:58,937 INFO L82 PathProgramCache]: Analyzing trace with hash 1211515492, now seen corresponding path program 1 times [2018-02-02 19:10:58,939 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 19:10:58,939 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 19:10:58,978 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 19:10:58,978 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-02 19:10:58,979 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 19:10:59,012 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 19:10:59,018 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 19:10:59,097 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 19:10:59,098 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-02 19:10:59,098 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-02-02 19:10:59,100 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-02-02 19:10:59,171 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-02-02 19:10:59,171 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-02-02 19:10:59,174 INFO L87 Difference]: Start difference. First operand 123 states. Second operand 5 states. [2018-02-02 19:10:59,222 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 19:10:59,222 INFO L93 Difference]: Finished difference Result 129 states and 137 transitions. [2018-02-02 19:10:59,223 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-02-02 19:10:59,223 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 17 [2018-02-02 19:10:59,224 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 19:10:59,231 INFO L225 Difference]: With dead ends: 129 [2018-02-02 19:10:59,231 INFO L226 Difference]: Without dead ends: 126 [2018-02-02 19:10:59,232 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-02-02 19:10:59,246 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 126 states. [2018-02-02 19:10:59,261 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 126 to 124. [2018-02-02 19:10:59,262 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 124 states. [2018-02-02 19:10:59,264 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 124 states to 124 states and 132 transitions. [2018-02-02 19:10:59,265 INFO L78 Accepts]: Start accepts. Automaton has 124 states and 132 transitions. Word has length 17 [2018-02-02 19:10:59,265 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 19:10:59,265 INFO L432 AbstractCegarLoop]: Abstraction has 124 states and 132 transitions. [2018-02-02 19:10:59,265 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-02-02 19:10:59,265 INFO L276 IsEmpty]: Start isEmpty. Operand 124 states and 132 transitions. [2018-02-02 19:10:59,265 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2018-02-02 19:10:59,265 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 19:10:59,265 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 19:10:59,266 INFO L371 AbstractCegarLoop]: === Iteration 2 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-02 19:10:59,266 INFO L82 PathProgramCache]: Analyzing trace with hash 774524518, now seen corresponding path program 1 times [2018-02-02 19:10:59,266 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 19:10:59,266 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 19:10:59,267 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 19:10:59,267 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-02 19:10:59,268 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 19:10:59,282 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 19:10:59,287 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 19:10:59,340 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 19:10:59,341 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-02 19:10:59,341 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-02-02 19:10:59,342 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-02-02 19:10:59,342 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-02-02 19:10:59,342 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-02-02 19:10:59,342 INFO L87 Difference]: Start difference. First operand 124 states and 132 transitions. Second operand 6 states. [2018-02-02 19:10:59,443 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 19:10:59,443 INFO L93 Difference]: Finished difference Result 125 states and 133 transitions. [2018-02-02 19:10:59,443 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-02-02 19:10:59,443 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 19 [2018-02-02 19:10:59,443 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 19:10:59,444 INFO L225 Difference]: With dead ends: 125 [2018-02-02 19:10:59,445 INFO L226 Difference]: Without dead ends: 125 [2018-02-02 19:10:59,445 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-02-02 19:10:59,446 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 125 states. [2018-02-02 19:10:59,451 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 125 to 123. [2018-02-02 19:10:59,452 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 123 states. [2018-02-02 19:10:59,453 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 123 states to 123 states and 131 transitions. [2018-02-02 19:10:59,454 INFO L78 Accepts]: Start accepts. Automaton has 123 states and 131 transitions. Word has length 19 [2018-02-02 19:10:59,454 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 19:10:59,454 INFO L432 AbstractCegarLoop]: Abstraction has 123 states and 131 transitions. [2018-02-02 19:10:59,454 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-02-02 19:10:59,454 INFO L276 IsEmpty]: Start isEmpty. Operand 123 states and 131 transitions. [2018-02-02 19:10:59,454 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2018-02-02 19:10:59,455 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 19:10:59,455 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 19:10:59,455 INFO L371 AbstractCegarLoop]: === Iteration 3 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-02 19:10:59,455 INFO L82 PathProgramCache]: Analyzing trace with hash 774524519, now seen corresponding path program 1 times [2018-02-02 19:10:59,455 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 19:10:59,455 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 19:10:59,456 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 19:10:59,457 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-02 19:10:59,457 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 19:10:59,472 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 19:10:59,473 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 19:10:59,602 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 19:10:59,602 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-02 19:10:59,602 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-02-02 19:10:59,603 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-02-02 19:10:59,603 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-02-02 19:10:59,603 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-02-02 19:10:59,603 INFO L87 Difference]: Start difference. First operand 123 states and 131 transitions. Second operand 7 states. [2018-02-02 19:10:59,724 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 19:10:59,724 INFO L93 Difference]: Finished difference Result 124 states and 132 transitions. [2018-02-02 19:10:59,724 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-02-02 19:10:59,724 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 19 [2018-02-02 19:10:59,725 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 19:10:59,725 INFO L225 Difference]: With dead ends: 124 [2018-02-02 19:10:59,725 INFO L226 Difference]: Without dead ends: 124 [2018-02-02 19:10:59,725 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2018-02-02 19:10:59,726 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 124 states. [2018-02-02 19:10:59,729 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 124 to 122. [2018-02-02 19:10:59,729 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 122 states. [2018-02-02 19:10:59,730 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 122 states to 122 states and 130 transitions. [2018-02-02 19:10:59,730 INFO L78 Accepts]: Start accepts. Automaton has 122 states and 130 transitions. Word has length 19 [2018-02-02 19:10:59,730 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 19:10:59,730 INFO L432 AbstractCegarLoop]: Abstraction has 122 states and 130 transitions. [2018-02-02 19:10:59,730 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-02-02 19:10:59,730 INFO L276 IsEmpty]: Start isEmpty. Operand 122 states and 130 transitions. [2018-02-02 19:10:59,731 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2018-02-02 19:10:59,731 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 19:10:59,731 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 19:10:59,731 INFO L371 AbstractCegarLoop]: === Iteration 4 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-02 19:10:59,731 INFO L82 PathProgramCache]: Analyzing trace with hash 1886266821, now seen corresponding path program 1 times [2018-02-02 19:10:59,731 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 19:10:59,731 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 19:10:59,732 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 19:10:59,732 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-02 19:10:59,732 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 19:10:59,742 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 19:10:59,743 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 19:10:59,830 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 19:10:59,830 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-02 19:10:59,831 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-02-02 19:10:59,832 INFO L409 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-02-02 19:10:59,832 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-02-02 19:10:59,832 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72 [2018-02-02 19:10:59,833 INFO L87 Difference]: Start difference. First operand 122 states and 130 transitions. Second operand 9 states. [2018-02-02 19:10:59,930 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 19:10:59,930 INFO L93 Difference]: Finished difference Result 139 states and 149 transitions. [2018-02-02 19:10:59,933 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-02-02 19:10:59,933 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 31 [2018-02-02 19:10:59,933 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 19:10:59,934 INFO L225 Difference]: With dead ends: 139 [2018-02-02 19:10:59,934 INFO L226 Difference]: Without dead ends: 139 [2018-02-02 19:10:59,935 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=23, Invalid=87, Unknown=0, NotChecked=0, Total=110 [2018-02-02 19:10:59,935 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 139 states. [2018-02-02 19:10:59,943 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 139 to 135. [2018-02-02 19:10:59,943 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 135 states. [2018-02-02 19:10:59,944 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 135 states to 135 states and 144 transitions. [2018-02-02 19:10:59,944 INFO L78 Accepts]: Start accepts. Automaton has 135 states and 144 transitions. Word has length 31 [2018-02-02 19:10:59,945 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 19:10:59,945 INFO L432 AbstractCegarLoop]: Abstraction has 135 states and 144 transitions. [2018-02-02 19:10:59,945 INFO L433 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-02-02 19:10:59,945 INFO L276 IsEmpty]: Start isEmpty. Operand 135 states and 144 transitions. [2018-02-02 19:10:59,946 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-02-02 19:10:59,946 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 19:10:59,946 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 19:10:59,946 INFO L371 AbstractCegarLoop]: === Iteration 5 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-02 19:10:59,946 INFO L82 PathProgramCache]: Analyzing trace with hash 107698799, now seen corresponding path program 1 times [2018-02-02 19:10:59,946 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 19:10:59,946 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 19:10:59,947 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 19:10:59,947 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-02 19:10:59,948 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 19:10:59,960 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 19:10:59,961 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 19:11:00,026 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 19:11:00,027 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-02 19:11:00,027 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-02-02 19:11:00,027 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-02-02 19:11:00,027 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-02-02 19:11:00,027 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-02-02 19:11:00,028 INFO L87 Difference]: Start difference. First operand 135 states and 144 transitions. Second operand 10 states. [2018-02-02 19:11:00,186 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 19:11:00,186 INFO L93 Difference]: Finished difference Result 134 states and 143 transitions. [2018-02-02 19:11:00,186 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-02-02 19:11:00,186 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 34 [2018-02-02 19:11:00,187 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 19:11:00,187 INFO L225 Difference]: With dead ends: 134 [2018-02-02 19:11:00,188 INFO L226 Difference]: Without dead ends: 134 [2018-02-02 19:11:00,188 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=29, Invalid=127, Unknown=0, NotChecked=0, Total=156 [2018-02-02 19:11:00,188 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 134 states. [2018-02-02 19:11:00,193 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 134 to 134. [2018-02-02 19:11:00,193 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 134 states. [2018-02-02 19:11:00,194 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 134 states to 134 states and 143 transitions. [2018-02-02 19:11:00,194 INFO L78 Accepts]: Start accepts. Automaton has 134 states and 143 transitions. Word has length 34 [2018-02-02 19:11:00,195 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 19:11:00,195 INFO L432 AbstractCegarLoop]: Abstraction has 134 states and 143 transitions. [2018-02-02 19:11:00,195 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-02-02 19:11:00,195 INFO L276 IsEmpty]: Start isEmpty. Operand 134 states and 143 transitions. [2018-02-02 19:11:00,195 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-02-02 19:11:00,196 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 19:11:00,196 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 19:11:00,196 INFO L371 AbstractCegarLoop]: === Iteration 6 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-02 19:11:00,196 INFO L82 PathProgramCache]: Analyzing trace with hash 107698800, now seen corresponding path program 1 times [2018-02-02 19:11:00,196 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 19:11:00,196 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 19:11:00,197 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 19:11:00,197 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-02 19:11:00,197 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 19:11:00,208 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 19:11:00,209 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 19:11:00,238 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 19:11:00,238 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-02 19:11:00,238 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-02-02 19:11:00,238 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-02-02 19:11:00,239 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-02-02 19:11:00,239 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-02-02 19:11:00,239 INFO L87 Difference]: Start difference. First operand 134 states and 143 transitions. Second operand 4 states. [2018-02-02 19:11:00,250 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 19:11:00,250 INFO L93 Difference]: Finished difference Result 137 states and 146 transitions. [2018-02-02 19:11:00,251 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-02-02 19:11:00,251 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 34 [2018-02-02 19:11:00,251 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 19:11:00,252 INFO L225 Difference]: With dead ends: 137 [2018-02-02 19:11:00,252 INFO L226 Difference]: Without dead ends: 135 [2018-02-02 19:11:00,252 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-02-02 19:11:00,253 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 135 states. [2018-02-02 19:11:00,257 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 135 to 135. [2018-02-02 19:11:00,257 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 135 states. [2018-02-02 19:11:00,258 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 135 states to 135 states and 144 transitions. [2018-02-02 19:11:00,258 INFO L78 Accepts]: Start accepts. Automaton has 135 states and 144 transitions. Word has length 34 [2018-02-02 19:11:00,259 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 19:11:00,259 INFO L432 AbstractCegarLoop]: Abstraction has 135 states and 144 transitions. [2018-02-02 19:11:00,259 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-02-02 19:11:00,259 INFO L276 IsEmpty]: Start isEmpty. Operand 135 states and 144 transitions. [2018-02-02 19:11:00,260 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-02-02 19:11:00,260 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 19:11:00,260 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 19:11:00,260 INFO L371 AbstractCegarLoop]: === Iteration 7 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-02 19:11:00,260 INFO L82 PathProgramCache]: Analyzing trace with hash -1590593736, now seen corresponding path program 1 times [2018-02-02 19:11:00,261 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 19:11:00,261 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 19:11:00,262 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 19:11:00,262 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-02 19:11:00,262 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 19:11:00,273 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 19:11:00,274 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 19:11:00,311 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 19:11:00,311 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-02 19:11:00,311 INFO L213 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-02 19:11:00,320 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-02 19:11:00,348 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 19:11:00,356 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-02 19:11:00,382 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 19:11:00,409 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-02 19:11:00,410 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 6 [2018-02-02 19:11:00,410 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-02-02 19:11:00,410 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-02-02 19:11:00,410 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-02-02 19:11:00,410 INFO L87 Difference]: Start difference. First operand 135 states and 144 transitions. Second operand 6 states. [2018-02-02 19:11:00,434 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 19:11:00,434 INFO L93 Difference]: Finished difference Result 138 states and 147 transitions. [2018-02-02 19:11:00,434 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-02-02 19:11:00,434 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 35 [2018-02-02 19:11:00,434 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 19:11:00,435 INFO L225 Difference]: With dead ends: 138 [2018-02-02 19:11:00,435 INFO L226 Difference]: Without dead ends: 136 [2018-02-02 19:11:00,435 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 40 GetRequests, 35 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=16, Invalid=26, Unknown=0, NotChecked=0, Total=42 [2018-02-02 19:11:00,435 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 136 states. [2018-02-02 19:11:00,439 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 136 to 136. [2018-02-02 19:11:00,439 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 136 states. [2018-02-02 19:11:00,440 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 136 states to 136 states and 145 transitions. [2018-02-02 19:11:00,440 INFO L78 Accepts]: Start accepts. Automaton has 136 states and 145 transitions. Word has length 35 [2018-02-02 19:11:00,440 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 19:11:00,440 INFO L432 AbstractCegarLoop]: Abstraction has 136 states and 145 transitions. [2018-02-02 19:11:00,441 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-02-02 19:11:00,441 INFO L276 IsEmpty]: Start isEmpty. Operand 136 states and 145 transitions. [2018-02-02 19:11:00,441 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-02-02 19:11:00,441 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 19:11:00,442 INFO L351 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 19:11:00,442 INFO L371 AbstractCegarLoop]: === Iteration 8 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-02 19:11:00,442 INFO L82 PathProgramCache]: Analyzing trace with hash 1596912496, now seen corresponding path program 2 times [2018-02-02 19:11:00,442 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 19:11:00,442 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 19:11:00,443 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 19:11:00,443 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-02 19:11:00,443 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 19:11:00,455 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 19:11:00,456 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 19:11:00,481 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 19:11:00,481 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-02 19:11:00,481 INFO L213 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-02 19:11:00,487 INFO L109 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-02-02 19:11:00,511 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2018-02-02 19:11:00,511 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-02 19:11:00,515 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-02 19:11:00,536 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-02-02 19:11:00,538 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-02 19:11:00,556 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-02-02 19:11:00,557 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-02 19:11:00,570 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-02-02 19:11:00,571 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-02-02 19:11:03,033 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-02-02 19:11:03,062 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-02-02 19:11:03,062 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [14] imperfect sequences [6] total 19 [2018-02-02 19:11:03,063 INFO L409 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-02-02 19:11:03,063 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-02-02 19:11:03,063 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=51, Invalid=290, Unknown=1, NotChecked=0, Total=342 [2018-02-02 19:11:03,064 INFO L87 Difference]: Start difference. First operand 136 states and 145 transitions. Second operand 19 states. [2018-02-02 19:11:03,935 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 19:11:03,935 INFO L93 Difference]: Finished difference Result 155 states and 164 transitions. [2018-02-02 19:11:03,936 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-02-02 19:11:03,936 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 36 [2018-02-02 19:11:03,936 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 19:11:03,936 INFO L225 Difference]: With dead ends: 155 [2018-02-02 19:11:03,936 INFO L226 Difference]: Without dead ends: 153 [2018-02-02 19:11:03,937 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 49 GetRequests, 24 SyntacticMatches, 0 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 77 ImplicationChecksByTransitivity, 2.6s TimeCoverageRelationStatistics Valid=99, Invalid=602, Unknown=1, NotChecked=0, Total=702 [2018-02-02 19:11:03,937 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 153 states. [2018-02-02 19:11:03,941 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 153 to 136. [2018-02-02 19:11:03,941 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 136 states. [2018-02-02 19:11:03,941 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 136 states to 136 states and 145 transitions. [2018-02-02 19:11:03,942 INFO L78 Accepts]: Start accepts. Automaton has 136 states and 145 transitions. Word has length 36 [2018-02-02 19:11:03,942 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 19:11:03,942 INFO L432 AbstractCegarLoop]: Abstraction has 136 states and 145 transitions. [2018-02-02 19:11:03,942 INFO L433 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-02-02 19:11:03,942 INFO L276 IsEmpty]: Start isEmpty. Operand 136 states and 145 transitions. [2018-02-02 19:11:03,943 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-02-02 19:11:03,943 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 19:11:03,943 INFO L351 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 19:11:03,943 INFO L371 AbstractCegarLoop]: === Iteration 9 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-02 19:11:03,943 INFO L82 PathProgramCache]: Analyzing trace with hash 2040634480, now seen corresponding path program 1 times [2018-02-02 19:11:03,943 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 19:11:03,943 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 19:11:03,944 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 19:11:03,944 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-02 19:11:03,944 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 19:11:03,949 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 19:11:03,950 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 19:11:03,983 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-02-02 19:11:03,983 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-02 19:11:03,984 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-02-02 19:11:03,984 INFO L409 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-02-02 19:11:03,991 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-02-02 19:11:03,991 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-02-02 19:11:03,991 INFO L87 Difference]: Start difference. First operand 136 states and 145 transitions. Second operand 3 states. [2018-02-02 19:11:04,112 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 19:11:04,112 INFO L93 Difference]: Finished difference Result 154 states and 165 transitions. [2018-02-02 19:11:04,112 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-02-02 19:11:04,112 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 36 [2018-02-02 19:11:04,113 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 19:11:04,114 INFO L225 Difference]: With dead ends: 154 [2018-02-02 19:11:04,114 INFO L226 Difference]: Without dead ends: 142 [2018-02-02 19:11:04,114 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 13 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-02-02 19:11:04,114 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 142 states. [2018-02-02 19:11:04,117 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 142 to 132. [2018-02-02 19:11:04,117 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 132 states. [2018-02-02 19:11:04,118 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 132 states to 132 states and 140 transitions. [2018-02-02 19:11:04,118 INFO L78 Accepts]: Start accepts. Automaton has 132 states and 140 transitions. Word has length 36 [2018-02-02 19:11:04,118 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 19:11:04,118 INFO L432 AbstractCegarLoop]: Abstraction has 132 states and 140 transitions. [2018-02-02 19:11:04,118 INFO L433 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-02-02 19:11:04,118 INFO L276 IsEmpty]: Start isEmpty. Operand 132 states and 140 transitions. [2018-02-02 19:11:04,123 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-02-02 19:11:04,123 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 19:11:04,123 INFO L351 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 19:11:04,123 INFO L371 AbstractCegarLoop]: === Iteration 10 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-02 19:11:04,125 INFO L82 PathProgramCache]: Analyzing trace with hash 746437934, now seen corresponding path program 1 times [2018-02-02 19:11:04,125 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 19:11:04,125 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 19:11:04,126 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 19:11:04,127 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-02 19:11:04,127 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 19:11:04,136 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 19:11:04,137 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 19:11:04,246 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-02-02 19:11:04,247 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-02 19:11:04,247 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-02-02 19:11:04,247 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-02-02 19:11:04,247 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-02-02 19:11:04,248 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-02-02 19:11:04,248 INFO L87 Difference]: Start difference. First operand 132 states and 140 transitions. Second operand 6 states. [2018-02-02 19:11:04,269 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 19:11:04,269 INFO L93 Difference]: Finished difference Result 119 states and 125 transitions. [2018-02-02 19:11:04,271 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-02-02 19:11:04,271 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 38 [2018-02-02 19:11:04,271 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 19:11:04,272 INFO L225 Difference]: With dead ends: 119 [2018-02-02 19:11:04,272 INFO L226 Difference]: Without dead ends: 119 [2018-02-02 19:11:04,272 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-02-02 19:11:04,272 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 119 states. [2018-02-02 19:11:04,275 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 119 to 119. [2018-02-02 19:11:04,275 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 119 states. [2018-02-02 19:11:04,275 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 119 states to 119 states and 125 transitions. [2018-02-02 19:11:04,276 INFO L78 Accepts]: Start accepts. Automaton has 119 states and 125 transitions. Word has length 38 [2018-02-02 19:11:04,276 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 19:11:04,276 INFO L432 AbstractCegarLoop]: Abstraction has 119 states and 125 transitions. [2018-02-02 19:11:04,276 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-02-02 19:11:04,276 INFO L276 IsEmpty]: Start isEmpty. Operand 119 states and 125 transitions. [2018-02-02 19:11:04,277 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-02-02 19:11:04,277 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 19:11:04,277 INFO L351 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 19:11:04,277 INFO L371 AbstractCegarLoop]: === Iteration 11 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-02 19:11:04,277 INFO L82 PathProgramCache]: Analyzing trace with hash -98646161, now seen corresponding path program 1 times [2018-02-02 19:11:04,277 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 19:11:04,277 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 19:11:04,278 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 19:11:04,279 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-02 19:11:04,279 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 19:11:04,288 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 19:11:04,289 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 19:11:04,350 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-02-02 19:11:04,350 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-02 19:11:04,350 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-02-02 19:11:04,350 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-02-02 19:11:04,350 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-02-02 19:11:04,351 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-02-02 19:11:04,351 INFO L87 Difference]: Start difference. First operand 119 states and 125 transitions. Second operand 10 states. [2018-02-02 19:11:04,538 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 19:11:04,538 INFO L93 Difference]: Finished difference Result 117 states and 123 transitions. [2018-02-02 19:11:04,538 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-02-02 19:11:04,538 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 42 [2018-02-02 19:11:04,539 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 19:11:04,539 INFO L225 Difference]: With dead ends: 117 [2018-02-02 19:11:04,539 INFO L226 Difference]: Without dead ends: 117 [2018-02-02 19:11:04,540 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=29, Invalid=127, Unknown=0, NotChecked=0, Total=156 [2018-02-02 19:11:04,540 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 117 states. [2018-02-02 19:11:04,542 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 117 to 117. [2018-02-02 19:11:04,542 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 117 states. [2018-02-02 19:11:04,543 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 117 states to 117 states and 123 transitions. [2018-02-02 19:11:04,543 INFO L78 Accepts]: Start accepts. Automaton has 117 states and 123 transitions. Word has length 42 [2018-02-02 19:11:04,543 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 19:11:04,543 INFO L432 AbstractCegarLoop]: Abstraction has 117 states and 123 transitions. [2018-02-02 19:11:04,543 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-02-02 19:11:04,543 INFO L276 IsEmpty]: Start isEmpty. Operand 117 states and 123 transitions. [2018-02-02 19:11:04,544 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-02-02 19:11:04,544 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 19:11:04,544 INFO L351 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 19:11:04,544 INFO L371 AbstractCegarLoop]: === Iteration 12 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-02 19:11:04,544 INFO L82 PathProgramCache]: Analyzing trace with hash -98646160, now seen corresponding path program 1 times [2018-02-02 19:11:04,545 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 19:11:04,545 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 19:11:04,546 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 19:11:04,546 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-02 19:11:04,546 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 19:11:04,557 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 19:11:04,558 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 19:11:04,596 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 19:11:04,596 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-02 19:11:04,596 INFO L213 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-02 19:11:04,601 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-02 19:11:04,617 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 19:11:04,618 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-02 19:11:04,627 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 19:11:04,644 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-02 19:11:04,644 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 8 [2018-02-02 19:11:04,644 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-02-02 19:11:04,645 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-02-02 19:11:04,645 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=33, Unknown=0, NotChecked=0, Total=56 [2018-02-02 19:11:04,645 INFO L87 Difference]: Start difference. First operand 117 states and 123 transitions. Second operand 8 states. [2018-02-02 19:11:04,660 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 19:11:04,660 INFO L93 Difference]: Finished difference Result 120 states and 126 transitions. [2018-02-02 19:11:04,661 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-02-02 19:11:04,661 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 42 [2018-02-02 19:11:04,661 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 19:11:04,662 INFO L225 Difference]: With dead ends: 120 [2018-02-02 19:11:04,662 INFO L226 Difference]: Without dead ends: 118 [2018-02-02 19:11:04,662 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 49 GetRequests, 42 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2018-02-02 19:11:04,662 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 118 states. [2018-02-02 19:11:04,664 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 118 to 118. [2018-02-02 19:11:04,664 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 118 states. [2018-02-02 19:11:04,664 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 118 states to 118 states and 124 transitions. [2018-02-02 19:11:04,664 INFO L78 Accepts]: Start accepts. Automaton has 118 states and 124 transitions. Word has length 42 [2018-02-02 19:11:04,665 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 19:11:04,665 INFO L432 AbstractCegarLoop]: Abstraction has 118 states and 124 transitions. [2018-02-02 19:11:04,665 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-02-02 19:11:04,665 INFO L276 IsEmpty]: Start isEmpty. Operand 118 states and 124 transitions. [2018-02-02 19:11:04,665 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-02-02 19:11:04,665 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 19:11:04,665 INFO L351 BasicCegarLoop]: trace histogram [4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 19:11:04,665 INFO L371 AbstractCegarLoop]: === Iteration 13 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-02 19:11:04,666 INFO L82 PathProgramCache]: Analyzing trace with hash -1065378760, now seen corresponding path program 2 times [2018-02-02 19:11:04,666 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 19:11:04,666 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 19:11:04,667 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 19:11:04,667 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-02 19:11:04,667 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 19:11:04,677 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 19:11:04,678 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 19:11:04,736 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 19:11:04,736 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-02 19:11:04,736 INFO L213 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-02 19:11:04,742 INFO L109 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-02-02 19:11:04,762 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2018-02-02 19:11:04,762 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-02 19:11:04,769 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-02 19:11:04,773 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-02-02 19:11:04,774 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-02 19:11:04,788 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-02-02 19:11:04,789 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-02 19:11:04,799 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-02-02 19:11:04,799 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-02-02 19:11:05,252 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-02-02 19:11:05,270 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-02-02 19:11:05,270 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [15] imperfect sequences [8] total 22 [2018-02-02 19:11:05,270 INFO L409 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-02-02 19:11:05,270 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-02-02 19:11:05,270 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=72, Invalid=390, Unknown=0, NotChecked=0, Total=462 [2018-02-02 19:11:05,271 INFO L87 Difference]: Start difference. First operand 118 states and 124 transitions. Second operand 22 states. [2018-02-02 19:11:07,351 WARN L143 SmtUtils]: Spent 2054ms on a formula simplification that was a NOOP. DAG size: 39 [2018-02-02 19:11:09,543 WARN L143 SmtUtils]: Spent 2018ms on a formula simplification that was a NOOP. DAG size: 31 [2018-02-02 19:11:10,014 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 19:11:10,014 INFO L93 Difference]: Finished difference Result 119 states and 125 transitions. [2018-02-02 19:11:10,014 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-02-02 19:11:10,014 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 43 [2018-02-02 19:11:10,014 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 19:11:10,015 INFO L225 Difference]: With dead ends: 119 [2018-02-02 19:11:10,015 INFO L226 Difference]: Without dead ends: 117 [2018-02-02 19:11:10,015 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 60 GetRequests, 29 SyntacticMatches, 1 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 155 ImplicationChecksByTransitivity, 4.7s TimeCoverageRelationStatistics Valid=147, Invalid=845, Unknown=0, NotChecked=0, Total=992 [2018-02-02 19:11:10,015 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 117 states. [2018-02-02 19:11:10,017 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 117 to 117. [2018-02-02 19:11:10,017 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 117 states. [2018-02-02 19:11:10,018 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 117 states to 117 states and 123 transitions. [2018-02-02 19:11:10,018 INFO L78 Accepts]: Start accepts. Automaton has 117 states and 123 transitions. Word has length 43 [2018-02-02 19:11:10,018 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 19:11:10,018 INFO L432 AbstractCegarLoop]: Abstraction has 117 states and 123 transitions. [2018-02-02 19:11:10,018 INFO L433 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-02-02 19:11:10,018 INFO L276 IsEmpty]: Start isEmpty. Operand 117 states and 123 transitions. [2018-02-02 19:11:10,023 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2018-02-02 19:11:10,023 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 19:11:10,023 INFO L351 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 19:11:10,023 INFO L371 AbstractCegarLoop]: === Iteration 14 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-02 19:11:10,023 INFO L82 PathProgramCache]: Analyzing trace with hash -403711437, now seen corresponding path program 1 times [2018-02-02 19:11:10,023 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 19:11:10,023 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 19:11:10,024 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 19:11:10,024 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-02 19:11:10,024 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 19:11:10,031 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 19:11:10,032 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 19:11:10,074 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-02-02 19:11:10,075 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-02 19:11:10,075 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-02-02 19:11:10,075 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-02-02 19:11:10,075 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-02-02 19:11:10,075 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2018-02-02 19:11:10,076 INFO L87 Difference]: Start difference. First operand 117 states and 123 transitions. Second operand 8 states. [2018-02-02 19:11:10,114 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 19:11:10,114 INFO L93 Difference]: Finished difference Result 119 states and 124 transitions. [2018-02-02 19:11:10,114 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-02-02 19:11:10,114 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 51 [2018-02-02 19:11:10,114 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 19:11:10,115 INFO L225 Difference]: With dead ends: 119 [2018-02-02 19:11:10,115 INFO L226 Difference]: Without dead ends: 117 [2018-02-02 19:11:10,115 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=69, Unknown=0, NotChecked=0, Total=90 [2018-02-02 19:11:10,115 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 117 states. [2018-02-02 19:11:10,117 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 117 to 117. [2018-02-02 19:11:10,118 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 117 states. [2018-02-02 19:11:10,118 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 117 states to 117 states and 122 transitions. [2018-02-02 19:11:10,118 INFO L78 Accepts]: Start accepts. Automaton has 117 states and 122 transitions. Word has length 51 [2018-02-02 19:11:10,118 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 19:11:10,118 INFO L432 AbstractCegarLoop]: Abstraction has 117 states and 122 transitions. [2018-02-02 19:11:10,119 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-02-02 19:11:10,119 INFO L276 IsEmpty]: Start isEmpty. Operand 117 states and 122 transitions. [2018-02-02 19:11:10,119 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2018-02-02 19:11:10,119 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 19:11:10,119 INFO L351 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 19:11:10,119 INFO L371 AbstractCegarLoop]: === Iteration 15 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-02 19:11:10,119 INFO L82 PathProgramCache]: Analyzing trace with hash 90191936, now seen corresponding path program 1 times [2018-02-02 19:11:10,120 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 19:11:10,120 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 19:11:10,121 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 19:11:10,121 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-02 19:11:10,121 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 19:11:10,128 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 19:11:10,129 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 19:11:10,180 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-02-02 19:11:10,181 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-02 19:11:10,181 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-02-02 19:11:10,181 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-02-02 19:11:10,181 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-02-02 19:11:10,181 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-02-02 19:11:10,182 INFO L87 Difference]: Start difference. First operand 117 states and 122 transitions. Second operand 10 states. [2018-02-02 19:11:10,245 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 19:11:10,245 INFO L93 Difference]: Finished difference Result 121 states and 125 transitions. [2018-02-02 19:11:10,245 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-02-02 19:11:10,245 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 56 [2018-02-02 19:11:10,245 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 19:11:10,246 INFO L225 Difference]: With dead ends: 121 [2018-02-02 19:11:10,246 INFO L226 Difference]: Without dead ends: 117 [2018-02-02 19:11:10,246 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=29, Invalid=127, Unknown=0, NotChecked=0, Total=156 [2018-02-02 19:11:10,246 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 117 states. [2018-02-02 19:11:10,249 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 117 to 117. [2018-02-02 19:11:10,249 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 117 states. [2018-02-02 19:11:10,249 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 117 states to 117 states and 121 transitions. [2018-02-02 19:11:10,250 INFO L78 Accepts]: Start accepts. Automaton has 117 states and 121 transitions. Word has length 56 [2018-02-02 19:11:10,250 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 19:11:10,250 INFO L432 AbstractCegarLoop]: Abstraction has 117 states and 121 transitions. [2018-02-02 19:11:10,250 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-02-02 19:11:10,250 INFO L276 IsEmpty]: Start isEmpty. Operand 117 states and 121 transitions. [2018-02-02 19:11:10,250 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2018-02-02 19:11:10,251 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 19:11:10,251 INFO L351 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 19:11:10,251 INFO L371 AbstractCegarLoop]: === Iteration 16 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-02 19:11:10,251 INFO L82 PathProgramCache]: Analyzing trace with hash 222221704, now seen corresponding path program 1 times [2018-02-02 19:11:10,251 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 19:11:10,251 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 19:11:10,252 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 19:11:10,252 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-02 19:11:10,252 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 19:11:10,265 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 19:11:10,266 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 19:11:10,456 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-02-02 19:11:10,457 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-02 19:11:10,457 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [22] imperfect sequences [] total 22 [2018-02-02 19:11:10,457 INFO L409 AbstractCegarLoop]: Interpolant automaton has 23 states [2018-02-02 19:11:10,457 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2018-02-02 19:11:10,457 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=45, Invalid=461, Unknown=0, NotChecked=0, Total=506 [2018-02-02 19:11:10,457 INFO L87 Difference]: Start difference. First operand 117 states and 121 transitions. Second operand 23 states. [2018-02-02 19:11:10,852 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 19:11:10,852 INFO L93 Difference]: Finished difference Result 144 states and 153 transitions. [2018-02-02 19:11:10,852 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-02-02 19:11:10,852 INFO L78 Accepts]: Start accepts. Automaton has 23 states. Word has length 67 [2018-02-02 19:11:10,853 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 19:11:10,853 INFO L225 Difference]: With dead ends: 144 [2018-02-02 19:11:10,853 INFO L226 Difference]: Without dead ends: 144 [2018-02-02 19:11:10,854 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 30 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 29 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 69 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=77, Invalid=853, Unknown=0, NotChecked=0, Total=930 [2018-02-02 19:11:10,854 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 144 states. [2018-02-02 19:11:10,857 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 144 to 139. [2018-02-02 19:11:10,857 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 139 states. [2018-02-02 19:11:10,858 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 139 states to 139 states and 149 transitions. [2018-02-02 19:11:10,858 INFO L78 Accepts]: Start accepts. Automaton has 139 states and 149 transitions. Word has length 67 [2018-02-02 19:11:10,858 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 19:11:10,858 INFO L432 AbstractCegarLoop]: Abstraction has 139 states and 149 transitions. [2018-02-02 19:11:10,858 INFO L433 AbstractCegarLoop]: Interpolant automaton has 23 states. [2018-02-02 19:11:10,859 INFO L276 IsEmpty]: Start isEmpty. Operand 139 states and 149 transitions. [2018-02-02 19:11:10,859 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2018-02-02 19:11:10,859 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 19:11:10,859 INFO L351 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 19:11:10,859 INFO L371 AbstractCegarLoop]: === Iteration 17 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-02 19:11:10,860 INFO L82 PathProgramCache]: Analyzing trace with hash 222221705, now seen corresponding path program 1 times [2018-02-02 19:11:10,860 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 19:11:10,860 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 19:11:10,860 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 19:11:10,861 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-02 19:11:10,861 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 19:11:10,874 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 19:11:10,875 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 19:11:10,911 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 19:11:10,911 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-02 19:11:10,911 INFO L213 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-02 19:11:10,917 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-02 19:11:10,951 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 19:11:10,954 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-02 19:11:10,968 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 19:11:10,987 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-02 19:11:10,987 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9] total 10 [2018-02-02 19:11:10,988 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-02-02 19:11:10,988 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-02-02 19:11:10,988 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=38, Invalid=52, Unknown=0, NotChecked=0, Total=90 [2018-02-02 19:11:10,988 INFO L87 Difference]: Start difference. First operand 139 states and 149 transitions. Second operand 10 states. [2018-02-02 19:11:11,004 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 19:11:11,004 INFO L93 Difference]: Finished difference Result 142 states and 152 transitions. [2018-02-02 19:11:11,004 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-02-02 19:11:11,004 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 67 [2018-02-02 19:11:11,004 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 19:11:11,005 INFO L225 Difference]: With dead ends: 142 [2018-02-02 19:11:11,005 INFO L226 Difference]: Without dead ends: 140 [2018-02-02 19:11:11,005 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 76 GetRequests, 67 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=42, Invalid=68, Unknown=0, NotChecked=0, Total=110 [2018-02-02 19:11:11,005 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 140 states. [2018-02-02 19:11:11,007 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 140 to 140. [2018-02-02 19:11:11,007 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 140 states. [2018-02-02 19:11:11,007 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 140 states to 140 states and 150 transitions. [2018-02-02 19:11:11,008 INFO L78 Accepts]: Start accepts. Automaton has 140 states and 150 transitions. Word has length 67 [2018-02-02 19:11:11,008 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 19:11:11,008 INFO L432 AbstractCegarLoop]: Abstraction has 140 states and 150 transitions. [2018-02-02 19:11:11,008 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-02-02 19:11:11,008 INFO L276 IsEmpty]: Start isEmpty. Operand 140 states and 150 transitions. [2018-02-02 19:11:11,008 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2018-02-02 19:11:11,008 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 19:11:11,008 INFO L351 BasicCegarLoop]: trace histogram [6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 19:11:11,008 INFO L371 AbstractCegarLoop]: === Iteration 18 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-02 19:11:11,008 INFO L82 PathProgramCache]: Analyzing trace with hash -1652723263, now seen corresponding path program 2 times [2018-02-02 19:11:11,008 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 19:11:11,009 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 19:11:11,009 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 19:11:11,009 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-02 19:11:11,009 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 19:11:11,023 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 19:11:11,024 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 19:11:11,080 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 19:11:11,080 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-02 19:11:11,081 INFO L213 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-02 19:11:11,092 INFO L109 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-02-02 19:11:11,113 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2018-02-02 19:11:11,113 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-02 19:11:11,116 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-02 19:11:11,119 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-02-02 19:11:11,120 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-02 19:11:11,128 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-02-02 19:11:11,128 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-02 19:11:11,136 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-02-02 19:11:11,136 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-02-02 19:11:11,750 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2018-02-02 19:11:11,767 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-02-02 19:11:11,767 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [22] imperfect sequences [10] total 31 [2018-02-02 19:11:11,767 INFO L409 AbstractCegarLoop]: Interpolant automaton has 31 states [2018-02-02 19:11:11,768 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 31 interpolants. [2018-02-02 19:11:11,768 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=115, Invalid=815, Unknown=0, NotChecked=0, Total=930 [2018-02-02 19:11:11,768 INFO L87 Difference]: Start difference. First operand 140 states and 150 transitions. Second operand 31 states. [2018-02-02 19:11:14,241 WARN L143 SmtUtils]: Spent 2023ms on a formula simplification that was a NOOP. DAG size: 32 [2018-02-02 19:11:15,040 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 19:11:15,040 INFO L93 Difference]: Finished difference Result 141 states and 149 transitions. [2018-02-02 19:11:15,040 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2018-02-02 19:11:15,040 INFO L78 Accepts]: Start accepts. Automaton has 31 states. Word has length 68 [2018-02-02 19:11:15,041 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 19:11:15,041 INFO L225 Difference]: With dead ends: 141 [2018-02-02 19:11:15,041 INFO L226 Difference]: Without dead ends: 139 [2018-02-02 19:11:15,041 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 92 GetRequests, 47 SyntacticMatches, 1 SemanticMatches, 44 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 420 ImplicationChecksByTransitivity, 3.0s TimeCoverageRelationStatistics Valid=241, Invalid=1829, Unknown=0, NotChecked=0, Total=2070 [2018-02-02 19:11:15,042 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 139 states. [2018-02-02 19:11:15,043 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 139 to 139. [2018-02-02 19:11:15,043 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 139 states. [2018-02-02 19:11:15,043 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 139 states to 139 states and 147 transitions. [2018-02-02 19:11:15,043 INFO L78 Accepts]: Start accepts. Automaton has 139 states and 147 transitions. Word has length 68 [2018-02-02 19:11:15,044 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 19:11:15,044 INFO L432 AbstractCegarLoop]: Abstraction has 139 states and 147 transitions. [2018-02-02 19:11:15,044 INFO L433 AbstractCegarLoop]: Interpolant automaton has 31 states. [2018-02-02 19:11:15,044 INFO L276 IsEmpty]: Start isEmpty. Operand 139 states and 147 transitions. [2018-02-02 19:11:15,044 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2018-02-02 19:11:15,044 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 19:11:15,044 INFO L351 BasicCegarLoop]: trace histogram [7, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 19:11:15,044 INFO L371 AbstractCegarLoop]: === Iteration 19 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-02 19:11:15,044 INFO L82 PathProgramCache]: Analyzing trace with hash 973434245, now seen corresponding path program 1 times [2018-02-02 19:11:15,044 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 19:11:15,045 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 19:11:15,045 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 19:11:15,045 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-02 19:11:15,045 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 19:11:15,053 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 19:11:15,053 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 19:11:15,150 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2018-02-02 19:11:15,150 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-02 19:11:15,150 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2018-02-02 19:11:15,150 INFO L409 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-02-02 19:11:15,150 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-02-02 19:11:15,150 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=133, Unknown=0, NotChecked=0, Total=156 [2018-02-02 19:11:15,151 INFO L87 Difference]: Start difference. First operand 139 states and 147 transitions. Second operand 13 states. [2018-02-02 19:11:15,216 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 19:11:15,216 INFO L93 Difference]: Finished difference Result 143 states and 149 transitions. [2018-02-02 19:11:15,216 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-02-02 19:11:15,216 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 76 [2018-02-02 19:11:15,216 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 19:11:15,217 INFO L225 Difference]: With dead ends: 143 [2018-02-02 19:11:15,217 INFO L226 Difference]: Without dead ends: 137 [2018-02-02 19:11:15,217 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=39, Invalid=233, Unknown=0, NotChecked=0, Total=272 [2018-02-02 19:11:15,217 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 137 states. [2018-02-02 19:11:15,219 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 137 to 137. [2018-02-02 19:11:15,219 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 137 states. [2018-02-02 19:11:15,220 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 137 states to 137 states and 143 transitions. [2018-02-02 19:11:15,220 INFO L78 Accepts]: Start accepts. Automaton has 137 states and 143 transitions. Word has length 76 [2018-02-02 19:11:15,220 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 19:11:15,220 INFO L432 AbstractCegarLoop]: Abstraction has 137 states and 143 transitions. [2018-02-02 19:11:15,220 INFO L433 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-02-02 19:11:15,220 INFO L276 IsEmpty]: Start isEmpty. Operand 137 states and 143 transitions. [2018-02-02 19:11:15,221 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 84 [2018-02-02 19:11:15,221 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 19:11:15,221 INFO L351 BasicCegarLoop]: trace histogram [7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 19:11:15,221 INFO L371 AbstractCegarLoop]: === Iteration 20 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-02 19:11:15,221 INFO L82 PathProgramCache]: Analyzing trace with hash -323701284, now seen corresponding path program 1 times [2018-02-02 19:11:15,221 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 19:11:15,221 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 19:11:15,222 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 19:11:15,222 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-02 19:11:15,222 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 19:11:15,235 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 19:11:15,236 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 19:11:15,562 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2018-02-02 19:11:15,562 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-02 19:11:15,562 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [26] imperfect sequences [] total 26 [2018-02-02 19:11:15,563 INFO L409 AbstractCegarLoop]: Interpolant automaton has 27 states [2018-02-02 19:11:15,563 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2018-02-02 19:11:15,563 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=53, Invalid=649, Unknown=0, NotChecked=0, Total=702 [2018-02-02 19:11:15,564 INFO L87 Difference]: Start difference. First operand 137 states and 143 transitions. Second operand 27 states. [2018-02-02 19:11:16,039 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 19:11:16,039 INFO L93 Difference]: Finished difference Result 147 states and 156 transitions. [2018-02-02 19:11:16,039 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2018-02-02 19:11:16,039 INFO L78 Accepts]: Start accepts. Automaton has 27 states. Word has length 83 [2018-02-02 19:11:16,040 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 19:11:16,040 INFO L225 Difference]: With dead ends: 147 [2018-02-02 19:11:16,040 INFO L226 Difference]: Without dead ends: 147 [2018-02-02 19:11:16,041 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 36 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 96 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=93, Invalid=1239, Unknown=0, NotChecked=0, Total=1332 [2018-02-02 19:11:16,041 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 147 states. [2018-02-02 19:11:16,044 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 147 to 143. [2018-02-02 19:11:16,044 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 143 states. [2018-02-02 19:11:16,045 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 143 states to 143 states and 153 transitions. [2018-02-02 19:11:16,045 INFO L78 Accepts]: Start accepts. Automaton has 143 states and 153 transitions. Word has length 83 [2018-02-02 19:11:16,045 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 19:11:16,045 INFO L432 AbstractCegarLoop]: Abstraction has 143 states and 153 transitions. [2018-02-02 19:11:16,045 INFO L433 AbstractCegarLoop]: Interpolant automaton has 27 states. [2018-02-02 19:11:16,045 INFO L276 IsEmpty]: Start isEmpty. Operand 143 states and 153 transitions. [2018-02-02 19:11:16,046 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 84 [2018-02-02 19:11:16,046 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 19:11:16,046 INFO L351 BasicCegarLoop]: trace histogram [7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 19:11:16,046 INFO L371 AbstractCegarLoop]: === Iteration 21 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-02 19:11:16,046 INFO L82 PathProgramCache]: Analyzing trace with hash -323701283, now seen corresponding path program 1 times [2018-02-02 19:11:16,047 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 19:11:16,047 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 19:11:16,048 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 19:11:16,048 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-02 19:11:16,048 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 19:11:16,063 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 19:11:16,064 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 19:11:16,157 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 19:11:16,158 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-02 19:11:16,158 INFO L213 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-02 19:11:16,166 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-02 19:11:16,207 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 19:11:16,209 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-02 19:11:16,220 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 19:11:16,237 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-02 19:11:16,237 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11] total 12 [2018-02-02 19:11:16,238 INFO L409 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-02-02 19:11:16,238 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-02-02 19:11:16,238 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=57, Invalid=75, Unknown=0, NotChecked=0, Total=132 [2018-02-02 19:11:16,238 INFO L87 Difference]: Start difference. First operand 143 states and 153 transitions. Second operand 12 states. [2018-02-02 19:11:16,253 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 19:11:16,253 INFO L93 Difference]: Finished difference Result 146 states and 156 transitions. [2018-02-02 19:11:16,253 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-02-02 19:11:16,253 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 83 [2018-02-02 19:11:16,253 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 19:11:16,254 INFO L225 Difference]: With dead ends: 146 [2018-02-02 19:11:16,254 INFO L226 Difference]: Without dead ends: 144 [2018-02-02 19:11:16,254 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 94 GetRequests, 83 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=61, Invalid=95, Unknown=0, NotChecked=0, Total=156 [2018-02-02 19:11:16,254 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 144 states. [2018-02-02 19:11:16,256 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 144 to 144. [2018-02-02 19:11:16,256 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 144 states. [2018-02-02 19:11:16,256 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 144 states to 144 states and 154 transitions. [2018-02-02 19:11:16,256 INFO L78 Accepts]: Start accepts. Automaton has 144 states and 154 transitions. Word has length 83 [2018-02-02 19:11:16,256 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 19:11:16,256 INFO L432 AbstractCegarLoop]: Abstraction has 144 states and 154 transitions. [2018-02-02 19:11:16,256 INFO L433 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-02-02 19:11:16,256 INFO L276 IsEmpty]: Start isEmpty. Operand 144 states and 154 transitions. [2018-02-02 19:11:16,257 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 85 [2018-02-02 19:11:16,257 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 19:11:16,257 INFO L351 BasicCegarLoop]: trace histogram [8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 19:11:16,257 INFO L371 AbstractCegarLoop]: === Iteration 22 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-02 19:11:16,257 INFO L82 PathProgramCache]: Analyzing trace with hash 1768153621, now seen corresponding path program 2 times [2018-02-02 19:11:16,257 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 19:11:16,257 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 19:11:16,258 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 19:11:16,258 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-02 19:11:16,258 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 19:11:16,273 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 19:11:16,274 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 19:11:16,343 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 19:11:16,343 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-02 19:11:16,343 INFO L213 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-02 19:11:16,348 INFO L109 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-02-02 19:11:16,395 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2018-02-02 19:11:16,395 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-02 19:11:16,400 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-02 19:11:16,406 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-02-02 19:11:16,407 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-02 19:11:16,422 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-02-02 19:11:16,422 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-02 19:11:16,432 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-02-02 19:11:16,432 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-02-02 19:11:17,506 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2018-02-02 19:11:17,544 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-02-02 19:11:17,545 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [26] imperfect sequences [12] total 37 [2018-02-02 19:11:17,545 INFO L409 AbstractCegarLoop]: Interpolant automaton has 37 states [2018-02-02 19:11:17,545 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 37 interpolants. [2018-02-02 19:11:17,546 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=150, Invalid=1182, Unknown=0, NotChecked=0, Total=1332 [2018-02-02 19:11:17,546 INFO L87 Difference]: Start difference. First operand 144 states and 154 transitions. Second operand 37 states. [2018-02-02 19:11:19,101 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 19:11:19,101 INFO L93 Difference]: Finished difference Result 145 states and 154 transitions. [2018-02-02 19:11:19,102 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 37 states. [2018-02-02 19:11:19,102 INFO L78 Accepts]: Start accepts. Automaton has 37 states. Word has length 84 [2018-02-02 19:11:19,102 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 19:11:19,102 INFO L225 Difference]: With dead ends: 145 [2018-02-02 19:11:19,102 INFO L226 Difference]: Without dead ends: 143 [2018-02-02 19:11:19,103 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 114 GetRequests, 57 SyntacticMatches, 3 SemanticMatches, 54 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 682 ImplicationChecksByTransitivity, 1.6s TimeCoverageRelationStatistics Valid=328, Invalid=2752, Unknown=0, NotChecked=0, Total=3080 [2018-02-02 19:11:19,103 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 143 states. [2018-02-02 19:11:19,105 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 143 to 143. [2018-02-02 19:11:19,105 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 143 states. [2018-02-02 19:11:19,105 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 143 states to 143 states and 152 transitions. [2018-02-02 19:11:19,105 INFO L78 Accepts]: Start accepts. Automaton has 143 states and 152 transitions. Word has length 84 [2018-02-02 19:11:19,105 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 19:11:19,105 INFO L432 AbstractCegarLoop]: Abstraction has 143 states and 152 transitions. [2018-02-02 19:11:19,105 INFO L433 AbstractCegarLoop]: Interpolant automaton has 37 states. [2018-02-02 19:11:19,106 INFO L276 IsEmpty]: Start isEmpty. Operand 143 states and 152 transitions. [2018-02-02 19:11:19,106 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 90 [2018-02-02 19:11:19,106 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 19:11:19,106 INFO L351 BasicCegarLoop]: trace histogram [9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 19:11:19,106 INFO L371 AbstractCegarLoop]: === Iteration 23 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-02 19:11:19,106 INFO L82 PathProgramCache]: Analyzing trace with hash -11138274, now seen corresponding path program 1 times [2018-02-02 19:11:19,106 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 19:11:19,106 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 19:11:19,107 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 19:11:19,107 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-02 19:11:19,107 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 19:11:19,123 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 19:11:19,124 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 19:11:19,223 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 19:11:19,223 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-02 19:11:19,223 INFO L213 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-02 19:11:19,233 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-02 19:11:19,288 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 19:11:19,292 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-02 19:11:19,305 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 19:11:19,338 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-02 19:11:19,338 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13] total 14 [2018-02-02 19:11:19,338 INFO L409 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-02-02 19:11:19,339 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-02-02 19:11:19,339 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=80, Invalid=102, Unknown=0, NotChecked=0, Total=182 [2018-02-02 19:11:19,339 INFO L87 Difference]: Start difference. First operand 143 states and 152 transitions. Second operand 14 states. [2018-02-02 19:11:19,370 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 19:11:19,370 INFO L93 Difference]: Finished difference Result 146 states and 155 transitions. [2018-02-02 19:11:19,371 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-02-02 19:11:19,371 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 89 [2018-02-02 19:11:19,371 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 19:11:19,372 INFO L225 Difference]: With dead ends: 146 [2018-02-02 19:11:19,372 INFO L226 Difference]: Without dead ends: 144 [2018-02-02 19:11:19,372 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 102 GetRequests, 89 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 26 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=84, Invalid=126, Unknown=0, NotChecked=0, Total=210 [2018-02-02 19:11:19,372 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 144 states. [2018-02-02 19:11:19,375 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 144 to 144. [2018-02-02 19:11:19,375 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 144 states. [2018-02-02 19:11:19,376 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 144 states to 144 states and 153 transitions. [2018-02-02 19:11:19,376 INFO L78 Accepts]: Start accepts. Automaton has 144 states and 153 transitions. Word has length 89 [2018-02-02 19:11:19,376 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 19:11:19,376 INFO L432 AbstractCegarLoop]: Abstraction has 144 states and 153 transitions. [2018-02-02 19:11:19,376 INFO L433 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-02-02 19:11:19,376 INFO L276 IsEmpty]: Start isEmpty. Operand 144 states and 153 transitions. [2018-02-02 19:11:19,377 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 91 [2018-02-02 19:11:19,377 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 19:11:19,377 INFO L351 BasicCegarLoop]: trace histogram [10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 19:11:19,377 INFO L371 AbstractCegarLoop]: === Iteration 24 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-02 19:11:19,377 INFO L82 PathProgramCache]: Analyzing trace with hash 558968150, now seen corresponding path program 2 times [2018-02-02 19:11:19,378 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 19:11:19,378 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 19:11:19,378 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 19:11:19,378 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-02 19:11:19,379 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 19:11:19,393 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 19:11:19,394 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 19:11:19,503 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 19:11:19,503 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-02 19:11:19,503 INFO L213 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-02 19:11:19,511 INFO L109 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-02-02 19:11:19,569 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-02-02 19:11:19,569 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-02 19:11:19,572 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-02 19:11:19,585 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 19:11:19,603 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-02 19:11:19,603 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14] total 15 [2018-02-02 19:11:19,603 INFO L409 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-02-02 19:11:19,603 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-02-02 19:11:19,603 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=93, Invalid=117, Unknown=0, NotChecked=0, Total=210 [2018-02-02 19:11:19,603 INFO L87 Difference]: Start difference. First operand 144 states and 153 transitions. Second operand 15 states. [2018-02-02 19:11:19,641 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 19:11:19,641 INFO L93 Difference]: Finished difference Result 147 states and 156 transitions. [2018-02-02 19:11:19,641 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-02-02 19:11:19,641 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 90 [2018-02-02 19:11:19,642 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 19:11:19,642 INFO L225 Difference]: With dead ends: 147 [2018-02-02 19:11:19,642 INFO L226 Difference]: Without dead ends: 145 [2018-02-02 19:11:19,643 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 104 GetRequests, 90 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 29 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=97, Invalid=143, Unknown=0, NotChecked=0, Total=240 [2018-02-02 19:11:19,643 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 145 states. [2018-02-02 19:11:19,645 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 145 to 145. [2018-02-02 19:11:19,646 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 145 states. [2018-02-02 19:11:19,646 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 145 states to 145 states and 154 transitions. [2018-02-02 19:11:19,646 INFO L78 Accepts]: Start accepts. Automaton has 145 states and 154 transitions. Word has length 90 [2018-02-02 19:11:19,647 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 19:11:19,647 INFO L432 AbstractCegarLoop]: Abstraction has 145 states and 154 transitions. [2018-02-02 19:11:19,647 INFO L433 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-02-02 19:11:19,647 INFO L276 IsEmpty]: Start isEmpty. Operand 145 states and 154 transitions. [2018-02-02 19:11:19,647 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 92 [2018-02-02 19:11:19,647 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 19:11:19,647 INFO L351 BasicCegarLoop]: trace histogram [11, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 19:11:19,648 INFO L371 AbstractCegarLoop]: === Iteration 25 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-02 19:11:19,648 INFO L82 PathProgramCache]: Analyzing trace with hash 1052398110, now seen corresponding path program 3 times [2018-02-02 19:11:19,648 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 19:11:19,648 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 19:11:19,649 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 19:11:19,649 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-02 19:11:19,649 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 19:11:19,663 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 19:11:19,664 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 19:11:19,810 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 19:11:19,810 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-02 19:11:19,810 INFO L213 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-02 19:11:19,818 INFO L109 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-02-02 19:11:23,415 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 7 check-sat command(s) [2018-02-02 19:11:23,416 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-02 19:11:23,421 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-02 19:11:23,546 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 19:11:23,564 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-02 19:11:23,565 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 20] total 33 [2018-02-02 19:11:23,565 INFO L409 AbstractCegarLoop]: Interpolant automaton has 33 states [2018-02-02 19:11:23,565 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 33 interpolants. [2018-02-02 19:11:23,565 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=286, Invalid=770, Unknown=0, NotChecked=0, Total=1056 [2018-02-02 19:11:23,565 INFO L87 Difference]: Start difference. First operand 145 states and 154 transitions. Second operand 33 states. [2018-02-02 19:11:23,655 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 19:11:23,655 INFO L93 Difference]: Finished difference Result 148 states and 157 transitions. [2018-02-02 19:11:23,656 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-02-02 19:11:23,656 INFO L78 Accepts]: Start accepts. Automaton has 33 states. Word has length 91 [2018-02-02 19:11:23,656 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 19:11:23,657 INFO L225 Difference]: With dead ends: 148 [2018-02-02 19:11:23,657 INFO L226 Difference]: Without dead ends: 146 [2018-02-02 19:11:23,657 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 108 GetRequests, 74 SyntacticMatches, 0 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 390 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=324, Invalid=936, Unknown=0, NotChecked=0, Total=1260 [2018-02-02 19:11:23,658 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 146 states. [2018-02-02 19:11:23,660 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 146 to 146. [2018-02-02 19:11:23,660 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 146 states. [2018-02-02 19:11:23,661 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 146 states to 146 states and 155 transitions. [2018-02-02 19:11:23,661 INFO L78 Accepts]: Start accepts. Automaton has 146 states and 155 transitions. Word has length 91 [2018-02-02 19:11:23,661 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 19:11:23,661 INFO L432 AbstractCegarLoop]: Abstraction has 146 states and 155 transitions. [2018-02-02 19:11:23,661 INFO L433 AbstractCegarLoop]: Interpolant automaton has 33 states. [2018-02-02 19:11:23,661 INFO L276 IsEmpty]: Start isEmpty. Operand 146 states and 155 transitions. [2018-02-02 19:11:23,662 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2018-02-02 19:11:23,662 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 19:11:23,662 INFO L351 BasicCegarLoop]: trace histogram [12, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 19:11:23,662 INFO L371 AbstractCegarLoop]: === Iteration 26 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-02 19:11:23,662 INFO L82 PathProgramCache]: Analyzing trace with hash -831142314, now seen corresponding path program 4 times [2018-02-02 19:11:23,662 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 19:11:23,663 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 19:11:23,663 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 19:11:23,663 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-02 19:11:23,664 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 19:11:23,679 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 19:11:23,680 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 19:11:23,814 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 19:11:23,814 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-02 19:11:23,814 INFO L213 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-02 19:11:23,825 INFO L109 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-02-02 19:11:23,898 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-02-02 19:11:23,898 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-02 19:11:23,902 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-02 19:11:23,919 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 19:11:23,949 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-02 19:11:23,950 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 16] total 17 [2018-02-02 19:11:23,950 INFO L409 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-02-02 19:11:23,950 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-02-02 19:11:23,950 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=122, Invalid=150, Unknown=0, NotChecked=0, Total=272 [2018-02-02 19:11:23,950 INFO L87 Difference]: Start difference. First operand 146 states and 155 transitions. Second operand 17 states. [2018-02-02 19:11:23,979 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 19:11:23,979 INFO L93 Difference]: Finished difference Result 149 states and 158 transitions. [2018-02-02 19:11:23,979 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-02-02 19:11:23,979 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 92 [2018-02-02 19:11:23,980 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 19:11:23,980 INFO L225 Difference]: With dead ends: 149 [2018-02-02 19:11:23,980 INFO L226 Difference]: Without dead ends: 147 [2018-02-02 19:11:23,980 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 108 GetRequests, 92 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 35 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=126, Invalid=180, Unknown=0, NotChecked=0, Total=306 [2018-02-02 19:11:23,981 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 147 states. [2018-02-02 19:11:23,982 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 147 to 147. [2018-02-02 19:11:23,983 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 147 states. [2018-02-02 19:11:23,983 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 147 states to 147 states and 156 transitions. [2018-02-02 19:11:23,983 INFO L78 Accepts]: Start accepts. Automaton has 147 states and 156 transitions. Word has length 92 [2018-02-02 19:11:23,983 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 19:11:23,983 INFO L432 AbstractCegarLoop]: Abstraction has 147 states and 156 transitions. [2018-02-02 19:11:23,984 INFO L433 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-02-02 19:11:23,984 INFO L276 IsEmpty]: Start isEmpty. Operand 147 states and 156 transitions. [2018-02-02 19:11:23,984 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2018-02-02 19:11:23,984 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 19:11:23,984 INFO L351 BasicCegarLoop]: trace histogram [13, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 19:11:23,984 INFO L371 AbstractCegarLoop]: === Iteration 27 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-02 19:11:23,985 INFO L82 PathProgramCache]: Analyzing trace with hash 908646686, now seen corresponding path program 5 times [2018-02-02 19:11:23,985 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 19:11:23,985 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 19:11:23,985 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 19:11:23,985 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-02 19:11:23,985 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 19:11:23,999 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 19:11:24,000 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 19:11:24,135 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 19:11:24,135 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-02 19:11:24,135 INFO L213 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-02 19:11:24,145 INFO L109 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-02-02 19:11:25,126 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 8 check-sat command(s) [2018-02-02 19:11:25,127 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-02 19:11:25,130 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-02 19:11:25,140 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 19:11:25,158 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-02 19:11:25,158 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17] total 18 [2018-02-02 19:11:25,158 INFO L409 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-02-02 19:11:25,158 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-02-02 19:11:25,158 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=138, Invalid=168, Unknown=0, NotChecked=0, Total=306 [2018-02-02 19:11:25,159 INFO L87 Difference]: Start difference. First operand 147 states and 156 transitions. Second operand 18 states. [2018-02-02 19:11:25,186 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 19:11:25,186 INFO L93 Difference]: Finished difference Result 150 states and 159 transitions. [2018-02-02 19:11:25,199 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-02-02 19:11:25,199 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 93 [2018-02-02 19:11:25,199 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 19:11:25,200 INFO L225 Difference]: With dead ends: 150 [2018-02-02 19:11:25,200 INFO L226 Difference]: Without dead ends: 148 [2018-02-02 19:11:25,200 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 110 GetRequests, 93 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 38 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=142, Invalid=200, Unknown=0, NotChecked=0, Total=342 [2018-02-02 19:11:25,200 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 148 states. [2018-02-02 19:11:25,202 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 148 to 148. [2018-02-02 19:11:25,202 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 148 states. [2018-02-02 19:11:25,203 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 148 states to 148 states and 157 transitions. [2018-02-02 19:11:25,203 INFO L78 Accepts]: Start accepts. Automaton has 148 states and 157 transitions. Word has length 93 [2018-02-02 19:11:25,203 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 19:11:25,203 INFO L432 AbstractCegarLoop]: Abstraction has 148 states and 157 transitions. [2018-02-02 19:11:25,203 INFO L433 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-02-02 19:11:25,204 INFO L276 IsEmpty]: Start isEmpty. Operand 148 states and 157 transitions. [2018-02-02 19:11:25,204 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2018-02-02 19:11:25,204 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 19:11:25,204 INFO L351 BasicCegarLoop]: trace histogram [14, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 19:11:25,204 INFO L371 AbstractCegarLoop]: === Iteration 28 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-02 19:11:25,204 INFO L82 PathProgramCache]: Analyzing trace with hash -992469162, now seen corresponding path program 6 times [2018-02-02 19:11:25,205 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 19:11:25,205 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 19:11:25,205 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 19:11:25,205 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-02 19:11:25,206 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 19:11:25,220 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 19:11:25,221 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 19:11:25,359 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 19:11:25,360 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-02 19:11:25,360 INFO L213 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-02 19:11:25,367 INFO L109 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-02-02 19:11:37,245 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 8 check-sat command(s) [2018-02-02 19:11:37,245 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-02 19:11:37,252 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-02 19:11:37,261 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 19:11:37,300 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-02 19:11:37,300 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 18] total 19 [2018-02-02 19:11:37,300 INFO L409 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-02-02 19:11:37,300 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-02-02 19:11:37,300 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=155, Invalid=187, Unknown=0, NotChecked=0, Total=342 [2018-02-02 19:11:37,301 INFO L87 Difference]: Start difference. First operand 148 states and 157 transitions. Second operand 19 states. [2018-02-02 19:11:37,326 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 19:11:37,326 INFO L93 Difference]: Finished difference Result 151 states and 160 transitions. [2018-02-02 19:11:37,326 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-02-02 19:11:37,327 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 94 [2018-02-02 19:11:37,327 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 19:11:37,327 INFO L225 Difference]: With dead ends: 151 [2018-02-02 19:11:37,327 INFO L226 Difference]: Without dead ends: 149 [2018-02-02 19:11:37,327 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 112 GetRequests, 94 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 41 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=159, Invalid=221, Unknown=0, NotChecked=0, Total=380 [2018-02-02 19:11:37,327 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 149 states. [2018-02-02 19:11:37,329 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 149 to 149. [2018-02-02 19:11:37,329 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 149 states. [2018-02-02 19:11:37,330 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 149 states to 149 states and 158 transitions. [2018-02-02 19:11:37,330 INFO L78 Accepts]: Start accepts. Automaton has 149 states and 158 transitions. Word has length 94 [2018-02-02 19:11:37,330 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 19:11:37,330 INFO L432 AbstractCegarLoop]: Abstraction has 149 states and 158 transitions. [2018-02-02 19:11:37,330 INFO L433 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-02-02 19:11:37,331 INFO L276 IsEmpty]: Start isEmpty. Operand 149 states and 158 transitions. [2018-02-02 19:11:37,331 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2018-02-02 19:11:37,331 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 19:11:37,331 INFO L351 BasicCegarLoop]: trace histogram [15, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 19:11:37,331 INFO L371 AbstractCegarLoop]: === Iteration 29 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-02 19:11:37,331 INFO L82 PathProgramCache]: Analyzing trace with hash 202481694, now seen corresponding path program 7 times [2018-02-02 19:11:37,331 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 19:11:37,332 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 19:11:37,332 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 19:11:37,332 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-02 19:11:37,332 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 19:11:37,347 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 19:11:37,348 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 19:11:37,504 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 19:11:37,505 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-02 19:11:37,505 INFO L213 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-02 19:11:37,512 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-02 19:11:37,552 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 19:11:37,556 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-02 19:11:37,568 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 19:11:37,598 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-02 19:11:37,599 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19] total 20 [2018-02-02 19:11:37,599 INFO L409 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-02-02 19:11:37,599 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-02-02 19:11:37,599 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=173, Invalid=207, Unknown=0, NotChecked=0, Total=380 [2018-02-02 19:11:37,599 INFO L87 Difference]: Start difference. First operand 149 states and 158 transitions. Second operand 20 states. [2018-02-02 19:11:37,636 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 19:11:37,636 INFO L93 Difference]: Finished difference Result 152 states and 161 transitions. [2018-02-02 19:11:37,636 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-02-02 19:11:37,636 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 95 [2018-02-02 19:11:37,636 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 19:11:37,637 INFO L225 Difference]: With dead ends: 152 [2018-02-02 19:11:37,637 INFO L226 Difference]: Without dead ends: 150 [2018-02-02 19:11:37,637 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 114 GetRequests, 95 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 44 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=177, Invalid=243, Unknown=0, NotChecked=0, Total=420 [2018-02-02 19:11:37,638 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 150 states. [2018-02-02 19:11:37,641 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 150 to 150. [2018-02-02 19:11:37,641 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 150 states. [2018-02-02 19:11:37,642 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 150 states to 150 states and 159 transitions. [2018-02-02 19:11:37,642 INFO L78 Accepts]: Start accepts. Automaton has 150 states and 159 transitions. Word has length 95 [2018-02-02 19:11:37,642 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 19:11:37,642 INFO L432 AbstractCegarLoop]: Abstraction has 150 states and 159 transitions. [2018-02-02 19:11:37,642 INFO L433 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-02-02 19:11:37,642 INFO L276 IsEmpty]: Start isEmpty. Operand 150 states and 159 transitions. [2018-02-02 19:11:37,643 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2018-02-02 19:11:37,643 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 19:11:37,643 INFO L351 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 19:11:37,643 INFO L371 AbstractCegarLoop]: === Iteration 30 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-02 19:11:37,643 INFO L82 PathProgramCache]: Analyzing trace with hash -1408747434, now seen corresponding path program 8 times [2018-02-02 19:11:37,643 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 19:11:37,643 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 19:11:37,644 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 19:11:37,644 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-02 19:11:37,644 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 19:11:37,708 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 19:11:37,709 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 19:11:40,509 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 19:11:40,510 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-02 19:11:40,510 INFO L213 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-02 19:11:40,515 INFO L109 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-02-02 19:11:40,557 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-02-02 19:11:40,557 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-02 19:11:40,561 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-02 19:11:40,734 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-02-02 19:11:40,735 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-02-02 19:11:40,735 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-02 19:11:40,737 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-02 19:11:40,740 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-02 19:11:40,740 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:20, output treesize:16 [2018-02-02 19:11:40,782 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 20 [2018-02-02 19:11:40,783 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:40,785 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 27 [2018-02-02 19:11:40,785 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-02 19:11:40,788 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-02 19:11:40,791 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-02 19:11:40,792 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:31, output treesize:27 [2018-02-02 19:11:40,835 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 29 [2018-02-02 19:11:40,837 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:40,838 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:40,838 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:40,839 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 52 [2018-02-02 19:11:40,839 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-02 19:11:40,844 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-02 19:11:40,850 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-02 19:11:40,850 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:42, output treesize:38 [2018-02-02 19:11:40,899 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 38 [2018-02-02 19:11:40,906 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:40,906 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:40,907 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:40,907 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:40,908 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:40,908 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:40,909 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 6 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 85 [2018-02-02 19:11:40,909 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-02 19:11:40,919 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-02 19:11:40,925 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-02 19:11:40,925 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:53, output treesize:49 [2018-02-02 19:11:40,979 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 58 treesize of output 47 [2018-02-02 19:11:40,981 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:40,982 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:40,982 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:40,983 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:40,983 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:40,984 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:40,984 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:40,985 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:40,985 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:40,985 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:40,986 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 10 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 126 [2018-02-02 19:11:40,986 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-02 19:11:40,998 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-02 19:11:41,006 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-02 19:11:41,006 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:64, output treesize:60 [2018-02-02 19:11:41,065 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 69 treesize of output 56 [2018-02-02 19:11:41,069 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,070 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,070 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,071 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,071 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,072 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,072 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,073 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,073 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,074 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,075 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,075 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,076 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,076 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,077 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,077 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 5 select indices, 5 select index equivalence classes, 15 disjoint index pairs (out of 10 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 56 treesize of output 175 [2018-02-02 19:11:41,078 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-02 19:11:41,107 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-02 19:11:41,119 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-02 19:11:41,119 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:75, output treesize:71 [2018-02-02 19:11:41,212 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 80 treesize of output 65 [2018-02-02 19:11:41,216 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,216 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,217 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,218 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,218 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,219 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,220 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,220 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,221 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,222 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,222 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,223 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,224 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,224 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,225 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,225 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,226 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,227 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,227 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,228 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,229 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,229 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 6 select indices, 6 select index equivalence classes, 21 disjoint index pairs (out of 15 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 65 treesize of output 232 [2018-02-02 19:11:41,230 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-02 19:11:41,291 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-02 19:11:41,303 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-02 19:11:41,303 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:86, output treesize:82 [2018-02-02 19:11:41,382 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 91 treesize of output 74 [2018-02-02 19:11:41,384 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,385 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,386 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,387 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,387 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,388 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,388 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,389 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,390 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,390 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,391 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,391 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,392 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,393 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,393 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,394 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,394 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,395 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,396 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,396 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,397 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,397 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,398 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,399 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,399 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,400 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,401 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,401 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,402 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 7 select indices, 7 select index equivalence classes, 28 disjoint index pairs (out of 21 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 74 treesize of output 297 [2018-02-02 19:11:41,402 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-02 19:11:41,445 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-02 19:11:41,457 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-02 19:11:41,457 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:97, output treesize:93 [2018-02-02 19:11:41,534 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 102 treesize of output 83 [2018-02-02 19:11:41,536 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,536 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,537 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,537 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,538 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,538 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,538 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,539 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,540 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,540 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,541 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,541 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,541 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,542 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,542 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,543 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,543 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,544 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,544 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,544 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,545 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,545 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,546 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,546 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,547 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,547 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,548 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,548 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,548 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,549 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,549 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,550 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,550 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,550 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,551 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,551 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,552 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 8 select indices, 8 select index equivalence classes, 36 disjoint index pairs (out of 28 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 83 treesize of output 370 [2018-02-02 19:11:41,553 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-02 19:11:41,604 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-02 19:11:41,617 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-02 19:11:41,617 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:108, output treesize:104 [2018-02-02 19:11:41,698 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 113 treesize of output 92 [2018-02-02 19:11:41,702 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,703 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,703 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,704 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,705 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,706 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,707 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,708 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,709 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,710 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,711 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,711 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,712 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,713 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,714 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,715 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,715 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,716 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,717 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,718 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,719 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,719 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,720 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,721 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,722 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,723 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,724 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,724 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,725 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,725 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,726 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,727 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,727 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,728 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,729 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,729 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,730 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,730 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,731 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,732 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,732 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,733 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,733 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,734 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,735 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,736 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 9 select indices, 9 select index equivalence classes, 45 disjoint index pairs (out of 36 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 92 treesize of output 451 [2018-02-02 19:11:41,737 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-02 19:11:41,809 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-02 19:11:41,825 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-02-02 19:11:41,825 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:124, output treesize:120 [2018-02-02 19:11:41,933 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 124 treesize of output 101 [2018-02-02 19:11:41,936 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,937 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,937 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,938 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,939 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,940 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,941 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,941 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,942 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,943 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,944 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,945 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,945 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,946 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,954 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,963 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,964 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,966 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,967 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,968 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,969 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,971 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,972 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,973 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,974 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,975 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,977 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,978 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,979 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,980 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,981 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,982 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,983 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,984 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,985 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,986 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,988 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,988 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,990 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,991 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,992 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,993 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,994 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,995 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,996 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,997 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:41,998 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:42,000 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:42,001 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:42,002 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:42,003 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:42,004 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:42,005 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:42,006 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:42,008 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:42,009 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 10 select indices, 10 select index equivalence classes, 55 disjoint index pairs (out of 45 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 101 treesize of output 540 [2018-02-02 19:11:42,010 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-02 19:11:42,137 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-02 19:11:42,162 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-02-02 19:11:42,162 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:135, output treesize:131 [2018-02-02 19:11:48,314 WARN L143 SmtUtils]: Spent 2019ms on a formula simplification that was a NOOP. DAG size: 58 [2018-02-02 19:11:48,325 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 135 treesize of output 110 [2018-02-02 19:11:48,337 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:48,351 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:48,352 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:48,353 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:48,354 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:48,355 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:48,356 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:48,357 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:48,358 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:48,359 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:48,361 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:48,362 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:48,363 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:48,364 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:48,365 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:48,367 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:48,367 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:48,368 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:48,369 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:48,372 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:48,373 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:48,374 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:48,376 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:48,378 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:48,380 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:48,381 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:48,383 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:48,386 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:48,388 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:48,389 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:48,391 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:48,392 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:48,394 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:48,395 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:48,399 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:48,400 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:48,401 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:48,402 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:48,404 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:48,404 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:48,407 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:48,408 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:48,409 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:48,410 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:48,411 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:48,414 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:48,415 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:48,416 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:48,417 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:48,420 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:48,421 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:48,422 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:48,425 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:48,426 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:48,428 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:48,432 INFO L303 Elim1Store]: Index analysis took 105 ms [2018-02-02 19:11:48,433 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 11 select indices, 11 select index equivalence classes, 55 disjoint index pairs (out of 55 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 110 treesize of output 551 [2018-02-02 19:11:48,434 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-02 19:11:48,565 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-02 19:11:48,587 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 3 dim-0 vars, and 1 xjuncts. [2018-02-02 19:11:48,587 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:151, output treesize:147 [2018-02-02 19:11:58,723 WARN L143 SmtUtils]: Spent 4033ms on a formula simplification that was a NOOP. DAG size: 67 [2018-02-02 19:11:58,729 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 146 treesize of output 119 [2018-02-02 19:11:58,733 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:58,733 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:58,736 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:58,736 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:58,737 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:58,738 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:58,739 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:58,740 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:58,741 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:58,742 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:58,745 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:58,748 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:58,750 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:58,751 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:58,752 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:58,753 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:58,754 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:58,755 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:58,756 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:58,759 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:58,761 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:58,761 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:58,762 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:58,763 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:58,763 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:58,764 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:58,764 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:58,773 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:58,780 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:58,781 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:58,782 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:58,783 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:58,783 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:58,784 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:58,785 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:58,786 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:58,787 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:58,787 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:58,788 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:58,789 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:58,790 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:58,791 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:58,791 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:58,792 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:58,792 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:58,793 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:58,794 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:58,795 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:58,795 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:58,796 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:58,797 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:58,798 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:58,799 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:58,799 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:58,801 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:11:58,803 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 12 select indices, 12 select index equivalence classes, 55 disjoint index pairs (out of 66 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 119 treesize of output 562 [2018-02-02 19:11:58,804 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-02 19:11:58,933 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-02 19:11:58,960 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 1 dim-2 vars, End of recursive call: 4 dim-0 vars, and 1 xjuncts. [2018-02-02 19:11:58,960 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 5 variables, input treesize:167, output treesize:163 [2018-02-02 19:12:05,137 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 146 treesize of output 119 [2018-02-02 19:12:05,142 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:05,143 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:05,144 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:05,147 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:05,148 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:05,149 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:05,150 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:05,151 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:05,152 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:05,152 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:05,155 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:05,156 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:05,159 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:05,160 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:05,161 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:05,162 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:05,163 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:05,164 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:05,165 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:05,168 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:05,171 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:05,172 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:05,173 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:05,174 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:05,175 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:05,176 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:05,177 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:05,182 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:05,183 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:05,184 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:05,185 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:05,185 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:05,187 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:05,188 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:05,203 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:05,205 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:05,206 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:05,207 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:05,208 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:05,209 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:05,212 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:05,213 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:05,215 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:05,216 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:05,218 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:05,221 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:05,223 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:05,223 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:05,224 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:05,226 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:05,227 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:05,229 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:05,231 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:05,232 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:05,234 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:05,238 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 12 select indices, 12 select index equivalence classes, 55 disjoint index pairs (out of 66 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 119 treesize of output 562 [2018-02-02 19:12:05,239 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-02 19:12:05,351 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-02 19:12:05,381 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 1 dim-2 vars, End of recursive call: 4 dim-0 vars, and 1 xjuncts. [2018-02-02 19:12:05,381 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 5 variables, input treesize:167, output treesize:163 [2018-02-02 19:12:11,523 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 146 treesize of output 119 [2018-02-02 19:12:11,527 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:11,529 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:11,530 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:11,531 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:11,532 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:11,536 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:11,537 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:11,539 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:11,540 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:11,543 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:11,545 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:11,546 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:11,548 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:11,549 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:11,552 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:11,553 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:11,554 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:11,563 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:11,572 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:11,575 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:11,576 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:11,577 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:11,580 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:11,581 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:11,583 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:11,584 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:11,585 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:11,588 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:11,589 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:11,593 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:11,594 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:11,595 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:11,597 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:11,598 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:11,600 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:11,603 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:11,604 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:11,606 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:11,607 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:11,608 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:11,612 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:11,613 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:11,614 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:11,615 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:11,616 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:11,629 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:11,630 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:11,630 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:11,631 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:11,634 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:11,636 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:11,637 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:11,641 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:11,642 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:11,645 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:11,648 INFO L303 Elim1Store]: Index analysis took 123 ms [2018-02-02 19:12:11,649 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 12 select indices, 12 select index equivalence classes, 55 disjoint index pairs (out of 66 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 119 treesize of output 562 [2018-02-02 19:12:11,650 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-02 19:12:11,779 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-02 19:12:11,809 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 1 dim-2 vars, End of recursive call: 4 dim-0 vars, and 1 xjuncts. [2018-02-02 19:12:11,809 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 5 variables, input treesize:167, output treesize:163 [2018-02-02 19:12:17,943 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 146 treesize of output 119 [2018-02-02 19:12:17,952 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:17,953 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:17,957 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:17,958 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:17,959 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:17,959 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:17,960 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:17,961 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:17,963 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:17,964 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:17,967 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:17,970 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:17,971 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:17,972 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:17,973 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:17,974 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:17,975 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:17,975 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:17,976 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:17,981 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:17,982 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:17,983 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:17,984 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:17,985 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:17,986 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:17,987 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:17,988 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:18,008 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:18,009 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:18,010 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:18,011 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:18,012 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:18,014 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:18,015 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:18,018 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:18,020 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:18,021 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:18,022 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:18,023 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:18,024 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:18,027 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:18,029 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:18,029 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:18,030 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:18,032 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:18,035 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:18,036 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:18,037 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:18,038 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:18,040 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:18,041 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:18,042 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:18,045 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:18,046 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:18,048 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 19:12:18,051 INFO L303 Elim1Store]: Index analysis took 106 ms [2018-02-02 19:12:18,052 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 12 select indices, 12 select index equivalence classes, 55 disjoint index pairs (out of 66 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 119 treesize of output 562 [2018-02-02 19:12:18,052 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-02 19:12:18,170 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-02 19:12:18,196 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 1 dim-2 vars, End of recursive call: 4 dim-0 vars, and 1 xjuncts. [2018-02-02 19:12:18,196 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 5 variables, input treesize:167, output treesize:163 Received shutdown request... [2018-02-02 19:12:34,435 INFO L175 TraceCheckSpWp]: Timeout while computing interpolants [2018-02-02 19:12:34,435 WARN L491 AbstractCegarLoop]: Verification canceled [2018-02-02 19:12:34,439 WARN L185 ceAbstractionStarter]: Timeout [2018-02-02 19:12:34,439 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 02.02 07:12:34 BoogieIcfgContainer [2018-02-02 19:12:34,439 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-02-02 19:12:34,439 INFO L168 Benchmark]: Toolchain (without parser) took 96126.93 ms. Allocated memory was 399.0 MB in the beginning and 966.3 MB in the end (delta: 567.3 MB). Free memory was 355.9 MB in the beginning and 449.6 MB in the end (delta: -93.8 MB). Peak memory consumption was 473.5 MB. Max. memory is 5.3 GB. [2018-02-02 19:12:34,440 INFO L168 Benchmark]: CDTParser took 0.15 ms. Allocated memory is still 399.0 MB. Free memory is still 362.5 MB. There was no memory consumed. Max. memory is 5.3 GB. [2018-02-02 19:12:34,440 INFO L168 Benchmark]: CACSL2BoogieTranslator took 179.13 ms. Allocated memory is still 399.0 MB. Free memory was 355.9 MB in the beginning and 341.3 MB in the end (delta: 14.5 MB). Peak memory consumption was 14.5 MB. Max. memory is 5.3 GB. [2018-02-02 19:12:34,440 INFO L168 Benchmark]: Boogie Preprocessor took 32.72 ms. Allocated memory is still 399.0 MB. Free memory was 341.3 MB in the beginning and 340.0 MB in the end (delta: 1.3 MB). Peak memory consumption was 1.3 MB. Max. memory is 5.3 GB. [2018-02-02 19:12:34,441 INFO L168 Benchmark]: RCFGBuilder took 346.72 ms. Allocated memory is still 399.0 MB. Free memory was 340.0 MB in the beginning and 307.4 MB in the end (delta: 32.6 MB). Peak memory consumption was 32.6 MB. Max. memory is 5.3 GB. [2018-02-02 19:12:34,441 INFO L168 Benchmark]: TraceAbstraction took 95564.90 ms. Allocated memory was 399.0 MB in the beginning and 966.3 MB in the end (delta: 567.3 MB). Free memory was 306.0 MB in the beginning and 449.6 MB in the end (delta: -143.6 MB). Peak memory consumption was 423.7 MB. Max. memory is 5.3 GB. [2018-02-02 19:12:34,441 INFO L344 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.15 ms. Allocated memory is still 399.0 MB. Free memory is still 362.5 MB. There was no memory consumed. Max. memory is 5.3 GB. * CACSL2BoogieTranslator took 179.13 ms. Allocated memory is still 399.0 MB. Free memory was 355.9 MB in the beginning and 341.3 MB in the end (delta: 14.5 MB). Peak memory consumption was 14.5 MB. Max. memory is 5.3 GB. * Boogie Preprocessor took 32.72 ms. Allocated memory is still 399.0 MB. Free memory was 341.3 MB in the beginning and 340.0 MB in the end (delta: 1.3 MB). Peak memory consumption was 1.3 MB. Max. memory is 5.3 GB. * RCFGBuilder took 346.72 ms. Allocated memory is still 399.0 MB. Free memory was 340.0 MB in the beginning and 307.4 MB in the end (delta: 32.6 MB). Peak memory consumption was 32.6 MB. Max. memory is 5.3 GB. * TraceAbstraction took 95564.90 ms. Allocated memory was 399.0 MB in the beginning and 966.3 MB in the end (delta: 567.3 MB). Free memory was 306.0 MB in the beginning and 449.6 MB in the end (delta: -143.6 MB). Peak memory consumption was 423.7 MB. Max. memory is 5.3 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1294). Cancelled while BasicCegarLoop was analyzing trace of length 97 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 67. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1294). Cancelled while BasicCegarLoop was analyzing trace of length 97 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 67. - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1411). Cancelled while BasicCegarLoop was analyzing trace of length 97 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 67. - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1411). Cancelled while BasicCegarLoop was analyzing trace of length 97 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 67. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1265). Cancelled while BasicCegarLoop was analyzing trace of length 97 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 67. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1265). Cancelled while BasicCegarLoop was analyzing trace of length 97 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 67. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1267). Cancelled while BasicCegarLoop was analyzing trace of length 97 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 67. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1267). Cancelled while BasicCegarLoop was analyzing trace of length 97 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 67. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1344). Cancelled while BasicCegarLoop was analyzing trace of length 97 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 67. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1340). Cancelled while BasicCegarLoop was analyzing trace of length 97 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 67. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1344). Cancelled while BasicCegarLoop was analyzing trace of length 97 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 67. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1340). Cancelled while BasicCegarLoop was analyzing trace of length 97 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 67. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1339). Cancelled while BasicCegarLoop was analyzing trace of length 97 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 67. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1339). Cancelled while BasicCegarLoop was analyzing trace of length 97 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 67. - TimeoutResultAtElement [Line: 1452]: Timeout (TraceAbstraction) Unable to prove that all allocated memory was freed (line 1452). Cancelled while BasicCegarLoop was analyzing trace of length 97 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 67. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1099). Cancelled while BasicCegarLoop was analyzing trace of length 97 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 67. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1100). Cancelled while BasicCegarLoop was analyzing trace of length 97 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 67. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1100). Cancelled while BasicCegarLoop was analyzing trace of length 97 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 67. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1099). Cancelled while BasicCegarLoop was analyzing trace of length 97 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 67. - StatisticsResult: Ultimate Automizer benchmark data CFG has 19 procedures, 123 locations, 19 error locations. TIMEOUT Result, 95.5s OverallTime, 30 OverallIterations, 16 TraceHistogramMax, 12.8s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 3131 SDtfs, 783 SDslu, 27831 SDs, 0 SdLazy, 7955 SolverSat, 249 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 3.8s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 1519 GetRequests, 1045 SyntacticMatches, 5 SemanticMatches, 469 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2162 ImplicationChecksByTransitivity, 14.3s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=150occurred in iteration=29, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.1s AutomataMinimizationTime, 29 MinimizatonAttempts, 46 StatesRemovedByMinimization, 8 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.2s SsaConstructionTime, 17.0s SatisfiabilityAnalysisTime, 7.7s InterpolantComputationTime, 2807 NumberOfCodeBlocks, 2787 NumberOfCodeBlocksAsserted, 66 NumberOfCheckSat, 2763 ConstructedInterpolants, 179 QuantifiedInterpolants, 615629 SizeOfPredicates, 71 NumberOfNonLiveVariables, 5545 ConjunctsInSsa, 411 ConjunctsInUnsatCore, 44 InterpolantComputations, 18 PerfectInterpolantSequences, 187/1477 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: Timeout Written .csv to /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memleaks_test22_5_false-valid-deref.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Camel.epf_AutomizerC.xml/Csv-Benchmark-0-2018-02-02_19-12-34-446.csv Written .csv to /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memleaks_test22_5_false-valid-deref.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Camel.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-0-2018-02-02_19-12-34-446.csv Completed graceful shutdown