java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/cav18-smtinterpol/svcomp-DerefFreeMemtrack-32bit-Automizer_Camel.epf -i ../../../trunk/examples/svcomp/ldv-memsafety/memleaks_test15_true-valid-memsafety_true-termination.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-26d9e06-m [2018-02-02 09:28:10,450 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-02-02 09:28:10,451 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-02-02 09:28:10,461 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-02-02 09:28:10,461 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-02-02 09:28:10,462 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-02-02 09:28:10,462 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-02-02 09:28:10,463 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-02-02 09:28:10,464 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-02-02 09:28:10,465 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-02-02 09:28:10,465 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-02-02 09:28:10,466 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-02-02 09:28:10,466 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-02-02 09:28:10,467 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-02-02 09:28:10,468 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-02-02 09:28:10,469 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-02-02 09:28:10,471 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-02-02 09:28:10,473 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-02-02 09:28:10,473 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-02-02 09:28:10,474 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-02-02 09:28:10,476 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-02-02 09:28:10,476 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-02-02 09:28:10,476 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-02-02 09:28:10,477 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-02-02 09:28:10,478 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-02-02 09:28:10,479 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-02-02 09:28:10,479 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-02-02 09:28:10,479 INFO L177 SettingsManager]: PEA to Boogie provides no preferences, ignoring... [2018-02-02 09:28:10,479 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-02-02 09:28:10,480 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-02-02 09:28:10,480 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-02-02 09:28:10,480 INFO L98 SettingsManager]: Beginning loading settings from /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/cav18-smtinterpol/svcomp-DerefFreeMemtrack-32bit-Automizer_Camel.epf [2018-02-02 09:28:10,490 INFO L110 SettingsManager]: Loading preferences was successful [2018-02-02 09:28:10,490 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-02-02 09:28:10,491 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-02-02 09:28:10,491 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-02-02 09:28:10,491 INFO L133 SettingsManager]: * Use SBE=true [2018-02-02 09:28:10,491 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-02-02 09:28:10,492 INFO L133 SettingsManager]: * sizeof long=4 [2018-02-02 09:28:10,492 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-02-02 09:28:10,492 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-02-02 09:28:10,492 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-02-02 09:28:10,492 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-02-02 09:28:10,492 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-02-02 09:28:10,492 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-02-02 09:28:10,493 INFO L133 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2018-02-02 09:28:10,493 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-02-02 09:28:10,493 INFO L133 SettingsManager]: * sizeof long double=12 [2018-02-02 09:28:10,493 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-02-02 09:28:10,493 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-02-02 09:28:10,493 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-02-02 09:28:10,494 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-02-02 09:28:10,494 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-02-02 09:28:10,494 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-02-02 09:28:10,494 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-02-02 09:28:10,494 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-02-02 09:28:10,494 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL [2018-02-02 09:28:10,522 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-02-02 09:28:10,532 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully initialized [2018-02-02 09:28:10,535 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-02-02 09:28:10,536 INFO L271 PluginConnector]: Initializing CDTParser... [2018-02-02 09:28:10,536 INFO L276 PluginConnector]: CDTParser initialized [2018-02-02 09:28:10,537 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/ldv-memsafety/memleaks_test15_true-valid-memsafety_true-termination.i [2018-02-02 09:28:10,676 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-02-02 09:28:10,677 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-02-02 09:28:10,678 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-02-02 09:28:10,678 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-02-02 09:28:10,684 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-02-02 09:28:10,685 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 02.02 09:28:10" (1/1) ... [2018-02-02 09:28:10,687 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@4398c585 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.02 09:28:10, skipping insertion in model container [2018-02-02 09:28:10,688 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 02.02 09:28:10" (1/1) ... [2018-02-02 09:28:10,701 INFO L153 Dispatcher]: Using SV-COMP mode [2018-02-02 09:28:10,739 INFO L153 Dispatcher]: Using SV-COMP mode [2018-02-02 09:28:10,828 INFO L450 PostProcessor]: Settings: Checked method=main [2018-02-02 09:28:10,845 INFO L450 PostProcessor]: Settings: Checked method=main [2018-02-02 09:28:10,854 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.02 09:28:10 WrapperNode [2018-02-02 09:28:10,855 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-02-02 09:28:10,855 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-02-02 09:28:10,855 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-02-02 09:28:10,855 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-02-02 09:28:10,867 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.02 09:28:10" (1/1) ... [2018-02-02 09:28:10,867 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.02 09:28:10" (1/1) ... [2018-02-02 09:28:10,877 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.02 09:28:10" (1/1) ... [2018-02-02 09:28:10,878 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.02 09:28:10" (1/1) ... [2018-02-02 09:28:10,882 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.02 09:28:10" (1/1) ... [2018-02-02 09:28:10,884 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.02 09:28:10" (1/1) ... [2018-02-02 09:28:10,886 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.02 09:28:10" (1/1) ... [2018-02-02 09:28:10,888 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-02-02 09:28:10,888 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-02-02 09:28:10,888 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-02-02 09:28:10,888 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-02-02 09:28:10,889 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.02 09:28:10" (1/1) ... No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-02-02 09:28:10,923 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-02-02 09:28:10,923 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-02-02 09:28:10,924 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_nonpositive [2018-02-02 09:28:10,924 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_malloc [2018-02-02 09:28:10,924 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_zalloc [2018-02-02 09:28:10,924 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_dev_get_drvdata [2018-02-02 09:28:10,924 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_dev_set_drvdata [2018-02-02 09:28:10,924 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_hid_get_drvdata [2018-02-02 09:28:10,924 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_hid_set_drvdata [2018-02-02 09:28:10,924 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_arvo_init_arvo_device_struct [2018-02-02 09:28:10,924 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_arvo_init_specials [2018-02-02 09:28:10,924 INFO L136 BoogieDeclarations]: Found implementation of procedure lvd_arvo_remove_specials [2018-02-02 09:28:10,924 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_arvo_probe [2018-02-02 09:28:10,924 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_arvo_remove [2018-02-02 09:28:10,925 INFO L136 BoogieDeclarations]: Found implementation of procedure entry_point [2018-02-02 09:28:10,925 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-02-02 09:28:10,925 INFO L128 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2018-02-02 09:28:10,925 INFO L128 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2018-02-02 09:28:10,925 INFO L128 BoogieDeclarations]: Found specification of procedure write~int [2018-02-02 09:28:10,925 INFO L128 BoogieDeclarations]: Found specification of procedure read~int [2018-02-02 09:28:10,925 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.free [2018-02-02 09:28:10,925 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-02-02 09:28:10,925 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-02-02 09:28:10,925 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.meminit [2018-02-02 09:28:10,925 INFO L136 BoogieDeclarations]: Found implementation of procedure #Ultimate.meminit [2018-02-02 09:28:10,925 INFO L128 BoogieDeclarations]: Found specification of procedure malloc [2018-02-02 09:28:10,925 INFO L128 BoogieDeclarations]: Found specification of procedure calloc [2018-02-02 09:28:10,925 INFO L128 BoogieDeclarations]: Found specification of procedure free [2018-02-02 09:28:10,926 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2018-02-02 09:28:10,926 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_nonpositive [2018-02-02 09:28:10,926 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_malloc [2018-02-02 09:28:10,926 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_zalloc [2018-02-02 09:28:10,926 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_dev_get_drvdata [2018-02-02 09:28:10,926 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_dev_set_drvdata [2018-02-02 09:28:10,926 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_hid_get_drvdata [2018-02-02 09:28:10,926 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_hid_set_drvdata [2018-02-02 09:28:10,926 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_arvo_init_arvo_device_struct [2018-02-02 09:28:10,926 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_arvo_init_specials [2018-02-02 09:28:10,926 INFO L128 BoogieDeclarations]: Found specification of procedure lvd_arvo_remove_specials [2018-02-02 09:28:10,927 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_arvo_probe [2018-02-02 09:28:10,927 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_arvo_remove [2018-02-02 09:28:10,927 INFO L128 BoogieDeclarations]: Found specification of procedure entry_point [2018-02-02 09:28:10,927 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-02-02 09:28:10,927 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-02-02 09:28:10,927 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-02-02 09:28:11,290 INFO L257 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-02-02 09:28:11,291 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 02.02 09:28:11 BoogieIcfgContainer [2018-02-02 09:28:11,291 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-02-02 09:28:11,291 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-02-02 09:28:11,291 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-02-02 09:28:11,293 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-02-02 09:28:11,293 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 02.02 09:28:10" (1/3) ... [2018-02-02 09:28:11,294 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@66953aa7 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 02.02 09:28:11, skipping insertion in model container [2018-02-02 09:28:11,294 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.02 09:28:10" (2/3) ... [2018-02-02 09:28:11,294 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@66953aa7 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 02.02 09:28:11, skipping insertion in model container [2018-02-02 09:28:11,294 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 02.02 09:28:11" (3/3) ... [2018-02-02 09:28:11,295 INFO L107 eAbstractionObserver]: Analyzing ICFG memleaks_test15_true-valid-memsafety_true-termination.i [2018-02-02 09:28:11,300 INFO L128 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-02-02 09:28:11,304 INFO L140 ceAbstractionStarter]: Appying trace abstraction to program that has 45 error locations. [2018-02-02 09:28:11,325 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-02-02 09:28:11,325 INFO L323 AbstractCegarLoop]: Hoare is false [2018-02-02 09:28:11,325 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-02-02 09:28:11,325 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-02-02 09:28:11,326 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-02-02 09:28:11,326 INFO L327 AbstractCegarLoop]: Difference is false [2018-02-02 09:28:11,326 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-02-02 09:28:11,326 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-02-02 09:28:11,326 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-02-02 09:28:11,336 INFO L276 IsEmpty]: Start isEmpty. Operand 173 states. [2018-02-02 09:28:11,342 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2018-02-02 09:28:11,342 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:28:11,342 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:28:11,343 INFO L371 AbstractCegarLoop]: === Iteration 1 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-02 09:28:11,345 INFO L82 PathProgramCache]: Analyzing trace with hash -26265707, now seen corresponding path program 1 times [2018-02-02 09:28:11,346 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 09:28:11,346 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 09:28:11,380 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 09:28:11,381 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-02 09:28:11,381 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 09:28:11,412 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:28:11,417 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:28:11,464 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 09:28:11,466 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-02 09:28:11,466 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-02-02 09:28:11,526 INFO L409 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-02-02 09:28:11,538 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-02-02 09:28:11,538 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-02-02 09:28:11,540 INFO L87 Difference]: Start difference. First operand 173 states. Second operand 3 states. [2018-02-02 09:28:11,780 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:28:11,781 INFO L93 Difference]: Finished difference Result 230 states and 259 transitions. [2018-02-02 09:28:11,781 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-02-02 09:28:11,782 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 16 [2018-02-02 09:28:11,782 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:28:11,792 INFO L225 Difference]: With dead ends: 230 [2018-02-02 09:28:11,792 INFO L226 Difference]: Without dead ends: 224 [2018-02-02 09:28:11,794 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-02-02 09:28:11,805 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 224 states. [2018-02-02 09:28:11,823 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 224 to 174. [2018-02-02 09:28:11,824 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 174 states. [2018-02-02 09:28:11,826 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 174 states to 174 states and 190 transitions. [2018-02-02 09:28:11,828 INFO L78 Accepts]: Start accepts. Automaton has 174 states and 190 transitions. Word has length 16 [2018-02-02 09:28:11,828 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:28:11,828 INFO L432 AbstractCegarLoop]: Abstraction has 174 states and 190 transitions. [2018-02-02 09:28:11,828 INFO L433 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-02-02 09:28:11,829 INFO L276 IsEmpty]: Start isEmpty. Operand 174 states and 190 transitions. [2018-02-02 09:28:11,830 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2018-02-02 09:28:11,830 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:28:11,830 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:28:11,830 INFO L371 AbstractCegarLoop]: === Iteration 2 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-02 09:28:11,831 INFO L82 PathProgramCache]: Analyzing trace with hash -325108585, now seen corresponding path program 1 times [2018-02-02 09:28:11,831 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 09:28:11,831 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 09:28:11,832 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 09:28:11,833 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-02 09:28:11,833 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 09:28:11,847 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:28:11,848 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:28:11,888 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 09:28:11,888 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-02 09:28:11,889 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-02-02 09:28:11,890 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-02-02 09:28:11,890 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-02-02 09:28:11,890 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-02-02 09:28:11,891 INFO L87 Difference]: Start difference. First operand 174 states and 190 transitions. Second operand 6 states. [2018-02-02 09:28:11,942 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:28:11,942 INFO L93 Difference]: Finished difference Result 215 states and 240 transitions. [2018-02-02 09:28:11,942 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-02-02 09:28:11,942 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 18 [2018-02-02 09:28:11,943 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:28:11,944 INFO L225 Difference]: With dead ends: 215 [2018-02-02 09:28:11,944 INFO L226 Difference]: Without dead ends: 215 [2018-02-02 09:28:11,945 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-02-02 09:28:11,946 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 215 states. [2018-02-02 09:28:11,955 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 215 to 170. [2018-02-02 09:28:11,955 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 170 states. [2018-02-02 09:28:11,957 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 170 states to 170 states and 183 transitions. [2018-02-02 09:28:11,957 INFO L78 Accepts]: Start accepts. Automaton has 170 states and 183 transitions. Word has length 18 [2018-02-02 09:28:11,958 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:28:11,958 INFO L432 AbstractCegarLoop]: Abstraction has 170 states and 183 transitions. [2018-02-02 09:28:11,958 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-02-02 09:28:11,958 INFO L276 IsEmpty]: Start isEmpty. Operand 170 states and 183 transitions. [2018-02-02 09:28:11,959 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-02-02 09:28:11,959 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:28:11,959 INFO L351 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:28:11,959 INFO L371 AbstractCegarLoop]: === Iteration 3 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-02 09:28:11,959 INFO L82 PathProgramCache]: Analyzing trace with hash 743711378, now seen corresponding path program 1 times [2018-02-02 09:28:11,959 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 09:28:11,960 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 09:28:11,961 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 09:28:11,961 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-02 09:28:11,961 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 09:28:11,973 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:28:11,974 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:28:12,012 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-02-02 09:28:12,013 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-02 09:28:12,013 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-02 09:28:12,019 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-02 09:28:12,046 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:28:12,052 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-02 09:28:12,087 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-02-02 09:28:12,116 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-02 09:28:12,116 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4] total 8 [2018-02-02 09:28:12,117 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-02-02 09:28:12,117 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-02-02 09:28:12,117 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=40, Unknown=0, NotChecked=0, Total=56 [2018-02-02 09:28:12,117 INFO L87 Difference]: Start difference. First operand 170 states and 183 transitions. Second operand 8 states. [2018-02-02 09:28:12,135 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:28:12,135 INFO L93 Difference]: Finished difference Result 174 states and 188 transitions. [2018-02-02 09:28:12,136 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-02-02 09:28:12,136 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 21 [2018-02-02 09:28:12,136 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:28:12,136 INFO L225 Difference]: With dead ends: 174 [2018-02-02 09:28:12,136 INFO L226 Difference]: Without dead ends: 172 [2018-02-02 09:28:12,137 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 25 GetRequests, 19 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=16, Invalid=40, Unknown=0, NotChecked=0, Total=56 [2018-02-02 09:28:12,137 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 172 states. [2018-02-02 09:28:12,141 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 172 to 172. [2018-02-02 09:28:12,141 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 172 states. [2018-02-02 09:28:12,142 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 172 states to 172 states and 186 transitions. [2018-02-02 09:28:12,142 INFO L78 Accepts]: Start accepts. Automaton has 172 states and 186 transitions. Word has length 21 [2018-02-02 09:28:12,142 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:28:12,142 INFO L432 AbstractCegarLoop]: Abstraction has 172 states and 186 transitions. [2018-02-02 09:28:12,142 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-02-02 09:28:12,142 INFO L276 IsEmpty]: Start isEmpty. Operand 172 states and 186 transitions. [2018-02-02 09:28:12,143 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2018-02-02 09:28:12,143 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:28:12,143 INFO L351 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:28:12,143 INFO L371 AbstractCegarLoop]: === Iteration 4 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-02 09:28:12,143 INFO L82 PathProgramCache]: Analyzing trace with hash 667479760, now seen corresponding path program 1 times [2018-02-02 09:28:12,143 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 09:28:12,143 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 09:28:12,144 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 09:28:12,144 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-02 09:28:12,144 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 09:28:12,152 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:28:12,152 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:28:12,206 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-02-02 09:28:12,206 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-02 09:28:12,206 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-02 09:28:12,212 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-02 09:28:12,237 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:28:12,239 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-02 09:28:12,255 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-02-02 09:28:12,287 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-02 09:28:12,287 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 5 [2018-02-02 09:28:12,288 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-02-02 09:28:12,288 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-02-02 09:28:12,288 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-02-02 09:28:12,288 INFO L87 Difference]: Start difference. First operand 172 states and 186 transitions. Second operand 6 states. [2018-02-02 09:28:12,321 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:28:12,322 INFO L93 Difference]: Finished difference Result 171 states and 185 transitions. [2018-02-02 09:28:12,324 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-02-02 09:28:12,324 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 23 [2018-02-02 09:28:12,325 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:28:12,326 INFO L225 Difference]: With dead ends: 171 [2018-02-02 09:28:12,326 INFO L226 Difference]: Without dead ends: 171 [2018-02-02 09:28:12,326 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 21 SyntacticMatches, 3 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-02-02 09:28:12,327 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 171 states. [2018-02-02 09:28:12,335 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 171 to 171. [2018-02-02 09:28:12,335 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 171 states. [2018-02-02 09:28:12,336 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 171 states to 171 states and 185 transitions. [2018-02-02 09:28:12,337 INFO L78 Accepts]: Start accepts. Automaton has 171 states and 185 transitions. Word has length 23 [2018-02-02 09:28:12,337 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:28:12,337 INFO L432 AbstractCegarLoop]: Abstraction has 171 states and 185 transitions. [2018-02-02 09:28:12,337 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-02-02 09:28:12,337 INFO L276 IsEmpty]: Start isEmpty. Operand 171 states and 185 transitions. [2018-02-02 09:28:12,338 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2018-02-02 09:28:12,338 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:28:12,338 INFO L351 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:28:12,338 INFO L371 AbstractCegarLoop]: === Iteration 5 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-02 09:28:12,338 INFO L82 PathProgramCache]: Analyzing trace with hash 667479761, now seen corresponding path program 1 times [2018-02-02 09:28:12,339 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 09:28:12,339 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 09:28:12,340 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 09:28:12,340 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-02 09:28:12,340 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 09:28:12,352 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:28:12,353 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:28:12,418 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 09:28:12,419 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-02 09:28:12,419 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-02 09:28:12,427 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-02 09:28:12,447 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:28:12,450 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-02 09:28:12,471 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-02-02 09:28:12,472 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-02 09:28:12,476 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-02 09:28:12,476 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-02-02 09:28:12,485 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 09:28:12,507 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-02 09:28:12,507 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 6 [2018-02-02 09:28:12,507 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-02-02 09:28:12,508 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-02-02 09:28:12,508 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-02-02 09:28:12,508 INFO L87 Difference]: Start difference. First operand 171 states and 185 transitions. Second operand 7 states. [2018-02-02 09:28:12,887 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:28:12,888 INFO L93 Difference]: Finished difference Result 216 states and 238 transitions. [2018-02-02 09:28:12,888 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-02-02 09:28:12,888 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 23 [2018-02-02 09:28:12,888 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:28:12,889 INFO L225 Difference]: With dead ends: 216 [2018-02-02 09:28:12,889 INFO L226 Difference]: Without dead ends: 216 [2018-02-02 09:28:12,889 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 30 GetRequests, 23 SyntacticMatches, 1 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-02-02 09:28:12,889 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 216 states. [2018-02-02 09:28:12,904 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 216 to 184. [2018-02-02 09:28:12,904 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 184 states. [2018-02-02 09:28:12,905 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 184 states to 184 states and 211 transitions. [2018-02-02 09:28:12,905 INFO L78 Accepts]: Start accepts. Automaton has 184 states and 211 transitions. Word has length 23 [2018-02-02 09:28:12,905 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:28:12,905 INFO L432 AbstractCegarLoop]: Abstraction has 184 states and 211 transitions. [2018-02-02 09:28:12,905 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-02-02 09:28:12,905 INFO L276 IsEmpty]: Start isEmpty. Operand 184 states and 211 transitions. [2018-02-02 09:28:12,906 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2018-02-02 09:28:12,906 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:28:12,906 INFO L351 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:28:12,906 INFO L371 AbstractCegarLoop]: === Iteration 6 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-02 09:28:12,906 INFO L82 PathProgramCache]: Analyzing trace with hash -314305773, now seen corresponding path program 1 times [2018-02-02 09:28:12,906 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 09:28:12,906 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 09:28:12,907 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 09:28:12,907 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-02 09:28:12,907 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 09:28:12,913 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:28:12,914 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:28:12,941 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-02-02 09:28:12,941 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-02 09:28:12,941 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-02-02 09:28:12,942 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-02-02 09:28:12,942 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-02-02 09:28:12,942 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-02-02 09:28:12,942 INFO L87 Difference]: Start difference. First operand 184 states and 211 transitions. Second operand 6 states. [2018-02-02 09:28:12,995 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:28:12,996 INFO L93 Difference]: Finished difference Result 220 states and 251 transitions. [2018-02-02 09:28:12,996 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-02-02 09:28:12,996 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 25 [2018-02-02 09:28:12,996 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:28:12,997 INFO L225 Difference]: With dead ends: 220 [2018-02-02 09:28:12,998 INFO L226 Difference]: Without dead ends: 220 [2018-02-02 09:28:12,998 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-02-02 09:28:12,998 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 220 states. [2018-02-02 09:28:13,002 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 220 to 184. [2018-02-02 09:28:13,003 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 184 states. [2018-02-02 09:28:13,004 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 184 states to 184 states and 210 transitions. [2018-02-02 09:28:13,004 INFO L78 Accepts]: Start accepts. Automaton has 184 states and 210 transitions. Word has length 25 [2018-02-02 09:28:13,004 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:28:13,004 INFO L432 AbstractCegarLoop]: Abstraction has 184 states and 210 transitions. [2018-02-02 09:28:13,004 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-02-02 09:28:13,004 INFO L276 IsEmpty]: Start isEmpty. Operand 184 states and 210 transitions. [2018-02-02 09:28:13,005 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2018-02-02 09:28:13,005 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:28:13,005 INFO L351 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:28:13,005 INFO L371 AbstractCegarLoop]: === Iteration 7 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-02 09:28:13,005 INFO L82 PathProgramCache]: Analyzing trace with hash -808960356, now seen corresponding path program 1 times [2018-02-02 09:28:13,005 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 09:28:13,005 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 09:28:13,006 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 09:28:13,006 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-02 09:28:13,006 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 09:28:13,029 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:28:13,031 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:28:13,152 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-02-02 09:28:13,152 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-02 09:28:13,152 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-02 09:28:13,157 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-02 09:28:13,178 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:28:13,180 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-02 09:28:13,280 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-02-02 09:28:13,297 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-02 09:28:13,297 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 8] total 12 [2018-02-02 09:28:13,297 INFO L409 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-02-02 09:28:13,298 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-02-02 09:28:13,298 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=122, Unknown=9, NotChecked=0, Total=156 [2018-02-02 09:28:13,298 INFO L87 Difference]: Start difference. First operand 184 states and 210 transitions. Second operand 13 states. [2018-02-02 09:28:14,216 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:28:14,216 INFO L93 Difference]: Finished difference Result 220 states and 242 transitions. [2018-02-02 09:28:14,216 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-02-02 09:28:14,217 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 26 [2018-02-02 09:28:14,217 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:28:14,218 INFO L225 Difference]: With dead ends: 220 [2018-02-02 09:28:14,218 INFO L226 Difference]: Without dead ends: 216 [2018-02-02 09:28:14,218 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 43 GetRequests, 24 SyntacticMatches, 3 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 18 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=50, Invalid=247, Unknown=9, NotChecked=0, Total=306 [2018-02-02 09:28:14,219 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 216 states. [2018-02-02 09:28:14,222 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 216 to 183. [2018-02-02 09:28:14,223 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 183 states. [2018-02-02 09:28:14,224 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 183 states to 183 states and 208 transitions. [2018-02-02 09:28:14,224 INFO L78 Accepts]: Start accepts. Automaton has 183 states and 208 transitions. Word has length 26 [2018-02-02 09:28:14,224 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:28:14,224 INFO L432 AbstractCegarLoop]: Abstraction has 183 states and 208 transitions. [2018-02-02 09:28:14,224 INFO L433 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-02-02 09:28:14,224 INFO L276 IsEmpty]: Start isEmpty. Operand 183 states and 208 transitions. [2018-02-02 09:28:14,225 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2018-02-02 09:28:14,225 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:28:14,225 INFO L351 BasicCegarLoop]: trace histogram [3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:28:14,226 INFO L371 AbstractCegarLoop]: === Iteration 8 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-02 09:28:14,227 INFO L82 PathProgramCache]: Analyzing trace with hash 437179314, now seen corresponding path program 1 times [2018-02-02 09:28:14,227 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 09:28:14,227 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 09:28:14,228 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 09:28:14,228 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-02 09:28:14,228 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 09:28:14,235 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:28:14,236 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:28:14,276 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-02-02 09:28:14,277 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-02 09:28:14,277 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-02 09:28:14,283 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-02 09:28:14,300 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:28:14,302 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-02 09:28:14,314 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 10 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-02-02 09:28:14,333 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-02-02 09:28:14,333 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [5] total 5 [2018-02-02 09:28:14,333 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-02-02 09:28:14,333 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-02-02 09:28:14,333 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-02-02 09:28:14,334 INFO L87 Difference]: Start difference. First operand 183 states and 208 transitions. Second operand 5 states. [2018-02-02 09:28:14,352 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:28:14,353 INFO L93 Difference]: Finished difference Result 173 states and 185 transitions. [2018-02-02 09:28:14,353 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-02-02 09:28:14,353 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 28 [2018-02-02 09:28:14,353 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:28:14,354 INFO L225 Difference]: With dead ends: 173 [2018-02-02 09:28:14,354 INFO L226 Difference]: Without dead ends: 171 [2018-02-02 09:28:14,354 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 32 GetRequests, 27 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-02-02 09:28:14,354 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 171 states. [2018-02-02 09:28:14,357 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 171 to 171. [2018-02-02 09:28:14,357 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 171 states. [2018-02-02 09:28:14,358 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 171 states to 171 states and 183 transitions. [2018-02-02 09:28:14,358 INFO L78 Accepts]: Start accepts. Automaton has 171 states and 183 transitions. Word has length 28 [2018-02-02 09:28:14,358 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:28:14,358 INFO L432 AbstractCegarLoop]: Abstraction has 171 states and 183 transitions. [2018-02-02 09:28:14,359 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-02-02 09:28:14,359 INFO L276 IsEmpty]: Start isEmpty. Operand 171 states and 183 transitions. [2018-02-02 09:28:14,359 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2018-02-02 09:28:14,359 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:28:14,359 INFO L351 BasicCegarLoop]: trace histogram [3, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:28:14,359 INFO L371 AbstractCegarLoop]: === Iteration 9 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-02 09:28:14,360 INFO L82 PathProgramCache]: Analyzing trace with hash 1753876656, now seen corresponding path program 2 times [2018-02-02 09:28:14,360 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 09:28:14,360 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 09:28:14,361 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 09:28:14,361 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-02 09:28:14,361 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 09:28:14,368 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:28:14,369 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:28:14,403 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 9 proven. 2 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-02-02 09:28:14,403 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-02 09:28:14,403 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-02 09:28:14,407 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-02-02 09:28:14,417 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 09:28:14,423 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 09:28:14,427 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-02 09:28:14,428 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-02 09:28:14,431 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-02-02 09:28:14,432 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-02 09:28:14,433 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-02 09:28:14,433 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-02-02 09:28:14,435 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 9 proven. 2 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-02-02 09:28:14,475 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-02 09:28:14,475 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 6 [2018-02-02 09:28:14,475 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-02-02 09:28:14,475 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-02-02 09:28:14,475 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-02-02 09:28:14,476 INFO L87 Difference]: Start difference. First operand 171 states and 183 transitions. Second operand 7 states. [2018-02-02 09:28:14,780 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:28:14,780 INFO L93 Difference]: Finished difference Result 189 states and 205 transitions. [2018-02-02 09:28:14,781 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-02-02 09:28:14,782 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 30 [2018-02-02 09:28:14,782 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:28:14,783 INFO L225 Difference]: With dead ends: 189 [2018-02-02 09:28:14,783 INFO L226 Difference]: Without dead ends: 189 [2018-02-02 09:28:14,783 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 37 GetRequests, 31 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-02-02 09:28:14,784 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 189 states. [2018-02-02 09:28:14,787 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 189 to 186. [2018-02-02 09:28:14,788 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 186 states. [2018-02-02 09:28:14,789 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 186 states to 186 states and 205 transitions. [2018-02-02 09:28:14,789 INFO L78 Accepts]: Start accepts. Automaton has 186 states and 205 transitions. Word has length 30 [2018-02-02 09:28:14,789 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:28:14,789 INFO L432 AbstractCegarLoop]: Abstraction has 186 states and 205 transitions. [2018-02-02 09:28:14,789 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-02-02 09:28:14,789 INFO L276 IsEmpty]: Start isEmpty. Operand 186 states and 205 transitions. [2018-02-02 09:28:14,790 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2018-02-02 09:28:14,790 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:28:14,790 INFO L351 BasicCegarLoop]: trace histogram [3, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:28:14,790 INFO L371 AbstractCegarLoop]: === Iteration 10 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-02 09:28:14,790 INFO L82 PathProgramCache]: Analyzing trace with hash 1753876657, now seen corresponding path program 1 times [2018-02-02 09:28:14,790 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 09:28:14,791 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 09:28:14,791 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 09:28:14,792 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-02 09:28:14,792 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 09:28:14,801 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:28:14,802 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:28:14,945 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 10 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-02-02 09:28:14,945 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-02 09:28:14,945 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-02 09:28:14,957 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-02 09:28:14,973 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:28:14,975 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-02 09:28:14,987 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-02-02 09:28:14,987 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-02 09:28:14,997 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-02-02 09:28:14,998 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-02 09:28:15,010 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-02-02 09:28:15,010 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:38, output treesize:36 [2018-02-02 09:28:15,101 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 10 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-02-02 09:28:15,119 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-02 09:28:15,119 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 12 [2018-02-02 09:28:15,119 INFO L409 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-02-02 09:28:15,119 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-02-02 09:28:15,119 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=28, Invalid=128, Unknown=0, NotChecked=0, Total=156 [2018-02-02 09:28:15,120 INFO L87 Difference]: Start difference. First operand 186 states and 205 transitions. Second operand 13 states. [2018-02-02 09:28:15,582 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:28:15,582 INFO L93 Difference]: Finished difference Result 216 states and 240 transitions. [2018-02-02 09:28:15,582 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-02-02 09:28:15,582 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 30 [2018-02-02 09:28:15,583 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:28:15,583 INFO L225 Difference]: With dead ends: 216 [2018-02-02 09:28:15,583 INFO L226 Difference]: Without dead ends: 216 [2018-02-02 09:28:15,584 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 42 GetRequests, 28 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 21 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=48, Invalid=192, Unknown=0, NotChecked=0, Total=240 [2018-02-02 09:28:15,584 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 216 states. [2018-02-02 09:28:15,590 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 216 to 204. [2018-02-02 09:28:15,590 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 204 states. [2018-02-02 09:28:15,591 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 204 states to 204 states and 236 transitions. [2018-02-02 09:28:15,591 INFO L78 Accepts]: Start accepts. Automaton has 204 states and 236 transitions. Word has length 30 [2018-02-02 09:28:15,592 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:28:15,592 INFO L432 AbstractCegarLoop]: Abstraction has 204 states and 236 transitions. [2018-02-02 09:28:15,592 INFO L433 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-02-02 09:28:15,592 INFO L276 IsEmpty]: Start isEmpty. Operand 204 states and 236 transitions. [2018-02-02 09:28:15,592 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-02-02 09:28:15,592 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:28:15,593 INFO L351 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:28:15,593 INFO L371 AbstractCegarLoop]: === Iteration 11 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-02 09:28:15,593 INFO L82 PathProgramCache]: Analyzing trace with hash 1756950194, now seen corresponding path program 1 times [2018-02-02 09:28:15,593 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 09:28:15,593 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 09:28:15,594 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 09:28:15,594 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-02 09:28:15,594 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 09:28:15,601 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:28:15,602 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:28:15,696 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 12 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-02-02 09:28:15,697 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-02 09:28:15,697 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-02 09:28:15,702 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-02 09:28:15,722 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:28:15,724 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-02 09:28:15,726 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-02-02 09:28:15,726 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-02 09:28:15,727 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-02 09:28:15,728 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-02-02 09:28:15,748 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:28:15,749 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:28:15,751 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21 [2018-02-02 09:28:15,751 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-02 09:28:15,756 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-02-02 09:28:15,756 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:17, output treesize:15 [2018-02-02 09:28:15,770 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 12 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-02-02 09:28:15,788 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-02 09:28:15,788 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8] total 10 [2018-02-02 09:28:15,789 INFO L409 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-02-02 09:28:15,789 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-02-02 09:28:15,789 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=86, Unknown=1, NotChecked=0, Total=110 [2018-02-02 09:28:15,789 INFO L87 Difference]: Start difference. First operand 204 states and 236 transitions. Second operand 11 states. [2018-02-02 09:28:16,273 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:28:16,273 INFO L93 Difference]: Finished difference Result 223 states and 255 transitions. [2018-02-02 09:28:16,274 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-02-02 09:28:16,274 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 32 [2018-02-02 09:28:16,274 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:28:16,275 INFO L225 Difference]: With dead ends: 223 [2018-02-02 09:28:16,275 INFO L226 Difference]: Without dead ends: 223 [2018-02-02 09:28:16,276 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 42 GetRequests, 29 SyntacticMatches, 2 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=37, Invalid=118, Unknown=1, NotChecked=0, Total=156 [2018-02-02 09:28:16,277 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 223 states. [2018-02-02 09:28:16,281 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 223 to 210. [2018-02-02 09:28:16,281 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 210 states. [2018-02-02 09:28:16,282 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 210 states to 210 states and 244 transitions. [2018-02-02 09:28:16,282 INFO L78 Accepts]: Start accepts. Automaton has 210 states and 244 transitions. Word has length 32 [2018-02-02 09:28:16,282 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:28:16,282 INFO L432 AbstractCegarLoop]: Abstraction has 210 states and 244 transitions. [2018-02-02 09:28:16,283 INFO L433 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-02-02 09:28:16,283 INFO L276 IsEmpty]: Start isEmpty. Operand 210 states and 244 transitions. [2018-02-02 09:28:16,284 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-02-02 09:28:16,284 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:28:16,284 INFO L351 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:28:16,284 INFO L371 AbstractCegarLoop]: === Iteration 12 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-02 09:28:16,284 INFO L82 PathProgramCache]: Analyzing trace with hash 1756950195, now seen corresponding path program 1 times [2018-02-02 09:28:16,284 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 09:28:16,284 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 09:28:16,285 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 09:28:16,285 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-02 09:28:16,285 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 09:28:16,294 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:28:16,295 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:28:16,488 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 12 proven. 5 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-02-02 09:28:16,488 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-02 09:28:16,488 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-02 09:28:16,493 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-02 09:28:16,506 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:28:16,508 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-02 09:28:16,525 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 22 [2018-02-02 09:28:16,526 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-02 09:28:16,549 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 25 [2018-02-02 09:28:16,550 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-02 09:28:16,566 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 21 [2018-02-02 09:28:16,566 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-02-02 09:28:16,570 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 24 [2018-02-02 09:28:16,570 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-02-02 09:28:16,587 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-02-02 09:28:16,587 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:50, output treesize:46 [2018-02-02 09:28:16,715 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:28:16,716 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:28:16,716 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 28 [2018-02-02 09:28:16,716 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-02 09:28:16,732 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:28:16,733 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 37 [2018-02-02 09:28:16,733 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-02 09:28:16,753 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:28:16,753 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:28:16,754 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 26 [2018-02-02 09:28:16,754 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-02-02 09:28:16,769 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 25 [2018-02-02 09:28:16,769 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-02-02 09:28:16,785 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 4 dim-1 vars, End of recursive call: 4 dim-0 vars, and 2 xjuncts. [2018-02-02 09:28:16,785 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 8 variables, input treesize:67, output treesize:49 [2018-02-02 09:28:16,817 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 12 proven. 5 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-02-02 09:28:16,834 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-02 09:28:16,834 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 9] total 17 [2018-02-02 09:28:16,835 INFO L409 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-02-02 09:28:16,835 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-02-02 09:28:16,835 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=44, Invalid=261, Unknown=1, NotChecked=0, Total=306 [2018-02-02 09:28:16,835 INFO L87 Difference]: Start difference. First operand 210 states and 244 transitions. Second operand 18 states. [2018-02-02 09:28:28,872 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:28:28,873 INFO L93 Difference]: Finished difference Result 224 states and 251 transitions. [2018-02-02 09:28:28,873 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-02-02 09:28:28,873 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 32 [2018-02-02 09:28:28,873 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:28:28,874 INFO L225 Difference]: With dead ends: 224 [2018-02-02 09:28:28,874 INFO L226 Difference]: Without dead ends: 224 [2018-02-02 09:28:28,874 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 47 GetRequests, 27 SyntacticMatches, 0 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 59 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=77, Invalid=384, Unknown=1, NotChecked=0, Total=462 [2018-02-02 09:28:28,875 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 224 states. [2018-02-02 09:28:28,878 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 224 to 179. [2018-02-02 09:28:28,878 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 179 states. [2018-02-02 09:28:28,879 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 179 states to 179 states and 195 transitions. [2018-02-02 09:28:28,879 INFO L78 Accepts]: Start accepts. Automaton has 179 states and 195 transitions. Word has length 32 [2018-02-02 09:28:28,879 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:28:28,879 INFO L432 AbstractCegarLoop]: Abstraction has 179 states and 195 transitions. [2018-02-02 09:28:28,880 INFO L433 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-02-02 09:28:28,880 INFO L276 IsEmpty]: Start isEmpty. Operand 179 states and 195 transitions. [2018-02-02 09:28:28,880 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-02-02 09:28:28,880 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:28:28,880 INFO L351 BasicCegarLoop]: trace histogram [3, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:28:28,880 INFO L371 AbstractCegarLoop]: === Iteration 13 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-02 09:28:28,881 INFO L82 PathProgramCache]: Analyzing trace with hash 860002885, now seen corresponding path program 1 times [2018-02-02 09:28:28,881 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 09:28:28,881 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 09:28:28,882 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 09:28:28,882 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-02 09:28:28,882 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 09:28:28,890 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:28:28,891 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:28:29,010 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 5 proven. 7 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-02-02 09:28:29,010 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-02 09:28:29,011 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-02 09:28:29,015 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-02 09:28:29,029 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:28:29,031 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-02 09:28:29,039 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-02-02 09:28:29,040 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-02 09:28:29,041 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-02 09:28:29,041 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-02-02 09:28:29,070 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:28:29,070 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:28:29,071 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21 [2018-02-02 09:28:29,071 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-02 09:28:29,075 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-02 09:28:29,075 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:17, output treesize:15 [2018-02-02 09:28:29,121 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:28:29,121 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 15 [2018-02-02 09:28:29,122 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-02 09:28:29,126 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-02-02 09:28:29,126 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:25, output treesize:15 [2018-02-02 09:28:29,142 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 8 proven. 4 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-02-02 09:28:29,159 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-02 09:28:29,159 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 12] total 16 [2018-02-02 09:28:29,160 INFO L409 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-02-02 09:28:29,160 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-02-02 09:28:29,160 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=40, Invalid=232, Unknown=0, NotChecked=0, Total=272 [2018-02-02 09:28:29,160 INFO L87 Difference]: Start difference. First operand 179 states and 195 transitions. Second operand 17 states. [2018-02-02 09:28:29,758 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:28:29,758 INFO L93 Difference]: Finished difference Result 193 states and 213 transitions. [2018-02-02 09:28:29,759 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-02-02 09:28:29,759 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 35 [2018-02-02 09:28:29,759 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:28:29,759 INFO L225 Difference]: With dead ends: 193 [2018-02-02 09:28:29,759 INFO L226 Difference]: Without dead ends: 193 [2018-02-02 09:28:29,760 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 53 GetRequests, 29 SyntacticMatches, 4 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 44 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=70, Invalid=392, Unknown=0, NotChecked=0, Total=462 [2018-02-02 09:28:29,760 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 193 states. [2018-02-02 09:28:29,762 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 193 to 179. [2018-02-02 09:28:29,763 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 179 states. [2018-02-02 09:28:29,763 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 179 states to 179 states and 195 transitions. [2018-02-02 09:28:29,763 INFO L78 Accepts]: Start accepts. Automaton has 179 states and 195 transitions. Word has length 35 [2018-02-02 09:28:29,763 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:28:29,763 INFO L432 AbstractCegarLoop]: Abstraction has 179 states and 195 transitions. [2018-02-02 09:28:29,764 INFO L433 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-02-02 09:28:29,764 INFO L276 IsEmpty]: Start isEmpty. Operand 179 states and 195 transitions. [2018-02-02 09:28:29,764 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-02-02 09:28:29,764 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:28:29,764 INFO L351 BasicCegarLoop]: trace histogram [3, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:28:29,764 INFO L371 AbstractCegarLoop]: === Iteration 14 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-02 09:28:29,764 INFO L82 PathProgramCache]: Analyzing trace with hash 890317459, now seen corresponding path program 1 times [2018-02-02 09:28:29,764 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 09:28:29,764 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 09:28:29,765 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 09:28:29,765 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-02 09:28:29,765 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 09:28:29,769 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:28:29,770 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:28:29,806 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-02-02 09:28:29,807 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-02 09:28:29,807 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-02-02 09:28:29,807 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-02-02 09:28:29,807 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-02-02 09:28:29,807 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-02-02 09:28:29,807 INFO L87 Difference]: Start difference. First operand 179 states and 195 transitions. Second operand 6 states. [2018-02-02 09:28:29,850 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:28:29,850 INFO L93 Difference]: Finished difference Result 187 states and 203 transitions. [2018-02-02 09:28:29,850 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-02-02 09:28:29,850 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 36 [2018-02-02 09:28:29,850 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:28:29,851 INFO L225 Difference]: With dead ends: 187 [2018-02-02 09:28:29,851 INFO L226 Difference]: Without dead ends: 187 [2018-02-02 09:28:29,851 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2018-02-02 09:28:29,851 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 187 states. [2018-02-02 09:28:29,854 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 187 to 183. [2018-02-02 09:28:29,854 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 183 states. [2018-02-02 09:28:29,854 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 183 states to 183 states and 199 transitions. [2018-02-02 09:28:29,854 INFO L78 Accepts]: Start accepts. Automaton has 183 states and 199 transitions. Word has length 36 [2018-02-02 09:28:29,854 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:28:29,854 INFO L432 AbstractCegarLoop]: Abstraction has 183 states and 199 transitions. [2018-02-02 09:28:29,854 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-02-02 09:28:29,855 INFO L276 IsEmpty]: Start isEmpty. Operand 183 states and 199 transitions. [2018-02-02 09:28:29,855 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-02-02 09:28:29,855 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:28:29,855 INFO L351 BasicCegarLoop]: trace histogram [3, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:28:29,855 INFO L371 AbstractCegarLoop]: === Iteration 15 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-02 09:28:29,855 INFO L82 PathProgramCache]: Analyzing trace with hash 866086568, now seen corresponding path program 1 times [2018-02-02 09:28:29,855 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 09:28:29,856 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 09:28:29,856 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 09:28:29,857 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-02 09:28:29,857 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 09:28:29,864 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:28:29,864 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:28:30,155 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-02-02 09:28:30,155 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-02 09:28:30,155 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-02 09:28:30,162 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-02 09:28:30,178 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:28:30,180 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-02 09:28:30,432 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-02-02 09:28:30,462 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-02 09:28:30,462 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 12] total 19 [2018-02-02 09:28:30,462 INFO L409 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-02-02 09:28:30,462 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-02-02 09:28:30,462 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=43, Invalid=327, Unknown=10, NotChecked=0, Total=380 [2018-02-02 09:28:30,463 INFO L87 Difference]: Start difference. First operand 183 states and 199 transitions. Second operand 20 states. [2018-02-02 09:28:31,559 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:28:31,559 INFO L93 Difference]: Finished difference Result 195 states and 211 transitions. [2018-02-02 09:28:31,560 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-02-02 09:28:31,560 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 38 [2018-02-02 09:28:31,560 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:28:31,560 INFO L225 Difference]: With dead ends: 195 [2018-02-02 09:28:31,560 INFO L226 Difference]: Without dead ends: 184 [2018-02-02 09:28:31,561 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 65 GetRequests, 33 SyntacticMatches, 6 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 69 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=89, Invalid=657, Unknown=10, NotChecked=0, Total=756 [2018-02-02 09:28:31,561 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 184 states. [2018-02-02 09:28:31,563 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 184 to 177. [2018-02-02 09:28:31,563 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 177 states. [2018-02-02 09:28:31,564 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 177 states to 177 states and 192 transitions. [2018-02-02 09:28:31,564 INFO L78 Accepts]: Start accepts. Automaton has 177 states and 192 transitions. Word has length 38 [2018-02-02 09:28:31,564 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:28:31,564 INFO L432 AbstractCegarLoop]: Abstraction has 177 states and 192 transitions. [2018-02-02 09:28:31,564 INFO L433 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-02-02 09:28:31,564 INFO L276 IsEmpty]: Start isEmpty. Operand 177 states and 192 transitions. [2018-02-02 09:28:31,564 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-02-02 09:28:31,564 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:28:31,564 INFO L351 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:28:31,564 INFO L371 AbstractCegarLoop]: === Iteration 16 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-02 09:28:31,564 INFO L82 PathProgramCache]: Analyzing trace with hash 499648277, now seen corresponding path program 1 times [2018-02-02 09:28:31,564 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 09:28:31,565 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 09:28:31,565 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 09:28:31,565 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-02 09:28:31,565 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 09:28:31,570 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:28:31,570 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:28:31,593 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-02-02 09:28:31,593 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-02 09:28:31,594 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-02-02 09:28:31,594 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-02-02 09:28:31,594 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-02-02 09:28:31,594 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-02-02 09:28:31,594 INFO L87 Difference]: Start difference. First operand 177 states and 192 transitions. Second operand 7 states. [2018-02-02 09:28:31,695 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:28:31,695 INFO L93 Difference]: Finished difference Result 176 states and 191 transitions. [2018-02-02 09:28:31,695 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-02-02 09:28:31,695 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 38 [2018-02-02 09:28:31,695 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:28:31,696 INFO L225 Difference]: With dead ends: 176 [2018-02-02 09:28:31,696 INFO L226 Difference]: Without dead ends: 176 [2018-02-02 09:28:31,696 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=23, Invalid=67, Unknown=0, NotChecked=0, Total=90 [2018-02-02 09:28:31,696 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 176 states. [2018-02-02 09:28:31,698 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 176 to 176. [2018-02-02 09:28:31,699 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 176 states. [2018-02-02 09:28:31,699 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 176 states to 176 states and 191 transitions. [2018-02-02 09:28:31,699 INFO L78 Accepts]: Start accepts. Automaton has 176 states and 191 transitions. Word has length 38 [2018-02-02 09:28:31,700 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:28:31,700 INFO L432 AbstractCegarLoop]: Abstraction has 176 states and 191 transitions. [2018-02-02 09:28:31,700 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-02-02 09:28:31,700 INFO L276 IsEmpty]: Start isEmpty. Operand 176 states and 191 transitions. [2018-02-02 09:28:31,700 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-02-02 09:28:31,700 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:28:31,700 INFO L351 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:28:31,700 INFO L371 AbstractCegarLoop]: === Iteration 17 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-02 09:28:31,701 INFO L82 PathProgramCache]: Analyzing trace with hash 499648278, now seen corresponding path program 1 times [2018-02-02 09:28:31,701 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 09:28:31,701 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 09:28:31,701 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 09:28:31,702 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-02 09:28:31,702 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 09:28:31,710 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:28:31,711 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:28:31,809 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 10 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-02-02 09:28:31,809 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-02 09:28:31,809 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-02-02 09:28:31,810 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-02-02 09:28:31,810 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-02-02 09:28:31,810 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2018-02-02 09:28:31,810 INFO L87 Difference]: Start difference. First operand 176 states and 191 transitions. Second operand 8 states. [2018-02-02 09:28:31,964 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:28:31,964 INFO L93 Difference]: Finished difference Result 177 states and 192 transitions. [2018-02-02 09:28:31,964 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-02-02 09:28:31,964 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 38 [2018-02-02 09:28:31,964 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:28:31,965 INFO L225 Difference]: With dead ends: 177 [2018-02-02 09:28:31,965 INFO L226 Difference]: Without dead ends: 177 [2018-02-02 09:28:31,965 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=31, Invalid=101, Unknown=0, NotChecked=0, Total=132 [2018-02-02 09:28:31,965 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 177 states. [2018-02-02 09:28:31,968 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 177 to 175. [2018-02-02 09:28:31,968 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 175 states. [2018-02-02 09:28:31,969 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 175 states to 175 states and 190 transitions. [2018-02-02 09:28:31,969 INFO L78 Accepts]: Start accepts. Automaton has 175 states and 190 transitions. Word has length 38 [2018-02-02 09:28:31,969 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:28:31,969 INFO L432 AbstractCegarLoop]: Abstraction has 175 states and 190 transitions. [2018-02-02 09:28:31,969 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-02-02 09:28:31,970 INFO L276 IsEmpty]: Start isEmpty. Operand 175 states and 190 transitions. [2018-02-02 09:28:31,970 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2018-02-02 09:28:31,970 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:28:31,970 INFO L351 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:28:31,970 INFO L371 AbstractCegarLoop]: === Iteration 18 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-02-02 09:28:31,970 INFO L82 PathProgramCache]: Analyzing trace with hash -874341065, now seen corresponding path program 1 times [2018-02-02 09:28:31,971 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 09:28:31,971 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 09:28:31,971 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 09:28:31,972 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-02 09:28:31,972 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 09:28:31,984 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:28:31,984 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:28:32,319 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 2 proven. 13 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-02-02 09:28:32,319 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-02 09:28:32,320 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-02 09:28:32,326 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-02 09:28:32,353 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:28:32,356 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-02 09:28:32,372 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 25 [2018-02-02 09:28:32,373 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-02 09:28:32,391 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 22 [2018-02-02 09:28:32,391 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-02 09:28:32,408 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 21 [2018-02-02 09:28:32,409 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-02-02 09:28:32,410 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 24 [2018-02-02 09:28:32,411 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-02-02 09:28:32,426 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-02-02 09:28:32,426 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:50, output treesize:46 [2018-02-02 09:28:32,623 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:28:32,623 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:28:32,624 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 44 [2018-02-02 09:28:32,624 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-02 09:28:32,648 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:28:32,649 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 41 [2018-02-02 09:28:32,650 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-02 09:28:32,672 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:28:32,673 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 47 [2018-02-02 09:28:32,673 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-02-02 09:28:32,695 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:28:32,696 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:28:32,696 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 41 [2018-02-02 09:28:32,697 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-02-02 09:28:32,716 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 4 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-02-02 09:28:32,716 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 6 variables, input treesize:79, output treesize:69 [2018-02-02 09:28:32,921 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:28:32,922 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:28:32,922 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:28:32,923 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 53 treesize of output 46 [2018-02-02 09:28:32,924 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-02 09:28:32,987 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 46 treesize of output 45 [2018-02-02 09:28:32,987 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-02 09:28:33,044 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:28:33,045 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:28:33,045 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:28:33,046 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:28:33,046 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 48 [2018-02-02 09:28:33,047 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-02-02 09:28:33,109 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:28:33,110 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:28:33,111 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:28:33,111 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 48 [2018-02-02 09:28:33,112 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-02-02 09:28:33,170 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:28:33,171 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:28:33,172 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 5 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 67 [2018-02-02 09:28:33,172 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-02-02 09:28:33,236 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:28:33,237 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:28:33,238 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:28:33,239 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 5 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 63 [2018-02-02 09:28:33,239 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-02-02 09:28:33,305 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:28:33,306 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:28:33,306 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:28:33,307 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:28:33,307 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 53 treesize of output 50 [2018-02-02 09:28:33,308 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 1 xjuncts. [2018-02-02 09:28:33,360 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:28:33,361 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:28:33,362 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:28:33,363 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 5 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 46 treesize of output 67 [2018-02-02 09:28:33,363 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-02-02 09:28:33,416 INFO L267 ElimStorePlain]: Start of recursive call 1: 8 dim-0 vars, 8 dim-1 vars, End of recursive call: 8 dim-0 vars, and 4 xjuncts. [2018-02-02 09:28:33,417 INFO L202 ElimStorePlain]: Needed 9 recursive calls to eliminate 16 variables, input treesize:213, output treesize:165 [2018-02-02 09:28:33,506 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 52 treesize of output 49 [2018-02-02 09:28:33,507 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-02-02 09:28:33,565 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-02 09:28:33,574 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-02 09:28:33,635 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 52 treesize of output 49 [2018-02-02 09:28:33,637 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-02-02 09:28:33,637 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-02-02 09:28:33,645 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-02 09:28:33,702 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 54 treesize of output 51 [2018-02-02 09:28:33,704 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-02-02 09:28:33,704 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-02-02 09:28:33,712 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-02 09:28:33,760 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 58 treesize of output 55 [2018-02-02 09:28:33,761 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-02-02 09:28:33,761 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-02-02 09:28:33,771 INFO L267 ElimStorePlain]: Start of recursive call 8: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-02 09:28:33,822 INFO L267 ElimStorePlain]: Start of recursive call 1: 12 dim-0 vars, 4 dim-2 vars, End of recursive call: 8 dim-0 vars, and 4 xjuncts. [2018-02-02 09:28:33,822 INFO L202 ElimStorePlain]: Needed 9 recursive calls to eliminate 16 variables, input treesize:217, output treesize:213 [2018-02-02 09:28:35,918 WARN L143 SmtUtils]: Spent 2053ms on a formula simplification that was a NOOP. DAG size: 80 [2018-02-02 09:28:35,931 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 63 treesize of output 57 [2018-02-02 09:28:35,933 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2018-02-02 09:28:35,933 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-02-02 09:28:35,943 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-02-02 09:28:35,985 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 43 [2018-02-02 09:28:35,987 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2018-02-02 09:28:35,987 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-02-02 09:28:35,994 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-02-02 09:28:36,036 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 53 treesize of output 49 [2018-02-02 09:28:36,038 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 14 [2018-02-02 09:28:36,038 INFO L267 ElimStorePlain]: Start of recursive call 7: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-02-02 09:28:36,045 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-02-02 09:28:36,087 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 47 [2018-02-02 09:28:36,089 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 12 [2018-02-02 09:28:36,089 INFO L267 ElimStorePlain]: Start of recursive call 9: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-02-02 09:28:36,096 INFO L267 ElimStorePlain]: Start of recursive call 8: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-02-02 09:28:36,133 INFO L267 ElimStorePlain]: Start of recursive call 1: 16 dim-0 vars, 4 dim-2 vars, End of recursive call: 16 dim-0 vars, and 4 xjuncts. [2018-02-02 09:28:36,134 INFO L202 ElimStorePlain]: Needed 9 recursive calls to eliminate 20 variables, input treesize:213, output treesize:165 [2018-02-02 09:28:57,061 WARN L146 SmtUtils]: Spent 18855ms on a formula simplification. DAG size of input: 91 DAG size of output 71 [2018-02-02 09:28:57,086 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 2 proven. 13 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-02-02 09:28:57,108 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-02 09:28:57,109 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 16] total 26 [2018-02-02 09:28:57,109 INFO L409 AbstractCegarLoop]: Interpolant automaton has 27 states [2018-02-02 09:28:57,109 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2018-02-02 09:28:57,109 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=87, Invalid=612, Unknown=3, NotChecked=0, Total=702 [2018-02-02 09:28:57,109 INFO L87 Difference]: Start difference. First operand 175 states and 190 transitions. Second operand 27 states. [2018-02-02 09:29:09,761 WARN L146 SmtUtils]: Spent 2116ms on a formula simplification. DAG size of input: 85 DAG size of output 59 [2018-02-02 09:29:10,051 WARN L146 SmtUtils]: Spent 242ms on a formula simplification. DAG size of input: 114 DAG size of output 80 [2018-02-02 09:29:14,153 WARN L146 SmtUtils]: Spent 4074ms on a formula simplification. DAG size of input: 90 DAG size of output 64 [2018-02-02 09:29:14,357 WARN L146 SmtUtils]: Spent 138ms on a formula simplification. DAG size of input: 85 DAG size of output 85 Received shutdown request... [2018-02-02 09:29:23,340 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-02-02 09:29:23,340 WARN L491 AbstractCegarLoop]: Verification canceled [2018-02-02 09:29:23,343 WARN L185 ceAbstractionStarter]: Timeout [2018-02-02 09:29:23,344 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 02.02 09:29:23 BoogieIcfgContainer [2018-02-02 09:29:23,344 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-02-02 09:29:23,344 INFO L168 Benchmark]: Toolchain (without parser) took 72667.57 ms. Allocated memory was 395.3 MB in the beginning and 740.3 MB in the end (delta: 345.0 MB). Free memory was 352.0 MB in the beginning and 569.7 MB in the end (delta: -217.7 MB). Peak memory consumption was 127.3 MB. Max. memory is 5.3 GB. [2018-02-02 09:29:23,345 INFO L168 Benchmark]: CDTParser took 0.15 ms. Allocated memory is still 395.3 MB. Free memory is still 358.6 MB. There was no memory consumed. Max. memory is 5.3 GB. [2018-02-02 09:29:23,345 INFO L168 Benchmark]: CACSL2BoogieTranslator took 176.71 ms. Allocated memory is still 395.3 MB. Free memory was 352.0 MB in the beginning and 337.3 MB in the end (delta: 14.7 MB). Peak memory consumption was 14.7 MB. Max. memory is 5.3 GB. [2018-02-02 09:29:23,345 INFO L168 Benchmark]: Boogie Preprocessor took 32.53 ms. Allocated memory is still 395.3 MB. Free memory was 337.3 MB in the beginning and 334.7 MB in the end (delta: 2.6 MB). Peak memory consumption was 2.6 MB. Max. memory is 5.3 GB. [2018-02-02 09:29:23,346 INFO L168 Benchmark]: RCFGBuilder took 402.97 ms. Allocated memory is still 395.3 MB. Free memory was 334.7 MB in the beginning and 290.9 MB in the end (delta: 43.8 MB). Peak memory consumption was 43.8 MB. Max. memory is 5.3 GB. [2018-02-02 09:29:23,346 INFO L168 Benchmark]: TraceAbstraction took 72052.58 ms. Allocated memory was 395.3 MB in the beginning and 740.3 MB in the end (delta: 345.0 MB). Free memory was 290.9 MB in the beginning and 569.7 MB in the end (delta: -278.8 MB). Peak memory consumption was 66.2 MB. Max. memory is 5.3 GB. [2018-02-02 09:29:23,347 INFO L344 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.15 ms. Allocated memory is still 395.3 MB. Free memory is still 358.6 MB. There was no memory consumed. Max. memory is 5.3 GB. * CACSL2BoogieTranslator took 176.71 ms. Allocated memory is still 395.3 MB. Free memory was 352.0 MB in the beginning and 337.3 MB in the end (delta: 14.7 MB). Peak memory consumption was 14.7 MB. Max. memory is 5.3 GB. * Boogie Preprocessor took 32.53 ms. Allocated memory is still 395.3 MB. Free memory was 337.3 MB in the beginning and 334.7 MB in the end (delta: 2.6 MB). Peak memory consumption was 2.6 MB. Max. memory is 5.3 GB. * RCFGBuilder took 402.97 ms. Allocated memory is still 395.3 MB. Free memory was 334.7 MB in the beginning and 290.9 MB in the end (delta: 43.8 MB). Peak memory consumption was 43.8 MB. Max. memory is 5.3 GB. * TraceAbstraction took 72052.58 ms. Allocated memory was 395.3 MB in the beginning and 740.3 MB in the end (delta: 345.0 MB). Free memory was 290.9 MB in the beginning and 569.7 MB in the end (delta: -278.8 MB). Peak memory consumption was 66.2 MB. Max. memory is 5.3 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1463). Cancelled while BasicCegarLoop was constructing difference of abstraction (175states) and interpolant automaton (currently 16 states, 27 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 91. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1464). Cancelled while BasicCegarLoop was constructing difference of abstraction (175states) and interpolant automaton (currently 16 states, 27 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 91. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1479). Cancelled while BasicCegarLoop was constructing difference of abstraction (175states) and interpolant automaton (currently 16 states, 27 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 91. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1464). Cancelled while BasicCegarLoop was constructing difference of abstraction (175states) and interpolant automaton (currently 16 states, 27 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 91. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1464). Cancelled while BasicCegarLoop was constructing difference of abstraction (175states) and interpolant automaton (currently 16 states, 27 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 91. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1463). Cancelled while BasicCegarLoop was constructing difference of abstraction (175states) and interpolant automaton (currently 16 states, 27 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 91. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1479). Cancelled while BasicCegarLoop was constructing difference of abstraction (175states) and interpolant automaton (currently 16 states, 27 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 91. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1464). Cancelled while BasicCegarLoop was constructing difference of abstraction (175states) and interpolant automaton (currently 16 states, 27 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 91. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1198). Cancelled while BasicCegarLoop was constructing difference of abstraction (175states) and interpolant automaton (currently 16 states, 27 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 91. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1198). Cancelled while BasicCegarLoop was constructing difference of abstraction (175states) and interpolant automaton (currently 16 states, 27 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 91. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1193). Cancelled while BasicCegarLoop was constructing difference of abstraction (175states) and interpolant automaton (currently 16 states, 27 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 91. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1193). Cancelled while BasicCegarLoop was constructing difference of abstraction (175states) and interpolant automaton (currently 16 states, 27 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 91. - TimeoutResultAtElement [Line: 1533]: Timeout (TraceAbstraction) Unable to prove that all allocated memory was freed (line 1533). Cancelled while BasicCegarLoop was constructing difference of abstraction (175states) and interpolant automaton (currently 16 states, 27 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 91. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1516). Cancelled while BasicCegarLoop was constructing difference of abstraction (175states) and interpolant automaton (currently 16 states, 27 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 91. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1526). Cancelled while BasicCegarLoop was constructing difference of abstraction (175states) and interpolant automaton (currently 16 states, 27 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 91. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1513). Cancelled while BasicCegarLoop was constructing difference of abstraction (175states) and interpolant automaton (currently 16 states, 27 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 91. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1513). Cancelled while BasicCegarLoop was constructing difference of abstraction (175states) and interpolant automaton (currently 16 states, 27 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 91. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1524). Cancelled while BasicCegarLoop was constructing difference of abstraction (175states) and interpolant automaton (currently 16 states, 27 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 91. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1516). Cancelled while BasicCegarLoop was constructing difference of abstraction (175states) and interpolant automaton (currently 16 states, 27 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 91. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1517). Cancelled while BasicCegarLoop was constructing difference of abstraction (175states) and interpolant automaton (currently 16 states, 27 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 91. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1524). Cancelled while BasicCegarLoop was constructing difference of abstraction (175states) and interpolant automaton (currently 16 states, 27 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 91. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1514). Cancelled while BasicCegarLoop was constructing difference of abstraction (175states) and interpolant automaton (currently 16 states, 27 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 91. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1528). Cancelled while BasicCegarLoop was constructing difference of abstraction (175states) and interpolant automaton (currently 16 states, 27 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 91. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1516). Cancelled while BasicCegarLoop was constructing difference of abstraction (175states) and interpolant automaton (currently 16 states, 27 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 91. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1524). Cancelled while BasicCegarLoop was constructing difference of abstraction (175states) and interpolant automaton (currently 16 states, 27 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 91. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1526). Cancelled while BasicCegarLoop was constructing difference of abstraction (175states) and interpolant automaton (currently 16 states, 27 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 91. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1528). Cancelled while BasicCegarLoop was constructing difference of abstraction (175states) and interpolant automaton (currently 16 states, 27 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 91. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1516). Cancelled while BasicCegarLoop was constructing difference of abstraction (175states) and interpolant automaton (currently 16 states, 27 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 91. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1514). Cancelled while BasicCegarLoop was constructing difference of abstraction (175states) and interpolant automaton (currently 16 states, 27 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 91. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1517). Cancelled while BasicCegarLoop was constructing difference of abstraction (175states) and interpolant automaton (currently 16 states, 27 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 91. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1524). Cancelled while BasicCegarLoop was constructing difference of abstraction (175states) and interpolant automaton (currently 16 states, 27 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 91. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1454). Cancelled while BasicCegarLoop was constructing difference of abstraction (175states) and interpolant automaton (currently 16 states, 27 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 91. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1455). Cancelled while BasicCegarLoop was constructing difference of abstraction (175states) and interpolant automaton (currently 16 states, 27 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 91. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1456). Cancelled while BasicCegarLoop was constructing difference of abstraction (175states) and interpolant automaton (currently 16 states, 27 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 91. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1456). Cancelled while BasicCegarLoop was constructing difference of abstraction (175states) and interpolant automaton (currently 16 states, 27 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 91. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1454). Cancelled while BasicCegarLoop was constructing difference of abstraction (175states) and interpolant automaton (currently 16 states, 27 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 91. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1455). Cancelled while BasicCegarLoop was constructing difference of abstraction (175states) and interpolant automaton (currently 16 states, 27 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 91. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1486). Cancelled while BasicCegarLoop was constructing difference of abstraction (175states) and interpolant automaton (currently 16 states, 27 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 91. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1484). Cancelled while BasicCegarLoop was constructing difference of abstraction (175states) and interpolant automaton (currently 16 states, 27 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 91. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1484). Cancelled while BasicCegarLoop was constructing difference of abstraction (175states) and interpolant automaton (currently 16 states, 27 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 91. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1490). Cancelled while BasicCegarLoop was constructing difference of abstraction (175states) and interpolant automaton (currently 16 states, 27 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 91. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1490). Cancelled while BasicCegarLoop was constructing difference of abstraction (175states) and interpolant automaton (currently 16 states, 27 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 91. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1486). Cancelled while BasicCegarLoop was constructing difference of abstraction (175states) and interpolant automaton (currently 16 states, 27 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 91. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1486). Cancelled while BasicCegarLoop was constructing difference of abstraction (175states) and interpolant automaton (currently 16 states, 27 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 91. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1486). Cancelled while BasicCegarLoop was constructing difference of abstraction (175states) and interpolant automaton (currently 16 states, 27 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 91. - StatisticsResult: Ultimate Automizer benchmark data CFG has 17 procedures, 173 locations, 45 error locations. TIMEOUT Result, 72.0s OverallTime, 18 OverallIterations, 3 TraceHistogramMax, 43.2s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 2650 SDtfs, 1407 SDslu, 10619 SDs, 0 SdLazy, 10122 SolverSat, 336 SolverUnsat, 67 SolverUnknown, 0 SolverNotchecked, 23.6s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 558 GetRequests, 331 SyntacticMatches, 24 SemanticMatches, 202 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 514 ImplicationChecksByTransitivity, 34.8s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=210occurred in iteration=11, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.1s AutomataMinimizationTime, 17 MinimizatonAttempts, 296 StatesRemovedByMinimization, 13 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.0s SsaConstructionTime, 0.3s SatisfiabilityAnalysisTime, 27.6s InterpolantComputationTime, 887 NumberOfCodeBlocks, 887 NumberOfCodeBlocksAsserted, 31 NumberOfCheckSat, 857 ConstructedInterpolants, 34 QuantifiedInterpolants, 259326 SizeOfPredicates, 40 NumberOfNonLiveVariables, 1547 ConjunctsInSsa, 243 ConjunctsInUnsatCore, 30 InterpolantComputations, 7 PerfectInterpolantSequences, 243/332 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: Timeout Written .csv to /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memleaks_test15_true-valid-memsafety_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Camel.epf_AutomizerC.xml/Csv-Benchmark-0-2018-02-02_09-29-23-354.csv Written .csv to /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memleaks_test15_true-valid-memsafety_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Camel.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-0-2018-02-02_09-29-23-354.csv Completed graceful shutdown