java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/cav18-smtinterpol/svcomp-DerefFreeMemtrack-32bit-Automizer_Camel.epf -i ../../../trunk/examples/svcomp/ldv-memsafety/memleaks_test22_3_true-valid-memsafety_true-termination.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-26d9e06-m [2018-02-02 09:32:02,067 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-02-02 09:32:02,068 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-02-02 09:32:02,082 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-02-02 09:32:02,082 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-02-02 09:32:02,083 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-02-02 09:32:02,084 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-02-02 09:32:02,085 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-02-02 09:32:02,087 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-02-02 09:32:02,088 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-02-02 09:32:02,088 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-02-02 09:32:02,089 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-02-02 09:32:02,089 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-02-02 09:32:02,090 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-02-02 09:32:02,091 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-02-02 09:32:02,093 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-02-02 09:32:02,094 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-02-02 09:32:02,096 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-02-02 09:32:02,097 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-02-02 09:32:02,098 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-02-02 09:32:02,099 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-02-02 09:32:02,099 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-02-02 09:32:02,100 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-02-02 09:32:02,101 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-02-02 09:32:02,101 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-02-02 09:32:02,102 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-02-02 09:32:02,102 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-02-02 09:32:02,103 INFO L177 SettingsManager]: PEA to Boogie provides no preferences, ignoring... [2018-02-02 09:32:02,103 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-02-02 09:32:02,103 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-02-02 09:32:02,104 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-02-02 09:32:02,104 INFO L98 SettingsManager]: Beginning loading settings from /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/cav18-smtinterpol/svcomp-DerefFreeMemtrack-32bit-Automizer_Camel.epf [2018-02-02 09:32:02,113 INFO L110 SettingsManager]: Loading preferences was successful [2018-02-02 09:32:02,114 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-02-02 09:32:02,115 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-02-02 09:32:02,115 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-02-02 09:32:02,115 INFO L133 SettingsManager]: * Use SBE=true [2018-02-02 09:32:02,115 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-02-02 09:32:02,115 INFO L133 SettingsManager]: * sizeof long=4 [2018-02-02 09:32:02,115 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-02-02 09:32:02,116 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-02-02 09:32:02,116 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-02-02 09:32:02,116 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-02-02 09:32:02,116 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-02-02 09:32:02,116 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-02-02 09:32:02,116 INFO L133 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2018-02-02 09:32:02,116 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-02-02 09:32:02,117 INFO L133 SettingsManager]: * sizeof long double=12 [2018-02-02 09:32:02,117 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-02-02 09:32:02,117 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-02-02 09:32:02,117 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-02-02 09:32:02,117 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-02-02 09:32:02,117 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-02-02 09:32:02,117 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-02-02 09:32:02,118 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-02-02 09:32:02,118 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-02-02 09:32:02,118 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL [2018-02-02 09:32:02,145 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-02-02 09:32:02,153 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully initialized [2018-02-02 09:32:02,156 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-02-02 09:32:02,157 INFO L271 PluginConnector]: Initializing CDTParser... [2018-02-02 09:32:02,157 INFO L276 PluginConnector]: CDTParser initialized [2018-02-02 09:32:02,158 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/ldv-memsafety/memleaks_test22_3_true-valid-memsafety_true-termination.i [2018-02-02 09:32:02,296 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-02-02 09:32:02,297 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-02-02 09:32:02,298 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-02-02 09:32:02,298 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-02-02 09:32:02,303 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-02-02 09:32:02,304 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 02.02 09:32:02" (1/1) ... [2018-02-02 09:32:02,306 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@6eabcc5c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.02 09:32:02, skipping insertion in model container [2018-02-02 09:32:02,307 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 02.02 09:32:02" (1/1) ... [2018-02-02 09:32:02,318 INFO L153 Dispatcher]: Using SV-COMP mode [2018-02-02 09:32:02,352 INFO L153 Dispatcher]: Using SV-COMP mode [2018-02-02 09:32:02,440 INFO L450 PostProcessor]: Settings: Checked method=main [2018-02-02 09:32:02,457 INFO L450 PostProcessor]: Settings: Checked method=main [2018-02-02 09:32:02,464 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.02 09:32:02 WrapperNode [2018-02-02 09:32:02,464 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-02-02 09:32:02,465 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-02-02 09:32:02,465 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-02-02 09:32:02,465 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-02-02 09:32:02,473 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.02 09:32:02" (1/1) ... [2018-02-02 09:32:02,473 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.02 09:32:02" (1/1) ... [2018-02-02 09:32:02,481 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.02 09:32:02" (1/1) ... [2018-02-02 09:32:02,482 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.02 09:32:02" (1/1) ... [2018-02-02 09:32:02,488 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.02 09:32:02" (1/1) ... [2018-02-02 09:32:02,490 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.02 09:32:02" (1/1) ... [2018-02-02 09:32:02,491 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.02 09:32:02" (1/1) ... [2018-02-02 09:32:02,494 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-02-02 09:32:02,494 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-02-02 09:32:02,495 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-02-02 09:32:02,495 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-02-02 09:32:02,495 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.02 09:32:02" (1/1) ... No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-02-02 09:32:02,530 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-02-02 09:32:02,530 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-02-02 09:32:02,530 INFO L136 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~TO~VOID [2018-02-02 09:32:02,531 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_malloc [2018-02-02 09:32:02,531 INFO L136 BoogieDeclarations]: Found implementation of procedure LDV_INIT_LIST_HEAD [2018-02-02 09:32:02,531 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_atomic_add_return [2018-02-02 09:32:02,531 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_atomic_sub_return [2018-02-02 09:32:02,531 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kref_sub [2018-02-02 09:32:02,531 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kref_init [2018-02-02 09:32:02,531 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kref_get [2018-02-02 09:32:02,532 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kref_put [2018-02-02 09:32:02,532 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_cleanup [2018-02-02 09:32:02,532 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_release [2018-02-02 09:32:02,532 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_put [2018-02-02 09:32:02,532 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_get [2018-02-02 09:32:02,532 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_init_internal [2018-02-02 09:32:02,532 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_init [2018-02-02 09:32:02,532 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_create [2018-02-02 09:32:02,532 INFO L136 BoogieDeclarations]: Found implementation of procedure f_22_get [2018-02-02 09:32:02,533 INFO L136 BoogieDeclarations]: Found implementation of procedure f_22_put [2018-02-02 09:32:02,533 INFO L136 BoogieDeclarations]: Found implementation of procedure entry_point [2018-02-02 09:32:02,533 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-02-02 09:32:02,533 INFO L128 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2018-02-02 09:32:02,533 INFO L128 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2018-02-02 09:32:02,533 INFO L128 BoogieDeclarations]: Found specification of procedure write~int [2018-02-02 09:32:02,533 INFO L128 BoogieDeclarations]: Found specification of procedure read~int [2018-02-02 09:32:02,533 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.free [2018-02-02 09:32:02,534 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-02-02 09:32:02,534 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-02-02 09:32:02,534 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2018-02-02 09:32:02,534 INFO L136 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2018-02-02 09:32:02,534 INFO L128 BoogieDeclarations]: Found specification of procedure malloc [2018-02-02 09:32:02,534 INFO L128 BoogieDeclarations]: Found specification of procedure free [2018-02-02 09:32:02,534 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2018-02-02 09:32:02,534 INFO L128 BoogieDeclarations]: Found specification of procedure memset [2018-02-02 09:32:02,535 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_malloc [2018-02-02 09:32:02,535 INFO L128 BoogieDeclarations]: Found specification of procedure LDV_INIT_LIST_HEAD [2018-02-02 09:32:02,535 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_atomic_add_return [2018-02-02 09:32:02,535 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_atomic_sub_return [2018-02-02 09:32:02,535 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kref_sub [2018-02-02 09:32:02,535 INFO L128 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~TO~VOID [2018-02-02 09:32:02,535 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kref_init [2018-02-02 09:32:02,535 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kref_get [2018-02-02 09:32:02,536 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kref_put [2018-02-02 09:32:02,536 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_cleanup [2018-02-02 09:32:02,536 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_release [2018-02-02 09:32:02,536 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_put [2018-02-02 09:32:02,536 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_get [2018-02-02 09:32:02,536 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_init_internal [2018-02-02 09:32:02,536 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_init [2018-02-02 09:32:02,536 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_create [2018-02-02 09:32:02,537 INFO L128 BoogieDeclarations]: Found specification of procedure f_22_get [2018-02-02 09:32:02,537 INFO L128 BoogieDeclarations]: Found specification of procedure f_22_put [2018-02-02 09:32:02,537 INFO L128 BoogieDeclarations]: Found specification of procedure entry_point [2018-02-02 09:32:02,537 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-02-02 09:32:02,537 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-02-02 09:32:02,537 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-02-02 09:32:02,706 WARN L455 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-02-02 09:32:02,842 INFO L257 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-02-02 09:32:02,843 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 02.02 09:32:02 BoogieIcfgContainer [2018-02-02 09:32:02,843 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-02-02 09:32:02,844 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-02-02 09:32:02,844 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-02-02 09:32:02,847 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-02-02 09:32:02,847 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 02.02 09:32:02" (1/3) ... [2018-02-02 09:32:02,848 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@6f92ef68 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 02.02 09:32:02, skipping insertion in model container [2018-02-02 09:32:02,848 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.02 09:32:02" (2/3) ... [2018-02-02 09:32:02,848 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@6f92ef68 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 02.02 09:32:02, skipping insertion in model container [2018-02-02 09:32:02,848 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 02.02 09:32:02" (3/3) ... [2018-02-02 09:32:02,850 INFO L107 eAbstractionObserver]: Analyzing ICFG memleaks_test22_3_true-valid-memsafety_true-termination.i [2018-02-02 09:32:02,857 INFO L128 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-02-02 09:32:02,864 INFO L140 ceAbstractionStarter]: Appying trace abstraction to program that has 23 error locations. [2018-02-02 09:32:02,895 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-02-02 09:32:02,896 INFO L323 AbstractCegarLoop]: Hoare is false [2018-02-02 09:32:02,896 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-02-02 09:32:02,896 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-02-02 09:32:02,896 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-02-02 09:32:02,896 INFO L327 AbstractCegarLoop]: Difference is false [2018-02-02 09:32:02,896 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-02-02 09:32:02,896 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-02-02 09:32:02,897 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-02-02 09:32:02,906 INFO L276 IsEmpty]: Start isEmpty. Operand 151 states. [2018-02-02 09:32:02,914 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-02-02 09:32:02,915 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:32:02,916 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:32:02,916 INFO L371 AbstractCegarLoop]: === Iteration 1 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-02 09:32:02,920 INFO L82 PathProgramCache]: Analyzing trace with hash 1245228870, now seen corresponding path program 1 times [2018-02-02 09:32:02,921 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 09:32:02,921 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 09:32:02,967 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 09:32:02,967 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-02 09:32:02,968 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 09:32:03,009 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:32:03,015 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:32:03,099 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 09:32:03,101 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-02 09:32:03,101 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-02-02 09:32:03,159 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-02-02 09:32:03,171 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-02-02 09:32:03,171 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-02-02 09:32:03,173 INFO L87 Difference]: Start difference. First operand 151 states. Second operand 5 states. [2018-02-02 09:32:03,224 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:32:03,224 INFO L93 Difference]: Finished difference Result 157 states and 166 transitions. [2018-02-02 09:32:03,224 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-02-02 09:32:03,225 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 17 [2018-02-02 09:32:03,226 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:32:03,237 INFO L225 Difference]: With dead ends: 157 [2018-02-02 09:32:03,237 INFO L226 Difference]: Without dead ends: 154 [2018-02-02 09:32:03,238 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-02-02 09:32:03,253 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 154 states. [2018-02-02 09:32:03,270 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 154 to 152. [2018-02-02 09:32:03,271 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 152 states. [2018-02-02 09:32:03,273 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 152 states to 152 states and 161 transitions. [2018-02-02 09:32:03,273 INFO L78 Accepts]: Start accepts. Automaton has 152 states and 161 transitions. Word has length 17 [2018-02-02 09:32:03,274 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:32:03,274 INFO L432 AbstractCegarLoop]: Abstraction has 152 states and 161 transitions. [2018-02-02 09:32:03,274 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-02-02 09:32:03,274 INFO L276 IsEmpty]: Start isEmpty. Operand 152 states and 161 transitions. [2018-02-02 09:32:03,274 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2018-02-02 09:32:03,274 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:32:03,275 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:32:03,275 INFO L371 AbstractCegarLoop]: === Iteration 2 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-02 09:32:03,275 INFO L82 PathProgramCache]: Analyzing trace with hash -1572748952, now seen corresponding path program 1 times [2018-02-02 09:32:03,275 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 09:32:03,275 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 09:32:03,276 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 09:32:03,276 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-02 09:32:03,276 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 09:32:03,289 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:32:03,290 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:32:03,341 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 09:32:03,341 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-02 09:32:03,342 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-02-02 09:32:03,343 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-02-02 09:32:03,343 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-02-02 09:32:03,343 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-02-02 09:32:03,343 INFO L87 Difference]: Start difference. First operand 152 states and 161 transitions. Second operand 6 states. [2018-02-02 09:32:03,516 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:32:03,516 INFO L93 Difference]: Finished difference Result 153 states and 162 transitions. [2018-02-02 09:32:03,517 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-02-02 09:32:03,517 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 19 [2018-02-02 09:32:03,517 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:32:03,519 INFO L225 Difference]: With dead ends: 153 [2018-02-02 09:32:03,520 INFO L226 Difference]: Without dead ends: 153 [2018-02-02 09:32:03,520 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-02-02 09:32:03,521 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 153 states. [2018-02-02 09:32:03,528 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 153 to 151. [2018-02-02 09:32:03,528 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 151 states. [2018-02-02 09:32:03,530 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 151 states to 151 states and 160 transitions. [2018-02-02 09:32:03,530 INFO L78 Accepts]: Start accepts. Automaton has 151 states and 160 transitions. Word has length 19 [2018-02-02 09:32:03,530 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:32:03,532 INFO L432 AbstractCegarLoop]: Abstraction has 151 states and 160 transitions. [2018-02-02 09:32:03,532 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-02-02 09:32:03,532 INFO L276 IsEmpty]: Start isEmpty. Operand 151 states and 160 transitions. [2018-02-02 09:32:03,532 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2018-02-02 09:32:03,532 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:32:03,533 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:32:03,533 INFO L371 AbstractCegarLoop]: === Iteration 3 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-02 09:32:03,533 INFO L82 PathProgramCache]: Analyzing trace with hash -1572748951, now seen corresponding path program 1 times [2018-02-02 09:32:03,533 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 09:32:03,533 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 09:32:03,535 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 09:32:03,535 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-02 09:32:03,535 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 09:32:03,558 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:32:03,559 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:32:03,697 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 09:32:03,697 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-02 09:32:03,697 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-02-02 09:32:03,697 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-02-02 09:32:03,697 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-02-02 09:32:03,697 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-02-02 09:32:03,698 INFO L87 Difference]: Start difference. First operand 151 states and 160 transitions. Second operand 7 states. [2018-02-02 09:32:03,906 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:32:03,907 INFO L93 Difference]: Finished difference Result 152 states and 161 transitions. [2018-02-02 09:32:03,907 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-02-02 09:32:03,907 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 19 [2018-02-02 09:32:03,908 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:32:03,909 INFO L225 Difference]: With dead ends: 152 [2018-02-02 09:32:03,909 INFO L226 Difference]: Without dead ends: 152 [2018-02-02 09:32:03,909 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2018-02-02 09:32:03,910 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 152 states. [2018-02-02 09:32:03,915 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 152 to 150. [2018-02-02 09:32:03,916 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 150 states. [2018-02-02 09:32:03,917 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 150 states to 150 states and 159 transitions. [2018-02-02 09:32:03,918 INFO L78 Accepts]: Start accepts. Automaton has 150 states and 159 transitions. Word has length 19 [2018-02-02 09:32:03,918 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:32:03,918 INFO L432 AbstractCegarLoop]: Abstraction has 150 states and 159 transitions. [2018-02-02 09:32:03,918 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-02-02 09:32:03,918 INFO L276 IsEmpty]: Start isEmpty. Operand 150 states and 159 transitions. [2018-02-02 09:32:03,919 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-02-02 09:32:03,919 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:32:03,919 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:32:03,919 INFO L371 AbstractCegarLoop]: === Iteration 4 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-02 09:32:03,920 INFO L82 PathProgramCache]: Analyzing trace with hash -336004596, now seen corresponding path program 1 times [2018-02-02 09:32:03,920 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 09:32:03,920 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 09:32:03,921 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 09:32:03,921 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-02 09:32:03,921 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 09:32:03,934 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:32:03,935 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:32:04,009 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 09:32:04,009 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-02 09:32:04,009 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-02-02 09:32:04,010 INFO L409 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-02-02 09:32:04,010 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-02-02 09:32:04,010 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72 [2018-02-02 09:32:04,010 INFO L87 Difference]: Start difference. First operand 150 states and 159 transitions. Second operand 9 states. [2018-02-02 09:32:04,065 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:32:04,065 INFO L93 Difference]: Finished difference Result 171 states and 182 transitions. [2018-02-02 09:32:04,065 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-02-02 09:32:04,065 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 29 [2018-02-02 09:32:04,065 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:32:04,066 INFO L225 Difference]: With dead ends: 171 [2018-02-02 09:32:04,066 INFO L226 Difference]: Without dead ends: 171 [2018-02-02 09:32:04,067 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=23, Invalid=87, Unknown=0, NotChecked=0, Total=110 [2018-02-02 09:32:04,067 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 171 states. [2018-02-02 09:32:04,076 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 171 to 164. [2018-02-02 09:32:04,076 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 164 states. [2018-02-02 09:32:04,077 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 164 states to 164 states and 173 transitions. [2018-02-02 09:32:04,077 INFO L78 Accepts]: Start accepts. Automaton has 164 states and 173 transitions. Word has length 29 [2018-02-02 09:32:04,077 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:32:04,078 INFO L432 AbstractCegarLoop]: Abstraction has 164 states and 173 transitions. [2018-02-02 09:32:04,078 INFO L433 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-02-02 09:32:04,078 INFO L276 IsEmpty]: Start isEmpty. Operand 164 states and 173 transitions. [2018-02-02 09:32:04,079 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-02-02 09:32:04,079 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:32:04,079 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:32:04,079 INFO L371 AbstractCegarLoop]: === Iteration 5 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-02 09:32:04,079 INFO L82 PathProgramCache]: Analyzing trace with hash 610577100, now seen corresponding path program 1 times [2018-02-02 09:32:04,079 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 09:32:04,079 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 09:32:04,080 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 09:32:04,081 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-02 09:32:04,081 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 09:32:04,094 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:32:04,095 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:32:04,151 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 09:32:04,151 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-02 09:32:04,151 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-02-02 09:32:04,151 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-02-02 09:32:04,151 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-02-02 09:32:04,152 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-02-02 09:32:04,152 INFO L87 Difference]: Start difference. First operand 164 states and 173 transitions. Second operand 10 states. [2018-02-02 09:32:04,342 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:32:04,342 INFO L93 Difference]: Finished difference Result 163 states and 172 transitions. [2018-02-02 09:32:04,342 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-02-02 09:32:04,342 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 34 [2018-02-02 09:32:04,343 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:32:04,343 INFO L225 Difference]: With dead ends: 163 [2018-02-02 09:32:04,343 INFO L226 Difference]: Without dead ends: 163 [2018-02-02 09:32:04,344 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=29, Invalid=127, Unknown=0, NotChecked=0, Total=156 [2018-02-02 09:32:04,344 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 163 states. [2018-02-02 09:32:04,347 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 163 to 163. [2018-02-02 09:32:04,347 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 163 states. [2018-02-02 09:32:04,348 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 163 states to 163 states and 172 transitions. [2018-02-02 09:32:04,348 INFO L78 Accepts]: Start accepts. Automaton has 163 states and 172 transitions. Word has length 34 [2018-02-02 09:32:04,349 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:32:04,349 INFO L432 AbstractCegarLoop]: Abstraction has 163 states and 172 transitions. [2018-02-02 09:32:04,349 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-02-02 09:32:04,349 INFO L276 IsEmpty]: Start isEmpty. Operand 163 states and 172 transitions. [2018-02-02 09:32:04,350 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-02-02 09:32:04,350 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:32:04,350 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:32:04,350 INFO L371 AbstractCegarLoop]: === Iteration 6 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-02 09:32:04,350 INFO L82 PathProgramCache]: Analyzing trace with hash 610577101, now seen corresponding path program 1 times [2018-02-02 09:32:04,350 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 09:32:04,351 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 09:32:04,352 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 09:32:04,352 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-02 09:32:04,352 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 09:32:04,363 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:32:04,364 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:32:04,382 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 09:32:04,382 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-02 09:32:04,382 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-02-02 09:32:04,383 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-02-02 09:32:04,383 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-02-02 09:32:04,383 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-02-02 09:32:04,383 INFO L87 Difference]: Start difference. First operand 163 states and 172 transitions. Second operand 4 states. [2018-02-02 09:32:04,395 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:32:04,395 INFO L93 Difference]: Finished difference Result 166 states and 175 transitions. [2018-02-02 09:32:04,396 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-02-02 09:32:04,396 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 34 [2018-02-02 09:32:04,396 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:32:04,397 INFO L225 Difference]: With dead ends: 166 [2018-02-02 09:32:04,397 INFO L226 Difference]: Without dead ends: 164 [2018-02-02 09:32:04,397 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-02-02 09:32:04,397 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 164 states. [2018-02-02 09:32:04,402 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 164 to 164. [2018-02-02 09:32:04,402 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 164 states. [2018-02-02 09:32:04,403 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 164 states to 164 states and 173 transitions. [2018-02-02 09:32:04,403 INFO L78 Accepts]: Start accepts. Automaton has 164 states and 173 transitions. Word has length 34 [2018-02-02 09:32:04,403 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:32:04,403 INFO L432 AbstractCegarLoop]: Abstraction has 164 states and 173 transitions. [2018-02-02 09:32:04,404 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-02-02 09:32:04,404 INFO L276 IsEmpty]: Start isEmpty. Operand 164 states and 173 transitions. [2018-02-02 09:32:04,404 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-02-02 09:32:04,404 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:32:04,405 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:32:04,405 INFO L371 AbstractCegarLoop]: === Iteration 7 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-02 09:32:04,405 INFO L82 PathProgramCache]: Analyzing trace with hash -838244594, now seen corresponding path program 1 times [2018-02-02 09:32:04,405 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 09:32:04,405 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 09:32:04,406 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 09:32:04,406 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-02 09:32:04,406 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 09:32:04,418 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:32:04,419 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:32:04,446 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 09:32:04,446 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-02 09:32:04,446 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-02 09:32:04,454 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-02 09:32:04,477 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:32:04,483 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-02 09:32:04,503 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 09:32:04,520 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-02 09:32:04,521 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 6 [2018-02-02 09:32:04,521 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-02-02 09:32:04,521 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-02-02 09:32:04,521 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-02-02 09:32:04,522 INFO L87 Difference]: Start difference. First operand 164 states and 173 transitions. Second operand 6 states. [2018-02-02 09:32:04,545 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:32:04,545 INFO L93 Difference]: Finished difference Result 167 states and 176 transitions. [2018-02-02 09:32:04,545 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-02-02 09:32:04,546 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 35 [2018-02-02 09:32:04,546 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:32:04,547 INFO L225 Difference]: With dead ends: 167 [2018-02-02 09:32:04,547 INFO L226 Difference]: Without dead ends: 165 [2018-02-02 09:32:04,547 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 40 GetRequests, 35 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=16, Invalid=26, Unknown=0, NotChecked=0, Total=42 [2018-02-02 09:32:04,547 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 165 states. [2018-02-02 09:32:04,552 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 165 to 165. [2018-02-02 09:32:04,552 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 165 states. [2018-02-02 09:32:04,553 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 165 states to 165 states and 174 transitions. [2018-02-02 09:32:04,553 INFO L78 Accepts]: Start accepts. Automaton has 165 states and 174 transitions. Word has length 35 [2018-02-02 09:32:04,553 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:32:04,553 INFO L432 AbstractCegarLoop]: Abstraction has 165 states and 174 transitions. [2018-02-02 09:32:04,553 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-02-02 09:32:04,553 INFO L276 IsEmpty]: Start isEmpty. Operand 165 states and 174 transitions. [2018-02-02 09:32:04,554 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-02-02 09:32:04,554 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:32:04,554 INFO L351 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:32:04,554 INFO L371 AbstractCegarLoop]: === Iteration 8 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-02 09:32:04,554 INFO L82 PathProgramCache]: Analyzing trace with hash 1492923117, now seen corresponding path program 2 times [2018-02-02 09:32:04,555 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 09:32:04,555 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 09:32:04,556 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 09:32:04,556 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-02 09:32:04,556 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 09:32:04,568 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:32:04,569 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:32:04,599 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 09:32:04,600 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-02 09:32:04,600 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-02 09:32:04,607 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-02-02 09:32:04,630 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 09:32:04,633 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-02 09:32:04,637 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-02 09:32:04,662 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-02-02 09:32:04,664 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-02 09:32:04,681 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-02-02 09:32:04,681 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-02 09:32:04,696 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-02-02 09:32:04,696 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-02-02 09:32:06,809 WARN L1033 $PredicateComparison]: unable to prove that (or (exists ((v_ldv_kobject_create_~kobj~1.base_BEFORE_CALL_1 Int) (v_prenex_2 Int)) (let ((.cse0 (mod v_prenex_2 4294967296))) (and (= (+ (select |c_#length| v_ldv_kobject_create_~kobj~1.base_BEFORE_CALL_1) 4294967296) .cse0) (< 2147483647 .cse0)))) (exists ((v_prenex_3 Int) (ldv_malloc_~size Int)) (let ((.cse1 (mod ldv_malloc_~size 4294967296))) (and (= (select |c_#length| v_prenex_3) .cse1) (<= .cse1 2147483647))))) is different from true [2018-02-02 09:32:07,117 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-02-02 09:32:07,133 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-02-02 09:32:07,133 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [14] imperfect sequences [6] total 19 [2018-02-02 09:32:07,134 INFO L409 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-02-02 09:32:07,134 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-02-02 09:32:07,134 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=39, Invalid=270, Unknown=1, NotChecked=32, Total=342 [2018-02-02 09:32:07,134 INFO L87 Difference]: Start difference. First operand 165 states and 174 transitions. Second operand 19 states. [2018-02-02 09:32:09,044 WARN L143 SmtUtils]: Spent 1875ms on a formula simplification that was a NOOP. DAG size: 39 [2018-02-02 09:32:11,217 WARN L143 SmtUtils]: Spent 2032ms on a formula simplification that was a NOOP. DAG size: 31 [2018-02-02 09:32:11,674 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:32:11,674 INFO L93 Difference]: Finished difference Result 169 states and 178 transitions. [2018-02-02 09:32:11,674 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-02-02 09:32:11,674 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 36 [2018-02-02 09:32:11,675 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:32:11,675 INFO L225 Difference]: With dead ends: 169 [2018-02-02 09:32:11,675 INFO L226 Difference]: Without dead ends: 167 [2018-02-02 09:32:11,676 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 49 GetRequests, 24 SyntacticMatches, 0 SemanticMatches, 25 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 67 ImplicationChecksByTransitivity, 6.4s TimeCoverageRelationStatistics Valid=79, Invalid=574, Unknown=1, NotChecked=48, Total=702 [2018-02-02 09:32:11,676 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 167 states. [2018-02-02 09:32:11,678 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 167 to 165. [2018-02-02 09:32:11,681 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 165 states. [2018-02-02 09:32:11,682 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 165 states to 165 states and 174 transitions. [2018-02-02 09:32:11,682 INFO L78 Accepts]: Start accepts. Automaton has 165 states and 174 transitions. Word has length 36 [2018-02-02 09:32:11,682 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:32:11,682 INFO L432 AbstractCegarLoop]: Abstraction has 165 states and 174 transitions. [2018-02-02 09:32:11,683 INFO L433 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-02-02 09:32:11,683 INFO L276 IsEmpty]: Start isEmpty. Operand 165 states and 174 transitions. [2018-02-02 09:32:11,683 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-02-02 09:32:11,683 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:32:11,683 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:32:11,684 INFO L371 AbstractCegarLoop]: === Iteration 9 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-02 09:32:11,684 INFO L82 PathProgramCache]: Analyzing trace with hash 278126369, now seen corresponding path program 1 times [2018-02-02 09:32:11,684 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 09:32:11,684 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 09:32:11,685 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 09:32:11,685 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-02 09:32:11,685 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 09:32:11,695 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:32:11,696 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:32:11,805 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 09:32:11,805 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-02 09:32:11,806 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-02-02 09:32:11,806 INFO L409 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-02-02 09:32:11,806 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-02-02 09:32:11,806 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72 [2018-02-02 09:32:11,806 INFO L87 Difference]: Start difference. First operand 165 states and 174 transitions. Second operand 9 states. [2018-02-02 09:32:11,884 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:32:11,885 INFO L93 Difference]: Finished difference Result 179 states and 190 transitions. [2018-02-02 09:32:11,885 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-02-02 09:32:11,885 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 42 [2018-02-02 09:32:11,885 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:32:11,886 INFO L225 Difference]: With dead ends: 179 [2018-02-02 09:32:11,887 INFO L226 Difference]: Without dead ends: 179 [2018-02-02 09:32:11,887 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=23, Invalid=87, Unknown=0, NotChecked=0, Total=110 [2018-02-02 09:32:11,887 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 179 states. [2018-02-02 09:32:11,891 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 179 to 175. [2018-02-02 09:32:11,891 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 175 states. [2018-02-02 09:32:11,892 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 175 states to 175 states and 185 transitions. [2018-02-02 09:32:11,892 INFO L78 Accepts]: Start accepts. Automaton has 175 states and 185 transitions. Word has length 42 [2018-02-02 09:32:11,892 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:32:11,892 INFO L432 AbstractCegarLoop]: Abstraction has 175 states and 185 transitions. [2018-02-02 09:32:11,893 INFO L433 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-02-02 09:32:11,893 INFO L276 IsEmpty]: Start isEmpty. Operand 175 states and 185 transitions. [2018-02-02 09:32:11,894 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-02-02 09:32:11,894 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:32:11,894 INFO L351 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:32:11,894 INFO L371 AbstractCegarLoop]: === Iteration 10 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-02 09:32:11,894 INFO L82 PathProgramCache]: Analyzing trace with hash 2131974142, now seen corresponding path program 1 times [2018-02-02 09:32:11,894 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 09:32:11,895 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 09:32:11,895 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 09:32:11,896 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-02 09:32:11,896 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 09:32:11,904 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:32:11,905 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:32:11,953 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-02-02 09:32:11,953 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-02 09:32:11,954 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-02-02 09:32:11,954 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-02-02 09:32:11,954 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-02-02 09:32:11,954 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-02-02 09:32:11,954 INFO L87 Difference]: Start difference. First operand 175 states and 185 transitions. Second operand 10 states. [2018-02-02 09:32:12,128 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:32:12,129 INFO L93 Difference]: Finished difference Result 173 states and 183 transitions. [2018-02-02 09:32:12,129 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-02-02 09:32:12,129 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 42 [2018-02-02 09:32:12,129 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:32:12,130 INFO L225 Difference]: With dead ends: 173 [2018-02-02 09:32:12,130 INFO L226 Difference]: Without dead ends: 173 [2018-02-02 09:32:12,130 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=29, Invalid=127, Unknown=0, NotChecked=0, Total=156 [2018-02-02 09:32:12,130 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 173 states. [2018-02-02 09:32:12,134 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 173 to 173. [2018-02-02 09:32:12,134 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 173 states. [2018-02-02 09:32:12,135 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 173 states to 173 states and 183 transitions. [2018-02-02 09:32:12,135 INFO L78 Accepts]: Start accepts. Automaton has 173 states and 183 transitions. Word has length 42 [2018-02-02 09:32:12,135 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:32:12,135 INFO L432 AbstractCegarLoop]: Abstraction has 173 states and 183 transitions. [2018-02-02 09:32:12,135 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-02-02 09:32:12,135 INFO L276 IsEmpty]: Start isEmpty. Operand 173 states and 183 transitions. [2018-02-02 09:32:12,136 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-02-02 09:32:12,136 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:32:12,137 INFO L351 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:32:12,137 INFO L371 AbstractCegarLoop]: === Iteration 11 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-02 09:32:12,137 INFO L82 PathProgramCache]: Analyzing trace with hash 2131974143, now seen corresponding path program 1 times [2018-02-02 09:32:12,137 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 09:32:12,137 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 09:32:12,138 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 09:32:12,138 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-02 09:32:12,138 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 09:32:12,149 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:32:12,150 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:32:12,187 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 09:32:12,188 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-02 09:32:12,188 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-02 09:32:12,195 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-02 09:32:12,233 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:32:12,235 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-02 09:32:12,250 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 09:32:12,280 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-02 09:32:12,281 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 8 [2018-02-02 09:32:12,281 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-02-02 09:32:12,281 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-02-02 09:32:12,281 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=33, Unknown=0, NotChecked=0, Total=56 [2018-02-02 09:32:12,282 INFO L87 Difference]: Start difference. First operand 173 states and 183 transitions. Second operand 8 states. [2018-02-02 09:32:12,308 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:32:12,308 INFO L93 Difference]: Finished difference Result 176 states and 186 transitions. [2018-02-02 09:32:12,309 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-02-02 09:32:12,309 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 42 [2018-02-02 09:32:12,309 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:32:12,310 INFO L225 Difference]: With dead ends: 176 [2018-02-02 09:32:12,310 INFO L226 Difference]: Without dead ends: 174 [2018-02-02 09:32:12,310 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 49 GetRequests, 42 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2018-02-02 09:32:12,311 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 174 states. [2018-02-02 09:32:12,314 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 174 to 174. [2018-02-02 09:32:12,314 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 174 states. [2018-02-02 09:32:12,315 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 174 states to 174 states and 184 transitions. [2018-02-02 09:32:12,315 INFO L78 Accepts]: Start accepts. Automaton has 174 states and 184 transitions. Word has length 42 [2018-02-02 09:32:12,315 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:32:12,315 INFO L432 AbstractCegarLoop]: Abstraction has 174 states and 184 transitions. [2018-02-02 09:32:12,316 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-02-02 09:32:12,316 INFO L276 IsEmpty]: Start isEmpty. Operand 174 states and 184 transitions. [2018-02-02 09:32:12,316 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-02-02 09:32:12,317 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:32:12,317 INFO L351 BasicCegarLoop]: trace histogram [4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:32:12,317 INFO L371 AbstractCegarLoop]: === Iteration 12 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-02 09:32:12,317 INFO L82 PathProgramCache]: Analyzing trace with hash 731661120, now seen corresponding path program 2 times [2018-02-02 09:32:12,317 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 09:32:12,317 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 09:32:12,318 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 09:32:12,318 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-02 09:32:12,318 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 09:32:12,330 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:32:12,331 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:32:12,371 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 09:32:12,371 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-02 09:32:12,371 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-02 09:32:12,376 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-02-02 09:32:12,400 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 09:32:12,404 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-02 09:32:12,407 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-02 09:32:12,424 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-02-02 09:32:12,424 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-02 09:32:12,439 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-02-02 09:32:12,439 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-02 09:32:12,453 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-02-02 09:32:12,453 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-02-02 09:32:12,886 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-02-02 09:32:12,903 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-02-02 09:32:12,903 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [15] imperfect sequences [8] total 22 [2018-02-02 09:32:12,903 INFO L409 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-02-02 09:32:12,903 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-02-02 09:32:12,903 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=72, Invalid=390, Unknown=0, NotChecked=0, Total=462 [2018-02-02 09:32:12,904 INFO L87 Difference]: Start difference. First operand 174 states and 184 transitions. Second operand 22 states. [2018-02-02 09:32:13,927 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:32:13,927 INFO L93 Difference]: Finished difference Result 207 states and 216 transitions. [2018-02-02 09:32:13,927 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-02-02 09:32:13,927 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 43 [2018-02-02 09:32:13,927 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:32:13,928 INFO L225 Difference]: With dead ends: 207 [2018-02-02 09:32:13,928 INFO L226 Difference]: Without dead ends: 205 [2018-02-02 09:32:13,928 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 60 GetRequests, 29 SyntacticMatches, 1 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 155 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=147, Invalid=845, Unknown=0, NotChecked=0, Total=992 [2018-02-02 09:32:13,929 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 205 states. [2018-02-02 09:32:13,931 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 205 to 173. [2018-02-02 09:32:13,931 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 173 states. [2018-02-02 09:32:13,931 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 173 states to 173 states and 183 transitions. [2018-02-02 09:32:13,931 INFO L78 Accepts]: Start accepts. Automaton has 173 states and 183 transitions. Word has length 43 [2018-02-02 09:32:13,932 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:32:13,932 INFO L432 AbstractCegarLoop]: Abstraction has 173 states and 183 transitions. [2018-02-02 09:32:13,932 INFO L433 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-02-02 09:32:13,932 INFO L276 IsEmpty]: Start isEmpty. Operand 173 states and 183 transitions. [2018-02-02 09:32:13,932 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-02-02 09:32:13,932 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:32:13,932 INFO L351 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:32:13,932 INFO L371 AbstractCegarLoop]: === Iteration 13 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-02 09:32:13,932 INFO L82 PathProgramCache]: Analyzing trace with hash 689381786, now seen corresponding path program 1 times [2018-02-02 09:32:13,932 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 09:32:13,933 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 09:32:13,933 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 09:32:13,933 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-02 09:32:13,933 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 09:32:13,937 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:32:13,938 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:32:13,950 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-02-02 09:32:13,950 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-02 09:32:13,950 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-02-02 09:32:13,951 INFO L409 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-02-02 09:32:13,951 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-02-02 09:32:13,951 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-02-02 09:32:13,951 INFO L87 Difference]: Start difference. First operand 173 states and 183 transitions. Second operand 3 states. [2018-02-02 09:32:14,034 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:32:14,035 INFO L93 Difference]: Finished difference Result 192 states and 205 transitions. [2018-02-02 09:32:14,035 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-02-02 09:32:14,035 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 47 [2018-02-02 09:32:14,035 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:32:14,036 INFO L225 Difference]: With dead ends: 192 [2018-02-02 09:32:14,036 INFO L226 Difference]: Without dead ends: 179 [2018-02-02 09:32:14,036 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 13 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-02-02 09:32:14,036 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 179 states. [2018-02-02 09:32:14,040 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 179 to 169. [2018-02-02 09:32:14,041 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 169 states. [2018-02-02 09:32:14,041 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 169 states to 169 states and 178 transitions. [2018-02-02 09:32:14,041 INFO L78 Accepts]: Start accepts. Automaton has 169 states and 178 transitions. Word has length 47 [2018-02-02 09:32:14,041 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:32:14,041 INFO L432 AbstractCegarLoop]: Abstraction has 169 states and 178 transitions. [2018-02-02 09:32:14,041 INFO L433 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-02-02 09:32:14,041 INFO L276 IsEmpty]: Start isEmpty. Operand 169 states and 178 transitions. [2018-02-02 09:32:14,042 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2018-02-02 09:32:14,042 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:32:14,042 INFO L351 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:32:14,042 INFO L371 AbstractCegarLoop]: === Iteration 14 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-02 09:32:14,042 INFO L82 PathProgramCache]: Analyzing trace with hash 2000778853, now seen corresponding path program 1 times [2018-02-02 09:32:14,042 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 09:32:14,042 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 09:32:14,043 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 09:32:14,043 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-02 09:32:14,080 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 09:32:14,089 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:32:14,090 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:32:14,123 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-02-02 09:32:14,123 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-02 09:32:14,123 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-02-02 09:32:14,123 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-02-02 09:32:14,123 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-02-02 09:32:14,123 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2018-02-02 09:32:14,123 INFO L87 Difference]: Start difference. First operand 169 states and 178 transitions. Second operand 8 states. [2018-02-02 09:32:14,152 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:32:14,153 INFO L93 Difference]: Finished difference Result 147 states and 153 transitions. [2018-02-02 09:32:14,153 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-02-02 09:32:14,153 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 49 [2018-02-02 09:32:14,153 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:32:14,154 INFO L225 Difference]: With dead ends: 147 [2018-02-02 09:32:14,154 INFO L226 Difference]: Without dead ends: 145 [2018-02-02 09:32:14,154 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=69, Unknown=0, NotChecked=0, Total=90 [2018-02-02 09:32:14,154 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 145 states. [2018-02-02 09:32:14,157 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 145 to 145. [2018-02-02 09:32:14,157 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 145 states. [2018-02-02 09:32:14,158 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 145 states to 145 states and 151 transitions. [2018-02-02 09:32:14,158 INFO L78 Accepts]: Start accepts. Automaton has 145 states and 151 transitions. Word has length 49 [2018-02-02 09:32:14,159 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:32:14,159 INFO L432 AbstractCegarLoop]: Abstraction has 145 states and 151 transitions. [2018-02-02 09:32:14,159 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-02-02 09:32:14,159 INFO L276 IsEmpty]: Start isEmpty. Operand 145 states and 151 transitions. [2018-02-02 09:32:14,159 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2018-02-02 09:32:14,159 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:32:14,160 INFO L351 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:32:14,160 INFO L371 AbstractCegarLoop]: === Iteration 15 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-02 09:32:14,160 INFO L82 PathProgramCache]: Analyzing trace with hash 2066481475, now seen corresponding path program 1 times [2018-02-02 09:32:14,160 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 09:32:14,160 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 09:32:14,161 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 09:32:14,161 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-02 09:32:14,161 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 09:32:14,170 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:32:14,171 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:32:14,224 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-02-02 09:32:14,224 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-02 09:32:14,224 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-02-02 09:32:14,225 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-02-02 09:32:14,225 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-02-02 09:32:14,225 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-02-02 09:32:14,225 INFO L87 Difference]: Start difference. First operand 145 states and 151 transitions. Second operand 10 states. [2018-02-02 09:32:14,269 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:32:14,270 INFO L93 Difference]: Finished difference Result 149 states and 154 transitions. [2018-02-02 09:32:14,270 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-02-02 09:32:14,270 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 54 [2018-02-02 09:32:14,270 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:32:14,270 INFO L225 Difference]: With dead ends: 149 [2018-02-02 09:32:14,270 INFO L226 Difference]: Without dead ends: 145 [2018-02-02 09:32:14,271 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=29, Invalid=127, Unknown=0, NotChecked=0, Total=156 [2018-02-02 09:32:14,271 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 145 states. [2018-02-02 09:32:14,274 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 145 to 145. [2018-02-02 09:32:14,274 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 145 states. [2018-02-02 09:32:14,275 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 145 states to 145 states and 150 transitions. [2018-02-02 09:32:14,275 INFO L78 Accepts]: Start accepts. Automaton has 145 states and 150 transitions. Word has length 54 [2018-02-02 09:32:14,275 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:32:14,275 INFO L432 AbstractCegarLoop]: Abstraction has 145 states and 150 transitions. [2018-02-02 09:32:14,275 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-02-02 09:32:14,275 INFO L276 IsEmpty]: Start isEmpty. Operand 145 states and 150 transitions. [2018-02-02 09:32:14,276 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2018-02-02 09:32:14,276 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:32:14,276 INFO L351 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:32:14,276 INFO L371 AbstractCegarLoop]: === Iteration 16 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-02 09:32:14,276 INFO L82 PathProgramCache]: Analyzing trace with hash 1850180082, now seen corresponding path program 1 times [2018-02-02 09:32:14,276 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 09:32:14,276 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 09:32:14,277 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 09:32:14,277 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-02 09:32:14,277 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 09:32:14,290 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:32:14,291 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:32:14,436 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-02-02 09:32:14,436 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-02 09:32:14,436 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2018-02-02 09:32:14,436 INFO L409 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-02-02 09:32:14,436 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-02-02 09:32:14,437 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=183, Unknown=0, NotChecked=0, Total=210 [2018-02-02 09:32:14,437 INFO L87 Difference]: Start difference. First operand 145 states and 150 transitions. Second operand 15 states. [2018-02-02 09:32:14,683 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:32:14,683 INFO L93 Difference]: Finished difference Result 143 states and 148 transitions. [2018-02-02 09:32:14,683 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-02-02 09:32:14,683 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 65 [2018-02-02 09:32:14,683 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:32:14,684 INFO L225 Difference]: With dead ends: 143 [2018-02-02 09:32:14,684 INFO L226 Difference]: Without dead ends: 143 [2018-02-02 09:32:14,684 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=47, Invalid=333, Unknown=0, NotChecked=0, Total=380 [2018-02-02 09:32:14,684 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 143 states. [2018-02-02 09:32:14,685 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 143 to 143. [2018-02-02 09:32:14,685 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 143 states. [2018-02-02 09:32:14,686 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 143 states to 143 states and 148 transitions. [2018-02-02 09:32:14,686 INFO L78 Accepts]: Start accepts. Automaton has 143 states and 148 transitions. Word has length 65 [2018-02-02 09:32:14,686 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:32:14,686 INFO L432 AbstractCegarLoop]: Abstraction has 143 states and 148 transitions. [2018-02-02 09:32:14,686 INFO L433 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-02-02 09:32:14,686 INFO L276 IsEmpty]: Start isEmpty. Operand 143 states and 148 transitions. [2018-02-02 09:32:14,687 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2018-02-02 09:32:14,687 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:32:14,687 INFO L351 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:32:14,687 INFO L371 AbstractCegarLoop]: === Iteration 17 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-02 09:32:14,687 INFO L82 PathProgramCache]: Analyzing trace with hash 1850180083, now seen corresponding path program 1 times [2018-02-02 09:32:14,687 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 09:32:14,687 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 09:32:14,688 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 09:32:14,688 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-02 09:32:14,688 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 09:32:14,696 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:32:14,697 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:32:14,735 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 09:32:14,735 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-02 09:32:14,735 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-02 09:32:14,739 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-02 09:32:14,765 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:32:14,768 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-02 09:32:14,781 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 09:32:14,800 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-02 09:32:14,801 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9] total 10 [2018-02-02 09:32:14,801 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-02-02 09:32:14,801 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-02-02 09:32:14,801 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=38, Invalid=52, Unknown=0, NotChecked=0, Total=90 [2018-02-02 09:32:14,801 INFO L87 Difference]: Start difference. First operand 143 states and 148 transitions. Second operand 10 states. [2018-02-02 09:32:14,817 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:32:14,817 INFO L93 Difference]: Finished difference Result 146 states and 151 transitions. [2018-02-02 09:32:14,823 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-02-02 09:32:14,823 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 65 [2018-02-02 09:32:14,823 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:32:14,823 INFO L225 Difference]: With dead ends: 146 [2018-02-02 09:32:14,824 INFO L226 Difference]: Without dead ends: 144 [2018-02-02 09:32:14,824 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 74 GetRequests, 65 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=42, Invalid=68, Unknown=0, NotChecked=0, Total=110 [2018-02-02 09:32:14,824 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 144 states. [2018-02-02 09:32:14,826 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 144 to 144. [2018-02-02 09:32:14,826 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 144 states. [2018-02-02 09:32:14,826 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 144 states to 144 states and 149 transitions. [2018-02-02 09:32:14,826 INFO L78 Accepts]: Start accepts. Automaton has 144 states and 149 transitions. Word has length 65 [2018-02-02 09:32:14,827 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:32:14,827 INFO L432 AbstractCegarLoop]: Abstraction has 144 states and 149 transitions. [2018-02-02 09:32:14,827 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-02-02 09:32:14,827 INFO L276 IsEmpty]: Start isEmpty. Operand 144 states and 149 transitions. [2018-02-02 09:32:14,827 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2018-02-02 09:32:14,827 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:32:14,827 INFO L351 BasicCegarLoop]: trace histogram [6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:32:14,827 INFO L371 AbstractCegarLoop]: === Iteration 18 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-02 09:32:14,828 INFO L82 PathProgramCache]: Analyzing trace with hash -1823769198, now seen corresponding path program 2 times [2018-02-02 09:32:14,828 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 09:32:14,828 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 09:32:14,828 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 09:32:14,829 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-02 09:32:14,829 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 09:32:14,838 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:32:14,839 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:32:14,881 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 09:32:14,881 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-02 09:32:14,881 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-02 09:32:14,886 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-02-02 09:32:14,909 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 09:32:14,912 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-02 09:32:14,915 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-02 09:32:14,920 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-02-02 09:32:14,920 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-02 09:32:14,931 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-02-02 09:32:14,931 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-02 09:32:14,942 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-02-02 09:32:14,942 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-02-02 09:32:15,578 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2018-02-02 09:32:15,595 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-02-02 09:32:15,595 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [20] imperfect sequences [10] total 29 [2018-02-02 09:32:15,595 INFO L409 AbstractCegarLoop]: Interpolant automaton has 29 states [2018-02-02 09:32:15,595 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2018-02-02 09:32:15,596 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=107, Invalid=705, Unknown=0, NotChecked=0, Total=812 [2018-02-02 09:32:15,596 INFO L87 Difference]: Start difference. First operand 144 states and 149 transitions. Second operand 29 states. [2018-02-02 09:32:16,758 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:32:16,758 INFO L93 Difference]: Finished difference Result 145 states and 150 transitions. [2018-02-02 09:32:16,758 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2018-02-02 09:32:16,758 INFO L78 Accepts]: Start accepts. Automaton has 29 states. Word has length 66 [2018-02-02 09:32:16,758 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:32:16,759 INFO L225 Difference]: With dead ends: 145 [2018-02-02 09:32:16,759 INFO L226 Difference]: Without dead ends: 143 [2018-02-02 09:32:16,759 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 89 GetRequests, 47 SyntacticMatches, 1 SemanticMatches, 41 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 369 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=227, Invalid=1579, Unknown=0, NotChecked=0, Total=1806 [2018-02-02 09:32:16,759 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 143 states. [2018-02-02 09:32:16,761 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 143 to 143. [2018-02-02 09:32:16,761 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 143 states. [2018-02-02 09:32:16,761 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 143 states to 143 states and 148 transitions. [2018-02-02 09:32:16,761 INFO L78 Accepts]: Start accepts. Automaton has 143 states and 148 transitions. Word has length 66 [2018-02-02 09:32:16,761 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:32:16,761 INFO L432 AbstractCegarLoop]: Abstraction has 143 states and 148 transitions. [2018-02-02 09:32:16,762 INFO L433 AbstractCegarLoop]: Interpolant automaton has 29 states. [2018-02-02 09:32:16,762 INFO L276 IsEmpty]: Start isEmpty. Operand 143 states and 148 transitions. [2018-02-02 09:32:16,762 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2018-02-02 09:32:16,762 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:32:16,762 INFO L351 BasicCegarLoop]: trace histogram [7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:32:16,763 INFO L371 AbstractCegarLoop]: === Iteration 19 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-02 09:32:16,763 INFO L82 PathProgramCache]: Analyzing trace with hash -920668901, now seen corresponding path program 1 times [2018-02-02 09:32:16,763 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 09:32:16,763 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 09:32:16,764 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 09:32:16,764 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-02 09:32:16,764 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 09:32:16,773 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:32:16,774 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:32:16,846 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2018-02-02 09:32:16,846 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-02 09:32:16,847 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2018-02-02 09:32:16,847 INFO L409 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-02-02 09:32:16,847 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-02-02 09:32:16,847 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=133, Unknown=0, NotChecked=0, Total=156 [2018-02-02 09:32:16,847 INFO L87 Difference]: Start difference. First operand 143 states and 148 transitions. Second operand 13 states. [2018-02-02 09:32:16,954 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:32:16,954 INFO L93 Difference]: Finished difference Result 149 states and 153 transitions. [2018-02-02 09:32:16,954 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-02-02 09:32:16,954 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 80 [2018-02-02 09:32:16,955 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:32:16,955 INFO L225 Difference]: With dead ends: 149 [2018-02-02 09:32:16,955 INFO L226 Difference]: Without dead ends: 143 [2018-02-02 09:32:16,956 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=39, Invalid=233, Unknown=0, NotChecked=0, Total=272 [2018-02-02 09:32:16,956 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 143 states. [2018-02-02 09:32:16,958 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 143 to 143. [2018-02-02 09:32:16,958 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 143 states. [2018-02-02 09:32:16,958 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 143 states to 143 states and 147 transitions. [2018-02-02 09:32:16,959 INFO L78 Accepts]: Start accepts. Automaton has 143 states and 147 transitions. Word has length 80 [2018-02-02 09:32:16,959 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:32:16,959 INFO L432 AbstractCegarLoop]: Abstraction has 143 states and 147 transitions. [2018-02-02 09:32:16,959 INFO L433 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-02-02 09:32:16,959 INFO L276 IsEmpty]: Start isEmpty. Operand 143 states and 147 transitions. [2018-02-02 09:32:16,960 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2018-02-02 09:32:16,960 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:32:16,960 INFO L351 BasicCegarLoop]: trace histogram [7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:32:16,960 INFO L371 AbstractCegarLoop]: === Iteration 20 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-02 09:32:16,960 INFO L82 PathProgramCache]: Analyzing trace with hash -773057741, now seen corresponding path program 1 times [2018-02-02 09:32:16,960 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 09:32:16,960 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 09:32:16,961 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 09:32:16,961 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-02 09:32:16,961 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 09:32:16,977 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:32:16,978 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:32:17,225 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2018-02-02 09:32:17,225 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-02 09:32:17,225 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [21] imperfect sequences [] total 21 [2018-02-02 09:32:17,226 INFO L409 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-02-02 09:32:17,226 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-02-02 09:32:17,226 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=43, Invalid=419, Unknown=0, NotChecked=0, Total=462 [2018-02-02 09:32:17,226 INFO L87 Difference]: Start difference. First operand 143 states and 147 transitions. Second operand 22 states. [2018-02-02 09:32:17,638 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:32:17,638 INFO L93 Difference]: Finished difference Result 170 states and 179 transitions. [2018-02-02 09:32:17,639 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-02-02 09:32:17,639 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 93 [2018-02-02 09:32:17,639 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:32:17,639 INFO L225 Difference]: With dead ends: 170 [2018-02-02 09:32:17,640 INFO L226 Difference]: Without dead ends: 170 [2018-02-02 09:32:17,640 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 65 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=75, Invalid=795, Unknown=0, NotChecked=0, Total=870 [2018-02-02 09:32:17,640 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 170 states. [2018-02-02 09:32:17,643 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 170 to 165. [2018-02-02 09:32:17,643 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 165 states. [2018-02-02 09:32:17,644 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 165 states to 165 states and 175 transitions. [2018-02-02 09:32:17,644 INFO L78 Accepts]: Start accepts. Automaton has 165 states and 175 transitions. Word has length 93 [2018-02-02 09:32:17,645 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:32:17,645 INFO L432 AbstractCegarLoop]: Abstraction has 165 states and 175 transitions. [2018-02-02 09:32:17,645 INFO L433 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-02-02 09:32:17,645 INFO L276 IsEmpty]: Start isEmpty. Operand 165 states and 175 transitions. [2018-02-02 09:32:17,646 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2018-02-02 09:32:17,646 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:32:17,646 INFO L351 BasicCegarLoop]: trace histogram [7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:32:17,646 INFO L371 AbstractCegarLoop]: === Iteration 21 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-02 09:32:17,646 INFO L82 PathProgramCache]: Analyzing trace with hash -773057740, now seen corresponding path program 1 times [2018-02-02 09:32:17,647 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 09:32:17,647 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 09:32:17,648 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 09:32:17,648 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-02 09:32:17,648 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 09:32:17,667 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:32:17,668 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:32:17,747 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 09:32:17,747 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-02 09:32:17,747 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-02 09:32:17,755 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-02 09:32:17,799 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:32:17,802 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-02 09:32:17,819 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 09:32:17,837 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-02 09:32:17,837 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11] total 12 [2018-02-02 09:32:17,837 INFO L409 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-02-02 09:32:17,837 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-02-02 09:32:17,837 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=57, Invalid=75, Unknown=0, NotChecked=0, Total=132 [2018-02-02 09:32:17,838 INFO L87 Difference]: Start difference. First operand 165 states and 175 transitions. Second operand 12 states. [2018-02-02 09:32:17,869 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:32:17,869 INFO L93 Difference]: Finished difference Result 168 states and 178 transitions. [2018-02-02 09:32:17,870 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-02-02 09:32:17,870 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 93 [2018-02-02 09:32:17,870 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:32:17,871 INFO L225 Difference]: With dead ends: 168 [2018-02-02 09:32:17,871 INFO L226 Difference]: Without dead ends: 166 [2018-02-02 09:32:17,871 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 104 GetRequests, 93 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=61, Invalid=95, Unknown=0, NotChecked=0, Total=156 [2018-02-02 09:32:17,872 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 166 states. [2018-02-02 09:32:17,875 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 166 to 166. [2018-02-02 09:32:17,875 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 166 states. [2018-02-02 09:32:17,876 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 166 states to 166 states and 176 transitions. [2018-02-02 09:32:17,876 INFO L78 Accepts]: Start accepts. Automaton has 166 states and 176 transitions. Word has length 93 [2018-02-02 09:32:17,876 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:32:17,876 INFO L432 AbstractCegarLoop]: Abstraction has 166 states and 176 transitions. [2018-02-02 09:32:17,876 INFO L433 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-02-02 09:32:17,876 INFO L276 IsEmpty]: Start isEmpty. Operand 166 states and 176 transitions. [2018-02-02 09:32:17,877 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2018-02-02 09:32:17,877 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:32:17,877 INFO L351 BasicCegarLoop]: trace histogram [8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:32:17,877 INFO L371 AbstractCegarLoop]: === Iteration 22 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-02 09:32:17,878 INFO L82 PathProgramCache]: Analyzing trace with hash 572029523, now seen corresponding path program 2 times [2018-02-02 09:32:17,878 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 09:32:17,878 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 09:32:17,879 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 09:32:17,879 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-02 09:32:17,879 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 09:32:17,896 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:32:17,897 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:32:17,982 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 09:32:17,982 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-02 09:32:17,983 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-02 09:32:17,990 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-02-02 09:32:18,033 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 09:32:18,041 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-02 09:32:18,045 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-02 09:32:18,052 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-02-02 09:32:18,052 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-02 09:32:18,065 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-02-02 09:32:18,065 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-02 09:32:18,075 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-02-02 09:32:18,075 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-02-02 09:32:18,812 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2018-02-02 09:32:18,829 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-02-02 09:32:18,829 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [22] imperfect sequences [12] total 33 [2018-02-02 09:32:18,829 INFO L409 AbstractCegarLoop]: Interpolant automaton has 33 states [2018-02-02 09:32:18,829 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 33 interpolants. [2018-02-02 09:32:18,830 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=134, Invalid=922, Unknown=0, NotChecked=0, Total=1056 [2018-02-02 09:32:18,830 INFO L87 Difference]: Start difference. First operand 166 states and 176 transitions. Second operand 33 states. [2018-02-02 09:32:20,228 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:32:20,228 INFO L93 Difference]: Finished difference Result 167 states and 175 transitions. [2018-02-02 09:32:20,228 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2018-02-02 09:32:20,228 INFO L78 Accepts]: Start accepts. Automaton has 33 states. Word has length 94 [2018-02-02 09:32:20,228 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:32:20,229 INFO L225 Difference]: With dead ends: 167 [2018-02-02 09:32:20,229 INFO L226 Difference]: Without dead ends: 165 [2018-02-02 09:32:20,229 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 122 GetRequests, 71 SyntacticMatches, 3 SemanticMatches, 48 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 549 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=300, Invalid=2150, Unknown=0, NotChecked=0, Total=2450 [2018-02-02 09:32:20,229 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 165 states. [2018-02-02 09:32:20,231 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 165 to 165. [2018-02-02 09:32:20,231 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 165 states. [2018-02-02 09:32:20,232 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 165 states to 165 states and 173 transitions. [2018-02-02 09:32:20,232 INFO L78 Accepts]: Start accepts. Automaton has 165 states and 173 transitions. Word has length 94 [2018-02-02 09:32:20,232 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:32:20,232 INFO L432 AbstractCegarLoop]: Abstraction has 165 states and 173 transitions. [2018-02-02 09:32:20,232 INFO L433 AbstractCegarLoop]: Interpolant automaton has 33 states. [2018-02-02 09:32:20,232 INFO L276 IsEmpty]: Start isEmpty. Operand 165 states and 173 transitions. [2018-02-02 09:32:20,233 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 103 [2018-02-02 09:32:20,233 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:32:20,233 INFO L351 BasicCegarLoop]: trace histogram [9, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:32:20,233 INFO L371 AbstractCegarLoop]: === Iteration 23 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-02 09:32:20,233 INFO L82 PathProgramCache]: Analyzing trace with hash 700888674, now seen corresponding path program 1 times [2018-02-02 09:32:20,233 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 09:32:20,233 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 09:32:20,234 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 09:32:20,234 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-02 09:32:20,234 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 09:32:20,243 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:32:20,244 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:32:20,324 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2018-02-02 09:32:20,324 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-02 09:32:20,324 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2018-02-02 09:32:20,325 INFO L409 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-02-02 09:32:20,325 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-02-02 09:32:20,325 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=133, Unknown=0, NotChecked=0, Total=156 [2018-02-02 09:32:20,325 INFO L87 Difference]: Start difference. First operand 165 states and 173 transitions. Second operand 13 states. [2018-02-02 09:32:20,393 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:32:20,393 INFO L93 Difference]: Finished difference Result 169 states and 175 transitions. [2018-02-02 09:32:20,393 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-02-02 09:32:20,393 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 102 [2018-02-02 09:32:20,393 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:32:20,394 INFO L225 Difference]: With dead ends: 169 [2018-02-02 09:32:20,394 INFO L226 Difference]: Without dead ends: 163 [2018-02-02 09:32:20,394 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=39, Invalid=233, Unknown=0, NotChecked=0, Total=272 [2018-02-02 09:32:20,395 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 163 states. [2018-02-02 09:32:20,396 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 163 to 163. [2018-02-02 09:32:20,396 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 163 states. [2018-02-02 09:32:20,397 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 163 states to 163 states and 169 transitions. [2018-02-02 09:32:20,397 INFO L78 Accepts]: Start accepts. Automaton has 163 states and 169 transitions. Word has length 102 [2018-02-02 09:32:20,397 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:32:20,397 INFO L432 AbstractCegarLoop]: Abstraction has 163 states and 169 transitions. [2018-02-02 09:32:20,397 INFO L433 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-02-02 09:32:20,397 INFO L276 IsEmpty]: Start isEmpty. Operand 163 states and 169 transitions. [2018-02-02 09:32:20,398 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 110 [2018-02-02 09:32:20,398 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:32:20,398 INFO L351 BasicCegarLoop]: trace histogram [9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:32:20,398 INFO L371 AbstractCegarLoop]: === Iteration 24 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-02 09:32:20,398 INFO L82 PathProgramCache]: Analyzing trace with hash 1156968532, now seen corresponding path program 1 times [2018-02-02 09:32:20,398 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 09:32:20,398 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 09:32:20,399 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 09:32:20,399 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-02 09:32:20,399 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 09:32:20,410 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:32:20,411 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:32:20,703 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2018-02-02 09:32:20,704 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-02 09:32:20,704 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [24] imperfect sequences [] total 24 [2018-02-02 09:32:20,704 INFO L409 AbstractCegarLoop]: Interpolant automaton has 25 states [2018-02-02 09:32:20,705 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2018-02-02 09:32:20,705 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=47, Invalid=553, Unknown=0, NotChecked=0, Total=600 [2018-02-02 09:32:20,705 INFO L87 Difference]: Start difference. First operand 163 states and 169 transitions. Second operand 25 states. [2018-02-02 09:32:21,103 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:32:21,104 INFO L93 Difference]: Finished difference Result 173 states and 182 transitions. [2018-02-02 09:32:21,104 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2018-02-02 09:32:21,104 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 109 [2018-02-02 09:32:21,104 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:32:21,104 INFO L225 Difference]: With dead ends: 173 [2018-02-02 09:32:21,104 INFO L226 Difference]: Without dead ends: 173 [2018-02-02 09:32:21,105 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 35 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 55 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=91, Invalid=1169, Unknown=0, NotChecked=0, Total=1260 [2018-02-02 09:32:21,105 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 173 states. [2018-02-02 09:32:21,107 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 173 to 169. [2018-02-02 09:32:21,107 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 169 states. [2018-02-02 09:32:21,107 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 169 states to 169 states and 179 transitions. [2018-02-02 09:32:21,107 INFO L78 Accepts]: Start accepts. Automaton has 169 states and 179 transitions. Word has length 109 [2018-02-02 09:32:21,107 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:32:21,107 INFO L432 AbstractCegarLoop]: Abstraction has 169 states and 179 transitions. [2018-02-02 09:32:21,107 INFO L433 AbstractCegarLoop]: Interpolant automaton has 25 states. [2018-02-02 09:32:21,108 INFO L276 IsEmpty]: Start isEmpty. Operand 169 states and 179 transitions. [2018-02-02 09:32:21,108 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 110 [2018-02-02 09:32:21,108 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:32:21,108 INFO L351 BasicCegarLoop]: trace histogram [9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:32:21,108 INFO L371 AbstractCegarLoop]: === Iteration 25 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-02 09:32:21,108 INFO L82 PathProgramCache]: Analyzing trace with hash 1156968533, now seen corresponding path program 1 times [2018-02-02 09:32:21,108 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 09:32:21,108 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 09:32:21,109 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 09:32:21,109 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-02 09:32:21,109 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 09:32:21,119 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:32:21,120 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:32:21,217 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 09:32:21,218 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-02 09:32:21,218 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-02 09:32:21,225 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-02 09:32:21,288 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:32:21,292 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-02 09:32:21,307 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 09:32:21,336 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-02 09:32:21,336 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13] total 14 [2018-02-02 09:32:21,336 INFO L409 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-02-02 09:32:21,337 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-02-02 09:32:21,337 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=80, Invalid=102, Unknown=0, NotChecked=0, Total=182 [2018-02-02 09:32:21,337 INFO L87 Difference]: Start difference. First operand 169 states and 179 transitions. Second operand 14 states. [2018-02-02 09:32:21,362 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:32:21,362 INFO L93 Difference]: Finished difference Result 172 states and 182 transitions. [2018-02-02 09:32:21,362 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-02-02 09:32:21,362 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 109 [2018-02-02 09:32:21,362 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:32:21,363 INFO L225 Difference]: With dead ends: 172 [2018-02-02 09:32:21,363 INFO L226 Difference]: Without dead ends: 170 [2018-02-02 09:32:21,363 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 122 GetRequests, 109 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 26 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=84, Invalid=126, Unknown=0, NotChecked=0, Total=210 [2018-02-02 09:32:21,364 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 170 states. [2018-02-02 09:32:21,366 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 170 to 170. [2018-02-02 09:32:21,366 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 170 states. [2018-02-02 09:32:21,367 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 170 states to 170 states and 180 transitions. [2018-02-02 09:32:21,367 INFO L78 Accepts]: Start accepts. Automaton has 170 states and 180 transitions. Word has length 109 [2018-02-02 09:32:21,367 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:32:21,367 INFO L432 AbstractCegarLoop]: Abstraction has 170 states and 180 transitions. [2018-02-02 09:32:21,367 INFO L433 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-02-02 09:32:21,367 INFO L276 IsEmpty]: Start isEmpty. Operand 170 states and 180 transitions. [2018-02-02 09:32:21,368 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 111 [2018-02-02 09:32:21,368 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:32:21,368 INFO L351 BasicCegarLoop]: trace histogram [10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:32:21,368 INFO L371 AbstractCegarLoop]: === Iteration 26 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-02 09:32:21,368 INFO L82 PathProgramCache]: Analyzing trace with hash -637126284, now seen corresponding path program 2 times [2018-02-02 09:32:21,368 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 09:32:21,368 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 09:32:21,369 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 09:32:21,369 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-02 09:32:21,369 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 09:32:21,386 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:32:21,387 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:32:21,489 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 09:32:21,489 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-02 09:32:21,489 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-02 09:32:21,498 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-02-02 09:32:21,544 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 09:32:21,552 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-02 09:32:21,558 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-02 09:32:21,566 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-02-02 09:32:21,566 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-02 09:32:21,584 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-02-02 09:32:21,584 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-02 09:32:21,598 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-02-02 09:32:21,598 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-02-02 09:32:22,648 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 55 trivial. 0 not checked. [2018-02-02 09:32:22,665 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-02-02 09:32:22,665 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [26] imperfect sequences [14] total 39 [2018-02-02 09:32:22,665 INFO L409 AbstractCegarLoop]: Interpolant automaton has 39 states [2018-02-02 09:32:22,665 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 39 interpolants. [2018-02-02 09:32:22,666 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=173, Invalid=1309, Unknown=0, NotChecked=0, Total=1482 [2018-02-02 09:32:22,666 INFO L87 Difference]: Start difference. First operand 170 states and 180 transitions. Second operand 39 states. [2018-02-02 09:32:24,366 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:32:24,366 INFO L93 Difference]: Finished difference Result 171 states and 180 transitions. [2018-02-02 09:32:24,367 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 39 states. [2018-02-02 09:32:24,367 INFO L78 Accepts]: Start accepts. Automaton has 39 states. Word has length 110 [2018-02-02 09:32:24,367 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:32:24,367 INFO L225 Difference]: With dead ends: 171 [2018-02-02 09:32:24,367 INFO L226 Difference]: Without dead ends: 169 [2018-02-02 09:32:24,368 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 144 GetRequests, 81 SyntacticMatches, 5 SemanticMatches, 58 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 843 ImplicationChecksByTransitivity, 1.6s TimeCoverageRelationStatistics Valid=399, Invalid=3141, Unknown=0, NotChecked=0, Total=3540 [2018-02-02 09:32:24,368 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 169 states. [2018-02-02 09:32:24,369 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 169 to 169. [2018-02-02 09:32:24,369 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 169 states. [2018-02-02 09:32:24,370 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 169 states to 169 states and 178 transitions. [2018-02-02 09:32:24,370 INFO L78 Accepts]: Start accepts. Automaton has 169 states and 178 transitions. Word has length 110 [2018-02-02 09:32:24,370 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:32:24,370 INFO L432 AbstractCegarLoop]: Abstraction has 169 states and 178 transitions. [2018-02-02 09:32:24,370 INFO L433 AbstractCegarLoop]: Interpolant automaton has 39 states. [2018-02-02 09:32:24,370 INFO L276 IsEmpty]: Start isEmpty. Operand 169 states and 178 transitions. [2018-02-02 09:32:24,371 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 116 [2018-02-02 09:32:24,371 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:32:24,371 INFO L351 BasicCegarLoop]: trace histogram [11, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:32:24,371 INFO L371 AbstractCegarLoop]: === Iteration 27 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-02 09:32:24,371 INFO L82 PathProgramCache]: Analyzing trace with hash 1817608758, now seen corresponding path program 1 times [2018-02-02 09:32:24,371 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 09:32:24,371 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 09:32:24,372 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 09:32:24,372 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-02 09:32:24,372 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 09:32:24,382 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:32:24,383 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:32:24,499 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 09:32:24,499 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-02 09:32:24,499 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-02 09:32:24,505 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-02 09:32:24,552 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:32:24,555 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-02 09:32:24,565 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 09:32:24,581 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-02 09:32:24,581 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15] total 16 [2018-02-02 09:32:24,581 INFO L409 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-02-02 09:32:24,582 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-02-02 09:32:24,582 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=107, Invalid=133, Unknown=0, NotChecked=0, Total=240 [2018-02-02 09:32:24,582 INFO L87 Difference]: Start difference. First operand 169 states and 178 transitions. Second operand 16 states. [2018-02-02 09:32:24,602 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:32:24,602 INFO L93 Difference]: Finished difference Result 172 states and 181 transitions. [2018-02-02 09:32:24,603 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-02-02 09:32:24,603 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 115 [2018-02-02 09:32:24,603 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:32:24,603 INFO L225 Difference]: With dead ends: 172 [2018-02-02 09:32:24,603 INFO L226 Difference]: Without dead ends: 170 [2018-02-02 09:32:24,603 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 130 GetRequests, 115 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 32 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=111, Invalid=161, Unknown=0, NotChecked=0, Total=272 [2018-02-02 09:32:24,603 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 170 states. [2018-02-02 09:32:24,605 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 170 to 170. [2018-02-02 09:32:24,605 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 170 states. [2018-02-02 09:32:24,605 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 170 states to 170 states and 179 transitions. [2018-02-02 09:32:24,605 INFO L78 Accepts]: Start accepts. Automaton has 170 states and 179 transitions. Word has length 115 [2018-02-02 09:32:24,605 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:32:24,605 INFO L432 AbstractCegarLoop]: Abstraction has 170 states and 179 transitions. [2018-02-02 09:32:24,605 INFO L433 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-02-02 09:32:24,606 INFO L276 IsEmpty]: Start isEmpty. Operand 170 states and 179 transitions. [2018-02-02 09:32:24,606 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 117 [2018-02-02 09:32:24,606 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:32:24,606 INFO L351 BasicCegarLoop]: trace histogram [12, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:32:24,606 INFO L371 AbstractCegarLoop]: === Iteration 28 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-02 09:32:24,606 INFO L82 PathProgramCache]: Analyzing trace with hash 70072341, now seen corresponding path program 2 times [2018-02-02 09:32:24,606 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 09:32:24,606 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 09:32:24,607 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 09:32:24,607 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-02 09:32:24,607 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 09:32:24,620 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:32:24,621 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:32:24,751 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 09:32:24,751 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-02 09:32:24,751 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-02 09:32:24,759 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-02-02 09:32:24,808 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 09:32:24,819 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-02 09:32:24,826 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-02 09:32:24,900 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-02-02 09:32:24,901 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-02-02 09:32:24,901 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-02 09:32:24,902 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-02 09:32:24,904 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-02 09:32:24,904 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:11, output treesize:7 [2018-02-02 09:32:24,997 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-02-02 09:32:24,999 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-02-02 09:32:25,003 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-02-02 09:32:25,003 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:38, output treesize:26 [2018-02-02 09:32:25,036 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 27 [2018-02-02 09:32:25,038 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:25,040 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 35 [2018-02-02 09:32:25,042 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:25,042 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:25,047 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 37 [2018-02-02 09:32:25,047 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-02-02 09:32:25,057 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-02 09:32:25,059 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-02 09:32:25,062 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-02 09:32:25,062 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 3 variables, input treesize:37, output treesize:9 [2018-02-02 09:32:25,422 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:25,423 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 36 [2018-02-02 09:32:25,424 INFO L682 Elim1Store]: detected equality via solver [2018-02-02 09:32:25,425 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:25,425 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 15 [2018-02-02 09:32:25,425 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-02 09:32:25,427 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-02 09:32:25,429 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-02 09:32:25,429 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:32, output treesize:13 [2018-02-02 09:32:25,811 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2018-02-02 09:32:25,812 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 5 [2018-02-02 09:32:25,812 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-02 09:32:25,813 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-02 09:32:25,813 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-02 09:32:25,813 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:17, output treesize:5 [2018-02-02 09:32:25,857 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 78 trivial. 0 not checked. [2018-02-02 09:32:25,886 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-02-02 09:32:25,886 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [45] imperfect sequences [16] total 59 [2018-02-02 09:32:25,886 INFO L409 AbstractCegarLoop]: Interpolant automaton has 59 states [2018-02-02 09:32:25,886 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 59 interpolants. [2018-02-02 09:32:25,887 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=206, Invalid=3216, Unknown=0, NotChecked=0, Total=3422 [2018-02-02 09:32:25,887 INFO L87 Difference]: Start difference. First operand 170 states and 179 transitions. Second operand 59 states. [2018-02-02 09:32:27,912 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:32:27,912 INFO L93 Difference]: Finished difference Result 166 states and 169 transitions. [2018-02-02 09:32:27,912 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 60 states. [2018-02-02 09:32:27,912 INFO L78 Accepts]: Start accepts. Automaton has 59 states. Word has length 116 [2018-02-02 09:32:27,913 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:32:27,913 INFO L225 Difference]: With dead ends: 166 [2018-02-02 09:32:27,913 INFO L226 Difference]: Without dead ends: 164 [2018-02-02 09:32:27,915 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 156 GetRequests, 74 SyntacticMatches, 0 SemanticMatches, 82 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1190 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=332, Invalid=6640, Unknown=0, NotChecked=0, Total=6972 [2018-02-02 09:32:27,915 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 164 states. [2018-02-02 09:32:27,917 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 164 to 164. [2018-02-02 09:32:27,917 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 164 states. [2018-02-02 09:32:27,918 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 164 states to 164 states and 167 transitions. [2018-02-02 09:32:27,918 INFO L78 Accepts]: Start accepts. Automaton has 164 states and 167 transitions. Word has length 116 [2018-02-02 09:32:27,918 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:32:27,918 INFO L432 AbstractCegarLoop]: Abstraction has 164 states and 167 transitions. [2018-02-02 09:32:27,918 INFO L433 AbstractCegarLoop]: Interpolant automaton has 59 states. [2018-02-02 09:32:27,918 INFO L276 IsEmpty]: Start isEmpty. Operand 164 states and 167 transitions. [2018-02-02 09:32:27,919 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 127 [2018-02-02 09:32:27,919 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:32:27,919 INFO L351 BasicCegarLoop]: trace histogram [13, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:32:27,919 INFO L371 AbstractCegarLoop]: === Iteration 29 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-02 09:32:27,919 INFO L82 PathProgramCache]: Analyzing trace with hash -2129620089, now seen corresponding path program 1 times [2018-02-02 09:32:27,919 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 09:32:27,919 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 09:32:27,920 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 09:32:27,920 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-02 09:32:27,920 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 09:32:27,936 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:32:27,937 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:32:28,146 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 2 proven. 7 refuted. 0 times theorem prover too weak. 91 trivial. 0 not checked. [2018-02-02 09:32:28,146 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-02 09:32:28,146 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-02 09:32:28,150 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-02 09:32:28,199 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:32:28,201 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-02 09:32:28,397 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-02-02 09:32:28,413 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-02 09:32:28,413 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 17] total 36 [2018-02-02 09:32:28,414 INFO L409 AbstractCegarLoop]: Interpolant automaton has 36 states [2018-02-02 09:32:28,414 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2018-02-02 09:32:28,414 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=162, Invalid=1098, Unknown=0, NotChecked=0, Total=1260 [2018-02-02 09:32:28,415 INFO L87 Difference]: Start difference. First operand 164 states and 167 transitions. Second operand 36 states. [2018-02-02 09:32:29,472 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:32:29,473 INFO L93 Difference]: Finished difference Result 179 states and 181 transitions. [2018-02-02 09:32:29,473 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2018-02-02 09:32:29,473 INFO L78 Accepts]: Start accepts. Automaton has 36 states. Word has length 126 [2018-02-02 09:32:29,473 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:32:29,473 INFO L225 Difference]: With dead ends: 179 [2018-02-02 09:32:29,474 INFO L226 Difference]: Without dead ends: 177 [2018-02-02 09:32:29,475 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 184 GetRequests, 118 SyntacticMatches, 0 SemanticMatches, 66 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 586 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=492, Invalid=4064, Unknown=0, NotChecked=0, Total=4556 [2018-02-02 09:32:29,475 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 177 states. [2018-02-02 09:32:29,476 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 177 to 167. [2018-02-02 09:32:29,476 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 167 states. [2018-02-02 09:32:29,477 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 167 states to 167 states and 169 transitions. [2018-02-02 09:32:29,477 INFO L78 Accepts]: Start accepts. Automaton has 167 states and 169 transitions. Word has length 126 [2018-02-02 09:32:29,477 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:32:29,477 INFO L432 AbstractCegarLoop]: Abstraction has 167 states and 169 transitions. [2018-02-02 09:32:29,477 INFO L433 AbstractCegarLoop]: Interpolant automaton has 36 states. [2018-02-02 09:32:29,477 INFO L276 IsEmpty]: Start isEmpty. Operand 167 states and 169 transitions. [2018-02-02 09:32:29,477 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 142 [2018-02-02 09:32:29,477 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:32:29,478 INFO L351 BasicCegarLoop]: trace histogram [14, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:32:29,478 INFO L371 AbstractCegarLoop]: === Iteration 30 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-02 09:32:29,478 INFO L82 PathProgramCache]: Analyzing trace with hash 1333200073, now seen corresponding path program 1 times [2018-02-02 09:32:29,478 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 09:32:29,478 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 09:32:29,478 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 09:32:29,479 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-02 09:32:29,479 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 09:32:29,489 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:32:29,490 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:32:29,773 INFO L134 CoverageAnalysis]: Checked inductivity of 121 backedges. 0 proven. 9 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2018-02-02 09:32:29,774 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-02 09:32:29,805 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-02 09:32:29,809 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-02 09:32:29,884 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:32:29,889 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-02 09:32:30,150 INFO L134 CoverageAnalysis]: Checked inductivity of 121 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-02-02 09:32:30,166 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-02 09:32:30,167 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 18] total 40 [2018-02-02 09:32:30,167 INFO L409 AbstractCegarLoop]: Interpolant automaton has 40 states [2018-02-02 09:32:30,167 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 40 interpolants. [2018-02-02 09:32:30,167 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=182, Invalid=1378, Unknown=0, NotChecked=0, Total=1560 [2018-02-02 09:32:30,167 INFO L87 Difference]: Start difference. First operand 167 states and 169 transitions. Second operand 40 states. [2018-02-02 09:32:31,303 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:32:31,303 INFO L93 Difference]: Finished difference Result 179 states and 181 transitions. [2018-02-02 09:32:31,304 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 40 states. [2018-02-02 09:32:31,304 INFO L78 Accepts]: Start accepts. Automaton has 40 states. Word has length 141 [2018-02-02 09:32:31,304 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:32:31,304 INFO L225 Difference]: With dead ends: 179 [2018-02-02 09:32:31,304 INFO L226 Difference]: Without dead ends: 177 [2018-02-02 09:32:31,306 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 206 GetRequests, 132 SyntacticMatches, 0 SemanticMatches, 74 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 633 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=558, Invalid=5142, Unknown=0, NotChecked=0, Total=5700 [2018-02-02 09:32:31,306 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 177 states. [2018-02-02 09:32:31,307 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 177 to 167. [2018-02-02 09:32:31,307 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 167 states. [2018-02-02 09:32:31,307 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 167 states to 167 states and 169 transitions. [2018-02-02 09:32:31,308 INFO L78 Accepts]: Start accepts. Automaton has 167 states and 169 transitions. Word has length 141 [2018-02-02 09:32:31,308 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:32:31,308 INFO L432 AbstractCegarLoop]: Abstraction has 167 states and 169 transitions. [2018-02-02 09:32:31,308 INFO L433 AbstractCegarLoop]: Interpolant automaton has 40 states. [2018-02-02 09:32:31,308 INFO L276 IsEmpty]: Start isEmpty. Operand 167 states and 169 transitions. [2018-02-02 09:32:31,308 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 147 [2018-02-02 09:32:31,308 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:32:31,309 INFO L351 BasicCegarLoop]: trace histogram [15, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:32:31,309 INFO L371 AbstractCegarLoop]: === Iteration 31 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-02 09:32:31,309 INFO L82 PathProgramCache]: Analyzing trace with hash -1992522262, now seen corresponding path program 1 times [2018-02-02 09:32:31,309 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 09:32:31,309 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 09:32:31,310 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 09:32:31,310 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-02 09:32:31,310 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 09:32:31,323 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:32:31,324 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:32:31,471 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 9 proven. 120 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-02-02 09:32:31,471 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-02 09:32:31,471 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-02 09:32:31,476 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-02 09:32:31,521 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:32:31,524 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-02 09:32:31,539 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-02-02 09:32:31,555 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-02 09:32:31,555 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19] total 20 [2018-02-02 09:32:31,555 INFO L409 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-02-02 09:32:31,555 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-02-02 09:32:31,555 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=173, Invalid=207, Unknown=0, NotChecked=0, Total=380 [2018-02-02 09:32:31,555 INFO L87 Difference]: Start difference. First operand 167 states and 169 transitions. Second operand 20 states. [2018-02-02 09:32:31,580 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:32:31,580 INFO L93 Difference]: Finished difference Result 170 states and 172 transitions. [2018-02-02 09:32:31,580 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-02-02 09:32:31,581 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 146 [2018-02-02 09:32:31,581 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:32:31,581 INFO L225 Difference]: With dead ends: 170 [2018-02-02 09:32:31,581 INFO L226 Difference]: Without dead ends: 168 [2018-02-02 09:32:31,581 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 165 GetRequests, 146 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 44 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=177, Invalid=243, Unknown=0, NotChecked=0, Total=420 [2018-02-02 09:32:31,582 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 168 states. [2018-02-02 09:32:31,583 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 168 to 168. [2018-02-02 09:32:31,583 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 168 states. [2018-02-02 09:32:31,583 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 168 states to 168 states and 170 transitions. [2018-02-02 09:32:31,583 INFO L78 Accepts]: Start accepts. Automaton has 168 states and 170 transitions. Word has length 146 [2018-02-02 09:32:31,583 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:32:31,583 INFO L432 AbstractCegarLoop]: Abstraction has 168 states and 170 transitions. [2018-02-02 09:32:31,583 INFO L433 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-02-02 09:32:31,583 INFO L276 IsEmpty]: Start isEmpty. Operand 168 states and 170 transitions. [2018-02-02 09:32:31,584 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 148 [2018-02-02 09:32:31,584 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:32:31,584 INFO L351 BasicCegarLoop]: trace histogram [16, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:32:31,584 INFO L371 AbstractCegarLoop]: === Iteration 32 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-02 09:32:31,584 INFO L82 PathProgramCache]: Analyzing trace with hash 903271467, now seen corresponding path program 2 times [2018-02-02 09:32:31,584 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 09:32:31,584 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 09:32:31,585 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 09:32:31,585 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-02 09:32:31,585 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 09:32:31,646 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:32:31,647 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:32:36,126 INFO L134 CoverageAnalysis]: Checked inductivity of 152 backedges. 16 proven. 129 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-02-02 09:32:36,126 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-02 09:32:36,126 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-02 09:32:36,131 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-02-02 09:32:36,162 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 09:32:36,185 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 09:32:36,192 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-02 09:32:36,200 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-02 09:32:36,470 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-02-02 09:32:36,472 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-02-02 09:32:36,473 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-02 09:32:36,474 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-02 09:32:36,477 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-02 09:32:36,477 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:20, output treesize:16 [2018-02-02 09:32:36,539 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 20 [2018-02-02 09:32:36,541 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:36,541 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 27 [2018-02-02 09:32:36,541 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-02 09:32:36,545 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-02 09:32:36,550 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-02 09:32:36,550 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:31, output treesize:27 [2018-02-02 09:32:36,623 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 29 [2018-02-02 09:32:36,625 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:36,625 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:36,626 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:36,626 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 52 [2018-02-02 09:32:36,626 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-02 09:32:36,633 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-02 09:32:36,638 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-02 09:32:36,638 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:42, output treesize:38 [2018-02-02 09:32:36,718 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 38 [2018-02-02 09:32:36,720 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:36,721 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:36,721 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:36,722 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:36,723 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:36,723 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:36,724 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 6 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 85 [2018-02-02 09:32:36,724 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-02 09:32:36,734 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-02 09:32:36,741 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-02 09:32:36,742 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:53, output treesize:49 [2018-02-02 09:32:36,827 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 58 treesize of output 47 [2018-02-02 09:32:36,828 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:36,829 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:36,829 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:36,830 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:36,830 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:36,831 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:36,831 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:36,832 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:36,832 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:36,833 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:36,833 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 10 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 126 [2018-02-02 09:32:36,833 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-02 09:32:36,846 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-02 09:32:36,853 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-02 09:32:36,853 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:64, output treesize:60 [2018-02-02 09:32:36,948 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 69 treesize of output 56 [2018-02-02 09:32:36,954 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:36,955 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:36,955 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:36,956 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:36,956 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:36,957 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:36,957 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:36,958 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:36,958 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:36,959 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:36,959 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:36,960 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:36,960 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:36,961 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:36,961 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:36,962 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 5 select indices, 5 select index equivalence classes, 15 disjoint index pairs (out of 10 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 56 treesize of output 175 [2018-02-02 09:32:36,962 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-02 09:32:36,993 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-02 09:32:37,002 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-02 09:32:37,002 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:75, output treesize:71 [2018-02-02 09:32:37,092 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 80 treesize of output 65 [2018-02-02 09:32:37,100 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,100 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,101 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,102 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,103 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,103 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,104 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,105 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,105 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,106 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,107 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,107 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,108 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,108 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,109 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,109 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,110 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,110 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,111 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,111 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,112 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,113 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 6 select indices, 6 select index equivalence classes, 21 disjoint index pairs (out of 15 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 65 treesize of output 232 [2018-02-02 09:32:37,113 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-02 09:32:37,142 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-02 09:32:37,151 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-02 09:32:37,152 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:86, output treesize:82 [2018-02-02 09:32:37,249 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 91 treesize of output 74 [2018-02-02 09:32:37,252 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,253 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,253 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,254 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,254 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,255 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,255 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,256 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,265 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,266 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,267 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,267 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,268 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,268 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,269 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,269 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,270 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,270 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,271 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,271 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,272 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,272 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,273 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,273 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,273 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,274 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,274 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,275 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,276 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 7 select indices, 7 select index equivalence classes, 28 disjoint index pairs (out of 21 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 74 treesize of output 297 [2018-02-02 09:32:37,276 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-02 09:32:37,315 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-02 09:32:37,327 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-02 09:32:37,327 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:97, output treesize:93 [2018-02-02 09:32:37,436 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 102 treesize of output 83 [2018-02-02 09:32:37,438 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,438 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,439 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,439 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,440 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,440 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,441 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,441 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,442 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,442 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,442 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,443 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,443 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,444 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,444 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,445 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,445 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,446 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,446 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,446 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,447 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,447 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,448 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,448 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,449 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,449 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,449 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,450 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,450 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,451 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,451 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,452 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,452 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,452 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,453 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,453 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,454 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 8 select indices, 8 select index equivalence classes, 36 disjoint index pairs (out of 28 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 83 treesize of output 370 [2018-02-02 09:32:37,455 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-02 09:32:37,520 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-02 09:32:37,533 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-02 09:32:37,533 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:108, output treesize:104 [2018-02-02 09:32:37,649 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 113 treesize of output 92 [2018-02-02 09:32:37,656 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,657 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,658 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,659 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,660 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,660 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,661 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,662 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,662 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,663 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,663 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,664 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,665 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,666 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,666 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,667 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,667 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,668 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,669 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,669 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,670 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,671 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,671 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,672 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,672 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,673 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,674 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,674 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,675 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,675 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,677 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,678 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,679 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,679 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,680 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,681 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,681 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,682 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,682 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,683 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,684 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,684 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,685 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,686 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,686 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,687 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 9 select indices, 9 select index equivalence classes, 45 disjoint index pairs (out of 36 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 92 treesize of output 451 [2018-02-02 09:32:37,688 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-02 09:32:37,763 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-02 09:32:37,778 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-02 09:32:37,778 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:119, output treesize:115 [2018-02-02 09:32:37,899 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 124 treesize of output 101 [2018-02-02 09:32:37,904 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,905 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,905 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,906 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,907 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,908 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,908 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,909 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,910 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,910 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,911 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,912 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,919 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,920 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,920 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,921 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,922 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,923 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,924 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,924 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,925 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,926 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,927 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,927 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,928 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,929 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,930 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,930 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,931 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,932 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,933 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,933 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,934 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,935 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,936 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,937 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,937 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,938 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,939 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,940 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,940 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,941 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,942 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,943 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,943 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,944 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,945 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,946 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,947 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,947 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,948 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,949 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,949 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,950 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,951 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:37,953 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 10 select indices, 10 select index equivalence classes, 55 disjoint index pairs (out of 45 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 101 treesize of output 540 [2018-02-02 09:32:37,953 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-02 09:32:38,048 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-02 09:32:38,067 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-02 09:32:38,068 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:130, output treesize:126 [2018-02-02 09:32:38,222 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 135 treesize of output 110 [2018-02-02 09:32:38,229 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,229 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,230 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,231 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,232 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,233 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,233 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,234 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,235 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,235 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,236 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,237 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,237 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,238 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,239 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,239 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,240 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,241 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,241 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,242 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,243 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,244 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,244 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,245 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,246 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,246 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,247 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,248 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,249 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,249 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,250 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,251 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,251 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,252 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,253 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,253 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,254 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,255 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,255 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,256 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,257 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,257 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,258 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,259 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,259 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,260 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,261 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,261 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,262 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,263 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,264 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,264 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,265 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,266 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,266 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,267 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,268 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,269 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,269 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,270 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,271 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,272 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,272 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,273 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,274 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,274 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,275 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 11 select indices, 11 select index equivalence classes, 66 disjoint index pairs (out of 55 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 110 treesize of output 637 [2018-02-02 09:32:38,276 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-02 09:32:38,393 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-02 09:32:38,411 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-02 09:32:38,411 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:141, output treesize:137 [2018-02-02 09:32:38,544 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 146 treesize of output 119 [2018-02-02 09:32:38,547 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,548 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,549 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,550 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,550 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,551 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,552 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,553 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,553 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,554 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,555 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,556 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,557 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,558 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,558 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,559 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,560 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,560 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,561 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,562 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,563 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,563 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,564 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,565 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,565 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,566 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,566 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,567 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,568 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,568 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,569 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,570 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,570 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,571 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,572 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,572 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,573 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,574 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,574 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,575 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,576 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,577 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,578 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,578 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,579 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,580 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,581 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,582 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,582 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,583 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,584 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,585 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,586 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,587 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,587 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,588 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,589 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,590 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,590 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,591 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,592 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,592 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,593 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,594 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,595 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,595 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,596 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,597 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,598 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,598 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,599 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,600 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,600 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,601 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,601 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,602 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,603 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,603 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,605 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 12 select indices, 12 select index equivalence classes, 78 disjoint index pairs (out of 66 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 119 treesize of output 742 [2018-02-02 09:32:38,605 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-02 09:32:38,770 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-02 09:32:38,791 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-02 09:32:38,791 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:152, output treesize:148 [2018-02-02 09:32:38,923 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 157 treesize of output 128 [2018-02-02 09:32:38,927 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,927 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,928 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,929 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,930 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,930 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,931 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,932 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,933 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,934 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,934 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,935 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,936 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,937 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,937 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,938 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,939 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,940 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,941 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,941 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,942 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,943 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,944 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,944 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,945 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,946 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,947 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,947 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,948 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,949 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,949 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,950 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,951 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,952 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,952 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,953 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,954 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,955 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,955 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,956 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,957 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,958 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,958 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,959 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,960 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,961 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,961 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,962 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,963 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,964 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,964 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,965 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,966 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,966 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,967 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,968 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,968 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,969 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,970 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,970 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,971 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,972 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,973 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,973 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,974 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,975 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,976 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,976 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,977 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,978 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,978 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,979 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,980 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,981 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,981 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,982 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,983 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,984 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,984 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,985 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,986 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,987 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,987 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,988 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,989 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,989 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,990 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,991 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,991 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,992 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,993 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:38,995 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 13 select indices, 13 select index equivalence classes, 91 disjoint index pairs (out of 78 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 128 treesize of output 855 [2018-02-02 09:32:38,996 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-02 09:32:39,194 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-02 09:32:39,219 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-02-02 09:32:39,219 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:168, output treesize:164 [2018-02-02 09:32:39,378 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 168 treesize of output 137 [2018-02-02 09:32:39,382 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:39,383 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:39,384 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:39,384 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:39,385 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:39,386 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:39,386 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:39,387 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:39,388 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:39,389 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:39,389 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:39,390 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:39,391 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:39,392 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:39,392 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:39,393 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:39,394 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:39,395 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:39,395 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:39,396 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:39,397 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:39,397 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:39,398 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:39,399 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:39,400 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:39,400 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:39,401 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:39,402 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:39,403 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:39,404 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:39,404 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:39,405 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:39,406 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:39,407 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:39,407 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:39,408 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:39,409 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:39,410 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:39,411 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:39,411 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:39,412 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:39,413 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:39,414 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:39,414 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:39,415 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:39,416 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:39,416 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:39,417 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:39,418 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:39,418 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:39,419 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:39,420 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:39,421 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:39,422 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:39,422 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:39,423 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:39,424 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:39,425 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:39,425 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:39,426 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:39,427 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:39,428 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:39,429 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:39,429 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:39,430 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:39,431 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:39,432 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:39,433 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:39,434 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:39,434 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:39,435 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:39,436 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:39,436 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:39,437 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:39,438 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:39,438 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:39,439 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:39,440 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:39,441 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:39,441 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:39,442 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:39,443 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:39,444 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:39,444 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:39,445 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:39,446 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:39,447 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:39,447 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:39,448 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:39,449 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:39,449 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:39,450 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:39,451 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:39,451 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:39,452 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:39,453 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:39,454 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:39,455 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:39,456 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:39,456 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:39,457 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:39,458 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:39,459 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:39,459 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:39,460 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:39,462 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 14 select indices, 14 select index equivalence classes, 105 disjoint index pairs (out of 91 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 137 treesize of output 976 [2018-02-02 09:32:39,463 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-02 09:32:39,732 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-02 09:32:39,761 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-02-02 09:32:39,762 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:184, output treesize:180 [2018-02-02 09:32:39,978 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 179 treesize of output 146 [2018-02-02 09:32:39,987 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:39,988 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:39,989 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:39,990 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:39,991 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:39,992 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:39,993 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:39,994 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:39,996 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:39,998 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:39,999 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:40,000 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:40,001 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:40,002 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:40,003 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:40,004 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:40,005 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:40,006 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:40,007 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:40,008 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:40,009 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:40,010 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:40,011 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:40,012 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:40,012 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:40,013 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:40,014 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:40,016 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:40,017 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:40,018 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:40,019 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:40,020 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:40,021 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:40,022 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:40,023 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:40,025 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:40,026 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:40,027 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:40,027 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:40,028 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:40,050 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:40,051 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:40,052 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:40,053 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:40,054 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:40,054 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:40,055 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:40,056 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:40,057 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:40,058 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:40,059 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:40,060 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:40,061 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:40,062 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:40,062 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:40,063 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:40,064 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:40,065 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:40,066 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:40,067 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:40,067 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:40,068 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:40,069 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:40,070 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:40,071 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:40,072 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:40,073 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:40,073 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:40,074 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:40,075 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:40,076 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:40,076 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:40,077 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:40,078 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:40,079 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:40,080 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:40,080 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:40,081 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:40,082 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:40,083 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:40,084 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:40,085 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:40,086 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:40,087 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:40,087 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:40,088 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:40,089 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:40,090 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:40,090 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:40,091 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:40,092 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:40,093 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:40,093 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:40,094 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:40,095 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:40,096 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:40,096 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:40,097 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:40,098 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:40,099 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:40,100 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:40,100 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:40,101 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:40,102 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:40,103 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:40,104 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:40,105 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:40,106 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:40,107 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:40,108 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:40,109 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:40,110 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:40,111 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:40,111 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:40,113 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:40,113 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:40,115 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:40,115 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:40,116 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:40,117 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:40,118 INFO L303 Elim1Store]: Index analysis took 135 ms [2018-02-02 09:32:40,119 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 15 select indices, 15 select index equivalence classes, 120 disjoint index pairs (out of 105 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 146 treesize of output 1105 [2018-02-02 09:32:40,121 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-02 09:32:40,444 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-02 09:32:40,475 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 3 dim-0 vars, and 1 xjuncts. [2018-02-02 09:32:40,475 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:195, output treesize:191 [2018-02-02 09:32:41,320 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-02-02 09:32:41,347 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-02-02 09:32:41,358 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 3 dim-0 vars, and 1 xjuncts. [2018-02-02 09:32:41,358 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:52, output treesize:40 [2018-02-02 09:32:41,735 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:41,736 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 162 treesize of output 142 [2018-02-02 09:32:41,751 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:41,753 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:41,756 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:41,758 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:41,760 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:41,763 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:41,765 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:41,768 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:41,770 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:41,773 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:41,777 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:41,780 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:41,782 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:41,785 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:41,787 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:41,790 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:41,793 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:41,795 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:41,797 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:41,800 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:41,802 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:41,804 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:41,806 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:41,809 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:41,812 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:41,820 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:41,822 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:41,825 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:41,828 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:41,831 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:41,833 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:41,833 INFO L682 Elim1Store]: detected equality via solver [2018-02-02 09:32:41,836 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:41,838 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:41,840 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:41,843 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:41,846 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:41,848 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:41,850 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:41,852 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:41,855 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:41,858 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:41,860 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:41,863 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:41,866 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:41,868 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:41,872 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:41,874 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:41,876 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:41,879 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:41,881 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:41,884 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:41,886 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:41,890 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:41,893 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:41,896 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:41,898 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:41,901 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:41,904 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:41,907 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:41,910 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:41,912 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:41,915 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:41,917 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:41,920 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:41,922 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:41,925 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:41,928 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:41,933 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:41,936 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:41,938 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:41,940 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:41,943 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:41,945 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:41,947 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:41,949 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:41,952 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:41,954 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:41,956 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:41,958 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:41,961 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:41,963 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:41,965 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:41,968 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:41,971 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:41,974 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:41,976 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:41,979 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:41,982 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:41,984 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:41,986 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:41,989 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:41,991 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:41,993 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:41,995 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:41,996 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:41,999 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,001 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,002 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,004 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,005 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,007 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,011 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,013 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,014 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,016 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,018 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,020 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,021 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,022 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,024 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,026 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,028 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,030 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,031 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,033 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,035 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,036 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,041 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,043 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,047 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,048 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,050 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,051 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,053 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,054 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,056 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,057 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,059 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,060 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,062 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,064 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,066 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,068 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,070 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,071 INFO L682 Elim1Store]: detected equality via solver [2018-02-02 09:32:42,117 INFO L303 Elim1Store]: Index analysis took 377 ms [2018-02-02 09:32:42,161 INFO L477 Elim1Store]: Elim1 applied some preprocessing eliminated variable of array dimension 1, 1 stores, 17 select indices, 17 select index equivalence classes, 134 disjoint index pairs (out of 136 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 142 treesize of output 1166 [2018-02-02 09:32:42,182 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,183 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,187 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,188 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,189 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,190 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,191 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,193 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,195 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,196 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,197 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,198 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,199 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,200 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,201 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,203 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,204 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,205 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,206 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,207 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,208 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,210 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,211 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,212 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,213 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,214 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,215 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,216 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,217 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,219 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,220 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,221 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,222 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,223 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,224 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,225 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,227 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,228 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,229 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,230 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,231 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,232 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,233 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,234 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,236 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,237 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,238 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,239 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,240 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,241 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,242 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,243 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,245 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,246 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,247 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,248 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,249 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,250 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,251 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,253 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,254 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,255 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,256 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,257 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,258 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,259 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,260 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,261 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,262 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,264 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,265 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,266 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,267 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,268 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,269 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,270 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,272 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,273 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,275 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,276 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,278 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,280 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,282 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,283 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,284 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,285 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,286 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,288 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,289 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,290 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,291 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,292 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,293 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,294 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,296 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,297 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,298 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,299 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,301 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,302 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,303 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,304 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,306 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,307 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,308 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,309 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,310 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,311 INFO L682 Elim1Store]: detected equality via solver [2018-02-02 09:32:42,312 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,313 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,314 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,316 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,317 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,318 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,319 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,320 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,321 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,323 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,324 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,325 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,326 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,327 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,329 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,330 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,331 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,332 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,333 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,334 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,336 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,337 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,338 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,340 INFO L303 Elim1Store]: Index analysis took 163 ms [2018-02-02 09:32:42,342 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 16 select indices, 16 select index equivalence classes, 123 disjoint index pairs (out of 120 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 1093 treesize of output 1200 [2018-02-02 09:32:42,801 WARN L146 SmtUtils]: Spent 456ms on a formula simplification. DAG size of input: 205 DAG size of output 155 [2018-02-02 09:32:42,807 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,808 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,809 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,809 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,810 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,811 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,812 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,812 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,813 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,814 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,815 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,815 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,816 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,817 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,817 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,818 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,819 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,820 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,820 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,821 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,822 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,822 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,823 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,824 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,825 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,825 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,826 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,827 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,827 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,828 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,829 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,830 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,830 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,831 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,832 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,832 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,833 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,834 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,835 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,835 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,836 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,837 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,837 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,838 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,839 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,840 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,841 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,841 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,842 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,843 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,843 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,844 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,845 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,846 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,846 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,847 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,848 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,849 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,849 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,850 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,851 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,852 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,852 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,853 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,854 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,854 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,855 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,856 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,857 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,857 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,858 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,859 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,859 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,860 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,861 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,862 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,862 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,863 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,864 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,865 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,865 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,866 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,867 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,867 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,868 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,869 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,870 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,870 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,871 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,872 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,872 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,873 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,874 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,875 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,875 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,876 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,877 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,878 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,878 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,879 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,880 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,881 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,881 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,882 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,882 INFO L682 Elim1Store]: detected equality via solver [2018-02-02 09:32:42,883 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:42,887 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 16 select indices, 16 select index equivalence classes, 122 disjoint index pairs (out of 120 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 141 treesize of output 1210 [2018-02-02 09:32:42,888 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-02-02 09:32:43,393 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-02 09:32:43,830 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:43,831 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:43,833 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:43,834 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:43,835 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:43,837 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:43,838 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:43,839 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:43,841 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:43,842 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:43,843 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:43,845 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:43,846 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:43,848 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:43,849 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:43,851 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:43,852 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:43,854 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:43,856 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:43,857 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:43,858 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:43,859 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:43,861 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:43,861 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:43,863 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:43,865 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:43,866 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:43,867 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:43,868 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:43,870 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:43,871 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:43,872 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:43,873 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:43,874 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:43,875 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:43,876 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:43,877 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:43,879 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:43,880 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:43,881 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:43,887 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:43,888 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:43,889 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:43,891 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:43,892 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:43,893 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:43,894 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:43,895 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:43,897 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:43,898 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:43,899 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:43,900 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:43,902 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:43,903 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:43,905 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:43,906 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:43,907 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:43,908 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:43,910 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:43,911 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:43,912 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:43,913 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:43,914 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:43,915 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:43,916 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:43,918 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:43,919 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:43,920 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:43,921 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:43,922 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:43,924 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:43,925 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:43,926 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:43,927 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:43,929 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:43,930 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:43,932 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:43,933 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:43,934 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:43,936 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:43,937 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:43,938 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:43,939 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:43,940 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:43,941 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:43,942 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:43,944 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:43,945 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:43,946 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:43,947 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:43,949 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:43,950 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:43,951 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:43,952 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:43,953 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:43,955 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:43,956 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:43,957 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:43,958 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:43,959 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:43,960 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:43,961 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:43,963 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:43,964 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:43,965 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:43,966 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:43,967 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:43,968 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:43,970 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:43,971 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:43,972 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:43,974 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:43,975 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:43,976 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:43,977 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:43,978 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:43,979 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:43,982 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:43,983 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:43,985 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:43,986 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:43,987 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:43,988 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:43,988 INFO L682 Elim1Store]: detected equality via solver [2018-02-02 09:32:43,990 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:43,991 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:43,992 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:43,996 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:43,997 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:44,000 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:44,001 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:44,002 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:44,003 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:44,004 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:44,005 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:44,006 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:44,008 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:44,009 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:44,010 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:44,011 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:44,012 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:44,013 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:44,015 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:44,016 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:44,020 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:44,054 INFO L303 Elim1Store]: Index analysis took 226 ms [2018-02-02 09:32:44,070 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 17 select indices, 17 select index equivalence classes, 135 disjoint index pairs (out of 136 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 143 treesize of output 1252 [2018-02-02 09:32:45,268 WARN L146 SmtUtils]: Spent 1191ms on a formula simplification. DAG size of input: 274 DAG size of output 201 [2018-02-02 09:32:45,274 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:45,275 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:45,276 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:45,276 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:45,277 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:45,278 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:45,279 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:45,280 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:45,280 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:45,281 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:45,282 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:45,283 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:45,283 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:45,284 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:45,285 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:45,286 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:45,286 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:45,287 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:45,288 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:45,289 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:45,289 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:45,290 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:45,291 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:45,292 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:45,292 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:45,293 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:45,294 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:45,295 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:45,295 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:45,296 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:45,297 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:45,298 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:45,298 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:45,299 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:45,300 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:45,301 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:45,301 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:45,302 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:45,303 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:45,304 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:45,305 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:45,305 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:45,306 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:45,307 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:45,308 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:45,308 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:45,309 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:45,310 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:45,311 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:45,311 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:45,312 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:45,313 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:45,314 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:45,314 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:45,315 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:45,316 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:45,317 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:45,317 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:45,318 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:45,319 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:45,320 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:45,320 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:45,321 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:45,322 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:45,322 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:45,323 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:45,324 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:45,325 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:45,326 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:45,326 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:45,327 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:45,328 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:45,329 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:45,329 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:45,330 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:45,331 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:45,332 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:45,332 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:45,333 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:45,334 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:45,335 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:45,336 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:45,336 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:45,337 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:45,338 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:45,339 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:45,340 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:45,340 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:45,341 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:45,342 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:45,343 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:45,343 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:45,344 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:45,345 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:45,345 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:45,346 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:45,347 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:45,348 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:45,348 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:45,349 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:45,350 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:45,351 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:45,351 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:45,352 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:45,353 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:45,354 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:45,354 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:45,355 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:45,356 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:45,357 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:45,357 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:45,358 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:45,359 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:45,360 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:45,361 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:45,361 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:45,362 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:45,363 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:45,363 INFO L682 Elim1Store]: detected equality via solver [2018-02-02 09:32:45,364 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:45,382 INFO L303 Elim1Store]: Index analysis took 111 ms [2018-02-02 09:32:45,383 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 16 select indices, 16 select index equivalence classes, 121 disjoint index pairs (out of 120 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 291 treesize of output 1332 [2018-02-02 09:32:45,385 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-02-02 09:32:46,041 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:46,042 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:46,043 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:46,044 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:46,046 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:46,047 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:46,048 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:46,050 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:46,051 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:46,052 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:46,053 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:46,054 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:46,056 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:46,057 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:46,058 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:46,059 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:46,059 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:46,061 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:46,062 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:46,063 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:46,064 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:46,065 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:46,067 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:46,068 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:46,069 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:46,071 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:46,072 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:46,073 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:46,074 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:46,075 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:46,076 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:46,077 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:46,079 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:46,080 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:46,081 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:46,082 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:46,083 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:46,085 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:46,086 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:46,087 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:46,088 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:46,089 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:46,091 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:46,092 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:46,093 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:46,095 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:46,096 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:46,097 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:46,098 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:46,099 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:46,100 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:46,101 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:46,102 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:46,103 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:46,105 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:46,106 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:46,107 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:46,108 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:46,109 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:46,110 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:46,111 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:46,112 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:46,114 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:46,115 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:46,116 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:46,117 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:46,118 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:46,119 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:46,120 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:46,121 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:46,122 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:46,124 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:46,125 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:46,126 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:46,127 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:46,128 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:46,129 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:46,130 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:46,132 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:46,133 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:46,134 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:46,135 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:46,136 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:46,138 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:46,139 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:46,140 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:46,141 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:46,143 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:46,144 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:46,145 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:46,146 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:46,147 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:46,148 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:46,149 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:46,150 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:46,151 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:46,152 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:46,153 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:46,154 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:46,156 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:46,157 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:46,158 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:46,159 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:46,160 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:46,161 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:46,162 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:46,163 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:46,164 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:46,165 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:46,167 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:46,168 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:46,168 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:46,170 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:46,171 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:46,172 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:46,173 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:46,174 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:46,179 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:46,179 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:46,180 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:46,183 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:46,200 INFO L303 Elim1Store]: Index analysis took 163 ms [2018-02-02 09:32:46,202 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 16 select indices, 16 select index equivalence classes, 121 disjoint index pairs (out of 120 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 122 treesize of output 1146 [2018-02-02 09:32:46,203 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 1 xjuncts. [2018-02-02 09:32:46,590 INFO L267 ElimStorePlain]: Start of recursive call 6: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-02-02 09:32:46,662 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: and 3 xjuncts. [2018-02-02 09:32:46,699 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-02 09:32:46,734 INFO L267 ElimStorePlain]: Start of recursive call 1: 6 dim-0 vars, 1 dim-2 vars, End of recursive call: 4 dim-0 vars, and 1 xjuncts. [2018-02-02 09:32:46,734 INFO L202 ElimStorePlain]: Needed 8 recursive calls to eliminate 7 variables, input treesize:201, output treesize:161 [2018-02-02 09:32:47,947 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 151 treesize of output 118 [2018-02-02 09:32:47,951 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:47,952 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:47,953 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:47,954 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:47,954 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:47,955 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:47,956 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:47,957 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:47,958 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:47,959 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:47,960 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:47,960 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:47,961 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:47,962 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:47,963 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:47,964 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:47,964 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:47,965 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:47,966 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:47,967 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:47,968 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:47,968 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:47,969 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:47,970 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:47,971 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:47,972 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:47,972 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:47,973 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:47,974 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:47,975 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:47,975 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:47,976 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:47,977 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:47,978 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:47,979 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:47,980 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:47,980 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:47,981 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:47,982 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:47,983 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:47,983 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:47,984 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:47,985 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:47,986 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:47,987 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:47,988 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:47,989 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:47,990 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:47,991 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:47,991 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:47,992 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:47,993 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:47,994 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:47,995 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:47,996 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:47,997 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:47,998 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:47,999 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:47,999 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:48,000 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:48,001 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:48,002 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:48,003 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:48,004 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:48,005 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:48,006 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:48,007 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:48,007 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:48,008 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:48,009 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:48,010 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:48,011 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:48,011 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:48,012 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:48,013 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:48,014 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:48,015 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:48,016 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:48,017 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:48,017 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:48,018 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:48,019 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:48,020 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:48,021 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:48,022 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:48,023 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:48,023 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:48,024 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:48,025 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:48,026 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:48,027 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:48,028 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:48,028 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:48,029 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:48,030 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:48,031 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:48,032 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:48,033 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:48,033 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:48,034 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:48,035 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:48,036 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:48,037 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:48,038 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:48,039 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:48,039 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:48,040 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:48,041 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:48,042 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:48,043 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:48,044 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:48,044 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:48,045 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:48,046 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:48,047 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:48,048 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:48,048 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:48,049 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:48,050 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:48,051 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:48,052 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:48,069 INFO L303 Elim1Store]: Index analysis took 120 ms [2018-02-02 09:32:48,070 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 15 select indices, 15 select index equivalence classes, 121 disjoint index pairs (out of 105 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 118 treesize of output 1044 [2018-02-02 09:32:48,071 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-02 09:32:48,363 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-02 09:32:48,389 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 1 dim-2 vars, End of recursive call: 4 dim-0 vars, and 1 xjuncts. [2018-02-02 09:32:48,396 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 5 variables, input treesize:180, output treesize:161 [2018-02-02 09:32:49,086 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 151 treesize of output 118 [2018-02-02 09:32:49,091 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:49,092 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:49,093 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:49,095 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:49,096 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:49,097 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:49,098 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:49,099 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:49,100 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:49,101 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:49,102 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:49,103 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:49,103 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:49,104 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:49,105 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:49,105 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:49,106 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:49,107 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:49,108 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:49,108 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:49,109 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:49,110 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:49,111 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:49,111 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:49,112 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:49,113 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:49,114 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:49,115 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:49,115 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:49,116 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:49,117 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:49,117 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:49,118 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:49,119 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:49,120 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:49,120 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:49,121 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:49,121 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:49,122 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:49,123 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:49,124 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:49,125 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:49,125 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:49,126 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:49,127 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:49,128 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:49,129 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:49,129 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:49,130 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:49,131 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:49,132 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:49,132 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:49,133 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:49,134 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:49,135 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:49,136 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:49,137 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:49,137 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:49,138 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:49,139 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:49,140 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:49,140 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:49,141 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:49,142 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:49,143 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:49,143 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:49,144 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:49,145 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:49,146 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:49,146 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:49,147 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:49,148 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:49,149 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:49,149 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:49,150 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:49,151 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:49,152 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:49,153 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:49,154 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:49,155 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:49,156 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:49,157 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:49,158 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:49,158 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:49,159 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:49,160 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:49,161 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:49,162 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:49,163 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:49,164 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:49,165 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:49,165 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:49,166 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:49,167 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:49,168 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:49,169 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:49,170 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:49,171 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:49,172 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:49,172 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:49,173 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:49,174 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:49,175 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:49,176 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:49,176 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:49,177 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:49,178 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:49,179 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:49,179 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:49,180 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:49,181 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:49,182 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:49,183 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:49,183 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:49,184 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:49,185 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:49,186 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:49,187 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:49,188 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:49,188 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:49,189 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:49,206 INFO L303 Elim1Store]: Index analysis took 117 ms [2018-02-02 09:32:49,207 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 15 select indices, 15 select index equivalence classes, 121 disjoint index pairs (out of 105 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 118 treesize of output 1044 [2018-02-02 09:32:49,208 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-02 09:32:49,500 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-02 09:32:49,528 INFO L267 ElimStorePlain]: Start of recursive call 1: 5 dim-0 vars, 1 dim-2 vars, End of recursive call: 5 dim-0 vars, and 1 xjuncts. [2018-02-02 09:32:49,528 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 6 variables, input treesize:180, output treesize:161 [2018-02-02 09:32:50,950 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 147 treesize of output 114 [2018-02-02 09:32:50,953 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:50,954 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:50,954 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:50,955 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:50,956 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:50,956 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:50,957 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:50,957 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:50,958 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:50,958 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:50,959 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:50,959 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:50,960 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:50,960 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:50,961 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:50,961 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:50,962 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:50,962 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:50,963 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:50,963 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:50,964 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:50,964 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:50,965 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:50,965 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:50,966 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:50,966 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:50,967 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:50,968 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:50,968 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:50,969 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:50,969 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:50,970 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:50,971 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:50,971 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:50,972 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:50,972 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:50,973 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:50,973 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:50,973 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:50,975 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:50,975 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:50,976 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:50,976 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:50,977 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:50,977 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:50,978 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:50,978 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:50,979 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:50,979 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:50,980 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:50,981 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:50,981 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:50,982 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:50,983 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:50,983 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:50,984 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:50,984 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:50,985 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:50,985 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:50,986 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:50,987 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:50,988 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:50,988 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:50,989 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:50,989 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:50,990 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:50,990 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:50,991 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:50,991 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:50,992 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:50,993 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:50,993 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:50,994 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:50,994 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:50,995 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:50,995 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:50,996 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:50,997 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:50,998 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:50,998 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:50,999 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:50,999 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:51,000 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:51,000 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:51,002 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:51,002 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:51,003 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:51,003 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:51,004 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:51,004 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:51,006 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:51,006 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:51,007 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:51,007 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:51,007 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:51,008 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:51,009 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:51,009 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:51,010 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:51,011 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:51,012 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:51,012 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:51,013 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:51,014 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:51,015 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:51,017 INFO L700 Elim1Store]: detected not equals via solver [2018-02-02 09:32:51,129 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 15 select indices, 15 select index equivalence classes, 106 disjoint index pairs (out of 105 index pairs), introduced 0 new quantified variables, introduced 30 case distinctions, treesize of input 114 treesize of output 1006 [2018-02-02 09:32:51,130 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 15 [2018-02-02 09:32:51,801 WARN L152 XnfTransformerHelper]: Simplifying disjunction of 32768 conjuctions. This might take some time... Received shutdown request... [2018-02-02 09:32:55,951 INFO L175 TraceCheckSpWp]: Timeout while computing interpolants [2018-02-02 09:32:55,952 WARN L491 AbstractCegarLoop]: Verification canceled [2018-02-02 09:32:55,955 WARN L185 ceAbstractionStarter]: Timeout [2018-02-02 09:32:55,955 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 02.02 09:32:55 BoogieIcfgContainer [2018-02-02 09:32:55,956 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-02-02 09:32:55,956 INFO L168 Benchmark]: Toolchain (without parser) took 53660.00 ms. Allocated memory was 400.0 MB in the beginning and 1.4 GB in the end (delta: 1.0 GB). Free memory was 356.9 MB in the beginning and 1.1 GB in the end (delta: -703.0 MB). Peak memory consumption was 1.1 GB. Max. memory is 5.3 GB. [2018-02-02 09:32:55,957 INFO L168 Benchmark]: CDTParser took 0.12 ms. Allocated memory is still 400.0 MB. Free memory is still 363.5 MB. There was no memory consumed. Max. memory is 5.3 GB. [2018-02-02 09:32:55,957 INFO L168 Benchmark]: CACSL2BoogieTranslator took 167.15 ms. Allocated memory is still 400.0 MB. Free memory was 356.9 MB in the beginning and 342.4 MB in the end (delta: 14.5 MB). Peak memory consumption was 14.5 MB. Max. memory is 5.3 GB. [2018-02-02 09:32:55,957 INFO L168 Benchmark]: Boogie Preprocessor took 29.17 ms. Allocated memory is still 400.0 MB. Free memory was 342.4 MB in the beginning and 341.0 MB in the end (delta: 1.3 MB). Peak memory consumption was 1.3 MB. Max. memory is 5.3 GB. [2018-02-02 09:32:55,958 INFO L168 Benchmark]: RCFGBuilder took 348.81 ms. Allocated memory is still 400.0 MB. Free memory was 341.0 MB in the beginning and 302.9 MB in the end (delta: 38.1 MB). Peak memory consumption was 38.1 MB. Max. memory is 5.3 GB. [2018-02-02 09:32:55,958 INFO L168 Benchmark]: TraceAbstraction took 53111.75 ms. Allocated memory was 400.0 MB in the beginning and 1.4 GB in the end (delta: 1.0 GB). Free memory was 302.9 MB in the beginning and 1.1 GB in the end (delta: -756.9 MB). Peak memory consumption was 1.1 GB. Max. memory is 5.3 GB. [2018-02-02 09:32:55,959 INFO L344 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.12 ms. Allocated memory is still 400.0 MB. Free memory is still 363.5 MB. There was no memory consumed. Max. memory is 5.3 GB. * CACSL2BoogieTranslator took 167.15 ms. Allocated memory is still 400.0 MB. Free memory was 356.9 MB in the beginning and 342.4 MB in the end (delta: 14.5 MB). Peak memory consumption was 14.5 MB. Max. memory is 5.3 GB. * Boogie Preprocessor took 29.17 ms. Allocated memory is still 400.0 MB. Free memory was 342.4 MB in the beginning and 341.0 MB in the end (delta: 1.3 MB). Peak memory consumption was 1.3 MB. Max. memory is 5.3 GB. * RCFGBuilder took 348.81 ms. Allocated memory is still 400.0 MB. Free memory was 341.0 MB in the beginning and 302.9 MB in the end (delta: 38.1 MB). Peak memory consumption was 38.1 MB. Max. memory is 5.3 GB. * TraceAbstraction took 53111.75 ms. Allocated memory was 400.0 MB in the beginning and 1.4 GB in the end (delta: 1.0 GB). Free memory was 302.9 MB in the beginning and 1.1 GB in the end (delta: -756.9 MB). Peak memory consumption was 1.1 GB. Max. memory is 5.3 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1294). Cancelled while BasicCegarLoop was analyzing trace of length 148 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while DnfTransformerHelper was XNF transformer was simplifying 32768 conjuctions. . - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1294). Cancelled while BasicCegarLoop was analyzing trace of length 148 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while DnfTransformerHelper was XNF transformer was simplifying 32768 conjuctions. . - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1411). Cancelled while BasicCegarLoop was analyzing trace of length 148 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while DnfTransformerHelper was XNF transformer was simplifying 32768 conjuctions. . - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1411). Cancelled while BasicCegarLoop was analyzing trace of length 148 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while DnfTransformerHelper was XNF transformer was simplifying 32768 conjuctions. . - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1265). Cancelled while BasicCegarLoop was analyzing trace of length 148 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while DnfTransformerHelper was XNF transformer was simplifying 32768 conjuctions. . - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1265). Cancelled while BasicCegarLoop was analyzing trace of length 148 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while DnfTransformerHelper was XNF transformer was simplifying 32768 conjuctions. . - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1267). Cancelled while BasicCegarLoop was analyzing trace of length 148 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while DnfTransformerHelper was XNF transformer was simplifying 32768 conjuctions. . - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1267). Cancelled while BasicCegarLoop was analyzing trace of length 148 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while DnfTransformerHelper was XNF transformer was simplifying 32768 conjuctions. . - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1256). Cancelled while BasicCegarLoop was analyzing trace of length 148 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while DnfTransformerHelper was XNF transformer was simplifying 32768 conjuctions. . - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1256). Cancelled while BasicCegarLoop was analyzing trace of length 148 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while DnfTransformerHelper was XNF transformer was simplifying 32768 conjuctions. . - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1258). Cancelled while BasicCegarLoop was analyzing trace of length 148 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while DnfTransformerHelper was XNF transformer was simplifying 32768 conjuctions. . - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1258). Cancelled while BasicCegarLoop was analyzing trace of length 148 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while DnfTransformerHelper was XNF transformer was simplifying 32768 conjuctions. . - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1344). Cancelled while BasicCegarLoop was analyzing trace of length 148 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while DnfTransformerHelper was XNF transformer was simplifying 32768 conjuctions. . - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1340). Cancelled while BasicCegarLoop was analyzing trace of length 148 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while DnfTransformerHelper was XNF transformer was simplifying 32768 conjuctions. . - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1344). Cancelled while BasicCegarLoop was analyzing trace of length 148 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while DnfTransformerHelper was XNF transformer was simplifying 32768 conjuctions. . - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1340). Cancelled while BasicCegarLoop was analyzing trace of length 148 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while DnfTransformerHelper was XNF transformer was simplifying 32768 conjuctions. . - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1339). Cancelled while BasicCegarLoop was analyzing trace of length 148 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while DnfTransformerHelper was XNF transformer was simplifying 32768 conjuctions. . - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1339). Cancelled while BasicCegarLoop was analyzing trace of length 148 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while DnfTransformerHelper was XNF transformer was simplifying 32768 conjuctions. . - TimeoutResultAtElement [Line: 1452]: Timeout (TraceAbstraction) Unable to prove that all allocated memory was freed (line 1452). Cancelled while BasicCegarLoop was analyzing trace of length 148 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while DnfTransformerHelper was XNF transformer was simplifying 32768 conjuctions. . - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1099). Cancelled while BasicCegarLoop was analyzing trace of length 148 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while DnfTransformerHelper was XNF transformer was simplifying 32768 conjuctions. . - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1100). Cancelled while BasicCegarLoop was analyzing trace of length 148 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while DnfTransformerHelper was XNF transformer was simplifying 32768 conjuctions. . - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1100). Cancelled while BasicCegarLoop was analyzing trace of length 148 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while DnfTransformerHelper was XNF transformer was simplifying 32768 conjuctions. . - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1099). Cancelled while BasicCegarLoop was analyzing trace of length 148 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while DnfTransformerHelper was XNF transformer was simplifying 32768 conjuctions. . - StatisticsResult: Ultimate Automizer benchmark data CFG has 23 procedures, 151 locations, 23 error locations. TIMEOUT Result, 53.0s OverallTime, 32 OverallIterations, 16 TraceHistogramMax, 16.6s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 4121 SDtfs, 1156 SDslu, 41835 SDs, 0 SdLazy, 19450 SolverSat, 385 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 7.5s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 1919 GetRequests, 1218 SyntacticMatches, 10 SemanticMatches, 691 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 4691 ImplicationChecksByTransitivity, 15.7s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=175occurred in iteration=9, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.1s AutomataMinimizationTime, 31 MinimizatonAttempts, 90 StatesRemovedByMinimization, 12 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.2s SsaConstructionTime, 0.7s SatisfiabilityAnalysisTime, 10.0s InterpolantComputationTime, 3509 NumberOfCodeBlocks, 3467 NumberOfCodeBlocksAsserted, 46 NumberOfCheckSat, 3463 ConstructedInterpolants, 286 QuantifiedInterpolants, 1181778 SizeOfPredicates, 123 NumberOfNonLiveVariables, 6316 ConjunctsInSsa, 608 ConjunctsInUnsatCore, 46 InterpolantComputations, 22 PerfectInterpolantSequences, 668/1645 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: Timeout Written .csv to /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memleaks_test22_3_true-valid-memsafety_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Camel.epf_AutomizerC.xml/Csv-Benchmark-0-2018-02-02_09-32-55-964.csv Written .csv to /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memleaks_test22_3_true-valid-memsafety_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Camel.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-0-2018-02-02_09-32-55-964.csv Completed graceful shutdown