java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/cav18-smtinterpol/svcomp-DerefFreeMemtrack-32bit-Automizer_Camel.epf -i ../../../trunk/examples/svcomp/array-examples/standard_strcpy_false-valid-deref_ground.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-26d9e06-m [2018-02-02 08:48:38,580 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-02-02 08:48:38,581 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-02-02 08:48:38,591 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-02-02 08:48:38,591 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-02-02 08:48:38,591 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-02-02 08:48:38,592 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-02-02 08:48:38,593 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-02-02 08:48:38,594 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-02-02 08:48:38,595 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-02-02 08:48:38,596 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-02-02 08:48:38,596 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-02-02 08:48:38,597 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-02-02 08:48:38,598 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-02-02 08:48:38,599 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-02-02 08:48:38,600 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-02-02 08:48:38,602 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-02-02 08:48:38,603 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-02-02 08:48:38,604 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-02-02 08:48:38,605 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-02-02 08:48:38,607 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2018-02-02 08:48:38,611 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-02-02 08:48:38,611 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-02-02 08:48:38,612 INFO L98 SettingsManager]: Beginning loading settings from /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/cav18-smtinterpol/svcomp-DerefFreeMemtrack-32bit-Automizer_Camel.epf [2018-02-02 08:48:38,626 INFO L110 SettingsManager]: Loading preferences was successful [2018-02-02 08:48:38,626 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-02-02 08:48:38,631 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-02-02 08:48:38,631 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-02-02 08:48:38,631 INFO L133 SettingsManager]: * Use SBE=true [2018-02-02 08:48:38,631 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-02-02 08:48:38,631 INFO L133 SettingsManager]: * sizeof long=4 [2018-02-02 08:48:38,632 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-02-02 08:48:38,632 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-02-02 08:48:38,632 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-02-02 08:48:38,632 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-02-02 08:48:38,632 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-02-02 08:48:38,632 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-02-02 08:48:38,633 INFO L133 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2018-02-02 08:48:38,633 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-02-02 08:48:38,633 INFO L133 SettingsManager]: * sizeof long double=12 [2018-02-02 08:48:38,633 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-02-02 08:48:38,633 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-02-02 08:48:38,633 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-02-02 08:48:38,634 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-02-02 08:48:38,634 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-02-02 08:48:38,634 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-02-02 08:48:38,634 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-02-02 08:48:38,634 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-02-02 08:48:38,634 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL [2018-02-02 08:48:38,666 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-02-02 08:48:38,681 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully initialized [2018-02-02 08:48:38,684 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-02-02 08:48:38,685 INFO L271 PluginConnector]: Initializing CDTParser... [2018-02-02 08:48:38,686 INFO L276 PluginConnector]: CDTParser initialized [2018-02-02 08:48:38,686 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/array-examples/standard_strcpy_false-valid-deref_ground.i [2018-02-02 08:48:38,828 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-02-02 08:48:38,829 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-02-02 08:48:38,829 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-02-02 08:48:38,829 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-02-02 08:48:38,835 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-02-02 08:48:38,835 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 02.02 08:48:38" (1/1) ... [2018-02-02 08:48:38,837 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@398ca9e3 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.02 08:48:38, skipping insertion in model container [2018-02-02 08:48:38,837 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 02.02 08:48:38" (1/1) ... [2018-02-02 08:48:38,847 INFO L153 Dispatcher]: Using SV-COMP mode [2018-02-02 08:48:38,856 INFO L153 Dispatcher]: Using SV-COMP mode [2018-02-02 08:48:38,935 INFO L450 PostProcessor]: Settings: Checked method=main [2018-02-02 08:48:38,944 INFO L450 PostProcessor]: Settings: Checked method=main [2018-02-02 08:48:38,946 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.02 08:48:38 WrapperNode [2018-02-02 08:48:38,946 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-02-02 08:48:38,947 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-02-02 08:48:38,947 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-02-02 08:48:38,947 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-02-02 08:48:38,955 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.02 08:48:38" (1/1) ... [2018-02-02 08:48:38,956 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.02 08:48:38" (1/1) ... [2018-02-02 08:48:38,960 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.02 08:48:38" (1/1) ... [2018-02-02 08:48:38,960 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.02 08:48:38" (1/1) ... [2018-02-02 08:48:38,961 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.02 08:48:38" (1/1) ... [2018-02-02 08:48:38,963 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.02 08:48:38" (1/1) ... [2018-02-02 08:48:38,964 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.02 08:48:38" (1/1) ... [2018-02-02 08:48:38,965 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-02-02 08:48:38,965 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-02-02 08:48:38,965 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-02-02 08:48:38,965 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-02-02 08:48:38,966 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.02 08:48:38" (1/1) ... No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-02-02 08:48:39,003 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-02-02 08:48:39,004 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-02-02 08:48:39,004 INFO L136 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2018-02-02 08:48:39,004 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-02-02 08:48:39,004 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_error [2018-02-02 08:48:39,004 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2018-02-02 08:48:39,004 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-02-02 08:48:39,004 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-02-02 08:48:39,004 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-02-02 08:48:39,095 INFO L257 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-02-02 08:48:39,095 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 02.02 08:48:39 BoogieIcfgContainer [2018-02-02 08:48:39,095 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-02-02 08:48:39,096 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-02-02 08:48:39,096 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-02-02 08:48:39,097 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-02-02 08:48:39,097 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 02.02 08:48:38" (1/3) ... [2018-02-02 08:48:39,098 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2241192e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 02.02 08:48:39, skipping insertion in model container [2018-02-02 08:48:39,098 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.02 08:48:38" (2/3) ... [2018-02-02 08:48:39,098 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2241192e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 02.02 08:48:39, skipping insertion in model container [2018-02-02 08:48:39,098 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 02.02 08:48:39" (3/3) ... [2018-02-02 08:48:39,099 INFO L107 eAbstractionObserver]: Analyzing ICFG standard_strcpy_false-valid-deref_ground.i [2018-02-02 08:48:39,104 INFO L128 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-02-02 08:48:39,109 INFO L140 ceAbstractionStarter]: Appying trace abstraction to program that has 5 error locations. [2018-02-02 08:48:39,131 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-02-02 08:48:39,131 INFO L323 AbstractCegarLoop]: Hoare is false [2018-02-02 08:48:39,131 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-02-02 08:48:39,131 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-02-02 08:48:39,131 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-02-02 08:48:39,131 INFO L327 AbstractCegarLoop]: Difference is false [2018-02-02 08:48:39,131 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-02-02 08:48:39,131 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-02-02 08:48:39,132 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-02-02 08:48:39,139 INFO L276 IsEmpty]: Start isEmpty. Operand 32 states. [2018-02-02 08:48:39,144 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 8 [2018-02-02 08:48:39,144 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 08:48:39,145 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1] [2018-02-02 08:48:39,145 INFO L371 AbstractCegarLoop]: === Iteration 1 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-02-02 08:48:39,147 INFO L82 PathProgramCache]: Analyzing trace with hash -42218404, now seen corresponding path program 1 times [2018-02-02 08:48:39,148 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 08:48:39,149 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 08:48:39,181 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 08:48:39,181 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-02 08:48:39,182 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 08:48:39,206 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 08:48:39,213 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 08:48:39,247 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 08:48:39,250 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-02 08:48:39,250 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-02-02 08:48:39,251 INFO L409 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-02-02 08:48:39,264 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-02-02 08:48:39,264 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-02-02 08:48:39,266 INFO L87 Difference]: Start difference. First operand 32 states. Second operand 3 states. [2018-02-02 08:48:39,316 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 08:48:39,316 INFO L93 Difference]: Finished difference Result 49 states and 53 transitions. [2018-02-02 08:48:39,317 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-02-02 08:48:39,318 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 7 [2018-02-02 08:48:39,318 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 08:48:39,326 INFO L225 Difference]: With dead ends: 49 [2018-02-02 08:48:39,326 INFO L226 Difference]: Without dead ends: 40 [2018-02-02 08:48:39,327 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-02-02 08:48:39,342 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40 states. [2018-02-02 08:48:39,358 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40 to 31. [2018-02-02 08:48:39,359 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 31 states. [2018-02-02 08:48:39,360 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31 states to 31 states and 33 transitions. [2018-02-02 08:48:39,361 INFO L78 Accepts]: Start accepts. Automaton has 31 states and 33 transitions. Word has length 7 [2018-02-02 08:48:39,362 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 08:48:39,362 INFO L432 AbstractCegarLoop]: Abstraction has 31 states and 33 transitions. [2018-02-02 08:48:39,362 INFO L433 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-02-02 08:48:39,362 INFO L276 IsEmpty]: Start isEmpty. Operand 31 states and 33 transitions. [2018-02-02 08:48:39,362 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 13 [2018-02-02 08:48:39,362 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 08:48:39,363 INFO L351 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 08:48:39,363 INFO L371 AbstractCegarLoop]: === Iteration 2 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-02-02 08:48:39,363 INFO L82 PathProgramCache]: Analyzing trace with hash -207595369, now seen corresponding path program 1 times [2018-02-02 08:48:39,363 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 08:48:39,363 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 08:48:39,364 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 08:48:39,364 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-02 08:48:39,364 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 08:48:39,436 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 08:48:39,437 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 08:48:39,469 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 08:48:39,469 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-02 08:48:39,469 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-02 08:48:39,474 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-02 08:48:39,484 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 08:48:39,488 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-02 08:48:39,500 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 08:48:39,524 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-02 08:48:39,524 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [3, 3] total 3 [2018-02-02 08:48:39,524 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-02-02 08:48:39,524 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-02-02 08:48:39,525 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-02-02 08:48:39,530 INFO L87 Difference]: Start difference. First operand 31 states and 33 transitions. Second operand 4 states. [2018-02-02 08:48:39,576 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 08:48:39,576 INFO L93 Difference]: Finished difference Result 54 states and 59 transitions. [2018-02-02 08:48:39,576 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-02-02 08:48:39,576 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 12 [2018-02-02 08:48:39,576 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 08:48:39,577 INFO L225 Difference]: With dead ends: 54 [2018-02-02 08:48:39,577 INFO L226 Difference]: Without dead ends: 54 [2018-02-02 08:48:39,577 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 11 SyntacticMatches, 1 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-02-02 08:48:39,577 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 54 states. [2018-02-02 08:48:39,580 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 54 to 36. [2018-02-02 08:48:39,580 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 36 states. [2018-02-02 08:48:39,580 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36 states to 36 states and 39 transitions. [2018-02-02 08:48:39,580 INFO L78 Accepts]: Start accepts. Automaton has 36 states and 39 transitions. Word has length 12 [2018-02-02 08:48:39,581 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 08:48:39,581 INFO L432 AbstractCegarLoop]: Abstraction has 36 states and 39 transitions. [2018-02-02 08:48:39,581 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-02-02 08:48:39,581 INFO L276 IsEmpty]: Start isEmpty. Operand 36 states and 39 transitions. [2018-02-02 08:48:39,581 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 13 [2018-02-02 08:48:39,581 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 08:48:39,581 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 08:48:39,581 INFO L371 AbstractCegarLoop]: === Iteration 3 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-02-02 08:48:39,581 INFO L82 PathProgramCache]: Analyzing trace with hash -209255178, now seen corresponding path program 1 times [2018-02-02 08:48:39,581 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 08:48:39,581 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 08:48:39,582 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 08:48:39,582 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-02 08:48:39,582 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 08:48:39,586 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 08:48:39,587 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 08:48:39,614 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 08:48:39,615 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-02 08:48:39,615 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-02-02 08:48:39,615 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-02-02 08:48:39,615 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-02-02 08:48:39,615 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-02-02 08:48:39,616 INFO L87 Difference]: Start difference. First operand 36 states and 39 transitions. Second operand 4 states. [2018-02-02 08:48:39,653 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 08:48:39,653 INFO L93 Difference]: Finished difference Result 39 states and 41 transitions. [2018-02-02 08:48:39,653 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-02-02 08:48:39,653 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 12 [2018-02-02 08:48:39,654 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 08:48:39,654 INFO L225 Difference]: With dead ends: 39 [2018-02-02 08:48:39,654 INFO L226 Difference]: Without dead ends: 36 [2018-02-02 08:48:39,654 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-02-02 08:48:39,655 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36 states. [2018-02-02 08:48:39,657 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36 to 36. [2018-02-02 08:48:39,657 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 36 states. [2018-02-02 08:48:39,658 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36 states to 36 states and 38 transitions. [2018-02-02 08:48:39,658 INFO L78 Accepts]: Start accepts. Automaton has 36 states and 38 transitions. Word has length 12 [2018-02-02 08:48:39,658 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 08:48:39,658 INFO L432 AbstractCegarLoop]: Abstraction has 36 states and 38 transitions. [2018-02-02 08:48:39,658 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-02-02 08:48:39,658 INFO L276 IsEmpty]: Start isEmpty. Operand 36 states and 38 transitions. [2018-02-02 08:48:39,659 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-02-02 08:48:39,659 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 08:48:39,659 INFO L351 BasicCegarLoop]: trace histogram [3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1] [2018-02-02 08:48:39,659 INFO L371 AbstractCegarLoop]: === Iteration 4 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-02-02 08:48:39,660 INFO L82 PathProgramCache]: Analyzing trace with hash 2132883772, now seen corresponding path program 2 times [2018-02-02 08:48:39,660 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 08:48:39,660 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 08:48:39,661 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 08:48:39,661 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-02 08:48:39,661 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 08:48:39,667 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 08:48:39,668 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 08:48:39,718 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 9 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 08:48:39,718 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-02 08:48:39,718 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-02 08:48:39,723 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-02-02 08:48:39,726 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:48:39,729 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:48:39,731 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-02 08:48:39,732 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-02 08:48:39,738 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 9 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 08:48:39,755 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-02 08:48:39,755 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4] total 4 [2018-02-02 08:48:39,755 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-02-02 08:48:39,755 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-02-02 08:48:39,756 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-02-02 08:48:39,756 INFO L87 Difference]: Start difference. First operand 36 states and 38 transitions. Second operand 5 states. [2018-02-02 08:48:39,802 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 08:48:39,802 INFO L93 Difference]: Finished difference Result 59 states and 64 transitions. [2018-02-02 08:48:39,802 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-02-02 08:48:39,802 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 17 [2018-02-02 08:48:39,802 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 08:48:39,803 INFO L225 Difference]: With dead ends: 59 [2018-02-02 08:48:39,803 INFO L226 Difference]: Without dead ends: 59 [2018-02-02 08:48:39,804 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 16 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-02-02 08:48:39,804 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 59 states. [2018-02-02 08:48:39,806 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 59 to 41. [2018-02-02 08:48:39,807 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 41 states. [2018-02-02 08:48:39,807 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41 states to 41 states and 44 transitions. [2018-02-02 08:48:39,807 INFO L78 Accepts]: Start accepts. Automaton has 41 states and 44 transitions. Word has length 17 [2018-02-02 08:48:39,808 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 08:48:39,808 INFO L432 AbstractCegarLoop]: Abstraction has 41 states and 44 transitions. [2018-02-02 08:48:39,808 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-02-02 08:48:39,808 INFO L276 IsEmpty]: Start isEmpty. Operand 41 states and 44 transitions. [2018-02-02 08:48:39,808 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-02-02 08:48:39,808 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 08:48:39,808 INFO L351 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 08:48:39,809 INFO L371 AbstractCegarLoop]: === Iteration 5 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-02-02 08:48:39,809 INFO L82 PathProgramCache]: Analyzing trace with hash 2131223963, now seen corresponding path program 1 times [2018-02-02 08:48:39,809 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 08:48:39,809 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 08:48:39,810 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 08:48:39,810 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-02 08:48:39,810 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 08:48:39,816 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 08:48:39,816 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 08:48:39,830 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-02-02 08:48:39,831 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-02 08:48:39,831 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-02-02 08:48:39,831 INFO L409 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-02-02 08:48:39,831 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-02-02 08:48:39,831 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-02-02 08:48:39,831 INFO L87 Difference]: Start difference. First operand 41 states and 44 transitions. Second operand 3 states. [2018-02-02 08:48:39,845 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 08:48:39,846 INFO L93 Difference]: Finished difference Result 47 states and 51 transitions. [2018-02-02 08:48:39,847 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-02-02 08:48:39,847 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 17 [2018-02-02 08:48:39,847 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 08:48:39,848 INFO L225 Difference]: With dead ends: 47 [2018-02-02 08:48:39,848 INFO L226 Difference]: Without dead ends: 47 [2018-02-02 08:48:39,848 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-02-02 08:48:39,849 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 47 states. [2018-02-02 08:48:39,851 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 47 to 45. [2018-02-02 08:48:39,851 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 45 states. [2018-02-02 08:48:39,852 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45 states to 45 states and 48 transitions. [2018-02-02 08:48:39,852 INFO L78 Accepts]: Start accepts. Automaton has 45 states and 48 transitions. Word has length 17 [2018-02-02 08:48:39,852 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 08:48:39,852 INFO L432 AbstractCegarLoop]: Abstraction has 45 states and 48 transitions. [2018-02-02 08:48:39,852 INFO L433 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-02-02 08:48:39,852 INFO L276 IsEmpty]: Start isEmpty. Operand 45 states and 48 transitions. [2018-02-02 08:48:39,853 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2018-02-02 08:48:39,853 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 08:48:39,853 INFO L351 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1] [2018-02-02 08:48:39,853 INFO L371 AbstractCegarLoop]: === Iteration 6 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-02-02 08:48:39,854 INFO L82 PathProgramCache]: Analyzing trace with hash 2059138999, now seen corresponding path program 3 times [2018-02-02 08:48:39,854 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 08:48:39,854 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 08:48:39,854 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 08:48:39,854 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-02 08:48:39,854 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 08:48:39,861 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 08:48:39,862 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 08:48:39,913 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 08:48:39,914 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-02 08:48:39,914 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-02 08:48:39,920 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-02-02 08:48:39,923 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:48:39,925 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:48:39,926 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:48:39,928 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:48:39,929 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-02 08:48:39,930 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-02 08:48:39,939 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 08:48:39,965 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-02 08:48:39,965 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 6 [2018-02-02 08:48:39,966 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-02-02 08:48:39,966 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-02-02 08:48:39,966 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2018-02-02 08:48:39,966 INFO L87 Difference]: Start difference. First operand 45 states and 48 transitions. Second operand 7 states. [2018-02-02 08:48:40,021 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 08:48:40,021 INFO L93 Difference]: Finished difference Result 89 states and 96 transitions. [2018-02-02 08:48:40,021 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-02-02 08:48:40,022 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 22 [2018-02-02 08:48:40,022 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 08:48:40,022 INFO L225 Difference]: With dead ends: 89 [2018-02-02 08:48:40,022 INFO L226 Difference]: Without dead ends: 89 [2018-02-02 08:48:40,023 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 30 GetRequests, 22 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=33, Invalid=57, Unknown=0, NotChecked=0, Total=90 [2018-02-02 08:48:40,023 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 89 states. [2018-02-02 08:48:40,026 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 89 to 50. [2018-02-02 08:48:40,026 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 50 states. [2018-02-02 08:48:40,027 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50 states to 50 states and 54 transitions. [2018-02-02 08:48:40,027 INFO L78 Accepts]: Start accepts. Automaton has 50 states and 54 transitions. Word has length 22 [2018-02-02 08:48:40,027 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 08:48:40,027 INFO L432 AbstractCegarLoop]: Abstraction has 50 states and 54 transitions. [2018-02-02 08:48:40,027 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-02-02 08:48:40,027 INFO L276 IsEmpty]: Start isEmpty. Operand 50 states and 54 transitions. [2018-02-02 08:48:40,028 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-02-02 08:48:40,028 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 08:48:40,028 INFO L351 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 08:48:40,028 INFO L371 AbstractCegarLoop]: === Iteration 7 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-02-02 08:48:40,029 INFO L82 PathProgramCache]: Analyzing trace with hash -6617899, now seen corresponding path program 1 times [2018-02-02 08:48:40,029 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 08:48:40,029 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 08:48:40,030 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 08:48:40,030 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-02 08:48:40,030 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 08:48:40,039 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 08:48:40,040 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 08:48:40,073 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 1 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 08:48:40,073 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-02 08:48:40,074 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-02 08:48:40,083 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-02 08:48:40,089 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 08:48:40,091 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-02 08:48:40,109 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 08:48:40,137 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-02 08:48:40,137 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 8 [2018-02-02 08:48:40,137 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-02-02 08:48:40,137 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-02-02 08:48:40,138 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=35, Unknown=0, NotChecked=0, Total=56 [2018-02-02 08:48:40,138 INFO L87 Difference]: Start difference. First operand 50 states and 54 transitions. Second operand 8 states. [2018-02-02 08:48:40,200 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 08:48:40,200 INFO L93 Difference]: Finished difference Result 59 states and 63 transitions. [2018-02-02 08:48:40,200 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-02-02 08:48:40,200 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 27 [2018-02-02 08:48:40,200 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 08:48:40,201 INFO L225 Difference]: With dead ends: 59 [2018-02-02 08:48:40,201 INFO L226 Difference]: Without dead ends: 50 [2018-02-02 08:48:40,201 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 32 GetRequests, 26 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=35, Unknown=0, NotChecked=0, Total=56 [2018-02-02 08:48:40,201 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 50 states. [2018-02-02 08:48:40,203 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 50 to 50. [2018-02-02 08:48:40,203 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 50 states. [2018-02-02 08:48:40,203 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50 states to 50 states and 53 transitions. [2018-02-02 08:48:40,203 INFO L78 Accepts]: Start accepts. Automaton has 50 states and 53 transitions. Word has length 27 [2018-02-02 08:48:40,203 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 08:48:40,204 INFO L432 AbstractCegarLoop]: Abstraction has 50 states and 53 transitions. [2018-02-02 08:48:40,204 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-02-02 08:48:40,204 INFO L276 IsEmpty]: Start isEmpty. Operand 50 states and 53 transitions. [2018-02-02 08:48:40,204 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-02-02 08:48:40,204 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 08:48:40,204 INFO L351 BasicCegarLoop]: trace histogram [5, 4, 4, 4, 4, 1, 1, 1, 1, 1, 1] [2018-02-02 08:48:40,204 INFO L371 AbstractCegarLoop]: === Iteration 8 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-02-02 08:48:40,204 INFO L82 PathProgramCache]: Analyzing trace with hash -1173615076, now seen corresponding path program 4 times [2018-02-02 08:48:40,204 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 08:48:40,204 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 08:48:40,205 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 08:48:40,205 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-02 08:48:40,205 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 08:48:40,210 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 08:48:40,210 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 08:48:40,266 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 0 proven. 38 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 08:48:40,267 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-02 08:48:40,267 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-02 08:48:40,272 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-02-02 08:48:40,278 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-02 08:48:40,279 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-02 08:48:40,284 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 0 proven. 38 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 08:48:40,301 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-02 08:48:40,301 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 6 [2018-02-02 08:48:40,301 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-02-02 08:48:40,302 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-02-02 08:48:40,302 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-02-02 08:48:40,302 INFO L87 Difference]: Start difference. First operand 50 states and 53 transitions. Second operand 7 states. [2018-02-02 08:48:40,391 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 08:48:40,391 INFO L93 Difference]: Finished difference Result 94 states and 101 transitions. [2018-02-02 08:48:40,391 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-02-02 08:48:40,392 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 27 [2018-02-02 08:48:40,392 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 08:48:40,392 INFO L225 Difference]: With dead ends: 94 [2018-02-02 08:48:40,393 INFO L226 Difference]: Without dead ends: 94 [2018-02-02 08:48:40,393 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 32 GetRequests, 26 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-02-02 08:48:40,393 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 94 states. [2018-02-02 08:48:40,396 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 94 to 55. [2018-02-02 08:48:40,396 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 55 states. [2018-02-02 08:48:40,397 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 55 states to 55 states and 59 transitions. [2018-02-02 08:48:40,397 INFO L78 Accepts]: Start accepts. Automaton has 55 states and 59 transitions. Word has length 27 [2018-02-02 08:48:40,397 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 08:48:40,397 INFO L432 AbstractCegarLoop]: Abstraction has 55 states and 59 transitions. [2018-02-02 08:48:40,397 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-02-02 08:48:40,397 INFO L276 IsEmpty]: Start isEmpty. Operand 55 states and 59 transitions. [2018-02-02 08:48:40,398 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-02-02 08:48:40,398 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 08:48:40,398 INFO L351 BasicCegarLoop]: trace histogram [3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 08:48:40,398 INFO L371 AbstractCegarLoop]: === Iteration 9 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-02-02 08:48:40,398 INFO L82 PathProgramCache]: Analyzing trace with hash 155329936, now seen corresponding path program 2 times [2018-02-02 08:48:40,398 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 08:48:40,398 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 08:48:40,399 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 08:48:40,399 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-02 08:48:40,399 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 08:48:40,406 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 08:48:40,406 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 08:48:40,447 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 4 proven. 1 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-02-02 08:48:40,447 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-02 08:48:40,447 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-02 08:48:40,457 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-02-02 08:48:40,461 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:48:40,464 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:48:40,464 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-02 08:48:40,465 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-02 08:48:40,476 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 4 proven. 1 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-02-02 08:48:40,492 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-02 08:48:40,492 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 5 [2018-02-02 08:48:40,492 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-02-02 08:48:40,493 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-02-02 08:48:40,493 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-02-02 08:48:40,493 INFO L87 Difference]: Start difference. First operand 55 states and 59 transitions. Second operand 6 states. [2018-02-02 08:48:40,516 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 08:48:40,516 INFO L93 Difference]: Finished difference Result 55 states and 60 transitions. [2018-02-02 08:48:40,517 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-02-02 08:48:40,517 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 32 [2018-02-02 08:48:40,517 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 08:48:40,517 INFO L225 Difference]: With dead ends: 55 [2018-02-02 08:48:40,517 INFO L226 Difference]: Without dead ends: 38 [2018-02-02 08:48:40,517 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 37 GetRequests, 31 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2018-02-02 08:48:40,517 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 38 states. [2018-02-02 08:48:40,519 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 38 to 38. [2018-02-02 08:48:40,519 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 38 states. [2018-02-02 08:48:40,520 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38 states to 38 states and 38 transitions. [2018-02-02 08:48:40,520 INFO L78 Accepts]: Start accepts. Automaton has 38 states and 38 transitions. Word has length 32 [2018-02-02 08:48:40,520 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 08:48:40,520 INFO L432 AbstractCegarLoop]: Abstraction has 38 states and 38 transitions. [2018-02-02 08:48:40,520 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-02-02 08:48:40,520 INFO L276 IsEmpty]: Start isEmpty. Operand 38 states and 38 transitions. [2018-02-02 08:48:40,521 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-02-02 08:48:40,521 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 08:48:40,521 INFO L351 BasicCegarLoop]: trace histogram [6, 5, 5, 5, 5, 1, 1, 1, 1, 1, 1] [2018-02-02 08:48:40,521 INFO L371 AbstractCegarLoop]: === Iteration 10 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-02-02 08:48:40,521 INFO L82 PathProgramCache]: Analyzing trace with hash -1011667241, now seen corresponding path program 5 times [2018-02-02 08:48:40,521 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 08:48:40,522 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 08:48:40,522 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 08:48:40,522 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-02 08:48:40,522 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 08:48:40,529 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 08:48:40,529 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 08:48:40,579 INFO L134 CoverageAnalysis]: Checked inductivity of 60 backedges. 0 proven. 60 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 08:48:40,580 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-02 08:48:40,580 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-02 08:48:40,584 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-02-02 08:48:40,587 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:48:40,588 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:48:40,590 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:48:40,591 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:48:40,592 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:48:40,594 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:48:40,594 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-02 08:48:40,595 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-02 08:48:40,641 INFO L134 CoverageAnalysis]: Checked inductivity of 60 backedges. 0 proven. 60 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 08:48:40,659 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-02 08:48:40,659 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 7] total 13 [2018-02-02 08:48:40,659 INFO L409 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-02-02 08:48:40,660 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-02-02 08:48:40,660 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=55, Invalid=127, Unknown=0, NotChecked=0, Total=182 [2018-02-02 08:48:40,660 INFO L87 Difference]: Start difference. First operand 38 states and 38 transitions. Second operand 14 states. [2018-02-02 08:48:40,756 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 08:48:40,757 INFO L93 Difference]: Finished difference Result 43 states and 43 transitions. [2018-02-02 08:48:40,757 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-02-02 08:48:40,757 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 32 [2018-02-02 08:48:40,757 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 08:48:40,758 INFO L225 Difference]: With dead ends: 43 [2018-02-02 08:48:40,758 INFO L226 Difference]: Without dead ends: 43 [2018-02-02 08:48:40,758 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 40 GetRequests, 27 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 51 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=63, Invalid=147, Unknown=0, NotChecked=0, Total=210 [2018-02-02 08:48:40,758 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 43 states. [2018-02-02 08:48:40,760 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 43 to 43. [2018-02-02 08:48:40,760 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 43 states. [2018-02-02 08:48:40,760 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43 states to 43 states and 43 transitions. [2018-02-02 08:48:40,760 INFO L78 Accepts]: Start accepts. Automaton has 43 states and 43 transitions. Word has length 32 [2018-02-02 08:48:40,761 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 08:48:40,761 INFO L432 AbstractCegarLoop]: Abstraction has 43 states and 43 transitions. [2018-02-02 08:48:40,761 INFO L433 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-02-02 08:48:40,761 INFO L276 IsEmpty]: Start isEmpty. Operand 43 states and 43 transitions. [2018-02-02 08:48:40,761 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2018-02-02 08:48:40,762 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 08:48:40,762 INFO L351 BasicCegarLoop]: trace histogram [7, 6, 6, 6, 6, 1, 1, 1, 1, 1, 1] [2018-02-02 08:48:40,762 INFO L371 AbstractCegarLoop]: === Iteration 11 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-02-02 08:48:40,762 INFO L82 PathProgramCache]: Analyzing trace with hash -2070263044, now seen corresponding path program 6 times [2018-02-02 08:48:40,762 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 08:48:40,762 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 08:48:40,763 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 08:48:40,763 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-02 08:48:40,763 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 08:48:40,768 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 08:48:40,769 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 08:48:40,835 INFO L134 CoverageAnalysis]: Checked inductivity of 87 backedges. 0 proven. 87 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 08:48:40,836 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-02 08:48:40,836 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-02 08:48:40,842 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-02-02 08:48:40,846 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:48:40,848 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:48:40,849 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:48:40,852 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:48:40,853 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:48:40,855 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:48:40,857 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:48:40,858 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-02 08:48:40,862 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-02 08:48:40,889 INFO L134 CoverageAnalysis]: Checked inductivity of 87 backedges. 0 proven. 87 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 08:48:40,920 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-02 08:48:40,920 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9] total 12 [2018-02-02 08:48:40,920 INFO L409 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-02-02 08:48:40,921 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-02-02 08:48:40,921 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=46, Invalid=110, Unknown=0, NotChecked=0, Total=156 [2018-02-02 08:48:40,921 INFO L87 Difference]: Start difference. First operand 43 states and 43 transitions. Second operand 13 states. [2018-02-02 08:48:40,997 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 08:48:40,998 INFO L93 Difference]: Finished difference Result 48 states and 48 transitions. [2018-02-02 08:48:40,998 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-02-02 08:48:40,998 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 37 [2018-02-02 08:48:40,998 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 08:48:40,998 INFO L225 Difference]: With dead ends: 48 [2018-02-02 08:48:40,998 INFO L226 Difference]: Without dead ends: 48 [2018-02-02 08:48:40,999 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 51 GetRequests, 34 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 46 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=110, Invalid=232, Unknown=0, NotChecked=0, Total=342 [2018-02-02 08:48:40,999 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48 states. [2018-02-02 08:48:41,000 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48 to 48. [2018-02-02 08:48:41,000 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 48 states. [2018-02-02 08:48:41,000 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 48 states to 48 states and 48 transitions. [2018-02-02 08:48:41,000 INFO L78 Accepts]: Start accepts. Automaton has 48 states and 48 transitions. Word has length 37 [2018-02-02 08:48:41,000 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 08:48:41,000 INFO L432 AbstractCegarLoop]: Abstraction has 48 states and 48 transitions. [2018-02-02 08:48:41,000 INFO L433 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-02-02 08:48:41,001 INFO L276 IsEmpty]: Start isEmpty. Operand 48 states and 48 transitions. [2018-02-02 08:48:41,001 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-02-02 08:48:41,001 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 08:48:41,001 INFO L351 BasicCegarLoop]: trace histogram [8, 7, 7, 7, 7, 1, 1, 1, 1, 1, 1] [2018-02-02 08:48:41,001 INFO L371 AbstractCegarLoop]: === Iteration 12 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-02-02 08:48:41,001 INFO L82 PathProgramCache]: Analyzing trace with hash 1122500087, now seen corresponding path program 7 times [2018-02-02 08:48:41,001 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 08:48:41,001 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 08:48:41,002 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 08:48:41,002 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-02 08:48:41,002 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 08:48:41,008 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 08:48:41,008 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 08:48:41,071 INFO L134 CoverageAnalysis]: Checked inductivity of 119 backedges. 0 proven. 119 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 08:48:41,071 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-02 08:48:41,071 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-02 08:48:41,077 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-02 08:48:41,090 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 08:48:41,092 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-02 08:48:41,130 INFO L134 CoverageAnalysis]: Checked inductivity of 119 backedges. 0 proven. 119 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 08:48:41,147 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-02 08:48:41,147 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 9] total 18 [2018-02-02 08:48:41,147 INFO L409 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-02-02 08:48:41,147 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-02-02 08:48:41,147 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=99, Invalid=243, Unknown=0, NotChecked=0, Total=342 [2018-02-02 08:48:41,147 INFO L87 Difference]: Start difference. First operand 48 states and 48 transitions. Second operand 19 states. [2018-02-02 08:48:41,234 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 08:48:41,235 INFO L93 Difference]: Finished difference Result 53 states and 53 transitions. [2018-02-02 08:48:41,235 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-02-02 08:48:41,235 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 42 [2018-02-02 08:48:41,235 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 08:48:41,235 INFO L225 Difference]: With dead ends: 53 [2018-02-02 08:48:41,235 INFO L226 Difference]: Without dead ends: 53 [2018-02-02 08:48:41,236 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 51 GetRequests, 34 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 111 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=99, Invalid=243, Unknown=0, NotChecked=0, Total=342 [2018-02-02 08:48:41,236 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 53 states. [2018-02-02 08:48:41,237 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 53 to 53. [2018-02-02 08:48:41,237 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 53 states. [2018-02-02 08:48:41,237 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 53 states to 53 states and 53 transitions. [2018-02-02 08:48:41,237 INFO L78 Accepts]: Start accepts. Automaton has 53 states and 53 transitions. Word has length 42 [2018-02-02 08:48:41,238 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 08:48:41,238 INFO L432 AbstractCegarLoop]: Abstraction has 53 states and 53 transitions. [2018-02-02 08:48:41,238 INFO L433 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-02-02 08:48:41,238 INFO L276 IsEmpty]: Start isEmpty. Operand 53 states and 53 transitions. [2018-02-02 08:48:41,238 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-02-02 08:48:41,238 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 08:48:41,238 INFO L351 BasicCegarLoop]: trace histogram [9, 8, 8, 8, 8, 1, 1, 1, 1, 1, 1] [2018-02-02 08:48:41,238 INFO L371 AbstractCegarLoop]: === Iteration 13 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-02-02 08:48:41,239 INFO L82 PathProgramCache]: Analyzing trace with hash -676728868, now seen corresponding path program 8 times [2018-02-02 08:48:41,239 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 08:48:41,239 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 08:48:41,239 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 08:48:41,239 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-02 08:48:41,239 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 08:48:41,243 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 08:48:41,244 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 08:48:41,322 INFO L134 CoverageAnalysis]: Checked inductivity of 156 backedges. 0 proven. 156 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 08:48:41,322 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-02 08:48:41,322 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-02 08:48:41,326 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-02-02 08:48:41,328 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:48:41,334 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:48:41,335 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-02 08:48:41,337 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-02 08:48:41,344 INFO L134 CoverageAnalysis]: Checked inductivity of 156 backedges. 0 proven. 156 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 08:48:41,361 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-02 08:48:41,361 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10] total 10 [2018-02-02 08:48:41,361 INFO L409 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-02-02 08:48:41,362 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-02-02 08:48:41,362 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=91, Unknown=0, NotChecked=0, Total=110 [2018-02-02 08:48:41,362 INFO L87 Difference]: Start difference. First operand 53 states and 53 transitions. Second operand 11 states. [2018-02-02 08:48:41,471 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 08:48:41,472 INFO L93 Difference]: Finished difference Result 58 states and 58 transitions. [2018-02-02 08:48:41,472 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-02-02 08:48:41,472 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 47 [2018-02-02 08:48:41,472 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 08:48:41,472 INFO L225 Difference]: With dead ends: 58 [2018-02-02 08:48:41,472 INFO L226 Difference]: Without dead ends: 58 [2018-02-02 08:48:41,472 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 56 GetRequests, 46 SyntacticMatches, 1 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=91, Unknown=0, NotChecked=0, Total=110 [2018-02-02 08:48:41,473 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 58 states. [2018-02-02 08:48:41,473 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 58 to 58. [2018-02-02 08:48:41,474 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 58 states. [2018-02-02 08:48:41,474 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 58 states to 58 states and 58 transitions. [2018-02-02 08:48:41,474 INFO L78 Accepts]: Start accepts. Automaton has 58 states and 58 transitions. Word has length 47 [2018-02-02 08:48:41,474 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 08:48:41,474 INFO L432 AbstractCegarLoop]: Abstraction has 58 states and 58 transitions. [2018-02-02 08:48:41,474 INFO L433 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-02-02 08:48:41,475 INFO L276 IsEmpty]: Start isEmpty. Operand 58 states and 58 transitions. [2018-02-02 08:48:41,475 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2018-02-02 08:48:41,475 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 08:48:41,475 INFO L351 BasicCegarLoop]: trace histogram [10, 9, 9, 9, 9, 1, 1, 1, 1, 1, 1] [2018-02-02 08:48:41,475 INFO L371 AbstractCegarLoop]: === Iteration 14 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-02-02 08:48:41,475 INFO L82 PathProgramCache]: Analyzing trace with hash -633576169, now seen corresponding path program 9 times [2018-02-02 08:48:41,476 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 08:48:41,476 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 08:48:41,476 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 08:48:41,476 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-02 08:48:41,476 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 08:48:41,480 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 08:48:41,481 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 08:48:41,548 INFO L134 CoverageAnalysis]: Checked inductivity of 198 backedges. 0 proven. 198 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 08:48:41,549 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-02 08:48:41,549 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-02 08:48:41,553 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-02-02 08:48:41,561 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:48:41,562 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:48:41,564 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:48:41,565 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:48:41,566 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:48:41,567 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:48:41,568 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:48:41,570 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:48:41,571 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:48:41,573 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:48:41,573 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-02 08:48:41,575 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-02 08:48:41,580 INFO L134 CoverageAnalysis]: Checked inductivity of 198 backedges. 0 proven. 198 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 08:48:41,607 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-02 08:48:41,607 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12] total 12 [2018-02-02 08:48:41,607 INFO L409 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-02-02 08:48:41,607 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-02-02 08:48:41,608 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=60, Invalid=96, Unknown=0, NotChecked=0, Total=156 [2018-02-02 08:48:41,608 INFO L87 Difference]: Start difference. First operand 58 states and 58 transitions. Second operand 13 states. [2018-02-02 08:48:41,722 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 08:48:41,723 INFO L93 Difference]: Finished difference Result 63 states and 63 transitions. [2018-02-02 08:48:41,723 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-02-02 08:48:41,723 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 52 [2018-02-02 08:48:41,723 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 08:48:41,723 INFO L225 Difference]: With dead ends: 63 [2018-02-02 08:48:41,724 INFO L226 Difference]: Without dead ends: 63 [2018-02-02 08:48:41,724 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 72 GetRequests, 52 SyntacticMatches, 0 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 53 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=168, Invalid=294, Unknown=0, NotChecked=0, Total=462 [2018-02-02 08:48:41,724 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 63 states. [2018-02-02 08:48:41,725 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 63 to 63. [2018-02-02 08:48:41,725 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 63 states. [2018-02-02 08:48:41,725 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 63 states to 63 states and 63 transitions. [2018-02-02 08:48:41,726 INFO L78 Accepts]: Start accepts. Automaton has 63 states and 63 transitions. Word has length 52 [2018-02-02 08:48:41,726 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 08:48:41,726 INFO L432 AbstractCegarLoop]: Abstraction has 63 states and 63 transitions. [2018-02-02 08:48:41,726 INFO L433 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-02-02 08:48:41,726 INFO L276 IsEmpty]: Start isEmpty. Operand 63 states and 63 transitions. [2018-02-02 08:48:41,727 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2018-02-02 08:48:41,727 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 08:48:41,727 INFO L351 BasicCegarLoop]: trace histogram [11, 10, 10, 10, 10, 1, 1, 1, 1, 1, 1] [2018-02-02 08:48:41,727 INFO L371 AbstractCegarLoop]: === Iteration 15 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-02-02 08:48:41,727 INFO L82 PathProgramCache]: Analyzing trace with hash -1365705540, now seen corresponding path program 10 times [2018-02-02 08:48:41,727 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 08:48:41,727 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 08:48:41,728 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 08:48:41,728 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-02 08:48:41,728 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 08:48:41,735 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 08:48:41,735 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 08:48:41,829 INFO L134 CoverageAnalysis]: Checked inductivity of 245 backedges. 0 proven. 245 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 08:48:41,829 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-02 08:48:41,829 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-02 08:48:41,836 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-02-02 08:48:41,849 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-02 08:48:41,851 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-02 08:48:41,937 INFO L134 CoverageAnalysis]: Checked inductivity of 245 backedges. 0 proven. 245 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 08:48:41,954 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-02 08:48:41,954 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 12] total 24 [2018-02-02 08:48:41,955 INFO L409 AbstractCegarLoop]: Interpolant automaton has 25 states [2018-02-02 08:48:41,955 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2018-02-02 08:48:41,955 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=156, Invalid=444, Unknown=0, NotChecked=0, Total=600 [2018-02-02 08:48:41,955 INFO L87 Difference]: Start difference. First operand 63 states and 63 transitions. Second operand 25 states. [2018-02-02 08:48:42,139 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 08:48:42,139 INFO L93 Difference]: Finished difference Result 68 states and 68 transitions. [2018-02-02 08:48:42,140 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-02-02 08:48:42,140 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 57 [2018-02-02 08:48:42,140 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 08:48:42,140 INFO L225 Difference]: With dead ends: 68 [2018-02-02 08:48:42,140 INFO L226 Difference]: Without dead ends: 68 [2018-02-02 08:48:42,140 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 69 GetRequests, 46 SyntacticMatches, 0 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 207 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=156, Invalid=444, Unknown=0, NotChecked=0, Total=600 [2018-02-02 08:48:42,141 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 68 states. [2018-02-02 08:48:42,142 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 68 to 68. [2018-02-02 08:48:42,143 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 68 states. [2018-02-02 08:48:42,143 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 68 states to 68 states and 68 transitions. [2018-02-02 08:48:42,143 INFO L78 Accepts]: Start accepts. Automaton has 68 states and 68 transitions. Word has length 57 [2018-02-02 08:48:42,143 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 08:48:42,143 INFO L432 AbstractCegarLoop]: Abstraction has 68 states and 68 transitions. [2018-02-02 08:48:42,144 INFO L433 AbstractCegarLoop]: Interpolant automaton has 25 states. [2018-02-02 08:48:42,144 INFO L276 IsEmpty]: Start isEmpty. Operand 68 states and 68 transitions. [2018-02-02 08:48:42,144 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 63 [2018-02-02 08:48:42,144 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 08:48:42,144 INFO L351 BasicCegarLoop]: trace histogram [12, 11, 11, 11, 11, 1, 1, 1, 1, 1, 1] [2018-02-02 08:48:42,145 INFO L371 AbstractCegarLoop]: === Iteration 16 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-02-02 08:48:42,145 INFO L82 PathProgramCache]: Analyzing trace with hash -116235209, now seen corresponding path program 11 times [2018-02-02 08:48:42,145 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 08:48:42,145 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 08:48:42,146 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 08:48:42,146 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-02 08:48:42,146 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 08:48:42,153 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 08:48:42,154 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 08:48:42,250 INFO L134 CoverageAnalysis]: Checked inductivity of 297 backedges. 0 proven. 297 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 08:48:42,251 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-02 08:48:42,251 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-02 08:48:42,259 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-02-02 08:48:42,265 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:48:42,267 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:48:42,268 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:48:42,269 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:48:42,270 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:48:42,271 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:48:42,272 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:48:42,274 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:48:42,275 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:48:42,277 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:48:42,279 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:48:42,281 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:48:42,282 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-02 08:48:42,284 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-02 08:48:42,426 INFO L134 CoverageAnalysis]: Checked inductivity of 297 backedges. 0 proven. 297 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 08:48:42,453 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-02 08:48:42,454 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 13] total 25 [2018-02-02 08:48:42,454 INFO L409 AbstractCegarLoop]: Interpolant automaton has 26 states [2018-02-02 08:48:42,454 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2018-02-02 08:48:42,454 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=181, Invalid=469, Unknown=0, NotChecked=0, Total=650 [2018-02-02 08:48:42,455 INFO L87 Difference]: Start difference. First operand 68 states and 68 transitions. Second operand 26 states. [2018-02-02 08:48:42,722 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 08:48:42,722 INFO L93 Difference]: Finished difference Result 73 states and 73 transitions. [2018-02-02 08:48:42,722 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-02-02 08:48:42,722 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 62 [2018-02-02 08:48:42,723 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 08:48:42,723 INFO L225 Difference]: With dead ends: 73 [2018-02-02 08:48:42,723 INFO L226 Difference]: Without dead ends: 73 [2018-02-02 08:48:42,723 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 76 GetRequests, 51 SyntacticMatches, 0 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 243 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=195, Invalid=507, Unknown=0, NotChecked=0, Total=702 [2018-02-02 08:48:42,724 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 73 states. [2018-02-02 08:48:42,725 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 73 to 73. [2018-02-02 08:48:42,725 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 73 states. [2018-02-02 08:48:42,726 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 73 states to 73 states and 73 transitions. [2018-02-02 08:48:42,726 INFO L78 Accepts]: Start accepts. Automaton has 73 states and 73 transitions. Word has length 62 [2018-02-02 08:48:42,726 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 08:48:42,726 INFO L432 AbstractCegarLoop]: Abstraction has 73 states and 73 transitions. [2018-02-02 08:48:42,726 INFO L433 AbstractCegarLoop]: Interpolant automaton has 26 states. [2018-02-02 08:48:42,726 INFO L276 IsEmpty]: Start isEmpty. Operand 73 states and 73 transitions. [2018-02-02 08:48:42,727 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2018-02-02 08:48:42,727 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 08:48:42,727 INFO L351 BasicCegarLoop]: trace histogram [13, 12, 12, 12, 12, 1, 1, 1, 1, 1, 1] [2018-02-02 08:48:42,727 INFO L371 AbstractCegarLoop]: === Iteration 17 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-02-02 08:48:42,727 INFO L82 PathProgramCache]: Analyzing trace with hash -414879332, now seen corresponding path program 12 times [2018-02-02 08:48:42,728 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 08:48:42,728 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 08:48:42,728 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 08:48:42,728 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-02 08:48:42,729 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 08:48:42,735 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 08:48:42,736 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 08:48:42,835 INFO L134 CoverageAnalysis]: Checked inductivity of 354 backedges. 0 proven. 354 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 08:48:42,835 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-02 08:48:42,835 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-02 08:48:42,840 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-02-02 08:48:42,842 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:48:42,843 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:48:42,844 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:48:42,845 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:48:42,846 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:48:42,847 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:48:42,848 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:48:42,849 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:48:42,850 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:48:42,851 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:48:42,852 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:48:42,854 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:48:42,856 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:48:42,856 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-02 08:48:42,857 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-02 08:48:42,904 INFO L134 CoverageAnalysis]: Checked inductivity of 354 backedges. 0 proven. 354 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 08:48:42,922 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-02 08:48:42,923 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 14] total 19 [2018-02-02 08:48:42,923 INFO L409 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-02-02 08:48:42,923 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-02-02 08:48:42,923 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=117, Invalid=263, Unknown=0, NotChecked=0, Total=380 [2018-02-02 08:48:42,923 INFO L87 Difference]: Start difference. First operand 73 states and 73 transitions. Second operand 20 states. [2018-02-02 08:48:43,087 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 08:48:43,087 INFO L93 Difference]: Finished difference Result 78 states and 78 transitions. [2018-02-02 08:48:43,088 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-02-02 08:48:43,088 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 67 [2018-02-02 08:48:43,088 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 08:48:43,088 INFO L225 Difference]: With dead ends: 78 [2018-02-02 08:48:43,088 INFO L226 Difference]: Without dead ends: 78 [2018-02-02 08:48:43,088 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 93 GetRequests, 63 SyntacticMatches, 0 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 131 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=302, Invalid=690, Unknown=0, NotChecked=0, Total=992 [2018-02-02 08:48:43,089 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 78 states. [2018-02-02 08:48:43,089 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 78 to 78. [2018-02-02 08:48:43,090 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 78 states. [2018-02-02 08:48:43,090 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 78 states to 78 states and 78 transitions. [2018-02-02 08:48:43,090 INFO L78 Accepts]: Start accepts. Automaton has 78 states and 78 transitions. Word has length 67 [2018-02-02 08:48:43,090 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 08:48:43,090 INFO L432 AbstractCegarLoop]: Abstraction has 78 states and 78 transitions. [2018-02-02 08:48:43,090 INFO L433 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-02-02 08:48:43,090 INFO L276 IsEmpty]: Start isEmpty. Operand 78 states and 78 transitions. [2018-02-02 08:48:43,091 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2018-02-02 08:48:43,091 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 08:48:43,091 INFO L351 BasicCegarLoop]: trace histogram [14, 13, 13, 13, 13, 1, 1, 1, 1, 1, 1] [2018-02-02 08:48:43,091 INFO L371 AbstractCegarLoop]: === Iteration 18 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-02-02 08:48:43,091 INFO L82 PathProgramCache]: Analyzing trace with hash -1135871145, now seen corresponding path program 13 times [2018-02-02 08:48:43,091 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 08:48:43,091 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 08:48:43,091 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 08:48:43,091 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-02 08:48:43,092 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 08:48:43,096 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 08:48:43,096 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 08:48:43,218 INFO L134 CoverageAnalysis]: Checked inductivity of 416 backedges. 0 proven. 416 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 08:48:43,218 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-02 08:48:43,218 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-02 08:48:43,223 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-02 08:48:43,233 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 08:48:43,235 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-02 08:48:43,326 INFO L134 CoverageAnalysis]: Checked inductivity of 416 backedges. 0 proven. 416 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 08:48:43,344 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-02 08:48:43,345 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 15] total 30 [2018-02-02 08:48:43,345 INFO L409 AbstractCegarLoop]: Interpolant automaton has 31 states [2018-02-02 08:48:43,345 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 31 interpolants. [2018-02-02 08:48:43,345 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=255, Invalid=675, Unknown=0, NotChecked=0, Total=930 [2018-02-02 08:48:43,345 INFO L87 Difference]: Start difference. First operand 78 states and 78 transitions. Second operand 31 states. [2018-02-02 08:48:43,623 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 08:48:43,623 INFO L93 Difference]: Finished difference Result 83 states and 83 transitions. [2018-02-02 08:48:43,623 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-02-02 08:48:43,623 INFO L78 Accepts]: Start accepts. Automaton has 31 states. Word has length 72 [2018-02-02 08:48:43,624 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 08:48:43,624 INFO L225 Difference]: With dead ends: 83 [2018-02-02 08:48:43,624 INFO L226 Difference]: Without dead ends: 83 [2018-02-02 08:48:43,624 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 87 GetRequests, 58 SyntacticMatches, 0 SemanticMatches, 29 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 363 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=255, Invalid=675, Unknown=0, NotChecked=0, Total=930 [2018-02-02 08:48:43,625 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 83 states. [2018-02-02 08:48:43,625 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 83 to 83. [2018-02-02 08:48:43,625 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 83 states. [2018-02-02 08:48:43,626 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 83 states to 83 states and 83 transitions. [2018-02-02 08:48:43,626 INFO L78 Accepts]: Start accepts. Automaton has 83 states and 83 transitions. Word has length 72 [2018-02-02 08:48:43,626 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 08:48:43,626 INFO L432 AbstractCegarLoop]: Abstraction has 83 states and 83 transitions. [2018-02-02 08:48:43,626 INFO L433 AbstractCegarLoop]: Interpolant automaton has 31 states. [2018-02-02 08:48:43,627 INFO L276 IsEmpty]: Start isEmpty. Operand 83 states and 83 transitions. [2018-02-02 08:48:43,631 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2018-02-02 08:48:43,631 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 08:48:43,631 INFO L351 BasicCegarLoop]: trace histogram [15, 14, 14, 14, 14, 1, 1, 1, 1, 1, 1] [2018-02-02 08:48:43,631 INFO L371 AbstractCegarLoop]: === Iteration 19 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-02-02 08:48:43,631 INFO L82 PathProgramCache]: Analyzing trace with hash 571297404, now seen corresponding path program 14 times [2018-02-02 08:48:43,631 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 08:48:43,631 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 08:48:43,632 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 08:48:43,632 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-02 08:48:43,632 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 08:48:43,637 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 08:48:43,637 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 08:48:43,816 INFO L134 CoverageAnalysis]: Checked inductivity of 483 backedges. 0 proven. 483 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 08:48:43,816 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-02 08:48:43,816 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-02 08:48:43,821 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-02-02 08:48:43,824 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:48:43,832 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:48:43,833 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-02 08:48:43,835 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-02 08:48:43,943 INFO L134 CoverageAnalysis]: Checked inductivity of 483 backedges. 0 proven. 483 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 08:48:43,961 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-02 08:48:43,961 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 16] total 32 [2018-02-02 08:48:43,961 INFO L409 AbstractCegarLoop]: Interpolant automaton has 33 states [2018-02-02 08:48:43,962 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 33 interpolants. [2018-02-02 08:48:43,962 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=272, Invalid=784, Unknown=0, NotChecked=0, Total=1056 [2018-02-02 08:48:43,962 INFO L87 Difference]: Start difference. First operand 83 states and 83 transitions. Second operand 33 states. [2018-02-02 08:48:44,171 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 08:48:44,171 INFO L93 Difference]: Finished difference Result 88 states and 88 transitions. [2018-02-02 08:48:44,171 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-02-02 08:48:44,171 INFO L78 Accepts]: Start accepts. Automaton has 33 states. Word has length 77 [2018-02-02 08:48:44,171 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 08:48:44,172 INFO L225 Difference]: With dead ends: 88 [2018-02-02 08:48:44,172 INFO L226 Difference]: Without dead ends: 88 [2018-02-02 08:48:44,172 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 93 GetRequests, 62 SyntacticMatches, 0 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 403 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=272, Invalid=784, Unknown=0, NotChecked=0, Total=1056 [2018-02-02 08:48:44,172 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 88 states. [2018-02-02 08:48:44,173 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 88 to 88. [2018-02-02 08:48:44,173 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 88 states. [2018-02-02 08:48:44,173 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 88 states to 88 states and 88 transitions. [2018-02-02 08:48:44,173 INFO L78 Accepts]: Start accepts. Automaton has 88 states and 88 transitions. Word has length 77 [2018-02-02 08:48:44,173 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 08:48:44,173 INFO L432 AbstractCegarLoop]: Abstraction has 88 states and 88 transitions. [2018-02-02 08:48:44,173 INFO L433 AbstractCegarLoop]: Interpolant automaton has 33 states. [2018-02-02 08:48:44,173 INFO L276 IsEmpty]: Start isEmpty. Operand 88 states and 88 transitions. [2018-02-02 08:48:44,174 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2018-02-02 08:48:44,174 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 08:48:44,174 INFO L351 BasicCegarLoop]: trace histogram [16, 15, 15, 15, 15, 1, 1, 1, 1, 1, 1] [2018-02-02 08:48:44,174 INFO L371 AbstractCegarLoop]: === Iteration 20 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-02-02 08:48:44,174 INFO L82 PathProgramCache]: Analyzing trace with hash 239807095, now seen corresponding path program 15 times [2018-02-02 08:48:44,174 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 08:48:44,174 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 08:48:44,175 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 08:48:44,175 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-02 08:48:44,175 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 08:48:44,180 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 08:48:44,181 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 08:48:44,282 INFO L134 CoverageAnalysis]: Checked inductivity of 555 backedges. 0 proven. 555 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 08:48:44,282 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-02 08:48:44,282 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-02 08:48:44,287 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-02-02 08:48:44,290 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:48:44,290 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:48:44,291 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:48:44,292 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:48:44,293 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:48:44,294 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:48:44,295 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:48:44,296 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:48:44,297 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:48:44,298 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:48:44,300 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:48:44,301 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:48:44,302 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:48:44,304 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:48:44,306 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:48:44,308 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:48:44,309 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-02 08:48:44,310 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-02 08:48:44,327 INFO L134 CoverageAnalysis]: Checked inductivity of 555 backedges. 0 proven. 555 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 08:48:44,345 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-02 08:48:44,345 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 18] total 18 [2018-02-02 08:48:44,345 INFO L409 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-02-02 08:48:44,346 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-02-02 08:48:44,346 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=141, Invalid=201, Unknown=0, NotChecked=0, Total=342 [2018-02-02 08:48:44,346 INFO L87 Difference]: Start difference. First operand 88 states and 88 transitions. Second operand 19 states. [2018-02-02 08:48:44,522 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 08:48:44,522 INFO L93 Difference]: Finished difference Result 93 states and 93 transitions. [2018-02-02 08:48:44,522 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-02-02 08:48:44,522 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 82 [2018-02-02 08:48:44,523 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 08:48:44,523 INFO L225 Difference]: With dead ends: 93 [2018-02-02 08:48:44,523 INFO L226 Difference]: Without dead ends: 93 [2018-02-02 08:48:44,524 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 114 GetRequests, 82 SyntacticMatches, 0 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 134 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=411, Invalid=711, Unknown=0, NotChecked=0, Total=1122 [2018-02-02 08:48:44,524 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 93 states. [2018-02-02 08:48:44,525 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 93 to 93. [2018-02-02 08:48:44,525 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 93 states. [2018-02-02 08:48:44,526 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 93 states to 93 states and 93 transitions. [2018-02-02 08:48:44,526 INFO L78 Accepts]: Start accepts. Automaton has 93 states and 93 transitions. Word has length 82 [2018-02-02 08:48:44,526 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 08:48:44,526 INFO L432 AbstractCegarLoop]: Abstraction has 93 states and 93 transitions. [2018-02-02 08:48:44,526 INFO L433 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-02-02 08:48:44,526 INFO L276 IsEmpty]: Start isEmpty. Operand 93 states and 93 transitions. [2018-02-02 08:48:44,527 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 88 [2018-02-02 08:48:44,527 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 08:48:44,527 INFO L351 BasicCegarLoop]: trace histogram [17, 16, 16, 16, 16, 1, 1, 1, 1, 1, 1] [2018-02-02 08:48:44,527 INFO L371 AbstractCegarLoop]: === Iteration 21 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-02-02 08:48:44,527 INFO L82 PathProgramCache]: Analyzing trace with hash -1580297380, now seen corresponding path program 16 times [2018-02-02 08:48:44,527 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 08:48:44,528 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 08:48:44,528 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 08:48:44,528 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-02 08:48:44,528 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 08:48:44,534 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 08:48:44,535 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 08:48:44,707 INFO L134 CoverageAnalysis]: Checked inductivity of 632 backedges. 0 proven. 632 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 08:48:44,708 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-02 08:48:44,708 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 19 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-02 08:48:44,712 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-02-02 08:48:44,721 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-02 08:48:44,723 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-02 08:48:44,736 INFO L134 CoverageAnalysis]: Checked inductivity of 632 backedges. 0 proven. 632 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 08:48:44,753 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-02 08:48:44,754 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 18] total 18 [2018-02-02 08:48:44,754 INFO L409 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-02-02 08:48:44,754 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-02-02 08:48:44,754 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=307, Unknown=0, NotChecked=0, Total=342 [2018-02-02 08:48:44,754 INFO L87 Difference]: Start difference. First operand 93 states and 93 transitions. Second operand 19 states. [2018-02-02 08:48:45,111 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 08:48:45,111 INFO L93 Difference]: Finished difference Result 98 states and 98 transitions. [2018-02-02 08:48:45,111 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-02-02 08:48:45,111 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 87 [2018-02-02 08:48:45,111 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 08:48:45,112 INFO L225 Difference]: With dead ends: 98 [2018-02-02 08:48:45,112 INFO L226 Difference]: Without dead ends: 98 [2018-02-02 08:48:45,112 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 104 GetRequests, 86 SyntacticMatches, 1 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=35, Invalid=307, Unknown=0, NotChecked=0, Total=342 [2018-02-02 08:48:45,112 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 98 states. [2018-02-02 08:48:45,113 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 98 to 98. [2018-02-02 08:48:45,113 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 98 states. [2018-02-02 08:48:45,114 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 98 states to 98 states and 98 transitions. [2018-02-02 08:48:45,114 INFO L78 Accepts]: Start accepts. Automaton has 98 states and 98 transitions. Word has length 87 [2018-02-02 08:48:45,114 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 08:48:45,114 INFO L432 AbstractCegarLoop]: Abstraction has 98 states and 98 transitions. [2018-02-02 08:48:45,114 INFO L433 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-02-02 08:48:45,114 INFO L276 IsEmpty]: Start isEmpty. Operand 98 states and 98 transitions. [2018-02-02 08:48:45,115 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2018-02-02 08:48:45,115 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 08:48:45,115 INFO L351 BasicCegarLoop]: trace histogram [18, 17, 17, 17, 17, 1, 1, 1, 1, 1, 1] [2018-02-02 08:48:45,115 INFO L371 AbstractCegarLoop]: === Iteration 22 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-02-02 08:48:45,115 INFO L82 PathProgramCache]: Analyzing trace with hash -957222505, now seen corresponding path program 17 times [2018-02-02 08:48:45,115 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 08:48:45,115 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 08:48:45,116 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 08:48:45,116 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-02 08:48:45,116 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 08:48:45,123 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 08:48:45,124 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 08:48:45,262 INFO L134 CoverageAnalysis]: Checked inductivity of 714 backedges. 0 proven. 714 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 08:48:45,262 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-02 08:48:45,262 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-02 08:48:45,272 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-02-02 08:48:45,275 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:48:45,276 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:48:45,277 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:48:45,278 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:48:45,279 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:48:45,280 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:48:45,281 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:48:45,282 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:48:45,284 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:48:45,290 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:48:45,293 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:48:45,295 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:48:45,298 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:48:45,301 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:48:45,304 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:48:45,309 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:48:45,313 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:48:45,318 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:48:45,319 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-02 08:48:45,321 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-02 08:48:45,544 INFO L134 CoverageAnalysis]: Checked inductivity of 714 backedges. 0 proven. 714 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 08:48:45,561 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-02 08:48:45,561 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 19] total 37 [2018-02-02 08:48:45,562 INFO L409 AbstractCegarLoop]: Interpolant automaton has 38 states [2018-02-02 08:48:45,562 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2018-02-02 08:48:45,562 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=379, Invalid=1027, Unknown=0, NotChecked=0, Total=1406 [2018-02-02 08:48:45,562 INFO L87 Difference]: Start difference. First operand 98 states and 98 transitions. Second operand 38 states. [2018-02-02 08:48:46,013 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 08:48:46,013 INFO L93 Difference]: Finished difference Result 103 states and 103 transitions. [2018-02-02 08:48:46,014 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-02-02 08:48:46,014 INFO L78 Accepts]: Start accepts. Automaton has 38 states. Word has length 92 [2018-02-02 08:48:46,014 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 08:48:46,014 INFO L225 Difference]: With dead ends: 103 [2018-02-02 08:48:46,014 INFO L226 Difference]: Without dead ends: 103 [2018-02-02 08:48:46,015 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 112 GetRequests, 75 SyntacticMatches, 0 SemanticMatches, 37 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 579 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=399, Invalid=1083, Unknown=0, NotChecked=0, Total=1482 [2018-02-02 08:48:46,015 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 103 states. [2018-02-02 08:48:46,016 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 103 to 103. [2018-02-02 08:48:46,016 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 103 states. [2018-02-02 08:48:46,017 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 103 states to 103 states and 103 transitions. [2018-02-02 08:48:46,017 INFO L78 Accepts]: Start accepts. Automaton has 103 states and 103 transitions. Word has length 92 [2018-02-02 08:48:46,017 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 08:48:46,017 INFO L432 AbstractCegarLoop]: Abstraction has 103 states and 103 transitions. [2018-02-02 08:48:46,017 INFO L433 AbstractCegarLoop]: Interpolant automaton has 38 states. [2018-02-02 08:48:46,017 INFO L276 IsEmpty]: Start isEmpty. Operand 103 states and 103 transitions. [2018-02-02 08:48:46,018 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 98 [2018-02-02 08:48:46,018 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 08:48:46,018 INFO L351 BasicCegarLoop]: trace histogram [19, 18, 18, 18, 18, 1, 1, 1, 1, 1, 1] [2018-02-02 08:48:46,018 INFO L371 AbstractCegarLoop]: === Iteration 23 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-02-02 08:48:46,018 INFO L82 PathProgramCache]: Analyzing trace with hash 736575548, now seen corresponding path program 18 times [2018-02-02 08:48:46,018 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 08:48:46,018 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 08:48:46,019 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 08:48:46,019 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-02 08:48:46,019 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 08:48:46,023 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 08:48:46,024 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 08:48:46,142 INFO L134 CoverageAnalysis]: Checked inductivity of 801 backedges. 0 proven. 801 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 08:48:46,142 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-02 08:48:46,142 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 21 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-02 08:48:46,146 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-02-02 08:48:46,149 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:48:46,150 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:48:46,151 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:48:46,152 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:48:46,152 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:48:46,153 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:48:46,154 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:48:46,155 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:48:46,156 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:48:46,157 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:48:46,158 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:48:46,159 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:48:46,160 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:48:46,162 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:48:46,163 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:48:46,164 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:48:46,166 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:48:46,168 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:48:46,170 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:48:46,170 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-02 08:48:46,172 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-02 08:48:46,211 INFO L134 CoverageAnalysis]: Checked inductivity of 801 backedges. 0 proven. 801 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 08:48:46,231 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-02 08:48:46,231 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 21] total 24 [2018-02-02 08:48:46,232 INFO L409 AbstractCegarLoop]: Interpolant automaton has 25 states [2018-02-02 08:48:46,232 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2018-02-02 08:48:46,232 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=208, Invalid=392, Unknown=0, NotChecked=0, Total=600 [2018-02-02 08:48:46,232 INFO L87 Difference]: Start difference. First operand 103 states and 103 transitions. Second operand 25 states. [2018-02-02 08:48:46,475 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 08:48:46,475 INFO L93 Difference]: Finished difference Result 108 states and 108 transitions. [2018-02-02 08:48:46,476 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-02-02 08:48:46,476 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 97 [2018-02-02 08:48:46,476 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 08:48:46,476 INFO L225 Difference]: With dead ends: 108 [2018-02-02 08:48:46,476 INFO L226 Difference]: Without dead ends: 108 [2018-02-02 08:48:46,477 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 135 GetRequests, 94 SyntacticMatches, 0 SemanticMatches, 41 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 244 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=620, Invalid=1186, Unknown=0, NotChecked=0, Total=1806 [2018-02-02 08:48:46,477 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 108 states. [2018-02-02 08:48:46,478 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 108 to 108. [2018-02-02 08:48:46,478 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 108 states. [2018-02-02 08:48:46,479 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 108 states to 108 states and 108 transitions. [2018-02-02 08:48:46,479 INFO L78 Accepts]: Start accepts. Automaton has 108 states and 108 transitions. Word has length 97 [2018-02-02 08:48:46,479 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 08:48:46,479 INFO L432 AbstractCegarLoop]: Abstraction has 108 states and 108 transitions. [2018-02-02 08:48:46,479 INFO L433 AbstractCegarLoop]: Interpolant automaton has 25 states. [2018-02-02 08:48:46,479 INFO L276 IsEmpty]: Start isEmpty. Operand 108 states and 108 transitions. [2018-02-02 08:48:46,479 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 103 [2018-02-02 08:48:46,479 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 08:48:46,479 INFO L351 BasicCegarLoop]: trace histogram [20, 19, 19, 19, 19, 1, 1, 1, 1, 1, 1] [2018-02-02 08:48:46,479 INFO L371 AbstractCegarLoop]: === Iteration 24 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-02-02 08:48:46,479 INFO L82 PathProgramCache]: Analyzing trace with hash -878554953, now seen corresponding path program 19 times [2018-02-02 08:48:46,480 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 08:48:46,480 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 08:48:46,480 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 08:48:46,480 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-02 08:48:46,480 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 08:48:46,484 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 08:48:46,485 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 08:48:46,661 INFO L134 CoverageAnalysis]: Checked inductivity of 893 backedges. 0 proven. 893 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 08:48:46,661 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-02 08:48:46,661 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-02 08:48:46,671 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-02 08:48:46,684 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 08:48:46,686 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-02 08:48:46,837 INFO L134 CoverageAnalysis]: Checked inductivity of 893 backedges. 0 proven. 893 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 08:48:46,865 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-02 08:48:46,865 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 21] total 42 [2018-02-02 08:48:46,865 INFO L409 AbstractCegarLoop]: Interpolant automaton has 43 states [2018-02-02 08:48:46,865 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 43 interpolants. [2018-02-02 08:48:46,866 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=483, Invalid=1323, Unknown=0, NotChecked=0, Total=1806 [2018-02-02 08:48:46,866 INFO L87 Difference]: Start difference. First operand 108 states and 108 transitions. Second operand 43 states. [2018-02-02 08:48:47,382 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 08:48:47,383 INFO L93 Difference]: Finished difference Result 113 states and 113 transitions. [2018-02-02 08:48:47,383 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-02-02 08:48:47,383 INFO L78 Accepts]: Start accepts. Automaton has 43 states. Word has length 102 [2018-02-02 08:48:47,383 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 08:48:47,383 INFO L225 Difference]: With dead ends: 113 [2018-02-02 08:48:47,383 INFO L226 Difference]: Without dead ends: 113 [2018-02-02 08:48:47,384 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 123 GetRequests, 82 SyntacticMatches, 0 SemanticMatches, 41 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 759 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=483, Invalid=1323, Unknown=0, NotChecked=0, Total=1806 [2018-02-02 08:48:47,384 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 113 states. [2018-02-02 08:48:47,386 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 113 to 113. [2018-02-02 08:48:47,386 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 113 states. [2018-02-02 08:48:47,386 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 113 states to 113 states and 113 transitions. [2018-02-02 08:48:47,386 INFO L78 Accepts]: Start accepts. Automaton has 113 states and 113 transitions. Word has length 102 [2018-02-02 08:48:47,387 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 08:48:47,387 INFO L432 AbstractCegarLoop]: Abstraction has 113 states and 113 transitions. [2018-02-02 08:48:47,387 INFO L433 AbstractCegarLoop]: Interpolant automaton has 43 states. [2018-02-02 08:48:47,387 INFO L276 IsEmpty]: Start isEmpty. Operand 113 states and 113 transitions. [2018-02-02 08:48:47,389 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 108 [2018-02-02 08:48:47,389 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 08:48:47,390 INFO L351 BasicCegarLoop]: trace histogram [21, 20, 20, 20, 20, 1, 1, 1, 1, 1, 1] [2018-02-02 08:48:47,390 INFO L371 AbstractCegarLoop]: === Iteration 25 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-02-02 08:48:47,390 INFO L82 PathProgramCache]: Analyzing trace with hash -399157988, now seen corresponding path program 20 times [2018-02-02 08:48:47,390 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 08:48:47,390 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 08:48:47,390 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 08:48:47,390 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-02 08:48:47,391 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 08:48:47,398 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 08:48:47,399 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 08:48:47,601 INFO L134 CoverageAnalysis]: Checked inductivity of 990 backedges. 0 proven. 990 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 08:48:47,601 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-02 08:48:47,601 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 23 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-02 08:48:47,606 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-02-02 08:48:47,608 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:48:47,615 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:48:47,617 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-02 08:48:47,619 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-02 08:48:47,864 INFO L134 CoverageAnalysis]: Checked inductivity of 990 backedges. 0 proven. 990 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 08:48:47,894 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-02 08:48:47,894 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 22] total 44 [2018-02-02 08:48:47,894 INFO L409 AbstractCegarLoop]: Interpolant automaton has 45 states [2018-02-02 08:48:47,894 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 45 interpolants. [2018-02-02 08:48:47,895 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=462, Invalid=1518, Unknown=0, NotChecked=0, Total=1980 [2018-02-02 08:48:47,895 INFO L87 Difference]: Start difference. First operand 113 states and 113 transitions. Second operand 45 states. [2018-02-02 08:48:48,450 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 08:48:48,450 INFO L93 Difference]: Finished difference Result 118 states and 118 transitions. [2018-02-02 08:48:48,451 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-02-02 08:48:48,451 INFO L78 Accepts]: Start accepts. Automaton has 45 states. Word has length 107 [2018-02-02 08:48:48,451 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 08:48:48,451 INFO L225 Difference]: With dead ends: 118 [2018-02-02 08:48:48,451 INFO L226 Difference]: Without dead ends: 118 [2018-02-02 08:48:48,452 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 129 GetRequests, 86 SyntacticMatches, 0 SemanticMatches, 43 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 770 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=462, Invalid=1518, Unknown=0, NotChecked=0, Total=1980 [2018-02-02 08:48:48,452 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 118 states. [2018-02-02 08:48:48,453 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 118 to 118. [2018-02-02 08:48:48,453 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 118 states. [2018-02-02 08:48:48,453 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 118 states to 118 states and 118 transitions. [2018-02-02 08:48:48,453 INFO L78 Accepts]: Start accepts. Automaton has 118 states and 118 transitions. Word has length 107 [2018-02-02 08:48:48,453 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 08:48:48,453 INFO L432 AbstractCegarLoop]: Abstraction has 118 states and 118 transitions. [2018-02-02 08:48:48,453 INFO L433 AbstractCegarLoop]: Interpolant automaton has 45 states. [2018-02-02 08:48:48,453 INFO L276 IsEmpty]: Start isEmpty. Operand 118 states and 118 transitions. [2018-02-02 08:48:48,453 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 113 [2018-02-02 08:48:48,454 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 08:48:48,454 INFO L351 BasicCegarLoop]: trace histogram [22, 21, 21, 21, 21, 1, 1, 1, 1, 1, 1] [2018-02-02 08:48:48,454 INFO L371 AbstractCegarLoop]: === Iteration 26 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-02-02 08:48:48,454 INFO L82 PathProgramCache]: Analyzing trace with hash 792610775, now seen corresponding path program 21 times [2018-02-02 08:48:48,454 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 08:48:48,454 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 08:48:48,454 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 08:48:48,454 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-02 08:48:48,454 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 08:48:48,470 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 08:48:48,470 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 08:48:48,719 INFO L134 CoverageAnalysis]: Checked inductivity of 1092 backedges. 0 proven. 1092 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 08:48:48,719 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-02 08:48:48,719 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-02 08:48:48,729 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-02-02 08:48:48,733 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:48:48,734 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:48:48,735 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:48:48,736 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:48:48,737 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:48:48,738 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:48:48,739 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:48:48,741 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:48:48,743 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:48:48,744 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:48:48,746 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:48:48,748 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:48:48,757 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:48:48,759 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:48:48,761 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:48:48,763 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:48:48,766 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:48:48,769 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:48:48,772 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:48:48,775 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:48:48,779 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:48:48,782 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:48:48,782 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-02 08:48:48,784 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-02 08:48:48,802 INFO L134 CoverageAnalysis]: Checked inductivity of 1092 backedges. 0 proven. 1092 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 08:48:48,820 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-02 08:48:48,820 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 24] total 24 [2018-02-02 08:48:48,821 INFO L409 AbstractCegarLoop]: Interpolant automaton has 25 states [2018-02-02 08:48:48,821 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2018-02-02 08:48:48,821 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=258, Invalid=342, Unknown=0, NotChecked=0, Total=600 [2018-02-02 08:48:48,821 INFO L87 Difference]: Start difference. First operand 118 states and 118 transitions. Second operand 25 states. [2018-02-02 08:48:49,113 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 08:48:49,113 INFO L93 Difference]: Finished difference Result 123 states and 123 transitions. [2018-02-02 08:48:49,115 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-02-02 08:48:49,115 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 112 [2018-02-02 08:48:49,115 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 08:48:49,115 INFO L225 Difference]: With dead ends: 123 [2018-02-02 08:48:49,115 INFO L226 Difference]: Without dead ends: 123 [2018-02-02 08:48:49,116 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 156 GetRequests, 112 SyntacticMatches, 0 SemanticMatches, 44 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 251 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=762, Invalid=1308, Unknown=0, NotChecked=0, Total=2070 [2018-02-02 08:48:49,116 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 123 states. [2018-02-02 08:48:49,117 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 123 to 123. [2018-02-02 08:48:49,117 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 123 states. [2018-02-02 08:48:49,118 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 123 states to 123 states and 123 transitions. [2018-02-02 08:48:49,118 INFO L78 Accepts]: Start accepts. Automaton has 123 states and 123 transitions. Word has length 112 [2018-02-02 08:48:49,118 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 08:48:49,118 INFO L432 AbstractCegarLoop]: Abstraction has 123 states and 123 transitions. [2018-02-02 08:48:49,118 INFO L433 AbstractCegarLoop]: Interpolant automaton has 25 states. [2018-02-02 08:48:49,118 INFO L276 IsEmpty]: Start isEmpty. Operand 123 states and 123 transitions. [2018-02-02 08:48:49,119 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 118 [2018-02-02 08:48:49,119 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 08:48:49,119 INFO L351 BasicCegarLoop]: trace histogram [23, 22, 22, 22, 22, 1, 1, 1, 1, 1, 1] [2018-02-02 08:48:49,119 INFO L371 AbstractCegarLoop]: === Iteration 27 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-02-02 08:48:49,119 INFO L82 PathProgramCache]: Analyzing trace with hash 1092014588, now seen corresponding path program 22 times [2018-02-02 08:48:49,119 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 08:48:49,120 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 08:48:49,120 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 08:48:49,120 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-02 08:48:49,120 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 08:48:49,127 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 08:48:49,128 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 08:48:49,376 INFO L134 CoverageAnalysis]: Checked inductivity of 1199 backedges. 0 proven. 1199 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 08:48:49,376 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-02 08:48:49,376 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 25 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-02 08:48:49,386 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-02-02 08:48:49,412 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-02 08:48:49,414 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-02 08:48:49,675 INFO L134 CoverageAnalysis]: Checked inductivity of 1199 backedges. 0 proven. 1199 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 08:48:49,693 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-02 08:48:49,693 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 24] total 48 [2018-02-02 08:48:49,693 INFO L409 AbstractCegarLoop]: Interpolant automaton has 49 states [2018-02-02 08:48:49,694 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 49 interpolants. [2018-02-02 08:48:49,694 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=600, Invalid=1752, Unknown=0, NotChecked=0, Total=2352 [2018-02-02 08:48:49,694 INFO L87 Difference]: Start difference. First operand 123 states and 123 transitions. Second operand 49 states. [2018-02-02 08:48:50,177 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 08:48:50,177 INFO L93 Difference]: Finished difference Result 128 states and 128 transitions. [2018-02-02 08:48:50,177 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-02-02 08:48:50,177 INFO L78 Accepts]: Start accepts. Automaton has 49 states. Word has length 117 [2018-02-02 08:48:50,177 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 08:48:50,178 INFO L225 Difference]: With dead ends: 128 [2018-02-02 08:48:50,178 INFO L226 Difference]: Without dead ends: 128 [2018-02-02 08:48:50,178 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 141 GetRequests, 94 SyntacticMatches, 0 SemanticMatches, 47 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 987 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=600, Invalid=1752, Unknown=0, NotChecked=0, Total=2352 [2018-02-02 08:48:50,179 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 128 states. [2018-02-02 08:48:50,180 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 128 to 128. [2018-02-02 08:48:50,180 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 128 states. [2018-02-02 08:48:50,181 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 128 states to 128 states and 128 transitions. [2018-02-02 08:48:50,181 INFO L78 Accepts]: Start accepts. Automaton has 128 states and 128 transitions. Word has length 117 [2018-02-02 08:48:50,181 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 08:48:50,181 INFO L432 AbstractCegarLoop]: Abstraction has 128 states and 128 transitions. [2018-02-02 08:48:50,181 INFO L433 AbstractCegarLoop]: Interpolant automaton has 49 states. [2018-02-02 08:48:50,182 INFO L276 IsEmpty]: Start isEmpty. Operand 128 states and 128 transitions. [2018-02-02 08:48:50,182 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 123 [2018-02-02 08:48:50,182 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 08:48:50,182 INFO L351 BasicCegarLoop]: trace histogram [24, 23, 23, 23, 23, 1, 1, 1, 1, 1, 1] [2018-02-02 08:48:50,182 INFO L371 AbstractCegarLoop]: === Iteration 28 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-02-02 08:48:50,183 INFO L82 PathProgramCache]: Analyzing trace with hash 1378342647, now seen corresponding path program 23 times [2018-02-02 08:48:50,183 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 08:48:50,183 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 08:48:50,183 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 08:48:50,184 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-02 08:48:50,184 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 08:48:50,189 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 08:48:50,190 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 08:48:50,454 INFO L134 CoverageAnalysis]: Checked inductivity of 1311 backedges. 0 proven. 1311 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 08:48:50,455 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-02 08:48:50,455 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-02 08:48:50,462 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-02-02 08:48:50,469 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:48:50,470 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:48:50,471 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:48:50,472 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:48:50,473 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:48:50,475 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:48:50,476 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:48:50,477 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:48:50,479 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:48:50,481 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:48:50,483 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:48:50,485 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:48:50,487 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:48:50,489 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:48:50,492 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:48:50,495 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:48:50,498 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:48:50,502 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:48:50,506 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:48:50,511 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:48:50,516 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:48:50,521 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:48:50,530 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:48:50,541 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:48:50,542 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-02 08:48:50,546 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-02 08:48:50,858 INFO L134 CoverageAnalysis]: Checked inductivity of 1311 backedges. 0 proven. 1311 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 08:48:50,875 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-02 08:48:50,875 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [26, 25] total 49 [2018-02-02 08:48:50,875 INFO L409 AbstractCegarLoop]: Interpolant automaton has 50 states [2018-02-02 08:48:50,876 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 50 interpolants. [2018-02-02 08:48:50,876 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=649, Invalid=1801, Unknown=0, NotChecked=0, Total=2450 [2018-02-02 08:48:50,876 INFO L87 Difference]: Start difference. First operand 128 states and 128 transitions. Second operand 50 states. [2018-02-02 08:48:51,486 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 08:48:51,486 INFO L93 Difference]: Finished difference Result 133 states and 133 transitions. [2018-02-02 08:48:51,486 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2018-02-02 08:48:51,486 INFO L78 Accepts]: Start accepts. Automaton has 50 states. Word has length 122 [2018-02-02 08:48:51,486 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 08:48:51,487 INFO L225 Difference]: With dead ends: 133 [2018-02-02 08:48:51,487 INFO L226 Difference]: Without dead ends: 133 [2018-02-02 08:48:51,487 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 148 GetRequests, 99 SyntacticMatches, 0 SemanticMatches, 49 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1059 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=675, Invalid=1875, Unknown=0, NotChecked=0, Total=2550 [2018-02-02 08:48:51,487 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 133 states. [2018-02-02 08:48:51,488 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 133 to 133. [2018-02-02 08:48:51,489 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 133 states. [2018-02-02 08:48:51,489 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 133 states to 133 states and 133 transitions. [2018-02-02 08:48:51,489 INFO L78 Accepts]: Start accepts. Automaton has 133 states and 133 transitions. Word has length 122 [2018-02-02 08:48:51,489 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 08:48:51,490 INFO L432 AbstractCegarLoop]: Abstraction has 133 states and 133 transitions. [2018-02-02 08:48:51,490 INFO L433 AbstractCegarLoop]: Interpolant automaton has 50 states. [2018-02-02 08:48:51,490 INFO L276 IsEmpty]: Start isEmpty. Operand 133 states and 133 transitions. [2018-02-02 08:48:51,490 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 128 [2018-02-02 08:48:51,490 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 08:48:51,490 INFO L351 BasicCegarLoop]: trace histogram [25, 24, 24, 24, 24, 1, 1, 1, 1, 1, 1] [2018-02-02 08:48:51,490 INFO L371 AbstractCegarLoop]: === Iteration 29 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-02-02 08:48:51,490 INFO L82 PathProgramCache]: Analyzing trace with hash -1016482084, now seen corresponding path program 24 times [2018-02-02 08:48:51,490 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 08:48:51,490 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 08:48:51,491 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 08:48:51,491 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-02 08:48:51,491 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 08:48:51,497 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 08:48:51,497 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 08:48:51,705 INFO L134 CoverageAnalysis]: Checked inductivity of 1428 backedges. 0 proven. 1428 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 08:48:51,706 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-02 08:48:51,706 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 27 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 27 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-02 08:48:51,710 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-02-02 08:48:51,715 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:48:51,715 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:48:51,716 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:48:51,717 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:48:51,718 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:48:51,719 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:48:51,720 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:48:51,721 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:48:51,722 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:48:51,723 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:48:51,725 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:48:51,726 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:48:51,728 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:48:51,729 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:48:51,731 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:48:51,732 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:48:51,734 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:48:51,736 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:48:51,738 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:48:51,740 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:48:51,742 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:48:51,745 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:48:51,748 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:48:51,751 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:48:51,755 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:48:51,755 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-02 08:48:51,757 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-02 08:48:51,944 INFO L134 CoverageAnalysis]: Checked inductivity of 1428 backedges. 0 proven. 1428 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 08:48:51,962 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-02 08:48:51,962 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [27, 27] total 36 [2018-02-02 08:48:51,962 INFO L409 AbstractCegarLoop]: Interpolant automaton has 37 states [2018-02-02 08:48:51,962 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 37 interpolants. [2018-02-02 08:48:51,963 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=400, Invalid=932, Unknown=0, NotChecked=0, Total=1332 [2018-02-02 08:48:51,963 INFO L87 Difference]: Start difference. First operand 133 states and 133 transitions. Second operand 37 states. [2018-02-02 08:48:52,471 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 08:48:52,471 INFO L93 Difference]: Finished difference Result 138 states and 138 transitions. [2018-02-02 08:48:52,471 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2018-02-02 08:48:52,471 INFO L78 Accepts]: Start accepts. Automaton has 37 states. Word has length 127 [2018-02-02 08:48:52,472 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 08:48:52,472 INFO L225 Difference]: With dead ends: 138 [2018-02-02 08:48:52,472 INFO L226 Difference]: Without dead ends: 138 [2018-02-02 08:48:52,473 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 177 GetRequests, 118 SyntacticMatches, 0 SemanticMatches, 59 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 499 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=1067, Invalid=2593, Unknown=0, NotChecked=0, Total=3660 [2018-02-02 08:48:52,473 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 138 states. [2018-02-02 08:48:52,474 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 138 to 138. [2018-02-02 08:48:52,474 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 138 states. [2018-02-02 08:48:52,475 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 138 states to 138 states and 138 transitions. [2018-02-02 08:48:52,475 INFO L78 Accepts]: Start accepts. Automaton has 138 states and 138 transitions. Word has length 127 [2018-02-02 08:48:52,475 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 08:48:52,475 INFO L432 AbstractCegarLoop]: Abstraction has 138 states and 138 transitions. [2018-02-02 08:48:52,475 INFO L433 AbstractCegarLoop]: Interpolant automaton has 37 states. [2018-02-02 08:48:52,475 INFO L276 IsEmpty]: Start isEmpty. Operand 138 states and 138 transitions. [2018-02-02 08:48:52,475 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 133 [2018-02-02 08:48:52,475 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 08:48:52,475 INFO L351 BasicCegarLoop]: trace histogram [26, 25, 25, 25, 25, 1, 1, 1, 1, 1, 1] [2018-02-02 08:48:52,475 INFO L371 AbstractCegarLoop]: === Iteration 30 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-02-02 08:48:52,476 INFO L82 PathProgramCache]: Analyzing trace with hash 37813783, now seen corresponding path program 25 times [2018-02-02 08:48:52,476 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 08:48:52,476 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 08:48:52,476 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 08:48:52,476 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-02 08:48:52,476 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 08:48:52,480 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 08:48:52,481 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 08:48:52,703 INFO L134 CoverageAnalysis]: Checked inductivity of 1550 backedges. 0 proven. 1550 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 08:48:52,703 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-02 08:48:52,703 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-02 08:48:52,708 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-02 08:48:52,722 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 08:48:52,724 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-02 08:48:52,937 INFO L134 CoverageAnalysis]: Checked inductivity of 1550 backedges. 0 proven. 1550 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 08:48:52,955 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-02 08:48:52,955 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [28, 27] total 54 [2018-02-02 08:48:52,955 INFO L409 AbstractCegarLoop]: Interpolant automaton has 55 states [2018-02-02 08:48:52,955 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 55 interpolants. [2018-02-02 08:48:52,956 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=783, Invalid=2187, Unknown=0, NotChecked=0, Total=2970 [2018-02-02 08:48:52,956 INFO L87 Difference]: Start difference. First operand 138 states and 138 transitions. Second operand 55 states. [2018-02-02 08:48:53,607 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 08:48:53,607 INFO L93 Difference]: Finished difference Result 143 states and 143 transitions. [2018-02-02 08:48:53,607 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2018-02-02 08:48:53,607 INFO L78 Accepts]: Start accepts. Automaton has 55 states. Word has length 132 [2018-02-02 08:48:53,608 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 08:48:53,608 INFO L225 Difference]: With dead ends: 143 [2018-02-02 08:48:53,608 INFO L226 Difference]: Without dead ends: 143 [2018-02-02 08:48:53,609 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 159 GetRequests, 106 SyntacticMatches, 0 SemanticMatches, 53 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1299 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=783, Invalid=2187, Unknown=0, NotChecked=0, Total=2970 [2018-02-02 08:48:53,609 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 143 states. [2018-02-02 08:48:53,610 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 143 to 143. [2018-02-02 08:48:53,610 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 143 states. [2018-02-02 08:48:53,611 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 143 states to 143 states and 143 transitions. [2018-02-02 08:48:53,611 INFO L78 Accepts]: Start accepts. Automaton has 143 states and 143 transitions. Word has length 132 [2018-02-02 08:48:53,611 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 08:48:53,611 INFO L432 AbstractCegarLoop]: Abstraction has 143 states and 143 transitions. [2018-02-02 08:48:53,611 INFO L433 AbstractCegarLoop]: Interpolant automaton has 55 states. [2018-02-02 08:48:53,611 INFO L276 IsEmpty]: Start isEmpty. Operand 143 states and 143 transitions. [2018-02-02 08:48:53,611 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 138 [2018-02-02 08:48:53,611 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 08:48:53,611 INFO L351 BasicCegarLoop]: trace histogram [27, 26, 26, 26, 26, 1, 1, 1, 1, 1, 1] [2018-02-02 08:48:53,611 INFO L371 AbstractCegarLoop]: === Iteration 31 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-02-02 08:48:53,612 INFO L82 PathProgramCache]: Analyzing trace with hash -24378436, now seen corresponding path program 26 times [2018-02-02 08:48:53,612 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 08:48:53,612 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 08:48:53,612 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 08:48:53,612 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-02 08:48:53,612 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 08:48:53,619 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 08:48:53,619 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 08:48:53,941 INFO L134 CoverageAnalysis]: Checked inductivity of 1677 backedges. 0 proven. 1677 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 08:48:54,115 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-02 08:48:54,115 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 29 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 29 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-02 08:48:54,121 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-02-02 08:48:54,124 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:48:54,134 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:48:54,136 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-02 08:48:54,138 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-02 08:48:54,453 INFO L134 CoverageAnalysis]: Checked inductivity of 1677 backedges. 0 proven. 1677 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 08:48:54,469 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-02 08:48:54,470 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [29, 28] total 56 [2018-02-02 08:48:54,470 INFO L409 AbstractCegarLoop]: Interpolant automaton has 57 states [2018-02-02 08:48:54,470 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 57 interpolants. [2018-02-02 08:48:54,470 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=812, Invalid=2380, Unknown=0, NotChecked=0, Total=3192 [2018-02-02 08:48:54,471 INFO L87 Difference]: Start difference. First operand 143 states and 143 transitions. Second operand 57 states. [2018-02-02 08:48:55,054 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 08:48:55,054 INFO L93 Difference]: Finished difference Result 148 states and 148 transitions. [2018-02-02 08:48:55,055 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2018-02-02 08:48:55,055 INFO L78 Accepts]: Start accepts. Automaton has 57 states. Word has length 137 [2018-02-02 08:48:55,055 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 08:48:55,055 INFO L225 Difference]: With dead ends: 148 [2018-02-02 08:48:55,055 INFO L226 Difference]: Without dead ends: 148 [2018-02-02 08:48:55,056 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 165 GetRequests, 110 SyntacticMatches, 0 SemanticMatches, 55 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1375 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=812, Invalid=2380, Unknown=0, NotChecked=0, Total=3192 [2018-02-02 08:48:55,056 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 148 states. [2018-02-02 08:48:55,057 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 148 to 148. [2018-02-02 08:48:55,057 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 148 states. [2018-02-02 08:48:55,057 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 148 states to 148 states and 148 transitions. [2018-02-02 08:48:55,057 INFO L78 Accepts]: Start accepts. Automaton has 148 states and 148 transitions. Word has length 137 [2018-02-02 08:48:55,057 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 08:48:55,057 INFO L432 AbstractCegarLoop]: Abstraction has 148 states and 148 transitions. [2018-02-02 08:48:55,058 INFO L433 AbstractCegarLoop]: Interpolant automaton has 57 states. [2018-02-02 08:48:55,058 INFO L276 IsEmpty]: Start isEmpty. Operand 148 states and 148 transitions. [2018-02-02 08:48:55,058 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 143 [2018-02-02 08:48:55,058 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 08:48:55,058 INFO L351 BasicCegarLoop]: trace histogram [28, 27, 27, 27, 27, 1, 1, 1, 1, 1, 1] [2018-02-02 08:48:55,058 INFO L371 AbstractCegarLoop]: === Iteration 32 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-02-02 08:48:55,058 INFO L82 PathProgramCache]: Analyzing trace with hash -1695826633, now seen corresponding path program 27 times [2018-02-02 08:48:55,058 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 08:48:55,058 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 08:48:55,059 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 08:48:55,059 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-02 08:48:55,059 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 08:48:55,063 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 08:48:55,064 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 08:48:55,305 INFO L134 CoverageAnalysis]: Checked inductivity of 1809 backedges. 0 proven. 1809 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 08:48:55,305 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-02 08:48:55,305 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-02 08:48:55,309 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-02-02 08:48:55,313 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:48:55,314 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:48:55,314 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:48:55,315 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:48:55,316 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:48:55,317 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:48:55,318 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:48:55,319 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:48:55,320 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:48:55,321 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:48:55,323 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:48:55,324 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:48:55,325 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:48:55,327 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:48:55,329 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:48:55,332 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:48:55,334 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:48:55,336 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:48:55,339 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:48:55,343 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:48:55,346 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:48:55,349 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:48:55,353 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:48:55,358 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:48:55,363 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:48:55,369 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:48:55,374 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:48:55,381 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:48:55,381 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-02 08:48:55,384 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-02 08:48:55,400 INFO L134 CoverageAnalysis]: Checked inductivity of 1809 backedges. 0 proven. 1809 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 08:48:55,418 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-02 08:48:55,418 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [30, 30] total 30 [2018-02-02 08:48:55,419 INFO L409 AbstractCegarLoop]: Interpolant automaton has 31 states [2018-02-02 08:48:55,419 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 31 interpolants. [2018-02-02 08:48:55,419 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=411, Invalid=519, Unknown=0, NotChecked=0, Total=930 [2018-02-02 08:48:55,419 INFO L87 Difference]: Start difference. First operand 148 states and 148 transitions. Second operand 31 states. [2018-02-02 08:48:55,821 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 08:48:55,821 INFO L93 Difference]: Finished difference Result 153 states and 153 transitions. [2018-02-02 08:48:55,821 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2018-02-02 08:48:55,821 INFO L78 Accepts]: Start accepts. Automaton has 31 states. Word has length 142 [2018-02-02 08:48:55,822 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 08:48:55,822 INFO L225 Difference]: With dead ends: 153 [2018-02-02 08:48:55,822 INFO L226 Difference]: Without dead ends: 153 [2018-02-02 08:48:55,823 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 198 GetRequests, 142 SyntacticMatches, 0 SemanticMatches, 56 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 404 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=1221, Invalid=2085, Unknown=0, NotChecked=0, Total=3306 [2018-02-02 08:48:55,823 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 153 states. [2018-02-02 08:48:55,824 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 153 to 153. [2018-02-02 08:48:55,825 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 153 states. [2018-02-02 08:48:55,825 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 153 states to 153 states and 153 transitions. [2018-02-02 08:48:55,825 INFO L78 Accepts]: Start accepts. Automaton has 153 states and 153 transitions. Word has length 142 [2018-02-02 08:48:55,825 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 08:48:55,826 INFO L432 AbstractCegarLoop]: Abstraction has 153 states and 153 transitions. [2018-02-02 08:48:55,826 INFO L433 AbstractCegarLoop]: Interpolant automaton has 31 states. [2018-02-02 08:48:55,826 INFO L276 IsEmpty]: Start isEmpty. Operand 153 states and 153 transitions. [2018-02-02 08:48:55,826 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 148 [2018-02-02 08:48:55,826 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 08:48:55,827 INFO L351 BasicCegarLoop]: trace histogram [29, 28, 28, 28, 28, 1, 1, 1, 1, 1, 1] [2018-02-02 08:48:55,827 INFO L371 AbstractCegarLoop]: === Iteration 33 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-02-02 08:48:55,827 INFO L82 PathProgramCache]: Analyzing trace with hash 1683732636, now seen corresponding path program 28 times [2018-02-02 08:48:55,827 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 08:48:55,827 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 08:48:55,827 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 08:48:55,828 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-02 08:48:55,828 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 08:48:55,833 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 08:48:55,834 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 08:48:56,152 INFO L134 CoverageAnalysis]: Checked inductivity of 1946 backedges. 0 proven. 1946 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 08:48:56,152 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-02 08:48:56,152 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 31 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 31 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-02 08:48:56,157 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-02-02 08:48:56,174 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-02 08:48:56,177 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-02 08:48:56,515 INFO L134 CoverageAnalysis]: Checked inductivity of 1946 backedges. 0 proven. 1946 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 08:48:56,532 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-02 08:48:56,532 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [31, 30] total 60 [2018-02-02 08:48:56,532 INFO L409 AbstractCegarLoop]: Interpolant automaton has 61 states [2018-02-02 08:48:56,532 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 61 interpolants. [2018-02-02 08:48:56,533 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=870, Invalid=2790, Unknown=0, NotChecked=0, Total=3660 [2018-02-02 08:48:56,533 INFO L87 Difference]: Start difference. First operand 153 states and 153 transitions. Second operand 61 states. [2018-02-02 08:48:57,553 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 08:48:57,554 INFO L93 Difference]: Finished difference Result 158 states and 158 transitions. [2018-02-02 08:48:57,554 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2018-02-02 08:48:57,554 INFO L78 Accepts]: Start accepts. Automaton has 61 states. Word has length 147 [2018-02-02 08:48:57,554 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 08:48:57,555 INFO L225 Difference]: With dead ends: 158 [2018-02-02 08:48:57,555 INFO L226 Difference]: Without dead ends: 158 [2018-02-02 08:48:57,555 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 177 GetRequests, 118 SyntacticMatches, 0 SemanticMatches, 59 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1530 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=870, Invalid=2790, Unknown=0, NotChecked=0, Total=3660 [2018-02-02 08:48:57,556 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 158 states. [2018-02-02 08:48:57,557 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 158 to 158. [2018-02-02 08:48:57,558 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 158 states. [2018-02-02 08:48:57,558 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 158 states to 158 states and 158 transitions. [2018-02-02 08:48:57,559 INFO L78 Accepts]: Start accepts. Automaton has 158 states and 158 transitions. Word has length 147 [2018-02-02 08:48:57,559 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 08:48:57,559 INFO L432 AbstractCegarLoop]: Abstraction has 158 states and 158 transitions. [2018-02-02 08:48:57,559 INFO L433 AbstractCegarLoop]: Interpolant automaton has 61 states. [2018-02-02 08:48:57,559 INFO L276 IsEmpty]: Start isEmpty. Operand 158 states and 158 transitions. [2018-02-02 08:48:57,560 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 153 [2018-02-02 08:48:57,560 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 08:48:57,560 INFO L351 BasicCegarLoop]: trace histogram [30, 29, 29, 29, 29, 1, 1, 1, 1, 1, 1] [2018-02-02 08:48:57,560 INFO L371 AbstractCegarLoop]: === Iteration 34 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-02-02 08:48:57,560 INFO L82 PathProgramCache]: Analyzing trace with hash 621417559, now seen corresponding path program 29 times [2018-02-02 08:48:57,560 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 08:48:57,560 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 08:48:57,561 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 08:48:57,561 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-02 08:48:57,561 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 08:48:57,569 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 08:48:57,570 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 08:48:57,889 INFO L134 CoverageAnalysis]: Checked inductivity of 2088 backedges. 0 proven. 2088 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 08:48:57,890 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-02 08:48:57,890 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-02 08:48:57,894 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-02-02 08:48:57,898 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:48:57,899 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:48:57,900 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:48:57,901 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:48:57,901 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:48:57,903 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:48:57,904 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:48:57,905 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:48:57,907 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:48:57,908 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:48:57,910 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:48:57,913 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:48:57,915 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:48:57,918 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:48:57,921 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:48:57,925 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:48:57,929 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:48:57,934 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:48:57,939 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:48:57,945 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:48:57,951 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:48:57,957 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:48:57,964 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:48:57,972 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:48:57,979 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:48:57,989 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:48:58,000 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:48:58,012 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:48:58,025 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:48:58,039 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:48:58,041 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-02 08:48:58,044 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-02 08:48:58,467 INFO L134 CoverageAnalysis]: Checked inductivity of 2088 backedges. 0 proven. 2088 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 08:48:58,486 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-02 08:48:58,486 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [32, 31] total 61 [2018-02-02 08:48:58,486 INFO L409 AbstractCegarLoop]: Interpolant automaton has 62 states [2018-02-02 08:48:58,487 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 62 interpolants. [2018-02-02 08:48:58,487 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=991, Invalid=2791, Unknown=0, NotChecked=0, Total=3782 [2018-02-02 08:48:58,487 INFO L87 Difference]: Start difference. First operand 158 states and 158 transitions. Second operand 62 states. [2018-02-02 08:48:59,849 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 08:48:59,849 INFO L93 Difference]: Finished difference Result 163 states and 163 transitions. [2018-02-02 08:48:59,850 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2018-02-02 08:48:59,850 INFO L78 Accepts]: Start accepts. Automaton has 62 states. Word has length 152 [2018-02-02 08:48:59,850 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 08:48:59,850 INFO L225 Difference]: With dead ends: 163 [2018-02-02 08:48:59,850 INFO L226 Difference]: Without dead ends: 163 [2018-02-02 08:48:59,851 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 184 GetRequests, 123 SyntacticMatches, 0 SemanticMatches, 61 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1683 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=1023, Invalid=2883, Unknown=0, NotChecked=0, Total=3906 [2018-02-02 08:48:59,851 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 163 states. [2018-02-02 08:48:59,852 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 163 to 163. [2018-02-02 08:48:59,852 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 163 states. [2018-02-02 08:48:59,853 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 163 states to 163 states and 163 transitions. [2018-02-02 08:48:59,853 INFO L78 Accepts]: Start accepts. Automaton has 163 states and 163 transitions. Word has length 152 [2018-02-02 08:48:59,853 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 08:48:59,853 INFO L432 AbstractCegarLoop]: Abstraction has 163 states and 163 transitions. [2018-02-02 08:48:59,853 INFO L433 AbstractCegarLoop]: Interpolant automaton has 62 states. [2018-02-02 08:48:59,853 INFO L276 IsEmpty]: Start isEmpty. Operand 163 states and 163 transitions. [2018-02-02 08:48:59,854 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 158 [2018-02-02 08:48:59,854 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 08:48:59,854 INFO L351 BasicCegarLoop]: trace histogram [31, 30, 30, 30, 30, 1, 1, 1, 1, 1, 1] [2018-02-02 08:48:59,854 INFO L371 AbstractCegarLoop]: === Iteration 35 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-02-02 08:48:59,855 INFO L82 PathProgramCache]: Analyzing trace with hash 691459452, now seen corresponding path program 30 times [2018-02-02 08:48:59,855 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 08:48:59,855 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 08:48:59,855 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 08:48:59,855 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-02 08:48:59,855 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 08:48:59,863 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 08:48:59,864 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 08:49:00,244 INFO L134 CoverageAnalysis]: Checked inductivity of 2235 backedges. 0 proven. 2235 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 08:49:00,245 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-02 08:49:00,245 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 33 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 33 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-02 08:49:00,249 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-02-02 08:49:00,252 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:49:00,253 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:49:00,254 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:49:00,255 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:49:00,256 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:49:00,257 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:49:00,258 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:49:00,259 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:49:00,260 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:49:00,261 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:49:00,262 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:49:00,264 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:49:00,265 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:49:00,266 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:49:00,268 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:49:00,269 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:49:00,271 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:49:00,273 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:49:00,275 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:49:00,277 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:49:00,279 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:49:00,282 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:49:00,284 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:49:00,287 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:49:00,290 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:49:00,293 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:49:00,296 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:49:00,300 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:49:00,304 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:49:00,307 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:49:00,320 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:49:00,321 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-02 08:49:00,323 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-02 08:49:00,373 INFO L134 CoverageAnalysis]: Checked inductivity of 2235 backedges. 0 proven. 2235 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 08:49:00,390 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-02 08:49:00,391 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [33, 33] total 36 [2018-02-02 08:49:00,391 INFO L409 AbstractCegarLoop]: Interpolant automaton has 37 states [2018-02-02 08:49:00,391 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 37 interpolants. [2018-02-02 08:49:00,391 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=514, Invalid=818, Unknown=0, NotChecked=0, Total=1332 [2018-02-02 08:49:00,391 INFO L87 Difference]: Start difference. First operand 163 states and 163 transitions. Second operand 37 states. [2018-02-02 08:49:00,895 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 08:49:00,895 INFO L93 Difference]: Finished difference Result 168 states and 168 transitions. [2018-02-02 08:49:00,896 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2018-02-02 08:49:00,896 INFO L78 Accepts]: Start accepts. Automaton has 37 states. Word has length 157 [2018-02-02 08:49:00,896 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 08:49:00,896 INFO L225 Difference]: With dead ends: 168 [2018-02-02 08:49:00,896 INFO L226 Difference]: Without dead ends: 168 [2018-02-02 08:49:00,897 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 219 GetRequests, 154 SyntacticMatches, 0 SemanticMatches, 65 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 586 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=1562, Invalid=2860, Unknown=0, NotChecked=0, Total=4422 [2018-02-02 08:49:00,897 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 168 states. [2018-02-02 08:49:00,898 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 168 to 168. [2018-02-02 08:49:00,898 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 168 states. [2018-02-02 08:49:00,899 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 168 states to 168 states and 168 transitions. [2018-02-02 08:49:00,899 INFO L78 Accepts]: Start accepts. Automaton has 168 states and 168 transitions. Word has length 157 [2018-02-02 08:49:00,899 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 08:49:00,899 INFO L432 AbstractCegarLoop]: Abstraction has 168 states and 168 transitions. [2018-02-02 08:49:00,899 INFO L433 AbstractCegarLoop]: Interpolant automaton has 37 states. [2018-02-02 08:49:00,899 INFO L276 IsEmpty]: Start isEmpty. Operand 168 states and 168 transitions. [2018-02-02 08:49:00,900 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 163 [2018-02-02 08:49:00,900 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 08:49:00,900 INFO L351 BasicCegarLoop]: trace histogram [32, 31, 31, 31, 31, 1, 1, 1, 1, 1, 1] [2018-02-02 08:49:00,900 INFO L371 AbstractCegarLoop]: === Iteration 36 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-02-02 08:49:00,901 INFO L82 PathProgramCache]: Analyzing trace with hash 1996358519, now seen corresponding path program 31 times [2018-02-02 08:49:00,901 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 08:49:00,901 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 08:49:00,901 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 08:49:00,901 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-02 08:49:00,902 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 08:49:00,910 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 08:49:00,911 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 08:49:01,320 INFO L134 CoverageAnalysis]: Checked inductivity of 2387 backedges. 0 proven. 2387 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 08:49:01,321 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-02 08:49:01,321 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-02 08:49:01,325 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-02 08:49:01,346 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 08:49:01,349 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-02 08:49:01,707 INFO L134 CoverageAnalysis]: Checked inductivity of 2387 backedges. 0 proven. 2387 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 08:49:01,726 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-02 08:49:01,726 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [34, 33] total 66 [2018-02-02 08:49:01,727 INFO L409 AbstractCegarLoop]: Interpolant automaton has 67 states [2018-02-02 08:49:01,727 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 67 interpolants. [2018-02-02 08:49:01,727 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1155, Invalid=3267, Unknown=0, NotChecked=0, Total=4422 [2018-02-02 08:49:01,727 INFO L87 Difference]: Start difference. First operand 168 states and 168 transitions. Second operand 67 states. [2018-02-02 08:49:02,835 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 08:49:02,835 INFO L93 Difference]: Finished difference Result 173 states and 173 transitions. [2018-02-02 08:49:02,835 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2018-02-02 08:49:02,835 INFO L78 Accepts]: Start accepts. Automaton has 67 states. Word has length 162 [2018-02-02 08:49:02,836 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 08:49:02,836 INFO L225 Difference]: With dead ends: 173 [2018-02-02 08:49:02,836 INFO L226 Difference]: Without dead ends: 173 [2018-02-02 08:49:02,837 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 195 GetRequests, 130 SyntacticMatches, 0 SemanticMatches, 65 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1983 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=1155, Invalid=3267, Unknown=0, NotChecked=0, Total=4422 [2018-02-02 08:49:02,837 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 173 states. [2018-02-02 08:49:02,838 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 173 to 173. [2018-02-02 08:49:02,838 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 173 states. [2018-02-02 08:49:02,838 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 173 states to 173 states and 173 transitions. [2018-02-02 08:49:02,838 INFO L78 Accepts]: Start accepts. Automaton has 173 states and 173 transitions. Word has length 162 [2018-02-02 08:49:02,839 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 08:49:02,839 INFO L432 AbstractCegarLoop]: Abstraction has 173 states and 173 transitions. [2018-02-02 08:49:02,839 INFO L433 AbstractCegarLoop]: Interpolant automaton has 67 states. [2018-02-02 08:49:02,839 INFO L276 IsEmpty]: Start isEmpty. Operand 173 states and 173 transitions. [2018-02-02 08:49:02,839 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 168 [2018-02-02 08:49:02,839 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 08:49:02,840 INFO L351 BasicCegarLoop]: trace histogram [33, 32, 32, 32, 32, 1, 1, 1, 1, 1, 1] [2018-02-02 08:49:02,840 INFO L371 AbstractCegarLoop]: === Iteration 37 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-02-02 08:49:02,840 INFO L82 PathProgramCache]: Analyzing trace with hash 603675228, now seen corresponding path program 32 times [2018-02-02 08:49:02,840 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 08:49:02,840 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 08:49:02,841 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 08:49:02,841 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-02 08:49:02,841 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 08:49:02,845 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 08:49:02,846 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 08:49:03,510 INFO L134 CoverageAnalysis]: Checked inductivity of 2544 backedges. 0 proven. 2544 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 08:49:03,511 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-02 08:49:03,511 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 35 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 35 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-02 08:49:03,516 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-02-02 08:49:03,521 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:49:03,537 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:49:03,542 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-02 08:49:03,545 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-02 08:49:03,587 INFO L134 CoverageAnalysis]: Checked inductivity of 2544 backedges. 0 proven. 2544 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 08:49:03,605 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-02 08:49:03,605 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [34, 34] total 34 [2018-02-02 08:49:03,605 INFO L409 AbstractCegarLoop]: Interpolant automaton has 35 states [2018-02-02 08:49:03,605 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 35 interpolants. [2018-02-02 08:49:03,605 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=67, Invalid=1123, Unknown=0, NotChecked=0, Total=1190 [2018-02-02 08:49:03,605 INFO L87 Difference]: Start difference. First operand 173 states and 173 transitions. Second operand 35 states. [2018-02-02 08:49:04,826 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 08:49:04,826 INFO L93 Difference]: Finished difference Result 178 states and 178 transitions. [2018-02-02 08:49:04,827 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2018-02-02 08:49:04,827 INFO L78 Accepts]: Start accepts. Automaton has 35 states. Word has length 167 [2018-02-02 08:49:04,827 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 08:49:04,829 INFO L225 Difference]: With dead ends: 178 [2018-02-02 08:49:04,829 INFO L226 Difference]: Without dead ends: 178 [2018-02-02 08:49:04,830 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 200 GetRequests, 166 SyntacticMatches, 1 SemanticMatches, 33 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=67, Invalid=1123, Unknown=0, NotChecked=0, Total=1190 [2018-02-02 08:49:04,830 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 178 states. [2018-02-02 08:49:04,831 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 178 to 178. [2018-02-02 08:49:04,831 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 178 states. [2018-02-02 08:49:04,831 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 178 states to 178 states and 178 transitions. [2018-02-02 08:49:04,831 INFO L78 Accepts]: Start accepts. Automaton has 178 states and 178 transitions. Word has length 167 [2018-02-02 08:49:04,831 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 08:49:04,832 INFO L432 AbstractCegarLoop]: Abstraction has 178 states and 178 transitions. [2018-02-02 08:49:04,832 INFO L433 AbstractCegarLoop]: Interpolant automaton has 35 states. [2018-02-02 08:49:04,832 INFO L276 IsEmpty]: Start isEmpty. Operand 178 states and 178 transitions. [2018-02-02 08:49:04,832 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 173 [2018-02-02 08:49:04,833 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 08:49:04,833 INFO L351 BasicCegarLoop]: trace histogram [34, 33, 33, 33, 33, 1, 1, 1, 1, 1, 1] [2018-02-02 08:49:04,833 INFO L371 AbstractCegarLoop]: === Iteration 38 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-02-02 08:49:04,833 INFO L82 PathProgramCache]: Analyzing trace with hash 1420397207, now seen corresponding path program 33 times [2018-02-02 08:49:04,833 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 08:49:04,833 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 08:49:04,834 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 08:49:04,834 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-02 08:49:04,834 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 08:49:04,838 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 08:49:04,839 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 08:49:05,261 INFO L134 CoverageAnalysis]: Checked inductivity of 2706 backedges. 0 proven. 2706 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 08:49:05,261 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-02 08:49:05,261 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-02 08:49:05,266 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-02-02 08:49:05,270 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:49:05,271 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:49:05,272 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:49:05,273 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:49:05,275 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:49:05,276 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:49:05,277 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:49:05,278 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:49:05,280 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:49:05,281 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:49:05,283 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:49:05,284 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:49:05,286 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:49:05,288 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:49:05,290 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:49:05,292 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:49:05,295 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:49:05,298 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:49:05,301 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:49:05,304 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:49:05,308 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:49:05,311 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:49:05,315 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:49:05,319 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:49:05,324 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:49:05,330 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:49:05,335 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:49:05,341 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:49:05,348 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:49:05,356 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:49:05,364 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:49:05,374 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:49:05,383 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:49:05,396 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:49:05,397 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-02 08:49:05,399 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-02 08:49:05,429 INFO L134 CoverageAnalysis]: Checked inductivity of 2706 backedges. 0 proven. 2706 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 08:49:05,446 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-02 08:49:05,446 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [36, 36] total 36 [2018-02-02 08:49:05,446 INFO L409 AbstractCegarLoop]: Interpolant automaton has 37 states [2018-02-02 08:49:05,446 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 37 interpolants. [2018-02-02 08:49:05,446 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=600, Invalid=732, Unknown=0, NotChecked=0, Total=1332 [2018-02-02 08:49:05,447 INFO L87 Difference]: Start difference. First operand 178 states and 178 transitions. Second operand 37 states. [2018-02-02 08:49:05,975 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 08:49:05,975 INFO L93 Difference]: Finished difference Result 183 states and 183 transitions. [2018-02-02 08:49:05,975 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2018-02-02 08:49:05,975 INFO L78 Accepts]: Start accepts. Automaton has 37 states. Word has length 172 [2018-02-02 08:49:05,976 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 08:49:05,976 INFO L225 Difference]: With dead ends: 183 [2018-02-02 08:49:05,976 INFO L226 Difference]: Without dead ends: 183 [2018-02-02 08:49:05,977 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 240 GetRequests, 172 SyntacticMatches, 0 SemanticMatches, 68 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 593 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=1788, Invalid=3042, Unknown=0, NotChecked=0, Total=4830 [2018-02-02 08:49:05,977 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 183 states. [2018-02-02 08:49:05,982 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 183 to 183. [2018-02-02 08:49:05,982 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 183 states. [2018-02-02 08:49:05,983 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 183 states to 183 states and 183 transitions. [2018-02-02 08:49:05,983 INFO L78 Accepts]: Start accepts. Automaton has 183 states and 183 transitions. Word has length 172 [2018-02-02 08:49:05,983 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 08:49:05,984 INFO L432 AbstractCegarLoop]: Abstraction has 183 states and 183 transitions. [2018-02-02 08:49:05,984 INFO L433 AbstractCegarLoop]: Interpolant automaton has 37 states. [2018-02-02 08:49:05,984 INFO L276 IsEmpty]: Start isEmpty. Operand 183 states and 183 transitions. [2018-02-02 08:49:05,985 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 178 [2018-02-02 08:49:05,985 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 08:49:05,985 INFO L351 BasicCegarLoop]: trace histogram [35, 34, 34, 34, 34, 1, 1, 1, 1, 1, 1] [2018-02-02 08:49:05,985 INFO L371 AbstractCegarLoop]: === Iteration 39 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-02-02 08:49:05,985 INFO L82 PathProgramCache]: Analyzing trace with hash -1375254724, now seen corresponding path program 34 times [2018-02-02 08:49:05,985 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 08:49:05,985 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 08:49:05,986 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 08:49:05,986 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-02 08:49:05,986 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 08:49:06,002 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 08:49:06,003 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 08:49:06,518 INFO L134 CoverageAnalysis]: Checked inductivity of 2873 backedges. 0 proven. 2873 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 08:49:06,518 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-02 08:49:06,518 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 37 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 37 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-02 08:49:06,524 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-02-02 08:49:06,552 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-02 08:49:06,555 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-02 08:49:07,056 INFO L134 CoverageAnalysis]: Checked inductivity of 2873 backedges. 0 proven. 2873 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 08:49:07,087 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-02 08:49:07,087 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [37, 36] total 72 [2018-02-02 08:49:07,088 INFO L409 AbstractCegarLoop]: Interpolant automaton has 73 states [2018-02-02 08:49:07,088 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 73 interpolants. [2018-02-02 08:49:07,089 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1332, Invalid=3924, Unknown=0, NotChecked=0, Total=5256 [2018-02-02 08:49:07,089 INFO L87 Difference]: Start difference. First operand 183 states and 183 transitions. Second operand 73 states. [2018-02-02 08:49:08,264 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 08:49:08,264 INFO L93 Difference]: Finished difference Result 188 states and 188 transitions. [2018-02-02 08:49:08,264 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 37 states. [2018-02-02 08:49:08,264 INFO L78 Accepts]: Start accepts. Automaton has 73 states. Word has length 177 [2018-02-02 08:49:08,264 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 08:49:08,265 INFO L225 Difference]: With dead ends: 188 [2018-02-02 08:49:08,265 INFO L226 Difference]: Without dead ends: 188 [2018-02-02 08:49:08,265 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 213 GetRequests, 142 SyntacticMatches, 0 SemanticMatches, 71 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2343 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=1332, Invalid=3924, Unknown=0, NotChecked=0, Total=5256 [2018-02-02 08:49:08,265 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 188 states. [2018-02-02 08:49:08,267 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 188 to 188. [2018-02-02 08:49:08,267 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 188 states. [2018-02-02 08:49:08,267 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 188 states to 188 states and 188 transitions. [2018-02-02 08:49:08,267 INFO L78 Accepts]: Start accepts. Automaton has 188 states and 188 transitions. Word has length 177 [2018-02-02 08:49:08,267 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 08:49:08,267 INFO L432 AbstractCegarLoop]: Abstraction has 188 states and 188 transitions. [2018-02-02 08:49:08,267 INFO L433 AbstractCegarLoop]: Interpolant automaton has 73 states. [2018-02-02 08:49:08,268 INFO L276 IsEmpty]: Start isEmpty. Operand 188 states and 188 transitions. [2018-02-02 08:49:08,268 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 183 [2018-02-02 08:49:08,268 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 08:49:08,268 INFO L351 BasicCegarLoop]: trace histogram [36, 35, 35, 35, 35, 1, 1, 1, 1, 1, 1] [2018-02-02 08:49:08,268 INFO L371 AbstractCegarLoop]: === Iteration 40 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-02-02 08:49:08,268 INFO L82 PathProgramCache]: Analyzing trace with hash -1888573001, now seen corresponding path program 35 times [2018-02-02 08:49:08,268 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 08:49:08,269 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 08:49:08,269 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 08:49:08,269 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-02 08:49:08,269 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 08:49:08,275 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 08:49:08,275 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 08:49:08,703 INFO L134 CoverageAnalysis]: Checked inductivity of 3045 backedges. 0 proven. 3045 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 08:49:08,703 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-02 08:49:08,703 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-02 08:49:08,708 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-02-02 08:49:08,712 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:49:08,713 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:49:08,713 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:49:08,714 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:49:08,715 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:49:08,716 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:49:08,717 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:49:08,719 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:49:08,720 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:49:08,722 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:49:08,723 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:49:08,726 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:49:08,728 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:49:08,730 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:49:08,733 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:49:08,736 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:49:08,739 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:49:08,743 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:49:08,747 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:49:08,752 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:49:08,757 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:49:08,763 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:49:08,769 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:49:08,776 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:49:08,784 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:49:08,792 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:49:08,802 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:49:08,812 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:49:08,823 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:49:08,835 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:49:08,848 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:49:08,864 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:49:08,880 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:49:08,899 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:49:08,919 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:49:08,941 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:49:08,944 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-02 08:49:08,947 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-02 08:49:09,507 INFO L134 CoverageAnalysis]: Checked inductivity of 3045 backedges. 0 proven. 3045 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 08:49:09,526 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-02 08:49:09,526 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [38, 37] total 73 [2018-02-02 08:49:09,527 INFO L409 AbstractCegarLoop]: Interpolant automaton has 74 states [2018-02-02 08:49:09,527 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 74 interpolants. [2018-02-02 08:49:09,528 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1405, Invalid=3997, Unknown=0, NotChecked=0, Total=5402 [2018-02-02 08:49:09,528 INFO L87 Difference]: Start difference. First operand 188 states and 188 transitions. Second operand 74 states. [2018-02-02 08:49:11,325 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 08:49:11,325 INFO L93 Difference]: Finished difference Result 193 states and 193 transitions. [2018-02-02 08:49:11,325 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2018-02-02 08:49:11,325 INFO L78 Accepts]: Start accepts. Automaton has 74 states. Word has length 182 [2018-02-02 08:49:11,325 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 08:49:11,326 INFO L225 Difference]: With dead ends: 193 [2018-02-02 08:49:11,326 INFO L226 Difference]: Without dead ends: 193 [2018-02-02 08:49:11,326 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 220 GetRequests, 147 SyntacticMatches, 0 SemanticMatches, 73 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2451 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=1443, Invalid=4107, Unknown=0, NotChecked=0, Total=5550 [2018-02-02 08:49:11,326 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 193 states. [2018-02-02 08:49:11,327 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 193 to 193. [2018-02-02 08:49:11,327 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 193 states. [2018-02-02 08:49:11,328 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 193 states to 193 states and 193 transitions. [2018-02-02 08:49:11,328 INFO L78 Accepts]: Start accepts. Automaton has 193 states and 193 transitions. Word has length 182 [2018-02-02 08:49:11,328 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 08:49:11,328 INFO L432 AbstractCegarLoop]: Abstraction has 193 states and 193 transitions. [2018-02-02 08:49:11,328 INFO L433 AbstractCegarLoop]: Interpolant automaton has 74 states. [2018-02-02 08:49:11,328 INFO L276 IsEmpty]: Start isEmpty. Operand 193 states and 193 transitions. [2018-02-02 08:49:11,328 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 188 [2018-02-02 08:49:11,328 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 08:49:11,328 INFO L351 BasicCegarLoop]: trace histogram [37, 36, 36, 36, 36, 1, 1, 1, 1, 1, 1] [2018-02-02 08:49:11,328 INFO L371 AbstractCegarLoop]: === Iteration 41 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-02-02 08:49:11,329 INFO L82 PathProgramCache]: Analyzing trace with hash -2093442020, now seen corresponding path program 36 times [2018-02-02 08:49:11,329 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 08:49:11,329 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 08:49:11,329 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 08:49:11,329 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-02 08:49:11,329 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 08:49:11,334 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 08:49:11,335 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 08:49:11,757 INFO L134 CoverageAnalysis]: Checked inductivity of 3222 backedges. 0 proven. 3222 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 08:49:11,757 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-02 08:49:11,757 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 39 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 39 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-02 08:49:11,761 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-02-02 08:49:11,765 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:49:11,766 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:49:11,767 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:49:11,767 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:49:11,768 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:49:11,769 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:49:11,770 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:49:11,771 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:49:11,772 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:49:11,773 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:49:11,774 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:49:11,775 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:49:11,777 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:49:11,778 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:49:11,779 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:49:11,781 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:49:11,783 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:49:11,784 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:49:11,786 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:49:11,788 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:49:11,791 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:49:11,793 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:49:11,795 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:49:11,798 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:49:11,807 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:49:11,810 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:49:11,814 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:49:11,818 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:49:11,821 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:49:11,825 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:49:11,830 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:49:11,834 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:49:11,839 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:49:11,844 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:49:11,852 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:49:11,860 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:49:11,868 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:49:11,869 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-02 08:49:11,871 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-02 08:49:11,962 INFO L134 CoverageAnalysis]: Checked inductivity of 3222 backedges. 0 proven. 3222 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 08:49:11,980 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-02 08:49:11,980 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [39, 39] total 44 [2018-02-02 08:49:11,981 INFO L409 AbstractCegarLoop]: Interpolant automaton has 45 states [2018-02-02 08:49:11,981 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 45 interpolants. [2018-02-02 08:49:11,981 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=736, Invalid=1244, Unknown=0, NotChecked=0, Total=1980 [2018-02-02 08:49:11,981 INFO L87 Difference]: Start difference. First operand 193 states and 193 transitions. Second operand 45 states. [2018-02-02 08:49:12,779 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 08:49:12,780 INFO L93 Difference]: Finished difference Result 198 states and 198 transitions. [2018-02-02 08:49:12,780 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 39 states. [2018-02-02 08:49:12,780 INFO L78 Accepts]: Start accepts. Automaton has 45 states. Word has length 187 [2018-02-02 08:49:12,780 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 08:49:12,781 INFO L225 Difference]: With dead ends: 198 [2018-02-02 08:49:12,781 INFO L226 Difference]: Without dead ends: 198 [2018-02-02 08:49:12,781 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 261 GetRequests, 182 SyntacticMatches, 0 SemanticMatches, 79 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 877 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=2205, Invalid=4275, Unknown=0, NotChecked=0, Total=6480 [2018-02-02 08:49:12,782 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 198 states. [2018-02-02 08:49:12,783 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 198 to 198. [2018-02-02 08:49:12,783 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 198 states. [2018-02-02 08:49:12,783 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 198 states to 198 states and 198 transitions. [2018-02-02 08:49:12,783 INFO L78 Accepts]: Start accepts. Automaton has 198 states and 198 transitions. Word has length 187 [2018-02-02 08:49:12,783 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 08:49:12,783 INFO L432 AbstractCegarLoop]: Abstraction has 198 states and 198 transitions. [2018-02-02 08:49:12,783 INFO L433 AbstractCegarLoop]: Interpolant automaton has 45 states. [2018-02-02 08:49:12,783 INFO L276 IsEmpty]: Start isEmpty. Operand 198 states and 198 transitions. [2018-02-02 08:49:12,784 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 193 [2018-02-02 08:49:12,784 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 08:49:12,784 INFO L351 BasicCegarLoop]: trace histogram [38, 37, 37, 37, 37, 1, 1, 1, 1, 1, 1] [2018-02-02 08:49:12,784 INFO L371 AbstractCegarLoop]: === Iteration 42 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-02-02 08:49:12,785 INFO L82 PathProgramCache]: Analyzing trace with hash 640639191, now seen corresponding path program 37 times [2018-02-02 08:49:12,785 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 08:49:12,785 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 08:49:12,785 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 08:49:12,785 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-02 08:49:12,785 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 08:49:12,794 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 08:49:12,795 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 08:49:13,245 INFO L134 CoverageAnalysis]: Checked inductivity of 3404 backedges. 0 proven. 3404 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 08:49:13,245 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-02 08:49:13,245 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 40 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 40 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-02 08:49:13,249 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-02 08:49:13,270 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 08:49:13,273 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-02 08:49:13,749 INFO L134 CoverageAnalysis]: Checked inductivity of 3404 backedges. 0 proven. 3404 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 08:49:13,766 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-02 08:49:13,767 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [40, 39] total 78 [2018-02-02 08:49:13,767 INFO L409 AbstractCegarLoop]: Interpolant automaton has 79 states [2018-02-02 08:49:13,767 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 79 interpolants. [2018-02-02 08:49:13,768 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1599, Invalid=4563, Unknown=0, NotChecked=0, Total=6162 [2018-02-02 08:49:13,768 INFO L87 Difference]: Start difference. First operand 198 states and 198 transitions. Second operand 79 states. [2018-02-02 08:49:15,626 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 08:49:15,626 INFO L93 Difference]: Finished difference Result 203 states and 203 transitions. [2018-02-02 08:49:15,626 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 40 states. [2018-02-02 08:49:15,626 INFO L78 Accepts]: Start accepts. Automaton has 79 states. Word has length 192 [2018-02-02 08:49:15,626 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 08:49:15,627 INFO L225 Difference]: With dead ends: 203 [2018-02-02 08:49:15,627 INFO L226 Difference]: Without dead ends: 203 [2018-02-02 08:49:15,627 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 231 GetRequests, 154 SyntacticMatches, 0 SemanticMatches, 77 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2811 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=1599, Invalid=4563, Unknown=0, NotChecked=0, Total=6162 [2018-02-02 08:49:15,627 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 203 states. [2018-02-02 08:49:15,628 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 203 to 203. [2018-02-02 08:49:15,628 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 203 states. [2018-02-02 08:49:15,629 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 203 states to 203 states and 203 transitions. [2018-02-02 08:49:15,629 INFO L78 Accepts]: Start accepts. Automaton has 203 states and 203 transitions. Word has length 192 [2018-02-02 08:49:15,629 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 08:49:15,629 INFO L432 AbstractCegarLoop]: Abstraction has 203 states and 203 transitions. [2018-02-02 08:49:15,629 INFO L433 AbstractCegarLoop]: Interpolant automaton has 79 states. [2018-02-02 08:49:15,629 INFO L276 IsEmpty]: Start isEmpty. Operand 203 states and 203 transitions. [2018-02-02 08:49:15,629 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 198 [2018-02-02 08:49:15,629 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 08:49:15,629 INFO L351 BasicCegarLoop]: trace histogram [39, 38, 38, 38, 38, 1, 1, 1, 1, 1, 1] [2018-02-02 08:49:15,630 INFO L371 AbstractCegarLoop]: === Iteration 43 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-02-02 08:49:15,630 INFO L82 PathProgramCache]: Analyzing trace with hash -1578280708, now seen corresponding path program 38 times [2018-02-02 08:49:15,630 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 08:49:15,630 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 08:49:15,630 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 08:49:15,630 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-02 08:49:15,630 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 08:49:15,636 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 08:49:15,637 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 08:49:16,107 INFO L134 CoverageAnalysis]: Checked inductivity of 3591 backedges. 0 proven. 3591 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 08:49:16,107 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-02 08:49:16,107 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 41 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 41 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-02 08:49:16,112 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-02-02 08:49:16,115 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:49:16,130 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:49:16,133 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-02 08:49:16,135 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-02 08:49:16,606 INFO L134 CoverageAnalysis]: Checked inductivity of 3591 backedges. 0 proven. 3591 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 08:49:16,636 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-02 08:49:16,636 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [41, 40] total 80 [2018-02-02 08:49:16,636 INFO L409 AbstractCegarLoop]: Interpolant automaton has 81 states [2018-02-02 08:49:16,637 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 81 interpolants. [2018-02-02 08:49:16,637 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1640, Invalid=4840, Unknown=0, NotChecked=0, Total=6480 [2018-02-02 08:49:16,637 INFO L87 Difference]: Start difference. First operand 203 states and 203 transitions. Second operand 81 states. [2018-02-02 08:49:17,749 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 08:49:17,750 INFO L93 Difference]: Finished difference Result 208 states and 208 transitions. [2018-02-02 08:49:17,750 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 41 states. [2018-02-02 08:49:17,750 INFO L78 Accepts]: Start accepts. Automaton has 81 states. Word has length 197 [2018-02-02 08:49:17,750 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 08:49:17,750 INFO L225 Difference]: With dead ends: 208 [2018-02-02 08:49:17,750 INFO L226 Difference]: Without dead ends: 208 [2018-02-02 08:49:17,751 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 237 GetRequests, 158 SyntacticMatches, 0 SemanticMatches, 79 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2923 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=1640, Invalid=4840, Unknown=0, NotChecked=0, Total=6480 [2018-02-02 08:49:17,751 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 208 states. [2018-02-02 08:49:17,752 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 208 to 208. [2018-02-02 08:49:17,752 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 208 states. [2018-02-02 08:49:17,752 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 208 states to 208 states and 208 transitions. [2018-02-02 08:49:17,752 INFO L78 Accepts]: Start accepts. Automaton has 208 states and 208 transitions. Word has length 197 [2018-02-02 08:49:17,753 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 08:49:17,753 INFO L432 AbstractCegarLoop]: Abstraction has 208 states and 208 transitions. [2018-02-02 08:49:17,753 INFO L433 AbstractCegarLoop]: Interpolant automaton has 81 states. [2018-02-02 08:49:17,753 INFO L276 IsEmpty]: Start isEmpty. Operand 208 states and 208 transitions. [2018-02-02 08:49:17,753 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 203 [2018-02-02 08:49:17,753 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 08:49:17,753 INFO L351 BasicCegarLoop]: trace histogram [40, 39, 39, 39, 39, 1, 1, 1, 1, 1, 1] [2018-02-02 08:49:17,753 INFO L371 AbstractCegarLoop]: === Iteration 44 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-02-02 08:49:17,753 INFO L82 PathProgramCache]: Analyzing trace with hash 1699590135, now seen corresponding path program 39 times [2018-02-02 08:49:17,753 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 08:49:17,754 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 08:49:17,754 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 08:49:17,754 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-02 08:49:17,754 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 08:49:17,759 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 08:49:17,760 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 08:49:18,215 INFO L134 CoverageAnalysis]: Checked inductivity of 3783 backedges. 0 proven. 3783 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 08:49:18,216 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-02 08:49:18,216 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 42 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 42 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-02 08:49:18,220 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-02-02 08:49:18,223 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:49:18,224 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:49:18,225 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:49:18,225 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:49:18,226 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:49:18,227 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:49:18,228 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:49:18,229 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:49:18,230 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:49:18,231 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:49:18,233 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:49:18,234 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:49:18,236 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:49:18,237 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:49:18,239 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:49:18,241 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:49:18,244 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:49:18,246 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:49:18,249 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:49:18,252 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:49:18,255 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:49:18,258 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:49:18,262 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:49:18,266 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:49:18,271 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:49:18,276 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:49:18,281 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:49:18,287 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:49:18,294 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:49:18,301 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:49:18,310 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:49:18,318 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:49:18,327 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:49:18,337 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:49:18,348 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:49:18,360 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:49:18,372 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:49:18,386 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:49:18,411 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:49:18,436 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:49:18,437 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-02 08:49:18,440 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-02 08:49:18,482 INFO L134 CoverageAnalysis]: Checked inductivity of 3783 backedges. 0 proven. 3783 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 08:49:18,515 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-02 08:49:18,515 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [42, 42] total 42 [2018-02-02 08:49:18,516 INFO L409 AbstractCegarLoop]: Interpolant automaton has 43 states [2018-02-02 08:49:18,516 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 43 interpolants. [2018-02-02 08:49:18,516 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=825, Invalid=981, Unknown=0, NotChecked=0, Total=1806 [2018-02-02 08:49:18,517 INFO L87 Difference]: Start difference. First operand 208 states and 208 transitions. Second operand 43 states. [2018-02-02 08:49:19,369 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 08:49:19,370 INFO L93 Difference]: Finished difference Result 213 states and 213 transitions. [2018-02-02 08:49:19,370 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 42 states. [2018-02-02 08:49:19,370 INFO L78 Accepts]: Start accepts. Automaton has 43 states. Word has length 202 [2018-02-02 08:49:19,370 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 08:49:19,371 INFO L225 Difference]: With dead ends: 213 [2018-02-02 08:49:19,371 INFO L226 Difference]: Without dead ends: 213 [2018-02-02 08:49:19,371 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 282 GetRequests, 202 SyntacticMatches, 0 SemanticMatches, 80 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 818 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=2463, Invalid=4179, Unknown=0, NotChecked=0, Total=6642 [2018-02-02 08:49:19,371 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 213 states. [2018-02-02 08:49:19,372 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 213 to 213. [2018-02-02 08:49:19,372 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 213 states. [2018-02-02 08:49:19,373 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 213 states to 213 states and 213 transitions. [2018-02-02 08:49:19,373 INFO L78 Accepts]: Start accepts. Automaton has 213 states and 213 transitions. Word has length 202 [2018-02-02 08:49:19,373 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 08:49:19,373 INFO L432 AbstractCegarLoop]: Abstraction has 213 states and 213 transitions. [2018-02-02 08:49:19,373 INFO L433 AbstractCegarLoop]: Interpolant automaton has 43 states. [2018-02-02 08:49:19,373 INFO L276 IsEmpty]: Start isEmpty. Operand 213 states and 213 transitions. [2018-02-02 08:49:19,373 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 208 [2018-02-02 08:49:19,374 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 08:49:19,374 INFO L351 BasicCegarLoop]: trace histogram [41, 40, 40, 40, 40, 1, 1, 1, 1, 1, 1] [2018-02-02 08:49:19,374 INFO L371 AbstractCegarLoop]: === Iteration 45 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-02-02 08:49:19,374 INFO L82 PathProgramCache]: Analyzing trace with hash 721649116, now seen corresponding path program 40 times [2018-02-02 08:49:19,374 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 08:49:19,374 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 08:49:19,374 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 08:49:19,374 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-02 08:49:19,374 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 08:49:19,380 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 08:49:19,380 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 08:49:19,859 INFO L134 CoverageAnalysis]: Checked inductivity of 3980 backedges. 0 proven. 3980 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 08:49:19,860 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-02 08:49:19,860 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 43 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 43 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-02 08:49:19,864 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-02-02 08:49:19,888 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-02 08:49:19,891 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-02 08:49:20,533 INFO L134 CoverageAnalysis]: Checked inductivity of 3980 backedges. 0 proven. 3980 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 08:49:20,550 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-02 08:49:20,550 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [43, 42] total 84 [2018-02-02 08:49:20,551 INFO L409 AbstractCegarLoop]: Interpolant automaton has 85 states [2018-02-02 08:49:20,551 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 85 interpolants. [2018-02-02 08:49:20,551 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1554, Invalid=5586, Unknown=0, NotChecked=0, Total=7140 [2018-02-02 08:49:20,551 INFO L87 Difference]: Start difference. First operand 213 states and 213 transitions. Second operand 85 states. [2018-02-02 08:49:22,372 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 08:49:22,372 INFO L93 Difference]: Finished difference Result 218 states and 218 transitions. [2018-02-02 08:49:22,372 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 43 states. [2018-02-02 08:49:22,372 INFO L78 Accepts]: Start accepts. Automaton has 85 states. Word has length 207 [2018-02-02 08:49:22,372 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 08:49:22,373 INFO L225 Difference]: With dead ends: 218 [2018-02-02 08:49:22,373 INFO L226 Difference]: Without dead ends: 218 [2018-02-02 08:49:22,373 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 249 GetRequests, 166 SyntacticMatches, 0 SemanticMatches, 83 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2964 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=1554, Invalid=5586, Unknown=0, NotChecked=0, Total=7140 [2018-02-02 08:49:22,373 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 218 states. [2018-02-02 08:49:22,374 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 218 to 218. [2018-02-02 08:49:22,375 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 218 states. [2018-02-02 08:49:22,375 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 218 states to 218 states and 218 transitions. [2018-02-02 08:49:22,375 INFO L78 Accepts]: Start accepts. Automaton has 218 states and 218 transitions. Word has length 207 [2018-02-02 08:49:22,375 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 08:49:22,376 INFO L432 AbstractCegarLoop]: Abstraction has 218 states and 218 transitions. [2018-02-02 08:49:22,376 INFO L433 AbstractCegarLoop]: Interpolant automaton has 85 states. [2018-02-02 08:49:22,376 INFO L276 IsEmpty]: Start isEmpty. Operand 218 states and 218 transitions. [2018-02-02 08:49:22,376 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 213 [2018-02-02 08:49:22,377 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 08:49:22,377 INFO L351 BasicCegarLoop]: trace histogram [42, 41, 41, 41, 41, 1, 1, 1, 1, 1, 1] [2018-02-02 08:49:22,377 INFO L371 AbstractCegarLoop]: === Iteration 46 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-02-02 08:49:22,377 INFO L82 PathProgramCache]: Analyzing trace with hash 111908631, now seen corresponding path program 41 times [2018-02-02 08:49:22,377 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 08:49:22,377 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 08:49:22,378 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 08:49:22,378 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-02 08:49:22,378 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 08:49:22,387 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 08:49:22,388 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 08:49:22,896 INFO L134 CoverageAnalysis]: Checked inductivity of 4182 backedges. 0 proven. 4182 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 08:49:23,062 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-02 08:49:23,063 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 44 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 44 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-02 08:49:23,067 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-02-02 08:49:23,071 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:49:23,071 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:49:23,072 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:49:23,073 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:49:23,074 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:49:23,075 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:49:23,076 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:49:23,078 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:49:23,079 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:49:23,081 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:49:23,087 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:49:23,089 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:49:23,091 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:49:23,093 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:49:23,096 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:49:23,098 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:49:23,102 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:49:23,105 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:49:23,109 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:49:23,113 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:49:23,118 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:49:23,123 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:49:23,129 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:49:23,135 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:49:23,142 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:49:23,150 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:49:23,159 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:49:23,168 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:49:23,178 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:49:23,190 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:49:23,202 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:49:23,215 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:49:23,231 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:49:23,247 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:49:23,266 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:49:23,287 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:49:23,309 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:49:23,334 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:49:23,360 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:49:23,388 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:49:23,416 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:49:23,445 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:49:23,448 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-02 08:49:23,451 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-02 08:49:24,057 INFO L134 CoverageAnalysis]: Checked inductivity of 4182 backedges. 0 proven. 4182 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 08:49:24,075 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-02 08:49:24,076 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [44, 43] total 85 [2018-02-02 08:49:24,076 INFO L409 AbstractCegarLoop]: Interpolant automaton has 86 states [2018-02-02 08:49:24,077 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 86 interpolants. [2018-02-02 08:49:24,077 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1891, Invalid=5419, Unknown=0, NotChecked=0, Total=7310 [2018-02-02 08:49:24,077 INFO L87 Difference]: Start difference. First operand 218 states and 218 transitions. Second operand 86 states. [2018-02-02 08:49:26,281 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 08:49:26,281 INFO L93 Difference]: Finished difference Result 223 states and 223 transitions. [2018-02-02 08:49:26,282 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 44 states. [2018-02-02 08:49:26,282 INFO L78 Accepts]: Start accepts. Automaton has 86 states. Word has length 212 [2018-02-02 08:49:26,282 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 08:49:26,282 INFO L225 Difference]: With dead ends: 223 [2018-02-02 08:49:26,282 INFO L226 Difference]: Without dead ends: 223 [2018-02-02 08:49:26,283 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 256 GetRequests, 171 SyntacticMatches, 0 SemanticMatches, 85 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3363 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=1935, Invalid=5547, Unknown=0, NotChecked=0, Total=7482 [2018-02-02 08:49:26,283 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 223 states. [2018-02-02 08:49:26,284 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 223 to 223. [2018-02-02 08:49:26,284 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 223 states. [2018-02-02 08:49:26,284 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 223 states to 223 states and 223 transitions. [2018-02-02 08:49:26,284 INFO L78 Accepts]: Start accepts. Automaton has 223 states and 223 transitions. Word has length 212 [2018-02-02 08:49:26,284 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 08:49:26,285 INFO L432 AbstractCegarLoop]: Abstraction has 223 states and 223 transitions. [2018-02-02 08:49:26,285 INFO L433 AbstractCegarLoop]: Interpolant automaton has 86 states. [2018-02-02 08:49:26,285 INFO L276 IsEmpty]: Start isEmpty. Operand 223 states and 223 transitions. [2018-02-02 08:49:26,285 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 218 [2018-02-02 08:49:26,285 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 08:49:26,285 INFO L351 BasicCegarLoop]: trace histogram [43, 42, 42, 42, 42, 1, 1, 1, 1, 1, 1] [2018-02-02 08:49:26,285 INFO L371 AbstractCegarLoop]: === Iteration 47 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-02-02 08:49:26,285 INFO L82 PathProgramCache]: Analyzing trace with hash 1104743100, now seen corresponding path program 42 times [2018-02-02 08:49:26,285 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 08:49:26,285 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 08:49:26,286 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 08:49:26,286 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-02 08:49:26,286 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 08:49:26,292 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 08:49:26,293 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 08:49:26,830 INFO L134 CoverageAnalysis]: Checked inductivity of 4389 backedges. 0 proven. 4389 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 08:49:26,830 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-02 08:49:26,830 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 45 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 45 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-02 08:49:26,834 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-02-02 08:49:26,838 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:49:26,839 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:49:26,839 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:49:26,840 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:49:26,841 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:49:26,842 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:49:26,843 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:49:26,844 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:49:26,845 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:49:26,847 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:49:26,848 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:49:26,849 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:49:26,851 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:49:26,852 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:49:26,853 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:49:26,855 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:49:26,856 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:49:26,858 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:49:26,860 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:49:26,862 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:49:26,865 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:49:26,873 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:49:26,876 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:49:26,879 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:49:26,882 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:49:26,885 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:49:26,888 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:49:26,892 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:49:26,895 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:49:26,899 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:49:26,904 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:49:26,908 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:49:26,912 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:49:26,917 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:49:26,922 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:49:26,928 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:49:26,934 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:49:26,941 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:49:26,948 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:49:26,955 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:49:26,962 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:49:26,974 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:49:26,985 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-02-02 08:49:26,986 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-02 08:49:26,989 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-02 08:49:27,060 INFO L134 CoverageAnalysis]: Checked inductivity of 4389 backedges. 0 proven. 4389 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 08:49:27,078 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-02 08:49:27,078 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [45, 45] total 48 [2018-02-02 08:49:27,079 INFO L409 AbstractCegarLoop]: Interpolant automaton has 49 states [2018-02-02 08:49:27,079 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 49 interpolants. [2018-02-02 08:49:27,079 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=964, Invalid=1388, Unknown=0, NotChecked=0, Total=2352 [2018-02-02 08:49:27,079 INFO L87 Difference]: Start difference. First operand 223 states and 223 transitions. Second operand 49 states. [2018-02-02 08:49:27,860 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 08:49:27,860 INFO L93 Difference]: Finished difference Result 228 states and 228 transitions. [2018-02-02 08:49:27,860 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 45 states. [2018-02-02 08:49:27,860 INFO L78 Accepts]: Start accepts. Automaton has 49 states. Word has length 217 [2018-02-02 08:49:27,860 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 08:49:27,861 INFO L225 Difference]: With dead ends: 228 [2018-02-02 08:49:27,861 INFO L226 Difference]: Without dead ends: 228 [2018-02-02 08:49:27,861 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 303 GetRequests, 214 SyntacticMatches, 0 SemanticMatches, 89 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1072 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=2936, Invalid=5254, Unknown=0, NotChecked=0, Total=8190 [2018-02-02 08:49:27,861 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 228 states. [2018-02-02 08:49:27,863 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 228 to 228. [2018-02-02 08:49:27,863 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 228 states. [2018-02-02 08:49:27,863 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 228 states to 228 states and 228 transitions. [2018-02-02 08:49:27,863 INFO L78 Accepts]: Start accepts. Automaton has 228 states and 228 transitions. Word has length 217 [2018-02-02 08:49:27,863 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 08:49:27,863 INFO L432 AbstractCegarLoop]: Abstraction has 228 states and 228 transitions. [2018-02-02 08:49:27,863 INFO L433 AbstractCegarLoop]: Interpolant automaton has 49 states. [2018-02-02 08:49:27,863 INFO L276 IsEmpty]: Start isEmpty. Operand 228 states and 228 transitions. [2018-02-02 08:49:27,864 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 223 [2018-02-02 08:49:27,864 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 08:49:27,864 INFO L351 BasicCegarLoop]: trace histogram [44, 43, 43, 43, 43, 1, 1, 1, 1, 1, 1] [2018-02-02 08:49:27,864 INFO L371 AbstractCegarLoop]: === Iteration 48 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-02-02 08:49:27,864 INFO L82 PathProgramCache]: Analyzing trace with hash 1370166839, now seen corresponding path program 43 times [2018-02-02 08:49:27,864 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 08:49:27,864 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 08:49:27,865 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 08:49:27,865 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-02 08:49:27,865 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 08:49:27,870 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 08:49:27,870 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 08:49:28,419 INFO L134 CoverageAnalysis]: Checked inductivity of 4601 backedges. 0 proven. 4601 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 08:49:28,419 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-02 08:49:28,419 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 46 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 46 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-02 08:49:28,423 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-02 08:49:28,444 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 08:49:28,446 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-02 08:49:29,054 INFO L134 CoverageAnalysis]: Checked inductivity of 4601 backedges. 0 proven. 4601 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 08:49:29,071 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-02 08:49:29,071 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [46, 45] total 90 [2018-02-02 08:49:29,071 INFO L409 AbstractCegarLoop]: Interpolant automaton has 91 states [2018-02-02 08:49:29,071 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 91 interpolants. [2018-02-02 08:49:29,072 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2115, Invalid=6075, Unknown=0, NotChecked=0, Total=8190 [2018-02-02 08:49:29,072 INFO L87 Difference]: Start difference. First operand 228 states and 228 transitions. Second operand 91 states. [2018-02-02 08:49:30,913 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 08:49:30,913 INFO L93 Difference]: Finished difference Result 233 states and 233 transitions. [2018-02-02 08:49:30,913 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 46 states. [2018-02-02 08:49:30,913 INFO L78 Accepts]: Start accepts. Automaton has 91 states. Word has length 222 [2018-02-02 08:49:30,913 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 08:49:30,914 INFO L225 Difference]: With dead ends: 233 [2018-02-02 08:49:30,914 INFO L226 Difference]: Without dead ends: 233 [2018-02-02 08:49:30,914 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 267 GetRequests, 178 SyntacticMatches, 0 SemanticMatches, 89 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3783 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=2115, Invalid=6075, Unknown=0, NotChecked=0, Total=8190 [2018-02-02 08:49:30,914 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 233 states. [2018-02-02 08:49:30,916 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 233 to 233. [2018-02-02 08:49:30,916 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 233 states. [2018-02-02 08:49:30,917 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 233 states to 233 states and 233 transitions. [2018-02-02 08:49:30,917 INFO L78 Accepts]: Start accepts. Automaton has 233 states and 233 transitions. Word has length 222 [2018-02-02 08:49:30,917 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 08:49:30,917 INFO L432 AbstractCegarLoop]: Abstraction has 233 states and 233 transitions. [2018-02-02 08:49:30,917 INFO L433 AbstractCegarLoop]: Interpolant automaton has 91 states. [2018-02-02 08:49:30,917 INFO L276 IsEmpty]: Start isEmpty. Operand 233 states and 233 transitions. [2018-02-02 08:49:30,918 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 228 [2018-02-02 08:49:30,918 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 08:49:30,918 INFO L351 BasicCegarLoop]: trace histogram [45, 44, 44, 44, 44, 1, 1, 1, 1, 1, 1] [2018-02-02 08:49:30,918 INFO L371 AbstractCegarLoop]: === Iteration 49 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-02-02 08:49:30,919 INFO L82 PathProgramCache]: Analyzing trace with hash -330563684, now seen corresponding path program 44 times [2018-02-02 08:49:30,919 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 08:49:30,919 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 08:49:30,919 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 08:49:30,919 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-02 08:49:30,920 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 08:49:30,929 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 08:49:30,930 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 08:49:31,537 INFO L134 CoverageAnalysis]: Checked inductivity of 4818 backedges. 0 proven. 4818 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 08:49:31,537 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-02 08:49:31,537 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 47 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 47 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-02 08:49:31,541 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-02-02 08:49:31,545 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:49:31,560 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-02-02 08:49:31,563 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-02 08:49:31,565 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-02 08:49:32,213 INFO L134 CoverageAnalysis]: Checked inductivity of 4818 backedges. 0 proven. 4818 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 08:49:32,229 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-02 08:49:32,229 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [47, 46] total 92 [2018-02-02 08:49:32,230 INFO L409 AbstractCegarLoop]: Interpolant automaton has 93 states [2018-02-02 08:49:32,230 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 93 interpolants. [2018-02-02 08:49:32,230 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2070, Invalid=6486, Unknown=0, NotChecked=0, Total=8556 [2018-02-02 08:49:32,230 INFO L87 Difference]: Start difference. First operand 233 states and 233 transitions. Second operand 93 states. [2018-02-02 08:49:34,717 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 08:49:34,717 INFO L93 Difference]: Finished difference Result 238 states and 238 transitions. [2018-02-02 08:49:34,717 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 47 states. [2018-02-02 08:49:34,717 INFO L78 Accepts]: Start accepts. Automaton has 93 states. Word has length 227 [2018-02-02 08:49:34,717 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 08:49:34,718 INFO L225 Difference]: With dead ends: 238 [2018-02-02 08:49:34,718 INFO L226 Difference]: Without dead ends: 238 [2018-02-02 08:49:34,718 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 273 GetRequests, 182 SyntacticMatches, 0 SemanticMatches, 91 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3818 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=2070, Invalid=6486, Unknown=0, NotChecked=0, Total=8556 [2018-02-02 08:49:34,718 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 238 states. [2018-02-02 08:49:34,719 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 238 to 238. [2018-02-02 08:49:34,719 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 238 states. [2018-02-02 08:49:34,720 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 238 states to 238 states and 238 transitions. [2018-02-02 08:49:34,720 INFO L78 Accepts]: Start accepts. Automaton has 238 states and 238 transitions. Word has length 227 [2018-02-02 08:49:34,720 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 08:49:34,720 INFO L432 AbstractCegarLoop]: Abstraction has 238 states and 238 transitions. [2018-02-02 08:49:34,720 INFO L433 AbstractCegarLoop]: Interpolant automaton has 93 states. [2018-02-02 08:49:34,720 INFO L276 IsEmpty]: Start isEmpty. Operand 238 states and 238 transitions. [2018-02-02 08:49:34,721 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 233 [2018-02-02 08:49:34,721 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 08:49:34,721 INFO L351 BasicCegarLoop]: trace histogram [46, 45, 45, 45, 45, 1, 1, 1, 1, 1, 1] [2018-02-02 08:49:34,721 INFO L371 AbstractCegarLoop]: === Iteration 50 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-02-02 08:49:34,721 INFO L82 PathProgramCache]: Analyzing trace with hash 992882007, now seen corresponding path program 45 times [2018-02-02 08:49:34,721 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 08:49:34,721 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 08:49:34,721 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 08:49:34,722 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-02 08:49:34,722 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 08:49:34,727 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 08:49:34,727 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 08:49:35,388 INFO L134 CoverageAnalysis]: Checked inductivity of 5040 backedges. 0 proven. 5040 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 08:49:35,389 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-02 08:49:35,389 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 48 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 48 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-02 08:49:35,394 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-02-02 08:49:35,398 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:49:35,398 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:49:35,399 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:49:35,400 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:49:35,401 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:49:35,402 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:49:35,403 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:49:35,404 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:49:35,405 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:49:35,406 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:49:35,408 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:49:35,409 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:49:35,410 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:49:35,412 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:49:35,414 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:49:35,416 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:49:35,418 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:49:35,420 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:49:35,423 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:49:35,426 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:49:35,429 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:49:35,432 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:49:35,436 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:49:35,440 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:49:35,445 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:49:35,450 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:49:35,454 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:49:35,460 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:49:35,466 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:49:35,473 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:49:35,483 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:49:35,491 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:49:35,500 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:49:35,508 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:49:35,520 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:49:35,532 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:49:35,543 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:49:35,556 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:49:35,571 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:49:35,587 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:49:35,604 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:49:35,621 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:49:35,638 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:49:35,658 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:49:35,680 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:49:35,703 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-02-02 08:49:35,704 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-02 08:49:35,707 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-02 08:49:35,760 INFO L134 CoverageAnalysis]: Checked inductivity of 5040 backedges. 0 proven. 5040 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 08:49:35,779 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-02 08:49:35,779 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [48, 48] total 48 [2018-02-02 08:49:35,779 INFO L409 AbstractCegarLoop]: Interpolant automaton has 49 states [2018-02-02 08:49:35,779 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 49 interpolants. [2018-02-02 08:49:35,780 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1086, Invalid=1266, Unknown=0, NotChecked=0, Total=2352 [2018-02-02 08:49:35,780 INFO L87 Difference]: Start difference. First operand 238 states and 238 transitions. Second operand 49 states. [2018-02-02 08:49:36,593 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 08:49:36,594 INFO L93 Difference]: Finished difference Result 243 states and 243 transitions. [2018-02-02 08:49:36,594 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 48 states. [2018-02-02 08:49:36,594 INFO L78 Accepts]: Start accepts. Automaton has 49 states. Word has length 232 [2018-02-02 08:49:36,594 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 08:49:36,594 INFO L225 Difference]: With dead ends: 243 [2018-02-02 08:49:36,594 INFO L226 Difference]: Without dead ends: 243 [2018-02-02 08:49:36,595 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 324 GetRequests, 232 SyntacticMatches, 0 SemanticMatches, 92 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1079 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=3246, Invalid=5496, Unknown=0, NotChecked=0, Total=8742 [2018-02-02 08:49:36,595 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 243 states. [2018-02-02 08:49:36,596 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 243 to 243. [2018-02-02 08:49:36,596 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 243 states. [2018-02-02 08:49:36,597 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 243 states to 243 states and 243 transitions. [2018-02-02 08:49:36,597 INFO L78 Accepts]: Start accepts. Automaton has 243 states and 243 transitions. Word has length 232 [2018-02-02 08:49:36,597 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 08:49:36,597 INFO L432 AbstractCegarLoop]: Abstraction has 243 states and 243 transitions. [2018-02-02 08:49:36,597 INFO L433 AbstractCegarLoop]: Interpolant automaton has 49 states. [2018-02-02 08:49:36,597 INFO L276 IsEmpty]: Start isEmpty. Operand 243 states and 243 transitions. [2018-02-02 08:49:36,598 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 238 [2018-02-02 08:49:36,598 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 08:49:36,598 INFO L351 BasicCegarLoop]: trace histogram [47, 46, 46, 46, 46, 1, 1, 1, 1, 1, 1] [2018-02-02 08:49:36,598 INFO L371 AbstractCegarLoop]: === Iteration 51 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-02-02 08:49:36,598 INFO L82 PathProgramCache]: Analyzing trace with hash -222667652, now seen corresponding path program 46 times [2018-02-02 08:49:36,598 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-02 08:49:36,598 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-02 08:49:36,599 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 08:49:36,599 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-02 08:49:36,599 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-02 08:49:36,608 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 08:49:36,609 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. Received shutdown request... [2018-02-02 08:49:36,853 WARN L491 AbstractCegarLoop]: Verification canceled [2018-02-02 08:49:36,856 WARN L185 ceAbstractionStarter]: Timeout [2018-02-02 08:49:36,856 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 02.02 08:49:36 BoogieIcfgContainer [2018-02-02 08:49:36,856 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-02-02 08:49:36,857 INFO L168 Benchmark]: Toolchain (without parser) took 58028.81 ms. Allocated memory was 400.6 MB in the beginning and 1.3 GB in the end (delta: 923.3 MB). Free memory was 357.0 MB in the beginning and 645.0 MB in the end (delta: -288.0 MB). Peak memory consumption was 635.3 MB. Max. memory is 5.3 GB. [2018-02-02 08:49:36,858 INFO L168 Benchmark]: CDTParser took 0.17 ms. Allocated memory is still 400.6 MB. Free memory is still 362.3 MB. There was no memory consumed. Max. memory is 5.3 GB. [2018-02-02 08:49:36,858 INFO L168 Benchmark]: CACSL2BoogieTranslator took 117.40 ms. Allocated memory is still 400.6 MB. Free memory was 357.0 MB in the beginning and 349.1 MB in the end (delta: 7.9 MB). Peak memory consumption was 7.9 MB. Max. memory is 5.3 GB. [2018-02-02 08:49:36,858 INFO L168 Benchmark]: Boogie Preprocessor took 17.87 ms. Allocated memory is still 400.6 MB. Free memory is still 349.1 MB. There was no memory consumed. Max. memory is 5.3 GB. [2018-02-02 08:49:36,858 INFO L168 Benchmark]: RCFGBuilder took 130.27 ms. Allocated memory is still 400.6 MB. Free memory was 349.1 MB in the beginning and 334.6 MB in the end (delta: 14.5 MB). Peak memory consumption was 14.5 MB. Max. memory is 5.3 GB. [2018-02-02 08:49:36,858 INFO L168 Benchmark]: TraceAbstraction took 57760.95 ms. Allocated memory was 400.6 MB in the beginning and 1.3 GB in the end (delta: 923.3 MB). Free memory was 334.6 MB in the beginning and 645.0 MB in the end (delta: -310.4 MB). Peak memory consumption was 612.8 MB. Max. memory is 5.3 GB. [2018-02-02 08:49:36,860 INFO L344 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.17 ms. Allocated memory is still 400.6 MB. Free memory is still 362.3 MB. There was no memory consumed. Max. memory is 5.3 GB. * CACSL2BoogieTranslator took 117.40 ms. Allocated memory is still 400.6 MB. Free memory was 357.0 MB in the beginning and 349.1 MB in the end (delta: 7.9 MB). Peak memory consumption was 7.9 MB. Max. memory is 5.3 GB. * Boogie Preprocessor took 17.87 ms. Allocated memory is still 400.6 MB. Free memory is still 349.1 MB. There was no memory consumed. Max. memory is 5.3 GB. * RCFGBuilder took 130.27 ms. Allocated memory is still 400.6 MB. Free memory was 349.1 MB in the beginning and 334.6 MB in the end (delta: 14.5 MB). Peak memory consumption was 14.5 MB. Max. memory is 5.3 GB. * TraceAbstraction took 57760.95 ms. Allocated memory was 400.6 MB in the beginning and 1.3 GB in the end (delta: 923.3 MB). Free memory was 334.6 MB in the beginning and 645.0 MB in the end (delta: -310.4 MB). Peak memory consumption was 612.8 MB. Max. memory is 5.3 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - TimeoutResultAtElement [Line: 7]: Timeout (TraceAbstraction) Unable to prove that array index is always in bounds (line 7). Cancelled while BasicCegarLoop was analyzing trace of length 238 with TraceHistMax 47, while InterpolatingTraceCheckCraig was constructing Craig interpolants, while PredicateComparison was comparing new predicate (quantifier-free) to 22 known predicates. - TimeoutResultAtElement [Line: 8]: Timeout (TraceAbstraction) Unable to prove that array index is always in bounds (line 8). Cancelled while BasicCegarLoop was analyzing trace of length 238 with TraceHistMax 47, while InterpolatingTraceCheckCraig was constructing Craig interpolants, while PredicateComparison was comparing new predicate (quantifier-free) to 22 known predicates. - TimeoutResultAtElement [Line: 13]: Timeout (TraceAbstraction) Unable to prove that array index is always in bounds (line 13). Cancelled while BasicCegarLoop was analyzing trace of length 238 with TraceHistMax 47, while InterpolatingTraceCheckCraig was constructing Craig interpolants, while PredicateComparison was comparing new predicate (quantifier-free) to 22 known predicates. - TimeoutResultAtElement [Line: 13]: Timeout (TraceAbstraction) Unable to prove that array index is always in bounds (line 13). Cancelled while BasicCegarLoop was analyzing trace of length 238 with TraceHistMax 47, while InterpolatingTraceCheckCraig was constructing Craig interpolants, while PredicateComparison was comparing new predicate (quantifier-free) to 22 known predicates. - TimeoutResultAtElement [Line: 8]: Timeout (TraceAbstraction) Unable to prove that array index is always in bounds (line 8). Cancelled while BasicCegarLoop was analyzing trace of length 238 with TraceHistMax 47, while InterpolatingTraceCheckCraig was constructing Craig interpolants, while PredicateComparison was comparing new predicate (quantifier-free) to 22 known predicates. - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 32 locations, 5 error locations. TIMEOUT Result, 57.7s OverallTime, 51 OverallIterations, 47 TraceHistogramMax, 31.2s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 1312 SDtfs, 7022 SDslu, 29041 SDs, 0 SdLazy, 104398 SolverSat, 1135 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 20.7s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 7053 GetRequests, 4885 SyntacticMatches, 8 SemanticMatches, 2160 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 44661 ImplicationChecksByTransitivity, 21.8s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=243occurred in iteration=50, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.1s AutomataMinimizationTime, 50 MinimizatonAttempts, 125 StatesRemovedByMinimization, 6 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.1s SsaConstructionTime, 2.8s SatisfiabilityAnalysisTime, 20.8s InterpolantComputationTime, 11134 NumberOfCodeBlocks, 11134 NumberOfCodeBlocksAsserted, 634 NumberOfCheckSat, 11037 ConstructedInterpolants, 0 QuantifiedInterpolants, 6042169 SizeOfPredicates, 3 NumberOfNonLiveVariables, 12126 ConjunctsInSsa, 1870 ConjunctsInUnsatCore, 97 InterpolantComputations, 3 PerfectInterpolantSequences, 33/155983 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: Timeout Written .csv to /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/standard_strcpy_false-valid-deref_ground.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Camel.epf_AutomizerC.xml/Csv-Benchmark-0-2018-02-02_08-49-36-865.csv Written .csv to /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/standard_strcpy_false-valid-deref_ground.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Camel.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-0-2018-02-02_08-49-36-865.csv Completed graceful shutdown