java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/cav18-smtinterpol/svcomp-DerefFreeMemtrack-32bit-Automizer_SmtInterpol_Array.epf -i ../../../trunk/examples/svcomp/memsafety/20051113-1.c_false-valid-memtrack.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-26d9e06-m [2018-02-02 09:55:04,483 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-02-02 09:55:04,484 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-02-02 09:55:04,496 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-02-02 09:55:04,496 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-02-02 09:55:04,497 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-02-02 09:55:04,498 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-02-02 09:55:04,499 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-02-02 09:55:04,501 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-02-02 09:55:04,502 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-02-02 09:55:04,503 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-02-02 09:55:04,503 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-02-02 09:55:04,504 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-02-02 09:55:04,505 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-02-02 09:55:04,506 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-02-02 09:55:04,508 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-02-02 09:55:04,509 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-02-02 09:55:04,511 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-02-02 09:55:04,512 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-02-02 09:55:04,514 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-02-02 09:55:04,516 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2018-02-02 09:55:04,521 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-02-02 09:55:04,521 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-02-02 09:55:04,522 INFO L98 SettingsManager]: Beginning loading settings from /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/cav18-smtinterpol/svcomp-DerefFreeMemtrack-32bit-Automizer_SmtInterpol_Array.epf [2018-02-02 09:55:04,530 INFO L110 SettingsManager]: Loading preferences was successful [2018-02-02 09:55:04,531 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-02-02 09:55:04,531 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-02-02 09:55:04,531 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-02-02 09:55:04,531 INFO L133 SettingsManager]: * Use SBE=true [2018-02-02 09:55:04,532 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-02-02 09:55:04,532 INFO L133 SettingsManager]: * sizeof long=4 [2018-02-02 09:55:04,532 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-02-02 09:55:04,532 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-02-02 09:55:04,532 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-02-02 09:55:04,532 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-02-02 09:55:04,532 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-02-02 09:55:04,532 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-02-02 09:55:04,532 INFO L133 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2018-02-02 09:55:04,532 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-02-02 09:55:04,532 INFO L133 SettingsManager]: * sizeof long double=12 [2018-02-02 09:55:04,533 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-02-02 09:55:04,533 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-02-02 09:55:04,533 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-02-02 09:55:04,533 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-02-02 09:55:04,533 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-02-02 09:55:04,533 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-02-02 09:55:04,533 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=Craig_TreeInterpolation [2018-02-02 09:55:04,559 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-02-02 09:55:04,569 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully initialized [2018-02-02 09:55:04,572 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-02-02 09:55:04,573 INFO L271 PluginConnector]: Initializing CDTParser... [2018-02-02 09:55:04,573 INFO L276 PluginConnector]: CDTParser initialized [2018-02-02 09:55:04,574 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/memsafety/20051113-1.c_false-valid-memtrack.i [2018-02-02 09:55:04,700 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-02-02 09:55:04,701 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-02-02 09:55:04,702 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-02-02 09:55:04,702 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-02-02 09:55:04,708 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-02-02 09:55:04,709 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 02.02 09:55:04" (1/1) ... [2018-02-02 09:55:04,711 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@34296066 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.02 09:55:04, skipping insertion in model container [2018-02-02 09:55:04,711 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 02.02 09:55:04" (1/1) ... [2018-02-02 09:55:04,724 INFO L153 Dispatcher]: Using SV-COMP mode [2018-02-02 09:55:04,755 INFO L153 Dispatcher]: Using SV-COMP mode [2018-02-02 09:55:04,846 INFO L450 PostProcessor]: Settings: Checked method=main [2018-02-02 09:55:04,862 INFO L450 PostProcessor]: Settings: Checked method=main [2018-02-02 09:55:04,869 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.02 09:55:04 WrapperNode [2018-02-02 09:55:04,869 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-02-02 09:55:04,870 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-02-02 09:55:04,870 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-02-02 09:55:04,870 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-02-02 09:55:04,879 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.02 09:55:04" (1/1) ... [2018-02-02 09:55:04,880 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.02 09:55:04" (1/1) ... [2018-02-02 09:55:04,886 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.02 09:55:04" (1/1) ... [2018-02-02 09:55:04,887 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.02 09:55:04" (1/1) ... [2018-02-02 09:55:04,889 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.02 09:55:04" (1/1) ... [2018-02-02 09:55:04,891 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.02 09:55:04" (1/1) ... [2018-02-02 09:55:04,892 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.02 09:55:04" (1/1) ... [2018-02-02 09:55:04,894 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-02-02 09:55:04,894 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-02-02 09:55:04,894 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-02-02 09:55:04,894 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-02-02 09:55:04,895 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.02 09:55:04" (1/1) ... No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-02-02 09:55:04,935 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-02-02 09:55:04,936 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-02-02 09:55:04,936 INFO L136 BoogieDeclarations]: Found implementation of procedure Sum [2018-02-02 09:55:04,936 INFO L136 BoogieDeclarations]: Found implementation of procedure Sum2 [2018-02-02 09:55:04,936 INFO L136 BoogieDeclarations]: Found implementation of procedure dummy_abort [2018-02-02 09:55:04,936 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-02-02 09:55:04,936 INFO L128 BoogieDeclarations]: Found specification of procedure write~int [2018-02-02 09:55:04,937 INFO L128 BoogieDeclarations]: Found specification of procedure read~int [2018-02-02 09:55:04,937 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.free [2018-02-02 09:55:04,937 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-02-02 09:55:04,937 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-02-02 09:55:04,937 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2018-02-02 09:55:04,937 INFO L136 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2018-02-02 09:55:04,937 INFO L128 BoogieDeclarations]: Found specification of procedure memset [2018-02-02 09:55:04,937 INFO L128 BoogieDeclarations]: Found specification of procedure Sum [2018-02-02 09:55:04,937 INFO L128 BoogieDeclarations]: Found specification of procedure Sum2 [2018-02-02 09:55:04,938 INFO L128 BoogieDeclarations]: Found specification of procedure dummy_abort [2018-02-02 09:55:04,938 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-02-02 09:55:04,938 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-02-02 09:55:04,938 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-02-02 09:55:05,041 WARN L455 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-02-02 09:55:05,185 INFO L257 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-02-02 09:55:05,185 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 02.02 09:55:05 BoogieIcfgContainer [2018-02-02 09:55:05,185 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-02-02 09:55:05,186 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-02-02 09:55:05,186 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-02-02 09:55:05,188 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-02-02 09:55:05,188 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 02.02 09:55:04" (1/3) ... [2018-02-02 09:55:05,189 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@54009944 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 02.02 09:55:05, skipping insertion in model container [2018-02-02 09:55:05,189 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 02.02 09:55:04" (2/3) ... [2018-02-02 09:55:05,189 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@54009944 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 02.02 09:55:05, skipping insertion in model container [2018-02-02 09:55:05,189 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 02.02 09:55:05" (3/3) ... [2018-02-02 09:55:05,191 INFO L107 eAbstractionObserver]: Analyzing ICFG 20051113-1.c_false-valid-memtrack.i [2018-02-02 09:55:05,196 INFO L128 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:Craig_TreeInterpolation Determinization: PREDICATE_ABSTRACTION [2018-02-02 09:55:05,201 INFO L140 ceAbstractionStarter]: Appying trace abstraction to program that has 25 error locations. [2018-02-02 09:55:05,226 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-02-02 09:55:05,226 INFO L323 AbstractCegarLoop]: Hoare is false [2018-02-02 09:55:05,226 INFO L324 AbstractCegarLoop]: Compute interpolants for Craig_TreeInterpolation [2018-02-02 09:55:05,226 INFO L325 AbstractCegarLoop]: Backedges is CANONICAL [2018-02-02 09:55:05,227 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-02-02 09:55:05,227 INFO L327 AbstractCegarLoop]: Difference is false [2018-02-02 09:55:05,227 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-02-02 09:55:05,227 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-02-02 09:55:05,228 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-02-02 09:55:05,238 INFO L276 IsEmpty]: Start isEmpty. Operand 80 states. [2018-02-02 09:55:05,247 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 9 [2018-02-02 09:55:05,248 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:55:05,248 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:55:05,248 INFO L371 AbstractCegarLoop]: === Iteration 1 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-02 09:55:05,251 INFO L82 PathProgramCache]: Analyzing trace with hash -1274877597, now seen corresponding path program 1 times [2018-02-02 09:55:05,298 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-02 09:55:05,332 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:55:05,338 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:55:05,381 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 09:55:05,382 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-02 09:55:05,382 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-02-02 09:55:05,383 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-02 09:55:05,383 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 09:55:05,384 INFO L182 omatonBuilderFactory]: Interpolants [83#true, 84#false, 85#(= 1 (select |#valid| |main_#t~malloc9.base|)), 86#(= 1 (select |#valid| main_~p~0.base))] [2018-02-02 09:55:05,384 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 09:55:05,384 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-02-02 09:55:05,392 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-02-02 09:55:05,393 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-02-02 09:55:05,394 INFO L87 Difference]: Start difference. First operand 80 states. Second operand 4 states. [2018-02-02 09:55:05,554 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:55:05,554 INFO L93 Difference]: Finished difference Result 72 states and 77 transitions. [2018-02-02 09:55:05,555 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-02-02 09:55:05,601 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 8 [2018-02-02 09:55:05,601 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:55:05,611 INFO L225 Difference]: With dead ends: 72 [2018-02-02 09:55:05,611 INFO L226 Difference]: Without dead ends: 69 [2018-02-02 09:55:05,612 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-02-02 09:55:05,633 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 69 states. [2018-02-02 09:55:05,651 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 69 to 69. [2018-02-02 09:55:05,652 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 69 states. [2018-02-02 09:55:05,654 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 69 states to 69 states and 74 transitions. [2018-02-02 09:55:05,655 INFO L78 Accepts]: Start accepts. Automaton has 69 states and 74 transitions. Word has length 8 [2018-02-02 09:55:05,655 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:55:05,655 INFO L432 AbstractCegarLoop]: Abstraction has 69 states and 74 transitions. [2018-02-02 09:55:05,656 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-02-02 09:55:05,656 INFO L276 IsEmpty]: Start isEmpty. Operand 69 states and 74 transitions. [2018-02-02 09:55:05,656 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 9 [2018-02-02 09:55:05,656 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:55:05,656 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:55:05,656 INFO L371 AbstractCegarLoop]: === Iteration 2 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-02 09:55:05,657 INFO L82 PathProgramCache]: Analyzing trace with hash -1274877596, now seen corresponding path program 1 times [2018-02-02 09:55:05,658 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-02 09:55:05,670 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:55:05,671 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:55:05,721 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 09:55:05,721 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-02 09:55:05,721 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-02-02 09:55:05,722 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-02 09:55:05,722 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 09:55:05,722 INFO L182 omatonBuilderFactory]: Interpolants [230#true, 231#false, 232#(and (= 0 |main_#t~malloc9.offset|) (= 94 (select |#length| |main_#t~malloc9.base|))), 233#(and (= main_~p~0.offset 0) (= (select |#length| main_~p~0.base) 94))] [2018-02-02 09:55:05,722 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 09:55:05,723 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-02-02 09:55:05,723 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-02-02 09:55:05,723 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-02-02 09:55:05,723 INFO L87 Difference]: Start difference. First operand 69 states and 74 transitions. Second operand 4 states. [2018-02-02 09:55:05,801 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:55:05,802 INFO L93 Difference]: Finished difference Result 61 states and 66 transitions. [2018-02-02 09:55:05,802 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-02-02 09:55:05,802 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 8 [2018-02-02 09:55:05,802 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:55:05,803 INFO L225 Difference]: With dead ends: 61 [2018-02-02 09:55:05,803 INFO L226 Difference]: Without dead ends: 61 [2018-02-02 09:55:05,804 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-02-02 09:55:05,804 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 61 states. [2018-02-02 09:55:05,806 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 61 to 61. [2018-02-02 09:55:05,806 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 61 states. [2018-02-02 09:55:05,807 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 61 states to 61 states and 66 transitions. [2018-02-02 09:55:05,807 INFO L78 Accepts]: Start accepts. Automaton has 61 states and 66 transitions. Word has length 8 [2018-02-02 09:55:05,807 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:55:05,808 INFO L432 AbstractCegarLoop]: Abstraction has 61 states and 66 transitions. [2018-02-02 09:55:05,808 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-02-02 09:55:05,808 INFO L276 IsEmpty]: Start isEmpty. Operand 61 states and 66 transitions. [2018-02-02 09:55:05,808 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2018-02-02 09:55:05,808 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:55:05,808 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:55:05,808 INFO L371 AbstractCegarLoop]: === Iteration 3 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-02 09:55:05,809 INFO L82 PathProgramCache]: Analyzing trace with hash -1852712777, now seen corresponding path program 1 times [2018-02-02 09:55:05,809 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-02 09:55:05,823 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:55:05,823 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:55:05,871 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 09:55:05,872 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-02 09:55:05,872 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-02-02 09:55:05,872 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-02 09:55:05,872 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 09:55:05,872 INFO L182 omatonBuilderFactory]: Interpolants [358#true, 359#false, 360#(= 1 (select |#valid| main_~p~0.base)), 361#(= 1 (select |#valid| |Sum_#in~instrs.base|)), 362#(= 1 (select |#valid| Sum_~instrs.base))] [2018-02-02 09:55:05,872 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 09:55:05,873 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-02-02 09:55:05,873 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-02-02 09:55:05,873 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-02-02 09:55:05,873 INFO L87 Difference]: Start difference. First operand 61 states and 66 transitions. Second operand 5 states. [2018-02-02 09:55:05,929 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:55:05,929 INFO L93 Difference]: Finished difference Result 59 states and 64 transitions. [2018-02-02 09:55:05,929 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-02-02 09:55:05,929 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 25 [2018-02-02 09:55:05,929 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:55:05,930 INFO L225 Difference]: With dead ends: 59 [2018-02-02 09:55:05,930 INFO L226 Difference]: Without dead ends: 59 [2018-02-02 09:55:05,930 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-02-02 09:55:05,931 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 59 states. [2018-02-02 09:55:05,934 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 59 to 59. [2018-02-02 09:55:05,934 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 59 states. [2018-02-02 09:55:05,935 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 59 states to 59 states and 64 transitions. [2018-02-02 09:55:05,935 INFO L78 Accepts]: Start accepts. Automaton has 59 states and 64 transitions. Word has length 25 [2018-02-02 09:55:05,936 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:55:05,936 INFO L432 AbstractCegarLoop]: Abstraction has 59 states and 64 transitions. [2018-02-02 09:55:05,936 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-02-02 09:55:05,936 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 64 transitions. [2018-02-02 09:55:05,937 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2018-02-02 09:55:05,937 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:55:05,937 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:55:05,937 INFO L371 AbstractCegarLoop]: === Iteration 4 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-02 09:55:05,937 INFO L82 PathProgramCache]: Analyzing trace with hash -1852712776, now seen corresponding path program 1 times [2018-02-02 09:55:05,938 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-02 09:55:05,957 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:55:05,958 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:55:06,038 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 09:55:06,038 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-02 09:55:06,038 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-02-02 09:55:06,038 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-02 09:55:06,039 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 09:55:06,039 INFO L182 omatonBuilderFactory]: Interpolants [483#true, 484#false, 485#(and (= 0 |main_#t~malloc9.offset|) (= 94 (select |#length| |main_#t~malloc9.base|))), 486#(and (= 0 main_~p~0.offset) (= 94 (select |#length| main_~p~0.base))), 487#(and (= 94 (select |#length| |Sum_#in~instrs.base|)) (= 0 |Sum_#in~instrs.offset|)), 488#(and (= Sum_~instrs.offset 0) (= (select |#length| Sum_~instrs.base) 94))] [2018-02-02 09:55:06,039 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 09:55:06,039 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-02-02 09:55:06,040 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-02-02 09:55:06,040 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-02-02 09:55:06,040 INFO L87 Difference]: Start difference. First operand 59 states and 64 transitions. Second operand 6 states. [2018-02-02 09:55:06,120 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:55:06,120 INFO L93 Difference]: Finished difference Result 58 states and 63 transitions. [2018-02-02 09:55:06,121 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-02-02 09:55:06,121 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 25 [2018-02-02 09:55:06,121 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:55:06,122 INFO L225 Difference]: With dead ends: 58 [2018-02-02 09:55:06,122 INFO L226 Difference]: Without dead ends: 58 [2018-02-02 09:55:06,122 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2018-02-02 09:55:06,122 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 58 states. [2018-02-02 09:55:06,124 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 58 to 58. [2018-02-02 09:55:06,124 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 58 states. [2018-02-02 09:55:06,125 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 58 states to 58 states and 63 transitions. [2018-02-02 09:55:06,125 INFO L78 Accepts]: Start accepts. Automaton has 58 states and 63 transitions. Word has length 25 [2018-02-02 09:55:06,126 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:55:06,126 INFO L432 AbstractCegarLoop]: Abstraction has 58 states and 63 transitions. [2018-02-02 09:55:06,126 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-02-02 09:55:06,126 INFO L276 IsEmpty]: Start isEmpty. Operand 58 states and 63 transitions. [2018-02-02 09:55:06,126 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-02-02 09:55:06,126 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:55:06,127 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:55:06,127 INFO L371 AbstractCegarLoop]: === Iteration 5 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-02 09:55:06,127 INFO L82 PathProgramCache]: Analyzing trace with hash 1954449657, now seen corresponding path program 1 times [2018-02-02 09:55:06,128 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-02 09:55:06,153 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:55:06,154 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:55:06,368 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 09:55:06,369 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-02 09:55:06,369 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-02-02 09:55:06,369 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-02 09:55:06,370 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 09:55:06,370 INFO L182 omatonBuilderFactory]: Interpolants [609#true, 610#false, 611#(and (= 0 |main_#t~malloc9.offset|) (= 94 (select |#length| |main_#t~malloc9.base|))), 612#(and (= 0 main_~p~0.offset) (= 94 (select |#length| main_~p~0.base))), 613#(and (= 0 main_~p~0.offset) (= 94 (select |#length| main_~p~0.base)) (= 3 (select (store (select |#memory_int| main_~p~0.base) (+ main_~p~0.offset 10) 555) main_~p~0.offset))), 614#(and (= 94 (select |#length| |Sum_#in~instrs.base|)) (= 0 |Sum_#in~instrs.offset|) (= 3 (select (select |#memory_int| |Sum_#in~instrs.base|) |Sum_#in~instrs.offset|))), 615#(and (= 3 (select (select |#memory_int| Sum_~instrs.base) Sum_~instrs.offset)) (= Sum_~instrs.offset 0) (= Sum_~i~0 0) (= (select |#length| Sum_~instrs.base) 94)), 616#(and (= Sum_~instrs.offset 0) (= Sum_~i~0 0) (= |Sum_#t~mem4| 3) (= (select |#length| Sum_~instrs.base) 94)), 617#(and (= Sum_~instrs.offset 0) (= Sum_~i~0 0) (= (select |#length| Sum_~instrs.base) 94))] [2018-02-02 09:55:06,370 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 09:55:06,370 INFO L409 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-02-02 09:55:06,371 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-02-02 09:55:06,371 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=54, Unknown=0, NotChecked=0, Total=72 [2018-02-02 09:55:06,371 INFO L87 Difference]: Start difference. First operand 58 states and 63 transitions. Second operand 9 states. [2018-02-02 09:55:06,582 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:55:06,583 INFO L93 Difference]: Finished difference Result 64 states and 69 transitions. [2018-02-02 09:55:06,583 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-02-02 09:55:06,583 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 27 [2018-02-02 09:55:06,584 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:55:06,584 INFO L225 Difference]: With dead ends: 64 [2018-02-02 09:55:06,584 INFO L226 Difference]: Without dead ends: 64 [2018-02-02 09:55:06,585 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 1 SyntacticMatches, 6 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=40, Invalid=116, Unknown=0, NotChecked=0, Total=156 [2018-02-02 09:55:06,585 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 64 states. [2018-02-02 09:55:06,588 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 64 to 62. [2018-02-02 09:55:06,588 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 62 states. [2018-02-02 09:55:06,589 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 62 states to 62 states and 67 transitions. [2018-02-02 09:55:06,589 INFO L78 Accepts]: Start accepts. Automaton has 62 states and 67 transitions. Word has length 27 [2018-02-02 09:55:06,589 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:55:06,589 INFO L432 AbstractCegarLoop]: Abstraction has 62 states and 67 transitions. [2018-02-02 09:55:06,589 INFO L433 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-02-02 09:55:06,590 INFO L276 IsEmpty]: Start isEmpty. Operand 62 states and 67 transitions. [2018-02-02 09:55:06,590 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2018-02-02 09:55:06,590 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:55:06,590 INFO L351 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:55:06,591 INFO L371 AbstractCegarLoop]: === Iteration 6 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-02 09:55:06,591 INFO L82 PathProgramCache]: Analyzing trace with hash 1339860797, now seen corresponding path program 1 times [2018-02-02 09:55:06,592 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-02 09:55:06,611 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:55:06,612 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:55:06,708 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 09:55:06,708 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-02 09:55:06,708 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6] total 6 [2018-02-02 09:55:06,709 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-02 09:55:06,709 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 09:55:06,709 INFO L182 omatonBuilderFactory]: Interpolants [752#true, 753#false, 754#(and (= 0 |main_#t~malloc9.offset|) (= 94 (select |#length| |main_#t~malloc9.base|))), 755#(and (= 0 main_~p~0.offset) (= 94 (select |#length| main_~p~0.base))), 756#(and (= 94 (select |#length| |Sum_#in~instrs.base|)) (= 0 |Sum_#in~instrs.offset|)), 757#(and (= Sum_~instrs.offset 0) (= Sum_~i~0 0) (= (select |#length| Sum_~instrs.base) 94)), 758#(and (= Sum_~instrs.offset 0) (<= 20 (+ Sum_~instrs.offset (* 30 Sum_~i~0))) (<= Sum_~i~0 1) (= (select |#length| Sum_~instrs.base) 94))] [2018-02-02 09:55:06,709 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 09:55:06,709 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-02-02 09:55:06,709 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-02-02 09:55:06,710 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-02-02 09:55:06,710 INFO L87 Difference]: Start difference. First operand 62 states and 67 transitions. Second operand 7 states. [2018-02-02 09:55:06,821 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:55:06,821 INFO L93 Difference]: Finished difference Result 73 states and 79 transitions. [2018-02-02 09:55:06,821 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-02-02 09:55:06,821 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 33 [2018-02-02 09:55:06,822 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:55:06,823 INFO L225 Difference]: With dead ends: 73 [2018-02-02 09:55:06,823 INFO L226 Difference]: Without dead ends: 73 [2018-02-02 09:55:06,824 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=23, Invalid=67, Unknown=0, NotChecked=0, Total=90 [2018-02-02 09:55:06,824 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 73 states. [2018-02-02 09:55:06,827 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 73 to 68. [2018-02-02 09:55:06,827 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 68 states. [2018-02-02 09:55:06,828 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 68 states to 68 states and 74 transitions. [2018-02-02 09:55:06,828 INFO L78 Accepts]: Start accepts. Automaton has 68 states and 74 transitions. Word has length 33 [2018-02-02 09:55:06,829 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:55:06,829 INFO L432 AbstractCegarLoop]: Abstraction has 68 states and 74 transitions. [2018-02-02 09:55:06,829 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-02-02 09:55:06,829 INFO L276 IsEmpty]: Start isEmpty. Operand 68 states and 74 transitions. [2018-02-02 09:55:06,830 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2018-02-02 09:55:06,830 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:55:06,830 INFO L351 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:55:06,830 INFO L371 AbstractCegarLoop]: === Iteration 7 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-02 09:55:06,835 INFO L82 PathProgramCache]: Analyzing trace with hash 1098804299, now seen corresponding path program 1 times [2018-02-02 09:55:06,835 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-02 09:55:06,848 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:55:06,848 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:55:06,878 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-02-02 09:55:06,878 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-02 09:55:06,879 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-02-02 09:55:06,879 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-02 09:55:06,879 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 09:55:06,879 INFO L182 omatonBuilderFactory]: Interpolants [906#true, 907#false, 908#(= 1 (select |#valid| main_~p~0.base)), 909#(= 1 (select |#valid| |Sum2_#in~instrs.base|)), 910#(= 1 (select |#valid| Sum2_~instrs.base))] [2018-02-02 09:55:06,880 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-02-02 09:55:06,880 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-02-02 09:55:06,880 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-02-02 09:55:06,880 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-02-02 09:55:06,880 INFO L87 Difference]: Start difference. First operand 68 states and 74 transitions. Second operand 5 states. [2018-02-02 09:55:06,940 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:55:06,940 INFO L93 Difference]: Finished difference Result 66 states and 72 transitions. [2018-02-02 09:55:06,940 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-02-02 09:55:06,940 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 40 [2018-02-02 09:55:06,941 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:55:06,941 INFO L225 Difference]: With dead ends: 66 [2018-02-02 09:55:06,941 INFO L226 Difference]: Without dead ends: 66 [2018-02-02 09:55:06,941 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-02-02 09:55:06,942 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 66 states. [2018-02-02 09:55:06,944 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 66 to 66. [2018-02-02 09:55:06,944 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 66 states. [2018-02-02 09:55:06,945 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 66 states to 66 states and 72 transitions. [2018-02-02 09:55:06,945 INFO L78 Accepts]: Start accepts. Automaton has 66 states and 72 transitions. Word has length 40 [2018-02-02 09:55:06,945 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:55:06,946 INFO L432 AbstractCegarLoop]: Abstraction has 66 states and 72 transitions. [2018-02-02 09:55:06,946 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-02-02 09:55:06,946 INFO L276 IsEmpty]: Start isEmpty. Operand 66 states and 72 transitions. [2018-02-02 09:55:06,946 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2018-02-02 09:55:06,946 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:55:06,947 INFO L351 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:55:06,947 INFO L371 AbstractCegarLoop]: === Iteration 8 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-02 09:55:06,947 INFO L82 PathProgramCache]: Analyzing trace with hash 1098804300, now seen corresponding path program 1 times [2018-02-02 09:55:06,948 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-02 09:55:06,959 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:55:06,960 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:55:07,020 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-02-02 09:55:07,020 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-02 09:55:07,020 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-02-02 09:55:07,020 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-02 09:55:07,021 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 09:55:07,021 INFO L182 omatonBuilderFactory]: Interpolants [1045#true, 1046#false, 1047#(and (= 0 |main_#t~malloc9.offset|) (= 94 (select |#length| |main_#t~malloc9.base|))), 1048#(and (= 0 main_~p~0.offset) (= 94 (select |#length| main_~p~0.base))), 1049#(and (= 0 |Sum2_#in~instrs.offset|) (= 94 (select |#length| |Sum2_#in~instrs.base|))), 1050#(and (= Sum2_~instrs.offset 0) (= (select |#length| Sum2_~instrs.base) 94))] [2018-02-02 09:55:07,021 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-02-02 09:55:07,021 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-02-02 09:55:07,022 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-02-02 09:55:07,022 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-02-02 09:55:07,022 INFO L87 Difference]: Start difference. First operand 66 states and 72 transitions. Second operand 6 states. [2018-02-02 09:55:07,099 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:55:07,100 INFO L93 Difference]: Finished difference Result 65 states and 71 transitions. [2018-02-02 09:55:07,100 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-02-02 09:55:07,100 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 40 [2018-02-02 09:55:07,100 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:55:07,101 INFO L225 Difference]: With dead ends: 65 [2018-02-02 09:55:07,101 INFO L226 Difference]: Without dead ends: 65 [2018-02-02 09:55:07,101 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2018-02-02 09:55:07,101 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 65 states. [2018-02-02 09:55:07,104 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 65 to 65. [2018-02-02 09:55:07,104 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 65 states. [2018-02-02 09:55:07,105 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 65 states to 65 states and 71 transitions. [2018-02-02 09:55:07,105 INFO L78 Accepts]: Start accepts. Automaton has 65 states and 71 transitions. Word has length 40 [2018-02-02 09:55:07,105 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:55:07,105 INFO L432 AbstractCegarLoop]: Abstraction has 65 states and 71 transitions. [2018-02-02 09:55:07,105 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-02-02 09:55:07,106 INFO L276 IsEmpty]: Start isEmpty. Operand 65 states and 71 transitions. [2018-02-02 09:55:07,106 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2018-02-02 09:55:07,106 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:55:07,107 INFO L351 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:55:07,107 INFO L371 AbstractCegarLoop]: === Iteration 9 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-02 09:55:07,107 INFO L82 PathProgramCache]: Analyzing trace with hash -1261174143, now seen corresponding path program 2 times [2018-02-02 09:55:07,108 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-02 09:55:07,120 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:55:07,120 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:55:07,255 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 09:55:07,256 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-02 09:55:07,256 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7] total 7 [2018-02-02 09:55:07,256 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-02 09:55:07,256 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 09:55:07,256 INFO L182 omatonBuilderFactory]: Interpolants [1185#true, 1186#false, 1187#(and (= 0 |main_#t~malloc9.offset|) (= 94 (select |#length| |main_#t~malloc9.base|))), 1188#(and (= 0 main_~p~0.offset) (= 94 (select |#length| main_~p~0.base))), 1189#(and (= 94 (select |#length| |Sum_#in~instrs.base|)) (= 0 |Sum_#in~instrs.offset|)), 1190#(and (= Sum_~instrs.offset 0) (= Sum_~i~0 0) (= (select |#length| Sum_~instrs.base) 94)), 1191#(and (= Sum_~instrs.offset 0) (<= 20 (+ Sum_~instrs.offset (* 30 Sum_~i~0))) (<= Sum_~i~0 1) (= (select |#length| Sum_~instrs.base) 94)), 1192#(and (<= 50 (+ Sum_~instrs.offset (* 30 Sum_~i~0))) (<= Sum_~i~0 2) (= Sum_~instrs.offset 0) (= (select |#length| Sum_~instrs.base) 94))] [2018-02-02 09:55:07,256 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 09:55:07,256 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-02-02 09:55:07,257 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-02-02 09:55:07,257 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2018-02-02 09:55:07,257 INFO L87 Difference]: Start difference. First operand 65 states and 71 transitions. Second operand 8 states. [2018-02-02 09:55:07,460 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:55:07,461 INFO L93 Difference]: Finished difference Result 79 states and 86 transitions. [2018-02-02 09:55:07,461 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-02-02 09:55:07,461 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 39 [2018-02-02 09:55:07,461 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:55:07,462 INFO L225 Difference]: With dead ends: 79 [2018-02-02 09:55:07,462 INFO L226 Difference]: Without dead ends: 79 [2018-02-02 09:55:07,462 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=29, Invalid=103, Unknown=0, NotChecked=0, Total=132 [2018-02-02 09:55:07,463 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 79 states. [2018-02-02 09:55:07,466 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 79 to 71. [2018-02-02 09:55:07,466 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 71 states. [2018-02-02 09:55:07,467 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 71 states to 71 states and 78 transitions. [2018-02-02 09:55:07,467 INFO L78 Accepts]: Start accepts. Automaton has 71 states and 78 transitions. Word has length 39 [2018-02-02 09:55:07,467 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:55:07,467 INFO L432 AbstractCegarLoop]: Abstraction has 71 states and 78 transitions. [2018-02-02 09:55:07,467 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-02-02 09:55:07,467 INFO L276 IsEmpty]: Start isEmpty. Operand 71 states and 78 transitions. [2018-02-02 09:55:07,468 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-02-02 09:55:07,468 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:55:07,468 INFO L351 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:55:07,471 INFO L371 AbstractCegarLoop]: === Iteration 10 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-02 09:55:07,471 INFO L82 PathProgramCache]: Analyzing trace with hash -611024051, now seen corresponding path program 1 times [2018-02-02 09:55:07,472 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-02 09:55:07,481 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:55:07,482 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:55:07,670 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-02-02 09:55:07,670 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-02 09:55:07,670 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11] total 11 [2018-02-02 09:55:07,670 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-02 09:55:07,671 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 09:55:07,671 INFO L182 omatonBuilderFactory]: Interpolants [1360#(and (= Sum2_~i~1 0) (<= (select (select |#memory_int| Sum2_~instrs.base) Sum2_~instrs.offset) 3) (= Sum2_~instrs.offset 0) (= (select |#length| Sum2_~instrs.base) 94)), 1361#(and (= Sum2_~i~1 0) (<= |Sum2_#t~mem7| 3) (= Sum2_~instrs.offset 0) (= (select |#length| Sum2_~instrs.base) 94)), 1362#(and (= Sum2_~i~1 0) (= Sum2_~instrs.offset 0) (= (select |#length| Sum2_~instrs.base) 94)), 1351#true, 1352#false, 1353#(and (= 0 |main_#t~malloc9.offset|) (= 94 (select |#length| |main_#t~malloc9.base|))), 1354#(and (= 0 main_~p~0.offset) (= 94 (select |#length| main_~p~0.base))), 1355#(and (= 0 main_~p~0.offset) (= 94 (select |#length| main_~p~0.base)) (= 3 (select (store (select |#memory_int| main_~p~0.base) (+ main_~p~0.offset 10) 555) main_~p~0.offset))), 1356#(and (= Sum_~instrs.base |Sum_#in~instrs.base|) (= Sum_~instrs.offset |Sum_#in~instrs.offset|)), 1357#(and (= Sum_~instrs.base |Sum_#in~instrs.base|) (= Sum_~instrs.offset |Sum_#in~instrs.offset|) (= |Sum_#t~mem4| (select (select |#memory_int| Sum_~instrs.base) Sum_~instrs.offset))), 1358#(and (= 0 main_~p~0.offset) (= 94 (select |#length| main_~p~0.base)) (<= (select (select |#memory_int| main_~p~0.base) main_~p~0.offset) 3)), 1359#(and (<= (select (select |#memory_int| |Sum2_#in~instrs.base|) |Sum2_#in~instrs.offset|) 3) (= 0 |Sum2_#in~instrs.offset|) (= 94 (select |#length| |Sum2_#in~instrs.base|)))] [2018-02-02 09:55:07,671 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-02-02 09:55:07,671 INFO L409 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-02-02 09:55:07,671 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-02-02 09:55:07,671 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=105, Unknown=0, NotChecked=0, Total=132 [2018-02-02 09:55:07,671 INFO L87 Difference]: Start difference. First operand 71 states and 78 transitions. Second operand 12 states. [2018-02-02 09:55:07,795 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:55:07,795 INFO L93 Difference]: Finished difference Result 80 states and 88 transitions. [2018-02-02 09:55:07,795 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-02-02 09:55:07,795 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 42 [2018-02-02 09:55:07,796 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:55:07,796 INFO L225 Difference]: With dead ends: 80 [2018-02-02 09:55:07,796 INFO L226 Difference]: Without dead ends: 80 [2018-02-02 09:55:07,796 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 1 SyntacticMatches, 8 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 33 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=50, Invalid=190, Unknown=0, NotChecked=0, Total=240 [2018-02-02 09:55:07,796 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 80 states. [2018-02-02 09:55:07,798 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 80 to 75. [2018-02-02 09:55:07,798 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 75 states. [2018-02-02 09:55:07,799 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 75 states to 75 states and 83 transitions. [2018-02-02 09:55:07,799 INFO L78 Accepts]: Start accepts. Automaton has 75 states and 83 transitions. Word has length 42 [2018-02-02 09:55:07,799 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:55:07,799 INFO L432 AbstractCegarLoop]: Abstraction has 75 states and 83 transitions. [2018-02-02 09:55:07,799 INFO L433 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-02-02 09:55:07,799 INFO L276 IsEmpty]: Start isEmpty. Operand 75 states and 83 transitions. [2018-02-02 09:55:07,799 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2018-02-02 09:55:07,800 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:55:07,800 INFO L351 BasicCegarLoop]: trace histogram [4, 4, 4, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:55:07,800 INFO L371 AbstractCegarLoop]: === Iteration 11 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-02 09:55:07,800 INFO L82 PathProgramCache]: Analyzing trace with hash 683858629, now seen corresponding path program 3 times [2018-02-02 09:55:07,800 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-02 09:55:07,810 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:55:07,810 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:55:07,975 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 17 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 09:55:07,975 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-02 09:55:07,975 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14] total 14 [2018-02-02 09:55:07,975 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-02 09:55:07,976 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 09:55:07,976 INFO L182 omatonBuilderFactory]: Interpolants [1536#(and (<= (* 30 (select (select |#memory_int| Sum_~instrs.base) Sum_~instrs.offset)) (+ Sum_~instrs.offset (* 30 Sum_~i~0) 70)) (= Sum_~instrs.offset 0)), 1537#(and (<= (* 30 (select (select |#memory_int| Sum_~instrs.base) Sum_~instrs.offset)) (+ Sum_~instrs.offset (* 30 Sum_~i~0) 40)) (= Sum_~instrs.offset 0)), 1538#(and (= Sum_~instrs.offset 0) (<= (* 30 (select (select |#memory_int| Sum_~instrs.base) Sum_~instrs.offset)) (+ Sum_~instrs.offset (* 30 Sum_~i~0) 10))), 1539#(and (<= (* 30 |Sum_#t~mem4|) (+ Sum_~instrs.offset (* 30 Sum_~i~0) 10)) (= Sum_~instrs.offset 0)), 1526#true, 1527#false, 1528#(= 0 |main_#t~malloc9.offset|), 1529#(= 0 main_~p~0.offset), 1530#(and (= 0 main_~p~0.offset) (= 3 (select (store (select |#memory_int| main_~p~0.base) (+ main_~p~0.offset 10) 555) main_~p~0.offset))), 1531#(and (= 0 |Sum_#in~instrs.offset|) (= 3 (select (select |#memory_int| |Sum_#in~instrs.base|) |Sum_#in~instrs.offset|))), 1532#(and (= 3 (select (select |#memory_int| Sum_~instrs.base) Sum_~instrs.offset)) (= Sum_~instrs.offset 0)), 1533#(and (= Sum_~instrs.offset 0) (= |Sum_#t~mem4| (select (select |#memory_int| Sum_~instrs.base) Sum_~instrs.offset)) (= |Sum_#t~mem4| 3)), 1534#(and (= Sum_~instrs.offset 0) (<= (select (select |#memory_int| Sum_~instrs.base) Sum_~instrs.offset) 3)), 1535#(and (<= (* 30 (select (select |#memory_int| Sum_~instrs.base) Sum_~instrs.offset)) (+ Sum_~instrs.offset (* 30 Sum_~i~0) 100)) (= Sum_~instrs.offset 0))] [2018-02-02 09:55:07,976 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 17 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 09:55:07,976 INFO L409 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-02-02 09:55:07,976 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-02-02 09:55:07,977 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=147, Unknown=0, NotChecked=0, Total=182 [2018-02-02 09:55:07,977 INFO L87 Difference]: Start difference. First operand 75 states and 83 transitions. Second operand 14 states. [2018-02-02 09:55:08,200 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:55:08,200 INFO L93 Difference]: Finished difference Result 73 states and 80 transitions. [2018-02-02 09:55:08,200 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-02-02 09:55:08,200 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 45 [2018-02-02 09:55:08,200 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:55:08,201 INFO L225 Difference]: With dead ends: 73 [2018-02-02 09:55:08,201 INFO L226 Difference]: Without dead ends: 73 [2018-02-02 09:55:08,201 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 30 GetRequests, 1 SyntacticMatches, 7 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 70 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=132, Invalid=420, Unknown=0, NotChecked=0, Total=552 [2018-02-02 09:55:08,201 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 73 states. [2018-02-02 09:55:08,203 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 73 to 73. [2018-02-02 09:55:08,203 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 73 states. [2018-02-02 09:55:08,203 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 73 states to 73 states and 80 transitions. [2018-02-02 09:55:08,203 INFO L78 Accepts]: Start accepts. Automaton has 73 states and 80 transitions. Word has length 45 [2018-02-02 09:55:08,203 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:55:08,203 INFO L432 AbstractCegarLoop]: Abstraction has 73 states and 80 transitions. [2018-02-02 09:55:08,204 INFO L433 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-02-02 09:55:08,204 INFO L276 IsEmpty]: Start isEmpty. Operand 73 states and 80 transitions. [2018-02-02 09:55:08,204 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2018-02-02 09:55:08,204 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:55:08,204 INFO L351 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:55:08,204 INFO L371 AbstractCegarLoop]: === Iteration 12 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-02 09:55:08,205 INFO L82 PathProgramCache]: Analyzing trace with hash 1720438236, now seen corresponding path program 1 times [2018-02-02 09:55:08,205 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-02 09:55:08,210 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:55:08,211 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:55:08,243 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-02-02 09:55:08,244 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-02 09:55:08,244 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-02-02 09:55:08,244 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-02 09:55:08,244 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 09:55:08,244 INFO L182 omatonBuilderFactory]: Interpolants [1706#true, 1707#false, 1708#(= 0 Sum2_~count~1), 1709#(= 0 |Sum2_#res|), 1710#(= |main_#t~ret19| 0)] [2018-02-02 09:55:08,244 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-02-02 09:55:08,245 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-02-02 09:55:08,245 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-02-02 09:55:08,245 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-02-02 09:55:08,245 INFO L87 Difference]: Start difference. First operand 73 states and 80 transitions. Second operand 5 states. [2018-02-02 09:55:08,258 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:55:08,258 INFO L93 Difference]: Finished difference Result 79 states and 86 transitions. [2018-02-02 09:55:08,259 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-02-02 09:55:08,259 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 48 [2018-02-02 09:55:08,259 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:55:08,259 INFO L225 Difference]: With dead ends: 79 [2018-02-02 09:55:08,259 INFO L226 Difference]: Without dead ends: 79 [2018-02-02 09:55:08,259 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-02-02 09:55:08,259 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 79 states. [2018-02-02 09:55:08,261 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 79 to 78. [2018-02-02 09:55:08,261 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 78 states. [2018-02-02 09:55:08,261 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 78 states to 78 states and 85 transitions. [2018-02-02 09:55:08,261 INFO L78 Accepts]: Start accepts. Automaton has 78 states and 85 transitions. Word has length 48 [2018-02-02 09:55:08,261 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:55:08,261 INFO L432 AbstractCegarLoop]: Abstraction has 78 states and 85 transitions. [2018-02-02 09:55:08,261 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-02-02 09:55:08,261 INFO L276 IsEmpty]: Start isEmpty. Operand 78 states and 85 transitions. [2018-02-02 09:55:08,262 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2018-02-02 09:55:08,262 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:55:08,263 INFO L351 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:55:08,263 INFO L371 AbstractCegarLoop]: === Iteration 13 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-02 09:55:08,263 INFO L82 PathProgramCache]: Analyzing trace with hash 1218885073, now seen corresponding path program 1 times [2018-02-02 09:55:08,264 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-02 09:55:08,270 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:55:08,271 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:55:08,355 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-02-02 09:55:08,355 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-02 09:55:08,355 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6] total 6 [2018-02-02 09:55:08,355 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-02 09:55:08,355 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 09:55:08,355 INFO L182 omatonBuilderFactory]: Interpolants [1872#(and (= 0 |main_#t~malloc9.offset|) (= 94 (select |#length| |main_#t~malloc9.base|))), 1873#(and (= 0 main_~p~0.offset) (= 94 (select |#length| main_~p~0.base))), 1874#(and (= 0 |Sum2_#in~instrs.offset|) (= 94 (select |#length| |Sum2_#in~instrs.base|))), 1875#(and (= Sum2_~i~1 0) (= Sum2_~instrs.offset 0) (= (select |#length| Sum2_~instrs.base) 94)), 1876#(and (<= Sum2_~i~1 1) (= Sum2_~instrs.offset 0) (<= 12 (+ (* 30 Sum2_~i~1) Sum2_~instrs.offset)) (= (select |#length| Sum2_~instrs.base) 94)), 1870#true, 1871#false] [2018-02-02 09:55:08,356 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-02-02 09:55:08,356 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-02-02 09:55:08,356 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-02-02 09:55:08,356 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-02-02 09:55:08,356 INFO L87 Difference]: Start difference. First operand 78 states and 85 transitions. Second operand 7 states. [2018-02-02 09:55:08,453 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:55:08,453 INFO L93 Difference]: Finished difference Result 89 states and 97 transitions. [2018-02-02 09:55:08,453 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-02-02 09:55:08,453 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 48 [2018-02-02 09:55:08,454 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:55:08,454 INFO L225 Difference]: With dead ends: 89 [2018-02-02 09:55:08,454 INFO L226 Difference]: Without dead ends: 89 [2018-02-02 09:55:08,454 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=23, Invalid=67, Unknown=0, NotChecked=0, Total=90 [2018-02-02 09:55:08,455 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 89 states. [2018-02-02 09:55:08,456 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 89 to 84. [2018-02-02 09:55:08,456 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 84 states. [2018-02-02 09:55:08,457 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 84 states to 84 states and 92 transitions. [2018-02-02 09:55:08,457 INFO L78 Accepts]: Start accepts. Automaton has 84 states and 92 transitions. Word has length 48 [2018-02-02 09:55:08,457 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:55:08,457 INFO L432 AbstractCegarLoop]: Abstraction has 84 states and 92 transitions. [2018-02-02 09:55:08,457 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-02-02 09:55:08,457 INFO L276 IsEmpty]: Start isEmpty. Operand 84 states and 92 transitions. [2018-02-02 09:55:08,458 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2018-02-02 09:55:08,458 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:55:08,458 INFO L351 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:55:08,458 INFO L371 AbstractCegarLoop]: === Iteration 14 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-02 09:55:08,459 INFO L82 PathProgramCache]: Analyzing trace with hash 1657636855, now seen corresponding path program 1 times [2018-02-02 09:55:08,459 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-02 09:55:08,468 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:55:08,469 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:55:08,595 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-02-02 09:55:08,595 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-02 09:55:08,595 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9] total 9 [2018-02-02 09:55:08,595 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-02 09:55:08,596 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 09:55:08,596 INFO L182 omatonBuilderFactory]: Interpolants [2064#(<= (select (select |#memory_int| |Sum2_#in~instrs.base|) |Sum2_#in~instrs.offset|) 0), 2056#true, 2057#false, 2058#(= 3 (select (store (select |#memory_int| main_~p~0.base) (+ main_~p~0.offset 10) 555) main_~p~0.offset)), 2059#(and (= Sum_~instrs.base |Sum_#in~instrs.base|) (= Sum_~instrs.offset |Sum_#in~instrs.offset|)), 2060#(and (= Sum_~instrs.base |Sum_#in~instrs.base|) (= Sum_~instrs.offset |Sum_#in~instrs.offset|) (= |Sum_#t~mem4| (select (select |#memory_int| Sum_~instrs.base) Sum_~instrs.offset))), 2061#(<= 3 (select (select |#memory_int| main_~p~0.base) main_~p~0.offset)), 2062#(and (= Sum2_~instrs.base |Sum2_#in~instrs.base|) (= Sum2_~i~1 0) (= Sum2_~instrs.offset |Sum2_#in~instrs.offset|)), 2063#(and (= Sum2_~i~1 0) (= |Sum2_#t~mem7| (select (select |#memory_int| |Sum2_#in~instrs.base|) |Sum2_#in~instrs.offset|)))] [2018-02-02 09:55:08,596 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-02-02 09:55:08,596 INFO L409 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-02-02 09:55:08,596 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-02-02 09:55:08,596 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2018-02-02 09:55:08,596 INFO L87 Difference]: Start difference. First operand 84 states and 92 transitions. Second operand 9 states. [2018-02-02 09:55:08,691 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:55:08,691 INFO L93 Difference]: Finished difference Result 82 states and 89 transitions. [2018-02-02 09:55:08,691 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-02-02 09:55:08,691 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 51 [2018-02-02 09:55:08,692 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:55:08,692 INFO L225 Difference]: With dead ends: 82 [2018-02-02 09:55:08,692 INFO L226 Difference]: Without dead ends: 79 [2018-02-02 09:55:08,692 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 2 SyntacticMatches, 8 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=25, Invalid=85, Unknown=0, NotChecked=0, Total=110 [2018-02-02 09:55:08,692 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 79 states. [2018-02-02 09:55:08,693 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 79 to 79. [2018-02-02 09:55:08,693 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 79 states. [2018-02-02 09:55:08,694 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 79 states to 79 states and 86 transitions. [2018-02-02 09:55:08,694 INFO L78 Accepts]: Start accepts. Automaton has 79 states and 86 transitions. Word has length 51 [2018-02-02 09:55:08,694 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:55:08,694 INFO L432 AbstractCegarLoop]: Abstraction has 79 states and 86 transitions. [2018-02-02 09:55:08,694 INFO L433 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-02-02 09:55:08,694 INFO L276 IsEmpty]: Start isEmpty. Operand 79 states and 86 transitions. [2018-02-02 09:55:08,695 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2018-02-02 09:55:08,695 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:55:08,695 INFO L351 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:55:08,695 INFO L371 AbstractCegarLoop]: === Iteration 15 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-02 09:55:08,695 INFO L82 PathProgramCache]: Analyzing trace with hash 2087128416, now seen corresponding path program 1 times [2018-02-02 09:55:08,696 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-02 09:55:08,703 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:55:08,703 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:55:08,859 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-02-02 09:55:08,859 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-02 09:55:08,859 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9] total 9 [2018-02-02 09:55:08,860 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-02 09:55:08,860 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 09:55:08,860 INFO L182 omatonBuilderFactory]: Interpolants [2230#true, 2231#false, 2232#(= 3 (select (store (select |#memory_int| main_~p~0.base) (+ main_~p~0.offset 10) 555) main_~p~0.offset)), 2233#(and (= Sum2_~instrs.base |Sum2_#in~instrs.base|) (= Sum2_~i~1 0) (= Sum2_~instrs.offset |Sum2_#in~instrs.offset|)), 2234#(and (= Sum2_~i~1 0) (or (= |Sum2_#t~mem7| 3) (and (= Sum2_~instrs.base |Sum2_#in~instrs.base|) (= Sum2_~instrs.offset |Sum2_#in~instrs.offset|))) (= |Sum2_#t~mem7| (select (select |#memory_int| Sum2_~instrs.base) Sum2_~instrs.offset))), 2235#(and (= Sum2_~i~1 0) (or (<= 3 (select (select |#memory_int| Sum2_~instrs.base) Sum2_~instrs.offset)) (and (= Sum2_~instrs.base |Sum2_#in~instrs.base|) (= Sum2_~instrs.offset |Sum2_#in~instrs.offset|)))), 2236#(or (<= (+ Sum2_~i~1 2) (select (select |#memory_int| Sum2_~instrs.base) Sum2_~instrs.offset)) (and (= Sum2_~instrs.base |Sum2_#in~instrs.base|) (= Sum2_~instrs.offset |Sum2_#in~instrs.offset|) (not (= 3 (select (select |#memory_int| Sum2_~instrs.base) Sum2_~instrs.offset))))), 2237#(or (not (= 3 (select (select |#memory_int| |Sum2_#in~instrs.base|) |Sum2_#in~instrs.offset|))) (<= (+ Sum2_~i~1 2) |Sum2_#t~mem7|)), 2238#(not (= 3 (select (select |#memory_int| |Sum2_#in~instrs.base|) |Sum2_#in~instrs.offset|)))] [2018-02-02 09:55:08,860 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-02-02 09:55:08,861 INFO L409 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-02-02 09:55:08,861 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-02-02 09:55:08,861 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=50, Unknown=0, NotChecked=0, Total=72 [2018-02-02 09:55:08,861 INFO L87 Difference]: Start difference. First operand 79 states and 86 transitions. Second operand 9 states. [2018-02-02 09:55:09,006 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:55:09,006 INFO L93 Difference]: Finished difference Result 84 states and 90 transitions. [2018-02-02 09:55:09,006 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-02-02 09:55:09,006 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 54 [2018-02-02 09:55:09,007 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:55:09,007 INFO L225 Difference]: With dead ends: 84 [2018-02-02 09:55:09,007 INFO L226 Difference]: Without dead ends: 81 [2018-02-02 09:55:09,008 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 2 SyntacticMatches, 6 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=41, Invalid=91, Unknown=0, NotChecked=0, Total=132 [2018-02-02 09:55:09,008 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 81 states. [2018-02-02 09:55:09,009 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 81 to 79. [2018-02-02 09:55:09,009 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 79 states. [2018-02-02 09:55:09,010 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 79 states to 79 states and 85 transitions. [2018-02-02 09:55:09,010 INFO L78 Accepts]: Start accepts. Automaton has 79 states and 85 transitions. Word has length 54 [2018-02-02 09:55:09,010 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:55:09,010 INFO L432 AbstractCegarLoop]: Abstraction has 79 states and 85 transitions. [2018-02-02 09:55:09,010 INFO L433 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-02-02 09:55:09,014 INFO L276 IsEmpty]: Start isEmpty. Operand 79 states and 85 transitions. [2018-02-02 09:55:09,015 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2018-02-02 09:55:09,015 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:55:09,015 INFO L351 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:55:09,015 INFO L371 AbstractCegarLoop]: === Iteration 16 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-02 09:55:09,015 INFO L82 PathProgramCache]: Analyzing trace with hash 1585575253, now seen corresponding path program 2 times [2018-02-02 09:55:09,016 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-02 09:55:09,025 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:55:09,025 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:55:09,286 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 5 proven. 9 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-02-02 09:55:09,287 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-02 09:55:09,287 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13] total 13 [2018-02-02 09:55:09,287 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-02 09:55:09,287 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 09:55:09,287 INFO L182 omatonBuilderFactory]: Interpolants [2408#true, 2409#false, 2410#(and (= 0 |main_#t~malloc9.offset|) (= 94 (select |#length| |main_#t~malloc9.base|))), 2411#(and (= 0 main_~p~0.offset) (= 94 (select |#length| main_~p~0.base))), 2412#(and (= 0 main_~p~0.offset) (= 94 (select |#length| main_~p~0.base)) (= 3 (select (store (select |#memory_int| main_~p~0.base) (+ main_~p~0.offset 10) 555) main_~p~0.offset))), 2413#(and (= 0 |Sum2_#in~instrs.offset|) (= 3 (select (select |#memory_int| |Sum2_#in~instrs.base|) |Sum2_#in~instrs.offset|)) (= 94 (select |#length| |Sum2_#in~instrs.base|))), 2414#(and (= Sum2_~instrs.offset 0) (= 3 (select (select |#memory_int| Sum2_~instrs.base) Sum2_~instrs.offset)) (= (select |#length| Sum2_~instrs.base) 94)), 2415#(and (= Sum2_~instrs.offset 0) (= |Sum2_#t~mem7| 3) (= (select |#length| Sum2_~instrs.base) 94) (= |Sum2_#t~mem7| (select (select |#memory_int| Sum2_~instrs.base) Sum2_~instrs.offset))), 2416#(and (<= (select (select |#memory_int| Sum2_~instrs.base) Sum2_~instrs.offset) 3) (= Sum2_~instrs.offset 0) (= (select |#length| Sum2_~instrs.base) 94)), 2417#(and (<= 0 (+ (* 30 Sum2_~i~1) Sum2_~instrs.offset 18)) (<= (select (select |#memory_int| Sum2_~instrs.base) Sum2_~instrs.offset) 3) (= Sum2_~instrs.offset 0) (= (select |#length| Sum2_~instrs.base) 94)), 2418#(and (<= (select (select |#memory_int| Sum2_~instrs.base) Sum2_~instrs.offset) 3) (= Sum2_~instrs.offset 0) (<= 12 (+ (* 30 Sum2_~i~1) Sum2_~instrs.offset)) (= (select |#length| Sum2_~instrs.base) 94)), 2419#(and (<= 42 (+ (* 30 Sum2_~i~1) Sum2_~instrs.offset)) (<= (select (select |#memory_int| Sum2_~instrs.base) Sum2_~instrs.offset) 3) (= Sum2_~instrs.offset 0) (= (select |#length| Sum2_~instrs.base) 94)), 2420#(and (<= 42 (+ (* 30 Sum2_~i~1) Sum2_~instrs.offset)) (<= |Sum2_#t~mem7| 3) (= Sum2_~instrs.offset 0) (= (select |#length| Sum2_~instrs.base) 94)), 2421#(and (<= 42 (+ (* 30 Sum2_~i~1) Sum2_~instrs.offset)) (<= Sum2_~i~1 2) (= Sum2_~instrs.offset 0) (= (select |#length| Sum2_~instrs.base) 94))] [2018-02-02 09:55:09,287 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 5 proven. 9 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-02-02 09:55:09,288 INFO L409 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-02-02 09:55:09,288 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-02-02 09:55:09,288 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=147, Unknown=0, NotChecked=0, Total=182 [2018-02-02 09:55:09,288 INFO L87 Difference]: Start difference. First operand 79 states and 85 transitions. Second operand 14 states. [2018-02-02 09:55:09,670 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:55:09,671 INFO L93 Difference]: Finished difference Result 80 states and 86 transitions. [2018-02-02 09:55:09,671 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-02-02 09:55:09,671 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 54 [2018-02-02 09:55:09,672 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:55:09,672 INFO L225 Difference]: With dead ends: 80 [2018-02-02 09:55:09,672 INFO L226 Difference]: Without dead ends: 80 [2018-02-02 09:55:09,673 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 28 GetRequests, 1 SyntacticMatches, 6 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 64 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=115, Invalid=391, Unknown=0, NotChecked=0, Total=506 [2018-02-02 09:55:09,673 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 80 states. [2018-02-02 09:55:09,674 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 80 to 77. [2018-02-02 09:55:09,674 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 77 states. [2018-02-02 09:55:09,675 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 77 states to 77 states and 83 transitions. [2018-02-02 09:55:09,675 INFO L78 Accepts]: Start accepts. Automaton has 77 states and 83 transitions. Word has length 54 [2018-02-02 09:55:09,675 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:55:09,675 INFO L432 AbstractCegarLoop]: Abstraction has 77 states and 83 transitions. [2018-02-02 09:55:09,675 INFO L433 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-02-02 09:55:09,676 INFO L276 IsEmpty]: Start isEmpty. Operand 77 states and 83 transitions. [2018-02-02 09:55:09,676 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2018-02-02 09:55:09,676 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:55:09,676 INFO L351 BasicCegarLoop]: trace histogram [3, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:55:09,676 INFO L371 AbstractCegarLoop]: === Iteration 17 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-02 09:55:09,676 INFO L82 PathProgramCache]: Analyzing trace with hash 1900911076, now seen corresponding path program 2 times [2018-02-02 09:55:09,677 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-02 09:55:09,685 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:55:09,686 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:55:09,854 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-02-02 09:55:09,855 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-02 09:55:09,855 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11] total 11 [2018-02-02 09:55:09,855 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-02 09:55:09,855 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 09:55:09,856 INFO L182 omatonBuilderFactory]: Interpolants [2597#true, 2598#false, 2599#(= 3 (select (store (select |#memory_int| main_~p~0.base) (+ main_~p~0.offset 10) 555) main_~p~0.offset)), 2600#(and (= Sum_~instrs.base |Sum_#in~instrs.base|) (= Sum_~instrs.offset |Sum_#in~instrs.offset|) (= Sum_~i~0 0)), 2601#(and (= Sum_~instrs.base |Sum_#in~instrs.base|) (= |Sum_#t~mem4| (select (select |#memory_int| Sum_~instrs.base) |Sum_#in~instrs.offset|)) (= |Sum_#t~mem4| (select (select |#memory_int| Sum_~instrs.base) Sum_~instrs.offset)) (= Sum_~i~0 0)), 2602#(and (= Sum_~instrs.base |Sum_#in~instrs.base|) (= Sum_~i~0 0) (<= (select (select |#memory_int| Sum_~instrs.base) |Sum_#in~instrs.offset|) (select (select |#memory_int| Sum_~instrs.base) Sum_~instrs.offset))), 2603#(and (= Sum_~instrs.base |Sum_#in~instrs.base|) (<= (+ (select (select |#memory_int| Sum_~instrs.base) |Sum_#in~instrs.offset|) Sum_~i~0) (+ (select (select |#memory_int| Sum_~instrs.base) Sum_~instrs.offset) 1))), 2604#(<= (+ (select (select |#memory_int| |Sum_#in~instrs.base|) |Sum_#in~instrs.offset|) Sum_~i~0) (+ |Sum_#t~mem4| 1)), 2605#(<= (select (select |#memory_int| |Sum_#in~instrs.base|) |Sum_#in~instrs.offset|) 1), 2606#(and (= Sum2_~instrs.base |Sum2_#in~instrs.base|) (= Sum2_~instrs.offset |Sum2_#in~instrs.offset|)), 2607#(and (= Sum2_~instrs.base |Sum2_#in~instrs.base|) (= Sum2_~instrs.offset |Sum2_#in~instrs.offset|) (= |Sum2_#t~mem7| (select (select |#memory_int| Sum2_~instrs.base) Sum2_~instrs.offset)))] [2018-02-02 09:55:09,856 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-02-02 09:55:09,856 INFO L409 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-02-02 09:55:09,856 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-02-02 09:55:09,856 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=26, Invalid=84, Unknown=0, NotChecked=0, Total=110 [2018-02-02 09:55:09,856 INFO L87 Difference]: Start difference. First operand 77 states and 83 transitions. Second operand 11 states. [2018-02-02 09:55:09,985 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:55:09,985 INFO L93 Difference]: Finished difference Result 80 states and 85 transitions. [2018-02-02 09:55:09,985 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-02-02 09:55:09,985 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 60 [2018-02-02 09:55:09,986 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:55:09,986 INFO L225 Difference]: With dead ends: 80 [2018-02-02 09:55:09,986 INFO L226 Difference]: Without dead ends: 77 [2018-02-02 09:55:09,986 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 2 SyntacticMatches, 9 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 22 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=43, Invalid=139, Unknown=0, NotChecked=0, Total=182 [2018-02-02 09:55:09,986 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 77 states. [2018-02-02 09:55:09,988 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 77 to 77. [2018-02-02 09:55:09,988 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 77 states. [2018-02-02 09:55:09,988 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 77 states to 77 states and 82 transitions. [2018-02-02 09:55:09,988 INFO L78 Accepts]: Start accepts. Automaton has 77 states and 82 transitions. Word has length 60 [2018-02-02 09:55:09,989 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:55:09,989 INFO L432 AbstractCegarLoop]: Abstraction has 77 states and 82 transitions. [2018-02-02 09:55:09,989 INFO L433 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-02-02 09:55:09,989 INFO L276 IsEmpty]: Start isEmpty. Operand 77 states and 82 transitions. [2018-02-02 09:55:09,989 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2018-02-02 09:55:09,989 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:55:09,990 INFO L351 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:55:09,990 INFO L371 AbstractCegarLoop]: === Iteration 18 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-02 09:55:09,990 INFO L82 PathProgramCache]: Analyzing trace with hash -283421664, now seen corresponding path program 3 times [2018-02-02 09:55:09,991 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-02 09:55:10,000 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:55:10,001 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:55:10,159 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 14 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-02-02 09:55:10,160 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-02 09:55:10,160 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11] total 11 [2018-02-02 09:55:10,160 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-02 09:55:10,160 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 09:55:10,160 INFO L182 omatonBuilderFactory]: Interpolants [2771#true, 2772#false, 2773#(= 3 (select (store (select |#memory_int| main_~p~0.base) (+ main_~p~0.offset 10) 555) main_~p~0.offset)), 2774#(and (= Sum_~instrs.base |Sum_#in~instrs.base|) (= Sum_~instrs.offset |Sum_#in~instrs.offset|) (= Sum_~i~0 0)), 2775#(and (or (not (= |Sum_#t~mem4| 3)) (= Sum_~i~0 0)) (or (and (= Sum_~instrs.base |Sum_#in~instrs.base|) (= Sum_~instrs.offset |Sum_#in~instrs.offset|)) (= |Sum_#t~mem4| 3)) (= |Sum_#t~mem4| (select (select |#memory_int| Sum_~instrs.base) Sum_~instrs.offset))), 2776#(or (and (= Sum_~instrs.base |Sum_#in~instrs.base|) (= Sum_~instrs.offset |Sum_#in~instrs.offset|) (not (= 3 (select (select |#memory_int| Sum_~instrs.base) Sum_~instrs.offset)))) (and (<= 3 (select (select |#memory_int| Sum_~instrs.base) Sum_~instrs.offset)) (= Sum_~i~0 0))), 2777#(or (and (= Sum_~instrs.base |Sum_#in~instrs.base|) (= Sum_~instrs.offset |Sum_#in~instrs.offset|) (not (= 3 (select (select |#memory_int| Sum_~instrs.base) Sum_~instrs.offset)))) (<= (+ Sum_~i~0 2) (select (select |#memory_int| Sum_~instrs.base) Sum_~instrs.offset))), 2778#(or (and (= Sum_~instrs.base |Sum_#in~instrs.base|) (= Sum_~instrs.offset |Sum_#in~instrs.offset|) (not (= 3 (select (select |#memory_int| Sum_~instrs.base) Sum_~instrs.offset)))) (<= (+ Sum_~i~0 1) (select (select |#memory_int| Sum_~instrs.base) Sum_~instrs.offset))), 2779#(or (not (= 3 (select (select |#memory_int| |Sum_#in~instrs.base|) |Sum_#in~instrs.offset|))) (<= (+ Sum_~i~0 1) |Sum_#t~mem4|)), 2780#(not (= 3 (select (select |#memory_int| |Sum_#in~instrs.base|) |Sum_#in~instrs.offset|))), 2781#(and (= Sum2_~instrs.base |Sum2_#in~instrs.base|) (= Sum2_~instrs.offset |Sum2_#in~instrs.offset|))] [2018-02-02 09:55:10,160 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 14 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-02-02 09:55:10,160 INFO L409 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-02-02 09:55:10,161 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-02-02 09:55:10,161 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=30, Invalid=80, Unknown=0, NotChecked=0, Total=110 [2018-02-02 09:55:10,161 INFO L87 Difference]: Start difference. First operand 77 states and 82 transitions. Second operand 11 states. [2018-02-02 09:55:10,313 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:55:10,313 INFO L93 Difference]: Finished difference Result 80 states and 84 transitions. [2018-02-02 09:55:10,313 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-02-02 09:55:10,313 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 66 [2018-02-02 09:55:10,314 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:55:10,314 INFO L225 Difference]: With dead ends: 80 [2018-02-02 09:55:10,314 INFO L226 Difference]: Without dead ends: 77 [2018-02-02 09:55:10,315 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 4 SyntacticMatches, 6 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 19 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=58, Invalid=152, Unknown=0, NotChecked=0, Total=210 [2018-02-02 09:55:10,315 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 77 states. [2018-02-02 09:55:10,317 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 77 to 77. [2018-02-02 09:55:10,317 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 77 states. [2018-02-02 09:55:10,318 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 77 states to 77 states and 81 transitions. [2018-02-02 09:55:10,318 INFO L78 Accepts]: Start accepts. Automaton has 77 states and 81 transitions. Word has length 66 [2018-02-02 09:55:10,318 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:55:10,318 INFO L432 AbstractCegarLoop]: Abstraction has 77 states and 81 transitions. [2018-02-02 09:55:10,318 INFO L433 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-02-02 09:55:10,319 INFO L276 IsEmpty]: Start isEmpty. Operand 77 states and 81 transitions. [2018-02-02 09:55:10,319 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2018-02-02 09:55:10,319 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:55:10,319 INFO L351 BasicCegarLoop]: trace histogram [4, 4, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:55:10,319 INFO L371 AbstractCegarLoop]: === Iteration 19 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-02 09:55:10,320 INFO L82 PathProgramCache]: Analyzing trace with hash -869568164, now seen corresponding path program 4 times [2018-02-02 09:55:10,320 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-02 09:55:10,330 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:55:10,331 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:55:10,478 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 17 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2018-02-02 09:55:10,478 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-02 09:55:10,478 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11] total 11 [2018-02-02 09:55:10,478 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-02 09:55:10,478 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 09:55:10,479 INFO L182 omatonBuilderFactory]: Interpolants [2947#true, 2948#false, 2949#(= 3 (select (store (select |#memory_int| main_~p~0.base) (+ main_~p~0.offset 10) 555) main_~p~0.offset)), 2950#(and (= Sum_~instrs.base |Sum_#in~instrs.base|) (= Sum_~instrs.offset |Sum_#in~instrs.offset|)), 2951#(and (= Sum_~instrs.base |Sum_#in~instrs.base|) (= Sum_~instrs.offset |Sum_#in~instrs.offset|) (= |Sum_#t~mem4| (select (select |#memory_int| Sum_~instrs.base) Sum_~instrs.offset))), 2952#(<= 3 (select (select |#memory_int| main_~p~0.base) main_~p~0.offset)), 2953#(and (= Sum2_~instrs.base |Sum2_#in~instrs.base|) (= Sum2_~i~1 0) (= Sum2_~instrs.offset |Sum2_#in~instrs.offset|)), 2954#(and (= Sum2_~instrs.base |Sum2_#in~instrs.base|) (<= Sum2_~i~1 1) (= Sum2_~instrs.offset |Sum2_#in~instrs.offset|)), 2955#(and (= Sum2_~instrs.base |Sum2_#in~instrs.base|) (<= Sum2_~i~1 2) (= Sum2_~instrs.offset |Sum2_#in~instrs.offset|)), 2956#(and (<= Sum2_~i~1 2) (= |Sum2_#t~mem7| (select (select |#memory_int| |Sum2_#in~instrs.base|) |Sum2_#in~instrs.offset|))), 2957#(<= (select (select |#memory_int| |Sum2_#in~instrs.base|) |Sum2_#in~instrs.offset|) 2)] [2018-02-02 09:55:10,479 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 17 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2018-02-02 09:55:10,479 INFO L409 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-02-02 09:55:10,479 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-02-02 09:55:10,479 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=86, Unknown=0, NotChecked=0, Total=110 [2018-02-02 09:55:10,479 INFO L87 Difference]: Start difference. First operand 77 states and 81 transitions. Second operand 11 states. [2018-02-02 09:55:10,584 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:55:10,584 INFO L93 Difference]: Finished difference Result 89 states and 93 transitions. [2018-02-02 09:55:10,584 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-02-02 09:55:10,584 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 72 [2018-02-02 09:55:10,584 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:55:10,585 INFO L225 Difference]: With dead ends: 89 [2018-02-02 09:55:10,585 INFO L226 Difference]: Without dead ends: 86 [2018-02-02 09:55:10,585 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 2 SyntacticMatches, 8 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 26 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=46, Invalid=164, Unknown=0, NotChecked=0, Total=210 [2018-02-02 09:55:10,585 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 86 states. [2018-02-02 09:55:10,586 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 86 to 83. [2018-02-02 09:55:10,586 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 83 states. [2018-02-02 09:55:10,587 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 83 states to 83 states and 87 transitions. [2018-02-02 09:55:10,587 INFO L78 Accepts]: Start accepts. Automaton has 83 states and 87 transitions. Word has length 72 [2018-02-02 09:55:10,587 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:55:10,587 INFO L432 AbstractCegarLoop]: Abstraction has 83 states and 87 transitions. [2018-02-02 09:55:10,587 INFO L433 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-02-02 09:55:10,588 INFO L276 IsEmpty]: Start isEmpty. Operand 83 states and 87 transitions. [2018-02-02 09:55:10,588 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 79 [2018-02-02 09:55:10,588 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:55:10,588 INFO L351 BasicCegarLoop]: trace histogram [4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:55:10,588 INFO L371 AbstractCegarLoop]: === Iteration 20 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-02 09:55:10,589 INFO L82 PathProgramCache]: Analyzing trace with hash -107081504, now seen corresponding path program 5 times [2018-02-02 09:55:10,589 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-02 09:55:10,596 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:55:10,597 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:55:10,625 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-02 09:55:10,625 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-02 09:55:10,625 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-02-02 09:55:10,625 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-02 09:55:10,625 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 09:55:10,625 INFO L182 omatonBuilderFactory]: Interpolants [3138#true, 3139#false, 3140#(= |#Ultimate.C_memset_#t~loopctr21| 0), 3141#(not (= |#Ultimate.C_memset_#amount| 94))] [2018-02-02 09:55:10,626 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-02 09:55:10,626 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-02-02 09:55:10,626 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-02-02 09:55:10,626 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-02-02 09:55:10,626 INFO L87 Difference]: Start difference. First operand 83 states and 87 transitions. Second operand 4 states. [2018-02-02 09:55:10,635 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:55:10,635 INFO L93 Difference]: Finished difference Result 86 states and 90 transitions. [2018-02-02 09:55:10,635 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-02-02 09:55:10,635 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 78 [2018-02-02 09:55:10,635 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:55:10,636 INFO L225 Difference]: With dead ends: 86 [2018-02-02 09:55:10,636 INFO L226 Difference]: Without dead ends: 84 [2018-02-02 09:55:10,636 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-02-02 09:55:10,636 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 84 states. [2018-02-02 09:55:10,637 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 84 to 84. [2018-02-02 09:55:10,637 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 84 states. [2018-02-02 09:55:10,638 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 84 states to 84 states and 88 transitions. [2018-02-02 09:55:10,638 INFO L78 Accepts]: Start accepts. Automaton has 84 states and 88 transitions. Word has length 78 [2018-02-02 09:55:10,638 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:55:10,638 INFO L432 AbstractCegarLoop]: Abstraction has 84 states and 88 transitions. [2018-02-02 09:55:10,638 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-02-02 09:55:10,638 INFO L276 IsEmpty]: Start isEmpty. Operand 84 states and 88 transitions. [2018-02-02 09:55:10,639 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2018-02-02 09:55:10,639 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:55:10,639 INFO L351 BasicCegarLoop]: trace histogram [4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:55:10,639 INFO L371 AbstractCegarLoop]: === Iteration 21 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-02 09:55:10,639 INFO L82 PathProgramCache]: Analyzing trace with hash -1786823949, now seen corresponding path program 1 times [2018-02-02 09:55:10,639 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-02 09:55:10,647 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:55:10,647 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:55:10,667 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-02 09:55:10,667 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-02 09:55:10,668 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5] total 5 [2018-02-02 09:55:10,668 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-02 09:55:10,668 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 09:55:10,668 INFO L182 omatonBuilderFactory]: Interpolants [3314#true, 3315#false, 3316#(= |#Ultimate.C_memset_#t~loopctr21| 0), 3317#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 1)), 3318#(not (= |#Ultimate.C_memset_#amount| 94))] [2018-02-02 09:55:10,668 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-02 09:55:10,668 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-02-02 09:55:10,669 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-02-02 09:55:10,669 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-02-02 09:55:10,669 INFO L87 Difference]: Start difference. First operand 84 states and 88 transitions. Second operand 5 states. [2018-02-02 09:55:10,676 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:55:10,677 INFO L93 Difference]: Finished difference Result 87 states and 91 transitions. [2018-02-02 09:55:10,677 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-02-02 09:55:10,677 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 79 [2018-02-02 09:55:10,677 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:55:10,678 INFO L225 Difference]: With dead ends: 87 [2018-02-02 09:55:10,678 INFO L226 Difference]: Without dead ends: 85 [2018-02-02 09:55:10,678 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-02-02 09:55:10,678 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 85 states. [2018-02-02 09:55:10,679 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 85 to 85. [2018-02-02 09:55:10,679 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 85 states. [2018-02-02 09:55:10,680 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 85 states to 85 states and 89 transitions. [2018-02-02 09:55:10,680 INFO L78 Accepts]: Start accepts. Automaton has 85 states and 89 transitions. Word has length 79 [2018-02-02 09:55:10,680 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:55:10,680 INFO L432 AbstractCegarLoop]: Abstraction has 85 states and 89 transitions. [2018-02-02 09:55:10,680 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-02-02 09:55:10,680 INFO L276 IsEmpty]: Start isEmpty. Operand 85 states and 89 transitions. [2018-02-02 09:55:10,681 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2018-02-02 09:55:10,681 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:55:10,681 INFO L351 BasicCegarLoop]: trace histogram [4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:55:10,681 INFO L371 AbstractCegarLoop]: === Iteration 22 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-02 09:55:10,681 INFO L82 PathProgramCache]: Analyzing trace with hash 1975735104, now seen corresponding path program 2 times [2018-02-02 09:55:10,681 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-02 09:55:10,688 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:55:10,689 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:55:10,736 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-02 09:55:10,736 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-02 09:55:10,737 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6] total 6 [2018-02-02 09:55:10,737 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-02 09:55:10,737 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 09:55:10,737 INFO L182 omatonBuilderFactory]: Interpolants [3491#true, 3492#false, 3493#(= |#Ultimate.C_memset_#t~loopctr21| 0), 3494#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 1)), 3495#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 2)), 3496#(not (= |#Ultimate.C_memset_#amount| 94))] [2018-02-02 09:55:10,737 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-02 09:55:10,738 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-02-02 09:55:10,738 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-02-02 09:55:10,738 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=16, Unknown=0, NotChecked=0, Total=30 [2018-02-02 09:55:10,738 INFO L87 Difference]: Start difference. First operand 85 states and 89 transitions. Second operand 6 states. [2018-02-02 09:55:10,749 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:55:10,749 INFO L93 Difference]: Finished difference Result 88 states and 92 transitions. [2018-02-02 09:55:10,749 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-02-02 09:55:10,749 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 80 [2018-02-02 09:55:10,749 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:55:10,750 INFO L225 Difference]: With dead ends: 88 [2018-02-02 09:55:10,750 INFO L226 Difference]: Without dead ends: 86 [2018-02-02 09:55:10,750 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=14, Invalid=16, Unknown=0, NotChecked=0, Total=30 [2018-02-02 09:55:10,750 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 86 states. [2018-02-02 09:55:10,752 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 86 to 86. [2018-02-02 09:55:10,752 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 86 states. [2018-02-02 09:55:10,753 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 86 states to 86 states and 90 transitions. [2018-02-02 09:55:10,753 INFO L78 Accepts]: Start accepts. Automaton has 86 states and 90 transitions. Word has length 80 [2018-02-02 09:55:10,753 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:55:10,753 INFO L432 AbstractCegarLoop]: Abstraction has 86 states and 90 transitions. [2018-02-02 09:55:10,753 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-02-02 09:55:10,753 INFO L276 IsEmpty]: Start isEmpty. Operand 86 states and 90 transitions. [2018-02-02 09:55:10,754 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 82 [2018-02-02 09:55:10,754 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:55:10,754 INFO L351 BasicCegarLoop]: trace histogram [4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:55:10,754 INFO L371 AbstractCegarLoop]: === Iteration 23 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-02 09:55:10,754 INFO L82 PathProgramCache]: Analyzing trace with hash -1644018541, now seen corresponding path program 3 times [2018-02-02 09:55:10,755 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-02 09:55:10,765 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:55:10,765 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:55:10,795 INFO L134 CoverageAnalysis]: Checked inductivity of 60 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-02 09:55:10,795 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-02 09:55:10,796 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7] total 7 [2018-02-02 09:55:10,796 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-02 09:55:10,796 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 09:55:10,796 INFO L182 omatonBuilderFactory]: Interpolants [3671#true, 3672#false, 3673#(= |#Ultimate.C_memset_#t~loopctr21| 0), 3674#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 1)), 3675#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 2)), 3676#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 3)), 3677#(not (= |#Ultimate.C_memset_#amount| 94))] [2018-02-02 09:55:10,796 INFO L134 CoverageAnalysis]: Checked inductivity of 60 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-02 09:55:10,796 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-02-02 09:55:10,796 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-02-02 09:55:10,796 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=22, Unknown=0, NotChecked=0, Total=42 [2018-02-02 09:55:10,796 INFO L87 Difference]: Start difference. First operand 86 states and 90 transitions. Second operand 7 states. [2018-02-02 09:55:10,806 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:55:10,806 INFO L93 Difference]: Finished difference Result 89 states and 93 transitions. [2018-02-02 09:55:10,806 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-02-02 09:55:10,806 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 81 [2018-02-02 09:55:10,806 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:55:10,806 INFO L225 Difference]: With dead ends: 89 [2018-02-02 09:55:10,806 INFO L226 Difference]: Without dead ends: 87 [2018-02-02 09:55:10,807 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=20, Invalid=22, Unknown=0, NotChecked=0, Total=42 [2018-02-02 09:55:10,807 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 87 states. [2018-02-02 09:55:10,807 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 87 to 87. [2018-02-02 09:55:10,808 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 87 states. [2018-02-02 09:55:10,808 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 87 states to 87 states and 91 transitions. [2018-02-02 09:55:10,808 INFO L78 Accepts]: Start accepts. Automaton has 87 states and 91 transitions. Word has length 81 [2018-02-02 09:55:10,808 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:55:10,808 INFO L432 AbstractCegarLoop]: Abstraction has 87 states and 91 transitions. [2018-02-02 09:55:10,808 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-02-02 09:55:10,808 INFO L276 IsEmpty]: Start isEmpty. Operand 87 states and 91 transitions. [2018-02-02 09:55:10,808 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2018-02-02 09:55:10,809 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:55:10,809 INFO L351 BasicCegarLoop]: trace histogram [4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:55:10,809 INFO L371 AbstractCegarLoop]: === Iteration 24 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-02 09:55:10,809 INFO L82 PathProgramCache]: Analyzing trace with hash 2107735456, now seen corresponding path program 4 times [2018-02-02 09:55:10,809 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-02 09:55:10,817 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:55:10,818 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:55:10,854 INFO L134 CoverageAnalysis]: Checked inductivity of 64 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-02 09:55:10,854 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-02 09:55:10,854 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8] total 8 [2018-02-02 09:55:10,854 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-02 09:55:10,855 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 09:55:10,855 INFO L182 omatonBuilderFactory]: Interpolants [3856#(= |#Ultimate.C_memset_#t~loopctr21| 0), 3857#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 1)), 3858#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 2)), 3859#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 3)), 3860#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 4)), 3861#(not (= |#Ultimate.C_memset_#amount| 94)), 3854#true, 3855#false] [2018-02-02 09:55:10,855 INFO L134 CoverageAnalysis]: Checked inductivity of 64 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-02 09:55:10,855 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-02-02 09:55:10,855 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-02-02 09:55:10,855 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=29, Unknown=0, NotChecked=0, Total=56 [2018-02-02 09:55:10,855 INFO L87 Difference]: Start difference. First operand 87 states and 91 transitions. Second operand 8 states. [2018-02-02 09:55:10,867 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:55:10,867 INFO L93 Difference]: Finished difference Result 90 states and 94 transitions. [2018-02-02 09:55:10,867 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-02-02 09:55:10,867 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 82 [2018-02-02 09:55:10,867 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:55:10,868 INFO L225 Difference]: With dead ends: 90 [2018-02-02 09:55:10,868 INFO L226 Difference]: Without dead ends: 88 [2018-02-02 09:55:10,868 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=29, Unknown=0, NotChecked=0, Total=56 [2018-02-02 09:55:10,868 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 88 states. [2018-02-02 09:55:10,869 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 88 to 88. [2018-02-02 09:55:10,869 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 88 states. [2018-02-02 09:55:10,869 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 88 states to 88 states and 92 transitions. [2018-02-02 09:55:10,869 INFO L78 Accepts]: Start accepts. Automaton has 88 states and 92 transitions. Word has length 82 [2018-02-02 09:55:10,870 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:55:10,870 INFO L432 AbstractCegarLoop]: Abstraction has 88 states and 92 transitions. [2018-02-02 09:55:10,870 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-02-02 09:55:10,870 INFO L276 IsEmpty]: Start isEmpty. Operand 88 states and 92 transitions. [2018-02-02 09:55:10,870 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 84 [2018-02-02 09:55:10,870 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:55:10,870 INFO L351 BasicCegarLoop]: trace histogram [5, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:55:10,870 INFO L371 AbstractCegarLoop]: === Iteration 25 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-02 09:55:10,871 INFO L82 PathProgramCache]: Analyzing trace with hash -1846974925, now seen corresponding path program 5 times [2018-02-02 09:55:10,871 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-02 09:55:10,878 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:55:10,878 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:55:10,924 INFO L134 CoverageAnalysis]: Checked inductivity of 69 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-02 09:55:10,924 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-02 09:55:10,924 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9] total 9 [2018-02-02 09:55:10,924 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-02 09:55:10,925 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 09:55:10,925 INFO L182 omatonBuilderFactory]: Interpolants [4048#(not (= |#Ultimate.C_memset_#amount| 94)), 4040#true, 4041#false, 4042#(= |#Ultimate.C_memset_#t~loopctr21| 0), 4043#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 1)), 4044#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 2)), 4045#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 3)), 4046#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 4)), 4047#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 5))] [2018-02-02 09:55:10,925 INFO L134 CoverageAnalysis]: Checked inductivity of 69 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-02 09:55:10,925 INFO L409 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-02-02 09:55:10,925 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-02-02 09:55:10,925 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=37, Unknown=0, NotChecked=0, Total=72 [2018-02-02 09:55:10,925 INFO L87 Difference]: Start difference. First operand 88 states and 92 transitions. Second operand 9 states. [2018-02-02 09:55:10,941 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:55:10,941 INFO L93 Difference]: Finished difference Result 91 states and 95 transitions. [2018-02-02 09:55:10,941 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-02-02 09:55:10,941 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 83 [2018-02-02 09:55:10,941 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:55:10,941 INFO L225 Difference]: With dead ends: 91 [2018-02-02 09:55:10,941 INFO L226 Difference]: Without dead ends: 89 [2018-02-02 09:55:10,942 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=35, Invalid=37, Unknown=0, NotChecked=0, Total=72 [2018-02-02 09:55:10,942 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 89 states. [2018-02-02 09:55:10,962 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 89 to 89. [2018-02-02 09:55:10,963 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 89 states. [2018-02-02 09:55:10,963 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 89 states to 89 states and 93 transitions. [2018-02-02 09:55:10,963 INFO L78 Accepts]: Start accepts. Automaton has 89 states and 93 transitions. Word has length 83 [2018-02-02 09:55:10,963 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:55:10,964 INFO L432 AbstractCegarLoop]: Abstraction has 89 states and 93 transitions. [2018-02-02 09:55:10,964 INFO L433 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-02-02 09:55:10,964 INFO L276 IsEmpty]: Start isEmpty. Operand 89 states and 93 transitions. [2018-02-02 09:55:10,964 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 85 [2018-02-02 09:55:10,964 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:55:10,964 INFO L351 BasicCegarLoop]: trace histogram [6, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:55:10,965 INFO L371 AbstractCegarLoop]: === Iteration 26 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-02 09:55:10,965 INFO L82 PathProgramCache]: Analyzing trace with hash 111054848, now seen corresponding path program 6 times [2018-02-02 09:55:10,965 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-02 09:55:10,973 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:55:10,974 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:55:11,045 INFO L134 CoverageAnalysis]: Checked inductivity of 75 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-02 09:55:11,046 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-02 09:55:11,046 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10] total 10 [2018-02-02 09:55:11,046 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-02 09:55:11,046 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 09:55:11,046 INFO L182 omatonBuilderFactory]: Interpolants [4229#true, 4230#false, 4231#(= |#Ultimate.C_memset_#t~loopctr21| 0), 4232#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 1)), 4233#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 2)), 4234#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 3)), 4235#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 4)), 4236#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 5)), 4237#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 6)), 4238#(not (= |#Ultimate.C_memset_#amount| 94))] [2018-02-02 09:55:11,047 INFO L134 CoverageAnalysis]: Checked inductivity of 75 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-02 09:55:11,047 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-02-02 09:55:11,047 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-02-02 09:55:11,047 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=44, Invalid=46, Unknown=0, NotChecked=0, Total=90 [2018-02-02 09:55:11,047 INFO L87 Difference]: Start difference. First operand 89 states and 93 transitions. Second operand 10 states. [2018-02-02 09:55:11,059 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:55:11,059 INFO L93 Difference]: Finished difference Result 92 states and 96 transitions. [2018-02-02 09:55:11,059 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-02-02 09:55:11,059 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 84 [2018-02-02 09:55:11,059 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:55:11,059 INFO L225 Difference]: With dead ends: 92 [2018-02-02 09:55:11,059 INFO L226 Difference]: Without dead ends: 90 [2018-02-02 09:55:11,060 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=44, Invalid=46, Unknown=0, NotChecked=0, Total=90 [2018-02-02 09:55:11,060 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 90 states. [2018-02-02 09:55:11,061 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 90 to 90. [2018-02-02 09:55:11,061 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 90 states. [2018-02-02 09:55:11,061 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 90 states to 90 states and 94 transitions. [2018-02-02 09:55:11,061 INFO L78 Accepts]: Start accepts. Automaton has 90 states and 94 transitions. Word has length 84 [2018-02-02 09:55:11,061 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:55:11,061 INFO L432 AbstractCegarLoop]: Abstraction has 90 states and 94 transitions. [2018-02-02 09:55:11,061 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-02-02 09:55:11,061 INFO L276 IsEmpty]: Start isEmpty. Operand 90 states and 94 transitions. [2018-02-02 09:55:11,062 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 86 [2018-02-02 09:55:11,062 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:55:11,062 INFO L351 BasicCegarLoop]: trace histogram [7, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:55:11,062 INFO L371 AbstractCegarLoop]: === Iteration 27 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-02 09:55:11,062 INFO L82 PathProgramCache]: Analyzing trace with hash 680435667, now seen corresponding path program 7 times [2018-02-02 09:55:11,062 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-02 09:55:11,069 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:55:11,070 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:55:11,151 INFO L134 CoverageAnalysis]: Checked inductivity of 82 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-02 09:55:11,151 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-02 09:55:11,151 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11] total 11 [2018-02-02 09:55:11,151 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-02 09:55:11,151 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 09:55:11,152 INFO L182 omatonBuilderFactory]: Interpolants [4421#true, 4422#false, 4423#(= |#Ultimate.C_memset_#t~loopctr21| 0), 4424#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 1)), 4425#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 2)), 4426#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 3)), 4427#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 4)), 4428#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 5)), 4429#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 6)), 4430#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 7)), 4431#(not (= |#Ultimate.C_memset_#amount| 94))] [2018-02-02 09:55:11,152 INFO L134 CoverageAnalysis]: Checked inductivity of 82 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-02 09:55:11,152 INFO L409 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-02-02 09:55:11,152 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-02-02 09:55:11,152 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=54, Invalid=56, Unknown=0, NotChecked=0, Total=110 [2018-02-02 09:55:11,152 INFO L87 Difference]: Start difference. First operand 90 states and 94 transitions. Second operand 11 states. [2018-02-02 09:55:11,173 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:55:11,173 INFO L93 Difference]: Finished difference Result 93 states and 97 transitions. [2018-02-02 09:55:11,173 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-02-02 09:55:11,173 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 85 [2018-02-02 09:55:11,173 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:55:11,174 INFO L225 Difference]: With dead ends: 93 [2018-02-02 09:55:11,174 INFO L226 Difference]: Without dead ends: 91 [2018-02-02 09:55:11,174 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=54, Invalid=56, Unknown=0, NotChecked=0, Total=110 [2018-02-02 09:55:11,174 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 91 states. [2018-02-02 09:55:11,176 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 91 to 91. [2018-02-02 09:55:11,176 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 91 states. [2018-02-02 09:55:11,176 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 91 states to 91 states and 95 transitions. [2018-02-02 09:55:11,176 INFO L78 Accepts]: Start accepts. Automaton has 91 states and 95 transitions. Word has length 85 [2018-02-02 09:55:11,177 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:55:11,177 INFO L432 AbstractCegarLoop]: Abstraction has 91 states and 95 transitions. [2018-02-02 09:55:11,177 INFO L433 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-02-02 09:55:11,177 INFO L276 IsEmpty]: Start isEmpty. Operand 91 states and 95 transitions. [2018-02-02 09:55:11,177 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 87 [2018-02-02 09:55:11,177 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:55:11,177 INFO L351 BasicCegarLoop]: trace histogram [8, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:55:11,177 INFO L371 AbstractCegarLoop]: === Iteration 28 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-02 09:55:11,178 INFO L82 PathProgramCache]: Analyzing trace with hash 1151371872, now seen corresponding path program 8 times [2018-02-02 09:55:11,178 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-02 09:55:11,192 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:55:11,193 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:55:11,282 INFO L134 CoverageAnalysis]: Checked inductivity of 90 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-02 09:55:11,282 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-02 09:55:11,282 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12] total 12 [2018-02-02 09:55:11,283 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-02 09:55:11,283 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 09:55:11,283 INFO L182 omatonBuilderFactory]: Interpolants [4624#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 6)), 4625#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 7)), 4626#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 8)), 4627#(not (= |#Ultimate.C_memset_#amount| 94)), 4616#true, 4617#false, 4618#(= |#Ultimate.C_memset_#t~loopctr21| 0), 4619#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 1)), 4620#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 2)), 4621#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 3)), 4622#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 4)), 4623#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 5))] [2018-02-02 09:55:11,283 INFO L134 CoverageAnalysis]: Checked inductivity of 90 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-02 09:55:11,283 INFO L409 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-02-02 09:55:11,284 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-02-02 09:55:11,284 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=65, Invalid=67, Unknown=0, NotChecked=0, Total=132 [2018-02-02 09:55:11,284 INFO L87 Difference]: Start difference. First operand 91 states and 95 transitions. Second operand 12 states. [2018-02-02 09:55:11,299 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:55:11,299 INFO L93 Difference]: Finished difference Result 94 states and 98 transitions. [2018-02-02 09:55:11,300 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-02-02 09:55:11,300 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 86 [2018-02-02 09:55:11,300 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:55:11,301 INFO L225 Difference]: With dead ends: 94 [2018-02-02 09:55:11,301 INFO L226 Difference]: Without dead ends: 92 [2018-02-02 09:55:11,301 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=65, Invalid=67, Unknown=0, NotChecked=0, Total=132 [2018-02-02 09:55:11,301 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 92 states. [2018-02-02 09:55:11,303 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 92 to 92. [2018-02-02 09:55:11,303 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 92 states. [2018-02-02 09:55:11,303 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 92 states to 92 states and 96 transitions. [2018-02-02 09:55:11,303 INFO L78 Accepts]: Start accepts. Automaton has 92 states and 96 transitions. Word has length 86 [2018-02-02 09:55:11,304 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:55:11,304 INFO L432 AbstractCegarLoop]: Abstraction has 92 states and 96 transitions. [2018-02-02 09:55:11,304 INFO L433 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-02-02 09:55:11,304 INFO L276 IsEmpty]: Start isEmpty. Operand 92 states and 96 transitions. [2018-02-02 09:55:11,304 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 88 [2018-02-02 09:55:11,304 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:55:11,305 INFO L351 BasicCegarLoop]: trace histogram [9, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:55:11,305 INFO L371 AbstractCegarLoop]: === Iteration 29 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-02 09:55:11,305 INFO L82 PathProgramCache]: Analyzing trace with hash -1429474957, now seen corresponding path program 9 times [2018-02-02 09:55:11,305 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-02 09:55:11,316 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:55:11,317 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:55:11,428 INFO L134 CoverageAnalysis]: Checked inductivity of 99 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-02 09:55:11,429 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-02 09:55:11,429 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13] total 13 [2018-02-02 09:55:11,429 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-02 09:55:11,429 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 09:55:11,429 INFO L182 omatonBuilderFactory]: Interpolants [4814#true, 4815#false, 4816#(= |#Ultimate.C_memset_#t~loopctr21| 0), 4817#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 1)), 4818#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 2)), 4819#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 3)), 4820#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 4)), 4821#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 5)), 4822#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 6)), 4823#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 7)), 4824#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 8)), 4825#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 9)), 4826#(not (= |#Ultimate.C_memset_#amount| 94))] [2018-02-02 09:55:11,429 INFO L134 CoverageAnalysis]: Checked inductivity of 99 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-02 09:55:11,429 INFO L409 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-02-02 09:55:11,430 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-02-02 09:55:11,430 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=77, Invalid=79, Unknown=0, NotChecked=0, Total=156 [2018-02-02 09:55:11,430 INFO L87 Difference]: Start difference. First operand 92 states and 96 transitions. Second operand 13 states. [2018-02-02 09:55:11,460 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:55:11,460 INFO L93 Difference]: Finished difference Result 95 states and 99 transitions. [2018-02-02 09:55:11,461 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-02-02 09:55:11,461 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 87 [2018-02-02 09:55:11,461 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:55:11,461 INFO L225 Difference]: With dead ends: 95 [2018-02-02 09:55:11,461 INFO L226 Difference]: Without dead ends: 93 [2018-02-02 09:55:11,461 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=77, Invalid=79, Unknown=0, NotChecked=0, Total=156 [2018-02-02 09:55:11,462 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 93 states. [2018-02-02 09:55:11,463 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 93 to 93. [2018-02-02 09:55:11,463 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 93 states. [2018-02-02 09:55:11,463 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 93 states to 93 states and 97 transitions. [2018-02-02 09:55:11,464 INFO L78 Accepts]: Start accepts. Automaton has 93 states and 97 transitions. Word has length 87 [2018-02-02 09:55:11,464 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:55:11,464 INFO L432 AbstractCegarLoop]: Abstraction has 93 states and 97 transitions. [2018-02-02 09:55:11,464 INFO L433 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-02-02 09:55:11,464 INFO L276 IsEmpty]: Start isEmpty. Operand 93 states and 97 transitions. [2018-02-02 09:55:11,464 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 89 [2018-02-02 09:55:11,464 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:55:11,465 INFO L351 BasicCegarLoop]: trace histogram [10, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:55:11,465 INFO L371 AbstractCegarLoop]: === Iteration 30 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-02 09:55:11,465 INFO L82 PathProgramCache]: Analyzing trace with hash 168651968, now seen corresponding path program 10 times [2018-02-02 09:55:11,465 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-02 09:55:11,476 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:55:11,477 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:55:11,600 INFO L134 CoverageAnalysis]: Checked inductivity of 109 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-02 09:55:11,600 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-02 09:55:11,600 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14] total 14 [2018-02-02 09:55:11,600 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-02 09:55:11,601 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 09:55:11,601 INFO L182 omatonBuilderFactory]: Interpolants [5024#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 7)), 5025#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 8)), 5026#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 9)), 5027#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 10)), 5028#(not (= |#Ultimate.C_memset_#amount| 94)), 5015#true, 5016#false, 5017#(= |#Ultimate.C_memset_#t~loopctr21| 0), 5018#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 1)), 5019#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 2)), 5020#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 3)), 5021#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 4)), 5022#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 5)), 5023#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 6))] [2018-02-02 09:55:11,601 INFO L134 CoverageAnalysis]: Checked inductivity of 109 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-02 09:55:11,601 INFO L409 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-02-02 09:55:11,601 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-02-02 09:55:11,601 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=90, Invalid=92, Unknown=0, NotChecked=0, Total=182 [2018-02-02 09:55:11,602 INFO L87 Difference]: Start difference. First operand 93 states and 97 transitions. Second operand 14 states. [2018-02-02 09:55:11,616 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:55:11,617 INFO L93 Difference]: Finished difference Result 96 states and 100 transitions. [2018-02-02 09:55:11,619 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-02-02 09:55:11,619 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 88 [2018-02-02 09:55:11,619 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:55:11,620 INFO L225 Difference]: With dead ends: 96 [2018-02-02 09:55:11,620 INFO L226 Difference]: Without dead ends: 94 [2018-02-02 09:55:11,620 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 19 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=90, Invalid=92, Unknown=0, NotChecked=0, Total=182 [2018-02-02 09:55:11,620 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 94 states. [2018-02-02 09:55:11,622 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 94 to 94. [2018-02-02 09:55:11,622 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 94 states. [2018-02-02 09:55:11,622 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 94 states to 94 states and 98 transitions. [2018-02-02 09:55:11,623 INFO L78 Accepts]: Start accepts. Automaton has 94 states and 98 transitions. Word has length 88 [2018-02-02 09:55:11,623 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:55:11,623 INFO L432 AbstractCegarLoop]: Abstraction has 94 states and 98 transitions. [2018-02-02 09:55:11,623 INFO L433 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-02-02 09:55:11,623 INFO L276 IsEmpty]: Start isEmpty. Operand 94 states and 98 transitions. [2018-02-02 09:55:11,623 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 90 [2018-02-02 09:55:11,624 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:55:11,624 INFO L351 BasicCegarLoop]: trace histogram [11, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:55:11,624 INFO L371 AbstractCegarLoop]: === Iteration 31 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-02 09:55:11,624 INFO L82 PathProgramCache]: Analyzing trace with hash -1829020909, now seen corresponding path program 11 times [2018-02-02 09:55:11,625 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-02 09:55:11,637 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:55:11,638 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:55:11,807 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-02 09:55:11,808 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-02 09:55:11,808 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15] total 15 [2018-02-02 09:55:11,808 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-02 09:55:11,808 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 09:55:11,809 INFO L182 omatonBuilderFactory]: Interpolants [5219#true, 5220#false, 5221#(= |#Ultimate.C_memset_#t~loopctr21| 0), 5222#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 1)), 5223#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 2)), 5224#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 3)), 5225#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 4)), 5226#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 5)), 5227#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 6)), 5228#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 7)), 5229#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 8)), 5230#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 9)), 5231#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 10)), 5232#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 11)), 5233#(not (= |#Ultimate.C_memset_#amount| 94))] [2018-02-02 09:55:11,809 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-02 09:55:11,809 INFO L409 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-02-02 09:55:11,809 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-02-02 09:55:11,809 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=104, Invalid=106, Unknown=0, NotChecked=0, Total=210 [2018-02-02 09:55:11,810 INFO L87 Difference]: Start difference. First operand 94 states and 98 transitions. Second operand 15 states. [2018-02-02 09:55:11,852 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:55:11,852 INFO L93 Difference]: Finished difference Result 97 states and 101 transitions. [2018-02-02 09:55:11,852 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-02-02 09:55:11,853 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 89 [2018-02-02 09:55:11,853 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:55:11,853 INFO L225 Difference]: With dead ends: 97 [2018-02-02 09:55:11,853 INFO L226 Difference]: Without dead ends: 95 [2018-02-02 09:55:11,854 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 21 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=104, Invalid=106, Unknown=0, NotChecked=0, Total=210 [2018-02-02 09:55:11,854 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 95 states. [2018-02-02 09:55:11,856 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 95 to 95. [2018-02-02 09:55:11,856 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 95 states. [2018-02-02 09:55:11,856 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 95 states to 95 states and 99 transitions. [2018-02-02 09:55:11,856 INFO L78 Accepts]: Start accepts. Automaton has 95 states and 99 transitions. Word has length 89 [2018-02-02 09:55:11,857 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:55:11,857 INFO L432 AbstractCegarLoop]: Abstraction has 95 states and 99 transitions. [2018-02-02 09:55:11,857 INFO L433 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-02-02 09:55:11,857 INFO L276 IsEmpty]: Start isEmpty. Operand 95 states and 99 transitions. [2018-02-02 09:55:11,857 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 91 [2018-02-02 09:55:11,857 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:55:11,858 INFO L351 BasicCegarLoop]: trace histogram [12, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:55:11,858 INFO L371 AbstractCegarLoop]: === Iteration 32 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-02 09:55:11,858 INFO L82 PathProgramCache]: Analyzing trace with hash 667629344, now seen corresponding path program 12 times [2018-02-02 09:55:11,859 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-02 09:55:11,871 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:55:11,873 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:55:11,991 INFO L134 CoverageAnalysis]: Checked inductivity of 132 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-02 09:55:11,992 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-02 09:55:11,992 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16] total 16 [2018-02-02 09:55:11,992 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-02 09:55:11,992 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 09:55:11,992 INFO L182 omatonBuilderFactory]: Interpolants [5440#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 12)), 5441#(not (= |#Ultimate.C_memset_#amount| 94)), 5426#true, 5427#false, 5428#(= |#Ultimate.C_memset_#t~loopctr21| 0), 5429#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 1)), 5430#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 2)), 5431#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 3)), 5432#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 4)), 5433#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 5)), 5434#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 6)), 5435#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 7)), 5436#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 8)), 5437#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 9)), 5438#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 10)), 5439#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 11))] [2018-02-02 09:55:11,992 INFO L134 CoverageAnalysis]: Checked inductivity of 132 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-02 09:55:11,992 INFO L409 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-02-02 09:55:11,993 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-02-02 09:55:11,993 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=119, Invalid=121, Unknown=0, NotChecked=0, Total=240 [2018-02-02 09:55:11,993 INFO L87 Difference]: Start difference. First operand 95 states and 99 transitions. Second operand 16 states. [2018-02-02 09:55:12,004 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:55:12,004 INFO L93 Difference]: Finished difference Result 98 states and 102 transitions. [2018-02-02 09:55:12,007 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-02-02 09:55:12,007 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 90 [2018-02-02 09:55:12,007 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:55:12,007 INFO L225 Difference]: With dead ends: 98 [2018-02-02 09:55:12,007 INFO L226 Difference]: Without dead ends: 96 [2018-02-02 09:55:12,008 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 23 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=119, Invalid=121, Unknown=0, NotChecked=0, Total=240 [2018-02-02 09:55:12,008 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 96 states. [2018-02-02 09:55:12,009 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 96 to 96. [2018-02-02 09:55:12,009 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 96 states. [2018-02-02 09:55:12,010 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 96 states to 96 states and 100 transitions. [2018-02-02 09:55:12,010 INFO L78 Accepts]: Start accepts. Automaton has 96 states and 100 transitions. Word has length 90 [2018-02-02 09:55:12,010 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:55:12,010 INFO L432 AbstractCegarLoop]: Abstraction has 96 states and 100 transitions. [2018-02-02 09:55:12,010 INFO L433 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-02-02 09:55:12,011 INFO L276 IsEmpty]: Start isEmpty. Operand 96 states and 100 transitions. [2018-02-02 09:55:12,011 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 92 [2018-02-02 09:55:12,011 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:55:12,011 INFO L351 BasicCegarLoop]: trace histogram [13, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:55:12,011 INFO L371 AbstractCegarLoop]: === Iteration 33 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-02 09:55:12,012 INFO L82 PathProgramCache]: Analyzing trace with hash 754375859, now seen corresponding path program 13 times [2018-02-02 09:55:12,012 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-02 09:55:12,020 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:55:12,021 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:55:12,137 INFO L134 CoverageAnalysis]: Checked inductivity of 145 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-02 09:55:12,137 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-02 09:55:12,137 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17] total 17 [2018-02-02 09:55:12,137 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-02 09:55:12,138 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 09:55:12,138 INFO L182 omatonBuilderFactory]: Interpolants [5636#true, 5637#false, 5638#(= |#Ultimate.C_memset_#t~loopctr21| 0), 5639#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 1)), 5640#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 2)), 5641#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 3)), 5642#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 4)), 5643#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 5)), 5644#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 6)), 5645#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 7)), 5646#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 8)), 5647#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 9)), 5648#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 10)), 5649#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 11)), 5650#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 12)), 5651#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 13)), 5652#(not (= |#Ultimate.C_memset_#amount| 94))] [2018-02-02 09:55:12,138 INFO L134 CoverageAnalysis]: Checked inductivity of 145 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-02 09:55:12,138 INFO L409 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-02-02 09:55:12,139 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-02-02 09:55:12,139 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=135, Invalid=137, Unknown=0, NotChecked=0, Total=272 [2018-02-02 09:55:12,139 INFO L87 Difference]: Start difference. First operand 96 states and 100 transitions. Second operand 17 states. [2018-02-02 09:55:12,163 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:55:12,163 INFO L93 Difference]: Finished difference Result 99 states and 103 transitions. [2018-02-02 09:55:12,163 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-02-02 09:55:12,164 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 91 [2018-02-02 09:55:12,164 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:55:12,164 INFO L225 Difference]: With dead ends: 99 [2018-02-02 09:55:12,164 INFO L226 Difference]: Without dead ends: 97 [2018-02-02 09:55:12,164 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 25 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=135, Invalid=137, Unknown=0, NotChecked=0, Total=272 [2018-02-02 09:55:12,165 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 97 states. [2018-02-02 09:55:12,166 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 97 to 97. [2018-02-02 09:55:12,166 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 97 states. [2018-02-02 09:55:12,166 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 97 states to 97 states and 101 transitions. [2018-02-02 09:55:12,166 INFO L78 Accepts]: Start accepts. Automaton has 97 states and 101 transitions. Word has length 91 [2018-02-02 09:55:12,166 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:55:12,167 INFO L432 AbstractCegarLoop]: Abstraction has 97 states and 101 transitions. [2018-02-02 09:55:12,167 INFO L433 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-02-02 09:55:12,167 INFO L276 IsEmpty]: Start isEmpty. Operand 97 states and 101 transitions. [2018-02-02 09:55:12,167 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2018-02-02 09:55:12,167 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:55:12,167 INFO L351 BasicCegarLoop]: trace histogram [14, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:55:12,167 INFO L371 AbstractCegarLoop]: === Iteration 34 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-02 09:55:12,167 INFO L82 PathProgramCache]: Analyzing trace with hash -851449472, now seen corresponding path program 14 times [2018-02-02 09:55:12,168 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-02 09:55:12,175 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:55:12,176 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:55:12,303 INFO L134 CoverageAnalysis]: Checked inductivity of 159 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-02 09:55:12,303 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-02 09:55:12,303 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18] total 18 [2018-02-02 09:55:12,303 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-02 09:55:12,303 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 09:55:12,304 INFO L182 omatonBuilderFactory]: Interpolants [5856#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 5)), 5857#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 6)), 5858#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 7)), 5859#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 8)), 5860#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 9)), 5861#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 10)), 5862#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 11)), 5863#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 12)), 5864#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 13)), 5865#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 14)), 5866#(not (= |#Ultimate.C_memset_#amount| 94)), 5849#true, 5850#false, 5851#(= |#Ultimate.C_memset_#t~loopctr21| 0), 5852#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 1)), 5853#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 2)), 5854#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 3)), 5855#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 4))] [2018-02-02 09:55:12,304 INFO L134 CoverageAnalysis]: Checked inductivity of 159 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-02 09:55:12,304 INFO L409 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-02-02 09:55:12,304 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-02-02 09:55:12,305 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=152, Invalid=154, Unknown=0, NotChecked=0, Total=306 [2018-02-02 09:55:12,305 INFO L87 Difference]: Start difference. First operand 97 states and 101 transitions. Second operand 18 states. [2018-02-02 09:55:12,329 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:55:12,329 INFO L93 Difference]: Finished difference Result 100 states and 104 transitions. [2018-02-02 09:55:12,330 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-02-02 09:55:12,330 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 92 [2018-02-02 09:55:12,330 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:55:12,330 INFO L225 Difference]: With dead ends: 100 [2018-02-02 09:55:12,330 INFO L226 Difference]: Without dead ends: 98 [2018-02-02 09:55:12,330 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 27 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=152, Invalid=154, Unknown=0, NotChecked=0, Total=306 [2018-02-02 09:55:12,331 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 98 states. [2018-02-02 09:55:12,332 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 98 to 98. [2018-02-02 09:55:12,332 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 98 states. [2018-02-02 09:55:12,333 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 98 states to 98 states and 102 transitions. [2018-02-02 09:55:12,333 INFO L78 Accepts]: Start accepts. Automaton has 98 states and 102 transitions. Word has length 92 [2018-02-02 09:55:12,333 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:55:12,333 INFO L432 AbstractCegarLoop]: Abstraction has 98 states and 102 transitions. [2018-02-02 09:55:12,333 INFO L433 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-02-02 09:55:12,333 INFO L276 IsEmpty]: Start isEmpty. Operand 98 states and 102 transitions. [2018-02-02 09:55:12,334 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2018-02-02 09:55:12,334 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:55:12,334 INFO L351 BasicCegarLoop]: trace histogram [15, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:55:12,334 INFO L371 AbstractCegarLoop]: === Iteration 35 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-02 09:55:12,334 INFO L82 PathProgramCache]: Analyzing trace with hash 907572819, now seen corresponding path program 15 times [2018-02-02 09:55:12,335 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-02 09:55:12,347 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:55:12,348 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:55:12,572 INFO L134 CoverageAnalysis]: Checked inductivity of 174 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-02 09:55:12,572 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-02 09:55:12,572 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19] total 19 [2018-02-02 09:55:12,572 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-02 09:55:12,573 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 09:55:12,573 INFO L182 omatonBuilderFactory]: Interpolants [6080#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 13)), 6081#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 14)), 6082#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 15)), 6083#(not (= |#Ultimate.C_memset_#amount| 94)), 6065#true, 6066#false, 6067#(= |#Ultimate.C_memset_#t~loopctr21| 0), 6068#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 1)), 6069#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 2)), 6070#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 3)), 6071#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 4)), 6072#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 5)), 6073#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 6)), 6074#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 7)), 6075#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 8)), 6076#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 9)), 6077#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 10)), 6078#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 11)), 6079#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 12))] [2018-02-02 09:55:12,573 INFO L134 CoverageAnalysis]: Checked inductivity of 174 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-02 09:55:12,573 INFO L409 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-02-02 09:55:12,573 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-02-02 09:55:12,573 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=170, Invalid=172, Unknown=0, NotChecked=0, Total=342 [2018-02-02 09:55:12,574 INFO L87 Difference]: Start difference. First operand 98 states and 102 transitions. Second operand 19 states. [2018-02-02 09:55:12,599 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:55:12,599 INFO L93 Difference]: Finished difference Result 101 states and 105 transitions. [2018-02-02 09:55:12,599 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-02-02 09:55:12,599 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 93 [2018-02-02 09:55:12,600 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:55:12,600 INFO L225 Difference]: With dead ends: 101 [2018-02-02 09:55:12,600 INFO L226 Difference]: Without dead ends: 99 [2018-02-02 09:55:12,600 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 29 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=170, Invalid=172, Unknown=0, NotChecked=0, Total=342 [2018-02-02 09:55:12,600 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 99 states. [2018-02-02 09:55:12,602 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 99 to 99. [2018-02-02 09:55:12,602 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 99 states. [2018-02-02 09:55:12,602 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 99 states to 99 states and 103 transitions. [2018-02-02 09:55:12,602 INFO L78 Accepts]: Start accepts. Automaton has 99 states and 103 transitions. Word has length 93 [2018-02-02 09:55:12,603 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:55:12,603 INFO L432 AbstractCegarLoop]: Abstraction has 99 states and 103 transitions. [2018-02-02 09:55:12,603 INFO L433 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-02-02 09:55:12,603 INFO L276 IsEmpty]: Start isEmpty. Operand 99 states and 103 transitions. [2018-02-02 09:55:12,603 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2018-02-02 09:55:12,603 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:55:12,603 INFO L351 BasicCegarLoop]: trace histogram [16, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:55:12,603 INFO L371 AbstractCegarLoop]: === Iteration 36 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-02 09:55:12,604 INFO L82 PathProgramCache]: Analyzing trace with hash -397311008, now seen corresponding path program 16 times [2018-02-02 09:55:12,604 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-02 09:55:12,616 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:55:12,617 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:55:12,770 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-02 09:55:12,770 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-02 09:55:12,771 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [20] total 20 [2018-02-02 09:55:12,771 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-02 09:55:12,771 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 09:55:12,771 INFO L182 omatonBuilderFactory]: Interpolants [6284#true, 6285#false, 6286#(= |#Ultimate.C_memset_#t~loopctr21| 0), 6287#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 1)), 6288#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 2)), 6289#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 3)), 6290#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 4)), 6291#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 5)), 6292#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 6)), 6293#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 7)), 6294#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 8)), 6295#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 9)), 6296#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 10)), 6297#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 11)), 6298#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 12)), 6299#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 13)), 6300#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 14)), 6301#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 15)), 6302#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 16)), 6303#(not (= |#Ultimate.C_memset_#amount| 94))] [2018-02-02 09:55:12,771 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-02 09:55:12,771 INFO L409 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-02-02 09:55:12,771 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-02-02 09:55:12,771 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=189, Invalid=191, Unknown=0, NotChecked=0, Total=380 [2018-02-02 09:55:12,771 INFO L87 Difference]: Start difference. First operand 99 states and 103 transitions. Second operand 20 states. [2018-02-02 09:55:12,827 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:55:12,827 INFO L93 Difference]: Finished difference Result 102 states and 106 transitions. [2018-02-02 09:55:12,828 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-02-02 09:55:12,828 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 94 [2018-02-02 09:55:12,828 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:55:12,828 INFO L225 Difference]: With dead ends: 102 [2018-02-02 09:55:12,828 INFO L226 Difference]: Without dead ends: 100 [2018-02-02 09:55:12,829 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 31 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=189, Invalid=191, Unknown=0, NotChecked=0, Total=380 [2018-02-02 09:55:12,829 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 100 states. [2018-02-02 09:55:12,830 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 100 to 100. [2018-02-02 09:55:12,830 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 100 states. [2018-02-02 09:55:12,830 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 100 states to 100 states and 104 transitions. [2018-02-02 09:55:12,831 INFO L78 Accepts]: Start accepts. Automaton has 100 states and 104 transitions. Word has length 94 [2018-02-02 09:55:12,831 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:55:12,831 INFO L432 AbstractCegarLoop]: Abstraction has 100 states and 104 transitions. [2018-02-02 09:55:12,831 INFO L433 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-02-02 09:55:12,831 INFO L276 IsEmpty]: Start isEmpty. Operand 100 states and 104 transitions. [2018-02-02 09:55:12,831 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2018-02-02 09:55:12,831 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:55:12,832 INFO L351 BasicCegarLoop]: trace histogram [17, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:55:12,832 INFO L371 AbstractCegarLoop]: === Iteration 37 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-02 09:55:12,832 INFO L82 PathProgramCache]: Analyzing trace with hash 2100963315, now seen corresponding path program 17 times [2018-02-02 09:55:12,832 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-02 09:55:12,845 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:55:12,846 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:55:13,061 INFO L134 CoverageAnalysis]: Checked inductivity of 207 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-02 09:55:13,062 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-02 09:55:13,062 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [21] total 21 [2018-02-02 09:55:13,062 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-02 09:55:13,062 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 09:55:13,062 INFO L182 omatonBuilderFactory]: Interpolants [6506#true, 6507#false, 6508#(= |#Ultimate.C_memset_#t~loopctr21| 0), 6509#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 1)), 6510#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 2)), 6511#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 3)), 6512#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 4)), 6513#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 5)), 6514#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 6)), 6515#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 7)), 6516#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 8)), 6517#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 9)), 6518#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 10)), 6519#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 11)), 6520#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 12)), 6521#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 13)), 6522#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 14)), 6523#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 15)), 6524#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 16)), 6525#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 17)), 6526#(not (= |#Ultimate.C_memset_#amount| 94))] [2018-02-02 09:55:13,063 INFO L134 CoverageAnalysis]: Checked inductivity of 207 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-02 09:55:13,063 INFO L409 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-02-02 09:55:13,063 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-02-02 09:55:13,063 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=209, Invalid=211, Unknown=0, NotChecked=0, Total=420 [2018-02-02 09:55:13,063 INFO L87 Difference]: Start difference. First operand 100 states and 104 transitions. Second operand 21 states. [2018-02-02 09:55:13,095 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:55:13,095 INFO L93 Difference]: Finished difference Result 103 states and 107 transitions. [2018-02-02 09:55:13,095 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-02-02 09:55:13,095 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 95 [2018-02-02 09:55:13,096 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:55:13,096 INFO L225 Difference]: With dead ends: 103 [2018-02-02 09:55:13,096 INFO L226 Difference]: Without dead ends: 101 [2018-02-02 09:55:13,096 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 33 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=209, Invalid=211, Unknown=0, NotChecked=0, Total=420 [2018-02-02 09:55:13,096 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 101 states. [2018-02-02 09:55:13,097 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 101 to 101. [2018-02-02 09:55:13,097 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 101 states. [2018-02-02 09:55:13,098 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 101 states to 101 states and 105 transitions. [2018-02-02 09:55:13,098 INFO L78 Accepts]: Start accepts. Automaton has 101 states and 105 transitions. Word has length 95 [2018-02-02 09:55:13,098 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:55:13,098 INFO L432 AbstractCegarLoop]: Abstraction has 101 states and 105 transitions. [2018-02-02 09:55:13,098 INFO L433 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-02-02 09:55:13,098 INFO L276 IsEmpty]: Start isEmpty. Operand 101 states and 105 transitions. [2018-02-02 09:55:13,098 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2018-02-02 09:55:13,098 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:55:13,098 INFO L351 BasicCegarLoop]: trace histogram [18, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:55:13,098 INFO L371 AbstractCegarLoop]: === Iteration 38 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-02 09:55:13,099 INFO L82 PathProgramCache]: Analyzing trace with hash -2056911296, now seen corresponding path program 18 times [2018-02-02 09:55:13,099 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-02 09:55:13,107 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:55:13,108 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:55:13,287 INFO L134 CoverageAnalysis]: Checked inductivity of 225 backedges. 0 proven. 171 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-02 09:55:13,288 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-02 09:55:13,288 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [22] total 22 [2018-02-02 09:55:13,288 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-02 09:55:13,288 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 09:55:13,288 INFO L182 omatonBuilderFactory]: Interpolants [6752#(not (= |#Ultimate.C_memset_#amount| 94)), 6731#true, 6732#false, 6733#(= |#Ultimate.C_memset_#t~loopctr21| 0), 6734#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 1)), 6735#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 2)), 6736#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 3)), 6737#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 4)), 6738#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 5)), 6739#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 6)), 6740#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 7)), 6741#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 8)), 6742#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 9)), 6743#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 10)), 6744#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 11)), 6745#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 12)), 6746#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 13)), 6747#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 14)), 6748#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 15)), 6749#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 16)), 6750#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 17)), 6751#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 18))] [2018-02-02 09:55:13,288 INFO L134 CoverageAnalysis]: Checked inductivity of 225 backedges. 0 proven. 171 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-02 09:55:13,288 INFO L409 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-02-02 09:55:13,288 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-02-02 09:55:13,288 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=230, Invalid=232, Unknown=0, NotChecked=0, Total=462 [2018-02-02 09:55:13,289 INFO L87 Difference]: Start difference. First operand 101 states and 105 transitions. Second operand 22 states. [2018-02-02 09:55:13,317 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:55:13,317 INFO L93 Difference]: Finished difference Result 104 states and 108 transitions. [2018-02-02 09:55:13,317 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-02-02 09:55:13,317 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 96 [2018-02-02 09:55:13,318 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:55:13,318 INFO L225 Difference]: With dead ends: 104 [2018-02-02 09:55:13,318 INFO L226 Difference]: Without dead ends: 102 [2018-02-02 09:55:13,318 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 35 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=230, Invalid=232, Unknown=0, NotChecked=0, Total=462 [2018-02-02 09:55:13,318 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 102 states. [2018-02-02 09:55:13,319 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 102 to 102. [2018-02-02 09:55:13,319 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 102 states. [2018-02-02 09:55:13,320 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 102 states to 102 states and 106 transitions. [2018-02-02 09:55:13,321 INFO L78 Accepts]: Start accepts. Automaton has 102 states and 106 transitions. Word has length 96 [2018-02-02 09:55:13,321 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:55:13,321 INFO L432 AbstractCegarLoop]: Abstraction has 102 states and 106 transitions. [2018-02-02 09:55:13,321 INFO L433 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-02-02 09:55:13,321 INFO L276 IsEmpty]: Start isEmpty. Operand 102 states and 106 transitions. [2018-02-02 09:55:13,322 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 98 [2018-02-02 09:55:13,322 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:55:13,322 INFO L351 BasicCegarLoop]: trace histogram [19, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:55:13,322 INFO L371 AbstractCegarLoop]: === Iteration 39 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-02 09:55:13,322 INFO L82 PathProgramCache]: Analyzing trace with hash -2102005357, now seen corresponding path program 19 times [2018-02-02 09:55:13,323 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-02 09:55:13,337 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:55:13,339 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:55:13,599 INFO L134 CoverageAnalysis]: Checked inductivity of 244 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-02 09:55:13,599 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-02 09:55:13,599 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [23] total 23 [2018-02-02 09:55:13,599 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-02 09:55:13,599 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 09:55:13,599 INFO L182 omatonBuilderFactory]: Interpolants [6976#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 15)), 6977#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 16)), 6978#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 17)), 6979#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 18)), 6980#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 19)), 6981#(not (= |#Ultimate.C_memset_#amount| 94)), 6959#true, 6960#false, 6961#(= |#Ultimate.C_memset_#t~loopctr21| 0), 6962#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 1)), 6963#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 2)), 6964#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 3)), 6965#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 4)), 6966#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 5)), 6967#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 6)), 6968#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 7)), 6969#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 8)), 6970#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 9)), 6971#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 10)), 6972#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 11)), 6973#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 12)), 6974#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 13)), 6975#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 14))] [2018-02-02 09:55:13,599 INFO L134 CoverageAnalysis]: Checked inductivity of 244 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-02 09:55:13,600 INFO L409 AbstractCegarLoop]: Interpolant automaton has 23 states [2018-02-02 09:55:13,600 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2018-02-02 09:55:13,600 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=252, Invalid=254, Unknown=0, NotChecked=0, Total=506 [2018-02-02 09:55:13,600 INFO L87 Difference]: Start difference. First operand 102 states and 106 transitions. Second operand 23 states. [2018-02-02 09:55:13,641 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:55:13,641 INFO L93 Difference]: Finished difference Result 105 states and 109 transitions. [2018-02-02 09:55:13,641 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-02-02 09:55:13,642 INFO L78 Accepts]: Start accepts. Automaton has 23 states. Word has length 97 [2018-02-02 09:55:13,642 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:55:13,642 INFO L225 Difference]: With dead ends: 105 [2018-02-02 09:55:13,642 INFO L226 Difference]: Without dead ends: 103 [2018-02-02 09:55:13,642 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 37 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=252, Invalid=254, Unknown=0, NotChecked=0, Total=506 [2018-02-02 09:55:13,643 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 103 states. [2018-02-02 09:55:13,644 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 103 to 103. [2018-02-02 09:55:13,644 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 103 states. [2018-02-02 09:55:13,645 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 103 states to 103 states and 107 transitions. [2018-02-02 09:55:13,645 INFO L78 Accepts]: Start accepts. Automaton has 103 states and 107 transitions. Word has length 97 [2018-02-02 09:55:13,645 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:55:13,645 INFO L432 AbstractCegarLoop]: Abstraction has 103 states and 107 transitions. [2018-02-02 09:55:13,645 INFO L433 AbstractCegarLoop]: Interpolant automaton has 23 states. [2018-02-02 09:55:13,645 INFO L276 IsEmpty]: Start isEmpty. Operand 103 states and 107 transitions. [2018-02-02 09:55:13,646 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 99 [2018-02-02 09:55:13,646 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:55:13,646 INFO L351 BasicCegarLoop]: trace histogram [20, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:55:13,646 INFO L371 AbstractCegarLoop]: === Iteration 40 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-02 09:55:13,646 INFO L82 PathProgramCache]: Analyzing trace with hash 795046048, now seen corresponding path program 20 times [2018-02-02 09:55:13,647 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-02 09:55:13,660 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:55:13,661 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:55:13,904 INFO L134 CoverageAnalysis]: Checked inductivity of 264 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-02 09:55:13,904 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-02 09:55:13,904 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [24] total 24 [2018-02-02 09:55:13,904 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-02 09:55:13,904 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 09:55:13,904 INFO L182 omatonBuilderFactory]: Interpolants [7200#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 8)), 7201#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 9)), 7202#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 10)), 7203#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 11)), 7204#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 12)), 7205#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 13)), 7206#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 14)), 7207#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 15)), 7208#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 16)), 7209#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 17)), 7210#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 18)), 7211#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 19)), 7212#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 20)), 7213#(not (= |#Ultimate.C_memset_#amount| 94)), 7190#true, 7191#false, 7192#(= |#Ultimate.C_memset_#t~loopctr21| 0), 7193#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 1)), 7194#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 2)), 7195#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 3)), 7196#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 4)), 7197#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 5)), 7198#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 6)), 7199#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 7))] [2018-02-02 09:55:13,904 INFO L134 CoverageAnalysis]: Checked inductivity of 264 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-02 09:55:13,904 INFO L409 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-02-02 09:55:13,905 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-02-02 09:55:13,905 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=275, Invalid=277, Unknown=0, NotChecked=0, Total=552 [2018-02-02 09:55:13,905 INFO L87 Difference]: Start difference. First operand 103 states and 107 transitions. Second operand 24 states. [2018-02-02 09:55:13,945 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:55:13,946 INFO L93 Difference]: Finished difference Result 106 states and 110 transitions. [2018-02-02 09:55:13,946 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-02-02 09:55:13,946 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 98 [2018-02-02 09:55:13,946 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:55:13,947 INFO L225 Difference]: With dead ends: 106 [2018-02-02 09:55:13,947 INFO L226 Difference]: Without dead ends: 104 [2018-02-02 09:55:13,947 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 24 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 39 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=275, Invalid=277, Unknown=0, NotChecked=0, Total=552 [2018-02-02 09:55:13,947 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 104 states. [2018-02-02 09:55:13,949 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 104 to 104. [2018-02-02 09:55:13,949 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 104 states. [2018-02-02 09:55:13,949 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 104 states to 104 states and 108 transitions. [2018-02-02 09:55:13,949 INFO L78 Accepts]: Start accepts. Automaton has 104 states and 108 transitions. Word has length 98 [2018-02-02 09:55:13,949 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:55:13,950 INFO L432 AbstractCegarLoop]: Abstraction has 104 states and 108 transitions. [2018-02-02 09:55:13,950 INFO L433 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-02-02 09:55:13,950 INFO L276 IsEmpty]: Start isEmpty. Operand 104 states and 108 transitions. [2018-02-02 09:55:13,950 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 100 [2018-02-02 09:55:13,950 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:55:13,950 INFO L351 BasicCegarLoop]: trace histogram [21, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:55:13,950 INFO L371 AbstractCegarLoop]: === Iteration 41 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-02 09:55:13,951 INFO L82 PathProgramCache]: Analyzing trace with hash 409326387, now seen corresponding path program 21 times [2018-02-02 09:55:13,951 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-02 09:55:13,965 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:55:13,966 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:55:14,255 INFO L134 CoverageAnalysis]: Checked inductivity of 285 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-02 09:55:14,256 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-02 09:55:14,256 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [25] total 25 [2018-02-02 09:55:14,256 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-02 09:55:14,256 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 09:55:14,256 INFO L182 omatonBuilderFactory]: Interpolants [7424#true, 7425#false, 7426#(= |#Ultimate.C_memset_#t~loopctr21| 0), 7427#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 1)), 7428#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 2)), 7429#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 3)), 7430#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 4)), 7431#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 5)), 7432#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 6)), 7433#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 7)), 7434#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 8)), 7435#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 9)), 7436#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 10)), 7437#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 11)), 7438#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 12)), 7439#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 13)), 7440#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 14)), 7441#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 15)), 7442#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 16)), 7443#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 17)), 7444#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 18)), 7445#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 19)), 7446#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 20)), 7447#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 21)), 7448#(not (= |#Ultimate.C_memset_#amount| 94))] [2018-02-02 09:55:14,257 INFO L134 CoverageAnalysis]: Checked inductivity of 285 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-02 09:55:14,257 INFO L409 AbstractCegarLoop]: Interpolant automaton has 25 states [2018-02-02 09:55:14,257 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2018-02-02 09:55:14,257 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=299, Invalid=301, Unknown=0, NotChecked=0, Total=600 [2018-02-02 09:55:14,257 INFO L87 Difference]: Start difference. First operand 104 states and 108 transitions. Second operand 25 states. [2018-02-02 09:55:14,310 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:55:14,310 INFO L93 Difference]: Finished difference Result 107 states and 111 transitions. [2018-02-02 09:55:14,311 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-02-02 09:55:14,311 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 99 [2018-02-02 09:55:14,311 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:55:14,311 INFO L225 Difference]: With dead ends: 107 [2018-02-02 09:55:14,311 INFO L226 Difference]: Without dead ends: 105 [2018-02-02 09:55:14,312 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 25 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 41 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=299, Invalid=301, Unknown=0, NotChecked=0, Total=600 [2018-02-02 09:55:14,312 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 105 states. [2018-02-02 09:55:14,314 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 105 to 105. [2018-02-02 09:55:14,314 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 105 states. [2018-02-02 09:55:14,314 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 105 states to 105 states and 109 transitions. [2018-02-02 09:55:14,314 INFO L78 Accepts]: Start accepts. Automaton has 105 states and 109 transitions. Word has length 99 [2018-02-02 09:55:14,315 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:55:14,315 INFO L432 AbstractCegarLoop]: Abstraction has 105 states and 109 transitions. [2018-02-02 09:55:14,315 INFO L433 AbstractCegarLoop]: Interpolant automaton has 25 states. [2018-02-02 09:55:14,315 INFO L276 IsEmpty]: Start isEmpty. Operand 105 states and 109 transitions. [2018-02-02 09:55:14,315 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 101 [2018-02-02 09:55:14,315 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:55:14,315 INFO L351 BasicCegarLoop]: trace histogram [22, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:55:14,315 INFO L371 AbstractCegarLoop]: === Iteration 42 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-02 09:55:14,316 INFO L82 PathProgramCache]: Analyzing trace with hash 1336918784, now seen corresponding path program 22 times [2018-02-02 09:55:14,316 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-02 09:55:14,329 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:55:14,330 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:55:14,677 INFO L134 CoverageAnalysis]: Checked inductivity of 307 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-02 09:55:14,677 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-02 09:55:14,677 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [26] total 26 [2018-02-02 09:55:14,678 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-02 09:55:14,678 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 09:55:14,678 INFO L182 omatonBuilderFactory]: Interpolants [7680#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 17)), 7681#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 18)), 7682#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 19)), 7683#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 20)), 7684#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 21)), 7685#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 22)), 7686#(not (= |#Ultimate.C_memset_#amount| 94)), 7661#true, 7662#false, 7663#(or (not (= |#Ultimate.C_memset_#amount| 94)) (= |#Ultimate.C_memset_#t~loopctr21| 0)), 7664#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 1)), 7665#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 2)), 7666#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 3)), 7667#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 4)), 7668#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 5)), 7669#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 6)), 7670#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 7)), 7671#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 8)), 7672#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 9)), 7673#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 10)), 7674#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 11)), 7675#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 12)), 7676#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 13)), 7677#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 14)), 7678#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 15)), 7679#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 16))] [2018-02-02 09:55:14,678 INFO L134 CoverageAnalysis]: Checked inductivity of 307 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-02 09:55:14,679 INFO L409 AbstractCegarLoop]: Interpolant automaton has 26 states [2018-02-02 09:55:14,679 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2018-02-02 09:55:14,679 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=325, Invalid=325, Unknown=0, NotChecked=0, Total=650 [2018-02-02 09:55:14,679 INFO L87 Difference]: Start difference. First operand 105 states and 109 transitions. Second operand 26 states. [2018-02-02 09:55:14,708 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:55:14,708 INFO L93 Difference]: Finished difference Result 108 states and 112 transitions. [2018-02-02 09:55:14,708 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2018-02-02 09:55:14,708 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 100 [2018-02-02 09:55:14,708 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:55:14,709 INFO L225 Difference]: With dead ends: 108 [2018-02-02 09:55:14,709 INFO L226 Difference]: Without dead ends: 106 [2018-02-02 09:55:14,709 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 44 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=325, Invalid=325, Unknown=0, NotChecked=0, Total=650 [2018-02-02 09:55:14,709 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 106 states. [2018-02-02 09:55:14,711 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 106 to 106. [2018-02-02 09:55:14,711 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 106 states. [2018-02-02 09:55:14,712 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 106 states to 106 states and 110 transitions. [2018-02-02 09:55:14,712 INFO L78 Accepts]: Start accepts. Automaton has 106 states and 110 transitions. Word has length 100 [2018-02-02 09:55:14,712 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:55:14,712 INFO L432 AbstractCegarLoop]: Abstraction has 106 states and 110 transitions. [2018-02-02 09:55:14,712 INFO L433 AbstractCegarLoop]: Interpolant automaton has 26 states. [2018-02-02 09:55:14,712 INFO L276 IsEmpty]: Start isEmpty. Operand 106 states and 110 transitions. [2018-02-02 09:55:14,713 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 102 [2018-02-02 09:55:14,713 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:55:14,713 INFO L351 BasicCegarLoop]: trace histogram [23, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:55:14,713 INFO L371 AbstractCegarLoop]: === Iteration 43 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-02 09:55:14,713 INFO L82 PathProgramCache]: Analyzing trace with hash 27512019, now seen corresponding path program 23 times [2018-02-02 09:55:14,714 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-02 09:55:14,728 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:55:14,729 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:55:15,081 INFO L134 CoverageAnalysis]: Checked inductivity of 330 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-02 09:55:15,081 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-02 09:55:15,081 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [27] total 27 [2018-02-02 09:55:15,081 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-02 09:55:15,081 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 09:55:15,082 INFO L182 omatonBuilderFactory]: Interpolants [7901#true, 7902#false, 7903#(or (not (= |#Ultimate.C_memset_#amount| 94)) (= |#Ultimate.C_memset_#t~loopctr21| 0)), 7904#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 1)), 7905#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 2)), 7906#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 3)), 7907#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 4)), 7908#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 5)), 7909#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 6)), 7910#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 7)), 7911#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 8)), 7912#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 9)), 7913#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 10)), 7914#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 11)), 7915#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 12)), 7916#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 13)), 7917#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 14)), 7918#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 15)), 7919#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 16)), 7920#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 17)), 7921#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 18)), 7922#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 19)), 7923#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 20)), 7924#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 21)), 7925#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 22)), 7926#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 23)), 7927#(not (= |#Ultimate.C_memset_#amount| 94))] [2018-02-02 09:55:15,082 INFO L134 CoverageAnalysis]: Checked inductivity of 330 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-02 09:55:15,082 INFO L409 AbstractCegarLoop]: Interpolant automaton has 27 states [2018-02-02 09:55:15,082 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2018-02-02 09:55:15,082 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=351, Invalid=351, Unknown=0, NotChecked=0, Total=702 [2018-02-02 09:55:15,082 INFO L87 Difference]: Start difference. First operand 106 states and 110 transitions. Second operand 27 states. [2018-02-02 09:55:15,139 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:55:15,139 INFO L93 Difference]: Finished difference Result 109 states and 113 transitions. [2018-02-02 09:55:15,139 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2018-02-02 09:55:15,139 INFO L78 Accepts]: Start accepts. Automaton has 27 states. Word has length 101 [2018-02-02 09:55:15,139 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:55:15,140 INFO L225 Difference]: With dead ends: 109 [2018-02-02 09:55:15,140 INFO L226 Difference]: Without dead ends: 107 [2018-02-02 09:55:15,140 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 27 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 46 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=351, Invalid=351, Unknown=0, NotChecked=0, Total=702 [2018-02-02 09:55:15,140 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 107 states. [2018-02-02 09:55:15,142 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 107 to 107. [2018-02-02 09:55:15,142 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 107 states. [2018-02-02 09:55:15,142 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 107 states to 107 states and 111 transitions. [2018-02-02 09:55:15,142 INFO L78 Accepts]: Start accepts. Automaton has 107 states and 111 transitions. Word has length 101 [2018-02-02 09:55:15,143 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:55:15,143 INFO L432 AbstractCegarLoop]: Abstraction has 107 states and 111 transitions. [2018-02-02 09:55:15,143 INFO L433 AbstractCegarLoop]: Interpolant automaton has 27 states. [2018-02-02 09:55:15,143 INFO L276 IsEmpty]: Start isEmpty. Operand 107 states and 111 transitions. [2018-02-02 09:55:15,143 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 103 [2018-02-02 09:55:15,143 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:55:15,143 INFO L351 BasicCegarLoop]: trace histogram [24, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:55:15,144 INFO L371 AbstractCegarLoop]: === Iteration 44 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-02 09:55:15,144 INFO L82 PathProgramCache]: Analyzing trace with hash -1909392032, now seen corresponding path program 24 times [2018-02-02 09:55:15,144 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-02 09:55:15,156 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:55:15,157 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:55:15,540 INFO L134 CoverageAnalysis]: Checked inductivity of 354 backedges. 0 proven. 300 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-02 09:55:15,540 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-02 09:55:15,541 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [28] total 28 [2018-02-02 09:55:15,541 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-02 09:55:15,541 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 09:55:15,541 INFO L182 omatonBuilderFactory]: Interpolants [8144#true, 8145#false, 8146#(or (not (= |#Ultimate.C_memset_#amount| 94)) (= |#Ultimate.C_memset_#t~loopctr21| 0)), 8147#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 1)), 8148#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 2)), 8149#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 3)), 8150#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 4)), 8151#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 5)), 8152#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 6)), 8153#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 7)), 8154#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 8)), 8155#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 9)), 8156#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 10)), 8157#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 11)), 8158#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 12)), 8159#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 13)), 8160#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 14)), 8161#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 15)), 8162#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 16)), 8163#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 17)), 8164#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 18)), 8165#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 19)), 8166#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 20)), 8167#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 21)), 8168#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 22)), 8169#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 23)), 8170#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 24)), 8171#(not (= |#Ultimate.C_memset_#amount| 94))] [2018-02-02 09:55:15,541 INFO L134 CoverageAnalysis]: Checked inductivity of 354 backedges. 0 proven. 300 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-02 09:55:15,541 INFO L409 AbstractCegarLoop]: Interpolant automaton has 28 states [2018-02-02 09:55:15,542 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2018-02-02 09:55:15,542 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=378, Invalid=378, Unknown=0, NotChecked=0, Total=756 [2018-02-02 09:55:15,542 INFO L87 Difference]: Start difference. First operand 107 states and 111 transitions. Second operand 28 states. [2018-02-02 09:55:15,595 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:55:15,596 INFO L93 Difference]: Finished difference Result 110 states and 114 transitions. [2018-02-02 09:55:15,596 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2018-02-02 09:55:15,596 INFO L78 Accepts]: Start accepts. Automaton has 28 states. Word has length 102 [2018-02-02 09:55:15,596 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:55:15,597 INFO L225 Difference]: With dead ends: 110 [2018-02-02 09:55:15,597 INFO L226 Difference]: Without dead ends: 108 [2018-02-02 09:55:15,597 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 28 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 48 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=378, Invalid=378, Unknown=0, NotChecked=0, Total=756 [2018-02-02 09:55:15,597 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 108 states. [2018-02-02 09:55:15,599 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 108 to 108. [2018-02-02 09:55:15,599 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 108 states. [2018-02-02 09:55:15,600 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 108 states to 108 states and 112 transitions. [2018-02-02 09:55:15,600 INFO L78 Accepts]: Start accepts. Automaton has 108 states and 112 transitions. Word has length 102 [2018-02-02 09:55:15,600 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:55:15,600 INFO L432 AbstractCegarLoop]: Abstraction has 108 states and 112 transitions. [2018-02-02 09:55:15,600 INFO L433 AbstractCegarLoop]: Interpolant automaton has 28 states. [2018-02-02 09:55:15,600 INFO L276 IsEmpty]: Start isEmpty. Operand 108 states and 112 transitions. [2018-02-02 09:55:15,601 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 104 [2018-02-02 09:55:15,601 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:55:15,601 INFO L351 BasicCegarLoop]: trace histogram [25, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:55:15,601 INFO L371 AbstractCegarLoop]: === Iteration 45 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-02 09:55:15,601 INFO L82 PathProgramCache]: Analyzing trace with hash -1823875469, now seen corresponding path program 25 times [2018-02-02 09:55:15,602 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-02 09:55:15,646 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:55:15,647 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:55:16,016 INFO L134 CoverageAnalysis]: Checked inductivity of 379 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-02 09:55:16,016 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-02 09:55:16,016 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [29] total 29 [2018-02-02 09:55:16,017 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-02 09:55:16,017 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 09:55:16,017 INFO L182 omatonBuilderFactory]: Interpolants [8390#true, 8391#false, 8392#(or (not (= |#Ultimate.C_memset_#amount| 94)) (= |#Ultimate.C_memset_#t~loopctr21| 0)), 8393#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 1)), 8394#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 2)), 8395#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 3)), 8396#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 4)), 8397#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 5)), 8398#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 6)), 8399#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 7)), 8400#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 8)), 8401#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 9)), 8402#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 10)), 8403#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 11)), 8404#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 12)), 8405#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 13)), 8406#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 14)), 8407#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 15)), 8408#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 16)), 8409#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 17)), 8410#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 18)), 8411#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 19)), 8412#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 20)), 8413#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 21)), 8414#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 22)), 8415#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 23)), 8416#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 24)), 8417#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 25)), 8418#(not (= |#Ultimate.C_memset_#amount| 94))] [2018-02-02 09:55:16,017 INFO L134 CoverageAnalysis]: Checked inductivity of 379 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-02 09:55:16,017 INFO L409 AbstractCegarLoop]: Interpolant automaton has 29 states [2018-02-02 09:55:16,017 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2018-02-02 09:55:16,018 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=406, Invalid=406, Unknown=0, NotChecked=0, Total=812 [2018-02-02 09:55:16,018 INFO L87 Difference]: Start difference. First operand 108 states and 112 transitions. Second operand 29 states. [2018-02-02 09:55:16,069 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:55:16,069 INFO L93 Difference]: Finished difference Result 111 states and 115 transitions. [2018-02-02 09:55:16,070 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2018-02-02 09:55:16,070 INFO L78 Accepts]: Start accepts. Automaton has 29 states. Word has length 103 [2018-02-02 09:55:16,070 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:55:16,070 INFO L225 Difference]: With dead ends: 111 [2018-02-02 09:55:16,070 INFO L226 Difference]: Without dead ends: 109 [2018-02-02 09:55:16,071 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 27 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 50 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=406, Invalid=406, Unknown=0, NotChecked=0, Total=812 [2018-02-02 09:55:16,071 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 109 states. [2018-02-02 09:55:16,072 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 109 to 109. [2018-02-02 09:55:16,072 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 109 states. [2018-02-02 09:55:16,072 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 109 states to 109 states and 113 transitions. [2018-02-02 09:55:16,072 INFO L78 Accepts]: Start accepts. Automaton has 109 states and 113 transitions. Word has length 103 [2018-02-02 09:55:16,072 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:55:16,072 INFO L432 AbstractCegarLoop]: Abstraction has 109 states and 113 transitions. [2018-02-02 09:55:16,072 INFO L433 AbstractCegarLoop]: Interpolant automaton has 29 states. [2018-02-02 09:55:16,072 INFO L276 IsEmpty]: Start isEmpty. Operand 109 states and 113 transitions. [2018-02-02 09:55:16,073 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 105 [2018-02-02 09:55:16,073 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:55:16,073 INFO L351 BasicCegarLoop]: trace histogram [26, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:55:16,073 INFO L371 AbstractCegarLoop]: === Iteration 46 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-02 09:55:16,073 INFO L82 PathProgramCache]: Analyzing trace with hash 827137984, now seen corresponding path program 26 times [2018-02-02 09:55:16,074 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-02 09:55:16,083 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:55:16,084 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:55:16,459 INFO L134 CoverageAnalysis]: Checked inductivity of 405 backedges. 0 proven. 351 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-02 09:55:16,459 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-02 09:55:16,459 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [30] total 30 [2018-02-02 09:55:16,460 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-02 09:55:16,460 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 09:55:16,460 INFO L182 omatonBuilderFactory]: Interpolants [8640#false, 8641#(or (not (= |#Ultimate.C_memset_#amount| 94)) (= |#Ultimate.C_memset_#t~loopctr21| 0)), 8642#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 1)), 8643#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 2)), 8644#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 3)), 8645#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 4)), 8646#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 5)), 8647#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 6)), 8648#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 7)), 8649#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 8)), 8650#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 9)), 8651#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 10)), 8652#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 11)), 8653#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 12)), 8654#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 13)), 8655#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 14)), 8656#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 15)), 8657#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 16)), 8658#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 17)), 8659#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 18)), 8660#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 19)), 8661#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 20)), 8662#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 21)), 8663#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 22)), 8664#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 23)), 8665#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 24)), 8666#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 25)), 8667#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 26)), 8668#(not (= |#Ultimate.C_memset_#amount| 94)), 8639#true] [2018-02-02 09:55:16,460 INFO L134 CoverageAnalysis]: Checked inductivity of 405 backedges. 0 proven. 351 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-02 09:55:16,460 INFO L409 AbstractCegarLoop]: Interpolant automaton has 30 states [2018-02-02 09:55:16,461 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2018-02-02 09:55:16,461 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=435, Invalid=435, Unknown=0, NotChecked=0, Total=870 [2018-02-02 09:55:16,461 INFO L87 Difference]: Start difference. First operand 109 states and 113 transitions. Second operand 30 states. [2018-02-02 09:55:16,510 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:55:16,510 INFO L93 Difference]: Finished difference Result 112 states and 116 transitions. [2018-02-02 09:55:16,523 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2018-02-02 09:55:16,523 INFO L78 Accepts]: Start accepts. Automaton has 30 states. Word has length 104 [2018-02-02 09:55:16,523 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:55:16,523 INFO L225 Difference]: With dead ends: 112 [2018-02-02 09:55:16,523 INFO L226 Difference]: Without dead ends: 110 [2018-02-02 09:55:16,523 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 30 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 52 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=435, Invalid=435, Unknown=0, NotChecked=0, Total=870 [2018-02-02 09:55:16,524 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 110 states. [2018-02-02 09:55:16,524 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 110 to 110. [2018-02-02 09:55:16,525 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 110 states. [2018-02-02 09:55:16,525 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 110 states to 110 states and 114 transitions. [2018-02-02 09:55:16,525 INFO L78 Accepts]: Start accepts. Automaton has 110 states and 114 transitions. Word has length 104 [2018-02-02 09:55:16,525 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:55:16,525 INFO L432 AbstractCegarLoop]: Abstraction has 110 states and 114 transitions. [2018-02-02 09:55:16,525 INFO L433 AbstractCegarLoop]: Interpolant automaton has 30 states. [2018-02-02 09:55:16,525 INFO L276 IsEmpty]: Start isEmpty. Operand 110 states and 114 transitions. [2018-02-02 09:55:16,525 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 106 [2018-02-02 09:55:16,526 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:55:16,526 INFO L351 BasicCegarLoop]: trace histogram [27, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:55:16,526 INFO L371 AbstractCegarLoop]: === Iteration 47 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-02 09:55:16,526 INFO L82 PathProgramCache]: Analyzing trace with hash 1404176403, now seen corresponding path program 27 times [2018-02-02 09:55:16,526 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-02 09:55:16,535 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:55:16,536 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:55:17,014 INFO L134 CoverageAnalysis]: Checked inductivity of 432 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-02 09:55:17,015 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-02 09:55:17,015 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [31] total 31 [2018-02-02 09:55:17,015 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-02 09:55:17,015 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 09:55:17,015 INFO L182 omatonBuilderFactory]: Interpolants [8896#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 3)), 8897#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 4)), 8898#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 5)), 8899#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 6)), 8900#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 7)), 8901#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 8)), 8902#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 9)), 8903#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 10)), 8904#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 11)), 8905#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 12)), 8906#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 13)), 8907#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 14)), 8908#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 15)), 8909#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 16)), 8910#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 17)), 8911#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 18)), 8912#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 19)), 8913#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 20)), 8914#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 21)), 8915#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 22)), 8916#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 23)), 8917#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 24)), 8918#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 25)), 8919#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 26)), 8920#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 27)), 8921#(not (= |#Ultimate.C_memset_#amount| 94)), 8891#true, 8892#false, 8893#(or (not (= |#Ultimate.C_memset_#amount| 94)) (= |#Ultimate.C_memset_#t~loopctr21| 0)), 8894#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 1)), 8895#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 2))] [2018-02-02 09:55:17,016 INFO L134 CoverageAnalysis]: Checked inductivity of 432 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-02 09:55:17,016 INFO L409 AbstractCegarLoop]: Interpolant automaton has 31 states [2018-02-02 09:55:17,016 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 31 interpolants. [2018-02-02 09:55:17,016 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=465, Invalid=465, Unknown=0, NotChecked=0, Total=930 [2018-02-02 09:55:17,016 INFO L87 Difference]: Start difference. First operand 110 states and 114 transitions. Second operand 31 states. [2018-02-02 09:55:17,068 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:55:17,068 INFO L93 Difference]: Finished difference Result 113 states and 117 transitions. [2018-02-02 09:55:17,069 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2018-02-02 09:55:17,069 INFO L78 Accepts]: Start accepts. Automaton has 31 states. Word has length 105 [2018-02-02 09:55:17,069 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:55:17,070 INFO L225 Difference]: With dead ends: 113 [2018-02-02 09:55:17,070 INFO L226 Difference]: Without dead ends: 111 [2018-02-02 09:55:17,070 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 31 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 29 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 54 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=465, Invalid=465, Unknown=0, NotChecked=0, Total=930 [2018-02-02 09:55:17,070 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 111 states. [2018-02-02 09:55:17,072 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 111 to 111. [2018-02-02 09:55:17,072 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 111 states. [2018-02-02 09:55:17,072 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 111 states to 111 states and 115 transitions. [2018-02-02 09:55:17,072 INFO L78 Accepts]: Start accepts. Automaton has 111 states and 115 transitions. Word has length 105 [2018-02-02 09:55:17,072 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:55:17,073 INFO L432 AbstractCegarLoop]: Abstraction has 111 states and 115 transitions. [2018-02-02 09:55:17,073 INFO L433 AbstractCegarLoop]: Interpolant automaton has 31 states. [2018-02-02 09:55:17,073 INFO L276 IsEmpty]: Start isEmpty. Operand 111 states and 115 transitions. [2018-02-02 09:55:17,073 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 107 [2018-02-02 09:55:17,073 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:55:17,073 INFO L351 BasicCegarLoop]: trace histogram [28, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:55:17,073 INFO L371 AbstractCegarLoop]: === Iteration 48 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-02 09:55:17,074 INFO L82 PathProgramCache]: Analyzing trace with hash 2112498208, now seen corresponding path program 28 times [2018-02-02 09:55:17,074 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-02 09:55:17,091 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:55:17,092 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:55:17,542 INFO L134 CoverageAnalysis]: Checked inductivity of 460 backedges. 0 proven. 406 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-02 09:55:17,543 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-02 09:55:17,543 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [32] total 32 [2018-02-02 09:55:17,543 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-02 09:55:17,543 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 09:55:17,543 INFO L182 omatonBuilderFactory]: Interpolants [9152#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 4)), 9153#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 5)), 9154#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 6)), 9155#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 7)), 9156#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 8)), 9157#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 9)), 9158#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 10)), 9159#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 11)), 9160#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 12)), 9161#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 13)), 9162#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 14)), 9163#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 15)), 9164#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 16)), 9165#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 17)), 9166#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 18)), 9167#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 19)), 9168#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 20)), 9169#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 21)), 9170#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 22)), 9171#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 23)), 9172#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 24)), 9173#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 25)), 9174#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 26)), 9175#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 27)), 9176#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 28)), 9177#(not (= |#Ultimate.C_memset_#amount| 94)), 9146#true, 9147#false, 9148#(or (not (= |#Ultimate.C_memset_#amount| 94)) (= |#Ultimate.C_memset_#t~loopctr21| 0)), 9149#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 1)), 9150#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 2)), 9151#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 3))] [2018-02-02 09:55:17,543 INFO L134 CoverageAnalysis]: Checked inductivity of 460 backedges. 0 proven. 406 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-02 09:55:17,543 INFO L409 AbstractCegarLoop]: Interpolant automaton has 32 states [2018-02-02 09:55:17,543 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2018-02-02 09:55:17,544 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=496, Invalid=496, Unknown=0, NotChecked=0, Total=992 [2018-02-02 09:55:17,544 INFO L87 Difference]: Start difference. First operand 111 states and 115 transitions. Second operand 32 states. [2018-02-02 09:55:17,588 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:55:17,588 INFO L93 Difference]: Finished difference Result 114 states and 118 transitions. [2018-02-02 09:55:17,589 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2018-02-02 09:55:17,589 INFO L78 Accepts]: Start accepts. Automaton has 32 states. Word has length 106 [2018-02-02 09:55:17,589 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:55:17,589 INFO L225 Difference]: With dead ends: 114 [2018-02-02 09:55:17,589 INFO L226 Difference]: Without dead ends: 112 [2018-02-02 09:55:17,590 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 32 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 56 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=496, Invalid=496, Unknown=0, NotChecked=0, Total=992 [2018-02-02 09:55:17,590 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 112 states. [2018-02-02 09:55:17,591 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 112 to 112. [2018-02-02 09:55:17,592 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 112 states. [2018-02-02 09:55:17,592 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 112 states to 112 states and 116 transitions. [2018-02-02 09:55:17,592 INFO L78 Accepts]: Start accepts. Automaton has 112 states and 116 transitions. Word has length 106 [2018-02-02 09:55:17,592 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:55:17,592 INFO L432 AbstractCegarLoop]: Abstraction has 112 states and 116 transitions. [2018-02-02 09:55:17,592 INFO L433 AbstractCegarLoop]: Interpolant automaton has 32 states. [2018-02-02 09:55:17,592 INFO L276 IsEmpty]: Start isEmpty. Operand 112 states and 116 transitions. [2018-02-02 09:55:17,593 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 108 [2018-02-02 09:55:17,593 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:55:17,593 INFO L351 BasicCegarLoop]: trace histogram [29, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:55:17,593 INFO L371 AbstractCegarLoop]: === Iteration 49 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-02 09:55:17,593 INFO L82 PathProgramCache]: Analyzing trace with hash -1699329613, now seen corresponding path program 29 times [2018-02-02 09:55:17,594 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-02 09:55:17,605 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:55:17,605 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:55:17,926 INFO L134 CoverageAnalysis]: Checked inductivity of 489 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-02 09:55:17,926 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-02 09:55:17,926 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [33] total 33 [2018-02-02 09:55:17,926 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-02 09:55:17,926 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 09:55:17,926 INFO L182 omatonBuilderFactory]: Interpolants [9408#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 2)), 9409#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 3)), 9410#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 4)), 9411#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 5)), 9412#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 6)), 9413#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 7)), 9414#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 8)), 9415#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 9)), 9416#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 10)), 9417#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 11)), 9418#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 12)), 9419#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 13)), 9420#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 14)), 9421#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 15)), 9422#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 16)), 9423#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 17)), 9424#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 18)), 9425#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 19)), 9426#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 20)), 9427#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 21)), 9428#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 22)), 9429#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 23)), 9430#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 24)), 9431#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 25)), 9432#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 26)), 9433#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 27)), 9434#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 28)), 9435#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 29)), 9436#(not (= |#Ultimate.C_memset_#amount| 94)), 9404#true, 9405#false, 9406#(or (not (= |#Ultimate.C_memset_#amount| 94)) (= |#Ultimate.C_memset_#t~loopctr21| 0)), 9407#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 1))] [2018-02-02 09:55:17,926 INFO L134 CoverageAnalysis]: Checked inductivity of 489 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-02 09:55:17,927 INFO L409 AbstractCegarLoop]: Interpolant automaton has 33 states [2018-02-02 09:55:17,927 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 33 interpolants. [2018-02-02 09:55:17,927 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=528, Invalid=528, Unknown=0, NotChecked=0, Total=1056 [2018-02-02 09:55:17,927 INFO L87 Difference]: Start difference. First operand 112 states and 116 transitions. Second operand 33 states. [2018-02-02 09:55:17,973 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:55:17,974 INFO L93 Difference]: Finished difference Result 115 states and 119 transitions. [2018-02-02 09:55:17,987 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2018-02-02 09:55:17,987 INFO L78 Accepts]: Start accepts. Automaton has 33 states. Word has length 107 [2018-02-02 09:55:17,987 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:55:17,988 INFO L225 Difference]: With dead ends: 115 [2018-02-02 09:55:17,988 INFO L226 Difference]: Without dead ends: 113 [2018-02-02 09:55:17,988 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 33 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 58 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=528, Invalid=528, Unknown=0, NotChecked=0, Total=1056 [2018-02-02 09:55:17,988 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 113 states. [2018-02-02 09:55:17,990 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 113 to 113. [2018-02-02 09:55:17,990 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 113 states. [2018-02-02 09:55:17,990 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 113 states to 113 states and 117 transitions. [2018-02-02 09:55:17,991 INFO L78 Accepts]: Start accepts. Automaton has 113 states and 117 transitions. Word has length 107 [2018-02-02 09:55:17,991 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:55:17,991 INFO L432 AbstractCegarLoop]: Abstraction has 113 states and 117 transitions. [2018-02-02 09:55:17,991 INFO L433 AbstractCegarLoop]: Interpolant automaton has 33 states. [2018-02-02 09:55:17,991 INFO L276 IsEmpty]: Start isEmpty. Operand 113 states and 117 transitions. [2018-02-02 09:55:17,991 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 109 [2018-02-02 09:55:17,991 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:55:17,992 INFO L351 BasicCegarLoop]: trace histogram [30, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:55:17,992 INFO L371 AbstractCegarLoop]: === Iteration 50 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-02 09:55:17,992 INFO L82 PathProgramCache]: Analyzing trace with hash 393092224, now seen corresponding path program 30 times [2018-02-02 09:55:17,992 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-02 09:55:18,009 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:55:18,010 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:55:18,480 INFO L134 CoverageAnalysis]: Checked inductivity of 519 backedges. 0 proven. 465 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-02 09:55:18,480 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-02 09:55:18,480 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [34] total 34 [2018-02-02 09:55:18,480 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-02 09:55:18,480 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 09:55:18,480 INFO L182 omatonBuilderFactory]: Interpolants [9665#true, 9666#false, 9667#(or (not (= |#Ultimate.C_memset_#amount| 94)) (= |#Ultimate.C_memset_#t~loopctr21| 0)), 9668#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 1)), 9669#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 2)), 9670#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 3)), 9671#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 4)), 9672#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 5)), 9673#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 6)), 9674#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 7)), 9675#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 8)), 9676#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 9)), 9677#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 10)), 9678#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 11)), 9679#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 12)), 9680#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 13)), 9681#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 14)), 9682#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 15)), 9683#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 16)), 9684#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 17)), 9685#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 18)), 9686#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 19)), 9687#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 20)), 9688#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 21)), 9689#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 22)), 9690#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 23)), 9691#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 24)), 9692#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 25)), 9693#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 26)), 9694#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 27)), 9695#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 28)), 9696#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 29)), 9697#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 30)), 9698#(not (= |#Ultimate.C_memset_#amount| 94))] [2018-02-02 09:55:18,481 INFO L134 CoverageAnalysis]: Checked inductivity of 519 backedges. 0 proven. 465 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-02 09:55:18,481 INFO L409 AbstractCegarLoop]: Interpolant automaton has 34 states [2018-02-02 09:55:18,481 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 34 interpolants. [2018-02-02 09:55:18,481 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=561, Invalid=561, Unknown=0, NotChecked=0, Total=1122 [2018-02-02 09:55:18,481 INFO L87 Difference]: Start difference. First operand 113 states and 117 transitions. Second operand 34 states. [2018-02-02 09:55:18,531 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:55:18,531 INFO L93 Difference]: Finished difference Result 116 states and 120 transitions. [2018-02-02 09:55:18,531 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2018-02-02 09:55:18,531 INFO L78 Accepts]: Start accepts. Automaton has 34 states. Word has length 108 [2018-02-02 09:55:18,532 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:55:18,532 INFO L225 Difference]: With dead ends: 116 [2018-02-02 09:55:18,532 INFO L226 Difference]: Without dead ends: 114 [2018-02-02 09:55:18,532 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 34 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 60 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=561, Invalid=561, Unknown=0, NotChecked=0, Total=1122 [2018-02-02 09:55:18,533 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 114 states. [2018-02-02 09:55:18,534 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 114 to 114. [2018-02-02 09:55:18,534 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 114 states. [2018-02-02 09:55:18,534 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 114 states to 114 states and 118 transitions. [2018-02-02 09:55:18,534 INFO L78 Accepts]: Start accepts. Automaton has 114 states and 118 transitions. Word has length 108 [2018-02-02 09:55:18,535 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:55:18,535 INFO L432 AbstractCegarLoop]: Abstraction has 114 states and 118 transitions. [2018-02-02 09:55:18,535 INFO L433 AbstractCegarLoop]: Interpolant automaton has 34 states. [2018-02-02 09:55:18,535 INFO L276 IsEmpty]: Start isEmpty. Operand 114 states and 118 transitions. [2018-02-02 09:55:18,535 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 110 [2018-02-02 09:55:18,535 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:55:18,535 INFO L351 BasicCegarLoop]: trace histogram [31, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:55:18,536 INFO L371 AbstractCegarLoop]: === Iteration 51 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-02 09:55:18,536 INFO L82 PathProgramCache]: Analyzing trace with hash 833659731, now seen corresponding path program 31 times [2018-02-02 09:55:18,536 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-02 09:55:18,553 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:55:18,554 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:55:19,103 INFO L134 CoverageAnalysis]: Checked inductivity of 550 backedges. 0 proven. 496 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-02 09:55:19,103 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-02 09:55:19,103 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [35] total 35 [2018-02-02 09:55:19,104 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-02 09:55:19,104 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 09:55:19,104 INFO L182 omatonBuilderFactory]: Interpolants [9929#true, 9930#false, 9931#(or (not (= |#Ultimate.C_memset_#amount| 94)) (= |#Ultimate.C_memset_#t~loopctr21| 0)), 9932#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 1)), 9933#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 2)), 9934#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 3)), 9935#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 4)), 9936#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 5)), 9937#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 6)), 9938#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 7)), 9939#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 8)), 9940#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 9)), 9941#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 10)), 9942#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 11)), 9943#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 12)), 9944#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 13)), 9945#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 14)), 9946#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 15)), 9947#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 16)), 9948#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 17)), 9949#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 18)), 9950#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 19)), 9951#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 20)), 9952#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 21)), 9953#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 22)), 9954#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 23)), 9955#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 24)), 9956#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 25)), 9957#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 26)), 9958#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 27)), 9959#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 28)), 9960#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 29)), 9961#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 30)), 9962#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 31)), 9963#(not (= |#Ultimate.C_memset_#amount| 94))] [2018-02-02 09:55:19,104 INFO L134 CoverageAnalysis]: Checked inductivity of 550 backedges. 0 proven. 496 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-02 09:55:19,105 INFO L409 AbstractCegarLoop]: Interpolant automaton has 35 states [2018-02-02 09:55:19,105 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 35 interpolants. [2018-02-02 09:55:19,105 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=595, Invalid=595, Unknown=0, NotChecked=0, Total=1190 [2018-02-02 09:55:19,105 INFO L87 Difference]: Start difference. First operand 114 states and 118 transitions. Second operand 35 states. [2018-02-02 09:55:19,182 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:55:19,182 INFO L93 Difference]: Finished difference Result 117 states and 121 transitions. [2018-02-02 09:55:19,182 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2018-02-02 09:55:19,182 INFO L78 Accepts]: Start accepts. Automaton has 35 states. Word has length 109 [2018-02-02 09:55:19,183 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:55:19,183 INFO L225 Difference]: With dead ends: 117 [2018-02-02 09:55:19,183 INFO L226 Difference]: Without dead ends: 115 [2018-02-02 09:55:19,183 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 35 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 33 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 62 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=595, Invalid=595, Unknown=0, NotChecked=0, Total=1190 [2018-02-02 09:55:19,183 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 115 states. [2018-02-02 09:55:19,184 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 115 to 115. [2018-02-02 09:55:19,184 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 115 states. [2018-02-02 09:55:19,185 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 115 states to 115 states and 119 transitions. [2018-02-02 09:55:19,185 INFO L78 Accepts]: Start accepts. Automaton has 115 states and 119 transitions. Word has length 109 [2018-02-02 09:55:19,185 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:55:19,185 INFO L432 AbstractCegarLoop]: Abstraction has 115 states and 119 transitions. [2018-02-02 09:55:19,185 INFO L433 AbstractCegarLoop]: Interpolant automaton has 35 states. [2018-02-02 09:55:19,185 INFO L276 IsEmpty]: Start isEmpty. Operand 115 states and 119 transitions. [2018-02-02 09:55:19,186 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 111 [2018-02-02 09:55:19,186 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:55:19,186 INFO L351 BasicCegarLoop]: trace histogram [32, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:55:19,186 INFO L371 AbstractCegarLoop]: === Iteration 52 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-02 09:55:19,186 INFO L82 PathProgramCache]: Analyzing trace with hash 1606350560, now seen corresponding path program 32 times [2018-02-02 09:55:19,187 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-02 09:55:19,206 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:55:19,207 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:55:19,932 INFO L134 CoverageAnalysis]: Checked inductivity of 582 backedges. 0 proven. 528 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-02 09:55:19,932 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-02 09:55:19,932 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [36] total 36 [2018-02-02 09:55:19,932 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-02 09:55:19,932 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 09:55:19,934 INFO L182 omatonBuilderFactory]: Interpolants [10196#true, 10197#false, 10198#(or (not (= |#Ultimate.C_memset_#amount| 94)) (= |#Ultimate.C_memset_#t~loopctr21| 0)), 10199#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 1)), 10200#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 2)), 10201#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 3)), 10202#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 4)), 10203#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 5)), 10204#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 6)), 10205#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 7)), 10206#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 8)), 10207#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 9)), 10208#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 10)), 10209#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 11)), 10210#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 12)), 10211#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 13)), 10212#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 14)), 10213#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 15)), 10214#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 16)), 10215#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 17)), 10216#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 18)), 10217#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 19)), 10218#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 20)), 10219#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 21)), 10220#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 22)), 10221#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 23)), 10222#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 24)), 10223#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 25)), 10224#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 26)), 10225#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 27)), 10226#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 28)), 10227#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 29)), 10228#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 30)), 10229#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 31)), 10230#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 32)), 10231#(not (= |#Ultimate.C_memset_#amount| 94))] [2018-02-02 09:55:19,934 INFO L134 CoverageAnalysis]: Checked inductivity of 582 backedges. 0 proven. 528 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-02 09:55:19,935 INFO L409 AbstractCegarLoop]: Interpolant automaton has 36 states [2018-02-02 09:55:19,935 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2018-02-02 09:55:19,935 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=630, Invalid=630, Unknown=0, NotChecked=0, Total=1260 [2018-02-02 09:55:19,936 INFO L87 Difference]: Start difference. First operand 115 states and 119 transitions. Second operand 36 states. [2018-02-02 09:55:20,004 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:55:20,005 INFO L93 Difference]: Finished difference Result 118 states and 122 transitions. [2018-02-02 09:55:20,005 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2018-02-02 09:55:20,005 INFO L78 Accepts]: Start accepts. Automaton has 36 states. Word has length 110 [2018-02-02 09:55:20,005 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:55:20,006 INFO L225 Difference]: With dead ends: 118 [2018-02-02 09:55:20,006 INFO L226 Difference]: Without dead ends: 116 [2018-02-02 09:55:20,006 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 36 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 64 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=630, Invalid=630, Unknown=0, NotChecked=0, Total=1260 [2018-02-02 09:55:20,006 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 116 states. [2018-02-02 09:55:20,008 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 116 to 116. [2018-02-02 09:55:20,008 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 116 states. [2018-02-02 09:55:20,008 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 116 states to 116 states and 120 transitions. [2018-02-02 09:55:20,008 INFO L78 Accepts]: Start accepts. Automaton has 116 states and 120 transitions. Word has length 110 [2018-02-02 09:55:20,008 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:55:20,008 INFO L432 AbstractCegarLoop]: Abstraction has 116 states and 120 transitions. [2018-02-02 09:55:20,009 INFO L433 AbstractCegarLoop]: Interpolant automaton has 36 states. [2018-02-02 09:55:20,009 INFO L276 IsEmpty]: Start isEmpty. Operand 116 states and 120 transitions. [2018-02-02 09:55:20,057 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 112 [2018-02-02 09:55:20,057 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:55:20,058 INFO L351 BasicCegarLoop]: trace histogram [33, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:55:20,058 INFO L371 AbstractCegarLoop]: === Iteration 53 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-02 09:55:20,058 INFO L82 PathProgramCache]: Analyzing trace with hash -210037517, now seen corresponding path program 33 times [2018-02-02 09:55:20,058 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-02 09:55:20,073 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:55:20,074 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:55:20,529 INFO L134 CoverageAnalysis]: Checked inductivity of 615 backedges. 0 proven. 561 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-02 09:55:20,529 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-02 09:55:20,529 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [37] total 37 [2018-02-02 09:55:20,529 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-02 09:55:20,529 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 09:55:20,529 INFO L182 omatonBuilderFactory]: Interpolants [10496#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 28)), 10497#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 29)), 10498#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 30)), 10499#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 31)), 10500#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 32)), 10501#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 33)), 10502#(not (= |#Ultimate.C_memset_#amount| 94)), 10466#true, 10467#false, 10468#(or (not (= |#Ultimate.C_memset_#amount| 94)) (= |#Ultimate.C_memset_#t~loopctr21| 0)), 10469#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 1)), 10470#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 2)), 10471#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 3)), 10472#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 4)), 10473#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 5)), 10474#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 6)), 10475#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 7)), 10476#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 8)), 10477#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 9)), 10478#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 10)), 10479#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 11)), 10480#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 12)), 10481#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 13)), 10482#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 14)), 10483#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 15)), 10484#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 16)), 10485#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 17)), 10486#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 18)), 10487#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 19)), 10488#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 20)), 10489#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 21)), 10490#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 22)), 10491#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 23)), 10492#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 24)), 10493#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 25)), 10494#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 26)), 10495#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 27))] [2018-02-02 09:55:20,530 INFO L134 CoverageAnalysis]: Checked inductivity of 615 backedges. 0 proven. 561 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-02 09:55:20,530 INFO L409 AbstractCegarLoop]: Interpolant automaton has 37 states [2018-02-02 09:55:20,530 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 37 interpolants. [2018-02-02 09:55:20,530 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=666, Invalid=666, Unknown=0, NotChecked=0, Total=1332 [2018-02-02 09:55:20,530 INFO L87 Difference]: Start difference. First operand 116 states and 120 transitions. Second operand 37 states. [2018-02-02 09:55:20,557 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:55:20,558 INFO L93 Difference]: Finished difference Result 119 states and 123 transitions. [2018-02-02 09:55:20,558 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 37 states. [2018-02-02 09:55:20,558 INFO L78 Accepts]: Start accepts. Automaton has 37 states. Word has length 111 [2018-02-02 09:55:20,558 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:55:20,558 INFO L225 Difference]: With dead ends: 119 [2018-02-02 09:55:20,558 INFO L226 Difference]: Without dead ends: 117 [2018-02-02 09:55:20,559 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 37 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 66 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=666, Invalid=666, Unknown=0, NotChecked=0, Total=1332 [2018-02-02 09:55:20,559 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 117 states. [2018-02-02 09:55:20,560 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 117 to 117. [2018-02-02 09:55:20,560 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 117 states. [2018-02-02 09:55:20,560 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 117 states to 117 states and 121 transitions. [2018-02-02 09:55:20,560 INFO L78 Accepts]: Start accepts. Automaton has 117 states and 121 transitions. Word has length 111 [2018-02-02 09:55:20,560 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:55:20,560 INFO L432 AbstractCegarLoop]: Abstraction has 117 states and 121 transitions. [2018-02-02 09:55:20,560 INFO L433 AbstractCegarLoop]: Interpolant automaton has 37 states. [2018-02-02 09:55:20,560 INFO L276 IsEmpty]: Start isEmpty. Operand 117 states and 121 transitions. [2018-02-02 09:55:20,560 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 113 [2018-02-02 09:55:20,560 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:55:20,561 INFO L351 BasicCegarLoop]: trace histogram [34, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:55:20,561 INFO L371 AbstractCegarLoop]: === Iteration 54 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-02 09:55:20,561 INFO L82 PathProgramCache]: Analyzing trace with hash -683493056, now seen corresponding path program 34 times [2018-02-02 09:55:20,561 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-02 09:55:20,572 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:55:20,572 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:55:21,023 INFO L134 CoverageAnalysis]: Checked inductivity of 649 backedges. 0 proven. 595 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-02 09:55:21,023 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-02 09:55:21,023 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [38] total 38 [2018-02-02 09:55:21,023 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-02 09:55:21,023 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 09:55:21,023 INFO L182 omatonBuilderFactory]: Interpolants [10752#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 11)), 10753#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 12)), 10754#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 13)), 10755#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 14)), 10756#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 15)), 10757#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 16)), 10758#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 17)), 10759#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 18)), 10760#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 19)), 10761#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 20)), 10762#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 21)), 10763#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 22)), 10764#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 23)), 10765#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 24)), 10766#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 25)), 10767#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 26)), 10768#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 27)), 10769#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 28)), 10770#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 29)), 10771#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 30)), 10772#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 31)), 10773#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 32)), 10774#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 33)), 10775#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 34)), 10776#(not (= |#Ultimate.C_memset_#amount| 94)), 10739#true, 10740#false, 10741#(or (not (= |#Ultimate.C_memset_#amount| 94)) (= |#Ultimate.C_memset_#t~loopctr21| 0)), 10742#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 1)), 10743#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 2)), 10744#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 3)), 10745#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 4)), 10746#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 5)), 10747#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 6)), 10748#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 7)), 10749#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 8)), 10750#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 9)), 10751#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 10))] [2018-02-02 09:55:21,024 INFO L134 CoverageAnalysis]: Checked inductivity of 649 backedges. 0 proven. 595 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-02 09:55:21,024 INFO L409 AbstractCegarLoop]: Interpolant automaton has 38 states [2018-02-02 09:55:21,024 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2018-02-02 09:55:21,024 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=703, Invalid=703, Unknown=0, NotChecked=0, Total=1406 [2018-02-02 09:55:21,024 INFO L87 Difference]: Start difference. First operand 117 states and 121 transitions. Second operand 38 states. [2018-02-02 09:55:21,066 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:55:21,066 INFO L93 Difference]: Finished difference Result 120 states and 124 transitions. [2018-02-02 09:55:21,066 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2018-02-02 09:55:21,066 INFO L78 Accepts]: Start accepts. Automaton has 38 states. Word has length 112 [2018-02-02 09:55:21,066 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:55:21,066 INFO L225 Difference]: With dead ends: 120 [2018-02-02 09:55:21,066 INFO L226 Difference]: Without dead ends: 118 [2018-02-02 09:55:21,067 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 38 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 68 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=703, Invalid=703, Unknown=0, NotChecked=0, Total=1406 [2018-02-02 09:55:21,067 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 118 states. [2018-02-02 09:55:21,068 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 118 to 118. [2018-02-02 09:55:21,068 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 118 states. [2018-02-02 09:55:21,069 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 118 states to 118 states and 122 transitions. [2018-02-02 09:55:21,069 INFO L78 Accepts]: Start accepts. Automaton has 118 states and 122 transitions. Word has length 112 [2018-02-02 09:55:21,069 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:55:21,069 INFO L432 AbstractCegarLoop]: Abstraction has 118 states and 122 transitions. [2018-02-02 09:55:21,069 INFO L433 AbstractCegarLoop]: Interpolant automaton has 38 states. [2018-02-02 09:55:21,069 INFO L276 IsEmpty]: Start isEmpty. Operand 118 states and 122 transitions. [2018-02-02 09:55:21,070 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 114 [2018-02-02 09:55:21,070 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:55:21,070 INFO L351 BasicCegarLoop]: trace histogram [35, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:55:21,070 INFO L371 AbstractCegarLoop]: === Iteration 55 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-02 09:55:21,070 INFO L82 PathProgramCache]: Analyzing trace with hash 1819254419, now seen corresponding path program 35 times [2018-02-02 09:55:21,071 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-02 09:55:21,090 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:55:21,091 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:55:21,701 INFO L134 CoverageAnalysis]: Checked inductivity of 684 backedges. 0 proven. 630 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-02 09:55:21,701 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-02 09:55:21,701 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [39] total 39 [2018-02-02 09:55:21,701 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-02 09:55:21,701 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 09:55:21,702 INFO L182 omatonBuilderFactory]: Interpolants [11015#true, 11016#false, 11017#(or (not (= |#Ultimate.C_memset_#amount| 94)) (= |#Ultimate.C_memset_#t~loopctr21| 0)), 11018#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 1)), 11019#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 2)), 11020#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 3)), 11021#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 4)), 11022#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 5)), 11023#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 6)), 11024#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 7)), 11025#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 8)), 11026#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 9)), 11027#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 10)), 11028#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 11)), 11029#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 12)), 11030#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 13)), 11031#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 14)), 11032#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 15)), 11033#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 16)), 11034#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 17)), 11035#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 18)), 11036#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 19)), 11037#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 20)), 11038#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 21)), 11039#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 22)), 11040#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 23)), 11041#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 24)), 11042#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 25)), 11043#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 26)), 11044#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 27)), 11045#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 28)), 11046#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 29)), 11047#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 30)), 11048#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 31)), 11049#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 32)), 11050#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 33)), 11051#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 34)), 11052#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 35)), 11053#(not (= |#Ultimate.C_memset_#amount| 94))] [2018-02-02 09:55:21,702 INFO L134 CoverageAnalysis]: Checked inductivity of 684 backedges. 0 proven. 630 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-02 09:55:21,702 INFO L409 AbstractCegarLoop]: Interpolant automaton has 39 states [2018-02-02 09:55:21,702 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 39 interpolants. [2018-02-02 09:55:21,702 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=741, Invalid=741, Unknown=0, NotChecked=0, Total=1482 [2018-02-02 09:55:21,703 INFO L87 Difference]: Start difference. First operand 118 states and 122 transitions. Second operand 39 states. [2018-02-02 09:55:21,759 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:55:21,759 INFO L93 Difference]: Finished difference Result 121 states and 125 transitions. [2018-02-02 09:55:21,770 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 39 states. [2018-02-02 09:55:21,771 INFO L78 Accepts]: Start accepts. Automaton has 39 states. Word has length 113 [2018-02-02 09:55:21,771 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:55:21,771 INFO L225 Difference]: With dead ends: 121 [2018-02-02 09:55:21,771 INFO L226 Difference]: Without dead ends: 119 [2018-02-02 09:55:21,772 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 39 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 37 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 70 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=741, Invalid=741, Unknown=0, NotChecked=0, Total=1482 [2018-02-02 09:55:21,772 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 119 states. [2018-02-02 09:55:21,773 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 119 to 119. [2018-02-02 09:55:21,773 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 119 states. [2018-02-02 09:55:21,774 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 119 states to 119 states and 123 transitions. [2018-02-02 09:55:21,774 INFO L78 Accepts]: Start accepts. Automaton has 119 states and 123 transitions. Word has length 113 [2018-02-02 09:55:21,774 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:55:21,774 INFO L432 AbstractCegarLoop]: Abstraction has 119 states and 123 transitions. [2018-02-02 09:55:21,774 INFO L433 AbstractCegarLoop]: Interpolant automaton has 39 states. [2018-02-02 09:55:21,774 INFO L276 IsEmpty]: Start isEmpty. Operand 119 states and 123 transitions. [2018-02-02 09:55:21,775 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 115 [2018-02-02 09:55:21,775 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:55:21,775 INFO L351 BasicCegarLoop]: trace histogram [36, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:55:21,775 INFO L371 AbstractCegarLoop]: === Iteration 56 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-02 09:55:21,775 INFO L82 PathProgramCache]: Analyzing trace with hash 2095014816, now seen corresponding path program 36 times [2018-02-02 09:55:21,776 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-02 09:55:21,793 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:55:21,793 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:55:22,350 INFO L134 CoverageAnalysis]: Checked inductivity of 720 backedges. 0 proven. 666 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-02 09:55:22,350 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-02 09:55:22,351 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [40] total 40 [2018-02-02 09:55:22,351 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-02 09:55:22,351 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 09:55:22,351 INFO L182 omatonBuilderFactory]: Interpolants [11328#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 32)), 11329#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 33)), 11330#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 34)), 11331#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 35)), 11332#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 36)), 11333#(not (= |#Ultimate.C_memset_#amount| 94)), 11294#true, 11295#false, 11296#(or (not (= |#Ultimate.C_memset_#amount| 94)) (= |#Ultimate.C_memset_#t~loopctr21| 0)), 11297#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 1)), 11298#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 2)), 11299#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 3)), 11300#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 4)), 11301#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 5)), 11302#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 6)), 11303#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 7)), 11304#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 8)), 11305#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 9)), 11306#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 10)), 11307#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 11)), 11308#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 12)), 11309#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 13)), 11310#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 14)), 11311#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 15)), 11312#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 16)), 11313#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 17)), 11314#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 18)), 11315#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 19)), 11316#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 20)), 11317#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 21)), 11318#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 22)), 11319#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 23)), 11320#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 24)), 11321#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 25)), 11322#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 26)), 11323#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 27)), 11324#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 28)), 11325#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 29)), 11326#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 30)), 11327#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 31))] [2018-02-02 09:55:22,351 INFO L134 CoverageAnalysis]: Checked inductivity of 720 backedges. 0 proven. 666 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-02 09:55:22,351 INFO L409 AbstractCegarLoop]: Interpolant automaton has 40 states [2018-02-02 09:55:22,351 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 40 interpolants. [2018-02-02 09:55:22,352 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=780, Invalid=780, Unknown=0, NotChecked=0, Total=1560 [2018-02-02 09:55:22,352 INFO L87 Difference]: Start difference. First operand 119 states and 123 transitions. Second operand 40 states. [2018-02-02 09:55:22,375 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:55:22,375 INFO L93 Difference]: Finished difference Result 122 states and 126 transitions. [2018-02-02 09:55:22,376 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 40 states. [2018-02-02 09:55:22,376 INFO L78 Accepts]: Start accepts. Automaton has 40 states. Word has length 114 [2018-02-02 09:55:22,376 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:55:22,376 INFO L225 Difference]: With dead ends: 122 [2018-02-02 09:55:22,376 INFO L226 Difference]: Without dead ends: 120 [2018-02-02 09:55:22,377 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 40 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 38 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 72 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=780, Invalid=780, Unknown=0, NotChecked=0, Total=1560 [2018-02-02 09:55:22,377 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 120 states. [2018-02-02 09:55:22,378 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 120 to 120. [2018-02-02 09:55:22,378 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 120 states. [2018-02-02 09:55:22,378 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 120 states to 120 states and 124 transitions. [2018-02-02 09:55:22,378 INFO L78 Accepts]: Start accepts. Automaton has 120 states and 124 transitions. Word has length 114 [2018-02-02 09:55:22,378 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:55:22,378 INFO L432 AbstractCegarLoop]: Abstraction has 120 states and 124 transitions. [2018-02-02 09:55:22,378 INFO L433 AbstractCegarLoop]: Interpolant automaton has 40 states. [2018-02-02 09:55:22,378 INFO L276 IsEmpty]: Start isEmpty. Operand 120 states and 124 transitions. [2018-02-02 09:55:22,379 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 116 [2018-02-02 09:55:22,379 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:55:22,379 INFO L351 BasicCegarLoop]: trace histogram [37, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:55:22,379 INFO L371 AbstractCegarLoop]: === Iteration 57 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-02 09:55:22,379 INFO L82 PathProgramCache]: Analyzing trace with hash 2053652531, now seen corresponding path program 37 times [2018-02-02 09:55:22,380 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-02 09:55:22,396 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:55:22,397 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:55:23,095 INFO L134 CoverageAnalysis]: Checked inductivity of 757 backedges. 0 proven. 703 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-02 09:55:23,095 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-02 09:55:23,095 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [41] total 41 [2018-02-02 09:55:23,095 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-02 09:55:23,096 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 09:55:23,096 INFO L182 omatonBuilderFactory]: Interpolants [11584#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 6)), 11585#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 7)), 11586#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 8)), 11587#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 9)), 11588#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 10)), 11589#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 11)), 11590#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 12)), 11591#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 13)), 11592#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 14)), 11593#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 15)), 11594#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 16)), 11595#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 17)), 11596#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 18)), 11597#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 19)), 11598#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 20)), 11599#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 21)), 11600#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 22)), 11601#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 23)), 11602#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 24)), 11603#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 25)), 11604#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 26)), 11605#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 27)), 11606#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 28)), 11607#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 29)), 11608#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 30)), 11609#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 31)), 11610#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 32)), 11611#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 33)), 11612#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 34)), 11613#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 35)), 11614#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 36)), 11615#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 37)), 11616#(not (= |#Ultimate.C_memset_#amount| 94)), 11576#true, 11577#false, 11578#(or (not (= |#Ultimate.C_memset_#amount| 94)) (= |#Ultimate.C_memset_#t~loopctr21| 0)), 11579#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 1)), 11580#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 2)), 11581#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 3)), 11582#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 4)), 11583#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 5))] [2018-02-02 09:55:23,096 INFO L134 CoverageAnalysis]: Checked inductivity of 757 backedges. 0 proven. 703 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-02 09:55:23,096 INFO L409 AbstractCegarLoop]: Interpolant automaton has 41 states [2018-02-02 09:55:23,096 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 41 interpolants. [2018-02-02 09:55:23,097 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=820, Invalid=820, Unknown=0, NotChecked=0, Total=1640 [2018-02-02 09:55:23,097 INFO L87 Difference]: Start difference. First operand 120 states and 124 transitions. Second operand 41 states. [2018-02-02 09:55:23,193 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:55:23,193 INFO L93 Difference]: Finished difference Result 123 states and 127 transitions. [2018-02-02 09:55:23,193 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 41 states. [2018-02-02 09:55:23,194 INFO L78 Accepts]: Start accepts. Automaton has 41 states. Word has length 115 [2018-02-02 09:55:23,194 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:55:23,194 INFO L225 Difference]: With dead ends: 123 [2018-02-02 09:55:23,194 INFO L226 Difference]: Without dead ends: 121 [2018-02-02 09:55:23,194 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 41 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 39 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 74 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=820, Invalid=820, Unknown=0, NotChecked=0, Total=1640 [2018-02-02 09:55:23,194 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 121 states. [2018-02-02 09:55:23,195 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 121 to 121. [2018-02-02 09:55:23,195 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 121 states. [2018-02-02 09:55:23,196 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 121 states to 121 states and 125 transitions. [2018-02-02 09:55:23,196 INFO L78 Accepts]: Start accepts. Automaton has 121 states and 125 transitions. Word has length 115 [2018-02-02 09:55:23,196 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:55:23,196 INFO L432 AbstractCegarLoop]: Abstraction has 121 states and 125 transitions. [2018-02-02 09:55:23,196 INFO L433 AbstractCegarLoop]: Interpolant automaton has 41 states. [2018-02-02 09:55:23,196 INFO L276 IsEmpty]: Start isEmpty. Operand 121 states and 125 transitions. [2018-02-02 09:55:23,196 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 117 [2018-02-02 09:55:23,197 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:55:23,197 INFO L351 BasicCegarLoop]: trace histogram [38, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:55:23,197 INFO L371 AbstractCegarLoop]: === Iteration 58 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-02 09:55:23,197 INFO L82 PathProgramCache]: Analyzing trace with hash 771421696, now seen corresponding path program 38 times [2018-02-02 09:55:23,197 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-02 09:55:23,212 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:55:23,213 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:55:23,784 INFO L134 CoverageAnalysis]: Checked inductivity of 795 backedges. 0 proven. 741 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-02 09:55:23,784 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-02 09:55:23,784 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [42] total 42 [2018-02-02 09:55:23,784 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-02 09:55:23,785 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 09:55:23,785 INFO L182 omatonBuilderFactory]: Interpolants [11861#true, 11862#false, 11863#(or (not (= |#Ultimate.C_memset_#amount| 94)) (= |#Ultimate.C_memset_#t~loopctr21| 0)), 11864#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 1)), 11865#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 2)), 11866#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 3)), 11867#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 4)), 11868#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 5)), 11869#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 6)), 11870#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 7)), 11871#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 8)), 11872#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 9)), 11873#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 10)), 11874#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 11)), 11875#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 12)), 11876#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 13)), 11877#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 14)), 11878#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 15)), 11879#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 16)), 11880#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 17)), 11881#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 18)), 11882#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 19)), 11883#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 20)), 11884#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 21)), 11885#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 22)), 11886#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 23)), 11887#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 24)), 11888#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 25)), 11889#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 26)), 11890#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 27)), 11891#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 28)), 11892#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 29)), 11893#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 30)), 11894#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 31)), 11895#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 32)), 11896#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 33)), 11897#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 34)), 11898#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 35)), 11899#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 36)), 11900#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 37)), 11901#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 38)), 11902#(not (= |#Ultimate.C_memset_#amount| 94))] [2018-02-02 09:55:23,785 INFO L134 CoverageAnalysis]: Checked inductivity of 795 backedges. 0 proven. 741 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-02 09:55:23,785 INFO L409 AbstractCegarLoop]: Interpolant automaton has 42 states [2018-02-02 09:55:23,785 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 42 interpolants. [2018-02-02 09:55:23,785 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=861, Invalid=861, Unknown=0, NotChecked=0, Total=1722 [2018-02-02 09:55:23,785 INFO L87 Difference]: Start difference. First operand 121 states and 125 transitions. Second operand 42 states. [2018-02-02 09:55:23,846 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:55:23,846 INFO L93 Difference]: Finished difference Result 124 states and 128 transitions. [2018-02-02 09:55:23,847 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 42 states. [2018-02-02 09:55:23,847 INFO L78 Accepts]: Start accepts. Automaton has 42 states. Word has length 116 [2018-02-02 09:55:23,847 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:55:23,847 INFO L225 Difference]: With dead ends: 124 [2018-02-02 09:55:23,847 INFO L226 Difference]: Without dead ends: 122 [2018-02-02 09:55:23,848 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 42 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 76 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=861, Invalid=861, Unknown=0, NotChecked=0, Total=1722 [2018-02-02 09:55:23,848 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 122 states. [2018-02-02 09:55:23,849 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 122 to 122. [2018-02-02 09:55:23,849 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 122 states. [2018-02-02 09:55:23,849 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 122 states to 122 states and 126 transitions. [2018-02-02 09:55:23,849 INFO L78 Accepts]: Start accepts. Automaton has 122 states and 126 transitions. Word has length 116 [2018-02-02 09:55:23,849 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:55:23,849 INFO L432 AbstractCegarLoop]: Abstraction has 122 states and 126 transitions. [2018-02-02 09:55:23,849 INFO L433 AbstractCegarLoop]: Interpolant automaton has 42 states. [2018-02-02 09:55:23,849 INFO L276 IsEmpty]: Start isEmpty. Operand 122 states and 126 transitions. [2018-02-02 09:55:23,849 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 118 [2018-02-02 09:55:23,849 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:55:23,850 INFO L351 BasicCegarLoop]: trace histogram [39, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:55:23,850 INFO L371 AbstractCegarLoop]: === Iteration 59 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-02 09:55:23,850 INFO L82 PathProgramCache]: Analyzing trace with hash -323028525, now seen corresponding path program 39 times [2018-02-02 09:55:23,850 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-02 09:55:23,862 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:55:23,862 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:55:24,392 INFO L134 CoverageAnalysis]: Checked inductivity of 834 backedges. 0 proven. 780 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-02 09:55:24,392 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-02 09:55:24,392 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [43] total 43 [2018-02-02 09:55:24,392 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-02 09:55:24,393 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 09:55:24,393 INFO L182 omatonBuilderFactory]: Interpolants [12160#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 9)), 12161#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 10)), 12162#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 11)), 12163#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 12)), 12164#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 13)), 12165#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 14)), 12166#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 15)), 12167#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 16)), 12168#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 17)), 12169#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 18)), 12170#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 19)), 12171#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 20)), 12172#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 21)), 12173#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 22)), 12174#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 23)), 12175#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 24)), 12176#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 25)), 12177#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 26)), 12178#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 27)), 12179#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 28)), 12180#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 29)), 12181#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 30)), 12182#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 31)), 12183#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 32)), 12184#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 33)), 12185#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 34)), 12186#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 35)), 12187#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 36)), 12188#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 37)), 12189#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 38)), 12190#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 39)), 12191#(not (= |#Ultimate.C_memset_#amount| 94)), 12149#true, 12150#false, 12151#(or (not (= |#Ultimate.C_memset_#amount| 94)) (= |#Ultimate.C_memset_#t~loopctr21| 0)), 12152#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 1)), 12153#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 2)), 12154#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 3)), 12155#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 4)), 12156#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 5)), 12157#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 6)), 12158#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 7)), 12159#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 8))] [2018-02-02 09:55:24,393 INFO L134 CoverageAnalysis]: Checked inductivity of 834 backedges. 0 proven. 780 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-02 09:55:24,393 INFO L409 AbstractCegarLoop]: Interpolant automaton has 43 states [2018-02-02 09:55:24,393 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 43 interpolants. [2018-02-02 09:55:24,393 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=903, Invalid=903, Unknown=0, NotChecked=0, Total=1806 [2018-02-02 09:55:24,393 INFO L87 Difference]: Start difference. First operand 122 states and 126 transitions. Second operand 43 states. [2018-02-02 09:55:24,447 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:55:24,447 INFO L93 Difference]: Finished difference Result 125 states and 129 transitions. [2018-02-02 09:55:24,462 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 43 states. [2018-02-02 09:55:24,463 INFO L78 Accepts]: Start accepts. Automaton has 43 states. Word has length 117 [2018-02-02 09:55:24,463 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:55:24,463 INFO L225 Difference]: With dead ends: 125 [2018-02-02 09:55:24,463 INFO L226 Difference]: Without dead ends: 123 [2018-02-02 09:55:24,464 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 43 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 41 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 78 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=903, Invalid=903, Unknown=0, NotChecked=0, Total=1806 [2018-02-02 09:55:24,464 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 123 states. [2018-02-02 09:55:24,466 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 123 to 123. [2018-02-02 09:55:24,466 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 123 states. [2018-02-02 09:55:24,466 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 123 states to 123 states and 127 transitions. [2018-02-02 09:55:24,466 INFO L78 Accepts]: Start accepts. Automaton has 123 states and 127 transitions. Word has length 117 [2018-02-02 09:55:24,466 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:55:24,466 INFO L432 AbstractCegarLoop]: Abstraction has 123 states and 127 transitions. [2018-02-02 09:55:24,466 INFO L433 AbstractCegarLoop]: Interpolant automaton has 43 states. [2018-02-02 09:55:24,467 INFO L276 IsEmpty]: Start isEmpty. Operand 123 states and 127 transitions. [2018-02-02 09:55:24,467 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 119 [2018-02-02 09:55:24,467 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:55:24,467 INFO L351 BasicCegarLoop]: trace histogram [40, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:55:24,467 INFO L371 AbstractCegarLoop]: === Iteration 60 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-02 09:55:24,467 INFO L82 PathProgramCache]: Analyzing trace with hash 108752992, now seen corresponding path program 40 times [2018-02-02 09:55:24,468 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-02 09:55:24,490 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:55:24,491 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:55:25,090 INFO L134 CoverageAnalysis]: Checked inductivity of 874 backedges. 0 proven. 820 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-02 09:55:25,090 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-02 09:55:25,090 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [44] total 44 [2018-02-02 09:55:25,090 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-02 09:55:25,090 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 09:55:25,090 INFO L182 omatonBuilderFactory]: Interpolants [12480#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 38)), 12481#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 39)), 12482#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 40)), 12483#(not (= |#Ultimate.C_memset_#amount| 94)), 12440#true, 12441#false, 12442#(or (not (= |#Ultimate.C_memset_#amount| 94)) (= |#Ultimate.C_memset_#t~loopctr21| 0)), 12443#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 1)), 12444#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 2)), 12445#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 3)), 12446#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 4)), 12447#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 5)), 12448#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 6)), 12449#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 7)), 12450#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 8)), 12451#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 9)), 12452#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 10)), 12453#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 11)), 12454#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 12)), 12455#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 13)), 12456#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 14)), 12457#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 15)), 12458#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 16)), 12459#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 17)), 12460#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 18)), 12461#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 19)), 12462#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 20)), 12463#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 21)), 12464#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 22)), 12465#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 23)), 12466#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 24)), 12467#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 25)), 12468#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 26)), 12469#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 27)), 12470#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 28)), 12471#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 29)), 12472#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 30)), 12473#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 31)), 12474#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 32)), 12475#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 33)), 12476#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 34)), 12477#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 35)), 12478#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 36)), 12479#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 37))] [2018-02-02 09:55:25,090 INFO L134 CoverageAnalysis]: Checked inductivity of 874 backedges. 0 proven. 820 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-02 09:55:25,091 INFO L409 AbstractCegarLoop]: Interpolant automaton has 44 states [2018-02-02 09:55:25,091 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 44 interpolants. [2018-02-02 09:55:25,091 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=946, Invalid=946, Unknown=0, NotChecked=0, Total=1892 [2018-02-02 09:55:25,091 INFO L87 Difference]: Start difference. First operand 123 states and 127 transitions. Second operand 44 states. [2018-02-02 09:55:25,117 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:55:25,117 INFO L93 Difference]: Finished difference Result 126 states and 130 transitions. [2018-02-02 09:55:25,123 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 44 states. [2018-02-02 09:55:25,123 INFO L78 Accepts]: Start accepts. Automaton has 44 states. Word has length 118 [2018-02-02 09:55:25,123 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:55:25,124 INFO L225 Difference]: With dead ends: 126 [2018-02-02 09:55:25,124 INFO L226 Difference]: Without dead ends: 124 [2018-02-02 09:55:25,124 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 44 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 42 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 80 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=946, Invalid=946, Unknown=0, NotChecked=0, Total=1892 [2018-02-02 09:55:25,124 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 124 states. [2018-02-02 09:55:25,126 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 124 to 124. [2018-02-02 09:55:25,126 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 124 states. [2018-02-02 09:55:25,126 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 124 states to 124 states and 128 transitions. [2018-02-02 09:55:25,126 INFO L78 Accepts]: Start accepts. Automaton has 124 states and 128 transitions. Word has length 118 [2018-02-02 09:55:25,127 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:55:25,127 INFO L432 AbstractCegarLoop]: Abstraction has 124 states and 128 transitions. [2018-02-02 09:55:25,127 INFO L433 AbstractCegarLoop]: Interpolant automaton has 44 states. [2018-02-02 09:55:25,127 INFO L276 IsEmpty]: Start isEmpty. Operand 124 states and 128 transitions. [2018-02-02 09:55:25,127 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 120 [2018-02-02 09:55:25,127 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:55:25,128 INFO L351 BasicCegarLoop]: trace histogram [41, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:55:25,128 INFO L371 AbstractCegarLoop]: === Iteration 61 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-02 09:55:25,128 INFO L82 PathProgramCache]: Analyzing trace with hash 609078131, now seen corresponding path program 41 times [2018-02-02 09:55:25,128 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-02 09:55:25,149 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:55:25,150 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:55:25,861 INFO L134 CoverageAnalysis]: Checked inductivity of 915 backedges. 0 proven. 861 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-02 09:55:25,861 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-02 09:55:25,861 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [45] total 45 [2018-02-02 09:55:25,862 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-02 09:55:25,862 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 09:55:25,862 INFO L182 omatonBuilderFactory]: Interpolants [12736#(or (not (= |#Ultimate.C_memset_#amount| 94)) (= |#Ultimate.C_memset_#t~loopctr21| 0)), 12737#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 1)), 12738#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 2)), 12739#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 3)), 12740#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 4)), 12741#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 5)), 12742#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 6)), 12743#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 7)), 12744#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 8)), 12745#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 9)), 12746#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 10)), 12747#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 11)), 12748#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 12)), 12749#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 13)), 12750#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 14)), 12751#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 15)), 12752#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 16)), 12753#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 17)), 12754#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 18)), 12755#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 19)), 12756#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 20)), 12757#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 21)), 12758#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 22)), 12759#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 23)), 12760#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 24)), 12761#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 25)), 12762#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 26)), 12763#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 27)), 12764#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 28)), 12765#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 29)), 12766#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 30)), 12767#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 31)), 12768#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 32)), 12769#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 33)), 12770#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 34)), 12771#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 35)), 12772#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 36)), 12773#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 37)), 12774#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 38)), 12775#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 39)), 12776#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 40)), 12777#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 41)), 12778#(not (= |#Ultimate.C_memset_#amount| 94)), 12734#true, 12735#false] [2018-02-02 09:55:25,862 INFO L134 CoverageAnalysis]: Checked inductivity of 915 backedges. 0 proven. 861 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-02 09:55:25,862 INFO L409 AbstractCegarLoop]: Interpolant automaton has 45 states [2018-02-02 09:55:25,862 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 45 interpolants. [2018-02-02 09:55:25,862 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=990, Invalid=990, Unknown=0, NotChecked=0, Total=1980 [2018-02-02 09:55:25,862 INFO L87 Difference]: Start difference. First operand 124 states and 128 transitions. Second operand 45 states. [2018-02-02 09:55:25,929 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:55:25,929 INFO L93 Difference]: Finished difference Result 127 states and 131 transitions. [2018-02-02 09:55:25,930 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 45 states. [2018-02-02 09:55:25,930 INFO L78 Accepts]: Start accepts. Automaton has 45 states. Word has length 119 [2018-02-02 09:55:25,930 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:55:25,930 INFO L225 Difference]: With dead ends: 127 [2018-02-02 09:55:25,930 INFO L226 Difference]: Without dead ends: 125 [2018-02-02 09:55:25,931 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 45 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 43 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 82 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=990, Invalid=990, Unknown=0, NotChecked=0, Total=1980 [2018-02-02 09:55:25,931 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 125 states. [2018-02-02 09:55:25,932 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 125 to 125. [2018-02-02 09:55:25,932 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 125 states. [2018-02-02 09:55:25,933 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 125 states to 125 states and 129 transitions. [2018-02-02 09:55:25,933 INFO L78 Accepts]: Start accepts. Automaton has 125 states and 129 transitions. Word has length 119 [2018-02-02 09:55:25,933 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:55:25,933 INFO L432 AbstractCegarLoop]: Abstraction has 125 states and 129 transitions. [2018-02-02 09:55:25,933 INFO L433 AbstractCegarLoop]: Interpolant automaton has 45 states. [2018-02-02 09:55:25,933 INFO L276 IsEmpty]: Start isEmpty. Operand 125 states and 129 transitions. [2018-02-02 09:55:25,934 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 121 [2018-02-02 09:55:25,934 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:55:25,934 INFO L351 BasicCegarLoop]: trace histogram [42, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:55:25,934 INFO L371 AbstractCegarLoop]: === Iteration 62 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-02 09:55:25,934 INFO L82 PathProgramCache]: Analyzing trace with hash -1060711744, now seen corresponding path program 42 times [2018-02-02 09:55:25,935 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-02 09:55:25,955 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:55:25,956 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:55:26,782 INFO L134 CoverageAnalysis]: Checked inductivity of 957 backedges. 0 proven. 903 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-02 09:55:26,782 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-02 09:55:26,783 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [46] total 46 [2018-02-02 09:55:26,783 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-02 09:55:26,783 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 09:55:26,783 INFO L182 omatonBuilderFactory]: Interpolants [13056#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 23)), 13057#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 24)), 13058#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 25)), 13059#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 26)), 13060#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 27)), 13061#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 28)), 13062#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 29)), 13063#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 30)), 13064#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 31)), 13065#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 32)), 13066#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 33)), 13067#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 34)), 13068#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 35)), 13069#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 36)), 13070#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 37)), 13071#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 38)), 13072#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 39)), 13073#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 40)), 13074#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 41)), 13075#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 42)), 13076#(not (= |#Ultimate.C_memset_#amount| 94)), 13031#true, 13032#false, 13033#(or (not (= |#Ultimate.C_memset_#amount| 94)) (= |#Ultimate.C_memset_#t~loopctr21| 0)), 13034#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 1)), 13035#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 2)), 13036#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 3)), 13037#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 4)), 13038#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 5)), 13039#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 6)), 13040#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 7)), 13041#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 8)), 13042#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 9)), 13043#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 10)), 13044#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 11)), 13045#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 12)), 13046#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 13)), 13047#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 14)), 13048#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 15)), 13049#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 16)), 13050#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 17)), 13051#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 18)), 13052#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 19)), 13053#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 20)), 13054#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 21)), 13055#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 22))] [2018-02-02 09:55:26,783 INFO L134 CoverageAnalysis]: Checked inductivity of 957 backedges. 0 proven. 903 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-02 09:55:26,784 INFO L409 AbstractCegarLoop]: Interpolant automaton has 46 states [2018-02-02 09:55:26,784 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 46 interpolants. [2018-02-02 09:55:26,784 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1035, Invalid=1035, Unknown=0, NotChecked=0, Total=2070 [2018-02-02 09:55:26,784 INFO L87 Difference]: Start difference. First operand 125 states and 129 transitions. Second operand 46 states. [2018-02-02 09:55:26,850 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:55:26,850 INFO L93 Difference]: Finished difference Result 128 states and 132 transitions. [2018-02-02 09:55:26,851 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 46 states. [2018-02-02 09:55:26,851 INFO L78 Accepts]: Start accepts. Automaton has 46 states. Word has length 120 [2018-02-02 09:55:26,851 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:55:26,851 INFO L225 Difference]: With dead ends: 128 [2018-02-02 09:55:26,852 INFO L226 Difference]: Without dead ends: 126 [2018-02-02 09:55:26,852 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 46 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 44 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 84 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=1035, Invalid=1035, Unknown=0, NotChecked=0, Total=2070 [2018-02-02 09:55:26,852 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 126 states. [2018-02-02 09:55:26,853 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 126 to 126. [2018-02-02 09:55:26,853 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 126 states. [2018-02-02 09:55:26,854 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 126 states to 126 states and 130 transitions. [2018-02-02 09:55:26,854 INFO L78 Accepts]: Start accepts. Automaton has 126 states and 130 transitions. Word has length 120 [2018-02-02 09:55:26,854 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:55:26,854 INFO L432 AbstractCegarLoop]: Abstraction has 126 states and 130 transitions. [2018-02-02 09:55:26,854 INFO L433 AbstractCegarLoop]: Interpolant automaton has 46 states. [2018-02-02 09:55:26,854 INFO L276 IsEmpty]: Start isEmpty. Operand 126 states and 130 transitions. [2018-02-02 09:55:26,854 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 122 [2018-02-02 09:55:26,854 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:55:26,855 INFO L351 BasicCegarLoop]: trace histogram [43, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:55:26,855 INFO L371 AbstractCegarLoop]: === Iteration 63 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-02 09:55:26,855 INFO L82 PathProgramCache]: Analyzing trace with hash -1284590317, now seen corresponding path program 43 times [2018-02-02 09:55:26,855 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-02 09:55:26,877 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:55:26,878 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:55:27,463 INFO L134 CoverageAnalysis]: Checked inductivity of 1000 backedges. 0 proven. 946 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-02 09:55:27,464 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-02 09:55:27,464 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [47] total 47 [2018-02-02 09:55:27,464 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-02 09:55:27,464 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 09:55:27,465 INFO L182 omatonBuilderFactory]: Interpolants [13376#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 43)), 13377#(not (= |#Ultimate.C_memset_#amount| 94)), 13331#true, 13332#false, 13333#(or (not (= |#Ultimate.C_memset_#amount| 94)) (= |#Ultimate.C_memset_#t~loopctr21| 0)), 13334#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 1)), 13335#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 2)), 13336#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 3)), 13337#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 4)), 13338#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 5)), 13339#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 6)), 13340#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 7)), 13341#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 8)), 13342#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 9)), 13343#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 10)), 13344#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 11)), 13345#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 12)), 13346#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 13)), 13347#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 14)), 13348#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 15)), 13349#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 16)), 13350#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 17)), 13351#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 18)), 13352#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 19)), 13353#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 20)), 13354#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 21)), 13355#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 22)), 13356#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 23)), 13357#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 24)), 13358#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 25)), 13359#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 26)), 13360#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 27)), 13361#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 28)), 13362#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 29)), 13363#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 30)), 13364#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 31)), 13365#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 32)), 13366#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 33)), 13367#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 34)), 13368#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 35)), 13369#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 36)), 13370#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 37)), 13371#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 38)), 13372#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 39)), 13373#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 40)), 13374#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 41)), 13375#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 42))] [2018-02-02 09:55:27,465 INFO L134 CoverageAnalysis]: Checked inductivity of 1000 backedges. 0 proven. 946 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-02 09:55:27,465 INFO L409 AbstractCegarLoop]: Interpolant automaton has 47 states [2018-02-02 09:55:27,465 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 47 interpolants. [2018-02-02 09:55:27,466 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1081, Invalid=1081, Unknown=0, NotChecked=0, Total=2162 [2018-02-02 09:55:27,466 INFO L87 Difference]: Start difference. First operand 126 states and 130 transitions. Second operand 47 states. [2018-02-02 09:55:27,507 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:55:27,508 INFO L93 Difference]: Finished difference Result 129 states and 133 transitions. [2018-02-02 09:55:27,508 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 47 states. [2018-02-02 09:55:27,508 INFO L78 Accepts]: Start accepts. Automaton has 47 states. Word has length 121 [2018-02-02 09:55:27,508 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:55:27,509 INFO L225 Difference]: With dead ends: 129 [2018-02-02 09:55:27,509 INFO L226 Difference]: Without dead ends: 127 [2018-02-02 09:55:27,509 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 47 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 45 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 86 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=1081, Invalid=1081, Unknown=0, NotChecked=0, Total=2162 [2018-02-02 09:55:27,509 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 127 states. [2018-02-02 09:55:27,511 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 127 to 127. [2018-02-02 09:55:27,511 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 127 states. [2018-02-02 09:55:27,511 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 127 states to 127 states and 131 transitions. [2018-02-02 09:55:27,511 INFO L78 Accepts]: Start accepts. Automaton has 127 states and 131 transitions. Word has length 121 [2018-02-02 09:55:27,511 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:55:27,511 INFO L432 AbstractCegarLoop]: Abstraction has 127 states and 131 transitions. [2018-02-02 09:55:27,512 INFO L433 AbstractCegarLoop]: Interpolant automaton has 47 states. [2018-02-02 09:55:27,512 INFO L276 IsEmpty]: Start isEmpty. Operand 127 states and 131 transitions. [2018-02-02 09:55:27,512 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 123 [2018-02-02 09:55:27,512 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:55:27,512 INFO L351 BasicCegarLoop]: trace histogram [44, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:55:27,512 INFO L371 AbstractCegarLoop]: === Iteration 64 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-02 09:55:27,513 INFO L82 PathProgramCache]: Analyzing trace with hash 365108512, now seen corresponding path program 44 times [2018-02-02 09:55:27,513 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-02 09:55:27,536 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:55:27,537 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:55:28,281 INFO L134 CoverageAnalysis]: Checked inductivity of 1044 backedges. 0 proven. 990 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-02 09:55:28,282 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-02 09:55:28,282 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [48] total 48 [2018-02-02 09:55:28,282 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-02 09:55:28,282 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 09:55:28,282 INFO L182 omatonBuilderFactory]: Interpolants [13634#true, 13635#false, 13636#(or (not (= |#Ultimate.C_memset_#amount| 94)) (= |#Ultimate.C_memset_#t~loopctr21| 0)), 13637#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 1)), 13638#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 2)), 13639#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 3)), 13640#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 4)), 13641#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 5)), 13642#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 6)), 13643#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 7)), 13644#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 8)), 13645#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 9)), 13646#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 10)), 13647#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 11)), 13648#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 12)), 13649#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 13)), 13650#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 14)), 13651#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 15)), 13652#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 16)), 13653#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 17)), 13654#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 18)), 13655#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 19)), 13656#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 20)), 13657#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 21)), 13658#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 22)), 13659#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 23)), 13660#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 24)), 13661#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 25)), 13662#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 26)), 13663#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 27)), 13664#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 28)), 13665#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 29)), 13666#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 30)), 13667#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 31)), 13668#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 32)), 13669#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 33)), 13670#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 34)), 13671#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 35)), 13672#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 36)), 13673#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 37)), 13674#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 38)), 13675#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 39)), 13676#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 40)), 13677#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 41)), 13678#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 42)), 13679#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 43)), 13680#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 44)), 13681#(not (= |#Ultimate.C_memset_#amount| 94))] [2018-02-02 09:55:28,282 INFO L134 CoverageAnalysis]: Checked inductivity of 1044 backedges. 0 proven. 990 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-02 09:55:28,282 INFO L409 AbstractCegarLoop]: Interpolant automaton has 48 states [2018-02-02 09:55:28,283 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 48 interpolants. [2018-02-02 09:55:28,283 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1128, Invalid=1128, Unknown=0, NotChecked=0, Total=2256 [2018-02-02 09:55:28,283 INFO L87 Difference]: Start difference. First operand 127 states and 131 transitions. Second operand 48 states. [2018-02-02 09:55:28,345 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:55:28,345 INFO L93 Difference]: Finished difference Result 130 states and 134 transitions. [2018-02-02 09:55:28,346 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 48 states. [2018-02-02 09:55:28,347 INFO L78 Accepts]: Start accepts. Automaton has 48 states. Word has length 122 [2018-02-02 09:55:28,347 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:55:28,347 INFO L225 Difference]: With dead ends: 130 [2018-02-02 09:55:28,347 INFO L226 Difference]: Without dead ends: 128 [2018-02-02 09:55:28,347 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 48 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 88 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=1128, Invalid=1128, Unknown=0, NotChecked=0, Total=2256 [2018-02-02 09:55:28,347 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 128 states. [2018-02-02 09:55:28,349 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 128 to 128. [2018-02-02 09:55:28,349 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 128 states. [2018-02-02 09:55:28,349 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 128 states to 128 states and 132 transitions. [2018-02-02 09:55:28,349 INFO L78 Accepts]: Start accepts. Automaton has 128 states and 132 transitions. Word has length 122 [2018-02-02 09:55:28,349 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:55:28,350 INFO L432 AbstractCegarLoop]: Abstraction has 128 states and 132 transitions. [2018-02-02 09:55:28,350 INFO L433 AbstractCegarLoop]: Interpolant automaton has 48 states. [2018-02-02 09:55:28,350 INFO L276 IsEmpty]: Start isEmpty. Operand 128 states and 132 transitions. [2018-02-02 09:55:28,350 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 124 [2018-02-02 09:55:28,350 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:55:28,351 INFO L351 BasicCegarLoop]: trace histogram [45, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:55:28,351 INFO L371 AbstractCegarLoop]: === Iteration 65 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-02 09:55:28,351 INFO L82 PathProgramCache]: Analyzing trace with hash -33835341, now seen corresponding path program 45 times [2018-02-02 09:55:28,351 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-02 09:55:28,375 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:55:28,375 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:55:29,037 INFO L134 CoverageAnalysis]: Checked inductivity of 1089 backedges. 0 proven. 1035 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-02 09:55:29,037 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-02 09:55:29,037 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [49] total 49 [2018-02-02 09:55:29,037 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-02 09:55:29,037 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 09:55:29,037 INFO L182 omatonBuilderFactory]: Interpolants [13952#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 10)), 13953#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 11)), 13954#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 12)), 13955#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 13)), 13956#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 14)), 13957#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 15)), 13958#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 16)), 13959#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 17)), 13960#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 18)), 13961#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 19)), 13962#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 20)), 13963#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 21)), 13964#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 22)), 13965#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 23)), 13966#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 24)), 13967#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 25)), 13968#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 26)), 13969#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 27)), 13970#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 28)), 13971#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 29)), 13972#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 30)), 13973#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 31)), 13974#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 32)), 13975#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 33)), 13976#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 34)), 13977#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 35)), 13978#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 36)), 13979#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 37)), 13980#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 38)), 13981#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 39)), 13982#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 40)), 13983#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 41)), 13984#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 42)), 13985#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 43)), 13986#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 44)), 13987#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 45)), 13988#(not (= |#Ultimate.C_memset_#amount| 94)), 13940#true, 13941#false, 13942#(or (not (= |#Ultimate.C_memset_#amount| 94)) (= |#Ultimate.C_memset_#t~loopctr21| 0)), 13943#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 1)), 13944#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 2)), 13945#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 3)), 13946#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 4)), 13947#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 5)), 13948#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 6)), 13949#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 7)), 13950#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 8)), 13951#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 9))] [2018-02-02 09:55:29,038 INFO L134 CoverageAnalysis]: Checked inductivity of 1089 backedges. 0 proven. 1035 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-02 09:55:29,038 INFO L409 AbstractCegarLoop]: Interpolant automaton has 49 states [2018-02-02 09:55:29,038 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 49 interpolants. [2018-02-02 09:55:29,039 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1176, Invalid=1176, Unknown=0, NotChecked=0, Total=2352 [2018-02-02 09:55:29,039 INFO L87 Difference]: Start difference. First operand 128 states and 132 transitions. Second operand 49 states. [2018-02-02 09:55:29,121 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:55:29,122 INFO L93 Difference]: Finished difference Result 131 states and 135 transitions. [2018-02-02 09:55:29,122 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 49 states. [2018-02-02 09:55:29,122 INFO L78 Accepts]: Start accepts. Automaton has 49 states. Word has length 123 [2018-02-02 09:55:29,122 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:55:29,122 INFO L225 Difference]: With dead ends: 131 [2018-02-02 09:55:29,122 INFO L226 Difference]: Without dead ends: 129 [2018-02-02 09:55:29,123 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 49 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 47 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 90 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=1176, Invalid=1176, Unknown=0, NotChecked=0, Total=2352 [2018-02-02 09:55:29,123 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 129 states. [2018-02-02 09:55:29,124 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 129 to 129. [2018-02-02 09:55:29,125 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 129 states. [2018-02-02 09:55:29,125 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 129 states to 129 states and 133 transitions. [2018-02-02 09:55:29,125 INFO L78 Accepts]: Start accepts. Automaton has 129 states and 133 transitions. Word has length 123 [2018-02-02 09:55:29,125 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:55:29,125 INFO L432 AbstractCegarLoop]: Abstraction has 129 states and 133 transitions. [2018-02-02 09:55:29,125 INFO L433 AbstractCegarLoop]: Interpolant automaton has 49 states. [2018-02-02 09:55:29,125 INFO L276 IsEmpty]: Start isEmpty. Operand 129 states and 133 transitions. [2018-02-02 09:55:29,126 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 125 [2018-02-02 09:55:29,126 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:55:29,126 INFO L351 BasicCegarLoop]: trace histogram [46, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:55:29,126 INFO L371 AbstractCegarLoop]: === Iteration 66 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-02 09:55:29,126 INFO L82 PathProgramCache]: Analyzing trace with hash 483807104, now seen corresponding path program 46 times [2018-02-02 09:55:29,127 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-02 09:55:29,150 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:55:29,152 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:55:29,936 INFO L134 CoverageAnalysis]: Checked inductivity of 1135 backedges. 0 proven. 1081 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-02 09:55:29,936 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-02 09:55:29,936 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [50] total 50 [2018-02-02 09:55:29,936 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-02 09:55:29,937 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 09:55:29,937 INFO L182 omatonBuilderFactory]: Interpolants [14249#true, 14250#false, 14251#(or (not (= |#Ultimate.C_memset_#amount| 94)) (= |#Ultimate.C_memset_#t~loopctr21| 0)), 14252#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 1)), 14253#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 2)), 14254#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 3)), 14255#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 4)), 14256#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 5)), 14257#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 6)), 14258#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 7)), 14259#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 8)), 14260#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 9)), 14261#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 10)), 14262#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 11)), 14263#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 12)), 14264#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 13)), 14265#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 14)), 14266#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 15)), 14267#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 16)), 14268#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 17)), 14269#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 18)), 14270#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 19)), 14271#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 20)), 14272#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 21)), 14273#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 22)), 14274#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 23)), 14275#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 24)), 14276#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 25)), 14277#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 26)), 14278#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 27)), 14279#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 28)), 14280#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 29)), 14281#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 30)), 14282#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 31)), 14283#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 32)), 14284#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 33)), 14285#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 34)), 14286#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 35)), 14287#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 36)), 14288#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 37)), 14289#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 38)), 14290#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 39)), 14291#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 40)), 14292#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 41)), 14293#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 42)), 14294#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 43)), 14295#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 44)), 14296#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 45)), 14297#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 46)), 14298#(not (= |#Ultimate.C_memset_#amount| 94))] [2018-02-02 09:55:29,937 INFO L134 CoverageAnalysis]: Checked inductivity of 1135 backedges. 0 proven. 1081 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-02 09:55:29,937 INFO L409 AbstractCegarLoop]: Interpolant automaton has 50 states [2018-02-02 09:55:29,937 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 50 interpolants. [2018-02-02 09:55:29,937 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1225, Invalid=1225, Unknown=0, NotChecked=0, Total=2450 [2018-02-02 09:55:29,938 INFO L87 Difference]: Start difference. First operand 129 states and 133 transitions. Second operand 50 states. [2018-02-02 09:55:29,991 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:55:29,991 INFO L93 Difference]: Finished difference Result 132 states and 136 transitions. [2018-02-02 09:55:29,992 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 50 states. [2018-02-02 09:55:29,992 INFO L78 Accepts]: Start accepts. Automaton has 50 states. Word has length 124 [2018-02-02 09:55:29,992 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:55:29,992 INFO L225 Difference]: With dead ends: 132 [2018-02-02 09:55:29,992 INFO L226 Difference]: Without dead ends: 130 [2018-02-02 09:55:29,992 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 50 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 48 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 92 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=1225, Invalid=1225, Unknown=0, NotChecked=0, Total=2450 [2018-02-02 09:55:29,992 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 130 states. [2018-02-02 09:55:29,993 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 130 to 130. [2018-02-02 09:55:29,993 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 130 states. [2018-02-02 09:55:29,994 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 130 states to 130 states and 134 transitions. [2018-02-02 09:55:29,994 INFO L78 Accepts]: Start accepts. Automaton has 130 states and 134 transitions. Word has length 124 [2018-02-02 09:55:29,994 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:55:29,994 INFO L432 AbstractCegarLoop]: Abstraction has 130 states and 134 transitions. [2018-02-02 09:55:29,994 INFO L433 AbstractCegarLoop]: Interpolant automaton has 50 states. [2018-02-02 09:55:29,994 INFO L276 IsEmpty]: Start isEmpty. Operand 130 states and 134 transitions. [2018-02-02 09:55:29,994 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 126 [2018-02-02 09:55:29,994 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:55:29,994 INFO L351 BasicCegarLoop]: trace histogram [47, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:55:29,994 INFO L371 AbstractCegarLoop]: === Iteration 67 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-02 09:55:29,995 INFO L82 PathProgramCache]: Analyzing trace with hash -649146285, now seen corresponding path program 47 times [2018-02-02 09:55:29,995 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-02 09:55:30,010 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:55:30,010 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:55:30,828 INFO L134 CoverageAnalysis]: Checked inductivity of 1182 backedges. 0 proven. 1128 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-02 09:55:30,828 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-02 09:55:30,829 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [51] total 51 [2018-02-02 09:55:30,829 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-02 09:55:30,829 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 09:55:30,829 INFO L182 omatonBuilderFactory]: Interpolants [14592#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 29)), 14593#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 30)), 14594#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 31)), 14595#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 32)), 14596#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 33)), 14597#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 34)), 14598#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 35)), 14599#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 36)), 14600#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 37)), 14601#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 38)), 14602#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 39)), 14603#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 40)), 14604#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 41)), 14605#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 42)), 14606#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 43)), 14607#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 44)), 14608#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 45)), 14609#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 46)), 14610#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 47)), 14611#(not (= |#Ultimate.C_memset_#amount| 94)), 14561#true, 14562#false, 14563#(or (not (= |#Ultimate.C_memset_#amount| 94)) (= |#Ultimate.C_memset_#t~loopctr21| 0)), 14564#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 1)), 14565#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 2)), 14566#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 3)), 14567#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 4)), 14568#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 5)), 14569#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 6)), 14570#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 7)), 14571#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 8)), 14572#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 9)), 14573#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 10)), 14574#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 11)), 14575#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 12)), 14576#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 13)), 14577#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 14)), 14578#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 15)), 14579#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 16)), 14580#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 17)), 14581#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 18)), 14582#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 19)), 14583#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 20)), 14584#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 21)), 14585#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 22)), 14586#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 23)), 14587#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 24)), 14588#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 25)), 14589#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 26)), 14590#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 27)), 14591#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 28))] [2018-02-02 09:55:30,829 INFO L134 CoverageAnalysis]: Checked inductivity of 1182 backedges. 0 proven. 1128 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-02 09:55:30,829 INFO L409 AbstractCegarLoop]: Interpolant automaton has 51 states [2018-02-02 09:55:30,830 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 51 interpolants. [2018-02-02 09:55:30,830 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1275, Invalid=1275, Unknown=0, NotChecked=0, Total=2550 [2018-02-02 09:55:30,830 INFO L87 Difference]: Start difference. First operand 130 states and 134 transitions. Second operand 51 states. [2018-02-02 09:55:30,874 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:55:30,874 INFO L93 Difference]: Finished difference Result 133 states and 137 transitions. [2018-02-02 09:55:30,875 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 51 states. [2018-02-02 09:55:30,875 INFO L78 Accepts]: Start accepts. Automaton has 51 states. Word has length 125 [2018-02-02 09:55:30,875 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:55:30,875 INFO L225 Difference]: With dead ends: 133 [2018-02-02 09:55:30,875 INFO L226 Difference]: Without dead ends: 131 [2018-02-02 09:55:30,875 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 51 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 49 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 94 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=1275, Invalid=1275, Unknown=0, NotChecked=0, Total=2550 [2018-02-02 09:55:30,875 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 131 states. [2018-02-02 09:55:30,876 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 131 to 131. [2018-02-02 09:55:30,876 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 131 states. [2018-02-02 09:55:30,877 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 131 states to 131 states and 135 transitions. [2018-02-02 09:55:30,877 INFO L78 Accepts]: Start accepts. Automaton has 131 states and 135 transitions. Word has length 125 [2018-02-02 09:55:30,877 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:55:30,877 INFO L432 AbstractCegarLoop]: Abstraction has 131 states and 135 transitions. [2018-02-02 09:55:30,877 INFO L433 AbstractCegarLoop]: Interpolant automaton has 51 states. [2018-02-02 09:55:30,877 INFO L276 IsEmpty]: Start isEmpty. Operand 131 states and 135 transitions. [2018-02-02 09:55:30,877 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 127 [2018-02-02 09:55:30,877 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:55:30,877 INFO L351 BasicCegarLoop]: trace histogram [48, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:55:30,877 INFO L371 AbstractCegarLoop]: === Iteration 68 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-02 09:55:30,877 INFO L82 PathProgramCache]: Analyzing trace with hash -1410962976, now seen corresponding path program 48 times [2018-02-02 09:55:30,878 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-02 09:55:30,893 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:55:30,894 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:55:31,608 INFO L134 CoverageAnalysis]: Checked inductivity of 1230 backedges. 0 proven. 1176 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-02 09:55:31,608 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-02 09:55:31,609 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [52] total 52 [2018-02-02 09:55:31,609 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-02 09:55:31,609 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 09:55:31,609 INFO L182 omatonBuilderFactory]: Interpolants [14876#true, 14877#false, 14878#(or (not (= |#Ultimate.C_memset_#amount| 94)) (= |#Ultimate.C_memset_#t~loopctr21| 0)), 14879#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 1)), 14880#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 2)), 14881#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 3)), 14882#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 4)), 14883#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 5)), 14884#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 6)), 14885#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 7)), 14886#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 8)), 14887#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 9)), 14888#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 10)), 14889#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 11)), 14890#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 12)), 14891#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 13)), 14892#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 14)), 14893#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 15)), 14894#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 16)), 14895#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 17)), 14896#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 18)), 14897#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 19)), 14898#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 20)), 14899#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 21)), 14900#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 22)), 14901#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 23)), 14902#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 24)), 14903#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 25)), 14904#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 26)), 14905#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 27)), 14906#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 28)), 14907#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 29)), 14908#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 30)), 14909#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 31)), 14910#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 32)), 14911#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 33)), 14912#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 34)), 14913#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 35)), 14914#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 36)), 14915#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 37)), 14916#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 38)), 14917#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 39)), 14918#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 40)), 14919#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 41)), 14920#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 42)), 14921#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 43)), 14922#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 44)), 14923#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 45)), 14924#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 46)), 14925#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 47)), 14926#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 48)), 14927#(not (= |#Ultimate.C_memset_#amount| 94))] [2018-02-02 09:55:31,609 INFO L134 CoverageAnalysis]: Checked inductivity of 1230 backedges. 0 proven. 1176 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-02 09:55:31,609 INFO L409 AbstractCegarLoop]: Interpolant automaton has 52 states [2018-02-02 09:55:31,609 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 52 interpolants. [2018-02-02 09:55:31,610 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1326, Invalid=1326, Unknown=0, NotChecked=0, Total=2652 [2018-02-02 09:55:31,610 INFO L87 Difference]: Start difference. First operand 131 states and 135 transitions. Second operand 52 states. [2018-02-02 09:55:31,679 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:55:31,679 INFO L93 Difference]: Finished difference Result 134 states and 138 transitions. [2018-02-02 09:55:31,679 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 52 states. [2018-02-02 09:55:31,679 INFO L78 Accepts]: Start accepts. Automaton has 52 states. Word has length 126 [2018-02-02 09:55:31,679 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:55:31,679 INFO L225 Difference]: With dead ends: 134 [2018-02-02 09:55:31,679 INFO L226 Difference]: Without dead ends: 132 [2018-02-02 09:55:31,680 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 52 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 50 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 96 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=1326, Invalid=1326, Unknown=0, NotChecked=0, Total=2652 [2018-02-02 09:55:31,680 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 132 states. [2018-02-02 09:55:31,681 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 132 to 132. [2018-02-02 09:55:31,681 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 132 states. [2018-02-02 09:55:31,681 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 132 states to 132 states and 136 transitions. [2018-02-02 09:55:31,681 INFO L78 Accepts]: Start accepts. Automaton has 132 states and 136 transitions. Word has length 126 [2018-02-02 09:55:31,682 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:55:31,682 INFO L432 AbstractCegarLoop]: Abstraction has 132 states and 136 transitions. [2018-02-02 09:55:31,682 INFO L433 AbstractCegarLoop]: Interpolant automaton has 52 states. [2018-02-02 09:55:31,682 INFO L276 IsEmpty]: Start isEmpty. Operand 132 states and 136 transitions. [2018-02-02 09:55:31,682 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 128 [2018-02-02 09:55:31,682 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:55:31,683 INFO L351 BasicCegarLoop]: trace histogram [49, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:55:31,683 INFO L371 AbstractCegarLoop]: === Iteration 69 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-02 09:55:31,683 INFO L82 PathProgramCache]: Analyzing trace with hash 742523379, now seen corresponding path program 49 times [2018-02-02 09:55:31,683 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-02 09:55:31,712 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:55:31,713 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:55:32,588 INFO L134 CoverageAnalysis]: Checked inductivity of 1279 backedges. 0 proven. 1225 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-02 09:55:32,588 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-02 09:55:32,588 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [53] total 53 [2018-02-02 09:55:32,589 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-02 09:55:32,589 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 09:55:32,589 INFO L182 omatonBuilderFactory]: Interpolants [15232#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 36)), 15233#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 37)), 15234#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 38)), 15235#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 39)), 15236#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 40)), 15237#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 41)), 15238#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 42)), 15239#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 43)), 15240#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 44)), 15241#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 45)), 15242#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 46)), 15243#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 47)), 15244#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 48)), 15245#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 49)), 15246#(not (= |#Ultimate.C_memset_#amount| 94)), 15194#true, 15195#false, 15196#(or (not (= |#Ultimate.C_memset_#amount| 94)) (= |#Ultimate.C_memset_#t~loopctr21| 0)), 15197#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 1)), 15198#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 2)), 15199#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 3)), 15200#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 4)), 15201#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 5)), 15202#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 6)), 15203#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 7)), 15204#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 8)), 15205#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 9)), 15206#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 10)), 15207#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 11)), 15208#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 12)), 15209#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 13)), 15210#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 14)), 15211#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 15)), 15212#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 16)), 15213#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 17)), 15214#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 18)), 15215#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 19)), 15216#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 20)), 15217#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 21)), 15218#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 22)), 15219#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 23)), 15220#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 24)), 15221#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 25)), 15222#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 26)), 15223#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 27)), 15224#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 28)), 15225#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 29)), 15226#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 30)), 15227#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 31)), 15228#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 32)), 15229#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 33)), 15230#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 34)), 15231#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 35))] [2018-02-02 09:55:32,589 INFO L134 CoverageAnalysis]: Checked inductivity of 1279 backedges. 0 proven. 1225 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-02 09:55:32,589 INFO L409 AbstractCegarLoop]: Interpolant automaton has 53 states [2018-02-02 09:55:32,589 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 53 interpolants. [2018-02-02 09:55:32,590 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1378, Invalid=1378, Unknown=0, NotChecked=0, Total=2756 [2018-02-02 09:55:32,590 INFO L87 Difference]: Start difference. First operand 132 states and 136 transitions. Second operand 53 states. [2018-02-02 09:55:32,666 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:55:32,666 INFO L93 Difference]: Finished difference Result 135 states and 139 transitions. [2018-02-02 09:55:32,666 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 53 states. [2018-02-02 09:55:32,666 INFO L78 Accepts]: Start accepts. Automaton has 53 states. Word has length 127 [2018-02-02 09:55:32,666 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:55:32,667 INFO L225 Difference]: With dead ends: 135 [2018-02-02 09:55:32,667 INFO L226 Difference]: Without dead ends: 133 [2018-02-02 09:55:32,667 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 53 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 51 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 98 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=1378, Invalid=1378, Unknown=0, NotChecked=0, Total=2756 [2018-02-02 09:55:32,667 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 133 states. [2018-02-02 09:55:32,668 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 133 to 133. [2018-02-02 09:55:32,668 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 133 states. [2018-02-02 09:55:32,668 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 133 states to 133 states and 137 transitions. [2018-02-02 09:55:32,668 INFO L78 Accepts]: Start accepts. Automaton has 133 states and 137 transitions. Word has length 127 [2018-02-02 09:55:32,668 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:55:32,669 INFO L432 AbstractCegarLoop]: Abstraction has 133 states and 137 transitions. [2018-02-02 09:55:32,669 INFO L433 AbstractCegarLoop]: Interpolant automaton has 53 states. [2018-02-02 09:55:32,669 INFO L276 IsEmpty]: Start isEmpty. Operand 133 states and 137 transitions. [2018-02-02 09:55:32,669 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 129 [2018-02-02 09:55:32,669 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:55:32,669 INFO L351 BasicCegarLoop]: trace histogram [50, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:55:32,669 INFO L371 AbstractCegarLoop]: === Iteration 70 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-02 09:55:32,669 INFO L82 PathProgramCache]: Analyzing trace with hash -1218876352, now seen corresponding path program 50 times [2018-02-02 09:55:32,670 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-02 09:55:32,687 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:55:32,687 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:55:33,491 INFO L134 CoverageAnalysis]: Checked inductivity of 1329 backedges. 0 proven. 1275 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-02 09:55:33,492 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-02 09:55:33,492 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [54] total 54 [2018-02-02 09:55:33,492 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-02 09:55:33,492 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 09:55:33,492 INFO L182 omatonBuilderFactory]: Interpolants [15515#true, 15516#false, 15517#(or (not (= |#Ultimate.C_memset_#amount| 94)) (= |#Ultimate.C_memset_#t~loopctr21| 0)), 15518#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 1)), 15519#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 2)), 15520#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 3)), 15521#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 4)), 15522#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 5)), 15523#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 6)), 15524#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 7)), 15525#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 8)), 15526#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 9)), 15527#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 10)), 15528#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 11)), 15529#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 12)), 15530#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 13)), 15531#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 14)), 15532#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 15)), 15533#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 16)), 15534#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 17)), 15535#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 18)), 15536#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 19)), 15537#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 20)), 15538#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 21)), 15539#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 22)), 15540#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 23)), 15541#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 24)), 15542#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 25)), 15543#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 26)), 15544#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 27)), 15545#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 28)), 15546#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 29)), 15547#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 30)), 15548#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 31)), 15549#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 32)), 15550#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 33)), 15551#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 34)), 15552#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 35)), 15553#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 36)), 15554#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 37)), 15555#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 38)), 15556#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 39)), 15557#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 40)), 15558#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 41)), 15559#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 42)), 15560#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 43)), 15561#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 44)), 15562#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 45)), 15563#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 46)), 15564#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 47)), 15565#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 48)), 15566#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 49)), 15567#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 50)), 15568#(not (= |#Ultimate.C_memset_#amount| 94))] [2018-02-02 09:55:33,492 INFO L134 CoverageAnalysis]: Checked inductivity of 1329 backedges. 0 proven. 1275 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-02 09:55:33,492 INFO L409 AbstractCegarLoop]: Interpolant automaton has 54 states [2018-02-02 09:55:33,493 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 54 interpolants. [2018-02-02 09:55:33,493 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1431, Invalid=1431, Unknown=0, NotChecked=0, Total=2862 [2018-02-02 09:55:33,493 INFO L87 Difference]: Start difference. First operand 133 states and 137 transitions. Second operand 54 states. [2018-02-02 09:55:33,565 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:55:33,566 INFO L93 Difference]: Finished difference Result 136 states and 140 transitions. [2018-02-02 09:55:33,566 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 54 states. [2018-02-02 09:55:33,566 INFO L78 Accepts]: Start accepts. Automaton has 54 states. Word has length 128 [2018-02-02 09:55:33,566 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:55:33,566 INFO L225 Difference]: With dead ends: 136 [2018-02-02 09:55:33,566 INFO L226 Difference]: Without dead ends: 134 [2018-02-02 09:55:33,567 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 54 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 52 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 100 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=1431, Invalid=1431, Unknown=0, NotChecked=0, Total=2862 [2018-02-02 09:55:33,567 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 134 states. [2018-02-02 09:55:33,567 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 134 to 134. [2018-02-02 09:55:33,568 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 134 states. [2018-02-02 09:55:33,568 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 134 states to 134 states and 138 transitions. [2018-02-02 09:55:33,568 INFO L78 Accepts]: Start accepts. Automaton has 134 states and 138 transitions. Word has length 128 [2018-02-02 09:55:33,568 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:55:33,568 INFO L432 AbstractCegarLoop]: Abstraction has 134 states and 138 transitions. [2018-02-02 09:55:33,568 INFO L433 AbstractCegarLoop]: Interpolant automaton has 54 states. [2018-02-02 09:55:33,568 INFO L276 IsEmpty]: Start isEmpty. Operand 134 states and 138 transitions. [2018-02-02 09:55:33,568 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 130 [2018-02-02 09:55:33,569 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:55:33,569 INFO L351 BasicCegarLoop]: trace histogram [51, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:55:33,569 INFO L371 AbstractCegarLoop]: === Iteration 71 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-02 09:55:33,569 INFO L82 PathProgramCache]: Analyzing trace with hash -1892725869, now seen corresponding path program 51 times [2018-02-02 09:55:33,569 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-02 09:55:33,587 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:55:33,588 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:55:34,439 INFO L134 CoverageAnalysis]: Checked inductivity of 1380 backedges. 0 proven. 1326 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-02 09:55:34,440 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-02 09:55:34,440 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [55] total 55 [2018-02-02 09:55:34,440 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-02 09:55:34,440 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 09:55:34,440 INFO L182 omatonBuilderFactory]: Interpolants [15872#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 31)), 15873#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 32)), 15874#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 33)), 15875#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 34)), 15876#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 35)), 15877#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 36)), 15878#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 37)), 15879#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 38)), 15880#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 39)), 15881#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 40)), 15882#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 41)), 15883#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 42)), 15884#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 43)), 15885#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 44)), 15886#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 45)), 15887#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 46)), 15888#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 47)), 15889#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 48)), 15890#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 49)), 15891#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 50)), 15892#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 51)), 15893#(not (= |#Ultimate.C_memset_#amount| 94)), 15839#true, 15840#false, 15841#(or (not (= |#Ultimate.C_memset_#amount| 94)) (= |#Ultimate.C_memset_#t~loopctr21| 0)), 15842#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 1)), 15843#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 2)), 15844#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 3)), 15845#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 4)), 15846#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 5)), 15847#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 6)), 15848#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 7)), 15849#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 8)), 15850#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 9)), 15851#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 10)), 15852#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 11)), 15853#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 12)), 15854#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 13)), 15855#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 14)), 15856#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 15)), 15857#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 16)), 15858#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 17)), 15859#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 18)), 15860#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 19)), 15861#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 20)), 15862#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 21)), 15863#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 22)), 15864#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 23)), 15865#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 24)), 15866#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 25)), 15867#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 26)), 15868#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 27)), 15869#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 28)), 15870#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 29)), 15871#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 30))] [2018-02-02 09:55:34,440 INFO L134 CoverageAnalysis]: Checked inductivity of 1380 backedges. 0 proven. 1326 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-02 09:55:34,441 INFO L409 AbstractCegarLoop]: Interpolant automaton has 55 states [2018-02-02 09:55:34,441 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 55 interpolants. [2018-02-02 09:55:34,443 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1485, Invalid=1485, Unknown=0, NotChecked=0, Total=2970 [2018-02-02 09:55:34,443 INFO L87 Difference]: Start difference. First operand 134 states and 138 transitions. Second operand 55 states. [2018-02-02 09:55:34,503 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:55:34,504 INFO L93 Difference]: Finished difference Result 137 states and 141 transitions. [2018-02-02 09:55:34,504 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 55 states. [2018-02-02 09:55:34,504 INFO L78 Accepts]: Start accepts. Automaton has 55 states. Word has length 129 [2018-02-02 09:55:34,504 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:55:34,504 INFO L225 Difference]: With dead ends: 137 [2018-02-02 09:55:34,504 INFO L226 Difference]: Without dead ends: 135 [2018-02-02 09:55:34,505 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 55 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 53 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 102 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=1485, Invalid=1485, Unknown=0, NotChecked=0, Total=2970 [2018-02-02 09:55:34,505 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 135 states. [2018-02-02 09:55:34,507 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 135 to 135. [2018-02-02 09:55:34,507 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 135 states. [2018-02-02 09:55:34,508 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 135 states to 135 states and 139 transitions. [2018-02-02 09:55:34,508 INFO L78 Accepts]: Start accepts. Automaton has 135 states and 139 transitions. Word has length 129 [2018-02-02 09:55:34,508 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:55:34,508 INFO L432 AbstractCegarLoop]: Abstraction has 135 states and 139 transitions. [2018-02-02 09:55:34,508 INFO L433 AbstractCegarLoop]: Interpolant automaton has 55 states. [2018-02-02 09:55:34,508 INFO L276 IsEmpty]: Start isEmpty. Operand 135 states and 139 transitions. [2018-02-02 09:55:34,508 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 131 [2018-02-02 09:55:34,509 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:55:34,509 INFO L351 BasicCegarLoop]: trace histogram [52, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:55:34,509 INFO L371 AbstractCegarLoop]: === Iteration 72 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-02 09:55:34,509 INFO L82 PathProgramCache]: Analyzing trace with hash -1307224416, now seen corresponding path program 52 times [2018-02-02 09:55:34,509 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-02 09:55:34,549 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:55:34,550 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:55:35,536 INFO L134 CoverageAnalysis]: Checked inductivity of 1432 backedges. 0 proven. 1378 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-02 09:55:35,536 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-02 09:55:35,537 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [56] total 56 [2018-02-02 09:55:35,537 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-02 09:55:35,537 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 09:55:35,537 INFO L182 omatonBuilderFactory]: Interpolants [16166#true, 16167#false, 16168#(or (not (= |#Ultimate.C_memset_#amount| 94)) (= |#Ultimate.C_memset_#t~loopctr21| 0)), 16169#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 1)), 16170#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 2)), 16171#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 3)), 16172#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 4)), 16173#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 5)), 16174#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 6)), 16175#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 7)), 16176#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 8)), 16177#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 9)), 16178#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 10)), 16179#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 11)), 16180#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 12)), 16181#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 13)), 16182#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 14)), 16183#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 15)), 16184#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 16)), 16185#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 17)), 16186#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 18)), 16187#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 19)), 16188#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 20)), 16189#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 21)), 16190#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 22)), 16191#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 23)), 16192#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 24)), 16193#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 25)), 16194#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 26)), 16195#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 27)), 16196#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 28)), 16197#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 29)), 16198#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 30)), 16199#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 31)), 16200#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 32)), 16201#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 33)), 16202#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 34)), 16203#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 35)), 16204#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 36)), 16205#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 37)), 16206#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 38)), 16207#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 39)), 16208#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 40)), 16209#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 41)), 16210#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 42)), 16211#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 43)), 16212#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 44)), 16213#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 45)), 16214#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 46)), 16215#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 47)), 16216#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 48)), 16217#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 49)), 16218#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 50)), 16219#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 51)), 16220#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 52)), 16221#(not (= |#Ultimate.C_memset_#amount| 94))] [2018-02-02 09:55:35,537 INFO L134 CoverageAnalysis]: Checked inductivity of 1432 backedges. 0 proven. 1378 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-02 09:55:35,537 INFO L409 AbstractCegarLoop]: Interpolant automaton has 56 states [2018-02-02 09:55:35,538 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 56 interpolants. [2018-02-02 09:55:35,538 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1540, Invalid=1540, Unknown=0, NotChecked=0, Total=3080 [2018-02-02 09:55:35,538 INFO L87 Difference]: Start difference. First operand 135 states and 139 transitions. Second operand 56 states. [2018-02-02 09:55:35,636 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:55:35,636 INFO L93 Difference]: Finished difference Result 138 states and 142 transitions. [2018-02-02 09:55:35,636 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 56 states. [2018-02-02 09:55:35,637 INFO L78 Accepts]: Start accepts. Automaton has 56 states. Word has length 130 [2018-02-02 09:55:35,637 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:55:35,638 INFO L225 Difference]: With dead ends: 138 [2018-02-02 09:55:35,638 INFO L226 Difference]: Without dead ends: 136 [2018-02-02 09:55:35,638 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 56 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 54 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 104 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=1540, Invalid=1540, Unknown=0, NotChecked=0, Total=3080 [2018-02-02 09:55:35,639 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 136 states. [2018-02-02 09:55:35,640 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 136 to 136. [2018-02-02 09:55:35,640 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 136 states. [2018-02-02 09:55:35,640 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 136 states to 136 states and 140 transitions. [2018-02-02 09:55:35,641 INFO L78 Accepts]: Start accepts. Automaton has 136 states and 140 transitions. Word has length 130 [2018-02-02 09:55:35,641 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:55:35,641 INFO L432 AbstractCegarLoop]: Abstraction has 136 states and 140 transitions. [2018-02-02 09:55:35,641 INFO L433 AbstractCegarLoop]: Interpolant automaton has 56 states. [2018-02-02 09:55:35,641 INFO L276 IsEmpty]: Start isEmpty. Operand 136 states and 140 transitions. [2018-02-02 09:55:35,642 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 132 [2018-02-02 09:55:35,642 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:55:35,643 INFO L351 BasicCegarLoop]: trace histogram [53, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:55:35,643 INFO L371 AbstractCegarLoop]: === Iteration 73 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-02 09:55:35,643 INFO L82 PathProgramCache]: Analyzing trace with hash -336548557, now seen corresponding path program 53 times [2018-02-02 09:55:35,644 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-02 09:55:35,671 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:55:35,672 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:55:36,541 INFO L134 CoverageAnalysis]: Checked inductivity of 1485 backedges. 0 proven. 1431 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-02 09:55:36,541 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-02 09:55:36,541 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [57] total 57 [2018-02-02 09:55:36,541 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-02 09:55:36,542 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 09:55:36,542 INFO L182 omatonBuilderFactory]: Interpolants [16512#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 14)), 16513#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 15)), 16514#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 16)), 16515#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 17)), 16516#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 18)), 16517#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 19)), 16518#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 20)), 16519#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 21)), 16520#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 22)), 16521#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 23)), 16522#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 24)), 16523#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 25)), 16524#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 26)), 16525#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 27)), 16526#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 28)), 16527#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 29)), 16528#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 30)), 16529#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 31)), 16530#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 32)), 16531#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 33)), 16532#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 34)), 16533#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 35)), 16534#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 36)), 16535#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 37)), 16536#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 38)), 16537#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 39)), 16538#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 40)), 16539#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 41)), 16540#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 42)), 16541#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 43)), 16542#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 44)), 16543#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 45)), 16544#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 46)), 16545#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 47)), 16546#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 48)), 16547#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 49)), 16548#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 50)), 16549#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 51)), 16550#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 52)), 16551#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 53)), 16552#(not (= |#Ultimate.C_memset_#amount| 94)), 16496#true, 16497#false, 16498#(or (not (= |#Ultimate.C_memset_#amount| 94)) (= |#Ultimate.C_memset_#t~loopctr21| 0)), 16499#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 1)), 16500#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 2)), 16501#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 3)), 16502#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 4)), 16503#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 5)), 16504#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 6)), 16505#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 7)), 16506#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 8)), 16507#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 9)), 16508#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 10)), 16509#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 11)), 16510#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 12)), 16511#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 13))] [2018-02-02 09:55:36,542 INFO L134 CoverageAnalysis]: Checked inductivity of 1485 backedges. 0 proven. 1431 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-02 09:55:36,542 INFO L409 AbstractCegarLoop]: Interpolant automaton has 57 states [2018-02-02 09:55:36,542 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 57 interpolants. [2018-02-02 09:55:36,542 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1596, Invalid=1596, Unknown=0, NotChecked=0, Total=3192 [2018-02-02 09:55:36,542 INFO L87 Difference]: Start difference. First operand 136 states and 140 transitions. Second operand 57 states. [2018-02-02 09:55:36,607 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:55:36,607 INFO L93 Difference]: Finished difference Result 139 states and 143 transitions. [2018-02-02 09:55:36,607 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 57 states. [2018-02-02 09:55:36,607 INFO L78 Accepts]: Start accepts. Automaton has 57 states. Word has length 131 [2018-02-02 09:55:36,607 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:55:36,607 INFO L225 Difference]: With dead ends: 139 [2018-02-02 09:55:36,607 INFO L226 Difference]: Without dead ends: 137 [2018-02-02 09:55:36,608 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 57 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 55 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 106 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=1596, Invalid=1596, Unknown=0, NotChecked=0, Total=3192 [2018-02-02 09:55:36,608 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 137 states. [2018-02-02 09:55:36,609 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 137 to 137. [2018-02-02 09:55:36,609 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 137 states. [2018-02-02 09:55:36,609 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 137 states to 137 states and 141 transitions. [2018-02-02 09:55:36,609 INFO L78 Accepts]: Start accepts. Automaton has 137 states and 141 transitions. Word has length 131 [2018-02-02 09:55:36,609 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:55:36,609 INFO L432 AbstractCegarLoop]: Abstraction has 137 states and 141 transitions. [2018-02-02 09:55:36,609 INFO L433 AbstractCegarLoop]: Interpolant automaton has 57 states. [2018-02-02 09:55:36,609 INFO L276 IsEmpty]: Start isEmpty. Operand 137 states and 141 transitions. [2018-02-02 09:55:36,610 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 133 [2018-02-02 09:55:36,610 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:55:36,610 INFO L351 BasicCegarLoop]: trace histogram [54, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:55:36,610 INFO L371 AbstractCegarLoop]: === Iteration 74 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-02 09:55:36,610 INFO L82 PathProgramCache]: Analyzing trace with hash -310368000, now seen corresponding path program 54 times [2018-02-02 09:55:36,611 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-02 09:55:36,631 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:55:36,632 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:55:37,521 INFO L134 CoverageAnalysis]: Checked inductivity of 1539 backedges. 0 proven. 1485 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-02 09:55:37,521 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-02 09:55:37,521 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [58] total 58 [2018-02-02 09:55:37,521 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-02 09:55:37,521 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 09:55:37,521 INFO L182 omatonBuilderFactory]: Interpolants [16829#true, 16830#false, 16831#(or (not (= |#Ultimate.C_memset_#amount| 94)) (= |#Ultimate.C_memset_#t~loopctr21| 0)), 16832#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 1)), 16833#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 2)), 16834#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 3)), 16835#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 4)), 16836#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 5)), 16837#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 6)), 16838#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 7)), 16839#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 8)), 16840#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 9)), 16841#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 10)), 16842#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 11)), 16843#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 12)), 16844#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 13)), 16845#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 14)), 16846#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 15)), 16847#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 16)), 16848#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 17)), 16849#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 18)), 16850#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 19)), 16851#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 20)), 16852#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 21)), 16853#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 22)), 16854#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 23)), 16855#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 24)), 16856#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 25)), 16857#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 26)), 16858#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 27)), 16859#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 28)), 16860#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 29)), 16861#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 30)), 16862#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 31)), 16863#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 32)), 16864#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 33)), 16865#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 34)), 16866#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 35)), 16867#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 36)), 16868#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 37)), 16869#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 38)), 16870#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 39)), 16871#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 40)), 16872#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 41)), 16873#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 42)), 16874#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 43)), 16875#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 44)), 16876#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 45)), 16877#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 46)), 16878#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 47)), 16879#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 48)), 16880#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 49)), 16881#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 50)), 16882#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 51)), 16883#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 52)), 16884#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 53)), 16885#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 54)), 16886#(not (= |#Ultimate.C_memset_#amount| 94))] [2018-02-02 09:55:37,521 INFO L134 CoverageAnalysis]: Checked inductivity of 1539 backedges. 0 proven. 1485 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-02 09:55:37,522 INFO L409 AbstractCegarLoop]: Interpolant automaton has 58 states [2018-02-02 09:55:37,522 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 58 interpolants. [2018-02-02 09:55:37,522 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1653, Invalid=1653, Unknown=0, NotChecked=0, Total=3306 [2018-02-02 09:55:37,522 INFO L87 Difference]: Start difference. First operand 137 states and 141 transitions. Second operand 58 states. [2018-02-02 09:55:37,604 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:55:37,605 INFO L93 Difference]: Finished difference Result 140 states and 144 transitions. [2018-02-02 09:55:37,605 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 58 states. [2018-02-02 09:55:37,605 INFO L78 Accepts]: Start accepts. Automaton has 58 states. Word has length 132 [2018-02-02 09:55:37,605 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:55:37,605 INFO L225 Difference]: With dead ends: 140 [2018-02-02 09:55:37,605 INFO L226 Difference]: Without dead ends: 138 [2018-02-02 09:55:37,606 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 58 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 56 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 108 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=1653, Invalid=1653, Unknown=0, NotChecked=0, Total=3306 [2018-02-02 09:55:37,606 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 138 states. [2018-02-02 09:55:37,607 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 138 to 138. [2018-02-02 09:55:37,607 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 138 states. [2018-02-02 09:55:37,607 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 138 states to 138 states and 142 transitions. [2018-02-02 09:55:37,607 INFO L78 Accepts]: Start accepts. Automaton has 138 states and 142 transitions. Word has length 132 [2018-02-02 09:55:37,607 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:55:37,607 INFO L432 AbstractCegarLoop]: Abstraction has 138 states and 142 transitions. [2018-02-02 09:55:37,607 INFO L433 AbstractCegarLoop]: Interpolant automaton has 58 states. [2018-02-02 09:55:37,607 INFO L276 IsEmpty]: Start isEmpty. Operand 138 states and 142 transitions. [2018-02-02 09:55:37,607 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 134 [2018-02-02 09:55:37,608 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:55:37,608 INFO L351 BasicCegarLoop]: trace histogram [55, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:55:37,608 INFO L371 AbstractCegarLoop]: === Iteration 75 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-02 09:55:37,608 INFO L82 PathProgramCache]: Analyzing trace with hash 501229267, now seen corresponding path program 55 times [2018-02-02 09:55:37,608 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-02 09:55:37,632 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:55:37,633 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:55:38,563 INFO L134 CoverageAnalysis]: Checked inductivity of 1594 backedges. 0 proven. 1540 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-02 09:55:38,563 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-02 09:55:38,563 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [59] total 59 [2018-02-02 09:55:38,563 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-02 09:55:38,563 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 09:55:38,564 INFO L182 omatonBuilderFactory]: Interpolants [17165#true, 17166#false, 17167#(or (not (= |#Ultimate.C_memset_#amount| 94)) (= |#Ultimate.C_memset_#t~loopctr21| 0)), 17168#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 1)), 17169#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 2)), 17170#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 3)), 17171#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 4)), 17172#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 5)), 17173#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 6)), 17174#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 7)), 17175#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 8)), 17176#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 9)), 17177#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 10)), 17178#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 11)), 17179#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 12)), 17180#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 13)), 17181#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 14)), 17182#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 15)), 17183#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 16)), 17184#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 17)), 17185#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 18)), 17186#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 19)), 17187#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 20)), 17188#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 21)), 17189#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 22)), 17190#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 23)), 17191#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 24)), 17192#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 25)), 17193#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 26)), 17194#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 27)), 17195#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 28)), 17196#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 29)), 17197#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 30)), 17198#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 31)), 17199#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 32)), 17200#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 33)), 17201#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 34)), 17202#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 35)), 17203#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 36)), 17204#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 37)), 17205#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 38)), 17206#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 39)), 17207#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 40)), 17208#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 41)), 17209#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 42)), 17210#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 43)), 17211#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 44)), 17212#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 45)), 17213#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 46)), 17214#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 47)), 17215#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 48)), 17216#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 49)), 17217#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 50)), 17218#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 51)), 17219#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 52)), 17220#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 53)), 17221#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 54)), 17222#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 55)), 17223#(not (= |#Ultimate.C_memset_#amount| 94))] [2018-02-02 09:55:38,564 INFO L134 CoverageAnalysis]: Checked inductivity of 1594 backedges. 0 proven. 1540 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-02 09:55:38,564 INFO L409 AbstractCegarLoop]: Interpolant automaton has 59 states [2018-02-02 09:55:38,564 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 59 interpolants. [2018-02-02 09:55:38,564 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1711, Invalid=1711, Unknown=0, NotChecked=0, Total=3422 [2018-02-02 09:55:38,565 INFO L87 Difference]: Start difference. First operand 138 states and 142 transitions. Second operand 59 states. [2018-02-02 09:55:38,653 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:55:38,653 INFO L93 Difference]: Finished difference Result 141 states and 145 transitions. [2018-02-02 09:55:38,653 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 59 states. [2018-02-02 09:55:38,653 INFO L78 Accepts]: Start accepts. Automaton has 59 states. Word has length 133 [2018-02-02 09:55:38,653 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:55:38,654 INFO L225 Difference]: With dead ends: 141 [2018-02-02 09:55:38,654 INFO L226 Difference]: Without dead ends: 139 [2018-02-02 09:55:38,654 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 59 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 57 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 110 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=1711, Invalid=1711, Unknown=0, NotChecked=0, Total=3422 [2018-02-02 09:55:38,654 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 139 states. [2018-02-02 09:55:38,655 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 139 to 139. [2018-02-02 09:55:38,655 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 139 states. [2018-02-02 09:55:38,655 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 139 states to 139 states and 143 transitions. [2018-02-02 09:55:38,655 INFO L78 Accepts]: Start accepts. Automaton has 139 states and 143 transitions. Word has length 133 [2018-02-02 09:55:38,655 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:55:38,655 INFO L432 AbstractCegarLoop]: Abstraction has 139 states and 143 transitions. [2018-02-02 09:55:38,655 INFO L433 AbstractCegarLoop]: Interpolant automaton has 59 states. [2018-02-02 09:55:38,655 INFO L276 IsEmpty]: Start isEmpty. Operand 139 states and 143 transitions. [2018-02-02 09:55:38,656 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 135 [2018-02-02 09:55:38,656 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:55:38,656 INFO L351 BasicCegarLoop]: trace histogram [56, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:55:38,656 INFO L371 AbstractCegarLoop]: === Iteration 76 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-02 09:55:38,656 INFO L82 PathProgramCache]: Analyzing trace with hash -109059232, now seen corresponding path program 56 times [2018-02-02 09:55:38,657 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-02 09:55:38,679 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:55:38,680 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:55:39,664 INFO L134 CoverageAnalysis]: Checked inductivity of 1650 backedges. 0 proven. 1596 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-02 09:55:39,665 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-02 09:55:39,665 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [60] total 60 [2018-02-02 09:55:39,665 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-02 09:55:39,665 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 09:55:39,665 INFO L182 omatonBuilderFactory]: Interpolants [17536#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 30)), 17537#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 31)), 17538#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 32)), 17539#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 33)), 17540#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 34)), 17541#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 35)), 17542#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 36)), 17543#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 37)), 17544#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 38)), 17545#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 39)), 17546#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 40)), 17547#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 41)), 17548#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 42)), 17549#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 43)), 17550#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 44)), 17551#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 45)), 17552#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 46)), 17553#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 47)), 17554#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 48)), 17555#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 49)), 17556#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 50)), 17557#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 51)), 17558#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 52)), 17559#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 53)), 17560#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 54)), 17561#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 55)), 17562#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 56)), 17563#(not (= |#Ultimate.C_memset_#amount| 94)), 17504#true, 17505#false, 17506#(or (not (= |#Ultimate.C_memset_#amount| 94)) (= |#Ultimate.C_memset_#t~loopctr21| 0)), 17507#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 1)), 17508#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 2)), 17509#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 3)), 17510#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 4)), 17511#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 5)), 17512#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 6)), 17513#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 7)), 17514#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 8)), 17515#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 9)), 17516#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 10)), 17517#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 11)), 17518#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 12)), 17519#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 13)), 17520#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 14)), 17521#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 15)), 17522#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 16)), 17523#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 17)), 17524#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 18)), 17525#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 19)), 17526#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 20)), 17527#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 21)), 17528#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 22)), 17529#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 23)), 17530#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 24)), 17531#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 25)), 17532#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 26)), 17533#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 27)), 17534#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 28)), 17535#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 29))] [2018-02-02 09:55:39,665 INFO L134 CoverageAnalysis]: Checked inductivity of 1650 backedges. 0 proven. 1596 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-02 09:55:39,665 INFO L409 AbstractCegarLoop]: Interpolant automaton has 60 states [2018-02-02 09:55:39,666 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 60 interpolants. [2018-02-02 09:55:39,666 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1770, Invalid=1770, Unknown=0, NotChecked=0, Total=3540 [2018-02-02 09:55:39,666 INFO L87 Difference]: Start difference. First operand 139 states and 143 transitions. Second operand 60 states. [2018-02-02 09:55:39,717 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:55:39,717 INFO L93 Difference]: Finished difference Result 142 states and 146 transitions. [2018-02-02 09:55:39,717 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 60 states. [2018-02-02 09:55:39,717 INFO L78 Accepts]: Start accepts. Automaton has 60 states. Word has length 134 [2018-02-02 09:55:39,718 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:55:39,718 INFO L225 Difference]: With dead ends: 142 [2018-02-02 09:55:39,718 INFO L226 Difference]: Without dead ends: 140 [2018-02-02 09:55:39,718 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 60 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 58 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 112 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=1770, Invalid=1770, Unknown=0, NotChecked=0, Total=3540 [2018-02-02 09:55:39,718 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 140 states. [2018-02-02 09:55:39,719 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 140 to 140. [2018-02-02 09:55:39,720 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 140 states. [2018-02-02 09:55:39,720 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 140 states to 140 states and 144 transitions. [2018-02-02 09:55:39,720 INFO L78 Accepts]: Start accepts. Automaton has 140 states and 144 transitions. Word has length 134 [2018-02-02 09:55:39,720 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:55:39,720 INFO L432 AbstractCegarLoop]: Abstraction has 140 states and 144 transitions. [2018-02-02 09:55:39,720 INFO L433 AbstractCegarLoop]: Interpolant automaton has 60 states. [2018-02-02 09:55:39,720 INFO L276 IsEmpty]: Start isEmpty. Operand 140 states and 144 transitions. [2018-02-02 09:55:39,721 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 136 [2018-02-02 09:55:39,721 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:55:39,721 INFO L351 BasicCegarLoop]: trace histogram [57, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:55:39,721 INFO L371 AbstractCegarLoop]: === Iteration 77 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-02 09:55:39,721 INFO L82 PathProgramCache]: Analyzing trace with hash -1848133517, now seen corresponding path program 57 times [2018-02-02 09:55:39,722 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-02 09:55:39,757 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:55:39,757 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:55:40,818 INFO L134 CoverageAnalysis]: Checked inductivity of 1707 backedges. 0 proven. 1653 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-02 09:55:40,818 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-02 09:55:40,819 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [61] total 61 [2018-02-02 09:55:40,819 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-02 09:55:40,819 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 09:55:40,819 INFO L182 omatonBuilderFactory]: Interpolants [17846#true, 17847#false, 17848#(or (not (= |#Ultimate.C_memset_#amount| 94)) (= |#Ultimate.C_memset_#t~loopctr21| 0)), 17849#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 1)), 17850#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 2)), 17851#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 3)), 17852#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 4)), 17853#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 5)), 17854#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 6)), 17855#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 7)), 17856#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 8)), 17857#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 9)), 17858#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 10)), 17859#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 11)), 17860#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 12)), 17861#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 13)), 17862#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 14)), 17863#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 15)), 17864#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 16)), 17865#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 17)), 17866#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 18)), 17867#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 19)), 17868#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 20)), 17869#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 21)), 17870#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 22)), 17871#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 23)), 17872#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 24)), 17873#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 25)), 17874#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 26)), 17875#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 27)), 17876#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 28)), 17877#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 29)), 17878#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 30)), 17879#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 31)), 17880#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 32)), 17881#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 33)), 17882#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 34)), 17883#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 35)), 17884#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 36)), 17885#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 37)), 17886#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 38)), 17887#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 39)), 17888#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 40)), 17889#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 41)), 17890#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 42)), 17891#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 43)), 17892#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 44)), 17893#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 45)), 17894#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 46)), 17895#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 47)), 17896#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 48)), 17897#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 49)), 17898#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 50)), 17899#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 51)), 17900#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 52)), 17901#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 53)), 17902#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 54)), 17903#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 55)), 17904#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 56)), 17905#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 57)), 17906#(not (= |#Ultimate.C_memset_#amount| 94))] [2018-02-02 09:55:40,819 INFO L134 CoverageAnalysis]: Checked inductivity of 1707 backedges. 0 proven. 1653 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-02 09:55:40,819 INFO L409 AbstractCegarLoop]: Interpolant automaton has 61 states [2018-02-02 09:55:40,820 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 61 interpolants. [2018-02-02 09:55:40,820 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1830, Invalid=1830, Unknown=0, NotChecked=0, Total=3660 [2018-02-02 09:55:40,820 INFO L87 Difference]: Start difference. First operand 140 states and 144 transitions. Second operand 61 states. [2018-02-02 09:55:40,905 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:55:40,905 INFO L93 Difference]: Finished difference Result 143 states and 147 transitions. [2018-02-02 09:55:40,905 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 61 states. [2018-02-02 09:55:40,905 INFO L78 Accepts]: Start accepts. Automaton has 61 states. Word has length 135 [2018-02-02 09:55:40,905 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:55:40,905 INFO L225 Difference]: With dead ends: 143 [2018-02-02 09:55:40,905 INFO L226 Difference]: Without dead ends: 141 [2018-02-02 09:55:40,906 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 61 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 59 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 114 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=1830, Invalid=1830, Unknown=0, NotChecked=0, Total=3660 [2018-02-02 09:55:40,906 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 141 states. [2018-02-02 09:55:40,907 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 141 to 141. [2018-02-02 09:55:40,907 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 141 states. [2018-02-02 09:55:40,907 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 141 states to 141 states and 145 transitions. [2018-02-02 09:55:40,907 INFO L78 Accepts]: Start accepts. Automaton has 141 states and 145 transitions. Word has length 135 [2018-02-02 09:55:40,907 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:55:40,907 INFO L432 AbstractCegarLoop]: Abstraction has 141 states and 145 transitions. [2018-02-02 09:55:40,907 INFO L433 AbstractCegarLoop]: Interpolant automaton has 61 states. [2018-02-02 09:55:40,907 INFO L276 IsEmpty]: Start isEmpty. Operand 141 states and 145 transitions. [2018-02-02 09:55:40,908 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 137 [2018-02-02 09:55:40,908 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:55:40,908 INFO L351 BasicCegarLoop]: trace histogram [58, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:55:40,908 INFO L371 AbstractCegarLoop]: === Iteration 78 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-02 09:55:40,908 INFO L82 PathProgramCache]: Analyzing trace with hash 75138496, now seen corresponding path program 58 times [2018-02-02 09:55:40,909 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-02 09:55:40,932 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:55:40,933 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:55:42,014 INFO L134 CoverageAnalysis]: Checked inductivity of 1765 backedges. 0 proven. 1711 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-02 09:55:42,014 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-02 09:55:42,014 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [62] total 62 [2018-02-02 09:55:42,015 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-02 09:55:42,015 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 09:55:42,015 INFO L182 omatonBuilderFactory]: Interpolants [18191#true, 18192#false, 18193#(or (not (= |#Ultimate.C_memset_#amount| 94)) (= |#Ultimate.C_memset_#t~loopctr21| 0)), 18194#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 1)), 18195#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 2)), 18196#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 3)), 18197#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 4)), 18198#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 5)), 18199#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 6)), 18200#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 7)), 18201#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 8)), 18202#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 9)), 18203#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 10)), 18204#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 11)), 18205#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 12)), 18206#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 13)), 18207#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 14)), 18208#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 15)), 18209#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 16)), 18210#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 17)), 18211#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 18)), 18212#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 19)), 18213#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 20)), 18214#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 21)), 18215#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 22)), 18216#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 23)), 18217#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 24)), 18218#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 25)), 18219#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 26)), 18220#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 27)), 18221#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 28)), 18222#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 29)), 18223#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 30)), 18224#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 31)), 18225#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 32)), 18226#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 33)), 18227#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 34)), 18228#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 35)), 18229#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 36)), 18230#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 37)), 18231#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 38)), 18232#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 39)), 18233#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 40)), 18234#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 41)), 18235#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 42)), 18236#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 43)), 18237#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 44)), 18238#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 45)), 18239#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 46)), 18240#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 47)), 18241#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 48)), 18242#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 49)), 18243#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 50)), 18244#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 51)), 18245#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 52)), 18246#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 53)), 18247#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 54)), 18248#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 55)), 18249#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 56)), 18250#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 57)), 18251#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 58)), 18252#(not (= |#Ultimate.C_memset_#amount| 94))] [2018-02-02 09:55:42,015 INFO L134 CoverageAnalysis]: Checked inductivity of 1765 backedges. 0 proven. 1711 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-02 09:55:42,015 INFO L409 AbstractCegarLoop]: Interpolant automaton has 62 states [2018-02-02 09:55:42,016 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 62 interpolants. [2018-02-02 09:55:42,016 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1891, Invalid=1891, Unknown=0, NotChecked=0, Total=3782 [2018-02-02 09:55:42,016 INFO L87 Difference]: Start difference. First operand 141 states and 145 transitions. Second operand 62 states. [2018-02-02 09:55:42,113 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:55:42,113 INFO L93 Difference]: Finished difference Result 144 states and 148 transitions. [2018-02-02 09:55:42,113 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 62 states. [2018-02-02 09:55:42,113 INFO L78 Accepts]: Start accepts. Automaton has 62 states. Word has length 136 [2018-02-02 09:55:42,113 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:55:42,114 INFO L225 Difference]: With dead ends: 144 [2018-02-02 09:55:42,114 INFO L226 Difference]: Without dead ends: 142 [2018-02-02 09:55:42,114 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 62 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 60 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 116 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=1891, Invalid=1891, Unknown=0, NotChecked=0, Total=3782 [2018-02-02 09:55:42,114 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 142 states. [2018-02-02 09:55:42,115 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 142 to 142. [2018-02-02 09:55:42,115 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 142 states. [2018-02-02 09:55:42,115 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 142 states to 142 states and 146 transitions. [2018-02-02 09:55:42,115 INFO L78 Accepts]: Start accepts. Automaton has 142 states and 146 transitions. Word has length 136 [2018-02-02 09:55:42,115 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:55:42,116 INFO L432 AbstractCegarLoop]: Abstraction has 142 states and 146 transitions. [2018-02-02 09:55:42,116 INFO L433 AbstractCegarLoop]: Interpolant automaton has 62 states. [2018-02-02 09:55:42,116 INFO L276 IsEmpty]: Start isEmpty. Operand 142 states and 146 transitions. [2018-02-02 09:55:42,116 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 138 [2018-02-02 09:55:42,116 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:55:42,116 INFO L351 BasicCegarLoop]: trace histogram [59, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:55:42,116 INFO L371 AbstractCegarLoop]: === Iteration 79 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-02 09:55:42,116 INFO L82 PathProgramCache]: Analyzing trace with hash -432971245, now seen corresponding path program 59 times [2018-02-02 09:55:42,117 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-02 09:55:42,139 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:55:42,139 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:55:43,244 INFO L134 CoverageAnalysis]: Checked inductivity of 1824 backedges. 0 proven. 1770 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-02 09:55:43,244 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-02 09:55:43,244 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [63] total 63 [2018-02-02 09:55:43,244 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-02 09:55:43,244 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 09:55:43,244 INFO L182 omatonBuilderFactory]: Interpolants [18560#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 19)), 18561#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 20)), 18562#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 21)), 18563#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 22)), 18564#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 23)), 18565#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 24)), 18566#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 25)), 18567#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 26)), 18568#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 27)), 18569#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 28)), 18570#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 29)), 18571#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 30)), 18572#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 31)), 18573#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 32)), 18574#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 33)), 18575#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 34)), 18576#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 35)), 18577#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 36)), 18578#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 37)), 18579#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 38)), 18580#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 39)), 18581#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 40)), 18582#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 41)), 18583#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 42)), 18584#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 43)), 18585#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 44)), 18586#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 45)), 18587#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 46)), 18588#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 47)), 18589#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 48)), 18590#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 49)), 18591#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 50)), 18592#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 51)), 18593#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 52)), 18594#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 53)), 18595#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 54)), 18596#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 55)), 18597#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 56)), 18598#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 57)), 18599#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 58)), 18600#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 59)), 18601#(not (= |#Ultimate.C_memset_#amount| 94)), 18539#true, 18540#false, 18541#(or (not (= |#Ultimate.C_memset_#amount| 94)) (= |#Ultimate.C_memset_#t~loopctr21| 0)), 18542#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 1)), 18543#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 2)), 18544#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 3)), 18545#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 4)), 18546#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 5)), 18547#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 6)), 18548#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 7)), 18549#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 8)), 18550#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 9)), 18551#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 10)), 18552#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 11)), 18553#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 12)), 18554#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 13)), 18555#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 14)), 18556#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 15)), 18557#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 16)), 18558#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 17)), 18559#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 18))] [2018-02-02 09:55:43,245 INFO L134 CoverageAnalysis]: Checked inductivity of 1824 backedges. 0 proven. 1770 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-02 09:55:43,245 INFO L409 AbstractCegarLoop]: Interpolant automaton has 63 states [2018-02-02 09:55:43,245 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 63 interpolants. [2018-02-02 09:55:43,245 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1953, Invalid=1953, Unknown=0, NotChecked=0, Total=3906 [2018-02-02 09:55:43,245 INFO L87 Difference]: Start difference. First operand 142 states and 146 transitions. Second operand 63 states. [2018-02-02 09:55:43,310 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:55:43,310 INFO L93 Difference]: Finished difference Result 145 states and 149 transitions. [2018-02-02 09:55:43,311 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 63 states. [2018-02-02 09:55:43,311 INFO L78 Accepts]: Start accepts. Automaton has 63 states. Word has length 137 [2018-02-02 09:55:43,311 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:55:43,312 INFO L225 Difference]: With dead ends: 145 [2018-02-02 09:55:43,312 INFO L226 Difference]: Without dead ends: 143 [2018-02-02 09:55:43,312 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 63 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 61 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 118 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=1953, Invalid=1953, Unknown=0, NotChecked=0, Total=3906 [2018-02-02 09:55:43,313 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 143 states. [2018-02-02 09:55:43,313 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 143 to 143. [2018-02-02 09:55:43,313 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 143 states. [2018-02-02 09:55:43,314 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 143 states to 143 states and 147 transitions. [2018-02-02 09:55:43,314 INFO L78 Accepts]: Start accepts. Automaton has 143 states and 147 transitions. Word has length 137 [2018-02-02 09:55:43,314 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:55:43,314 INFO L432 AbstractCegarLoop]: Abstraction has 143 states and 147 transitions. [2018-02-02 09:55:43,314 INFO L433 AbstractCegarLoop]: Interpolant automaton has 63 states. [2018-02-02 09:55:43,314 INFO L276 IsEmpty]: Start isEmpty. Operand 143 states and 147 transitions. [2018-02-02 09:55:43,314 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 139 [2018-02-02 09:55:43,314 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:55:43,314 INFO L351 BasicCegarLoop]: trace histogram [60, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:55:43,314 INFO L371 AbstractCegarLoop]: === Iteration 80 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-02 09:55:43,315 INFO L82 PathProgramCache]: Analyzing trace with hash 995495968, now seen corresponding path program 60 times [2018-02-02 09:55:43,315 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-02 09:55:43,339 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:55:43,340 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:55:44,446 INFO L134 CoverageAnalysis]: Checked inductivity of 1884 backedges. 0 proven. 1830 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-02 09:55:44,446 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-02 09:55:44,446 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [64] total 64 [2018-02-02 09:55:44,447 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-02 09:55:44,447 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 09:55:44,447 INFO L182 omatonBuilderFactory]: Interpolants [18944#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 52)), 18945#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 53)), 18946#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 54)), 18947#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 55)), 18948#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 56)), 18949#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 57)), 18950#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 58)), 18951#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 59)), 18952#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 60)), 18953#(not (= |#Ultimate.C_memset_#amount| 94)), 18890#true, 18891#false, 18892#(or (not (= |#Ultimate.C_memset_#amount| 94)) (= |#Ultimate.C_memset_#t~loopctr21| 0)), 18893#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 1)), 18894#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 2)), 18895#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 3)), 18896#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 4)), 18897#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 5)), 18898#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 6)), 18899#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 7)), 18900#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 8)), 18901#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 9)), 18902#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 10)), 18903#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 11)), 18904#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 12)), 18905#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 13)), 18906#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 14)), 18907#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 15)), 18908#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 16)), 18909#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 17)), 18910#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 18)), 18911#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 19)), 18912#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 20)), 18913#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 21)), 18914#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 22)), 18915#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 23)), 18916#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 24)), 18917#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 25)), 18918#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 26)), 18919#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 27)), 18920#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 28)), 18921#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 29)), 18922#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 30)), 18923#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 31)), 18924#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 32)), 18925#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 33)), 18926#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 34)), 18927#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 35)), 18928#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 36)), 18929#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 37)), 18930#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 38)), 18931#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 39)), 18932#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 40)), 18933#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 41)), 18934#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 42)), 18935#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 43)), 18936#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 44)), 18937#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 45)), 18938#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 46)), 18939#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 47)), 18940#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 48)), 18941#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 49)), 18942#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 50)), 18943#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 51))] [2018-02-02 09:55:44,447 INFO L134 CoverageAnalysis]: Checked inductivity of 1884 backedges. 0 proven. 1830 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-02 09:55:44,447 INFO L409 AbstractCegarLoop]: Interpolant automaton has 64 states [2018-02-02 09:55:44,448 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 64 interpolants. [2018-02-02 09:55:44,448 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2016, Invalid=2016, Unknown=0, NotChecked=0, Total=4032 [2018-02-02 09:55:44,448 INFO L87 Difference]: Start difference. First operand 143 states and 147 transitions. Second operand 64 states. [2018-02-02 09:55:44,495 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:55:44,495 INFO L93 Difference]: Finished difference Result 146 states and 150 transitions. [2018-02-02 09:55:44,495 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 64 states. [2018-02-02 09:55:44,495 INFO L78 Accepts]: Start accepts. Automaton has 64 states. Word has length 138 [2018-02-02 09:55:44,495 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:55:44,496 INFO L225 Difference]: With dead ends: 146 [2018-02-02 09:55:44,496 INFO L226 Difference]: Without dead ends: 144 [2018-02-02 09:55:44,496 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 64 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 62 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 120 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=2016, Invalid=2016, Unknown=0, NotChecked=0, Total=4032 [2018-02-02 09:55:44,496 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 144 states. [2018-02-02 09:55:44,497 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 144 to 144. [2018-02-02 09:55:44,497 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 144 states. [2018-02-02 09:55:44,497 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 144 states to 144 states and 148 transitions. [2018-02-02 09:55:44,497 INFO L78 Accepts]: Start accepts. Automaton has 144 states and 148 transitions. Word has length 138 [2018-02-02 09:55:44,497 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:55:44,497 INFO L432 AbstractCegarLoop]: Abstraction has 144 states and 148 transitions. [2018-02-02 09:55:44,497 INFO L433 AbstractCegarLoop]: Interpolant automaton has 64 states. [2018-02-02 09:55:44,497 INFO L276 IsEmpty]: Start isEmpty. Operand 144 states and 148 transitions. [2018-02-02 09:55:44,498 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 140 [2018-02-02 09:55:44,498 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:55:44,498 INFO L351 BasicCegarLoop]: trace histogram [61, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:55:44,498 INFO L371 AbstractCegarLoop]: === Iteration 81 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-02 09:55:44,498 INFO L82 PathProgramCache]: Analyzing trace with hash -1966660685, now seen corresponding path program 61 times [2018-02-02 09:55:44,498 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-02 09:55:44,522 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:55:44,523 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:55:45,813 INFO L134 CoverageAnalysis]: Checked inductivity of 1945 backedges. 0 proven. 1891 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-02 09:55:45,814 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-02 09:55:45,814 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [65] total 65 [2018-02-02 09:55:45,814 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-02 09:55:45,814 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 09:55:45,814 INFO L182 omatonBuilderFactory]: Interpolants [19244#true, 19245#false, 19246#(or (not (= |#Ultimate.C_memset_#amount| 94)) (= |#Ultimate.C_memset_#t~loopctr21| 0)), 19247#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 1)), 19248#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 2)), 19249#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 3)), 19250#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 4)), 19251#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 5)), 19252#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 6)), 19253#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 7)), 19254#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 8)), 19255#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 9)), 19256#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 10)), 19257#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 11)), 19258#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 12)), 19259#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 13)), 19260#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 14)), 19261#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 15)), 19262#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 16)), 19263#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 17)), 19264#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 18)), 19265#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 19)), 19266#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 20)), 19267#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 21)), 19268#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 22)), 19269#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 23)), 19270#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 24)), 19271#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 25)), 19272#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 26)), 19273#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 27)), 19274#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 28)), 19275#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 29)), 19276#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 30)), 19277#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 31)), 19278#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 32)), 19279#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 33)), 19280#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 34)), 19281#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 35)), 19282#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 36)), 19283#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 37)), 19284#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 38)), 19285#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 39)), 19286#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 40)), 19287#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 41)), 19288#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 42)), 19289#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 43)), 19290#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 44)), 19291#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 45)), 19292#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 46)), 19293#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 47)), 19294#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 48)), 19295#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 49)), 19296#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 50)), 19297#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 51)), 19298#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 52)), 19299#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 53)), 19300#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 54)), 19301#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 55)), 19302#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 56)), 19303#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 57)), 19304#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 58)), 19305#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 59)), 19306#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 60)), 19307#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 61)), 19308#(not (= |#Ultimate.C_memset_#amount| 94))] [2018-02-02 09:55:45,814 INFO L134 CoverageAnalysis]: Checked inductivity of 1945 backedges. 0 proven. 1891 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-02 09:55:45,814 INFO L409 AbstractCegarLoop]: Interpolant automaton has 65 states [2018-02-02 09:55:45,815 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 65 interpolants. [2018-02-02 09:55:45,815 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2080, Invalid=2080, Unknown=0, NotChecked=0, Total=4160 [2018-02-02 09:55:45,815 INFO L87 Difference]: Start difference. First operand 144 states and 148 transitions. Second operand 65 states. [2018-02-02 09:55:45,920 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:55:45,920 INFO L93 Difference]: Finished difference Result 147 states and 151 transitions. [2018-02-02 09:55:45,920 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 65 states. [2018-02-02 09:55:45,920 INFO L78 Accepts]: Start accepts. Automaton has 65 states. Word has length 139 [2018-02-02 09:55:45,920 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:55:45,921 INFO L225 Difference]: With dead ends: 147 [2018-02-02 09:55:45,921 INFO L226 Difference]: Without dead ends: 145 [2018-02-02 09:55:45,921 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 65 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 63 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 122 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=2080, Invalid=2080, Unknown=0, NotChecked=0, Total=4160 [2018-02-02 09:55:45,921 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 145 states. [2018-02-02 09:55:45,922 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 145 to 145. [2018-02-02 09:55:45,922 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 145 states. [2018-02-02 09:55:45,922 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 145 states to 145 states and 149 transitions. [2018-02-02 09:55:45,922 INFO L78 Accepts]: Start accepts. Automaton has 145 states and 149 transitions. Word has length 139 [2018-02-02 09:55:45,922 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:55:45,922 INFO L432 AbstractCegarLoop]: Abstraction has 145 states and 149 transitions. [2018-02-02 09:55:45,922 INFO L433 AbstractCegarLoop]: Interpolant automaton has 65 states. [2018-02-02 09:55:45,922 INFO L276 IsEmpty]: Start isEmpty. Operand 145 states and 149 transitions. [2018-02-02 09:55:45,923 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 141 [2018-02-02 09:55:45,923 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:55:45,923 INFO L351 BasicCegarLoop]: trace histogram [62, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:55:45,923 INFO L371 AbstractCegarLoop]: === Iteration 82 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-02 09:55:45,923 INFO L82 PathProgramCache]: Analyzing trace with hash 695763584, now seen corresponding path program 62 times [2018-02-02 09:55:45,923 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-02 09:55:45,944 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:55:45,944 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:55:47,093 INFO L134 CoverageAnalysis]: Checked inductivity of 2007 backedges. 0 proven. 1953 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-02 09:55:47,094 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-02 09:55:47,094 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [66] total 66 [2018-02-02 09:55:47,094 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-02 09:55:47,094 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 09:55:47,094 INFO L182 omatonBuilderFactory]: Interpolants [19601#true, 19602#false, 19603#(or (not (= |#Ultimate.C_memset_#amount| 94)) (= |#Ultimate.C_memset_#t~loopctr21| 0)), 19604#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 1)), 19605#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 2)), 19606#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 3)), 19607#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 4)), 19608#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 5)), 19609#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 6)), 19610#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 7)), 19611#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 8)), 19612#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 9)), 19613#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 10)), 19614#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 11)), 19615#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 12)), 19616#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 13)), 19617#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 14)), 19618#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 15)), 19619#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 16)), 19620#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 17)), 19621#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 18)), 19622#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 19)), 19623#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 20)), 19624#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 21)), 19625#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 22)), 19626#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 23)), 19627#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 24)), 19628#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 25)), 19629#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 26)), 19630#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 27)), 19631#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 28)), 19632#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 29)), 19633#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 30)), 19634#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 31)), 19635#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 32)), 19636#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 33)), 19637#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 34)), 19638#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 35)), 19639#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 36)), 19640#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 37)), 19641#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 38)), 19642#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 39)), 19643#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 40)), 19644#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 41)), 19645#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 42)), 19646#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 43)), 19647#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 44)), 19648#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 45)), 19649#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 46)), 19650#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 47)), 19651#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 48)), 19652#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 49)), 19653#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 50)), 19654#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 51)), 19655#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 52)), 19656#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 53)), 19657#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 54)), 19658#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 55)), 19659#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 56)), 19660#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 57)), 19661#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 58)), 19662#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 59)), 19663#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 60)), 19664#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 61)), 19665#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 62)), 19666#(not (= |#Ultimate.C_memset_#amount| 94))] [2018-02-02 09:55:47,094 INFO L134 CoverageAnalysis]: Checked inductivity of 2007 backedges. 0 proven. 1953 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-02 09:55:47,094 INFO L409 AbstractCegarLoop]: Interpolant automaton has 66 states [2018-02-02 09:55:47,095 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 66 interpolants. [2018-02-02 09:55:47,095 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2145, Invalid=2145, Unknown=0, NotChecked=0, Total=4290 [2018-02-02 09:55:47,095 INFO L87 Difference]: Start difference. First operand 145 states and 149 transitions. Second operand 66 states. [2018-02-02 09:55:47,188 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:55:47,189 INFO L93 Difference]: Finished difference Result 148 states and 152 transitions. [2018-02-02 09:55:47,189 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 66 states. [2018-02-02 09:55:47,189 INFO L78 Accepts]: Start accepts. Automaton has 66 states. Word has length 140 [2018-02-02 09:55:47,189 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:55:47,190 INFO L225 Difference]: With dead ends: 148 [2018-02-02 09:55:47,190 INFO L226 Difference]: Without dead ends: 146 [2018-02-02 09:55:47,190 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 66 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 64 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 124 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=2145, Invalid=2145, Unknown=0, NotChecked=0, Total=4290 [2018-02-02 09:55:47,191 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 146 states. [2018-02-02 09:55:47,191 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 146 to 146. [2018-02-02 09:55:47,192 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 146 states. [2018-02-02 09:55:47,192 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 146 states to 146 states and 150 transitions. [2018-02-02 09:55:47,192 INFO L78 Accepts]: Start accepts. Automaton has 146 states and 150 transitions. Word has length 140 [2018-02-02 09:55:47,192 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:55:47,192 INFO L432 AbstractCegarLoop]: Abstraction has 146 states and 150 transitions. [2018-02-02 09:55:47,192 INFO L433 AbstractCegarLoop]: Interpolant automaton has 66 states. [2018-02-02 09:55:47,192 INFO L276 IsEmpty]: Start isEmpty. Operand 146 states and 150 transitions. [2018-02-02 09:55:47,192 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 142 [2018-02-02 09:55:47,193 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:55:47,193 INFO L351 BasicCegarLoop]: trace histogram [63, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:55:47,193 INFO L371 AbstractCegarLoop]: === Iteration 83 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-02 09:55:47,193 INFO L82 PathProgramCache]: Analyzing trace with hash 1626537299, now seen corresponding path program 63 times [2018-02-02 09:55:47,193 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-02 09:55:47,227 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:55:47,228 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-02 09:55:48,908 INFO L134 CoverageAnalysis]: Checked inductivity of 2070 backedges. 0 proven. 2016 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-02 09:55:48,909 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-02 09:55:48,909 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [67] total 67 [2018-02-02 09:55:48,909 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-02 09:55:48,909 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-02 09:55:48,909 INFO L182 omatonBuilderFactory]: Interpolants [19968#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 5)), 19969#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 6)), 19970#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 7)), 19971#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 8)), 19972#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 9)), 19973#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 10)), 19974#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 11)), 19975#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 12)), 19976#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 13)), 19977#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 14)), 19978#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 15)), 19979#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 16)), 19980#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 17)), 19981#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 18)), 19982#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 19)), 19983#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 20)), 19984#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 21)), 19985#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 22)), 19986#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 23)), 19987#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 24)), 19988#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 25)), 19989#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 26)), 19990#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 27)), 19991#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 28)), 19992#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 29)), 19993#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 30)), 19994#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 31)), 19995#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 32)), 19996#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 33)), 19997#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 34)), 19998#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 35)), 19999#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 36)), 20000#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 37)), 20001#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 38)), 20002#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 39)), 20003#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 40)), 20004#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 41)), 20005#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 42)), 20006#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 43)), 20007#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 44)), 20008#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 45)), 20009#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 46)), 20010#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 47)), 20011#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 48)), 20012#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 49)), 20013#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 50)), 20014#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 51)), 20015#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 52)), 20016#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 53)), 20017#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 54)), 20018#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 55)), 20019#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 56)), 20020#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 57)), 20021#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 58)), 20022#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 59)), 20023#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 60)), 20024#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 61)), 20025#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 62)), 20026#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 63)), 20027#(not (= |#Ultimate.C_memset_#amount| 94)), 19961#true, 19962#false, 19963#(or (not (= |#Ultimate.C_memset_#amount| 94)) (= |#Ultimate.C_memset_#t~loopctr21| 0)), 19964#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 1)), 19965#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 2)), 19966#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 3)), 19967#(or (not (= |#Ultimate.C_memset_#amount| 94)) (<= |#Ultimate.C_memset_#t~loopctr21| 4))] [2018-02-02 09:55:48,910 INFO L134 CoverageAnalysis]: Checked inductivity of 2070 backedges. 0 proven. 2016 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-02 09:55:48,910 INFO L409 AbstractCegarLoop]: Interpolant automaton has 67 states [2018-02-02 09:55:48,910 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 67 interpolants. [2018-02-02 09:55:48,910 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2211, Invalid=2211, Unknown=0, NotChecked=0, Total=4422 [2018-02-02 09:55:48,910 INFO L87 Difference]: Start difference. First operand 146 states and 150 transitions. Second operand 67 states. [2018-02-02 09:55:49,016 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-02 09:55:49,016 INFO L93 Difference]: Finished difference Result 149 states and 153 transitions. [2018-02-02 09:55:49,017 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 67 states. [2018-02-02 09:55:49,017 INFO L78 Accepts]: Start accepts. Automaton has 67 states. Word has length 141 [2018-02-02 09:55:49,017 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-02 09:55:49,017 INFO L225 Difference]: With dead ends: 149 [2018-02-02 09:55:49,017 INFO L226 Difference]: Without dead ends: 147 [2018-02-02 09:55:49,018 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 67 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 65 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 126 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=2211, Invalid=2211, Unknown=0, NotChecked=0, Total=4422 [2018-02-02 09:55:49,018 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 147 states. [2018-02-02 09:55:49,019 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 147 to 147. [2018-02-02 09:55:49,019 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 147 states. [2018-02-02 09:55:49,019 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 147 states to 147 states and 151 transitions. [2018-02-02 09:55:49,019 INFO L78 Accepts]: Start accepts. Automaton has 147 states and 151 transitions. Word has length 141 [2018-02-02 09:55:49,019 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-02 09:55:49,020 INFO L432 AbstractCegarLoop]: Abstraction has 147 states and 151 transitions. [2018-02-02 09:55:49,020 INFO L433 AbstractCegarLoop]: Interpolant automaton has 67 states. [2018-02-02 09:55:49,020 INFO L276 IsEmpty]: Start isEmpty. Operand 147 states and 151 transitions. [2018-02-02 09:55:49,020 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 143 [2018-02-02 09:55:49,020 INFO L343 BasicCegarLoop]: Found error trace [2018-02-02 09:55:49,020 INFO L351 BasicCegarLoop]: trace histogram [64, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-02 09:55:49,020 INFO L371 AbstractCegarLoop]: === Iteration 84 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-02 09:55:49,020 INFO L82 PathProgramCache]: Analyzing trace with hash 415751392, now seen corresponding path program 64 times [2018-02-02 09:55:49,021 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-02 09:55:49,045 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-02 09:55:49,046 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. Received shutdown request... [2018-02-02 09:55:49,172 WARN L491 AbstractCegarLoop]: Verification canceled [2018-02-02 09:55:49,176 WARN L185 ceAbstractionStarter]: Timeout [2018-02-02 09:55:49,176 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 02.02 09:55:49 BoogieIcfgContainer [2018-02-02 09:55:49,176 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-02-02 09:55:49,177 INFO L168 Benchmark]: Toolchain (without parser) took 44476.41 ms. Allocated memory was 407.9 MB in the beginning and 2.4 GB in the end (delta: 1.9 GB). Free memory was 364.8 MB in the beginning and 1.5 GB in the end (delta: -1.2 GB). Peak memory consumption was 792.1 MB. Max. memory is 5.3 GB. [2018-02-02 09:55:49,178 INFO L168 Benchmark]: CDTParser took 0.14 ms. Allocated memory is still 407.9 MB. Free memory is still 371.4 MB. There was no memory consumed. Max. memory is 5.3 GB. [2018-02-02 09:55:49,178 INFO L168 Benchmark]: CACSL2BoogieTranslator took 167.20 ms. Allocated memory is still 407.9 MB. Free memory was 364.8 MB in the beginning and 354.2 MB in the end (delta: 10.6 MB). Peak memory consumption was 10.6 MB. Max. memory is 5.3 GB. [2018-02-02 09:55:49,178 INFO L168 Benchmark]: Boogie Preprocessor took 23.98 ms. Allocated memory is still 407.9 MB. Free memory was 354.2 MB in the beginning and 351.6 MB in the end (delta: 2.6 MB). Peak memory consumption was 2.6 MB. Max. memory is 5.3 GB. [2018-02-02 09:55:49,179 INFO L168 Benchmark]: RCFGBuilder took 291.68 ms. Allocated memory is still 407.9 MB. Free memory was 351.6 MB in the beginning and 328.1 MB in the end (delta: 23.5 MB). Peak memory consumption was 23.5 MB. Max. memory is 5.3 GB. [2018-02-02 09:55:49,179 INFO L168 Benchmark]: TraceAbstraction took 43990.34 ms. Allocated memory was 407.9 MB in the beginning and 2.4 GB in the end (delta: 1.9 GB). Free memory was 328.1 MB in the beginning and 1.5 GB in the end (delta: -1.2 GB). Peak memory consumption was 755.4 MB. Max. memory is 5.3 GB. [2018-02-02 09:55:49,180 INFO L344 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.14 ms. Allocated memory is still 407.9 MB. Free memory is still 371.4 MB. There was no memory consumed. Max. memory is 5.3 GB. * CACSL2BoogieTranslator took 167.20 ms. Allocated memory is still 407.9 MB. Free memory was 364.8 MB in the beginning and 354.2 MB in the end (delta: 10.6 MB). Peak memory consumption was 10.6 MB. Max. memory is 5.3 GB. * Boogie Preprocessor took 23.98 ms. Allocated memory is still 407.9 MB. Free memory was 354.2 MB in the beginning and 351.6 MB in the end (delta: 2.6 MB). Peak memory consumption was 2.6 MB. Max. memory is 5.3 GB. * RCFGBuilder took 291.68 ms. Allocated memory is still 407.9 MB. Free memory was 351.6 MB in the beginning and 328.1 MB in the end (delta: 23.5 MB). Peak memory consumption was 23.5 MB. Max. memory is 5.3 GB. * TraceAbstraction took 43990.34 ms. Allocated memory was 407.9 MB in the beginning and 2.4 GB in the end (delta: 1.9 GB). Free memory was 328.1 MB in the beginning and 1.5 GB in the end (delta: -1.2 GB). Peak memory consumption was 755.4 MB. Max. memory is 5.3 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 663). Cancelled while BasicCegarLoop was analyzing trace of length 143 with TraceHistMax 64, while InterpolatingTraceCheckCraig was constructing Craig interpolants, while NestedInterpolantsBuilder was constructing predicates for 141 interpolants. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 662). Cancelled while BasicCegarLoop was analyzing trace of length 143 with TraceHistMax 64, while InterpolatingTraceCheckCraig was constructing Craig interpolants, while NestedInterpolantsBuilder was constructing predicates for 141 interpolants. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 662). Cancelled while BasicCegarLoop was analyzing trace of length 143 with TraceHistMax 64, while InterpolatingTraceCheckCraig was constructing Craig interpolants, while NestedInterpolantsBuilder was constructing predicates for 141 interpolants. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 663). Cancelled while BasicCegarLoop was analyzing trace of length 143 with TraceHistMax 64, while InterpolatingTraceCheckCraig was constructing Craig interpolants, while NestedInterpolantsBuilder was constructing predicates for 141 interpolants. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 653). Cancelled while BasicCegarLoop was analyzing trace of length 143 with TraceHistMax 64, while InterpolatingTraceCheckCraig was constructing Craig interpolants, while NestedInterpolantsBuilder was constructing predicates for 141 interpolants. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 653). Cancelled while BasicCegarLoop was analyzing trace of length 143 with TraceHistMax 64, while InterpolatingTraceCheckCraig was constructing Craig interpolants, while NestedInterpolantsBuilder was constructing predicates for 141 interpolants. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 652). Cancelled while BasicCegarLoop was analyzing trace of length 143 with TraceHistMax 64, while InterpolatingTraceCheckCraig was constructing Craig interpolants, while NestedInterpolantsBuilder was constructing predicates for 141 interpolants. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 652). Cancelled while BasicCegarLoop was analyzing trace of length 143 with TraceHistMax 64, while InterpolatingTraceCheckCraig was constructing Craig interpolants, while NestedInterpolantsBuilder was constructing predicates for 141 interpolants. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 674). Cancelled while BasicCegarLoop was analyzing trace of length 143 with TraceHistMax 64, while InterpolatingTraceCheckCraig was constructing Craig interpolants, while NestedInterpolantsBuilder was constructing predicates for 141 interpolants. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 678). Cancelled while BasicCegarLoop was analyzing trace of length 143 with TraceHistMax 64, while InterpolatingTraceCheckCraig was constructing Craig interpolants, while NestedInterpolantsBuilder was constructing predicates for 141 interpolants. - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 672). Cancelled while BasicCegarLoop was analyzing trace of length 143 with TraceHistMax 64, while InterpolatingTraceCheckCraig was constructing Craig interpolants, while NestedInterpolantsBuilder was constructing predicates for 141 interpolants. - TimeoutResultAtElement [Line: 670]: Timeout (TraceAbstraction) Unable to prove that all allocated memory was freed (line 670). Cancelled while BasicCegarLoop was analyzing trace of length 143 with TraceHistMax 64, while InterpolatingTraceCheckCraig was constructing Craig interpolants, while NestedInterpolantsBuilder was constructing predicates for 141 interpolants. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 676). Cancelled while BasicCegarLoop was analyzing trace of length 143 with TraceHistMax 64, while InterpolatingTraceCheckCraig was constructing Craig interpolants, while NestedInterpolantsBuilder was constructing predicates for 141 interpolants. - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 672). Cancelled while BasicCegarLoop was analyzing trace of length 143 with TraceHistMax 64, while InterpolatingTraceCheckCraig was constructing Craig interpolants, while NestedInterpolantsBuilder was constructing predicates for 141 interpolants. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 673). Cancelled while BasicCegarLoop was analyzing trace of length 143 with TraceHistMax 64, while InterpolatingTraceCheckCraig was constructing Craig interpolants, while NestedInterpolantsBuilder was constructing predicates for 141 interpolants. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 675). Cancelled while BasicCegarLoop was analyzing trace of length 143 with TraceHistMax 64, while InterpolatingTraceCheckCraig was constructing Craig interpolants, while NestedInterpolantsBuilder was constructing predicates for 141 interpolants. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 677). Cancelled while BasicCegarLoop was analyzing trace of length 143 with TraceHistMax 64, while InterpolatingTraceCheckCraig was constructing Craig interpolants, while NestedInterpolantsBuilder was constructing predicates for 141 interpolants. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 676). Cancelled while BasicCegarLoop was analyzing trace of length 143 with TraceHistMax 64, while InterpolatingTraceCheckCraig was constructing Craig interpolants, while NestedInterpolantsBuilder was constructing predicates for 141 interpolants. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 677). Cancelled while BasicCegarLoop was analyzing trace of length 143 with TraceHistMax 64, while InterpolatingTraceCheckCraig was constructing Craig interpolants, while NestedInterpolantsBuilder was constructing predicates for 141 interpolants. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 679). Cancelled while BasicCegarLoop was analyzing trace of length 143 with TraceHistMax 64, while InterpolatingTraceCheckCraig was constructing Craig interpolants, while NestedInterpolantsBuilder was constructing predicates for 141 interpolants. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 673). Cancelled while BasicCegarLoop was analyzing trace of length 143 with TraceHistMax 64, while InterpolatingTraceCheckCraig was constructing Craig interpolants, while NestedInterpolantsBuilder was constructing predicates for 141 interpolants. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 674). Cancelled while BasicCegarLoop was analyzing trace of length 143 with TraceHistMax 64, while InterpolatingTraceCheckCraig was constructing Craig interpolants, while NestedInterpolantsBuilder was constructing predicates for 141 interpolants. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 678). Cancelled while BasicCegarLoop was analyzing trace of length 143 with TraceHistMax 64, while InterpolatingTraceCheckCraig was constructing Craig interpolants, while NestedInterpolantsBuilder was constructing predicates for 141 interpolants. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 675). Cancelled while BasicCegarLoop was analyzing trace of length 143 with TraceHistMax 64, while InterpolatingTraceCheckCraig was constructing Craig interpolants, while NestedInterpolantsBuilder was constructing predicates for 141 interpolants. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 679). Cancelled while BasicCegarLoop was analyzing trace of length 143 with TraceHistMax 64, while InterpolatingTraceCheckCraig was constructing Craig interpolants, while NestedInterpolantsBuilder was constructing predicates for 141 interpolants. - StatisticsResult: Ultimate Automizer benchmark data CFG has 7 procedures, 80 locations, 25 error locations. TIMEOUT Result, 43.9s OverallTime, 84 OverallIterations, 64 TraceHistogramMax, 5.9s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 4501 SDtfs, 743 SDslu, 85657 SDs, 0 SdLazy, 9413 SolverSat, 467 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 3.5s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 2548 GetRequests, 155 SyntacticMatches, 67 SemanticMatches, 2326 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4288 ImplicationChecksByTransitivity, 30.8s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=147occurred in iteration=83, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 3541/47307 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.2s AutomataMinimizationTime, 83 MinimizatonAttempts, 34 StatesRemovedByMinimization, 9 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.1s SsaConstructionTime, 1.1s SatisfiabilityAnalysisTime, 35.3s InterpolantComputationTime, 7793 NumberOfCodeBlocks, 7793 NumberOfCodeBlocksAsserted, 83 NumberOfCheckSat, 7710 ConstructedInterpolants, 0 QuantifiedInterpolants, 2791250 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 83 InterpolantComputations, 9 PerfectInterpolantSequences, 3541/47307 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: Timeout Written .csv to /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/20051113-1.c_false-valid-memtrack.i_svcomp-DerefFreeMemtrack-32bit-Automizer_SmtInterpol_Array.epf_AutomizerC.xml/Csv-Benchmark-0-2018-02-02_09-55-49-186.csv Written .csv to /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/20051113-1.c_false-valid-memtrack.i_svcomp-DerefFreeMemtrack-32bit-Automizer_SmtInterpol_Array.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-0-2018-02-02_09-55-49-186.csv Completed graceful shutdown