java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/cade18-smtinterpol/svcomp-DerefFreeMemtrack-32bit-Automizer_Camel.epf -i ../../../trunk/examples/svcomp/ldv-memsafety/memleaks_test22_3_false-valid-deref.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-ccafca9-m [2018-02-04 00:21:41,573 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-02-04 00:21:41,574 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-02-04 00:21:41,586 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-02-04 00:21:41,586 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-02-04 00:21:41,587 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-02-04 00:21:41,587 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-02-04 00:21:41,589 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-02-04 00:21:41,590 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-02-04 00:21:41,591 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-02-04 00:21:41,592 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-02-04 00:21:41,592 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-02-04 00:21:41,593 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-02-04 00:21:41,594 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-02-04 00:21:41,594 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-02-04 00:21:41,596 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-02-04 00:21:41,598 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-02-04 00:21:41,599 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-02-04 00:21:41,600 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-02-04 00:21:41,601 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-02-04 00:21:41,603 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-02-04 00:21:41,603 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-02-04 00:21:41,603 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-02-04 00:21:41,604 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-02-04 00:21:41,605 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-02-04 00:21:41,606 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-02-04 00:21:41,606 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-02-04 00:21:41,606 INFO L177 SettingsManager]: PEA to Boogie provides no preferences, ignoring... [2018-02-04 00:21:41,606 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-02-04 00:21:41,606 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-02-04 00:21:41,607 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-02-04 00:21:41,607 INFO L98 SettingsManager]: Beginning loading settings from /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/cade18-smtinterpol/svcomp-DerefFreeMemtrack-32bit-Automizer_Camel.epf [2018-02-04 00:21:41,616 INFO L110 SettingsManager]: Loading preferences was successful [2018-02-04 00:21:41,616 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-02-04 00:21:41,617 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-02-04 00:21:41,617 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-02-04 00:21:41,617 INFO L133 SettingsManager]: * Use SBE=true [2018-02-04 00:21:41,617 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-02-04 00:21:41,617 INFO L133 SettingsManager]: * sizeof long=4 [2018-02-04 00:21:41,618 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-02-04 00:21:41,618 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-02-04 00:21:41,618 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-02-04 00:21:41,618 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-02-04 00:21:41,618 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-02-04 00:21:41,618 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-02-04 00:21:41,619 INFO L133 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2018-02-04 00:21:41,619 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-02-04 00:21:41,619 INFO L133 SettingsManager]: * sizeof long double=12 [2018-02-04 00:21:41,619 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-02-04 00:21:41,619 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-02-04 00:21:41,619 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-02-04 00:21:41,619 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-02-04 00:21:41,619 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-02-04 00:21:41,619 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-02-04 00:21:41,620 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-02-04 00:21:41,620 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-02-04 00:21:41,620 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL [2018-02-04 00:21:41,646 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-02-04 00:21:41,655 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully initialized [2018-02-04 00:21:41,657 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-02-04 00:21:41,658 INFO L271 PluginConnector]: Initializing CDTParser... [2018-02-04 00:21:41,658 INFO L276 PluginConnector]: CDTParser initialized [2018-02-04 00:21:41,659 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/ldv-memsafety/memleaks_test22_3_false-valid-deref.i [2018-02-04 00:21:41,795 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-02-04 00:21:41,796 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-02-04 00:21:41,797 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-02-04 00:21:41,797 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-02-04 00:21:41,801 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-02-04 00:21:41,802 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 04.02 12:21:41" (1/1) ... [2018-02-04 00:21:41,804 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@4b089594 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 12:21:41, skipping insertion in model container [2018-02-04 00:21:41,804 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 04.02 12:21:41" (1/1) ... [2018-02-04 00:21:41,814 INFO L153 Dispatcher]: Using SV-COMP mode [2018-02-04 00:21:41,850 INFO L153 Dispatcher]: Using SV-COMP mode [2018-02-04 00:21:41,940 INFO L450 PostProcessor]: Settings: Checked method=main [2018-02-04 00:21:41,954 INFO L450 PostProcessor]: Settings: Checked method=main [2018-02-04 00:21:41,960 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 12:21:41 WrapperNode [2018-02-04 00:21:41,960 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-02-04 00:21:41,960 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-02-04 00:21:41,961 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-02-04 00:21:41,961 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-02-04 00:21:41,970 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 12:21:41" (1/1) ... [2018-02-04 00:21:41,970 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 12:21:41" (1/1) ... [2018-02-04 00:21:41,980 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 12:21:41" (1/1) ... [2018-02-04 00:21:41,980 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 12:21:41" (1/1) ... [2018-02-04 00:21:41,986 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 12:21:41" (1/1) ... [2018-02-04 00:21:41,989 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 12:21:41" (1/1) ... [2018-02-04 00:21:41,990 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 12:21:41" (1/1) ... [2018-02-04 00:21:41,993 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-02-04 00:21:41,993 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-02-04 00:21:41,994 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-02-04 00:21:41,994 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-02-04 00:21:41,994 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 12:21:41" (1/1) ... No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-02-04 00:21:42,025 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-02-04 00:21:42,025 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-02-04 00:21:42,026 INFO L136 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~TO~VOID [2018-02-04 00:21:42,026 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_malloc [2018-02-04 00:21:42,026 INFO L136 BoogieDeclarations]: Found implementation of procedure LDV_INIT_LIST_HEAD [2018-02-04 00:21:42,026 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_atomic_sub_return [2018-02-04 00:21:42,026 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kref_sub [2018-02-04 00:21:42,026 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kref_init [2018-02-04 00:21:42,026 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kref_put [2018-02-04 00:21:42,026 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_cleanup [2018-02-04 00:21:42,026 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_release [2018-02-04 00:21:42,026 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_put [2018-02-04 00:21:42,026 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_init_internal [2018-02-04 00:21:42,026 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_init [2018-02-04 00:21:42,026 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_create [2018-02-04 00:21:42,027 INFO L136 BoogieDeclarations]: Found implementation of procedure entry_point [2018-02-04 00:21:42,027 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-02-04 00:21:42,027 INFO L128 BoogieDeclarations]: Found specification of procedure write~int [2018-02-04 00:21:42,027 INFO L128 BoogieDeclarations]: Found specification of procedure read~int [2018-02-04 00:21:42,027 INFO L128 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2018-02-04 00:21:42,027 INFO L128 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2018-02-04 00:21:42,027 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.free [2018-02-04 00:21:42,027 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-02-04 00:21:42,027 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-02-04 00:21:42,027 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2018-02-04 00:21:42,027 INFO L136 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2018-02-04 00:21:42,027 INFO L128 BoogieDeclarations]: Found specification of procedure malloc [2018-02-04 00:21:42,027 INFO L128 BoogieDeclarations]: Found specification of procedure free [2018-02-04 00:21:42,027 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2018-02-04 00:21:42,027 INFO L128 BoogieDeclarations]: Found specification of procedure memset [2018-02-04 00:21:42,028 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_malloc [2018-02-04 00:21:42,028 INFO L128 BoogieDeclarations]: Found specification of procedure LDV_INIT_LIST_HEAD [2018-02-04 00:21:42,028 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_atomic_sub_return [2018-02-04 00:21:42,028 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kref_sub [2018-02-04 00:21:42,028 INFO L128 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~TO~VOID [2018-02-04 00:21:42,028 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kref_init [2018-02-04 00:21:42,028 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kref_put [2018-02-04 00:21:42,028 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_cleanup [2018-02-04 00:21:42,028 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_release [2018-02-04 00:21:42,028 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_put [2018-02-04 00:21:42,028 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_init_internal [2018-02-04 00:21:42,028 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_init [2018-02-04 00:21:42,028 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_create [2018-02-04 00:21:42,029 INFO L128 BoogieDeclarations]: Found specification of procedure entry_point [2018-02-04 00:21:42,029 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-02-04 00:21:42,029 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-02-04 00:21:42,029 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-02-04 00:21:42,212 WARN L455 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-02-04 00:21:42,293 INFO L257 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-02-04 00:21:42,293 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 04.02 12:21:42 BoogieIcfgContainer [2018-02-04 00:21:42,293 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-02-04 00:21:42,293 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-02-04 00:21:42,294 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-02-04 00:21:42,295 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-02-04 00:21:42,296 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 04.02 12:21:41" (1/3) ... [2018-02-04 00:21:42,296 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@6d1e16e3 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 04.02 12:21:42, skipping insertion in model container [2018-02-04 00:21:42,296 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 12:21:41" (2/3) ... [2018-02-04 00:21:42,296 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@6d1e16e3 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 04.02 12:21:42, skipping insertion in model container [2018-02-04 00:21:42,297 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 04.02 12:21:42" (3/3) ... [2018-02-04 00:21:42,298 INFO L107 eAbstractionObserver]: Analyzing ICFG memleaks_test22_3_false-valid-deref.i [2018-02-04 00:21:42,303 INFO L128 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-02-04 00:21:42,308 INFO L140 ceAbstractionStarter]: Appying trace abstraction to program that has 19 error locations. [2018-02-04 00:21:42,329 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-02-04 00:21:42,330 INFO L323 AbstractCegarLoop]: Hoare is false [2018-02-04 00:21:42,330 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-02-04 00:21:42,330 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-02-04 00:21:42,330 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-02-04 00:21:42,330 INFO L327 AbstractCegarLoop]: Difference is false [2018-02-04 00:21:42,330 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-02-04 00:21:42,330 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-02-04 00:21:42,330 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-02-04 00:21:42,340 INFO L276 IsEmpty]: Start isEmpty. Operand 119 states. [2018-02-04 00:21:42,348 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-02-04 00:21:42,348 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 00:21:42,349 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 00:21:42,349 INFO L371 AbstractCegarLoop]: === Iteration 1 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 00:21:42,352 INFO L82 PathProgramCache]: Analyzing trace with hash 556227080, now seen corresponding path program 1 times [2018-02-04 00:21:42,353 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 00:21:42,353 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 00:21:42,387 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:21:42,388 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 00:21:42,388 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:21:42,420 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 00:21:42,426 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 00:21:42,499 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 00:21:42,501 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 00:21:42,501 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-02-04 00:21:42,568 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-02-04 00:21:42,577 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-02-04 00:21:42,577 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-02-04 00:21:42,579 INFO L87 Difference]: Start difference. First operand 119 states. Second operand 5 states. [2018-02-04 00:21:42,626 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 00:21:42,626 INFO L93 Difference]: Finished difference Result 125 states and 133 transitions. [2018-02-04 00:21:42,628 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-02-04 00:21:42,629 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 17 [2018-02-04 00:21:42,629 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 00:21:42,638 INFO L225 Difference]: With dead ends: 125 [2018-02-04 00:21:42,638 INFO L226 Difference]: Without dead ends: 122 [2018-02-04 00:21:42,640 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-02-04 00:21:42,651 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 122 states. [2018-02-04 00:21:42,669 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 122 to 120. [2018-02-04 00:21:42,670 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 120 states. [2018-02-04 00:21:42,672 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 120 states to 120 states and 128 transitions. [2018-02-04 00:21:42,673 INFO L78 Accepts]: Start accepts. Automaton has 120 states and 128 transitions. Word has length 17 [2018-02-04 00:21:42,673 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 00:21:42,673 INFO L432 AbstractCegarLoop]: Abstraction has 120 states and 128 transitions. [2018-02-04 00:21:42,674 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-02-04 00:21:42,674 INFO L276 IsEmpty]: Start isEmpty. Operand 120 states and 128 transitions. [2018-02-04 00:21:42,674 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2018-02-04 00:21:42,674 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 00:21:42,675 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 00:21:42,675 INFO L371 AbstractCegarLoop]: === Iteration 2 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 00:21:42,675 INFO L82 PathProgramCache]: Analyzing trace with hash -1895274134, now seen corresponding path program 1 times [2018-02-04 00:21:42,675 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 00:21:42,675 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 00:21:42,677 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:21:42,677 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 00:21:42,677 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:21:42,692 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 00:21:42,694 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 00:21:42,742 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 00:21:42,743 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 00:21:42,743 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-02-04 00:21:42,744 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-02-04 00:21:42,744 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-02-04 00:21:42,745 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-02-04 00:21:42,745 INFO L87 Difference]: Start difference. First operand 120 states and 128 transitions. Second operand 6 states. [2018-02-04 00:21:42,869 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 00:21:42,869 INFO L93 Difference]: Finished difference Result 121 states and 129 transitions. [2018-02-04 00:21:42,870 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-02-04 00:21:42,870 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 19 [2018-02-04 00:21:42,870 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 00:21:42,875 INFO L225 Difference]: With dead ends: 121 [2018-02-04 00:21:42,875 INFO L226 Difference]: Without dead ends: 121 [2018-02-04 00:21:42,875 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-02-04 00:21:42,875 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 121 states. [2018-02-04 00:21:42,879 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 121 to 119. [2018-02-04 00:21:42,879 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 119 states. [2018-02-04 00:21:42,880 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 119 states to 119 states and 127 transitions. [2018-02-04 00:21:42,881 INFO L78 Accepts]: Start accepts. Automaton has 119 states and 127 transitions. Word has length 19 [2018-02-04 00:21:42,881 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 00:21:42,881 INFO L432 AbstractCegarLoop]: Abstraction has 119 states and 127 transitions. [2018-02-04 00:21:42,881 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-02-04 00:21:42,881 INFO L276 IsEmpty]: Start isEmpty. Operand 119 states and 127 transitions. [2018-02-04 00:21:42,881 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2018-02-04 00:21:42,881 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 00:21:42,881 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 00:21:42,881 INFO L371 AbstractCegarLoop]: === Iteration 3 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 00:21:42,882 INFO L82 PathProgramCache]: Analyzing trace with hash -1895274133, now seen corresponding path program 1 times [2018-02-04 00:21:42,882 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 00:21:42,882 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 00:21:42,883 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:21:42,883 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 00:21:42,883 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:21:42,893 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 00:21:42,893 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 00:21:43,035 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 00:21:43,035 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 00:21:43,035 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-02-04 00:21:43,035 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-02-04 00:21:43,036 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-02-04 00:21:43,036 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-02-04 00:21:43,036 INFO L87 Difference]: Start difference. First operand 119 states and 127 transitions. Second operand 7 states. [2018-02-04 00:21:43,190 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 00:21:43,190 INFO L93 Difference]: Finished difference Result 120 states and 128 transitions. [2018-02-04 00:21:43,193 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-02-04 00:21:43,193 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 19 [2018-02-04 00:21:43,193 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 00:21:43,194 INFO L225 Difference]: With dead ends: 120 [2018-02-04 00:21:43,194 INFO L226 Difference]: Without dead ends: 120 [2018-02-04 00:21:43,195 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2018-02-04 00:21:43,195 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 120 states. [2018-02-04 00:21:43,200 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 120 to 118. [2018-02-04 00:21:43,200 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 118 states. [2018-02-04 00:21:43,202 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 118 states to 118 states and 126 transitions. [2018-02-04 00:21:43,202 INFO L78 Accepts]: Start accepts. Automaton has 118 states and 126 transitions. Word has length 19 [2018-02-04 00:21:43,202 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 00:21:43,202 INFO L432 AbstractCegarLoop]: Abstraction has 118 states and 126 transitions. [2018-02-04 00:21:43,202 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-02-04 00:21:43,203 INFO L276 IsEmpty]: Start isEmpty. Operand 118 states and 126 transitions. [2018-02-04 00:21:43,203 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-02-04 00:21:43,203 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 00:21:43,203 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 00:21:43,204 INFO L371 AbstractCegarLoop]: === Iteration 4 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 00:21:43,204 INFO L82 PathProgramCache]: Analyzing trace with hash 1715794329, now seen corresponding path program 1 times [2018-02-04 00:21:43,204 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 00:21:43,204 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 00:21:43,205 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:21:43,205 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 00:21:43,205 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:21:43,221 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 00:21:43,222 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 00:21:43,286 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 00:21:43,286 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 00:21:43,286 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-02-04 00:21:43,287 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-02-04 00:21:43,287 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-02-04 00:21:43,287 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-02-04 00:21:43,287 INFO L87 Difference]: Start difference. First operand 118 states and 126 transitions. Second operand 7 states. [2018-02-04 00:21:43,344 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 00:21:43,344 INFO L93 Difference]: Finished difference Result 131 states and 141 transitions. [2018-02-04 00:21:43,345 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-02-04 00:21:43,345 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 29 [2018-02-04 00:21:43,345 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 00:21:43,346 INFO L225 Difference]: With dead ends: 131 [2018-02-04 00:21:43,346 INFO L226 Difference]: Without dead ends: 131 [2018-02-04 00:21:43,347 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-02-04 00:21:43,347 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 131 states. [2018-02-04 00:21:43,355 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 131 to 127. [2018-02-04 00:21:43,355 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 127 states. [2018-02-04 00:21:43,356 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 127 states to 127 states and 136 transitions. [2018-02-04 00:21:43,356 INFO L78 Accepts]: Start accepts. Automaton has 127 states and 136 transitions. Word has length 29 [2018-02-04 00:21:43,357 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 00:21:43,357 INFO L432 AbstractCegarLoop]: Abstraction has 127 states and 136 transitions. [2018-02-04 00:21:43,357 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-02-04 00:21:43,357 INFO L276 IsEmpty]: Start isEmpty. Operand 127 states and 136 transitions. [2018-02-04 00:21:43,358 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-02-04 00:21:43,358 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 00:21:43,358 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 00:21:43,358 INFO L371 AbstractCegarLoop]: === Iteration 5 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 00:21:43,358 INFO L82 PathProgramCache]: Analyzing trace with hash -785661208, now seen corresponding path program 1 times [2018-02-04 00:21:43,358 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 00:21:43,358 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 00:21:43,360 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:21:43,361 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 00:21:43,361 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:21:43,373 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 00:21:43,374 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 00:21:43,454 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 00:21:43,455 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 00:21:43,455 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-02-04 00:21:43,455 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-02-04 00:21:43,455 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-02-04 00:21:43,456 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-02-04 00:21:43,456 INFO L87 Difference]: Start difference. First operand 127 states and 136 transitions. Second operand 10 states. [2018-02-04 00:21:43,642 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 00:21:43,642 INFO L93 Difference]: Finished difference Result 126 states and 135 transitions. [2018-02-04 00:21:43,642 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-02-04 00:21:43,647 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 34 [2018-02-04 00:21:43,647 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 00:21:43,648 INFO L225 Difference]: With dead ends: 126 [2018-02-04 00:21:43,648 INFO L226 Difference]: Without dead ends: 126 [2018-02-04 00:21:43,648 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=29, Invalid=127, Unknown=0, NotChecked=0, Total=156 [2018-02-04 00:21:43,648 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 126 states. [2018-02-04 00:21:43,654 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 126 to 126. [2018-02-04 00:21:43,654 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 126 states. [2018-02-04 00:21:43,655 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 126 states to 126 states and 135 transitions. [2018-02-04 00:21:43,655 INFO L78 Accepts]: Start accepts. Automaton has 126 states and 135 transitions. Word has length 34 [2018-02-04 00:21:43,655 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 00:21:43,655 INFO L432 AbstractCegarLoop]: Abstraction has 126 states and 135 transitions. [2018-02-04 00:21:43,655 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-02-04 00:21:43,655 INFO L276 IsEmpty]: Start isEmpty. Operand 126 states and 135 transitions. [2018-02-04 00:21:43,656 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-02-04 00:21:43,656 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 00:21:43,656 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 00:21:43,656 INFO L371 AbstractCegarLoop]: === Iteration 6 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 00:21:43,657 INFO L82 PathProgramCache]: Analyzing trace with hash -785661207, now seen corresponding path program 1 times [2018-02-04 00:21:43,657 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 00:21:43,657 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 00:21:43,658 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:21:43,658 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 00:21:43,658 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:21:43,668 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 00:21:43,668 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 00:21:43,689 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 00:21:43,689 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 00:21:43,689 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-02-04 00:21:43,690 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-02-04 00:21:43,690 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-02-04 00:21:43,690 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-02-04 00:21:43,690 INFO L87 Difference]: Start difference. First operand 126 states and 135 transitions. Second operand 4 states. [2018-02-04 00:21:43,699 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 00:21:43,700 INFO L93 Difference]: Finished difference Result 129 states and 138 transitions. [2018-02-04 00:21:43,700 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-02-04 00:21:43,700 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 34 [2018-02-04 00:21:43,700 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 00:21:43,701 INFO L225 Difference]: With dead ends: 129 [2018-02-04 00:21:43,701 INFO L226 Difference]: Without dead ends: 127 [2018-02-04 00:21:43,702 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-02-04 00:21:43,702 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 127 states. [2018-02-04 00:21:43,706 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 127 to 127. [2018-02-04 00:21:43,706 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 127 states. [2018-02-04 00:21:43,707 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 127 states to 127 states and 136 transitions. [2018-02-04 00:21:43,707 INFO L78 Accepts]: Start accepts. Automaton has 127 states and 136 transitions. Word has length 34 [2018-02-04 00:21:43,707 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 00:21:43,707 INFO L432 AbstractCegarLoop]: Abstraction has 127 states and 136 transitions. [2018-02-04 00:21:43,708 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-02-04 00:21:43,708 INFO L276 IsEmpty]: Start isEmpty. Operand 127 states and 136 transitions. [2018-02-04 00:21:43,708 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-02-04 00:21:43,708 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 00:21:43,709 INFO L351 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 00:21:43,709 INFO L371 AbstractCegarLoop]: === Iteration 7 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 00:21:43,709 INFO L82 PathProgramCache]: Analyzing trace with hash -1322241719, now seen corresponding path program 1 times [2018-02-04 00:21:43,709 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 00:21:43,709 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 00:21:43,710 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:21:43,710 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 00:21:43,710 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:21:43,716 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 00:21:43,717 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 00:21:43,747 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-02-04 00:21:43,747 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 00:21:43,747 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-02-04 00:21:43,747 INFO L409 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-02-04 00:21:43,748 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-02-04 00:21:43,748 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-02-04 00:21:43,748 INFO L87 Difference]: Start difference. First operand 127 states and 136 transitions. Second operand 3 states. [2018-02-04 00:21:43,808 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 00:21:43,808 INFO L93 Difference]: Finished difference Result 143 states and 154 transitions. [2018-02-04 00:21:43,808 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-02-04 00:21:43,808 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 32 [2018-02-04 00:21:43,808 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 00:21:43,809 INFO L225 Difference]: With dead ends: 143 [2018-02-04 00:21:43,809 INFO L226 Difference]: Without dead ends: 131 [2018-02-04 00:21:43,810 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 11 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-02-04 00:21:43,810 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 131 states. [2018-02-04 00:21:43,815 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 131 to 123. [2018-02-04 00:21:43,815 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 123 states. [2018-02-04 00:21:43,816 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 123 states to 123 states and 131 transitions. [2018-02-04 00:21:43,816 INFO L78 Accepts]: Start accepts. Automaton has 123 states and 131 transitions. Word has length 32 [2018-02-04 00:21:43,816 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 00:21:43,816 INFO L432 AbstractCegarLoop]: Abstraction has 123 states and 131 transitions. [2018-02-04 00:21:43,816 INFO L433 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-02-04 00:21:43,817 INFO L276 IsEmpty]: Start isEmpty. Operand 123 states and 131 transitions. [2018-02-04 00:21:43,817 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-02-04 00:21:43,817 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 00:21:43,817 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 00:21:43,818 INFO L371 AbstractCegarLoop]: === Iteration 8 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 00:21:43,818 INFO L82 PathProgramCache]: Analyzing trace with hash 1082750419, now seen corresponding path program 1 times [2018-02-04 00:21:43,818 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 00:21:43,818 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 00:21:43,819 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:21:43,819 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 00:21:43,819 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:21:43,828 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 00:21:43,829 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 00:21:43,858 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 00:21:43,858 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 00:21:43,859 INFO L213 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-04 00:21:43,869 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 00:21:43,898 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 00:21:43,905 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 00:21:43,939 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 00:21:43,957 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 00:21:43,957 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 6 [2018-02-04 00:21:43,958 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-02-04 00:21:43,958 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-02-04 00:21:43,958 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-02-04 00:21:43,958 INFO L87 Difference]: Start difference. First operand 123 states and 131 transitions. Second operand 6 states. [2018-02-04 00:21:43,976 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 00:21:43,976 INFO L93 Difference]: Finished difference Result 126 states and 134 transitions. [2018-02-04 00:21:43,978 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-02-04 00:21:43,978 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 35 [2018-02-04 00:21:43,979 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 00:21:43,979 INFO L225 Difference]: With dead ends: 126 [2018-02-04 00:21:43,979 INFO L226 Difference]: Without dead ends: 124 [2018-02-04 00:21:43,980 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 40 GetRequests, 35 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=16, Invalid=26, Unknown=0, NotChecked=0, Total=42 [2018-02-04 00:21:43,980 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 124 states. [2018-02-04 00:21:43,983 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 124 to 124. [2018-02-04 00:21:43,983 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 124 states. [2018-02-04 00:21:43,984 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 124 states to 124 states and 132 transitions. [2018-02-04 00:21:43,984 INFO L78 Accepts]: Start accepts. Automaton has 124 states and 132 transitions. Word has length 35 [2018-02-04 00:21:43,985 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 00:21:43,985 INFO L432 AbstractCegarLoop]: Abstraction has 124 states and 132 transitions. [2018-02-04 00:21:43,985 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-02-04 00:21:43,985 INFO L276 IsEmpty]: Start isEmpty. Operand 124 states and 132 transitions. [2018-02-04 00:21:43,985 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-02-04 00:21:43,985 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 00:21:43,986 INFO L351 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 00:21:43,986 INFO L371 AbstractCegarLoop]: === Iteration 9 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 00:21:43,986 INFO L82 PathProgramCache]: Analyzing trace with hash -1962528345, now seen corresponding path program 1 times [2018-02-04 00:21:43,986 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 00:21:43,986 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 00:21:43,987 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:21:43,987 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 00:21:43,988 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:21:43,993 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 00:21:43,994 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 00:21:44,021 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-02-04 00:21:44,022 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 00:21:44,022 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-02-04 00:21:44,022 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-02-04 00:21:44,022 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-02-04 00:21:44,022 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-02-04 00:21:44,023 INFO L87 Difference]: Start difference. First operand 124 states and 132 transitions. Second operand 6 states. [2018-02-04 00:21:44,046 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 00:21:44,046 INFO L93 Difference]: Finished difference Result 115 states and 121 transitions. [2018-02-04 00:21:44,048 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-02-04 00:21:44,048 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 34 [2018-02-04 00:21:44,048 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 00:21:44,049 INFO L225 Difference]: With dead ends: 115 [2018-02-04 00:21:44,049 INFO L226 Difference]: Without dead ends: 115 [2018-02-04 00:21:44,049 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-02-04 00:21:44,050 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 115 states. [2018-02-04 00:21:44,052 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 115 to 115. [2018-02-04 00:21:44,052 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 115 states. [2018-02-04 00:21:44,053 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 115 states to 115 states and 121 transitions. [2018-02-04 00:21:44,053 INFO L78 Accepts]: Start accepts. Automaton has 115 states and 121 transitions. Word has length 34 [2018-02-04 00:21:44,053 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 00:21:44,053 INFO L432 AbstractCegarLoop]: Abstraction has 115 states and 121 transitions. [2018-02-04 00:21:44,054 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-02-04 00:21:44,054 INFO L276 IsEmpty]: Start isEmpty. Operand 115 states and 121 transitions. [2018-02-04 00:21:44,054 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-02-04 00:21:44,054 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 00:21:44,054 INFO L351 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 00:21:44,057 INFO L371 AbstractCegarLoop]: === Iteration 10 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 00:21:44,057 INFO L82 PathProgramCache]: Analyzing trace with hash -1126031319, now seen corresponding path program 2 times [2018-02-04 00:21:44,057 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 00:21:44,057 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 00:21:44,058 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:21:44,058 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 00:21:44,058 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:21:44,071 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 00:21:44,072 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 00:21:44,098 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 00:21:44,098 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 00:21:44,098 INFO L213 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-04 00:21:44,106 INFO L109 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-02-04 00:21:44,131 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2018-02-04 00:21:44,131 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 00:21:44,134 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 00:21:44,176 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-02-04 00:21:44,178 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 00:21:44,194 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-02-04 00:21:44,194 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 00:21:44,208 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-02-04 00:21:44,209 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-02-04 00:21:46,448 WARN L143 SmtUtils]: Spent 2016ms on a formula simplification that was a NOOP. DAG size: 27 [2018-02-04 00:21:46,736 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-02-04 00:21:46,766 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-02-04 00:21:46,766 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [14] imperfect sequences [6] total 19 [2018-02-04 00:21:46,766 INFO L409 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-02-04 00:21:46,766 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-02-04 00:21:46,766 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=51, Invalid=291, Unknown=0, NotChecked=0, Total=342 [2018-02-04 00:21:46,767 INFO L87 Difference]: Start difference. First operand 115 states and 121 transitions. Second operand 19 states. [2018-02-04 00:21:47,521 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 00:21:47,521 INFO L93 Difference]: Finished difference Result 117 states and 123 transitions. [2018-02-04 00:21:47,522 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-02-04 00:21:47,522 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 36 [2018-02-04 00:21:47,522 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 00:21:47,522 INFO L225 Difference]: With dead ends: 117 [2018-02-04 00:21:47,523 INFO L226 Difference]: Without dead ends: 115 [2018-02-04 00:21:47,523 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 49 GetRequests, 24 SyntacticMatches, 0 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 78 ImplicationChecksByTransitivity, 2.7s TimeCoverageRelationStatistics Valid=99, Invalid=603, Unknown=0, NotChecked=0, Total=702 [2018-02-04 00:21:47,523 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 115 states. [2018-02-04 00:21:47,524 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 115 to 115. [2018-02-04 00:21:47,525 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 115 states. [2018-02-04 00:21:47,525 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 115 states to 115 states and 121 transitions. [2018-02-04 00:21:47,525 INFO L78 Accepts]: Start accepts. Automaton has 115 states and 121 transitions. Word has length 36 [2018-02-04 00:21:47,525 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 00:21:47,525 INFO L432 AbstractCegarLoop]: Abstraction has 115 states and 121 transitions. [2018-02-04 00:21:47,526 INFO L433 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-02-04 00:21:47,526 INFO L276 IsEmpty]: Start isEmpty. Operand 115 states and 121 transitions. [2018-02-04 00:21:47,527 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-02-04 00:21:47,527 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 00:21:47,527 INFO L351 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 00:21:47,527 INFO L371 AbstractCegarLoop]: === Iteration 11 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 00:21:47,527 INFO L82 PathProgramCache]: Analyzing trace with hash 1693572500, now seen corresponding path program 1 times [2018-02-04 00:21:47,527 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 00:21:47,527 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 00:21:47,528 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:21:47,529 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 00:21:47,529 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:21:47,539 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 00:21:47,539 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 00:21:47,643 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-02-04 00:21:47,643 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 00:21:47,644 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-02-04 00:21:47,647 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-02-04 00:21:47,647 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-02-04 00:21:47,647 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-02-04 00:21:47,648 INFO L87 Difference]: Start difference. First operand 115 states and 121 transitions. Second operand 10 states. [2018-02-04 00:21:47,793 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 00:21:47,793 INFO L93 Difference]: Finished difference Result 113 states and 119 transitions. [2018-02-04 00:21:47,794 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-02-04 00:21:47,794 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 42 [2018-02-04 00:21:47,794 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 00:21:47,795 INFO L225 Difference]: With dead ends: 113 [2018-02-04 00:21:47,795 INFO L226 Difference]: Without dead ends: 113 [2018-02-04 00:21:47,795 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=29, Invalid=127, Unknown=0, NotChecked=0, Total=156 [2018-02-04 00:21:47,795 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 113 states. [2018-02-04 00:21:47,796 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 113 to 113. [2018-02-04 00:21:47,797 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 113 states. [2018-02-04 00:21:47,797 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 113 states to 113 states and 119 transitions. [2018-02-04 00:21:47,797 INFO L78 Accepts]: Start accepts. Automaton has 113 states and 119 transitions. Word has length 42 [2018-02-04 00:21:47,797 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 00:21:47,797 INFO L432 AbstractCegarLoop]: Abstraction has 113 states and 119 transitions. [2018-02-04 00:21:47,797 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-02-04 00:21:47,797 INFO L276 IsEmpty]: Start isEmpty. Operand 113 states and 119 transitions. [2018-02-04 00:21:47,798 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-02-04 00:21:47,798 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 00:21:47,798 INFO L351 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 00:21:47,798 INFO L371 AbstractCegarLoop]: === Iteration 12 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 00:21:47,798 INFO L82 PathProgramCache]: Analyzing trace with hash 1693572501, now seen corresponding path program 1 times [2018-02-04 00:21:47,798 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 00:21:47,798 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 00:21:47,799 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:21:47,799 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 00:21:47,799 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:21:47,809 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 00:21:47,809 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 00:21:47,841 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 00:21:47,841 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 00:21:47,841 INFO L213 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-04 00:21:47,846 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 00:21:47,863 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 00:21:47,865 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 00:21:47,872 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 00:21:47,890 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 00:21:47,891 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 8 [2018-02-04 00:21:47,891 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-02-04 00:21:47,891 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-02-04 00:21:47,891 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=33, Unknown=0, NotChecked=0, Total=56 [2018-02-04 00:21:47,892 INFO L87 Difference]: Start difference. First operand 113 states and 119 transitions. Second operand 8 states. [2018-02-04 00:21:47,912 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 00:21:47,912 INFO L93 Difference]: Finished difference Result 116 states and 122 transitions. [2018-02-04 00:21:47,912 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-02-04 00:21:47,913 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 42 [2018-02-04 00:21:47,913 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 00:21:47,913 INFO L225 Difference]: With dead ends: 116 [2018-02-04 00:21:47,913 INFO L226 Difference]: Without dead ends: 114 [2018-02-04 00:21:47,914 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 49 GetRequests, 42 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2018-02-04 00:21:47,914 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 114 states. [2018-02-04 00:21:47,916 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 114 to 114. [2018-02-04 00:21:47,916 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 114 states. [2018-02-04 00:21:47,917 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 114 states to 114 states and 120 transitions. [2018-02-04 00:21:47,917 INFO L78 Accepts]: Start accepts. Automaton has 114 states and 120 transitions. Word has length 42 [2018-02-04 00:21:47,917 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 00:21:47,918 INFO L432 AbstractCegarLoop]: Abstraction has 114 states and 120 transitions. [2018-02-04 00:21:47,918 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-02-04 00:21:47,918 INFO L276 IsEmpty]: Start isEmpty. Operand 114 states and 120 transitions. [2018-02-04 00:21:47,918 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-02-04 00:21:47,919 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 00:21:47,919 INFO L351 BasicCegarLoop]: trace histogram [4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 00:21:47,919 INFO L371 AbstractCegarLoop]: === Iteration 13 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 00:21:47,919 INFO L82 PathProgramCache]: Analyzing trace with hash 1124796031, now seen corresponding path program 2 times [2018-02-04 00:21:47,919 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 00:21:47,919 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 00:21:47,920 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:21:47,920 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 00:21:47,921 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:21:47,931 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 00:21:47,932 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 00:21:47,981 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 00:21:47,981 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 00:21:47,981 INFO L213 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-04 00:21:47,990 INFO L109 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-02-04 00:21:48,015 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2018-02-04 00:21:48,015 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 00:21:48,018 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 00:21:48,030 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-02-04 00:21:48,031 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 00:21:48,046 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-02-04 00:21:48,046 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 00:21:48,061 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-02-04 00:21:48,061 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-02-04 00:21:48,549 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-02-04 00:21:48,566 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-02-04 00:21:48,567 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [15] imperfect sequences [8] total 22 [2018-02-04 00:21:48,567 INFO L409 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-02-04 00:21:48,567 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-02-04 00:21:48,567 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=72, Invalid=390, Unknown=0, NotChecked=0, Total=462 [2018-02-04 00:21:48,567 INFO L87 Difference]: Start difference. First operand 114 states and 120 transitions. Second operand 22 states. [2018-02-04 00:21:50,794 WARN L143 SmtUtils]: Spent 2017ms on a formula simplification that was a NOOP. DAG size: 31 [2018-02-04 00:21:54,902 WARN L143 SmtUtils]: Spent 4065ms on a formula simplification that was a NOOP. DAG size: 31 [2018-02-04 00:21:56,946 WARN L143 SmtUtils]: Spent 2022ms on a formula simplification that was a NOOP. DAG size: 32 [2018-02-04 00:21:57,378 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 00:21:57,378 INFO L93 Difference]: Finished difference Result 115 states and 121 transitions. [2018-02-04 00:21:57,378 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-02-04 00:21:57,378 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 43 [2018-02-04 00:21:57,379 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 00:21:57,379 INFO L225 Difference]: With dead ends: 115 [2018-02-04 00:21:57,379 INFO L226 Difference]: Without dead ends: 113 [2018-02-04 00:21:57,380 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 60 GetRequests, 29 SyntacticMatches, 1 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 155 ImplicationChecksByTransitivity, 8.7s TimeCoverageRelationStatistics Valid=147, Invalid=845, Unknown=0, NotChecked=0, Total=992 [2018-02-04 00:21:57,380 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 113 states. [2018-02-04 00:21:57,381 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 113 to 113. [2018-02-04 00:21:57,381 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 113 states. [2018-02-04 00:21:57,382 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 113 states to 113 states and 119 transitions. [2018-02-04 00:21:57,382 INFO L78 Accepts]: Start accepts. Automaton has 113 states and 119 transitions. Word has length 43 [2018-02-04 00:21:57,382 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 00:21:57,382 INFO L432 AbstractCegarLoop]: Abstraction has 113 states and 119 transitions. [2018-02-04 00:21:57,382 INFO L433 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-02-04 00:21:57,383 INFO L276 IsEmpty]: Start isEmpty. Operand 113 states and 119 transitions. [2018-02-04 00:21:57,383 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2018-02-04 00:21:57,383 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 00:21:57,383 INFO L351 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 00:21:57,383 INFO L371 AbstractCegarLoop]: === Iteration 14 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 00:21:57,384 INFO L82 PathProgramCache]: Analyzing trace with hash -889747813, now seen corresponding path program 1 times [2018-02-04 00:21:57,384 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 00:21:57,384 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 00:21:57,385 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:21:57,385 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 00:21:57,385 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:21:57,391 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 00:21:57,392 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 00:21:57,431 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-02-04 00:21:57,431 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 00:21:57,431 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-02-04 00:21:57,431 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-02-04 00:21:57,431 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-02-04 00:21:57,431 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2018-02-04 00:21:57,431 INFO L87 Difference]: Start difference. First operand 113 states and 119 transitions. Second operand 8 states. [2018-02-04 00:21:57,452 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 00:21:57,452 INFO L93 Difference]: Finished difference Result 115 states and 120 transitions. [2018-02-04 00:21:57,452 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-02-04 00:21:57,452 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 49 [2018-02-04 00:21:57,452 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 00:21:57,453 INFO L225 Difference]: With dead ends: 115 [2018-02-04 00:21:57,453 INFO L226 Difference]: Without dead ends: 113 [2018-02-04 00:21:57,453 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=69, Unknown=0, NotChecked=0, Total=90 [2018-02-04 00:21:57,453 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 113 states. [2018-02-04 00:21:57,454 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 113 to 113. [2018-02-04 00:21:57,455 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 113 states. [2018-02-04 00:21:57,455 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 113 states to 113 states and 118 transitions. [2018-02-04 00:21:57,455 INFO L78 Accepts]: Start accepts. Automaton has 113 states and 118 transitions. Word has length 49 [2018-02-04 00:21:57,455 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 00:21:57,456 INFO L432 AbstractCegarLoop]: Abstraction has 113 states and 118 transitions. [2018-02-04 00:21:57,456 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-02-04 00:21:57,456 INFO L276 IsEmpty]: Start isEmpty. Operand 113 states and 118 transitions. [2018-02-04 00:21:57,456 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2018-02-04 00:21:57,456 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 00:21:57,457 INFO L351 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 00:21:57,457 INFO L371 AbstractCegarLoop]: === Iteration 15 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 00:21:57,457 INFO L82 PathProgramCache]: Analyzing trace with hash 2041611084, now seen corresponding path program 1 times [2018-02-04 00:21:57,457 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 00:21:57,457 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 00:21:57,458 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:21:57,458 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 00:21:57,458 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:21:57,466 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 00:21:57,467 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 00:21:57,518 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-02-04 00:21:57,518 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 00:21:57,518 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-02-04 00:21:57,519 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-02-04 00:21:57,519 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-02-04 00:21:57,519 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-02-04 00:21:57,519 INFO L87 Difference]: Start difference. First operand 113 states and 118 transitions. Second operand 10 states. [2018-02-04 00:21:57,554 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 00:21:57,554 INFO L93 Difference]: Finished difference Result 117 states and 121 transitions. [2018-02-04 00:21:57,554 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-02-04 00:21:57,554 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 54 [2018-02-04 00:21:57,554 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 00:21:57,555 INFO L225 Difference]: With dead ends: 117 [2018-02-04 00:21:57,555 INFO L226 Difference]: Without dead ends: 113 [2018-02-04 00:21:57,555 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=29, Invalid=127, Unknown=0, NotChecked=0, Total=156 [2018-02-04 00:21:57,555 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 113 states. [2018-02-04 00:21:57,557 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 113 to 113. [2018-02-04 00:21:57,557 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 113 states. [2018-02-04 00:21:57,557 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 113 states to 113 states and 117 transitions. [2018-02-04 00:21:57,558 INFO L78 Accepts]: Start accepts. Automaton has 113 states and 117 transitions. Word has length 54 [2018-02-04 00:21:57,558 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 00:21:57,558 INFO L432 AbstractCegarLoop]: Abstraction has 113 states and 117 transitions. [2018-02-04 00:21:57,558 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-02-04 00:21:57,558 INFO L276 IsEmpty]: Start isEmpty. Operand 113 states and 117 transitions. [2018-02-04 00:21:57,559 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2018-02-04 00:21:57,559 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 00:21:57,559 INFO L351 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 00:21:57,559 INFO L371 AbstractCegarLoop]: === Iteration 16 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 00:21:57,559 INFO L82 PathProgramCache]: Analyzing trace with hash -1648870102, now seen corresponding path program 1 times [2018-02-04 00:21:57,559 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 00:21:57,559 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 00:21:57,560 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:21:57,560 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 00:21:57,560 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:21:57,571 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 00:21:57,572 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 00:21:57,762 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-02-04 00:21:57,763 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 00:21:57,763 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [20] imperfect sequences [] total 20 [2018-02-04 00:21:57,763 INFO L409 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-02-04 00:21:57,763 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-02-04 00:21:57,763 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=41, Invalid=379, Unknown=0, NotChecked=0, Total=420 [2018-02-04 00:21:57,763 INFO L87 Difference]: Start difference. First operand 113 states and 117 transitions. Second operand 21 states. [2018-02-04 00:21:58,071 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 00:21:58,071 INFO L93 Difference]: Finished difference Result 141 states and 152 transitions. [2018-02-04 00:21:58,072 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-02-04 00:21:58,072 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 65 [2018-02-04 00:21:58,072 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 00:21:58,072 INFO L225 Difference]: With dead ends: 141 [2018-02-04 00:21:58,072 INFO L226 Difference]: Without dead ends: 141 [2018-02-04 00:21:58,073 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 27 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 57 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=69, Invalid=687, Unknown=0, NotChecked=0, Total=756 [2018-02-04 00:21:58,073 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 141 states. [2018-02-04 00:21:58,075 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 141 to 136. [2018-02-04 00:21:58,076 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 136 states. [2018-02-04 00:21:58,076 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 136 states to 136 states and 148 transitions. [2018-02-04 00:21:58,077 INFO L78 Accepts]: Start accepts. Automaton has 136 states and 148 transitions. Word has length 65 [2018-02-04 00:21:58,077 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 00:21:58,077 INFO L432 AbstractCegarLoop]: Abstraction has 136 states and 148 transitions. [2018-02-04 00:21:58,077 INFO L433 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-02-04 00:21:58,077 INFO L276 IsEmpty]: Start isEmpty. Operand 136 states and 148 transitions. [2018-02-04 00:21:58,078 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2018-02-04 00:21:58,078 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 00:21:58,078 INFO L351 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 00:21:58,078 INFO L371 AbstractCegarLoop]: === Iteration 17 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 00:21:58,078 INFO L82 PathProgramCache]: Analyzing trace with hash -1648870101, now seen corresponding path program 1 times [2018-02-04 00:21:58,078 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 00:21:58,078 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 00:21:58,079 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:21:58,079 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 00:21:58,079 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:21:58,092 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 00:21:58,093 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 00:21:58,141 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 00:21:58,142 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 00:21:58,142 INFO L213 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-04 00:21:58,155 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 00:21:58,181 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 00:21:58,184 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 00:21:58,194 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 00:21:58,215 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 00:21:58,216 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9] total 10 [2018-02-04 00:21:58,216 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-02-04 00:21:58,216 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-02-04 00:21:58,216 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=38, Invalid=52, Unknown=0, NotChecked=0, Total=90 [2018-02-04 00:21:58,216 INFO L87 Difference]: Start difference. First operand 136 states and 148 transitions. Second operand 10 states. [2018-02-04 00:21:58,232 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 00:21:58,232 INFO L93 Difference]: Finished difference Result 139 states and 151 transitions. [2018-02-04 00:21:58,239 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-02-04 00:21:58,239 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 65 [2018-02-04 00:21:58,239 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 00:21:58,240 INFO L225 Difference]: With dead ends: 139 [2018-02-04 00:21:58,240 INFO L226 Difference]: Without dead ends: 137 [2018-02-04 00:21:58,240 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 74 GetRequests, 65 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=42, Invalid=68, Unknown=0, NotChecked=0, Total=110 [2018-02-04 00:21:58,240 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 137 states. [2018-02-04 00:21:58,243 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 137 to 137. [2018-02-04 00:21:58,243 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 137 states. [2018-02-04 00:21:58,244 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 137 states to 137 states and 149 transitions. [2018-02-04 00:21:58,244 INFO L78 Accepts]: Start accepts. Automaton has 137 states and 149 transitions. Word has length 65 [2018-02-04 00:21:58,244 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 00:21:58,244 INFO L432 AbstractCegarLoop]: Abstraction has 137 states and 149 transitions. [2018-02-04 00:21:58,244 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-02-04 00:21:58,244 INFO L276 IsEmpty]: Start isEmpty. Operand 137 states and 149 transitions. [2018-02-04 00:21:58,245 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2018-02-04 00:21:58,245 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 00:21:58,245 INFO L351 BasicCegarLoop]: trace histogram [6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 00:21:58,245 INFO L371 AbstractCegarLoop]: === Iteration 18 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 00:21:58,245 INFO L82 PathProgramCache]: Analyzing trace with hash -1958826751, now seen corresponding path program 2 times [2018-02-04 00:21:58,245 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 00:21:58,245 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 00:21:58,246 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:21:58,246 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 00:21:58,246 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:21:58,254 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 00:21:58,255 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 00:21:58,307 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 00:21:58,307 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 00:21:58,307 INFO L213 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-04 00:21:58,312 INFO L109 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-02-04 00:21:58,342 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2018-02-04 00:21:58,342 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 00:21:58,345 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 00:21:58,348 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-02-04 00:21:58,348 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 00:21:58,357 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-02-04 00:21:58,358 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 00:21:58,366 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-02-04 00:21:58,366 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-02-04 00:21:58,919 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2018-02-04 00:21:58,936 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-02-04 00:21:58,936 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [20] imperfect sequences [10] total 29 [2018-02-04 00:21:58,936 INFO L409 AbstractCegarLoop]: Interpolant automaton has 29 states [2018-02-04 00:21:58,936 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2018-02-04 00:21:58,937 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=107, Invalid=705, Unknown=0, NotChecked=0, Total=812 [2018-02-04 00:21:58,937 INFO L87 Difference]: Start difference. First operand 137 states and 149 transitions. Second operand 29 states. [2018-02-04 00:22:01,103 WARN L143 SmtUtils]: Spent 2020ms on a formula simplification that was a NOOP. DAG size: 31 [2018-02-04 00:22:02,139 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 00:22:02,140 INFO L93 Difference]: Finished difference Result 138 states and 148 transitions. [2018-02-04 00:22:02,140 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2018-02-04 00:22:02,140 INFO L78 Accepts]: Start accepts. Automaton has 29 states. Word has length 66 [2018-02-04 00:22:02,140 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 00:22:02,141 INFO L225 Difference]: With dead ends: 138 [2018-02-04 00:22:02,141 INFO L226 Difference]: Without dead ends: 136 [2018-02-04 00:22:02,141 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 89 GetRequests, 47 SyntacticMatches, 1 SemanticMatches, 41 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 369 ImplicationChecksByTransitivity, 2.9s TimeCoverageRelationStatistics Valid=227, Invalid=1579, Unknown=0, NotChecked=0, Total=1806 [2018-02-04 00:22:02,141 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 136 states. [2018-02-04 00:22:02,143 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 136 to 136. [2018-02-04 00:22:02,143 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 136 states. [2018-02-04 00:22:02,144 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 136 states to 136 states and 146 transitions. [2018-02-04 00:22:02,144 INFO L78 Accepts]: Start accepts. Automaton has 136 states and 146 transitions. Word has length 66 [2018-02-04 00:22:02,144 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 00:22:02,144 INFO L432 AbstractCegarLoop]: Abstraction has 136 states and 146 transitions. [2018-02-04 00:22:02,144 INFO L433 AbstractCegarLoop]: Interpolant automaton has 29 states. [2018-02-04 00:22:02,144 INFO L276 IsEmpty]: Start isEmpty. Operand 136 states and 146 transitions. [2018-02-04 00:22:02,144 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2018-02-04 00:22:02,144 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 00:22:02,144 INFO L351 BasicCegarLoop]: trace histogram [7, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 00:22:02,144 INFO L371 AbstractCegarLoop]: === Iteration 19 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 00:22:02,145 INFO L82 PathProgramCache]: Analyzing trace with hash 1967521112, now seen corresponding path program 1 times [2018-02-04 00:22:02,145 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 00:22:02,145 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 00:22:02,145 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:22:02,145 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 00:22:02,145 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:22:02,152 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 00:22:02,153 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 00:22:02,241 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2018-02-04 00:22:02,241 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 00:22:02,241 INFO L213 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-04 00:22:02,250 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 00:22:02,299 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 00:22:02,302 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 00:22:02,465 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-02-04 00:22:02,499 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 00:22:02,499 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11] total 20 [2018-02-04 00:22:02,500 INFO L409 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-02-04 00:22:02,500 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-02-04 00:22:02,500 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=65, Invalid=315, Unknown=0, NotChecked=0, Total=380 [2018-02-04 00:22:02,500 INFO L87 Difference]: Start difference. First operand 136 states and 146 transitions. Second operand 20 states. [2018-02-04 00:22:02,617 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 00:22:02,617 INFO L93 Difference]: Finished difference Result 140 states and 146 transitions. [2018-02-04 00:22:02,618 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-02-04 00:22:02,619 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 70 [2018-02-04 00:22:02,619 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 00:22:02,619 INFO L225 Difference]: With dead ends: 140 [2018-02-04 00:22:02,619 INFO L226 Difference]: Without dead ends: 134 [2018-02-04 00:22:02,620 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 84 GetRequests, 62 SyntacticMatches, 0 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=81, Invalid=471, Unknown=0, NotChecked=0, Total=552 [2018-02-04 00:22:02,620 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 134 states. [2018-02-04 00:22:02,623 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 134 to 134. [2018-02-04 00:22:02,624 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 134 states. [2018-02-04 00:22:02,625 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 134 states to 134 states and 140 transitions. [2018-02-04 00:22:02,625 INFO L78 Accepts]: Start accepts. Automaton has 134 states and 140 transitions. Word has length 70 [2018-02-04 00:22:02,625 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 00:22:02,626 INFO L432 AbstractCegarLoop]: Abstraction has 134 states and 140 transitions. [2018-02-04 00:22:02,626 INFO L433 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-02-04 00:22:02,626 INFO L276 IsEmpty]: Start isEmpty. Operand 134 states and 140 transitions. [2018-02-04 00:22:02,626 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2018-02-04 00:22:02,626 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 00:22:02,626 INFO L351 BasicCegarLoop]: trace histogram [8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 00:22:02,626 INFO L371 AbstractCegarLoop]: === Iteration 20 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 00:22:02,627 INFO L82 PathProgramCache]: Analyzing trace with hash -170218834, now seen corresponding path program 1 times [2018-02-04 00:22:02,627 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 00:22:02,627 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 00:22:02,627 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:22:02,627 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 00:22:02,627 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:22:02,640 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 00:22:02,641 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 00:22:02,879 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2018-02-04 00:22:02,879 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 00:22:02,879 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [24] imperfect sequences [] total 24 [2018-02-04 00:22:02,880 INFO L409 AbstractCegarLoop]: Interpolant automaton has 25 states [2018-02-04 00:22:02,880 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2018-02-04 00:22:02,880 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=49, Invalid=551, Unknown=0, NotChecked=0, Total=600 [2018-02-04 00:22:02,880 INFO L87 Difference]: Start difference. First operand 134 states and 140 transitions. Second operand 25 states. [2018-02-04 00:22:03,415 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 00:22:03,415 INFO L93 Difference]: Finished difference Result 144 states and 153 transitions. [2018-02-04 00:22:03,415 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2018-02-04 00:22:03,415 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 82 [2018-02-04 00:22:03,416 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 00:22:03,416 INFO L225 Difference]: With dead ends: 144 [2018-02-04 00:22:03,416 INFO L226 Difference]: Without dead ends: 144 [2018-02-04 00:22:03,417 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 33 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 82 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=85, Invalid=1037, Unknown=0, NotChecked=0, Total=1122 [2018-02-04 00:22:03,417 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 144 states. [2018-02-04 00:22:03,420 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 144 to 140. [2018-02-04 00:22:03,420 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 140 states. [2018-02-04 00:22:03,420 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 140 states to 140 states and 150 transitions. [2018-02-04 00:22:03,421 INFO L78 Accepts]: Start accepts. Automaton has 140 states and 150 transitions. Word has length 82 [2018-02-04 00:22:03,421 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 00:22:03,421 INFO L432 AbstractCegarLoop]: Abstraction has 140 states and 150 transitions. [2018-02-04 00:22:03,421 INFO L433 AbstractCegarLoop]: Interpolant automaton has 25 states. [2018-02-04 00:22:03,421 INFO L276 IsEmpty]: Start isEmpty. Operand 140 states and 150 transitions. [2018-02-04 00:22:03,422 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2018-02-04 00:22:03,422 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 00:22:03,422 INFO L351 BasicCegarLoop]: trace histogram [8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 00:22:03,422 INFO L371 AbstractCegarLoop]: === Iteration 21 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 00:22:03,422 INFO L82 PathProgramCache]: Analyzing trace with hash -170218833, now seen corresponding path program 1 times [2018-02-04 00:22:03,422 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 00:22:03,422 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 00:22:03,423 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:22:03,423 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 00:22:03,423 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:22:03,439 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 00:22:03,440 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 00:22:03,523 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 00:22:03,524 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 00:22:03,524 INFO L213 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-04 00:22:03,531 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 00:22:03,580 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 00:22:03,583 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 00:22:03,602 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 00:22:03,635 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 00:22:03,635 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12] total 13 [2018-02-04 00:22:03,636 INFO L409 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-02-04 00:22:03,636 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-02-04 00:22:03,636 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=68, Invalid=88, Unknown=0, NotChecked=0, Total=156 [2018-02-04 00:22:03,636 INFO L87 Difference]: Start difference. First operand 140 states and 150 transitions. Second operand 13 states. [2018-02-04 00:22:03,670 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 00:22:03,670 INFO L93 Difference]: Finished difference Result 143 states and 153 transitions. [2018-02-04 00:22:03,671 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-02-04 00:22:03,671 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 82 [2018-02-04 00:22:03,671 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 00:22:03,672 INFO L225 Difference]: With dead ends: 143 [2018-02-04 00:22:03,672 INFO L226 Difference]: Without dead ends: 141 [2018-02-04 00:22:03,672 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 94 GetRequests, 82 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 23 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=72, Invalid=110, Unknown=0, NotChecked=0, Total=182 [2018-02-04 00:22:03,672 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 141 states. [2018-02-04 00:22:03,675 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 141 to 141. [2018-02-04 00:22:03,675 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 141 states. [2018-02-04 00:22:03,676 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 141 states to 141 states and 151 transitions. [2018-02-04 00:22:03,676 INFO L78 Accepts]: Start accepts. Automaton has 141 states and 151 transitions. Word has length 82 [2018-02-04 00:22:03,676 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 00:22:03,676 INFO L432 AbstractCegarLoop]: Abstraction has 141 states and 151 transitions. [2018-02-04 00:22:03,676 INFO L433 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-02-04 00:22:03,676 INFO L276 IsEmpty]: Start isEmpty. Operand 141 states and 151 transitions. [2018-02-04 00:22:03,677 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 84 [2018-02-04 00:22:03,677 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 00:22:03,677 INFO L351 BasicCegarLoop]: trace histogram [9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 00:22:03,677 INFO L371 AbstractCegarLoop]: === Iteration 22 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 00:22:03,677 INFO L82 PathProgramCache]: Analyzing trace with hash -1743576679, now seen corresponding path program 2 times [2018-02-04 00:22:03,677 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 00:22:03,677 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 00:22:03,678 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:22:03,678 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 00:22:03,678 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:22:03,693 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 00:22:03,695 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 00:22:03,782 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 00:22:03,783 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 00:22:03,783 INFO L213 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-04 00:22:03,791 INFO L109 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-02-04 00:22:03,837 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2018-02-04 00:22:03,837 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 00:22:03,842 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 00:22:03,846 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-02-04 00:22:03,846 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 00:22:03,860 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-02-04 00:22:03,861 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 00:22:03,873 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-02-04 00:22:03,874 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-02-04 00:22:04,814 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2018-02-04 00:22:04,831 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-02-04 00:22:04,831 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [24] imperfect sequences [13] total 36 [2018-02-04 00:22:04,832 INFO L409 AbstractCegarLoop]: Interpolant automaton has 36 states [2018-02-04 00:22:04,832 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2018-02-04 00:22:04,832 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=153, Invalid=1107, Unknown=0, NotChecked=0, Total=1260 [2018-02-04 00:22:04,832 INFO L87 Difference]: Start difference. First operand 141 states and 151 transitions. Second operand 36 states. [2018-02-04 00:22:06,892 WARN L143 SmtUtils]: Spent 2023ms on a formula simplification that was a NOOP. DAG size: 39 [2018-02-04 00:22:13,203 WARN L143 SmtUtils]: Spent 6032ms on a formula simplification that was a NOOP. DAG size: 35 [2018-02-04 00:22:15,309 WARN L143 SmtUtils]: Spent 2020ms on a formula simplification that was a NOOP. DAG size: 35 [2018-02-04 00:22:16,306 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 00:22:16,306 INFO L93 Difference]: Finished difference Result 142 states and 151 transitions. [2018-02-04 00:22:16,306 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2018-02-04 00:22:16,306 INFO L78 Accepts]: Start accepts. Automaton has 36 states. Word has length 83 [2018-02-04 00:22:16,307 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 00:22:16,307 INFO L225 Difference]: With dead ends: 142 [2018-02-04 00:22:16,307 INFO L226 Difference]: Without dead ends: 140 [2018-02-04 00:22:16,308 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 114 GetRequests, 58 SyntacticMatches, 3 SemanticMatches, 53 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 678 ImplicationChecksByTransitivity, 11.5s TimeCoverageRelationStatistics Valid=348, Invalid=2622, Unknown=0, NotChecked=0, Total=2970 [2018-02-04 00:22:16,308 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 140 states. [2018-02-04 00:22:16,310 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 140 to 140. [2018-02-04 00:22:16,310 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 140 states. [2018-02-04 00:22:16,310 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 140 states to 140 states and 149 transitions. [2018-02-04 00:22:16,311 INFO L78 Accepts]: Start accepts. Automaton has 140 states and 149 transitions. Word has length 83 [2018-02-04 00:22:16,311 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 00:22:16,311 INFO L432 AbstractCegarLoop]: Abstraction has 140 states and 149 transitions. [2018-02-04 00:22:16,311 INFO L433 AbstractCegarLoop]: Interpolant automaton has 36 states. [2018-02-04 00:22:16,311 INFO L276 IsEmpty]: Start isEmpty. Operand 140 states and 149 transitions. [2018-02-04 00:22:16,311 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 89 [2018-02-04 00:22:16,311 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 00:22:16,311 INFO L351 BasicCegarLoop]: trace histogram [10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 00:22:16,312 INFO L371 AbstractCegarLoop]: === Iteration 23 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 00:22:16,312 INFO L82 PathProgramCache]: Analyzing trace with hash 470121776, now seen corresponding path program 1 times [2018-02-04 00:22:16,312 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 00:22:16,312 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 00:22:16,313 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:22:16,313 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 00:22:16,313 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:22:16,329 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 00:22:16,330 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 00:22:16,436 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 00:22:16,436 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 00:22:16,437 INFO L213 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-04 00:22:16,449 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 00:22:16,505 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 00:22:16,509 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 00:22:16,522 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 00:22:16,540 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 00:22:16,540 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14] total 15 [2018-02-04 00:22:16,541 INFO L409 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-02-04 00:22:16,541 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-02-04 00:22:16,541 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=93, Invalid=117, Unknown=0, NotChecked=0, Total=210 [2018-02-04 00:22:16,541 INFO L87 Difference]: Start difference. First operand 140 states and 149 transitions. Second operand 15 states. [2018-02-04 00:22:16,568 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 00:22:16,568 INFO L93 Difference]: Finished difference Result 143 states and 152 transitions. [2018-02-04 00:22:16,568 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-02-04 00:22:16,568 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 88 [2018-02-04 00:22:16,569 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 00:22:16,569 INFO L225 Difference]: With dead ends: 143 [2018-02-04 00:22:16,569 INFO L226 Difference]: Without dead ends: 141 [2018-02-04 00:22:16,570 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 102 GetRequests, 88 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 29 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=97, Invalid=143, Unknown=0, NotChecked=0, Total=240 [2018-02-04 00:22:16,570 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 141 states. [2018-02-04 00:22:16,572 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 141 to 141. [2018-02-04 00:22:16,572 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 141 states. [2018-02-04 00:22:16,573 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 141 states to 141 states and 150 transitions. [2018-02-04 00:22:16,573 INFO L78 Accepts]: Start accepts. Automaton has 141 states and 150 transitions. Word has length 88 [2018-02-04 00:22:16,573 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 00:22:16,573 INFO L432 AbstractCegarLoop]: Abstraction has 141 states and 150 transitions. [2018-02-04 00:22:16,574 INFO L433 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-02-04 00:22:16,574 INFO L276 IsEmpty]: Start isEmpty. Operand 141 states and 150 transitions. [2018-02-04 00:22:16,574 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 90 [2018-02-04 00:22:16,574 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 00:22:16,575 INFO L351 BasicCegarLoop]: trace histogram [11, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 00:22:16,575 INFO L371 AbstractCegarLoop]: === Iteration 24 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 00:22:16,575 INFO L82 PathProgramCache]: Analyzing trace with hash -1375757158, now seen corresponding path program 2 times [2018-02-04 00:22:16,575 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 00:22:16,575 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 00:22:16,576 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:22:16,576 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 00:22:16,576 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:22:16,592 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 00:22:16,593 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 00:22:16,700 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 00:22:16,701 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 00:22:16,701 INFO L213 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-04 00:22:16,706 INFO L109 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-02-04 00:22:16,740 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-02-04 00:22:16,740 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 00:22:16,742 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 00:22:16,751 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 00:22:16,768 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 00:22:16,768 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15] total 16 [2018-02-04 00:22:16,768 INFO L409 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-02-04 00:22:16,768 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-02-04 00:22:16,769 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=107, Invalid=133, Unknown=0, NotChecked=0, Total=240 [2018-02-04 00:22:16,769 INFO L87 Difference]: Start difference. First operand 141 states and 150 transitions. Second operand 16 states. [2018-02-04 00:22:16,788 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 00:22:16,788 INFO L93 Difference]: Finished difference Result 144 states and 153 transitions. [2018-02-04 00:22:16,788 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-02-04 00:22:16,789 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 89 [2018-02-04 00:22:16,789 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 00:22:16,789 INFO L225 Difference]: With dead ends: 144 [2018-02-04 00:22:16,789 INFO L226 Difference]: Without dead ends: 142 [2018-02-04 00:22:16,790 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 104 GetRequests, 89 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 32 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=111, Invalid=161, Unknown=0, NotChecked=0, Total=272 [2018-02-04 00:22:16,790 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 142 states. [2018-02-04 00:22:16,791 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 142 to 142. [2018-02-04 00:22:16,791 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 142 states. [2018-02-04 00:22:16,792 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 142 states to 142 states and 151 transitions. [2018-02-04 00:22:16,792 INFO L78 Accepts]: Start accepts. Automaton has 142 states and 151 transitions. Word has length 89 [2018-02-04 00:22:16,792 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 00:22:16,792 INFO L432 AbstractCegarLoop]: Abstraction has 142 states and 151 transitions. [2018-02-04 00:22:16,792 INFO L433 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-02-04 00:22:16,792 INFO L276 IsEmpty]: Start isEmpty. Operand 142 states and 151 transitions. [2018-02-04 00:22:16,792 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 91 [2018-02-04 00:22:16,793 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 00:22:16,793 INFO L351 BasicCegarLoop]: trace histogram [12, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 00:22:16,793 INFO L371 AbstractCegarLoop]: === Iteration 25 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 00:22:16,793 INFO L82 PathProgramCache]: Analyzing trace with hash 1531538032, now seen corresponding path program 3 times [2018-02-04 00:22:16,793 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 00:22:16,793 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 00:22:16,793 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:22:16,794 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 00:22:16,794 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:22:16,807 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 00:22:16,808 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 00:22:16,917 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 00:22:16,918 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 00:22:16,918 INFO L213 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-04 00:22:16,926 INFO L109 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-02-04 00:22:17,978 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 7 check-sat command(s) [2018-02-04 00:22:17,978 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 00:22:17,982 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 00:22:18,162 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 00:22:18,180 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 00:22:18,181 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 21] total 35 [2018-02-04 00:22:18,181 INFO L409 AbstractCegarLoop]: Interpolant automaton has 35 states [2018-02-04 00:22:18,181 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 35 interpolants. [2018-02-04 00:22:18,182 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=328, Invalid=862, Unknown=0, NotChecked=0, Total=1190 [2018-02-04 00:22:18,182 INFO L87 Difference]: Start difference. First operand 142 states and 151 transitions. Second operand 35 states. [2018-02-04 00:22:18,247 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 00:22:18,247 INFO L93 Difference]: Finished difference Result 145 states and 154 transitions. [2018-02-04 00:22:18,247 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-02-04 00:22:18,247 INFO L78 Accepts]: Start accepts. Automaton has 35 states. Word has length 90 [2018-02-04 00:22:18,247 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 00:22:18,248 INFO L225 Difference]: With dead ends: 145 [2018-02-04 00:22:18,248 INFO L226 Difference]: Without dead ends: 143 [2018-02-04 00:22:18,248 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 108 GetRequests, 72 SyntacticMatches, 0 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 449 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=368, Invalid=1038, Unknown=0, NotChecked=0, Total=1406 [2018-02-04 00:22:18,248 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 143 states. [2018-02-04 00:22:18,251 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 143 to 143. [2018-02-04 00:22:18,251 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 143 states. [2018-02-04 00:22:18,251 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 143 states to 143 states and 152 transitions. [2018-02-04 00:22:18,252 INFO L78 Accepts]: Start accepts. Automaton has 143 states and 152 transitions. Word has length 90 [2018-02-04 00:22:18,252 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 00:22:18,252 INFO L432 AbstractCegarLoop]: Abstraction has 143 states and 152 transitions. [2018-02-04 00:22:18,252 INFO L433 AbstractCegarLoop]: Interpolant automaton has 35 states. [2018-02-04 00:22:18,252 INFO L276 IsEmpty]: Start isEmpty. Operand 143 states and 152 transitions. [2018-02-04 00:22:18,253 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 92 [2018-02-04 00:22:18,253 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 00:22:18,253 INFO L351 BasicCegarLoop]: trace histogram [13, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 00:22:18,253 INFO L371 AbstractCegarLoop]: === Iteration 26 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 00:22:18,253 INFO L82 PathProgramCache]: Analyzing trace with hash 1463375706, now seen corresponding path program 4 times [2018-02-04 00:22:18,253 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 00:22:18,253 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 00:22:18,254 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:22:18,254 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 00:22:18,254 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:22:18,269 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 00:22:18,270 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 00:22:18,409 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 00:22:18,409 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 00:22:18,409 INFO L213 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-04 00:22:18,417 INFO L109 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-02-04 00:22:18,490 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-02-04 00:22:18,490 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 00:22:18,494 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 00:22:18,507 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 00:22:18,537 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 00:22:18,537 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17] total 18 [2018-02-04 00:22:18,537 INFO L409 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-02-04 00:22:18,538 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-02-04 00:22:18,538 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=138, Invalid=168, Unknown=0, NotChecked=0, Total=306 [2018-02-04 00:22:18,538 INFO L87 Difference]: Start difference. First operand 143 states and 152 transitions. Second operand 18 states. [2018-02-04 00:22:18,577 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 00:22:18,577 INFO L93 Difference]: Finished difference Result 146 states and 155 transitions. [2018-02-04 00:22:18,578 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-02-04 00:22:18,578 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 91 [2018-02-04 00:22:18,578 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 00:22:18,579 INFO L225 Difference]: With dead ends: 146 [2018-02-04 00:22:18,579 INFO L226 Difference]: Without dead ends: 144 [2018-02-04 00:22:18,579 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 108 GetRequests, 91 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 38 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=142, Invalid=200, Unknown=0, NotChecked=0, Total=342 [2018-02-04 00:22:18,580 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 144 states. [2018-02-04 00:22:18,582 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 144 to 144. [2018-02-04 00:22:18,582 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 144 states. [2018-02-04 00:22:18,583 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 144 states to 144 states and 153 transitions. [2018-02-04 00:22:18,583 INFO L78 Accepts]: Start accepts. Automaton has 144 states and 153 transitions. Word has length 91 [2018-02-04 00:22:18,583 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 00:22:18,583 INFO L432 AbstractCegarLoop]: Abstraction has 144 states and 153 transitions. [2018-02-04 00:22:18,583 INFO L433 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-02-04 00:22:18,583 INFO L276 IsEmpty]: Start isEmpty. Operand 144 states and 153 transitions. [2018-02-04 00:22:18,584 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2018-02-04 00:22:18,584 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 00:22:18,584 INFO L351 BasicCegarLoop]: trace histogram [14, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 00:22:18,584 INFO L371 AbstractCegarLoop]: === Iteration 27 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 00:22:18,584 INFO L82 PathProgramCache]: Analyzing trace with hash -649656400, now seen corresponding path program 5 times [2018-02-04 00:22:18,584 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 00:22:18,585 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 00:22:18,585 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:22:18,585 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 00:22:18,585 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:22:18,601 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 00:22:18,602 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 00:22:18,746 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 00:22:18,746 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 00:22:18,746 INFO L213 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-04 00:22:18,754 INFO L109 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-02-04 00:22:19,031 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 8 check-sat command(s) [2018-02-04 00:22:19,032 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 00:22:19,035 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 00:22:19,043 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 00:22:19,061 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 00:22:19,062 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 18] total 19 [2018-02-04 00:22:19,062 INFO L409 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-02-04 00:22:19,062 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-02-04 00:22:19,062 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=155, Invalid=187, Unknown=0, NotChecked=0, Total=342 [2018-02-04 00:22:19,062 INFO L87 Difference]: Start difference. First operand 144 states and 153 transitions. Second operand 19 states. [2018-02-04 00:22:19,087 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 00:22:19,087 INFO L93 Difference]: Finished difference Result 147 states and 156 transitions. [2018-02-04 00:22:19,091 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-02-04 00:22:19,091 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 92 [2018-02-04 00:22:19,091 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 00:22:19,091 INFO L225 Difference]: With dead ends: 147 [2018-02-04 00:22:19,091 INFO L226 Difference]: Without dead ends: 145 [2018-02-04 00:22:19,092 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 110 GetRequests, 92 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 41 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=159, Invalid=221, Unknown=0, NotChecked=0, Total=380 [2018-02-04 00:22:19,092 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 145 states. [2018-02-04 00:22:19,093 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 145 to 145. [2018-02-04 00:22:19,093 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 145 states. [2018-02-04 00:22:19,094 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 145 states to 145 states and 154 transitions. [2018-02-04 00:22:19,094 INFO L78 Accepts]: Start accepts. Automaton has 145 states and 154 transitions. Word has length 92 [2018-02-04 00:22:19,094 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 00:22:19,094 INFO L432 AbstractCegarLoop]: Abstraction has 145 states and 154 transitions. [2018-02-04 00:22:19,094 INFO L433 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-02-04 00:22:19,094 INFO L276 IsEmpty]: Start isEmpty. Operand 145 states and 154 transitions. [2018-02-04 00:22:19,094 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2018-02-04 00:22:19,094 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 00:22:19,094 INFO L351 BasicCegarLoop]: trace histogram [15, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 00:22:19,094 INFO L371 AbstractCegarLoop]: === Iteration 28 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 00:22:19,095 INFO L82 PathProgramCache]: Analyzing trace with hash -1729142246, now seen corresponding path program 6 times [2018-02-04 00:22:19,095 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 00:22:19,095 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 00:22:19,095 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:22:19,095 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 00:22:19,095 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:22:19,106 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 00:22:19,107 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 00:22:19,249 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 00:22:19,249 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 00:22:19,249 INFO L213 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-04 00:22:19,254 INFO L109 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-02-04 00:22:23,416 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 9 check-sat command(s) [2018-02-04 00:22:23,416 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 00:22:23,420 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 00:22:23,433 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 00:22:23,463 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 00:22:23,463 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19] total 20 [2018-02-04 00:22:23,463 INFO L409 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-02-04 00:22:23,463 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-02-04 00:22:23,463 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=173, Invalid=207, Unknown=0, NotChecked=0, Total=380 [2018-02-04 00:22:23,464 INFO L87 Difference]: Start difference. First operand 145 states and 154 transitions. Second operand 20 states. [2018-02-04 00:22:23,488 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 00:22:23,488 INFO L93 Difference]: Finished difference Result 148 states and 157 transitions. [2018-02-04 00:22:23,489 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-02-04 00:22:23,489 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 93 [2018-02-04 00:22:23,489 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 00:22:23,489 INFO L225 Difference]: With dead ends: 148 [2018-02-04 00:22:23,490 INFO L226 Difference]: Without dead ends: 146 [2018-02-04 00:22:23,490 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 112 GetRequests, 93 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 44 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=177, Invalid=243, Unknown=0, NotChecked=0, Total=420 [2018-02-04 00:22:23,490 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 146 states. [2018-02-04 00:22:23,491 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 146 to 146. [2018-02-04 00:22:23,492 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 146 states. [2018-02-04 00:22:23,492 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 146 states to 146 states and 155 transitions. [2018-02-04 00:22:23,492 INFO L78 Accepts]: Start accepts. Automaton has 146 states and 155 transitions. Word has length 93 [2018-02-04 00:22:23,493 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 00:22:23,493 INFO L432 AbstractCegarLoop]: Abstraction has 146 states and 155 transitions. [2018-02-04 00:22:23,493 INFO L433 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-02-04 00:22:23,493 INFO L276 IsEmpty]: Start isEmpty. Operand 146 states and 155 transitions. [2018-02-04 00:22:23,493 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2018-02-04 00:22:23,493 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 00:22:23,493 INFO L351 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 00:22:23,493 INFO L371 AbstractCegarLoop]: === Iteration 29 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 00:22:23,493 INFO L82 PathProgramCache]: Analyzing trace with hash -833465104, now seen corresponding path program 7 times [2018-02-04 00:22:23,493 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 00:22:23,493 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 00:22:23,494 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:22:23,494 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 00:22:23,494 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:22:23,540 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 00:22:23,541 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 00:22:26,028 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 00:22:26,028 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 00:22:26,028 INFO L213 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-04 00:22:26,034 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 00:22:26,071 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 00:22:26,076 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 00:22:26,149 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-02-04 00:22:26,151 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-02-04 00:22:26,151 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 00:22:26,152 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 00:22:26,155 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 00:22:26,155 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:20, output treesize:16 [2018-02-04 00:22:26,194 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 20 [2018-02-04 00:22:26,196 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:26,198 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 27 [2018-02-04 00:22:26,198 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 00:22:26,202 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 00:22:26,207 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-02-04 00:22:26,207 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:36, output treesize:32 [2018-02-04 00:22:26,260 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 29 [2018-02-04 00:22:26,262 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:26,263 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:26,264 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:26,264 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 52 [2018-02-04 00:22:26,264 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 00:22:26,271 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 00:22:26,280 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-02-04 00:22:26,281 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:52, output treesize:48 [2018-02-04 00:22:26,367 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 38 [2018-02-04 00:22:26,372 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:26,373 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:26,374 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:26,374 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:26,375 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:26,376 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:26,377 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 6 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 85 [2018-02-04 00:22:26,377 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 00:22:26,390 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 00:22:26,402 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 3 dim-0 vars, and 1 xjuncts. [2018-02-04 00:22:26,402 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:68, output treesize:64 [2018-02-04 00:22:26,483 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 58 treesize of output 47 [2018-02-04 00:22:26,485 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:26,486 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:26,487 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:26,488 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:26,489 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:26,489 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:26,490 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:26,491 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:26,491 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:26,492 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:26,493 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 10 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 126 [2018-02-04 00:22:26,493 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 00:22:26,512 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 00:22:26,527 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 1 dim-2 vars, End of recursive call: 4 dim-0 vars, and 1 xjuncts. [2018-02-04 00:22:26,527 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 5 variables, input treesize:84, output treesize:80 [2018-02-04 00:22:26,611 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 69 treesize of output 56 [2018-02-04 00:22:26,614 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:26,615 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:26,616 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:26,616 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:26,617 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:26,618 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:26,619 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:26,619 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:26,620 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:26,621 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:26,621 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:26,622 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:26,623 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:26,624 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:26,624 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:26,625 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 5 select indices, 5 select index equivalence classes, 15 disjoint index pairs (out of 10 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 56 treesize of output 175 [2018-02-04 00:22:26,625 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 00:22:26,651 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 00:22:26,667 INFO L267 ElimStorePlain]: Start of recursive call 1: 5 dim-0 vars, 1 dim-2 vars, End of recursive call: 5 dim-0 vars, and 1 xjuncts. [2018-02-04 00:22:26,667 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 6 variables, input treesize:100, output treesize:96 [2018-02-04 00:22:26,816 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 80 treesize of output 65 [2018-02-04 00:22:26,820 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:26,821 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:26,821 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:26,822 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:26,823 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:26,824 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:26,825 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:26,825 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:26,826 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:26,827 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:26,828 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:26,828 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:26,829 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:26,830 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:26,831 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:26,831 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:26,832 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:26,833 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:26,833 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:26,834 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:26,835 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:26,836 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 6 select indices, 6 select index equivalence classes, 21 disjoint index pairs (out of 15 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 65 treesize of output 232 [2018-02-04 00:22:26,836 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 00:22:26,873 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 00:22:26,893 INFO L267 ElimStorePlain]: Start of recursive call 1: 6 dim-0 vars, 1 dim-2 vars, End of recursive call: 6 dim-0 vars, and 1 xjuncts. [2018-02-04 00:22:26,893 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 7 variables, input treesize:116, output treesize:112 [2018-02-04 00:22:27,301 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 91 treesize of output 74 [2018-02-04 00:22:27,304 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:27,305 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:27,306 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:27,307 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:27,308 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:27,309 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:27,310 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:27,310 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:27,311 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:27,312 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:27,313 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:27,313 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:27,314 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:27,315 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:27,316 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:27,316 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:27,317 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:27,318 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:27,319 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:27,320 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:27,320 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:27,321 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:27,322 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:27,323 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:27,323 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:27,324 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:27,325 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:27,326 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:27,327 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 7 select indices, 7 select index equivalence classes, 28 disjoint index pairs (out of 21 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 74 treesize of output 297 [2018-02-04 00:22:27,327 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 00:22:27,379 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 00:22:27,403 INFO L267 ElimStorePlain]: Start of recursive call 1: 7 dim-0 vars, 1 dim-2 vars, End of recursive call: 7 dim-0 vars, and 1 xjuncts. [2018-02-04 00:22:27,403 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 8 variables, input treesize:132, output treesize:128 [2018-02-04 00:22:32,064 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 102 treesize of output 83 [2018-02-04 00:22:32,077 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:32,078 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:32,079 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:32,080 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:32,081 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:32,082 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:32,082 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:32,083 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:32,084 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:32,085 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:32,086 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:32,086 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:32,087 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:32,088 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:32,097 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:32,098 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:32,098 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:32,099 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:32,100 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:32,101 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:32,101 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:32,103 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:32,104 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:32,105 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:32,106 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:32,106 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:32,107 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:32,108 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:32,109 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:32,109 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:32,110 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:32,111 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:32,112 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:32,112 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:32,113 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:32,114 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:32,115 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 8 select indices, 8 select index equivalence classes, 36 disjoint index pairs (out of 28 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 83 treesize of output 370 [2018-02-04 00:22:32,115 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 00:22:32,198 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 00:22:32,230 INFO L267 ElimStorePlain]: Start of recursive call 1: 8 dim-0 vars, 1 dim-2 vars, End of recursive call: 8 dim-0 vars, and 1 xjuncts. [2018-02-04 00:22:32,230 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 9 variables, input treesize:148, output treesize:144 [2018-02-04 00:22:44,983 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 113 treesize of output 92 [2018-02-04 00:22:44,987 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:44,989 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:44,990 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:44,991 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:44,991 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:44,992 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:44,993 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:44,994 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:44,995 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:44,996 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:44,997 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:44,998 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:44,999 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:45,000 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:45,001 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:45,001 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:45,002 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:45,003 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:45,004 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:45,005 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:45,005 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:45,006 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:45,007 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:45,008 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:45,009 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:45,010 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:45,011 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:45,012 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:45,013 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:45,014 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:45,015 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:45,016 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:45,016 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:45,017 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:45,018 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:45,019 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:45,020 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:45,021 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:45,022 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:45,023 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:45,024 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:45,025 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:45,025 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:45,026 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:45,027 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:22:45,028 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 9 select indices, 9 select index equivalence classes, 45 disjoint index pairs (out of 36 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 92 treesize of output 451 [2018-02-04 00:22:45,029 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 00:22:45,110 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 00:22:45,150 INFO L267 ElimStorePlain]: Start of recursive call 1: 9 dim-0 vars, 1 dim-2 vars, End of recursive call: 9 dim-0 vars, and 1 xjuncts. [2018-02-04 00:22:45,150 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 10 variables, input treesize:164, output treesize:160 [2018-02-04 00:23:06,227 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 124 treesize of output 101 [2018-02-04 00:23:06,231 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:23:06,232 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:23:06,233 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:23:06,233 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:23:06,234 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:23:06,235 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:23:06,236 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:23:06,236 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:23:06,237 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:23:06,238 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:23:06,238 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:23:06,239 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:23:06,240 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:23:06,241 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:23:06,241 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:23:06,242 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:23:06,243 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:23:06,243 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:23:06,244 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:23:06,245 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:23:06,245 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:23:06,246 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:23:06,247 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:23:06,248 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:23:06,249 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:23:06,250 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:23:06,250 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:23:06,251 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:23:06,252 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:23:06,252 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:23:06,253 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:23:06,254 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:23:06,255 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:23:06,256 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:23:06,256 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:23:06,257 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:23:06,258 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:23:06,258 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:23:06,259 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:23:06,260 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:23:06,260 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:23:06,261 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:23:06,262 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:23:06,262 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:23:06,263 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:23:06,264 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:23:06,265 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:23:06,265 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:23:06,266 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:23:06,267 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:23:06,267 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:23:06,268 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:23:06,269 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:23:06,269 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:23:06,270 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:23:06,271 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 10 select indices, 10 select index equivalence classes, 55 disjoint index pairs (out of 45 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 101 treesize of output 540 [2018-02-04 00:23:06,272 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 00:23:06,405 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 00:23:06,441 INFO L267 ElimStorePlain]: Start of recursive call 1: 10 dim-0 vars, 1 dim-2 vars, End of recursive call: 10 dim-0 vars, and 1 xjuncts. [2018-02-04 00:23:06,441 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 11 variables, input treesize:180, output treesize:176 [2018-02-04 00:23:34,810 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 135 treesize of output 110 [2018-02-04 00:23:34,832 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:23:34,833 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:23:34,833 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:23:34,834 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:23:34,835 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:23:34,836 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:23:34,837 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:23:34,838 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:23:34,838 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:23:34,847 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:23:34,848 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:23:34,849 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:23:34,850 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:23:34,851 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:23:34,851 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:23:34,852 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:23:34,853 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:23:34,854 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:23:34,855 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:23:34,856 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:23:34,856 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:23:34,857 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:23:34,858 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:23:34,859 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:23:34,859 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:23:34,860 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:23:34,861 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:23:34,862 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:23:34,863 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:23:34,863 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:23:34,864 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:23:34,865 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:23:34,866 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:23:34,866 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:23:34,867 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:23:34,868 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:23:34,868 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:23:34,869 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:23:34,870 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:23:34,870 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:23:34,871 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:23:34,872 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:23:34,872 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:23:34,873 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:23:34,874 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:23:34,875 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:23:34,875 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:23:34,876 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:23:34,876 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:23:34,877 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:23:34,878 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:23:34,878 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:23:34,879 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:23:34,880 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:23:34,881 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:23:34,881 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:23:34,882 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:23:34,882 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:23:34,883 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:23:34,884 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:23:34,885 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:23:34,885 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:23:34,886 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:23:34,887 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:23:34,888 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:23:34,888 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:23:34,890 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 11 select indices, 11 select index equivalence classes, 66 disjoint index pairs (out of 55 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 110 treesize of output 637 [2018-02-04 00:23:34,891 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 00:23:35,048 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 00:23:35,095 INFO L267 ElimStorePlain]: Start of recursive call 1: 11 dim-0 vars, 1 dim-2 vars, End of recursive call: 11 dim-0 vars, and 1 xjuncts. [2018-02-04 00:23:35,095 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 12 variables, input treesize:196, output treesize:192 [2018-02-04 00:24:12,018 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 146 treesize of output 119 [2018-02-04 00:24:12,025 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:12,026 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:12,027 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:12,028 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:12,029 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:12,030 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:12,032 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:12,033 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:12,034 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:12,035 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:12,036 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:12,037 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:12,038 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:12,040 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:12,041 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:12,042 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:12,043 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:12,044 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:12,045 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:12,046 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:12,047 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:12,049 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:12,049 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:12,050 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:12,051 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:12,052 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:12,053 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:12,054 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:12,055 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:12,056 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:12,057 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:12,058 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:12,059 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:12,060 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:12,061 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:12,062 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:12,063 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:12,064 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:12,065 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:12,065 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:12,066 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:12,067 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:12,068 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:12,069 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:12,070 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:12,071 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:12,072 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:12,073 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:12,074 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:12,075 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:12,076 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:12,076 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:12,077 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:12,078 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:12,079 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:12,080 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:12,081 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:12,082 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:12,082 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:12,083 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:12,084 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:12,085 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:12,086 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:12,087 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:12,088 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:12,089 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:12,090 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:12,091 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:12,092 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:12,092 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:12,093 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:12,094 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:12,095 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:12,096 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:12,097 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:12,098 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:12,099 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:12,100 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:12,101 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 12 select indices, 12 select index equivalence classes, 78 disjoint index pairs (out of 66 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 119 treesize of output 742 [2018-02-04 00:24:12,103 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 00:24:12,293 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 00:24:12,339 INFO L267 ElimStorePlain]: Start of recursive call 1: 12 dim-0 vars, 1 dim-2 vars, End of recursive call: 12 dim-0 vars, and 1 xjuncts. [2018-02-04 00:24:12,339 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 13 variables, input treesize:212, output treesize:208 [2018-02-04 00:24:55,184 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 157 treesize of output 128 [2018-02-04 00:24:55,192 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:55,193 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:55,194 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:55,196 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:55,197 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:55,198 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:55,199 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:55,201 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:55,202 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:55,203 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:55,204 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:55,205 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:55,206 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:55,207 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:55,209 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:55,210 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:55,210 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:55,211 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:55,212 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:55,213 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:55,214 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:55,215 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:55,216 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:55,217 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:55,218 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:55,219 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:55,220 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:55,221 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:55,222 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:55,223 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:55,224 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:55,224 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:55,225 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:55,226 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:55,227 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:55,228 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:55,229 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:55,230 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:55,231 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:55,232 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:55,233 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:55,234 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:55,235 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:55,236 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:55,237 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:55,238 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:55,238 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:55,239 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:55,240 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:55,241 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:55,242 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:55,243 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:55,244 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:55,245 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:55,246 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:55,247 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:55,248 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:55,249 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:55,250 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:55,251 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:55,252 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:55,253 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:55,254 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:55,254 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:55,256 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:55,256 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:55,257 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:55,258 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:55,259 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:55,260 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:55,261 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:55,262 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:55,263 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:55,264 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:55,265 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:55,266 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:55,266 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:55,267 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:55,268 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:55,269 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:55,270 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:55,271 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:55,272 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:55,273 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:55,274 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:55,275 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:55,276 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:55,277 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:55,278 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:55,279 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:55,280 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:24:55,282 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 13 select indices, 13 select index equivalence classes, 91 disjoint index pairs (out of 78 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 128 treesize of output 855 [2018-02-04 00:24:55,283 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 00:24:55,534 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 00:24:55,587 INFO L267 ElimStorePlain]: Start of recursive call 1: 13 dim-0 vars, 1 dim-2 vars, End of recursive call: 13 dim-0 vars, and 1 xjuncts. [2018-02-04 00:24:55,587 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 14 variables, input treesize:228, output treesize:224 Received shutdown request... [2018-02-04 00:25:22,536 INFO L175 TraceCheckSpWp]: Timeout while computing interpolants [2018-02-04 00:25:22,536 WARN L491 AbstractCegarLoop]: Verification canceled [2018-02-04 00:25:22,539 WARN L185 ceAbstractionStarter]: Timeout [2018-02-04 00:25:22,539 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 04.02 12:25:22 BoogieIcfgContainer [2018-02-04 00:25:22,539 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-02-04 00:25:22,540 INFO L168 Benchmark]: Toolchain (without parser) took 220743.90 ms. Allocated memory was 394.3 MB in the beginning and 967.3 MB in the end (delta: 573.0 MB). Free memory was 351.1 MB in the beginning and 836.9 MB in the end (delta: -485.8 MB). Peak memory consumption was 87.3 MB. Max. memory is 5.3 GB. [2018-02-04 00:25:22,540 INFO L168 Benchmark]: CDTParser took 0.11 ms. Allocated memory is still 394.3 MB. Free memory is still 357.7 MB. There was no memory consumed. Max. memory is 5.3 GB. [2018-02-04 00:25:22,541 INFO L168 Benchmark]: CACSL2BoogieTranslator took 163.38 ms. Allocated memory is still 394.3 MB. Free memory was 351.1 MB in the beginning and 336.6 MB in the end (delta: 14.5 MB). Peak memory consumption was 14.5 MB. Max. memory is 5.3 GB. [2018-02-04 00:25:22,541 INFO L168 Benchmark]: Boogie Preprocessor took 32.72 ms. Allocated memory is still 394.3 MB. Free memory was 336.6 MB in the beginning and 335.3 MB in the end (delta: 1.3 MB). Peak memory consumption was 1.3 MB. Max. memory is 5.3 GB. [2018-02-04 00:25:22,541 INFO L168 Benchmark]: RCFGBuilder took 299.68 ms. Allocated memory is still 394.3 MB. Free memory was 335.3 MB in the beginning and 302.7 MB in the end (delta: 32.6 MB). Peak memory consumption was 32.6 MB. Max. memory is 5.3 GB. [2018-02-04 00:25:22,541 INFO L168 Benchmark]: TraceAbstraction took 220245.79 ms. Allocated memory was 394.3 MB in the beginning and 967.3 MB in the end (delta: 573.0 MB). Free memory was 302.7 MB in the beginning and 836.9 MB in the end (delta: -534.3 MB). Peak memory consumption was 38.8 MB. Max. memory is 5.3 GB. [2018-02-04 00:25:22,542 INFO L344 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.11 ms. Allocated memory is still 394.3 MB. Free memory is still 357.7 MB. There was no memory consumed. Max. memory is 5.3 GB. * CACSL2BoogieTranslator took 163.38 ms. Allocated memory is still 394.3 MB. Free memory was 351.1 MB in the beginning and 336.6 MB in the end (delta: 14.5 MB). Peak memory consumption was 14.5 MB. Max. memory is 5.3 GB. * Boogie Preprocessor took 32.72 ms. Allocated memory is still 394.3 MB. Free memory was 336.6 MB in the beginning and 335.3 MB in the end (delta: 1.3 MB). Peak memory consumption was 1.3 MB. Max. memory is 5.3 GB. * RCFGBuilder took 299.68 ms. Allocated memory is still 394.3 MB. Free memory was 335.3 MB in the beginning and 302.7 MB in the end (delta: 32.6 MB). Peak memory consumption was 32.6 MB. Max. memory is 5.3 GB. * TraceAbstraction took 220245.79 ms. Allocated memory was 394.3 MB in the beginning and 967.3 MB in the end (delta: 573.0 MB). Free memory was 302.7 MB in the beginning and 836.9 MB in the end (delta: -534.3 MB). Peak memory consumption was 38.8 MB. Max. memory is 5.3 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1294). Cancelled while BasicCegarLoop was analyzing trace of length 95 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 73 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1294). Cancelled while BasicCegarLoop was analyzing trace of length 95 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 73 known predicates. - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1411). Cancelled while BasicCegarLoop was analyzing trace of length 95 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 73 known predicates. - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1411). Cancelled while BasicCegarLoop was analyzing trace of length 95 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 73 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1265). Cancelled while BasicCegarLoop was analyzing trace of length 95 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 73 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1265). Cancelled while BasicCegarLoop was analyzing trace of length 95 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 73 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1267). Cancelled while BasicCegarLoop was analyzing trace of length 95 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 73 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1267). Cancelled while BasicCegarLoop was analyzing trace of length 95 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 73 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1344). Cancelled while BasicCegarLoop was analyzing trace of length 95 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 73 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1340). Cancelled while BasicCegarLoop was analyzing trace of length 95 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 73 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1344). Cancelled while BasicCegarLoop was analyzing trace of length 95 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 73 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1340). Cancelled while BasicCegarLoop was analyzing trace of length 95 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 73 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1339). Cancelled while BasicCegarLoop was analyzing trace of length 95 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 73 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1339). Cancelled while BasicCegarLoop was analyzing trace of length 95 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 73 known predicates. - TimeoutResultAtElement [Line: 1443]: Timeout (TraceAbstraction) Unable to prove that all allocated memory was freed (line 1443). Cancelled while BasicCegarLoop was analyzing trace of length 95 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 73 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1099). Cancelled while BasicCegarLoop was analyzing trace of length 95 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 73 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1100). Cancelled while BasicCegarLoop was analyzing trace of length 95 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 73 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1100). Cancelled while BasicCegarLoop was analyzing trace of length 95 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 73 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1099). Cancelled while BasicCegarLoop was analyzing trace of length 95 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 73 known predicates. - StatisticsResult: Ultimate Automizer benchmark data CFG has 18 procedures, 119 locations, 19 error locations. TIMEOUT Result, 220.2s OverallTime, 29 OverallIterations, 16 TraceHistogramMax, 26.4s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 2898 SDtfs, 723 SDslu, 24520 SDs, 0 SdLazy, 7203 SolverSat, 227 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 3.6s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 1456 GetRequests, 999 SyntacticMatches, 5 SemanticMatches, 452 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2121 ImplicationChecksByTransitivity, 28.0s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=146occurred in iteration=28, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.1s AutomataMinimizationTime, 28 MinimizatonAttempts, 27 StatesRemovedByMinimization, 7 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.2s SsaConstructionTime, 6.0s SatisfiabilityAnalysisTime, 7.5s InterpolantComputationTime, 2640 NumberOfCodeBlocks, 2619 NumberOfCodeBlocksAsserted, 66 NumberOfCheckSat, 2597 ConstructedInterpolants, 176 QuantifiedInterpolants, 582813 SizeOfPredicates, 67 NumberOfNonLiveVariables, 5238 ConjunctsInSsa, 394 ConjunctsInUnsatCore, 43 InterpolantComputations, 17 PerfectInterpolantSequences, 207/1463 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: Timeout Written .csv to /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memleaks_test22_3_false-valid-deref.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Camel.epf_AutomizerC.xml/Csv-Benchmark-0-2018-02-04_00-25-22-546.csv Written .csv to /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memleaks_test22_3_false-valid-deref.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Camel.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-0-2018-02-04_00-25-22-546.csv Completed graceful shutdown