java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/cade18-smtinterpol/svcomp-DerefFreeMemtrack-32bit-Automizer_Camel.epf -i ../../../trunk/examples/svcomp/ldv-memsafety/memleaks_test22_4_false-valid-memtrack_true-termination.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-ccafca9-m [2018-02-04 00:40:34,500 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-02-04 00:40:34,501 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-02-04 00:40:34,514 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-02-04 00:40:34,514 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-02-04 00:40:34,515 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-02-04 00:40:34,515 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-02-04 00:40:34,517 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-02-04 00:40:34,519 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-02-04 00:40:34,519 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-02-04 00:40:34,520 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-02-04 00:40:34,520 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-02-04 00:40:34,521 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-02-04 00:40:34,522 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-02-04 00:40:34,523 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-02-04 00:40:34,525 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-02-04 00:40:34,526 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-02-04 00:40:34,528 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-02-04 00:40:34,529 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-02-04 00:40:34,530 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-02-04 00:40:34,532 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-02-04 00:40:34,532 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-02-04 00:40:34,532 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-02-04 00:40:34,533 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-02-04 00:40:34,534 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-02-04 00:40:34,535 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-02-04 00:40:34,535 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-02-04 00:40:34,535 INFO L177 SettingsManager]: PEA to Boogie provides no preferences, ignoring... [2018-02-04 00:40:34,535 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-02-04 00:40:34,535 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-02-04 00:40:34,536 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-02-04 00:40:34,536 INFO L98 SettingsManager]: Beginning loading settings from /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/cade18-smtinterpol/svcomp-DerefFreeMemtrack-32bit-Automizer_Camel.epf [2018-02-04 00:40:34,545 INFO L110 SettingsManager]: Loading preferences was successful [2018-02-04 00:40:34,545 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-02-04 00:40:34,546 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-02-04 00:40:34,546 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-02-04 00:40:34,546 INFO L133 SettingsManager]: * Use SBE=true [2018-02-04 00:40:34,546 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-02-04 00:40:34,546 INFO L133 SettingsManager]: * sizeof long=4 [2018-02-04 00:40:34,547 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-02-04 00:40:34,547 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-02-04 00:40:34,547 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-02-04 00:40:34,547 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-02-04 00:40:34,547 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-02-04 00:40:34,547 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-02-04 00:40:34,547 INFO L133 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2018-02-04 00:40:34,547 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-02-04 00:40:34,547 INFO L133 SettingsManager]: * sizeof long double=12 [2018-02-04 00:40:34,547 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-02-04 00:40:34,548 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-02-04 00:40:34,548 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-02-04 00:40:34,548 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-02-04 00:40:34,548 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-02-04 00:40:34,548 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-02-04 00:40:34,548 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-02-04 00:40:34,548 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-02-04 00:40:34,548 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL [2018-02-04 00:40:34,578 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-02-04 00:40:34,586 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully initialized [2018-02-04 00:40:34,588 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-02-04 00:40:34,589 INFO L271 PluginConnector]: Initializing CDTParser... [2018-02-04 00:40:34,590 INFO L276 PluginConnector]: CDTParser initialized [2018-02-04 00:40:34,590 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/ldv-memsafety/memleaks_test22_4_false-valid-memtrack_true-termination.i [2018-02-04 00:40:34,747 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-02-04 00:40:34,748 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-02-04 00:40:34,749 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-02-04 00:40:34,749 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-02-04 00:40:34,755 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-02-04 00:40:34,755 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 04.02 12:40:34" (1/1) ... [2018-02-04 00:40:34,757 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@4b089594 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 12:40:34, skipping insertion in model container [2018-02-04 00:40:34,758 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 04.02 12:40:34" (1/1) ... [2018-02-04 00:40:34,767 INFO L153 Dispatcher]: Using SV-COMP mode [2018-02-04 00:40:34,800 INFO L153 Dispatcher]: Using SV-COMP mode [2018-02-04 00:40:34,884 INFO L450 PostProcessor]: Settings: Checked method=main [2018-02-04 00:40:34,900 INFO L450 PostProcessor]: Settings: Checked method=main [2018-02-04 00:40:34,909 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 12:40:34 WrapperNode [2018-02-04 00:40:34,909 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-02-04 00:40:34,910 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-02-04 00:40:34,910 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-02-04 00:40:34,910 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-02-04 00:40:34,918 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 12:40:34" (1/1) ... [2018-02-04 00:40:34,918 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 12:40:34" (1/1) ... [2018-02-04 00:40:34,926 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 12:40:34" (1/1) ... [2018-02-04 00:40:34,926 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 12:40:34" (1/1) ... [2018-02-04 00:40:34,932 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 12:40:34" (1/1) ... [2018-02-04 00:40:34,934 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 12:40:34" (1/1) ... [2018-02-04 00:40:34,936 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 12:40:34" (1/1) ... [2018-02-04 00:40:34,938 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-02-04 00:40:34,938 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-02-04 00:40:34,938 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-02-04 00:40:34,938 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-02-04 00:40:34,939 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 12:40:34" (1/1) ... No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-02-04 00:40:34,973 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-02-04 00:40:34,973 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-02-04 00:40:34,973 INFO L136 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~TO~VOID [2018-02-04 00:40:34,974 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_malloc [2018-02-04 00:40:34,974 INFO L136 BoogieDeclarations]: Found implementation of procedure LDV_INIT_LIST_HEAD [2018-02-04 00:40:34,974 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_atomic_add_return [2018-02-04 00:40:34,974 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_atomic_sub_return [2018-02-04 00:40:34,974 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kref_sub [2018-02-04 00:40:34,974 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kref_init [2018-02-04 00:40:34,974 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kref_get [2018-02-04 00:40:34,974 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kref_put [2018-02-04 00:40:34,974 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_cleanup [2018-02-04 00:40:34,974 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_release [2018-02-04 00:40:34,974 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_put [2018-02-04 00:40:34,974 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_get [2018-02-04 00:40:34,975 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_init_internal [2018-02-04 00:40:34,975 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_init [2018-02-04 00:40:34,975 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_create [2018-02-04 00:40:34,975 INFO L136 BoogieDeclarations]: Found implementation of procedure f_22_get [2018-02-04 00:40:34,975 INFO L136 BoogieDeclarations]: Found implementation of procedure entry_point [2018-02-04 00:40:34,975 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-02-04 00:40:34,975 INFO L128 BoogieDeclarations]: Found specification of procedure write~int [2018-02-04 00:40:34,975 INFO L128 BoogieDeclarations]: Found specification of procedure read~int [2018-02-04 00:40:34,975 INFO L128 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2018-02-04 00:40:34,975 INFO L128 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2018-02-04 00:40:34,975 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.free [2018-02-04 00:40:34,975 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-02-04 00:40:34,975 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-02-04 00:40:34,975 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2018-02-04 00:40:34,975 INFO L136 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2018-02-04 00:40:34,976 INFO L128 BoogieDeclarations]: Found specification of procedure malloc [2018-02-04 00:40:34,976 INFO L128 BoogieDeclarations]: Found specification of procedure free [2018-02-04 00:40:34,976 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2018-02-04 00:40:34,976 INFO L128 BoogieDeclarations]: Found specification of procedure memset [2018-02-04 00:40:34,976 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_malloc [2018-02-04 00:40:34,976 INFO L128 BoogieDeclarations]: Found specification of procedure LDV_INIT_LIST_HEAD [2018-02-04 00:40:34,976 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_atomic_add_return [2018-02-04 00:40:34,976 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_atomic_sub_return [2018-02-04 00:40:34,976 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kref_sub [2018-02-04 00:40:34,976 INFO L128 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~TO~VOID [2018-02-04 00:40:34,976 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kref_init [2018-02-04 00:40:34,976 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kref_get [2018-02-04 00:40:34,976 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kref_put [2018-02-04 00:40:34,976 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_cleanup [2018-02-04 00:40:34,977 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_release [2018-02-04 00:40:34,977 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_put [2018-02-04 00:40:34,977 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_get [2018-02-04 00:40:34,977 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_init_internal [2018-02-04 00:40:34,977 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_init [2018-02-04 00:40:34,977 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_create [2018-02-04 00:40:34,977 INFO L128 BoogieDeclarations]: Found specification of procedure f_22_get [2018-02-04 00:40:34,977 INFO L128 BoogieDeclarations]: Found specification of procedure entry_point [2018-02-04 00:40:34,977 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-02-04 00:40:34,977 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-02-04 00:40:34,977 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-02-04 00:40:35,130 WARN L455 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-02-04 00:40:35,291 INFO L257 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-02-04 00:40:35,292 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 04.02 12:40:35 BoogieIcfgContainer [2018-02-04 00:40:35,292 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-02-04 00:40:35,292 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-02-04 00:40:35,292 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-02-04 00:40:35,294 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-02-04 00:40:35,294 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 04.02 12:40:34" (1/3) ... [2018-02-04 00:40:35,295 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1389ab20 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 04.02 12:40:35, skipping insertion in model container [2018-02-04 00:40:35,295 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 12:40:34" (2/3) ... [2018-02-04 00:40:35,295 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1389ab20 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 04.02 12:40:35, skipping insertion in model container [2018-02-04 00:40:35,295 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 04.02 12:40:35" (3/3) ... [2018-02-04 00:40:35,296 INFO L107 eAbstractionObserver]: Analyzing ICFG memleaks_test22_4_false-valid-memtrack_true-termination.i [2018-02-04 00:40:35,301 INFO L128 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-02-04 00:40:35,306 INFO L140 ceAbstractionStarter]: Appying trace abstraction to program that has 23 error locations. [2018-02-04 00:40:35,328 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-02-04 00:40:35,328 INFO L323 AbstractCegarLoop]: Hoare is false [2018-02-04 00:40:35,328 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-02-04 00:40:35,328 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-02-04 00:40:35,328 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-02-04 00:40:35,329 INFO L327 AbstractCegarLoop]: Difference is false [2018-02-04 00:40:35,329 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-02-04 00:40:35,329 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-02-04 00:40:35,329 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-02-04 00:40:35,339 INFO L276 IsEmpty]: Start isEmpty. Operand 146 states. [2018-02-04 00:40:35,345 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-02-04 00:40:35,345 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 00:40:35,346 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 00:40:35,346 INFO L371 AbstractCegarLoop]: === Iteration 1 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 00:40:35,348 INFO L82 PathProgramCache]: Analyzing trace with hash -367619766, now seen corresponding path program 1 times [2018-02-04 00:40:35,350 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 00:40:35,350 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 00:40:35,384 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:40:35,384 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 00:40:35,384 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:40:35,411 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 00:40:35,419 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 00:40:35,580 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 00:40:35,582 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 00:40:35,582 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-02-04 00:40:35,584 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-02-04 00:40:35,596 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-02-04 00:40:35,597 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-02-04 00:40:35,598 INFO L87 Difference]: Start difference. First operand 146 states. Second operand 5 states. [2018-02-04 00:40:35,637 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 00:40:35,637 INFO L93 Difference]: Finished difference Result 152 states and 160 transitions. [2018-02-04 00:40:35,639 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-02-04 00:40:35,640 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 17 [2018-02-04 00:40:35,640 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 00:40:35,652 INFO L225 Difference]: With dead ends: 152 [2018-02-04 00:40:35,652 INFO L226 Difference]: Without dead ends: 149 [2018-02-04 00:40:35,654 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-02-04 00:40:35,666 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 149 states. [2018-02-04 00:40:35,679 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 149 to 147. [2018-02-04 00:40:35,680 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 147 states. [2018-02-04 00:40:35,682 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 147 states to 147 states and 155 transitions. [2018-02-04 00:40:35,683 INFO L78 Accepts]: Start accepts. Automaton has 147 states and 155 transitions. Word has length 17 [2018-02-04 00:40:35,683 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 00:40:35,683 INFO L432 AbstractCegarLoop]: Abstraction has 147 states and 155 transitions. [2018-02-04 00:40:35,683 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-02-04 00:40:35,683 INFO L276 IsEmpty]: Start isEmpty. Operand 147 states and 155 transitions. [2018-02-04 00:40:35,684 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2018-02-04 00:40:35,684 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 00:40:35,684 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 00:40:35,684 INFO L371 AbstractCegarLoop]: === Iteration 2 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 00:40:35,684 INFO L82 PathProgramCache]: Analyzing trace with hash -1040907540, now seen corresponding path program 1 times [2018-02-04 00:40:35,684 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 00:40:35,684 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 00:40:35,685 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:40:35,685 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 00:40:35,685 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:40:35,699 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 00:40:35,699 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 00:40:35,744 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 00:40:35,744 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 00:40:35,744 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-02-04 00:40:35,745 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-02-04 00:40:35,745 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-02-04 00:40:35,745 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-02-04 00:40:35,745 INFO L87 Difference]: Start difference. First operand 147 states and 155 transitions. Second operand 6 states. [2018-02-04 00:40:35,855 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 00:40:35,855 INFO L93 Difference]: Finished difference Result 148 states and 156 transitions. [2018-02-04 00:40:35,855 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-02-04 00:40:35,855 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 19 [2018-02-04 00:40:35,855 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 00:40:35,856 INFO L225 Difference]: With dead ends: 148 [2018-02-04 00:40:35,856 INFO L226 Difference]: Without dead ends: 148 [2018-02-04 00:40:35,857 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-02-04 00:40:35,857 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 148 states. [2018-02-04 00:40:35,863 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 148 to 146. [2018-02-04 00:40:35,864 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 146 states. [2018-02-04 00:40:35,865 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 146 states to 146 states and 154 transitions. [2018-02-04 00:40:35,866 INFO L78 Accepts]: Start accepts. Automaton has 146 states and 154 transitions. Word has length 19 [2018-02-04 00:40:35,866 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 00:40:35,866 INFO L432 AbstractCegarLoop]: Abstraction has 146 states and 154 transitions. [2018-02-04 00:40:35,866 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-02-04 00:40:35,866 INFO L276 IsEmpty]: Start isEmpty. Operand 146 states and 154 transitions. [2018-02-04 00:40:35,867 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2018-02-04 00:40:35,867 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 00:40:35,867 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 00:40:35,867 INFO L371 AbstractCegarLoop]: === Iteration 3 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 00:40:35,867 INFO L82 PathProgramCache]: Analyzing trace with hash -1040907539, now seen corresponding path program 1 times [2018-02-04 00:40:35,867 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 00:40:35,867 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 00:40:35,868 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:40:35,868 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 00:40:35,868 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:40:35,883 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 00:40:35,885 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 00:40:36,022 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 00:40:36,023 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 00:40:36,023 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-02-04 00:40:36,023 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-02-04 00:40:36,023 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-02-04 00:40:36,023 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-02-04 00:40:36,024 INFO L87 Difference]: Start difference. First operand 146 states and 154 transitions. Second operand 7 states. [2018-02-04 00:40:36,211 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 00:40:36,211 INFO L93 Difference]: Finished difference Result 147 states and 155 transitions. [2018-02-04 00:40:36,211 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-02-04 00:40:36,211 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 19 [2018-02-04 00:40:36,211 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 00:40:36,212 INFO L225 Difference]: With dead ends: 147 [2018-02-04 00:40:36,212 INFO L226 Difference]: Without dead ends: 147 [2018-02-04 00:40:36,213 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2018-02-04 00:40:36,213 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 147 states. [2018-02-04 00:40:36,219 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 147 to 145. [2018-02-04 00:40:36,219 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 145 states. [2018-02-04 00:40:36,220 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 145 states to 145 states and 153 transitions. [2018-02-04 00:40:36,220 INFO L78 Accepts]: Start accepts. Automaton has 145 states and 153 transitions. Word has length 19 [2018-02-04 00:40:36,221 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 00:40:36,221 INFO L432 AbstractCegarLoop]: Abstraction has 145 states and 153 transitions. [2018-02-04 00:40:36,221 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-02-04 00:40:36,221 INFO L276 IsEmpty]: Start isEmpty. Operand 145 states and 153 transitions. [2018-02-04 00:40:36,222 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-02-04 00:40:36,222 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 00:40:36,222 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 00:40:36,222 INFO L371 AbstractCegarLoop]: === Iteration 4 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 00:40:36,222 INFO L82 PathProgramCache]: Analyzing trace with hash -1287954832, now seen corresponding path program 1 times [2018-02-04 00:40:36,222 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 00:40:36,222 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 00:40:36,223 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:40:36,223 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 00:40:36,224 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:40:36,236 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 00:40:36,237 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 00:40:36,316 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 00:40:36,316 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 00:40:36,316 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-02-04 00:40:36,316 INFO L409 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-02-04 00:40:36,316 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-02-04 00:40:36,316 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72 [2018-02-04 00:40:36,317 INFO L87 Difference]: Start difference. First operand 145 states and 153 transitions. Second operand 9 states. [2018-02-04 00:40:36,388 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 00:40:36,388 INFO L93 Difference]: Finished difference Result 165 states and 174 transitions. [2018-02-04 00:40:36,388 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-02-04 00:40:36,388 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 29 [2018-02-04 00:40:36,389 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 00:40:36,391 INFO L225 Difference]: With dead ends: 165 [2018-02-04 00:40:36,391 INFO L226 Difference]: Without dead ends: 165 [2018-02-04 00:40:36,391 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=23, Invalid=87, Unknown=0, NotChecked=0, Total=110 [2018-02-04 00:40:36,391 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 165 states. [2018-02-04 00:40:36,401 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 165 to 159. [2018-02-04 00:40:36,401 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 159 states. [2018-02-04 00:40:36,403 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 159 states to 159 states and 167 transitions. [2018-02-04 00:40:36,403 INFO L78 Accepts]: Start accepts. Automaton has 159 states and 167 transitions. Word has length 29 [2018-02-04 00:40:36,403 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 00:40:36,403 INFO L432 AbstractCegarLoop]: Abstraction has 159 states and 167 transitions. [2018-02-04 00:40:36,403 INFO L433 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-02-04 00:40:36,403 INFO L276 IsEmpty]: Start isEmpty. Operand 159 states and 167 transitions. [2018-02-04 00:40:36,404 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-02-04 00:40:36,404 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 00:40:36,404 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 00:40:36,404 INFO L371 AbstractCegarLoop]: === Iteration 5 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 00:40:36,404 INFO L82 PathProgramCache]: Analyzing trace with hash 1025625474, now seen corresponding path program 1 times [2018-02-04 00:40:36,404 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 00:40:36,405 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 00:40:36,406 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:40:36,406 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 00:40:36,406 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:40:36,417 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 00:40:36,418 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 00:40:36,481 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 00:40:36,481 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 00:40:36,481 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-02-04 00:40:36,482 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-02-04 00:40:36,482 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-02-04 00:40:36,482 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-02-04 00:40:36,482 INFO L87 Difference]: Start difference. First operand 159 states and 167 transitions. Second operand 10 states. [2018-02-04 00:40:36,679 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 00:40:36,679 INFO L93 Difference]: Finished difference Result 158 states and 166 transitions. [2018-02-04 00:40:36,680 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-02-04 00:40:36,680 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 34 [2018-02-04 00:40:36,680 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 00:40:36,681 INFO L225 Difference]: With dead ends: 158 [2018-02-04 00:40:36,681 INFO L226 Difference]: Without dead ends: 158 [2018-02-04 00:40:36,681 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=29, Invalid=127, Unknown=0, NotChecked=0, Total=156 [2018-02-04 00:40:36,681 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 158 states. [2018-02-04 00:40:36,684 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 158 to 158. [2018-02-04 00:40:36,684 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 158 states. [2018-02-04 00:40:36,685 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 158 states to 158 states and 166 transitions. [2018-02-04 00:40:36,685 INFO L78 Accepts]: Start accepts. Automaton has 158 states and 166 transitions. Word has length 34 [2018-02-04 00:40:36,685 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 00:40:36,685 INFO L432 AbstractCegarLoop]: Abstraction has 158 states and 166 transitions. [2018-02-04 00:40:36,685 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-02-04 00:40:36,685 INFO L276 IsEmpty]: Start isEmpty. Operand 158 states and 166 transitions. [2018-02-04 00:40:36,686 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-02-04 00:40:36,686 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 00:40:36,686 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 00:40:36,686 INFO L371 AbstractCegarLoop]: === Iteration 6 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 00:40:36,686 INFO L82 PathProgramCache]: Analyzing trace with hash 1025625475, now seen corresponding path program 1 times [2018-02-04 00:40:36,686 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 00:40:36,686 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 00:40:36,688 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:40:36,688 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 00:40:36,689 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:40:36,708 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 00:40:36,709 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 00:40:36,743 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 00:40:36,743 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 00:40:36,743 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-02-04 00:40:36,744 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-02-04 00:40:36,744 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-02-04 00:40:36,744 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-02-04 00:40:36,744 INFO L87 Difference]: Start difference. First operand 158 states and 166 transitions. Second operand 4 states. [2018-02-04 00:40:36,757 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 00:40:36,757 INFO L93 Difference]: Finished difference Result 161 states and 169 transitions. [2018-02-04 00:40:36,758 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-02-04 00:40:36,758 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 34 [2018-02-04 00:40:36,759 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 00:40:36,760 INFO L225 Difference]: With dead ends: 161 [2018-02-04 00:40:36,760 INFO L226 Difference]: Without dead ends: 159 [2018-02-04 00:40:36,760 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-02-04 00:40:36,760 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 159 states. [2018-02-04 00:40:36,764 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 159 to 159. [2018-02-04 00:40:36,765 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 159 states. [2018-02-04 00:40:36,766 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 159 states to 159 states and 167 transitions. [2018-02-04 00:40:36,766 INFO L78 Accepts]: Start accepts. Automaton has 159 states and 167 transitions. Word has length 34 [2018-02-04 00:40:36,766 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 00:40:36,766 INFO L432 AbstractCegarLoop]: Abstraction has 159 states and 167 transitions. [2018-02-04 00:40:36,766 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-02-04 00:40:36,767 INFO L276 IsEmpty]: Start isEmpty. Operand 159 states and 167 transitions. [2018-02-04 00:40:36,767 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-02-04 00:40:36,767 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 00:40:36,768 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 00:40:36,768 INFO L371 AbstractCegarLoop]: === Iteration 7 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 00:40:36,768 INFO L82 PathProgramCache]: Analyzing trace with hash -553427227, now seen corresponding path program 1 times [2018-02-04 00:40:36,768 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 00:40:36,768 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 00:40:36,769 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:40:36,769 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 00:40:36,769 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:40:36,781 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 00:40:36,782 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 00:40:36,809 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 00:40:36,809 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 00:40:36,809 INFO L213 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-04 00:40:36,816 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 00:40:36,841 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 00:40:36,848 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 00:40:36,864 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 00:40:36,881 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 00:40:36,881 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 6 [2018-02-04 00:40:36,881 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-02-04 00:40:36,882 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-02-04 00:40:36,882 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-02-04 00:40:36,882 INFO L87 Difference]: Start difference. First operand 159 states and 167 transitions. Second operand 6 states. [2018-02-04 00:40:36,902 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 00:40:36,902 INFO L93 Difference]: Finished difference Result 162 states and 170 transitions. [2018-02-04 00:40:36,902 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-02-04 00:40:36,903 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 35 [2018-02-04 00:40:36,903 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 00:40:36,904 INFO L225 Difference]: With dead ends: 162 [2018-02-04 00:40:36,904 INFO L226 Difference]: Without dead ends: 160 [2018-02-04 00:40:36,904 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 40 GetRequests, 35 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=16, Invalid=26, Unknown=0, NotChecked=0, Total=42 [2018-02-04 00:40:36,904 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 160 states. [2018-02-04 00:40:36,909 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 160 to 160. [2018-02-04 00:40:36,909 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 160 states. [2018-02-04 00:40:36,910 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 160 states to 160 states and 168 transitions. [2018-02-04 00:40:36,910 INFO L78 Accepts]: Start accepts. Automaton has 160 states and 168 transitions. Word has length 35 [2018-02-04 00:40:36,910 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 00:40:36,910 INFO L432 AbstractCegarLoop]: Abstraction has 160 states and 168 transitions. [2018-02-04 00:40:36,910 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-02-04 00:40:36,910 INFO L276 IsEmpty]: Start isEmpty. Operand 160 states and 168 transitions. [2018-02-04 00:40:36,911 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-02-04 00:40:36,911 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 00:40:36,911 INFO L351 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 00:40:36,912 INFO L371 AbstractCegarLoop]: === Iteration 8 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 00:40:36,912 INFO L82 PathProgramCache]: Analyzing trace with hash 2035546563, now seen corresponding path program 2 times [2018-02-04 00:40:36,912 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 00:40:36,912 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 00:40:36,913 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:40:36,913 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 00:40:36,914 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:40:36,926 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 00:40:36,927 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 00:40:36,965 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 00:40:36,965 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 00:40:36,966 INFO L213 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-04 00:40:36,976 INFO L109 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-02-04 00:40:36,996 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2018-02-04 00:40:36,997 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 00:40:37,000 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 00:40:37,021 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-02-04 00:40:37,023 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 00:40:37,035 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-02-04 00:40:37,035 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 00:40:37,049 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-02-04 00:40:37,049 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-02-04 00:40:37,499 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-02-04 00:40:37,516 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-02-04 00:40:37,516 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [14] imperfect sequences [6] total 19 [2018-02-04 00:40:37,517 INFO L409 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-02-04 00:40:37,517 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-02-04 00:40:37,517 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=51, Invalid=291, Unknown=0, NotChecked=0, Total=342 [2018-02-04 00:40:37,517 INFO L87 Difference]: Start difference. First operand 160 states and 168 transitions. Second operand 19 states. [2018-02-04 00:40:39,542 WARN L143 SmtUtils]: Spent 1746ms on a formula simplification that was a NOOP. DAG size: 32 [2018-02-04 00:40:42,227 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 00:40:42,227 INFO L93 Difference]: Finished difference Result 233 states and 243 transitions. [2018-02-04 00:40:42,254 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-02-04 00:40:42,254 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 36 [2018-02-04 00:40:42,254 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 00:40:42,255 INFO L225 Difference]: With dead ends: 233 [2018-02-04 00:40:42,255 INFO L226 Difference]: Without dead ends: 231 [2018-02-04 00:40:42,255 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 49 GetRequests, 24 SyntacticMatches, 0 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 78 ImplicationChecksByTransitivity, 2.3s TimeCoverageRelationStatistics Valid=99, Invalid=603, Unknown=0, NotChecked=0, Total=702 [2018-02-04 00:40:42,255 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 231 states. [2018-02-04 00:40:42,259 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 231 to 160. [2018-02-04 00:40:42,259 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 160 states. [2018-02-04 00:40:42,259 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 160 states to 160 states and 168 transitions. [2018-02-04 00:40:42,260 INFO L78 Accepts]: Start accepts. Automaton has 160 states and 168 transitions. Word has length 36 [2018-02-04 00:40:42,262 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 00:40:42,262 INFO L432 AbstractCegarLoop]: Abstraction has 160 states and 168 transitions. [2018-02-04 00:40:42,262 INFO L433 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-02-04 00:40:42,262 INFO L276 IsEmpty]: Start isEmpty. Operand 160 states and 168 transitions. [2018-02-04 00:40:42,263 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2018-02-04 00:40:42,263 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 00:40:42,263 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 00:40:42,263 INFO L371 AbstractCegarLoop]: === Iteration 9 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 00:40:42,264 INFO L82 PathProgramCache]: Analyzing trace with hash -2073429328, now seen corresponding path program 1 times [2018-02-04 00:40:42,264 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 00:40:42,264 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 00:40:42,265 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:40:42,265 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 00:40:42,265 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:40:42,274 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 00:40:42,275 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 00:40:42,329 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 00:40:42,329 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 00:40:42,329 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-02-04 00:40:42,331 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-02-04 00:40:42,331 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-02-04 00:40:42,331 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-02-04 00:40:42,332 INFO L87 Difference]: Start difference. First operand 160 states and 168 transitions. Second operand 7 states. [2018-02-04 00:40:42,361 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 00:40:42,361 INFO L93 Difference]: Finished difference Result 169 states and 177 transitions. [2018-02-04 00:40:42,361 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-02-04 00:40:42,362 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 40 [2018-02-04 00:40:42,362 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 00:40:42,363 INFO L225 Difference]: With dead ends: 169 [2018-02-04 00:40:42,363 INFO L226 Difference]: Without dead ends: 169 [2018-02-04 00:40:42,363 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-02-04 00:40:42,364 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 169 states. [2018-02-04 00:40:42,367 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 169 to 165. [2018-02-04 00:40:42,367 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 165 states. [2018-02-04 00:40:42,368 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 165 states to 165 states and 173 transitions. [2018-02-04 00:40:42,368 INFO L78 Accepts]: Start accepts. Automaton has 165 states and 173 transitions. Word has length 40 [2018-02-04 00:40:42,368 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 00:40:42,368 INFO L432 AbstractCegarLoop]: Abstraction has 165 states and 173 transitions. [2018-02-04 00:40:42,368 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-02-04 00:40:42,369 INFO L276 IsEmpty]: Start isEmpty. Operand 165 states and 173 transitions. [2018-02-04 00:40:42,369 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-02-04 00:40:42,370 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 00:40:42,370 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 00:40:42,370 INFO L371 AbstractCegarLoop]: === Iteration 10 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 00:40:42,370 INFO L82 PathProgramCache]: Analyzing trace with hash 2040053740, now seen corresponding path program 1 times [2018-02-04 00:40:42,370 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 00:40:42,370 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 00:40:42,371 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:40:42,371 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 00:40:42,371 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:40:42,377 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 00:40:42,377 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 00:40:42,396 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 00:40:42,396 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 00:40:42,396 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-02-04 00:40:42,396 INFO L409 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-02-04 00:40:42,396 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-02-04 00:40:42,396 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-02-04 00:40:42,397 INFO L87 Difference]: Start difference. First operand 165 states and 173 transitions. Second operand 3 states. [2018-02-04 00:40:42,462 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 00:40:42,462 INFO L93 Difference]: Finished difference Result 181 states and 190 transitions. [2018-02-04 00:40:42,462 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-02-04 00:40:42,463 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 38 [2018-02-04 00:40:42,463 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 00:40:42,463 INFO L225 Difference]: With dead ends: 181 [2018-02-04 00:40:42,463 INFO L226 Difference]: Without dead ends: 169 [2018-02-04 00:40:42,464 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-02-04 00:40:42,464 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 169 states. [2018-02-04 00:40:42,466 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 169 to 161. [2018-02-04 00:40:42,466 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 161 states. [2018-02-04 00:40:42,467 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 161 states to 161 states and 168 transitions. [2018-02-04 00:40:42,467 INFO L78 Accepts]: Start accepts. Automaton has 161 states and 168 transitions. Word has length 38 [2018-02-04 00:40:42,467 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 00:40:42,467 INFO L432 AbstractCegarLoop]: Abstraction has 161 states and 168 transitions. [2018-02-04 00:40:42,467 INFO L433 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-02-04 00:40:42,467 INFO L276 IsEmpty]: Start isEmpty. Operand 161 states and 168 transitions. [2018-02-04 00:40:42,467 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2018-02-04 00:40:42,467 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 00:40:42,468 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 00:40:42,468 INFO L371 AbstractCegarLoop]: === Iteration 11 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 00:40:42,468 INFO L82 PathProgramCache]: Analyzing trace with hash 8062858, now seen corresponding path program 1 times [2018-02-04 00:40:42,468 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 00:40:42,468 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 00:40:42,468 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:40:42,469 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 00:40:42,469 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:40:42,472 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 00:40:42,472 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 00:40:42,498 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 00:40:42,498 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 00:40:42,499 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-02-04 00:40:42,499 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-02-04 00:40:42,499 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-02-04 00:40:42,499 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-02-04 00:40:42,499 INFO L87 Difference]: Start difference. First operand 161 states and 168 transitions. Second operand 6 states. [2018-02-04 00:40:42,517 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 00:40:42,517 INFO L93 Difference]: Finished difference Result 142 states and 148 transitions. [2018-02-04 00:40:42,517 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-02-04 00:40:42,517 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 40 [2018-02-04 00:40:42,518 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 00:40:42,518 INFO L225 Difference]: With dead ends: 142 [2018-02-04 00:40:42,518 INFO L226 Difference]: Without dead ends: 142 [2018-02-04 00:40:42,519 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-02-04 00:40:42,519 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 142 states. [2018-02-04 00:40:42,521 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 142 to 142. [2018-02-04 00:40:42,521 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 142 states. [2018-02-04 00:40:42,522 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 142 states to 142 states and 148 transitions. [2018-02-04 00:40:42,522 INFO L78 Accepts]: Start accepts. Automaton has 142 states and 148 transitions. Word has length 40 [2018-02-04 00:40:42,522 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 00:40:42,522 INFO L432 AbstractCegarLoop]: Abstraction has 142 states and 148 transitions. [2018-02-04 00:40:42,523 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-02-04 00:40:42,523 INFO L276 IsEmpty]: Start isEmpty. Operand 142 states and 148 transitions. [2018-02-04 00:40:42,523 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-02-04 00:40:42,523 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 00:40:42,523 INFO L351 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 00:40:42,524 INFO L371 AbstractCegarLoop]: === Iteration 12 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 00:40:42,524 INFO L82 PathProgramCache]: Analyzing trace with hash -1805397434, now seen corresponding path program 1 times [2018-02-04 00:40:42,524 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 00:40:42,524 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 00:40:42,525 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:40:42,525 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 00:40:42,525 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:40:42,535 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 00:40:42,536 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 00:40:42,582 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-02-04 00:40:42,583 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 00:40:42,583 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-02-04 00:40:42,583 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-02-04 00:40:42,583 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-02-04 00:40:42,583 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-02-04 00:40:42,583 INFO L87 Difference]: Start difference. First operand 142 states and 148 transitions. Second operand 10 states. [2018-02-04 00:40:42,746 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 00:40:42,746 INFO L93 Difference]: Finished difference Result 140 states and 146 transitions. [2018-02-04 00:40:42,746 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-02-04 00:40:42,746 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 42 [2018-02-04 00:40:42,747 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 00:40:42,747 INFO L225 Difference]: With dead ends: 140 [2018-02-04 00:40:42,747 INFO L226 Difference]: Without dead ends: 140 [2018-02-04 00:40:42,747 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=29, Invalid=127, Unknown=0, NotChecked=0, Total=156 [2018-02-04 00:40:42,747 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 140 states. [2018-02-04 00:40:42,749 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 140 to 140. [2018-02-04 00:40:42,749 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 140 states. [2018-02-04 00:40:42,749 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 140 states to 140 states and 146 transitions. [2018-02-04 00:40:42,749 INFO L78 Accepts]: Start accepts. Automaton has 140 states and 146 transitions. Word has length 42 [2018-02-04 00:40:42,749 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 00:40:42,749 INFO L432 AbstractCegarLoop]: Abstraction has 140 states and 146 transitions. [2018-02-04 00:40:42,750 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-02-04 00:40:42,750 INFO L276 IsEmpty]: Start isEmpty. Operand 140 states and 146 transitions. [2018-02-04 00:40:42,750 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-02-04 00:40:42,750 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 00:40:42,750 INFO L351 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 00:40:42,750 INFO L371 AbstractCegarLoop]: === Iteration 13 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 00:40:42,750 INFO L82 PathProgramCache]: Analyzing trace with hash -1805397433, now seen corresponding path program 1 times [2018-02-04 00:40:42,750 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 00:40:42,750 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 00:40:42,751 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:40:42,751 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 00:40:42,751 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:40:42,757 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 00:40:42,758 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 00:40:42,800 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 00:40:42,800 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 00:40:42,801 INFO L213 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-04 00:40:42,806 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 00:40:42,825 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 00:40:42,828 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 00:40:42,840 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 00:40:42,858 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 00:40:42,858 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 8 [2018-02-04 00:40:42,858 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-02-04 00:40:42,858 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-02-04 00:40:42,858 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=33, Unknown=0, NotChecked=0, Total=56 [2018-02-04 00:40:42,859 INFO L87 Difference]: Start difference. First operand 140 states and 146 transitions. Second operand 8 states. [2018-02-04 00:40:42,887 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 00:40:42,887 INFO L93 Difference]: Finished difference Result 143 states and 149 transitions. [2018-02-04 00:40:42,888 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-02-04 00:40:42,888 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 42 [2018-02-04 00:40:42,888 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 00:40:42,889 INFO L225 Difference]: With dead ends: 143 [2018-02-04 00:40:42,889 INFO L226 Difference]: Without dead ends: 141 [2018-02-04 00:40:42,889 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 49 GetRequests, 42 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2018-02-04 00:40:42,889 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 141 states. [2018-02-04 00:40:42,892 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 141 to 141. [2018-02-04 00:40:42,892 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 141 states. [2018-02-04 00:40:42,893 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 141 states to 141 states and 147 transitions. [2018-02-04 00:40:42,893 INFO L78 Accepts]: Start accepts. Automaton has 141 states and 147 transitions. Word has length 42 [2018-02-04 00:40:42,893 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 00:40:42,893 INFO L432 AbstractCegarLoop]: Abstraction has 141 states and 147 transitions. [2018-02-04 00:40:42,893 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-02-04 00:40:42,893 INFO L276 IsEmpty]: Start isEmpty. Operand 141 states and 147 transitions. [2018-02-04 00:40:42,894 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-02-04 00:40:42,894 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 00:40:42,894 INFO L351 BasicCegarLoop]: trace histogram [4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 00:40:42,894 INFO L371 AbstractCegarLoop]: === Iteration 14 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 00:40:42,894 INFO L82 PathProgramCache]: Analyzing trace with hash 1247207849, now seen corresponding path program 2 times [2018-02-04 00:40:42,895 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 00:40:42,895 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 00:40:42,895 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:40:42,896 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 00:40:42,896 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:40:42,907 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 00:40:42,908 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 00:40:42,953 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 00:40:42,953 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 00:40:42,953 INFO L213 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-04 00:40:42,964 INFO L109 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-02-04 00:40:42,986 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2018-02-04 00:40:42,986 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 00:40:42,989 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 00:40:42,997 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-02-04 00:40:42,998 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 00:40:43,008 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-02-04 00:40:43,009 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 00:40:43,019 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-02-04 00:40:43,019 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-02-04 00:40:45,139 WARN L1033 $PredicateComparison]: unable to prove that (or (exists ((ldv_malloc_~size Int) (v_ldv_kobject_create_~kobj~1.base_BEFORE_CALL_3 Int)) (let ((.cse0 (mod ldv_malloc_~size 4294967296))) (and (< 2147483647 .cse0) (= (+ (select |c_#length| v_ldv_kobject_create_~kobj~1.base_BEFORE_CALL_3) 4294967296) .cse0)))) (exists ((v_prenex_7 Int) (v_prenex_8 Int)) (let ((.cse1 (mod v_prenex_7 4294967296))) (and (= (select |c_#length| v_prenex_8) .cse1) (<= .cse1 2147483647))))) is different from true [2018-02-04 00:40:45,431 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-02-04 00:40:45,448 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-02-04 00:40:45,448 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [15] imperfect sequences [8] total 22 [2018-02-04 00:40:45,449 INFO L409 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-02-04 00:40:45,449 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-02-04 00:40:45,449 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=59, Invalid=364, Unknown=1, NotChecked=38, Total=462 [2018-02-04 00:40:45,449 INFO L87 Difference]: Start difference. First operand 141 states and 147 transitions. Second operand 22 states. [2018-02-04 00:40:47,376 WARN L143 SmtUtils]: Spent 1901ms on a formula simplification that was a NOOP. DAG size: 39 [2018-02-04 00:40:49,513 WARN L143 SmtUtils]: Spent 1923ms on a formula simplification that was a NOOP. DAG size: 32 [2018-02-04 00:40:50,023 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 00:40:50,023 INFO L93 Difference]: Finished difference Result 142 states and 148 transitions. [2018-02-04 00:40:50,036 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-02-04 00:40:50,036 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 43 [2018-02-04 00:40:50,037 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 00:40:50,037 INFO L225 Difference]: With dead ends: 142 [2018-02-04 00:40:50,037 INFO L226 Difference]: Without dead ends: 140 [2018-02-04 00:40:50,038 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 60 GetRequests, 29 SyntacticMatches, 1 SemanticMatches, 30 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 140 ImplicationChecksByTransitivity, 6.4s TimeCoverageRelationStatistics Valid=124, Invalid=809, Unknown=1, NotChecked=58, Total=992 [2018-02-04 00:40:50,038 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 140 states. [2018-02-04 00:40:50,039 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 140 to 140. [2018-02-04 00:40:50,040 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 140 states. [2018-02-04 00:40:50,040 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 140 states to 140 states and 146 transitions. [2018-02-04 00:40:50,040 INFO L78 Accepts]: Start accepts. Automaton has 140 states and 146 transitions. Word has length 43 [2018-02-04 00:40:50,040 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 00:40:50,041 INFO L432 AbstractCegarLoop]: Abstraction has 140 states and 146 transitions. [2018-02-04 00:40:50,041 INFO L433 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-02-04 00:40:50,041 INFO L276 IsEmpty]: Start isEmpty. Operand 140 states and 146 transitions. [2018-02-04 00:40:50,041 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2018-02-04 00:40:50,041 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 00:40:50,041 INFO L351 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 00:40:50,041 INFO L371 AbstractCegarLoop]: === Iteration 15 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 00:40:50,042 INFO L82 PathProgramCache]: Analyzing trace with hash 414207770, now seen corresponding path program 1 times [2018-02-04 00:40:50,042 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 00:40:50,042 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 00:40:50,044 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:40:50,044 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 00:40:50,044 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:40:50,054 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 00:40:50,055 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 00:40:50,092 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-02-04 00:40:50,092 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 00:40:50,092 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-02-04 00:40:50,092 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-02-04 00:40:50,092 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-02-04 00:40:50,092 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2018-02-04 00:40:50,093 INFO L87 Difference]: Start difference. First operand 140 states and 146 transitions. Second operand 8 states. [2018-02-04 00:40:50,112 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 00:40:50,113 INFO L93 Difference]: Finished difference Result 142 states and 147 transitions. [2018-02-04 00:40:50,113 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-02-04 00:40:50,113 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 49 [2018-02-04 00:40:50,113 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 00:40:50,113 INFO L225 Difference]: With dead ends: 142 [2018-02-04 00:40:50,113 INFO L226 Difference]: Without dead ends: 140 [2018-02-04 00:40:50,114 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=69, Unknown=0, NotChecked=0, Total=90 [2018-02-04 00:40:50,114 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 140 states. [2018-02-04 00:40:50,115 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 140 to 140. [2018-02-04 00:40:50,115 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 140 states. [2018-02-04 00:40:50,116 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 140 states to 140 states and 145 transitions. [2018-02-04 00:40:50,116 INFO L78 Accepts]: Start accepts. Automaton has 140 states and 145 transitions. Word has length 49 [2018-02-04 00:40:50,116 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 00:40:50,116 INFO L432 AbstractCegarLoop]: Abstraction has 140 states and 145 transitions. [2018-02-04 00:40:50,116 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-02-04 00:40:50,116 INFO L276 IsEmpty]: Start isEmpty. Operand 140 states and 145 transitions. [2018-02-04 00:40:50,117 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2018-02-04 00:40:50,117 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 00:40:50,117 INFO L351 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 00:40:50,117 INFO L371 AbstractCegarLoop]: === Iteration 16 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 00:40:50,117 INFO L82 PathProgramCache]: Analyzing trace with hash -673829217, now seen corresponding path program 1 times [2018-02-04 00:40:50,117 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 00:40:50,117 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 00:40:50,118 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:40:50,118 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 00:40:50,118 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:40:50,125 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 00:40:50,125 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 00:40:50,187 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-02-04 00:40:50,187 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 00:40:50,187 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-02-04 00:40:50,187 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-02-04 00:40:50,188 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-02-04 00:40:50,188 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-02-04 00:40:50,188 INFO L87 Difference]: Start difference. First operand 140 states and 145 transitions. Second operand 10 states. [2018-02-04 00:40:50,230 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 00:40:50,231 INFO L93 Difference]: Finished difference Result 144 states and 148 transitions. [2018-02-04 00:40:50,231 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-02-04 00:40:50,231 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 54 [2018-02-04 00:40:50,231 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 00:40:50,231 INFO L225 Difference]: With dead ends: 144 [2018-02-04 00:40:50,231 INFO L226 Difference]: Without dead ends: 140 [2018-02-04 00:40:50,232 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=29, Invalid=127, Unknown=0, NotChecked=0, Total=156 [2018-02-04 00:40:50,232 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 140 states. [2018-02-04 00:40:50,234 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 140 to 140. [2018-02-04 00:40:50,234 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 140 states. [2018-02-04 00:40:50,235 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 140 states to 140 states and 144 transitions. [2018-02-04 00:40:50,235 INFO L78 Accepts]: Start accepts. Automaton has 140 states and 144 transitions. Word has length 54 [2018-02-04 00:40:50,235 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 00:40:50,235 INFO L432 AbstractCegarLoop]: Abstraction has 140 states and 144 transitions. [2018-02-04 00:40:50,235 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-02-04 00:40:50,235 INFO L276 IsEmpty]: Start isEmpty. Operand 140 states and 144 transitions. [2018-02-04 00:40:50,236 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2018-02-04 00:40:50,236 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 00:40:50,236 INFO L351 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 00:40:50,236 INFO L371 AbstractCegarLoop]: === Iteration 17 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 00:40:50,236 INFO L82 PathProgramCache]: Analyzing trace with hash 367813469, now seen corresponding path program 1 times [2018-02-04 00:40:50,236 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 00:40:50,236 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 00:40:50,237 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:40:50,237 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 00:40:50,237 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:40:50,249 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 00:40:50,250 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 00:40:50,365 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-02-04 00:40:50,365 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 00:40:50,365 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2018-02-04 00:40:50,365 INFO L409 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-02-04 00:40:50,365 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-02-04 00:40:50,365 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=183, Unknown=0, NotChecked=0, Total=210 [2018-02-04 00:40:50,366 INFO L87 Difference]: Start difference. First operand 140 states and 144 transitions. Second operand 15 states. [2018-02-04 00:40:50,592 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 00:40:50,592 INFO L93 Difference]: Finished difference Result 138 states and 142 transitions. [2018-02-04 00:40:50,593 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-02-04 00:40:50,593 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 65 [2018-02-04 00:40:50,593 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 00:40:50,593 INFO L225 Difference]: With dead ends: 138 [2018-02-04 00:40:50,593 INFO L226 Difference]: Without dead ends: 138 [2018-02-04 00:40:50,593 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=47, Invalid=333, Unknown=0, NotChecked=0, Total=380 [2018-02-04 00:40:50,594 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 138 states. [2018-02-04 00:40:50,595 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 138 to 138. [2018-02-04 00:40:50,595 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 138 states. [2018-02-04 00:40:50,595 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 138 states to 138 states and 142 transitions. [2018-02-04 00:40:50,595 INFO L78 Accepts]: Start accepts. Automaton has 138 states and 142 transitions. Word has length 65 [2018-02-04 00:40:50,595 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 00:40:50,596 INFO L432 AbstractCegarLoop]: Abstraction has 138 states and 142 transitions. [2018-02-04 00:40:50,596 INFO L433 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-02-04 00:40:50,596 INFO L276 IsEmpty]: Start isEmpty. Operand 138 states and 142 transitions. [2018-02-04 00:40:50,596 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2018-02-04 00:40:50,596 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 00:40:50,596 INFO L351 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 00:40:50,596 INFO L371 AbstractCegarLoop]: === Iteration 18 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 00:40:50,596 INFO L82 PathProgramCache]: Analyzing trace with hash 367813470, now seen corresponding path program 1 times [2018-02-04 00:40:50,596 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 00:40:50,596 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 00:40:50,597 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:40:50,597 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 00:40:50,597 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:40:50,605 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 00:40:50,606 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 00:40:50,661 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 00:40:50,662 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 00:40:50,662 INFO L213 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-04 00:40:50,672 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 00:40:50,700 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 00:40:50,702 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 00:40:50,717 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 00:40:50,735 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 00:40:50,735 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9] total 10 [2018-02-04 00:40:50,735 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-02-04 00:40:50,735 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-02-04 00:40:50,735 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=38, Invalid=52, Unknown=0, NotChecked=0, Total=90 [2018-02-04 00:40:50,735 INFO L87 Difference]: Start difference. First operand 138 states and 142 transitions. Second operand 10 states. [2018-02-04 00:40:50,751 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 00:40:50,752 INFO L93 Difference]: Finished difference Result 141 states and 145 transitions. [2018-02-04 00:40:50,752 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-02-04 00:40:50,752 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 65 [2018-02-04 00:40:50,752 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 00:40:50,752 INFO L225 Difference]: With dead ends: 141 [2018-02-04 00:40:50,752 INFO L226 Difference]: Without dead ends: 139 [2018-02-04 00:40:50,753 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 74 GetRequests, 65 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=42, Invalid=68, Unknown=0, NotChecked=0, Total=110 [2018-02-04 00:40:50,753 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 139 states. [2018-02-04 00:40:50,755 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 139 to 139. [2018-02-04 00:40:50,755 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 139 states. [2018-02-04 00:40:50,755 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 139 states to 139 states and 143 transitions. [2018-02-04 00:40:50,755 INFO L78 Accepts]: Start accepts. Automaton has 139 states and 143 transitions. Word has length 65 [2018-02-04 00:40:50,755 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 00:40:50,756 INFO L432 AbstractCegarLoop]: Abstraction has 139 states and 143 transitions. [2018-02-04 00:40:50,756 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-02-04 00:40:50,756 INFO L276 IsEmpty]: Start isEmpty. Operand 139 states and 143 transitions. [2018-02-04 00:40:50,756 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2018-02-04 00:40:50,756 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 00:40:50,756 INFO L351 BasicCegarLoop]: trace histogram [6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 00:40:50,756 INFO L371 AbstractCegarLoop]: === Iteration 19 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 00:40:50,756 INFO L82 PathProgramCache]: Analyzing trace with hash -292477508, now seen corresponding path program 2 times [2018-02-04 00:40:50,757 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 00:40:50,757 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 00:40:50,757 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:40:50,757 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 00:40:50,757 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:40:50,766 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 00:40:50,766 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 00:40:50,816 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 00:40:50,816 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 00:40:50,816 INFO L213 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-04 00:40:50,826 INFO L109 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-02-04 00:40:50,857 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2018-02-04 00:40:50,857 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 00:40:50,862 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 00:40:50,867 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-02-04 00:40:50,868 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 00:40:50,881 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-02-04 00:40:50,882 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 00:40:50,894 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-02-04 00:40:50,894 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-02-04 00:40:51,513 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2018-02-04 00:40:51,530 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-02-04 00:40:51,530 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [20] imperfect sequences [10] total 29 [2018-02-04 00:40:51,530 INFO L409 AbstractCegarLoop]: Interpolant automaton has 29 states [2018-02-04 00:40:51,531 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2018-02-04 00:40:51,531 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=107, Invalid=705, Unknown=0, NotChecked=0, Total=812 [2018-02-04 00:40:51,531 INFO L87 Difference]: Start difference. First operand 139 states and 143 transitions. Second operand 29 states. [2018-02-04 00:40:53,913 WARN L143 SmtUtils]: Spent 2027ms on a formula simplification that was a NOOP. DAG size: 32 [2018-02-04 00:40:54,674 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 00:40:54,674 INFO L93 Difference]: Finished difference Result 140 states and 144 transitions. [2018-02-04 00:40:54,674 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2018-02-04 00:40:54,674 INFO L78 Accepts]: Start accepts. Automaton has 29 states. Word has length 66 [2018-02-04 00:40:54,674 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 00:40:54,675 INFO L225 Difference]: With dead ends: 140 [2018-02-04 00:40:54,675 INFO L226 Difference]: Without dead ends: 138 [2018-02-04 00:40:54,675 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 89 GetRequests, 47 SyntacticMatches, 1 SemanticMatches, 41 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 369 ImplicationChecksByTransitivity, 2.9s TimeCoverageRelationStatistics Valid=227, Invalid=1579, Unknown=0, NotChecked=0, Total=1806 [2018-02-04 00:40:54,675 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 138 states. [2018-02-04 00:40:54,676 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 138 to 138. [2018-02-04 00:40:54,677 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 138 states. [2018-02-04 00:40:54,677 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 138 states to 138 states and 142 transitions. [2018-02-04 00:40:54,677 INFO L78 Accepts]: Start accepts. Automaton has 138 states and 142 transitions. Word has length 66 [2018-02-04 00:40:54,677 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 00:40:54,677 INFO L432 AbstractCegarLoop]: Abstraction has 138 states and 142 transitions. [2018-02-04 00:40:54,677 INFO L433 AbstractCegarLoop]: Interpolant automaton has 29 states. [2018-02-04 00:40:54,677 INFO L276 IsEmpty]: Start isEmpty. Operand 138 states and 142 transitions. [2018-02-04 00:40:54,678 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 79 [2018-02-04 00:40:54,678 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 00:40:54,678 INFO L351 BasicCegarLoop]: trace histogram [7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 00:40:54,678 INFO L371 AbstractCegarLoop]: === Iteration 20 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 00:40:54,678 INFO L82 PathProgramCache]: Analyzing trace with hash -1942262813, now seen corresponding path program 1 times [2018-02-04 00:40:54,678 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 00:40:54,678 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 00:40:54,679 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:40:54,679 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 00:40:54,679 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:40:54,686 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 00:40:54,687 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 00:40:54,763 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2018-02-04 00:40:54,763 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 00:40:54,764 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2018-02-04 00:40:54,764 INFO L409 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-02-04 00:40:54,764 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-02-04 00:40:54,764 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=133, Unknown=0, NotChecked=0, Total=156 [2018-02-04 00:40:54,764 INFO L87 Difference]: Start difference. First operand 138 states and 142 transitions. Second operand 13 states. [2018-02-04 00:40:54,866 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 00:40:54,866 INFO L93 Difference]: Finished difference Result 144 states and 147 transitions. [2018-02-04 00:40:54,867 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-02-04 00:40:54,867 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 78 [2018-02-04 00:40:54,867 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 00:40:54,867 INFO L225 Difference]: With dead ends: 144 [2018-02-04 00:40:54,868 INFO L226 Difference]: Without dead ends: 138 [2018-02-04 00:40:54,868 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=39, Invalid=233, Unknown=0, NotChecked=0, Total=272 [2018-02-04 00:40:54,868 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 138 states. [2018-02-04 00:40:54,870 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 138 to 138. [2018-02-04 00:40:54,870 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 138 states. [2018-02-04 00:40:54,871 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 138 states to 138 states and 141 transitions. [2018-02-04 00:40:54,871 INFO L78 Accepts]: Start accepts. Automaton has 138 states and 141 transitions. Word has length 78 [2018-02-04 00:40:54,871 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 00:40:54,871 INFO L432 AbstractCegarLoop]: Abstraction has 138 states and 141 transitions. [2018-02-04 00:40:54,871 INFO L433 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-02-04 00:40:54,871 INFO L276 IsEmpty]: Start isEmpty. Operand 138 states and 141 transitions. [2018-02-04 00:40:54,872 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 92 [2018-02-04 00:40:54,872 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 00:40:54,872 INFO L351 BasicCegarLoop]: trace histogram [7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 00:40:54,872 INFO L371 AbstractCegarLoop]: === Iteration 21 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 00:40:54,872 INFO L82 PathProgramCache]: Analyzing trace with hash -240207015, now seen corresponding path program 1 times [2018-02-04 00:40:54,872 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 00:40:54,872 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 00:40:54,873 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:40:54,873 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 00:40:54,873 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:40:54,888 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 00:40:54,889 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 00:40:55,087 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2018-02-04 00:40:55,087 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 00:40:55,110 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [19] imperfect sequences [] total 19 [2018-02-04 00:40:55,111 INFO L409 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-02-04 00:40:55,111 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-02-04 00:40:55,111 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=39, Invalid=341, Unknown=0, NotChecked=0, Total=380 [2018-02-04 00:40:55,111 INFO L87 Difference]: Start difference. First operand 138 states and 141 transitions. Second operand 20 states. [2018-02-04 00:40:55,507 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 00:40:55,507 INFO L93 Difference]: Finished difference Result 145 states and 148 transitions. [2018-02-04 00:40:55,507 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-02-04 00:40:55,507 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 91 [2018-02-04 00:40:55,507 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 00:40:55,508 INFO L225 Difference]: With dead ends: 145 [2018-02-04 00:40:55,508 INFO L226 Difference]: Without dead ends: 145 [2018-02-04 00:40:55,508 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 53 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=67, Invalid=635, Unknown=0, NotChecked=0, Total=702 [2018-02-04 00:40:55,508 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 145 states. [2018-02-04 00:40:55,510 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 145 to 136. [2018-02-04 00:40:55,510 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 136 states. [2018-02-04 00:40:55,510 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 136 states to 136 states and 139 transitions. [2018-02-04 00:40:55,510 INFO L78 Accepts]: Start accepts. Automaton has 136 states and 139 transitions. Word has length 91 [2018-02-04 00:40:55,510 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 00:40:55,510 INFO L432 AbstractCegarLoop]: Abstraction has 136 states and 139 transitions. [2018-02-04 00:40:55,510 INFO L433 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-02-04 00:40:55,510 INFO L276 IsEmpty]: Start isEmpty. Operand 136 states and 139 transitions. [2018-02-04 00:40:55,511 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 92 [2018-02-04 00:40:55,511 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 00:40:55,511 INFO L351 BasicCegarLoop]: trace histogram [7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 00:40:55,511 INFO L371 AbstractCegarLoop]: === Iteration 22 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 00:40:55,511 INFO L82 PathProgramCache]: Analyzing trace with hash -240207014, now seen corresponding path program 1 times [2018-02-04 00:40:55,511 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 00:40:55,511 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 00:40:55,512 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:40:55,512 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 00:40:55,512 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:40:55,523 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 00:40:55,523 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 00:40:55,573 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 00:40:55,574 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 00:40:55,574 INFO L213 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-04 00:40:55,580 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 00:40:55,636 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 00:40:55,640 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 00:40:55,651 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 00:40:55,670 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 00:40:55,670 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11] total 12 [2018-02-04 00:40:55,671 INFO L409 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-02-04 00:40:55,671 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-02-04 00:40:55,671 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=57, Invalid=75, Unknown=0, NotChecked=0, Total=132 [2018-02-04 00:40:55,671 INFO L87 Difference]: Start difference. First operand 136 states and 139 transitions. Second operand 12 states. [2018-02-04 00:40:55,690 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 00:40:55,690 INFO L93 Difference]: Finished difference Result 139 states and 142 transitions. [2018-02-04 00:40:55,690 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-02-04 00:40:55,691 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 91 [2018-02-04 00:40:55,691 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 00:40:55,691 INFO L225 Difference]: With dead ends: 139 [2018-02-04 00:40:55,692 INFO L226 Difference]: Without dead ends: 137 [2018-02-04 00:40:55,692 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 102 GetRequests, 91 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=61, Invalid=95, Unknown=0, NotChecked=0, Total=156 [2018-02-04 00:40:55,692 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 137 states. [2018-02-04 00:40:55,694 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 137 to 137. [2018-02-04 00:40:55,694 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 137 states. [2018-02-04 00:40:55,695 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 137 states to 137 states and 140 transitions. [2018-02-04 00:40:55,695 INFO L78 Accepts]: Start accepts. Automaton has 137 states and 140 transitions. Word has length 91 [2018-02-04 00:40:55,695 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 00:40:55,695 INFO L432 AbstractCegarLoop]: Abstraction has 137 states and 140 transitions. [2018-02-04 00:40:55,696 INFO L433 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-02-04 00:40:55,696 INFO L276 IsEmpty]: Start isEmpty. Operand 137 states and 140 transitions. [2018-02-04 00:40:55,696 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2018-02-04 00:40:55,696 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 00:40:55,696 INFO L351 BasicCegarLoop]: trace histogram [8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 00:40:55,696 INFO L371 AbstractCegarLoop]: === Iteration 23 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 00:40:55,697 INFO L82 PathProgramCache]: Analyzing trace with hash -3595208, now seen corresponding path program 2 times [2018-02-04 00:40:55,697 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 00:40:55,697 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 00:40:55,698 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:40:55,698 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 00:40:55,698 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:40:55,715 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 00:40:55,716 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 00:40:55,813 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 00:40:55,813 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 00:40:55,813 INFO L213 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-04 00:40:55,821 INFO L109 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-02-04 00:40:55,870 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2018-02-04 00:40:55,870 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 00:40:55,875 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 00:40:55,878 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-02-04 00:40:55,879 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 00:40:55,889 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-02-04 00:40:55,889 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 00:40:55,897 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-02-04 00:40:55,897 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-02-04 00:40:56,675 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2018-02-04 00:40:56,693 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-02-04 00:40:56,693 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [20] imperfect sequences [12] total 31 [2018-02-04 00:40:56,693 INFO L409 AbstractCegarLoop]: Interpolant automaton has 31 states [2018-02-04 00:40:56,694 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 31 interpolants. [2018-02-04 00:40:56,694 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=126, Invalid=804, Unknown=0, NotChecked=0, Total=930 [2018-02-04 00:40:56,694 INFO L87 Difference]: Start difference. First operand 137 states and 140 transitions. Second operand 31 states. [2018-02-04 00:40:58,698 WARN L143 SmtUtils]: Spent 1970ms on a formula simplification that was a NOOP. DAG size: 39 [2018-02-04 00:41:00,787 WARN L143 SmtUtils]: Spent 2022ms on a formula simplification that was a NOOP. DAG size: 34 [2018-02-04 00:41:02,090 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 00:41:02,090 INFO L93 Difference]: Finished difference Result 138 states and 141 transitions. [2018-02-04 00:41:02,091 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2018-02-04 00:41:02,091 INFO L78 Accepts]: Start accepts. Automaton has 31 states. Word has length 92 [2018-02-04 00:41:02,091 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 00:41:02,092 INFO L225 Difference]: With dead ends: 138 [2018-02-04 00:41:02,092 INFO L226 Difference]: Without dead ends: 136 [2018-02-04 00:41:02,092 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 119 GetRequests, 71 SyntacticMatches, 3 SemanticMatches, 45 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 488 ImplicationChecksByTransitivity, 5.1s TimeCoverageRelationStatistics Valid=286, Invalid=1876, Unknown=0, NotChecked=0, Total=2162 [2018-02-04 00:41:02,093 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 136 states. [2018-02-04 00:41:02,094 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 136 to 136. [2018-02-04 00:41:02,095 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 136 states. [2018-02-04 00:41:02,096 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 136 states to 136 states and 139 transitions. [2018-02-04 00:41:02,096 INFO L78 Accepts]: Start accepts. Automaton has 136 states and 139 transitions. Word has length 92 [2018-02-04 00:41:02,096 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 00:41:02,096 INFO L432 AbstractCegarLoop]: Abstraction has 136 states and 139 transitions. [2018-02-04 00:41:02,096 INFO L433 AbstractCegarLoop]: Interpolant automaton has 31 states. [2018-02-04 00:41:02,096 INFO L276 IsEmpty]: Start isEmpty. Operand 136 states and 139 transitions. [2018-02-04 00:41:02,097 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 92 [2018-02-04 00:41:02,097 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 00:41:02,097 INFO L351 BasicCegarLoop]: trace histogram [9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 00:41:02,097 INFO L371 AbstractCegarLoop]: === Iteration 24 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 00:41:02,097 INFO L82 PathProgramCache]: Analyzing trace with hash -359095659, now seen corresponding path program 1 times [2018-02-04 00:41:02,097 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 00:41:02,097 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 00:41:02,098 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:41:02,098 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 00:41:02,099 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:41:02,113 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 00:41:02,114 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 00:41:02,230 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2018-02-04 00:41:02,230 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 00:41:02,231 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2018-02-04 00:41:02,231 INFO L409 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-02-04 00:41:02,231 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-02-04 00:41:02,231 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=91, Unknown=0, NotChecked=0, Total=110 [2018-02-04 00:41:02,231 INFO L87 Difference]: Start difference. First operand 136 states and 139 transitions. Second operand 11 states. [2018-02-04 00:41:02,277 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 00:41:02,277 INFO L93 Difference]: Finished difference Result 138 states and 140 transitions. [2018-02-04 00:41:02,277 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-02-04 00:41:02,277 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 91 [2018-02-04 00:41:02,277 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 00:41:02,278 INFO L225 Difference]: With dead ends: 138 [2018-02-04 00:41:02,278 INFO L226 Difference]: Without dead ends: 136 [2018-02-04 00:41:02,278 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=31, Invalid=151, Unknown=0, NotChecked=0, Total=182 [2018-02-04 00:41:02,278 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 136 states. [2018-02-04 00:41:02,280 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 136 to 136. [2018-02-04 00:41:02,280 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 136 states. [2018-02-04 00:41:02,280 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 136 states to 136 states and 138 transitions. [2018-02-04 00:41:02,280 INFO L78 Accepts]: Start accepts. Automaton has 136 states and 138 transitions. Word has length 91 [2018-02-04 00:41:02,281 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 00:41:02,281 INFO L432 AbstractCegarLoop]: Abstraction has 136 states and 138 transitions. [2018-02-04 00:41:02,281 INFO L433 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-02-04 00:41:02,281 INFO L276 IsEmpty]: Start isEmpty. Operand 136 states and 138 transitions. [2018-02-04 00:41:02,281 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 108 [2018-02-04 00:41:02,281 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 00:41:02,281 INFO L351 BasicCegarLoop]: trace histogram [9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 00:41:02,281 INFO L371 AbstractCegarLoop]: === Iteration 25 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 00:41:02,281 INFO L82 PathProgramCache]: Analyzing trace with hash 2073607857, now seen corresponding path program 1 times [2018-02-04 00:41:02,281 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 00:41:02,282 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 00:41:02,282 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:41:02,282 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 00:41:02,282 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:41:02,296 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 00:41:02,297 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 00:41:02,601 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2018-02-04 00:41:02,601 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 00:41:02,602 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [23] imperfect sequences [] total 23 [2018-02-04 00:41:02,602 INFO L409 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-02-04 00:41:02,602 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-02-04 00:41:02,602 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=47, Invalid=505, Unknown=0, NotChecked=0, Total=552 [2018-02-04 00:41:02,602 INFO L87 Difference]: Start difference. First operand 136 states and 138 transitions. Second operand 24 states. [2018-02-04 00:41:02,971 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 00:41:02,971 INFO L93 Difference]: Finished difference Result 139 states and 141 transitions. [2018-02-04 00:41:02,971 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-02-04 00:41:02,971 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 107 [2018-02-04 00:41:02,971 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 00:41:02,972 INFO L225 Difference]: With dead ends: 139 [2018-02-04 00:41:02,972 INFO L226 Difference]: Without dead ends: 139 [2018-02-04 00:41:02,972 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 32 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 78 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=83, Invalid=973, Unknown=0, NotChecked=0, Total=1056 [2018-02-04 00:41:02,972 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 139 states. [2018-02-04 00:41:02,973 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 139 to 134. [2018-02-04 00:41:02,973 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 134 states. [2018-02-04 00:41:02,974 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 134 states to 134 states and 136 transitions. [2018-02-04 00:41:02,974 INFO L78 Accepts]: Start accepts. Automaton has 134 states and 136 transitions. Word has length 107 [2018-02-04 00:41:02,974 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 00:41:02,974 INFO L432 AbstractCegarLoop]: Abstraction has 134 states and 136 transitions. [2018-02-04 00:41:02,974 INFO L433 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-02-04 00:41:02,974 INFO L276 IsEmpty]: Start isEmpty. Operand 134 states and 136 transitions. [2018-02-04 00:41:02,974 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 108 [2018-02-04 00:41:02,974 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 00:41:02,974 INFO L351 BasicCegarLoop]: trace histogram [9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 00:41:02,974 INFO L371 AbstractCegarLoop]: === Iteration 26 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 00:41:02,975 INFO L82 PathProgramCache]: Analyzing trace with hash 2073607858, now seen corresponding path program 1 times [2018-02-04 00:41:02,975 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 00:41:02,975 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 00:41:02,975 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:41:02,975 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 00:41:02,975 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:41:02,985 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 00:41:02,986 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 00:41:03,065 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 00:41:03,065 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 00:41:03,065 INFO L213 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-04 00:41:03,070 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 00:41:03,113 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 00:41:03,116 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 00:41:03,127 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 00:41:03,159 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 00:41:03,159 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13] total 14 [2018-02-04 00:41:03,160 INFO L409 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-02-04 00:41:03,160 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-02-04 00:41:03,160 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=80, Invalid=102, Unknown=0, NotChecked=0, Total=182 [2018-02-04 00:41:03,160 INFO L87 Difference]: Start difference. First operand 134 states and 136 transitions. Second operand 14 states. [2018-02-04 00:41:03,190 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 00:41:03,190 INFO L93 Difference]: Finished difference Result 137 states and 139 transitions. [2018-02-04 00:41:03,191 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-02-04 00:41:03,191 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 107 [2018-02-04 00:41:03,191 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 00:41:03,191 INFO L225 Difference]: With dead ends: 137 [2018-02-04 00:41:03,191 INFO L226 Difference]: Without dead ends: 135 [2018-02-04 00:41:03,192 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 120 GetRequests, 107 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 26 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=84, Invalid=126, Unknown=0, NotChecked=0, Total=210 [2018-02-04 00:41:03,192 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 135 states. [2018-02-04 00:41:03,193 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 135 to 135. [2018-02-04 00:41:03,193 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 135 states. [2018-02-04 00:41:03,194 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 135 states to 135 states and 137 transitions. [2018-02-04 00:41:03,194 INFO L78 Accepts]: Start accepts. Automaton has 135 states and 137 transitions. Word has length 107 [2018-02-04 00:41:03,194 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 00:41:03,194 INFO L432 AbstractCegarLoop]: Abstraction has 135 states and 137 transitions. [2018-02-04 00:41:03,194 INFO L433 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-02-04 00:41:03,194 INFO L276 IsEmpty]: Start isEmpty. Operand 135 states and 137 transitions. [2018-02-04 00:41:03,195 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 109 [2018-02-04 00:41:03,195 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 00:41:03,195 INFO L351 BasicCegarLoop]: trace histogram [10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 00:41:03,195 INFO L371 AbstractCegarLoop]: === Iteration 27 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 00:41:03,195 INFO L82 PathProgramCache]: Analyzing trace with hash 187804560, now seen corresponding path program 2 times [2018-02-04 00:41:03,196 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 00:41:03,196 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 00:41:03,196 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:41:03,196 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 00:41:03,197 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:41:03,211 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 00:41:03,212 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 00:41:03,309 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 00:41:03,309 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 00:41:03,309 INFO L213 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-04 00:41:03,322 INFO L109 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-02-04 00:41:03,370 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2018-02-04 00:41:03,370 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 00:41:03,375 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 00:41:03,382 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-02-04 00:41:03,382 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 00:41:03,397 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-02-04 00:41:03,397 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 00:41:03,411 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-02-04 00:41:03,411 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-02-04 00:41:04,288 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 55 trivial. 0 not checked. [2018-02-04 00:41:04,305 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-02-04 00:41:04,306 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [24] imperfect sequences [14] total 37 [2018-02-04 00:41:04,306 INFO L409 AbstractCegarLoop]: Interpolant automaton has 37 states [2018-02-04 00:41:04,306 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 37 interpolants. [2018-02-04 00:41:04,306 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=165, Invalid=1167, Unknown=0, NotChecked=0, Total=1332 [2018-02-04 00:41:04,307 INFO L87 Difference]: Start difference. First operand 135 states and 137 transitions. Second operand 37 states. [2018-02-04 00:41:06,576 WARN L143 SmtUtils]: Spent 2025ms on a formula simplification that was a NOOP. DAG size: 35 [2018-02-04 00:41:07,789 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 00:41:07,790 INFO L93 Difference]: Finished difference Result 136 states and 138 transitions. [2018-02-04 00:41:07,790 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 37 states. [2018-02-04 00:41:07,790 INFO L78 Accepts]: Start accepts. Automaton has 37 states. Word has length 108 [2018-02-04 00:41:07,790 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 00:41:07,790 INFO L225 Difference]: With dead ends: 136 [2018-02-04 00:41:07,790 INFO L226 Difference]: Without dead ends: 134 [2018-02-04 00:41:07,791 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 141 GetRequests, 81 SyntacticMatches, 5 SemanticMatches, 55 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 768 ImplicationChecksByTransitivity, 3.4s TimeCoverageRelationStatistics Valid=385, Invalid=2807, Unknown=0, NotChecked=0, Total=3192 [2018-02-04 00:41:07,791 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 134 states. [2018-02-04 00:41:07,792 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 134 to 134. [2018-02-04 00:41:07,793 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 134 states. [2018-02-04 00:41:07,793 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 134 states to 134 states and 136 transitions. [2018-02-04 00:41:07,793 INFO L78 Accepts]: Start accepts. Automaton has 134 states and 136 transitions. Word has length 108 [2018-02-04 00:41:07,793 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 00:41:07,793 INFO L432 AbstractCegarLoop]: Abstraction has 134 states and 136 transitions. [2018-02-04 00:41:07,793 INFO L433 AbstractCegarLoop]: Interpolant automaton has 37 states. [2018-02-04 00:41:07,794 INFO L276 IsEmpty]: Start isEmpty. Operand 134 states and 136 transitions. [2018-02-04 00:41:07,794 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 114 [2018-02-04 00:41:07,794 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 00:41:07,794 INFO L351 BasicCegarLoop]: trace histogram [11, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 00:41:07,794 INFO L371 AbstractCegarLoop]: === Iteration 28 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 00:41:07,795 INFO L82 PathProgramCache]: Analyzing trace with hash 508946867, now seen corresponding path program 1 times [2018-02-04 00:41:07,795 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 00:41:07,795 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 00:41:07,796 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:41:07,796 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 00:41:07,796 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:41:07,813 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 00:41:07,814 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 00:41:07,935 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 00:41:07,935 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 00:41:07,935 INFO L213 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-04 00:41:07,940 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 00:41:07,985 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 00:41:07,987 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 00:41:07,996 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 00:41:08,013 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 00:41:08,013 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15] total 16 [2018-02-04 00:41:08,013 INFO L409 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-02-04 00:41:08,013 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-02-04 00:41:08,014 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=107, Invalid=133, Unknown=0, NotChecked=0, Total=240 [2018-02-04 00:41:08,014 INFO L87 Difference]: Start difference. First operand 134 states and 136 transitions. Second operand 16 states. [2018-02-04 00:41:08,042 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 00:41:08,042 INFO L93 Difference]: Finished difference Result 137 states and 139 transitions. [2018-02-04 00:41:08,042 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-02-04 00:41:08,042 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 113 [2018-02-04 00:41:08,043 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 00:41:08,043 INFO L225 Difference]: With dead ends: 137 [2018-02-04 00:41:08,043 INFO L226 Difference]: Without dead ends: 135 [2018-02-04 00:41:08,043 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 128 GetRequests, 113 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 32 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=111, Invalid=161, Unknown=0, NotChecked=0, Total=272 [2018-02-04 00:41:08,043 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 135 states. [2018-02-04 00:41:08,045 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 135 to 135. [2018-02-04 00:41:08,045 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 135 states. [2018-02-04 00:41:08,045 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 135 states to 135 states and 137 transitions. [2018-02-04 00:41:08,045 INFO L78 Accepts]: Start accepts. Automaton has 135 states and 137 transitions. Word has length 113 [2018-02-04 00:41:08,046 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 00:41:08,046 INFO L432 AbstractCegarLoop]: Abstraction has 135 states and 137 transitions. [2018-02-04 00:41:08,046 INFO L433 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-02-04 00:41:08,046 INFO L276 IsEmpty]: Start isEmpty. Operand 135 states and 137 transitions. [2018-02-04 00:41:08,046 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 115 [2018-02-04 00:41:08,046 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 00:41:08,046 INFO L351 BasicCegarLoop]: trace histogram [12, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 00:41:08,046 INFO L371 AbstractCegarLoop]: === Iteration 29 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 00:41:08,046 INFO L82 PathProgramCache]: Analyzing trace with hash -1170917359, now seen corresponding path program 2 times [2018-02-04 00:41:08,047 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 00:41:08,047 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 00:41:08,047 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:41:08,047 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 00:41:08,047 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:41:08,057 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 00:41:08,058 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 00:41:08,163 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 00:41:08,163 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 00:41:08,163 INFO L213 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-04 00:41:08,169 INFO L109 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-02-04 00:41:08,210 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2018-02-04 00:41:08,210 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 00:41:08,214 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 00:41:08,263 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-02-04 00:41:08,264 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-02-04 00:41:08,264 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 00:41:08,264 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 00:41:08,265 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 00:41:08,265 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:11, output treesize:7 [2018-02-04 00:41:08,333 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-02-04 00:41:08,335 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-02-04 00:41:08,337 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-02-04 00:41:08,338 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:38, output treesize:26 [2018-02-04 00:41:08,340 WARN L1033 $PredicateComparison]: unable to prove that (exists ((LDV_INIT_LIST_HEAD_~list.offset Int) (v_DerPreprocessor_2 Int)) (and (= |c_#memory_int| (store |c_old(#memory_int)| |c_LDV_INIT_LIST_HEAD_#in~list.base| (let ((.cse0 (+ LDV_INIT_LIST_HEAD_~list.offset 4))) (store (store (select |c_old(#memory_int)| |c_LDV_INIT_LIST_HEAD_#in~list.base|) LDV_INIT_LIST_HEAD_~list.offset v_DerPreprocessor_2) .cse0 (select (select |c_#memory_int| |c_LDV_INIT_LIST_HEAD_#in~list.base|) .cse0))))) (<= LDV_INIT_LIST_HEAD_~list.offset |c_LDV_INIT_LIST_HEAD_#in~list.offset|))) is different from true [2018-02-04 00:41:08,344 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 27 [2018-02-04 00:41:08,346 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:41:08,348 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 35 [2018-02-04 00:41:08,350 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:41:08,351 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:41:08,354 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 37 [2018-02-04 00:41:08,354 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-02-04 00:41:08,359 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 00:41:08,361 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 00:41:08,364 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 00:41:08,364 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 3 variables, input treesize:37, output treesize:9 [2018-02-04 00:41:08,702 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:41:08,703 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 36 [2018-02-04 00:41:08,704 INFO L682 Elim1Store]: detected equality via solver [2018-02-04 00:41:08,705 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 00:41:08,705 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 15 [2018-02-04 00:41:08,706 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 00:41:08,707 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 00:41:08,710 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 00:41:08,710 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:32, output treesize:13 [2018-02-04 00:41:09,025 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2018-02-04 00:41:09,026 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 5 [2018-02-04 00:41:09,026 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 00:41:09,027 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 00:41:09,027 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 00:41:09,027 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:17, output treesize:5 [2018-02-04 00:41:09,063 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 78 trivial. 0 not checked. [2018-02-04 00:41:09,080 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-02-04 00:41:09,080 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [43] imperfect sequences [16] total 57 [2018-02-04 00:41:09,080 INFO L409 AbstractCegarLoop]: Interpolant automaton has 57 states [2018-02-04 00:41:09,080 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 57 interpolants. [2018-02-04 00:41:09,081 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=202, Invalid=2881, Unknown=1, NotChecked=108, Total=3192 [2018-02-04 00:41:09,081 INFO L87 Difference]: Start difference. First operand 135 states and 137 transitions. Second operand 57 states. [2018-02-04 00:41:10,432 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 00:41:10,432 INFO L93 Difference]: Finished difference Result 118 states and 118 transitions. [2018-02-04 00:41:10,432 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 59 states. [2018-02-04 00:41:10,432 INFO L78 Accepts]: Start accepts. Automaton has 57 states. Word has length 114 [2018-02-04 00:41:10,433 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 00:41:10,433 INFO L225 Difference]: With dead ends: 118 [2018-02-04 00:41:10,433 INFO L226 Difference]: Without dead ends: 116 [2018-02-04 00:41:10,435 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 151 GetRequests, 74 SyntacticMatches, 0 SemanticMatches, 77 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 1045 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=314, Invalid=5695, Unknown=1, NotChecked=152, Total=6162 [2018-02-04 00:41:10,435 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 116 states. [2018-02-04 00:41:10,437 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 116 to 116. [2018-02-04 00:41:10,437 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 116 states. [2018-02-04 00:41:10,437 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 116 states to 116 states and 116 transitions. [2018-02-04 00:41:10,437 INFO L78 Accepts]: Start accepts. Automaton has 116 states and 116 transitions. Word has length 114 [2018-02-04 00:41:10,437 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 00:41:10,437 INFO L432 AbstractCegarLoop]: Abstraction has 116 states and 116 transitions. [2018-02-04 00:41:10,438 INFO L433 AbstractCegarLoop]: Interpolant automaton has 57 states. [2018-02-04 00:41:10,438 INFO L276 IsEmpty]: Start isEmpty. Operand 116 states and 116 transitions. [2018-02-04 00:41:10,438 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 116 [2018-02-04 00:41:10,438 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 00:41:10,438 INFO L351 BasicCegarLoop]: trace histogram [13, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 00:41:10,438 INFO L371 AbstractCegarLoop]: === Iteration 30 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 00:41:10,439 INFO L82 PathProgramCache]: Analyzing trace with hash -1784564, now seen corresponding path program 1 times [2018-02-04 00:41:10,439 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 00:41:10,439 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 00:41:10,440 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:41:10,440 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 00:41:10,440 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:41:10,456 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 00:41:10,457 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 00:41:10,609 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 00:41:10,609 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 00:41:10,609 INFO L213 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-04 00:41:10,614 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 00:41:10,659 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 00:41:10,662 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 00:41:10,675 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 00:41:10,707 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 00:41:10,707 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17] total 18 [2018-02-04 00:41:10,707 INFO L409 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-02-04 00:41:10,708 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-02-04 00:41:10,708 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=138, Invalid=168, Unknown=0, NotChecked=0, Total=306 [2018-02-04 00:41:10,708 INFO L87 Difference]: Start difference. First operand 116 states and 116 transitions. Second operand 18 states. [2018-02-04 00:41:10,734 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 00:41:10,734 INFO L93 Difference]: Finished difference Result 119 states and 119 transitions. [2018-02-04 00:41:10,735 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-02-04 00:41:10,735 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 115 [2018-02-04 00:41:10,736 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 00:41:10,736 INFO L225 Difference]: With dead ends: 119 [2018-02-04 00:41:10,736 INFO L226 Difference]: Without dead ends: 117 [2018-02-04 00:41:10,736 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 132 GetRequests, 115 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 38 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=142, Invalid=200, Unknown=0, NotChecked=0, Total=342 [2018-02-04 00:41:10,737 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 117 states. [2018-02-04 00:41:10,737 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 117 to 117. [2018-02-04 00:41:10,737 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 117 states. [2018-02-04 00:41:10,738 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 117 states to 117 states and 117 transitions. [2018-02-04 00:41:10,738 INFO L78 Accepts]: Start accepts. Automaton has 117 states and 117 transitions. Word has length 115 [2018-02-04 00:41:10,738 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 00:41:10,738 INFO L432 AbstractCegarLoop]: Abstraction has 117 states and 117 transitions. [2018-02-04 00:41:10,738 INFO L433 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-02-04 00:41:10,738 INFO L276 IsEmpty]: Start isEmpty. Operand 117 states and 117 transitions. [2018-02-04 00:41:10,738 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 117 [2018-02-04 00:41:10,739 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 00:41:10,739 INFO L351 BasicCegarLoop]: trace histogram [14, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 00:41:10,739 INFO L371 AbstractCegarLoop]: === Iteration 31 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 00:41:10,739 INFO L82 PathProgramCache]: Analyzing trace with hash 556397546, now seen corresponding path program 2 times [2018-02-04 00:41:10,739 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 00:41:10,739 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 00:41:10,740 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:41:10,740 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 00:41:10,740 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:41:10,750 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 00:41:10,751 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 00:41:10,873 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 00:41:10,873 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 00:41:10,873 INFO L213 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-04 00:41:10,879 INFO L109 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-02-04 00:41:10,936 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-02-04 00:41:10,936 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 00:41:10,939 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 00:41:10,948 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 00:41:10,966 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 00:41:10,966 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 18] total 19 [2018-02-04 00:41:10,966 INFO L409 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-02-04 00:41:10,966 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-02-04 00:41:10,967 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=155, Invalid=187, Unknown=0, NotChecked=0, Total=342 [2018-02-04 00:41:10,967 INFO L87 Difference]: Start difference. First operand 117 states and 117 transitions. Second operand 19 states. [2018-02-04 00:41:10,989 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 00:41:10,989 INFO L93 Difference]: Finished difference Result 120 states and 120 transitions. [2018-02-04 00:41:10,989 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-02-04 00:41:10,990 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 116 [2018-02-04 00:41:10,990 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 00:41:10,990 INFO L225 Difference]: With dead ends: 120 [2018-02-04 00:41:10,990 INFO L226 Difference]: Without dead ends: 118 [2018-02-04 00:41:10,990 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 134 GetRequests, 116 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 41 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=159, Invalid=221, Unknown=0, NotChecked=0, Total=380 [2018-02-04 00:41:10,990 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 118 states. [2018-02-04 00:41:10,991 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 118 to 118. [2018-02-04 00:41:10,991 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 118 states. [2018-02-04 00:41:10,991 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 118 states to 118 states and 118 transitions. [2018-02-04 00:41:10,991 INFO L78 Accepts]: Start accepts. Automaton has 118 states and 118 transitions. Word has length 116 [2018-02-04 00:41:10,992 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 00:41:10,992 INFO L432 AbstractCegarLoop]: Abstraction has 118 states and 118 transitions. [2018-02-04 00:41:10,992 INFO L433 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-02-04 00:41:10,992 INFO L276 IsEmpty]: Start isEmpty. Operand 118 states and 118 transitions. [2018-02-04 00:41:10,992 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 118 [2018-02-04 00:41:10,992 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 00:41:10,992 INFO L351 BasicCegarLoop]: trace histogram [15, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 00:41:10,992 INFO L371 AbstractCegarLoop]: === Iteration 32 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 00:41:10,992 INFO L82 PathProgramCache]: Analyzing trace with hash 680173772, now seen corresponding path program 3 times [2018-02-04 00:41:10,993 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 00:41:10,993 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 00:41:10,993 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:41:10,993 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 00:41:10,993 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:41:11,004 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 00:41:11,005 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 00:41:11,175 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 00:41:11,176 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 00:41:11,176 INFO L213 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-02-04 00:41:11,185 INFO L109 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-02-04 00:41:25,254 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 9 check-sat command(s) [2018-02-04 00:41:25,254 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 00:41:25,263 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 00:41:25,463 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 00:41:25,486 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 00:41:25,500 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 24] total 41 [2018-02-04 00:41:25,501 INFO L409 AbstractCegarLoop]: Interpolant automaton has 41 states [2018-02-04 00:41:25,501 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 41 interpolants. [2018-02-04 00:41:25,501 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=472, Invalid=1168, Unknown=0, NotChecked=0, Total=1640 [2018-02-04 00:41:25,501 INFO L87 Difference]: Start difference. First operand 118 states and 118 transitions. Second operand 41 states. [2018-02-04 00:41:25,584 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 00:41:25,584 INFO L93 Difference]: Finished difference Result 121 states and 121 transitions. [2018-02-04 00:41:25,585 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-02-04 00:41:25,585 INFO L78 Accepts]: Start accepts. Automaton has 41 states. Word has length 117 [2018-02-04 00:41:25,585 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 00:41:25,585 INFO L225 Difference]: With dead ends: 121 [2018-02-04 00:41:25,585 INFO L226 Difference]: Without dead ends: 119 [2018-02-04 00:41:25,586 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 138 GetRequests, 96 SyntacticMatches, 0 SemanticMatches, 42 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 650 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=518, Invalid=1374, Unknown=0, NotChecked=0, Total=1892 [2018-02-04 00:41:25,586 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 119 states. [2018-02-04 00:41:25,587 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 119 to 119. [2018-02-04 00:41:25,587 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 119 states. [2018-02-04 00:41:25,587 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 119 states to 119 states and 119 transitions. [2018-02-04 00:41:25,587 INFO L78 Accepts]: Start accepts. Automaton has 119 states and 119 transitions. Word has length 117 [2018-02-04 00:41:25,588 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 00:41:25,588 INFO L432 AbstractCegarLoop]: Abstraction has 119 states and 119 transitions. [2018-02-04 00:41:25,588 INFO L433 AbstractCegarLoop]: Interpolant automaton has 41 states. [2018-02-04 00:41:25,588 INFO L276 IsEmpty]: Start isEmpty. Operand 119 states and 119 transitions. [2018-02-04 00:41:25,588 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 119 [2018-02-04 00:41:25,588 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 00:41:25,589 INFO L351 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 00:41:25,589 INFO L371 AbstractCegarLoop]: === Iteration 33 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 00:41:25,589 INFO L82 PathProgramCache]: Analyzing trace with hash 222269482, now seen corresponding path program 4 times [2018-02-04 00:41:25,589 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-02-04 00:41:25,589 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-02-04 00:41:25,589 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:41:25,590 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 00:41:25,590 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 00:41:25,633 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-02-04 00:41:25,670 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-02-04 00:41:25,692 INFO L410 BasicCegarLoop]: Counterexample might be feasible [2018-02-04 00:41:25,707 WARN L343 cessorBacktranslator]: Generated EnsuresSpecification free ensures #res.base == #ptr.base && #res.offset == #ptr.offset; is not ensure(true) [2018-02-04 00:41:25,713 WARN L343 cessorBacktranslator]: Generated EnsuresSpecification ensures #valid == old(#valid); is not ensure(true) [2018-02-04 00:41:25,728 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 04.02 12:41:25 BoogieIcfgContainer [2018-02-04 00:41:25,728 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-02-04 00:41:25,729 INFO L168 Benchmark]: Toolchain (without parser) took 50981.62 ms. Allocated memory was 388.0 MB in the beginning and 852.5 MB in the end (delta: 464.5 MB). Free memory was 344.7 MB in the beginning and 653.5 MB in the end (delta: -308.8 MB). Peak memory consumption was 155.7 MB. Max. memory is 5.3 GB. [2018-02-04 00:41:25,730 INFO L168 Benchmark]: CDTParser took 0.12 ms. Allocated memory is still 388.0 MB. Free memory is still 351.3 MB. There was no memory consumed. Max. memory is 5.3 GB. [2018-02-04 00:41:25,730 INFO L168 Benchmark]: CACSL2BoogieTranslator took 160.23 ms. Allocated memory is still 388.0 MB. Free memory was 344.7 MB in the beginning and 330.1 MB in the end (delta: 14.5 MB). Peak memory consumption was 14.5 MB. Max. memory is 5.3 GB. [2018-02-04 00:41:25,731 INFO L168 Benchmark]: Boogie Preprocessor took 28.15 ms. Allocated memory is still 388.0 MB. Free memory was 330.1 MB in the beginning and 328.8 MB in the end (delta: 1.3 MB). Peak memory consumption was 1.3 MB. Max. memory is 5.3 GB. [2018-02-04 00:41:25,731 INFO L168 Benchmark]: RCFGBuilder took 353.77 ms. Allocated memory is still 388.0 MB. Free memory was 328.8 MB in the beginning and 290.4 MB in the end (delta: 38.4 MB). Peak memory consumption was 38.4 MB. Max. memory is 5.3 GB. [2018-02-04 00:41:25,731 INFO L168 Benchmark]: TraceAbstraction took 50436.42 ms. Allocated memory was 388.0 MB in the beginning and 852.5 MB in the end (delta: 464.5 MB). Free memory was 290.4 MB in the beginning and 653.5 MB in the end (delta: -363.1 MB). Peak memory consumption was 101.4 MB. Max. memory is 5.3 GB. [2018-02-04 00:41:25,732 INFO L344 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.12 ms. Allocated memory is still 388.0 MB. Free memory is still 351.3 MB. There was no memory consumed. Max. memory is 5.3 GB. * CACSL2BoogieTranslator took 160.23 ms. Allocated memory is still 388.0 MB. Free memory was 344.7 MB in the beginning and 330.1 MB in the end (delta: 14.5 MB). Peak memory consumption was 14.5 MB. Max. memory is 5.3 GB. * Boogie Preprocessor took 28.15 ms. Allocated memory is still 388.0 MB. Free memory was 330.1 MB in the beginning and 328.8 MB in the end (delta: 1.3 MB). Peak memory consumption was 1.3 MB. Max. memory is 5.3 GB. * RCFGBuilder took 353.77 ms. Allocated memory is still 388.0 MB. Free memory was 328.8 MB in the beginning and 290.4 MB in the end (delta: 38.4 MB). Peak memory consumption was 38.4 MB. Max. memory is 5.3 GB. * TraceAbstraction took 50436.42 ms. Allocated memory was 388.0 MB in the beginning and 852.5 MB in the end (delta: 464.5 MB). Free memory was 290.4 MB in the beginning and 653.5 MB in the end (delta: -363.1 MB). Peak memory consumption was 101.4 MB. Max. memory is 5.3 GB. * Results from de.uni_freiburg.informatik.ultimate.boogie.preprocessor: - GenericResult: Unfinished Backtranslation Generated EnsuresSpecification free ensures #res.base == #ptr.base && #res.offset == #ptr.offset; is not ensure(true) - GenericResult: Unfinished Backtranslation Generated EnsuresSpecification ensures #valid == old(#valid); is not ensure(true) * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - UnprovableResult [Line: 1452]: Unable to prove that all allocated memory was freed Unable to prove that all allocated memory was freed Reason: overapproximation of memtrack at line 1452. Possible FailurePath: [L1453] CALL entry_point() [L1445] struct ldv_kobject *kobj; [L1446] CALL, EXPR ldv_kobject_create() [L1406] struct ldv_kobject *kobj; [L1408] CALL, EXPR ldv_malloc(sizeof(*kobj)) VAL [\old(size)=16] [L1073] COND TRUE __VERIFIER_nondet_int() [L1074] EXPR, FCALL malloc(size) VAL [\old(size)=16, malloc(size)={20:0}, size=16] [L1074] RET return malloc(size); VAL [\old(size)=16, \result={20:0}, malloc(size)={20:0}, size=16] [L1408] EXPR ldv_malloc(sizeof(*kobj)) VAL [ldv_malloc(sizeof(*kobj))={20:0}] [L1408] kobj = ldv_malloc(sizeof(*kobj)) [L1409] COND FALSE !(!kobj) VAL [kobj={20:0}] [L1411] FCALL memset(kobj, 0, sizeof(*kobj)) VAL [kobj={20:0}, memset(kobj, 0, sizeof(*kobj))={20:0}] [L1413] CALL ldv_kobject_init(kobj) VAL [kobj={20:0}] [L1394] COND FALSE !(!kobj) VAL [kobj={20:0}, kobj={20:0}] [L1398] CALL ldv_kobject_init_internal(kobj) VAL [kobj={20:0}] [L1380] COND FALSE !(!kobj) VAL [kobj={20:0}, kobj={20:0}] [L1382] CALL ldv_kref_init(&kobj->kref) VAL [kref={20:12}] [L1294] RET, FCALL ((&kref->refcount)->counter) = (1) VAL [kref={20:12}, kref={20:12}] [L1382] ldv_kref_init(&kobj->kref) VAL [kobj={20:0}, kobj={20:0}] [L1383] CALL LDV_INIT_LIST_HEAD(&kobj->entry) VAL [list={20:4}] [L1099] FCALL list->next = list VAL [list={20:4}, list={20:4}] [L1100] FCALL list->prev = list VAL [list={20:4}, list={20:4}] [L1383] RET, FCALL LDV_INIT_LIST_HEAD(&kobj->entry) VAL [kobj={20:0}, kobj={20:0}] [L1413] ldv_kobject_init(kobj) VAL [kobj={20:0}] [L1414] RET return kobj; VAL [\result={20:0}, kobj={20:0}] [L1446] EXPR ldv_kobject_create() VAL [ldv_kobject_create()={20:0}] [L1446] kobj = ldv_kobject_create() [L1447] CALL f_22_get(kobj) VAL [kobj={20:0}] [L1437] CALL ldv_kobject_get(kobj) VAL [kobj={20:0}] [L1373] COND TRUE \read(*kobj) VAL [kobj={20:0}, kobj={20:0}] [L1374] CALL ldv_kref_get(&kobj->kref) VAL [kref={20:12}] [L1308] CALL ldv_atomic_add_return(1, (&kref->refcount)) VAL [\old(i)=1, v={20:12}] [L1255] int temp; VAL [\old(i)=1, i=1, v={20:12}, v={20:12}] [L1256] EXPR, FCALL v->counter VAL [\old(i)=1, i=1, v={20:12}, v={20:12}, v->counter=1] [L1256] temp = v->counter [L1257] temp += i VAL [\old(i)=1, i=1, temp=2, v={20:12}, v={20:12}] [L1258] FCALL v->counter = temp VAL [\old(i)=1, i=1, temp=2, v={20:12}, v={20:12}] [L1259] RET return temp; VAL [\old(i)=1, \result=2, i=1, temp=2, v={20:12}, v={20:12}] [L1308] RET ldv_atomic_add_return(1, (&kref->refcount)) VAL [kref={20:12}, kref={20:12}, ldv_atomic_add_return(1, (&kref->refcount))=2] [L1374] ldv_kref_get(&kobj->kref) VAL [kobj={20:0}, kobj={20:0}] [L1375] RET return kobj; VAL [\result={20:0}, kobj={20:0}, kobj={20:0}] [L1437] RET ldv_kobject_get(kobj) VAL [kobj={20:0}, kobj={20:0}, ldv_kobject_get(kobj)={20:0}] [L1447] f_22_get(kobj) VAL [kobj={20:0}] [L1449] CALL ldv_kobject_put(kobj) VAL [kobj={20:0}] [L1361] COND TRUE \read(*kobj) VAL [kobj={20:0}, kobj={20:0}] [L1363] CALL ldv_kref_put(&kobj->kref, ldv_kobject_release) VAL [kref={20:12}, release={-1:0}] [L1313] CALL, EXPR ldv_kref_sub(kref, 1, release) VAL [\old(count)=1, kref={20:12}, release={-1:0}] [L1281] CALL, EXPR ldv_atomic_sub_return(((int) count), (&kref->refcount)) VAL [\old(i)=1, v={20:12}] [L1264] int temp; VAL [\old(i)=1, i=1, v={20:12}, v={20:12}] [L1265] EXPR, FCALL v->counter VAL [\old(i)=1, i=1, v={20:12}, v={20:12}, v->counter=2] [L1265] temp = v->counter [L1266] temp -= i VAL [\old(i)=1, i=1, temp=1, v={20:12}, v={20:12}] [L1267] FCALL v->counter = temp VAL [\old(i)=1, i=1, temp=1, v={20:12}, v={20:12}] [L1268] RET return temp; VAL [\old(i)=1, \result=1, i=1, temp=1, v={20:12}, v={20:12}] [L1281] EXPR ldv_atomic_sub_return(((int) count), (&kref->refcount)) VAL [\old(count)=1, count=1, kref={20:12}, kref={20:12}, ldv_atomic_sub_return(((int) count), (&kref->refcount))=1, release={-1:0}, release={-1:0}] [L1281] COND FALSE !((ldv_atomic_sub_return(((int) count), (&kref->refcount)) == 0)) [L1285] RET return 0; VAL [\old(count)=1, \result=0, count=1, kref={20:12}, kref={20:12}, release={-1:0}, release={-1:0}] [L1313] EXPR ldv_kref_sub(kref, 1, release) VAL [kref={20:12}, kref={20:12}, ldv_kref_sub(kref, 1, release)=0, release={-1:0}, release={-1:0}] [L1313] RET return ldv_kref_sub(kref, 1, release); [L1363] ldv_kref_put(&kobj->kref, ldv_kobject_release) VAL [kobj={20:0}, kobj={20:0}, ldv_kref_put(&kobj->kref, ldv_kobject_release)=0] [L1449] FCALL ldv_kobject_put(kobj) - StatisticsResult: Ultimate Automizer benchmark data CFG has 22 procedures, 146 locations, 23 error locations. UNSAFE Result, 50.4s OverallTime, 33 OverallIterations, 16 TraceHistogramMax, 25.1s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 3999 SDtfs, 1128 SDslu, 35385 SDs, 0 SdLazy, 12060 SolverSat, 324 SolverUnsat, 1 SolverUnknown, 0 SolverNotchecked, 7.5s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 1742 GetRequests, 1141 SyntacticMatches, 10 SemanticMatches, 591 ConstructedPredicates, 2 IntricatePredicates, 0 DeprecatedPredicates, 3879 ImplicationChecksByTransitivity, 23.8s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=165occurred in iteration=9, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.1s AutomataMinimizationTime, 32 MinimizatonAttempts, 109 StatesRemovedByMinimization, 9 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.2s SsaConstructionTime, 14.7s SatisfiabilityAnalysisTime, 9.2s InterpolantComputationTime, 3485 NumberOfCodeBlocks, 3443 NumberOfCodeBlocksAsserted, 57 NumberOfCheckSat, 3320 ConstructedInterpolants, 282 QuantifiedInterpolants, 1084372 SizeOfPredicates, 117 NumberOfNonLiveVariables, 5761 ConjunctsInSsa, 601 ConjunctsInUnsatCore, 47 InterpolantComputations, 23 PerfectInterpolantSequences, 400/1557 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: unable to determine feasibility of some traces Written .csv to /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memleaks_test22_4_false-valid-memtrack_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Camel.epf_AutomizerC.xml/Csv-Benchmark-0-2018-02-04_00-41-25-738.csv Written .csv to /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memleaks_test22_4_false-valid-memtrack_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Camel.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-0-2018-02-04_00-41-25-738.csv Received shutdown request...