java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/cade18-smtinterpol/svcomp-DerefFreeMemtrack-32bit-Automizer_SmtInterpol_NoArray.epf -i ../../../trunk/examples/svcomp/memsafety/20051113-1.c_false-valid-memtrack.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-c17473d-m [2018-02-04 17:50:47,811 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-02-04 17:50:47,813 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-02-04 17:50:47,826 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-02-04 17:50:47,826 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-02-04 17:50:47,827 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-02-04 17:50:47,828 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-02-04 17:50:47,829 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-02-04 17:50:47,831 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-02-04 17:50:47,832 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-02-04 17:50:47,833 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-02-04 17:50:47,833 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-02-04 17:50:47,834 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-02-04 17:50:47,835 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-02-04 17:50:47,836 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-02-04 17:50:47,837 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-02-04 17:50:47,839 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-02-04 17:50:47,840 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-02-04 17:50:47,841 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-02-04 17:50:47,842 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-02-04 17:50:47,844 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-02-04 17:50:47,844 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-02-04 17:50:47,844 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-02-04 17:50:47,845 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-02-04 17:50:47,846 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-02-04 17:50:47,847 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-02-04 17:50:47,847 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-02-04 17:50:47,848 INFO L177 SettingsManager]: PEA to Boogie provides no preferences, ignoring... [2018-02-04 17:50:47,848 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-02-04 17:50:47,848 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-02-04 17:50:47,848 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-02-04 17:50:47,849 INFO L98 SettingsManager]: Beginning loading settings from /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/cade18-smtinterpol/svcomp-DerefFreeMemtrack-32bit-Automizer_SmtInterpol_NoArray.epf [2018-02-04 17:50:47,858 INFO L110 SettingsManager]: Loading preferences was successful [2018-02-04 17:50:47,859 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-02-04 17:50:47,860 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-02-04 17:50:47,860 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-02-04 17:50:47,860 INFO L133 SettingsManager]: * Use SBE=true [2018-02-04 17:50:47,860 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-02-04 17:50:47,860 INFO L133 SettingsManager]: * sizeof long=4 [2018-02-04 17:50:47,861 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-02-04 17:50:47,861 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-02-04 17:50:47,861 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-02-04 17:50:47,861 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-02-04 17:50:47,861 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-02-04 17:50:47,861 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-02-04 17:50:47,862 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-02-04 17:50:47,862 INFO L133 SettingsManager]: * sizeof long double=12 [2018-02-04 17:50:47,862 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-02-04 17:50:47,862 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-02-04 17:50:47,862 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-02-04 17:50:47,862 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-02-04 17:50:47,863 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-02-04 17:50:47,863 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-02-04 17:50:47,863 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-02-04 17:50:47,863 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-02-04 17:50:47,863 INFO L133 SettingsManager]: * Trace refinement strategy=SMTINTERPOL [2018-02-04 17:50:47,895 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-02-04 17:50:47,905 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully initialized [2018-02-04 17:50:47,908 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-02-04 17:50:47,909 INFO L271 PluginConnector]: Initializing CDTParser... [2018-02-04 17:50:47,910 INFO L276 PluginConnector]: CDTParser initialized [2018-02-04 17:50:47,910 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/memsafety/20051113-1.c_false-valid-memtrack.i [2018-02-04 17:50:48,059 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-02-04 17:50:48,060 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-02-04 17:50:48,061 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-02-04 17:50:48,061 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-02-04 17:50:48,067 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-02-04 17:50:48,068 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 04.02 05:50:48" (1/1) ... [2018-02-04 17:50:48,071 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@26726890 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 05:50:48, skipping insertion in model container [2018-02-04 17:50:48,071 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 04.02 05:50:48" (1/1) ... [2018-02-04 17:50:48,085 INFO L153 Dispatcher]: Using SV-COMP mode [2018-02-04 17:50:48,116 INFO L153 Dispatcher]: Using SV-COMP mode [2018-02-04 17:50:48,204 INFO L450 PostProcessor]: Settings: Checked method=main [2018-02-04 17:50:48,219 INFO L450 PostProcessor]: Settings: Checked method=main [2018-02-04 17:50:48,226 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 05:50:48 WrapperNode [2018-02-04 17:50:48,226 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-02-04 17:50:48,227 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-02-04 17:50:48,227 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-02-04 17:50:48,227 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-02-04 17:50:48,240 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 05:50:48" (1/1) ... [2018-02-04 17:50:48,240 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 05:50:48" (1/1) ... [2018-02-04 17:50:48,247 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 05:50:48" (1/1) ... [2018-02-04 17:50:48,247 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 05:50:48" (1/1) ... [2018-02-04 17:50:48,250 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 05:50:48" (1/1) ... [2018-02-04 17:50:48,252 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 05:50:48" (1/1) ... [2018-02-04 17:50:48,253 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 05:50:48" (1/1) ... [2018-02-04 17:50:48,254 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-02-04 17:50:48,254 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-02-04 17:50:48,254 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-02-04 17:50:48,255 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-02-04 17:50:48,255 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 05:50:48" (1/1) ... No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-02-04 17:50:48,290 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-02-04 17:50:48,290 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-02-04 17:50:48,290 INFO L136 BoogieDeclarations]: Found implementation of procedure Sum [2018-02-04 17:50:48,290 INFO L136 BoogieDeclarations]: Found implementation of procedure Sum2 [2018-02-04 17:50:48,290 INFO L136 BoogieDeclarations]: Found implementation of procedure dummy_abort [2018-02-04 17:50:48,290 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-02-04 17:50:48,291 INFO L128 BoogieDeclarations]: Found specification of procedure write~int [2018-02-04 17:50:48,291 INFO L128 BoogieDeclarations]: Found specification of procedure read~int [2018-02-04 17:50:48,291 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.free [2018-02-04 17:50:48,291 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-02-04 17:50:48,291 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-02-04 17:50:48,291 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2018-02-04 17:50:48,291 INFO L136 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2018-02-04 17:50:48,291 INFO L128 BoogieDeclarations]: Found specification of procedure memset [2018-02-04 17:50:48,291 INFO L128 BoogieDeclarations]: Found specification of procedure Sum [2018-02-04 17:50:48,291 INFO L128 BoogieDeclarations]: Found specification of procedure Sum2 [2018-02-04 17:50:48,291 INFO L128 BoogieDeclarations]: Found specification of procedure dummy_abort [2018-02-04 17:50:48,291 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-02-04 17:50:48,291 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-02-04 17:50:48,292 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-02-04 17:50:48,379 WARN L455 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-02-04 17:50:48,479 INFO L257 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-02-04 17:50:48,479 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 04.02 05:50:48 BoogieIcfgContainer [2018-02-04 17:50:48,479 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-02-04 17:50:48,479 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-02-04 17:50:48,480 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-02-04 17:50:48,481 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-02-04 17:50:48,482 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 04.02 05:50:48" (1/3) ... [2018-02-04 17:50:48,483 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@22f512ff and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 04.02 05:50:48, skipping insertion in model container [2018-02-04 17:50:48,484 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 05:50:48" (2/3) ... [2018-02-04 17:50:48,484 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@22f512ff and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 04.02 05:50:48, skipping insertion in model container [2018-02-04 17:50:48,484 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 04.02 05:50:48" (3/3) ... [2018-02-04 17:50:48,485 INFO L107 eAbstractionObserver]: Analyzing ICFG 20051113-1.c_false-valid-memtrack.i [2018-02-04 17:50:48,490 INFO L128 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-02-04 17:50:48,495 INFO L140 ceAbstractionStarter]: Appying trace abstraction to program that has 25 error locations. [2018-02-04 17:50:48,517 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-02-04 17:50:48,518 INFO L323 AbstractCegarLoop]: Hoare is false [2018-02-04 17:50:48,518 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-02-04 17:50:48,519 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-02-04 17:50:48,519 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-02-04 17:50:48,519 INFO L327 AbstractCegarLoop]: Difference is false [2018-02-04 17:50:48,519 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-02-04 17:50:48,519 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-02-04 17:50:48,520 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-02-04 17:50:48,531 INFO L276 IsEmpty]: Start isEmpty. Operand 80 states. [2018-02-04 17:50:48,540 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 9 [2018-02-04 17:50:48,540 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 17:50:48,541 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 17:50:48,541 INFO L371 AbstractCegarLoop]: === Iteration 1 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-04 17:50:48,546 INFO L82 PathProgramCache]: Analyzing trace with hash -1274877597, now seen corresponding path program 1 times [2018-02-04 17:50:48,548 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 17:50:48,548 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 17:50:48,581 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:50:48,581 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 17:50:48,582 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:50:48,609 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 17:50:48,616 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 17:50:48,659 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 17:50:48,661 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 17:50:48,661 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-02-04 17:50:48,662 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-02-04 17:50:48,670 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-02-04 17:50:48,671 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-02-04 17:50:48,672 INFO L87 Difference]: Start difference. First operand 80 states. Second operand 4 states. [2018-02-04 17:50:48,866 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 17:50:48,866 INFO L93 Difference]: Finished difference Result 72 states and 77 transitions. [2018-02-04 17:50:48,866 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-02-04 17:50:48,867 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 8 [2018-02-04 17:50:48,868 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 17:50:48,873 INFO L225 Difference]: With dead ends: 72 [2018-02-04 17:50:48,874 INFO L226 Difference]: Without dead ends: 69 [2018-02-04 17:50:48,875 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-02-04 17:50:48,887 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 69 states. [2018-02-04 17:50:48,900 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 69 to 69. [2018-02-04 17:50:48,901 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 69 states. [2018-02-04 17:50:48,903 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 69 states to 69 states and 74 transitions. [2018-02-04 17:50:48,903 INFO L78 Accepts]: Start accepts. Automaton has 69 states and 74 transitions. Word has length 8 [2018-02-04 17:50:48,904 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 17:50:48,904 INFO L432 AbstractCegarLoop]: Abstraction has 69 states and 74 transitions. [2018-02-04 17:50:48,904 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-02-04 17:50:48,904 INFO L276 IsEmpty]: Start isEmpty. Operand 69 states and 74 transitions. [2018-02-04 17:50:48,904 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 9 [2018-02-04 17:50:48,904 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 17:50:48,904 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 17:50:48,904 INFO L371 AbstractCegarLoop]: === Iteration 2 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-04 17:50:48,904 INFO L82 PathProgramCache]: Analyzing trace with hash -1274877596, now seen corresponding path program 1 times [2018-02-04 17:50:48,905 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 17:50:48,905 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 17:50:48,905 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:50:48,906 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 17:50:48,906 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:50:48,916 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 17:50:48,916 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 17:50:48,955 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 17:50:48,955 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 17:50:48,955 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-02-04 17:50:48,956 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-02-04 17:50:48,957 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-02-04 17:50:48,957 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-02-04 17:50:48,957 INFO L87 Difference]: Start difference. First operand 69 states and 74 transitions. Second operand 4 states. [2018-02-04 17:50:49,061 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 17:50:49,061 INFO L93 Difference]: Finished difference Result 61 states and 66 transitions. [2018-02-04 17:50:49,062 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-02-04 17:50:49,062 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 8 [2018-02-04 17:50:49,062 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 17:50:49,063 INFO L225 Difference]: With dead ends: 61 [2018-02-04 17:50:49,063 INFO L226 Difference]: Without dead ends: 61 [2018-02-04 17:50:49,063 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-02-04 17:50:49,064 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 61 states. [2018-02-04 17:50:49,067 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 61 to 61. [2018-02-04 17:50:49,067 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 61 states. [2018-02-04 17:50:49,068 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 61 states to 61 states and 66 transitions. [2018-02-04 17:50:49,068 INFO L78 Accepts]: Start accepts. Automaton has 61 states and 66 transitions. Word has length 8 [2018-02-04 17:50:49,069 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 17:50:49,069 INFO L432 AbstractCegarLoop]: Abstraction has 61 states and 66 transitions. [2018-02-04 17:50:49,069 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-02-04 17:50:49,069 INFO L276 IsEmpty]: Start isEmpty. Operand 61 states and 66 transitions. [2018-02-04 17:50:49,069 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2018-02-04 17:50:49,070 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 17:50:49,070 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 17:50:49,070 INFO L371 AbstractCegarLoop]: === Iteration 3 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-04 17:50:49,070 INFO L82 PathProgramCache]: Analyzing trace with hash -1852712777, now seen corresponding path program 1 times [2018-02-04 17:50:49,070 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 17:50:49,070 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 17:50:49,071 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:50:49,071 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 17:50:49,071 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:50:49,089 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 17:50:49,090 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 17:50:49,141 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 17:50:49,141 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 17:50:49,141 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-02-04 17:50:49,141 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-02-04 17:50:49,141 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-02-04 17:50:49,142 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-02-04 17:50:49,142 INFO L87 Difference]: Start difference. First operand 61 states and 66 transitions. Second operand 5 states. [2018-02-04 17:50:49,203 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 17:50:49,203 INFO L93 Difference]: Finished difference Result 59 states and 64 transitions. [2018-02-04 17:50:49,204 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-02-04 17:50:49,204 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 25 [2018-02-04 17:50:49,204 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 17:50:49,205 INFO L225 Difference]: With dead ends: 59 [2018-02-04 17:50:49,205 INFO L226 Difference]: Without dead ends: 59 [2018-02-04 17:50:49,206 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-02-04 17:50:49,206 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 59 states. [2018-02-04 17:50:49,208 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 59 to 59. [2018-02-04 17:50:49,208 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 59 states. [2018-02-04 17:50:49,208 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 59 states to 59 states and 64 transitions. [2018-02-04 17:50:49,208 INFO L78 Accepts]: Start accepts. Automaton has 59 states and 64 transitions. Word has length 25 [2018-02-04 17:50:49,209 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 17:50:49,209 INFO L432 AbstractCegarLoop]: Abstraction has 59 states and 64 transitions. [2018-02-04 17:50:49,209 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-02-04 17:50:49,209 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 64 transitions. [2018-02-04 17:50:49,209 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2018-02-04 17:50:49,209 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 17:50:49,209 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 17:50:49,209 INFO L371 AbstractCegarLoop]: === Iteration 4 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-04 17:50:49,209 INFO L82 PathProgramCache]: Analyzing trace with hash -1852712776, now seen corresponding path program 1 times [2018-02-04 17:50:49,210 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 17:50:49,210 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 17:50:49,210 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:50:49,210 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 17:50:49,210 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:50:49,222 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 17:50:49,223 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 17:50:49,321 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 17:50:49,321 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 17:50:49,321 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-02-04 17:50:49,321 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-02-04 17:50:49,322 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-02-04 17:50:49,322 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-02-04 17:50:49,327 INFO L87 Difference]: Start difference. First operand 59 states and 64 transitions. Second operand 6 states. [2018-02-04 17:50:49,449 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 17:50:49,450 INFO L93 Difference]: Finished difference Result 58 states and 63 transitions. [2018-02-04 17:50:49,450 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-02-04 17:50:49,450 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 25 [2018-02-04 17:50:49,450 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 17:50:49,451 INFO L225 Difference]: With dead ends: 58 [2018-02-04 17:50:49,451 INFO L226 Difference]: Without dead ends: 58 [2018-02-04 17:50:49,451 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2018-02-04 17:50:49,452 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 58 states. [2018-02-04 17:50:49,454 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 58 to 58. [2018-02-04 17:50:49,454 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 58 states. [2018-02-04 17:50:49,455 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 58 states to 58 states and 63 transitions. [2018-02-04 17:50:49,455 INFO L78 Accepts]: Start accepts. Automaton has 58 states and 63 transitions. Word has length 25 [2018-02-04 17:50:49,456 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 17:50:49,456 INFO L432 AbstractCegarLoop]: Abstraction has 58 states and 63 transitions. [2018-02-04 17:50:49,456 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-02-04 17:50:49,456 INFO L276 IsEmpty]: Start isEmpty. Operand 58 states and 63 transitions. [2018-02-04 17:50:49,456 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-02-04 17:50:49,456 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 17:50:49,456 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 17:50:49,457 INFO L371 AbstractCegarLoop]: === Iteration 5 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-04 17:50:49,457 INFO L82 PathProgramCache]: Analyzing trace with hash 1954449657, now seen corresponding path program 1 times [2018-02-04 17:50:49,457 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 17:50:49,457 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 17:50:49,458 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:50:49,458 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 17:50:49,458 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:50:49,476 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 17:50:49,477 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 17:50:49,491 INFO L430 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-02-04 17:50:49,492 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 17:50:49,492 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 17:50:49,492 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 17:50:49,507 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 17:50:49,514 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 17:50:49,530 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 17:50:49,530 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 17:50:49,530 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-02-04 17:50:49,531 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-02-04 17:50:49,531 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-02-04 17:50:49,531 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-02-04 17:50:49,531 INFO L87 Difference]: Start difference. First operand 58 states and 63 transitions. Second operand 4 states. [2018-02-04 17:50:49,549 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 17:50:49,549 INFO L93 Difference]: Finished difference Result 61 states and 66 transitions. [2018-02-04 17:50:49,550 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-02-04 17:50:49,550 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 27 [2018-02-04 17:50:49,550 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 17:50:49,550 INFO L225 Difference]: With dead ends: 61 [2018-02-04 17:50:49,550 INFO L226 Difference]: Without dead ends: 59 [2018-02-04 17:50:49,550 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 27 GetRequests, 24 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-02-04 17:50:49,551 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 59 states. [2018-02-04 17:50:49,552 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 59 to 59. [2018-02-04 17:50:49,552 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 59 states. [2018-02-04 17:50:49,553 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 59 states to 59 states and 64 transitions. [2018-02-04 17:50:49,553 INFO L78 Accepts]: Start accepts. Automaton has 59 states and 64 transitions. Word has length 27 [2018-02-04 17:50:49,553 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 17:50:49,553 INFO L432 AbstractCegarLoop]: Abstraction has 59 states and 64 transitions. [2018-02-04 17:50:49,553 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-02-04 17:50:49,553 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 64 transitions. [2018-02-04 17:50:49,554 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2018-02-04 17:50:49,554 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 17:50:49,554 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 17:50:49,554 INFO L371 AbstractCegarLoop]: === Iteration 6 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-04 17:50:49,554 INFO L82 PathProgramCache]: Analyzing trace with hash 2081717702, now seen corresponding path program 1 times [2018-02-04 17:50:49,554 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 17:50:49,554 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 17:50:49,555 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:50:49,555 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 17:50:49,555 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:50:49,569 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 17:50:49,570 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 17:50:49,579 INFO L430 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-02-04 17:50:49,579 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 17:50:49,580 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 17:50:49,580 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 17:50:49,597 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 17:50:49,601 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 17:50:49,618 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 17:50:49,618 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 17:50:49,618 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5] total 5 [2018-02-04 17:50:49,618 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-02-04 17:50:49,619 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-02-04 17:50:49,619 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2018-02-04 17:50:49,619 INFO L87 Difference]: Start difference. First operand 59 states and 64 transitions. Second operand 5 states. [2018-02-04 17:50:49,635 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 17:50:49,635 INFO L93 Difference]: Finished difference Result 62 states and 67 transitions. [2018-02-04 17:50:49,636 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-02-04 17:50:49,636 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 28 [2018-02-04 17:50:49,637 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 17:50:49,637 INFO L225 Difference]: With dead ends: 62 [2018-02-04 17:50:49,637 INFO L226 Difference]: Without dead ends: 60 [2018-02-04 17:50:49,637 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 28 GetRequests, 24 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-02-04 17:50:49,638 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 60 states. [2018-02-04 17:50:49,639 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 60 to 60. [2018-02-04 17:50:49,639 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 60 states. [2018-02-04 17:50:49,640 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 60 states to 60 states and 65 transitions. [2018-02-04 17:50:49,640 INFO L78 Accepts]: Start accepts. Automaton has 60 states and 65 transitions. Word has length 28 [2018-02-04 17:50:49,640 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 17:50:49,640 INFO L432 AbstractCegarLoop]: Abstraction has 60 states and 65 transitions. [2018-02-04 17:50:49,640 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-02-04 17:50:49,640 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 65 transitions. [2018-02-04 17:50:49,641 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-02-04 17:50:49,641 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 17:50:49,641 INFO L351 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 17:50:49,641 INFO L371 AbstractCegarLoop]: === Iteration 7 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-04 17:50:49,641 INFO L82 PathProgramCache]: Analyzing trace with hash 1732059801, now seen corresponding path program 2 times [2018-02-04 17:50:49,641 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 17:50:49,641 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 17:50:49,642 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:50:49,642 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 17:50:49,642 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:50:49,654 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 17:50:49,655 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 17:50:49,661 INFO L430 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-02-04 17:50:49,661 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 17:50:49,661 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 17:50:49,662 INFO L109 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-02-04 17:50:49,688 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2018-02-04 17:50:49,689 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 17:50:49,693 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 17:50:49,713 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-02-04 17:50:49,714 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 17:50:49,717 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 17:50:49,717 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-02-04 17:50:49,768 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-02-04 17:50:49,768 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 17:50:49,768 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-02-04 17:50:49,769 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-02-04 17:50:49,769 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-02-04 17:50:49,769 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2018-02-04 17:50:49,769 INFO L87 Difference]: Start difference. First operand 60 states and 65 transitions. Second operand 8 states. [2018-02-04 17:50:49,907 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 17:50:49,907 INFO L93 Difference]: Finished difference Result 69 states and 75 transitions. [2018-02-04 17:50:49,907 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-02-04 17:50:49,907 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 29 [2018-02-04 17:50:49,907 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 17:50:49,908 INFO L225 Difference]: With dead ends: 69 [2018-02-04 17:50:49,909 INFO L226 Difference]: Without dead ends: 69 [2018-02-04 17:50:49,909 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 31 GetRequests, 21 SyntacticMatches, 1 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=36, Invalid=74, Unknown=0, NotChecked=0, Total=110 [2018-02-04 17:50:49,909 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 69 states. [2018-02-04 17:50:49,910 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 69 to 64. [2018-02-04 17:50:49,911 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 64 states. [2018-02-04 17:50:49,911 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 64 states to 64 states and 70 transitions. [2018-02-04 17:50:49,911 INFO L78 Accepts]: Start accepts. Automaton has 64 states and 70 transitions. Word has length 29 [2018-02-04 17:50:49,911 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 17:50:49,911 INFO L432 AbstractCegarLoop]: Abstraction has 64 states and 70 transitions. [2018-02-04 17:50:49,911 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-02-04 17:50:49,911 INFO L276 IsEmpty]: Start isEmpty. Operand 64 states and 70 transitions. [2018-02-04 17:50:49,912 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-02-04 17:50:49,912 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 17:50:49,912 INFO L351 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 17:50:49,912 INFO L371 AbstractCegarLoop]: === Iteration 8 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-04 17:50:49,912 INFO L82 PathProgramCache]: Analyzing trace with hash -1550208657, now seen corresponding path program 1 times [2018-02-04 17:50:49,912 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 17:50:49,912 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 17:50:49,913 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:50:49,913 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 17:50:49,913 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:50:49,925 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 17:50:49,926 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 17:50:49,967 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-02-04 17:50:49,967 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 17:50:49,967 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-02-04 17:50:49,968 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-02-04 17:50:49,968 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-02-04 17:50:49,968 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-02-04 17:50:49,968 INFO L87 Difference]: Start difference. First operand 64 states and 70 transitions. Second operand 5 states. [2018-02-04 17:50:50,030 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 17:50:50,030 INFO L93 Difference]: Finished difference Result 62 states and 68 transitions. [2018-02-04 17:50:50,031 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-02-04 17:50:50,031 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 36 [2018-02-04 17:50:50,031 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 17:50:50,032 INFO L225 Difference]: With dead ends: 62 [2018-02-04 17:50:50,032 INFO L226 Difference]: Without dead ends: 62 [2018-02-04 17:50:50,032 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-02-04 17:50:50,032 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 62 states. [2018-02-04 17:50:50,035 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 62 to 62. [2018-02-04 17:50:50,035 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 62 states. [2018-02-04 17:50:50,035 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 62 states to 62 states and 68 transitions. [2018-02-04 17:50:50,036 INFO L78 Accepts]: Start accepts. Automaton has 62 states and 68 transitions. Word has length 36 [2018-02-04 17:50:50,036 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 17:50:50,036 INFO L432 AbstractCegarLoop]: Abstraction has 62 states and 68 transitions. [2018-02-04 17:50:50,036 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-02-04 17:50:50,036 INFO L276 IsEmpty]: Start isEmpty. Operand 62 states and 68 transitions. [2018-02-04 17:50:50,037 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-02-04 17:50:50,037 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 17:50:50,037 INFO L351 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 17:50:50,037 INFO L371 AbstractCegarLoop]: === Iteration 9 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-04 17:50:50,037 INFO L82 PathProgramCache]: Analyzing trace with hash -1550208656, now seen corresponding path program 1 times [2018-02-04 17:50:50,037 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 17:50:50,037 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 17:50:50,038 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:50:50,038 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 17:50:50,038 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:50:50,048 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 17:50:50,049 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 17:50:50,080 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-02-04 17:50:50,080 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 17:50:50,081 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-02-04 17:50:50,081 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-02-04 17:50:50,081 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-02-04 17:50:50,081 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-02-04 17:50:50,082 INFO L87 Difference]: Start difference. First operand 62 states and 68 transitions. Second operand 5 states. [2018-02-04 17:50:50,093 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 17:50:50,093 INFO L93 Difference]: Finished difference Result 67 states and 73 transitions. [2018-02-04 17:50:50,094 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-02-04 17:50:50,094 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 36 [2018-02-04 17:50:50,094 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 17:50:50,094 INFO L225 Difference]: With dead ends: 67 [2018-02-04 17:50:50,094 INFO L226 Difference]: Without dead ends: 67 [2018-02-04 17:50:50,094 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-02-04 17:50:50,095 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 67 states. [2018-02-04 17:50:50,096 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 67 to 66. [2018-02-04 17:50:50,096 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 66 states. [2018-02-04 17:50:50,097 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 66 states to 66 states and 72 transitions. [2018-02-04 17:50:50,097 INFO L78 Accepts]: Start accepts. Automaton has 66 states and 72 transitions. Word has length 36 [2018-02-04 17:50:50,097 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 17:50:50,097 INFO L432 AbstractCegarLoop]: Abstraction has 66 states and 72 transitions. [2018-02-04 17:50:50,097 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-02-04 17:50:50,097 INFO L276 IsEmpty]: Start isEmpty. Operand 66 states and 72 transitions. [2018-02-04 17:50:50,098 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-02-04 17:50:50,098 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 17:50:50,098 INFO L351 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 17:50:50,098 INFO L371 AbstractCegarLoop]: === Iteration 10 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-04 17:50:50,098 INFO L82 PathProgramCache]: Analyzing trace with hash 1701415133, now seen corresponding path program 1 times [2018-02-04 17:50:50,098 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 17:50:50,098 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 17:50:50,099 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:50:50,099 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 17:50:50,099 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:50:50,109 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 17:50:50,110 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 17:50:50,214 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-02-04 17:50:50,214 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 17:50:50,214 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 17:50:50,215 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 17:50:50,229 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 17:50:50,233 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 17:50:50,271 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-02-04 17:50:50,272 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 17:50:50,272 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 11 [2018-02-04 17:50:50,272 INFO L409 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-02-04 17:50:50,272 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-02-04 17:50:50,273 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=88, Unknown=0, NotChecked=0, Total=110 [2018-02-04 17:50:50,273 INFO L87 Difference]: Start difference. First operand 66 states and 72 transitions. Second operand 11 states. [2018-02-04 17:50:50,468 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 17:50:50,468 INFO L93 Difference]: Finished difference Result 80 states and 87 transitions. [2018-02-04 17:50:50,472 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-02-04 17:50:50,472 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 35 [2018-02-04 17:50:50,472 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 17:50:50,473 INFO L225 Difference]: With dead ends: 80 [2018-02-04 17:50:50,473 INFO L226 Difference]: Without dead ends: 78 [2018-02-04 17:50:50,473 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 46 GetRequests, 32 SyntacticMatches, 1 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=38, Invalid=172, Unknown=0, NotChecked=0, Total=210 [2018-02-04 17:50:50,473 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 78 states. [2018-02-04 17:50:50,476 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 78 to 73. [2018-02-04 17:50:50,476 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 73 states. [2018-02-04 17:50:50,476 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 73 states to 73 states and 80 transitions. [2018-02-04 17:50:50,477 INFO L78 Accepts]: Start accepts. Automaton has 73 states and 80 transitions. Word has length 35 [2018-02-04 17:50:50,477 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 17:50:50,477 INFO L432 AbstractCegarLoop]: Abstraction has 73 states and 80 transitions. [2018-02-04 17:50:50,477 INFO L433 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-02-04 17:50:50,477 INFO L276 IsEmpty]: Start isEmpty. Operand 73 states and 80 transitions. [2018-02-04 17:50:50,478 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2018-02-04 17:50:50,478 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 17:50:50,478 INFO L351 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 17:50:50,478 INFO L371 AbstractCegarLoop]: === Iteration 11 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-04 17:50:50,478 INFO L82 PathProgramCache]: Analyzing trace with hash 684814114, now seen corresponding path program 1 times [2018-02-04 17:50:50,478 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 17:50:50,478 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 17:50:50,479 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:50:50,479 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 17:50:50,479 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:50:50,488 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 17:50:50,488 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 17:50:50,551 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-02-04 17:50:50,551 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 17:50:50,551 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-02-04 17:50:50,552 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-02-04 17:50:50,552 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-02-04 17:50:50,552 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-02-04 17:50:50,552 INFO L87 Difference]: Start difference. First operand 73 states and 80 transitions. Second operand 6 states. [2018-02-04 17:50:50,641 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 17:50:50,642 INFO L93 Difference]: Finished difference Result 72 states and 79 transitions. [2018-02-04 17:50:50,642 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-02-04 17:50:50,642 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 40 [2018-02-04 17:50:50,642 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 17:50:50,643 INFO L225 Difference]: With dead ends: 72 [2018-02-04 17:50:50,643 INFO L226 Difference]: Without dead ends: 72 [2018-02-04 17:50:50,643 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2018-02-04 17:50:50,643 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 72 states. [2018-02-04 17:50:50,646 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 72 to 72. [2018-02-04 17:50:50,646 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 72 states. [2018-02-04 17:50:50,646 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 72 states to 72 states and 79 transitions. [2018-02-04 17:50:50,646 INFO L78 Accepts]: Start accepts. Automaton has 72 states and 79 transitions. Word has length 40 [2018-02-04 17:50:50,648 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 17:50:50,648 INFO L432 AbstractCegarLoop]: Abstraction has 72 states and 79 transitions. [2018-02-04 17:50:50,648 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-02-04 17:50:50,648 INFO L276 IsEmpty]: Start isEmpty. Operand 72 states and 79 transitions. [2018-02-04 17:50:50,648 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-02-04 17:50:50,648 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 17:50:50,648 INFO L351 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 17:50:50,649 INFO L371 AbstractCegarLoop]: === Iteration 12 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-04 17:50:50,649 INFO L82 PathProgramCache]: Analyzing trace with hash 976365731, now seen corresponding path program 1 times [2018-02-04 17:50:50,649 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 17:50:50,649 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 17:50:50,649 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:50:50,649 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 17:50:50,649 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:50:50,659 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 17:50:50,660 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 17:50:50,670 INFO L430 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-02-04 17:50:50,671 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 17:50:50,671 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 17:50:50,671 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 17:50:50,684 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 17:50:50,687 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 17:50:50,708 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 17:50:50,709 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 17:50:50,709 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7] total 7 [2018-02-04 17:50:50,709 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-02-04 17:50:50,710 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-02-04 17:50:50,710 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2018-02-04 17:50:50,710 INFO L87 Difference]: Start difference. First operand 72 states and 79 transitions. Second operand 7 states. [2018-02-04 17:50:50,727 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 17:50:50,727 INFO L93 Difference]: Finished difference Result 75 states and 82 transitions. [2018-02-04 17:50:50,728 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-02-04 17:50:50,728 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 42 [2018-02-04 17:50:50,728 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 17:50:50,728 INFO L225 Difference]: With dead ends: 75 [2018-02-04 17:50:50,729 INFO L226 Difference]: Without dead ends: 73 [2018-02-04 17:50:50,729 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 42 GetRequests, 36 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=35, Unknown=0, NotChecked=0, Total=56 [2018-02-04 17:50:50,729 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 73 states. [2018-02-04 17:50:50,731 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 73 to 73. [2018-02-04 17:50:50,732 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 73 states. [2018-02-04 17:50:50,732 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 73 states to 73 states and 80 transitions. [2018-02-04 17:50:50,732 INFO L78 Accepts]: Start accepts. Automaton has 73 states and 80 transitions. Word has length 42 [2018-02-04 17:50:50,732 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 17:50:50,732 INFO L432 AbstractCegarLoop]: Abstraction has 73 states and 80 transitions. [2018-02-04 17:50:50,733 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-02-04 17:50:50,733 INFO L276 IsEmpty]: Start isEmpty. Operand 73 states and 80 transitions. [2018-02-04 17:50:50,733 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-02-04 17:50:50,733 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 17:50:50,734 INFO L351 BasicCegarLoop]: trace histogram [4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 17:50:50,734 INFO L371 AbstractCegarLoop]: === Iteration 13 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-04 17:50:50,734 INFO L82 PathProgramCache]: Analyzing trace with hash 524574774, now seen corresponding path program 2 times [2018-02-04 17:50:50,734 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 17:50:50,734 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 17:50:50,735 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:50:50,735 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 17:50:50,735 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:50:50,744 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 17:50:50,744 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 17:50:50,748 INFO L430 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-02-04 17:50:50,748 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 17:50:50,748 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 17:50:50,749 INFO L109 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-02-04 17:50:50,767 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2018-02-04 17:50:50,767 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 17:50:50,770 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 17:50:50,775 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-02-04 17:50:50,775 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 17:50:50,778 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 17:50:50,779 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-02-04 17:50:50,868 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-02-04 17:50:50,869 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 17:50:50,869 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-02-04 17:50:50,869 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-02-04 17:50:50,869 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-02-04 17:50:50,869 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2018-02-04 17:50:50,869 INFO L87 Difference]: Start difference. First operand 73 states and 80 transitions. Second operand 8 states. [2018-02-04 17:50:50,990 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 17:50:50,990 INFO L93 Difference]: Finished difference Result 82 states and 90 transitions. [2018-02-04 17:50:50,990 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-02-04 17:50:50,990 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 43 [2018-02-04 17:50:50,991 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 17:50:50,991 INFO L225 Difference]: With dead ends: 82 [2018-02-04 17:50:50,991 INFO L226 Difference]: Without dead ends: 82 [2018-02-04 17:50:50,992 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 45 GetRequests, 31 SyntacticMatches, 5 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=36, Invalid=74, Unknown=0, NotChecked=0, Total=110 [2018-02-04 17:50:50,992 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 82 states. [2018-02-04 17:50:50,994 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 82 to 77. [2018-02-04 17:50:50,994 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 77 states. [2018-02-04 17:50:50,995 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 77 states to 77 states and 85 transitions. [2018-02-04 17:50:50,995 INFO L78 Accepts]: Start accepts. Automaton has 77 states and 85 transitions. Word has length 43 [2018-02-04 17:50:50,995 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 17:50:50,995 INFO L432 AbstractCegarLoop]: Abstraction has 77 states and 85 transitions. [2018-02-04 17:50:50,995 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-02-04 17:50:50,996 INFO L276 IsEmpty]: Start isEmpty. Operand 77 states and 85 transitions. [2018-02-04 17:50:50,996 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-02-04 17:50:50,997 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 17:50:50,997 INFO L351 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 17:50:50,997 INFO L371 AbstractCegarLoop]: === Iteration 14 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-04 17:50:50,997 INFO L82 PathProgramCache]: Analyzing trace with hash 1966763457, now seen corresponding path program 2 times [2018-02-04 17:50:50,997 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 17:50:50,997 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 17:50:50,998 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:50:50,998 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 17:50:50,998 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:50:51,006 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 17:50:51,006 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 17:50:51,119 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 14 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-02-04 17:50:51,119 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 17:50:51,119 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 17:50:51,120 INFO L109 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-02-04 17:50:51,144 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-02-04 17:50:51,144 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 17:50:51,147 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 17:50:51,209 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2018-02-04 17:50:51,209 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 17:50:51,209 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 8] total 14 [2018-02-04 17:50:51,209 INFO L409 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-02-04 17:50:51,209 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-02-04 17:50:51,210 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=147, Unknown=0, NotChecked=0, Total=182 [2018-02-04 17:50:51,210 INFO L87 Difference]: Start difference. First operand 77 states and 85 transitions. Second operand 14 states. [2018-02-04 17:50:51,469 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 17:50:51,469 INFO L93 Difference]: Finished difference Result 94 states and 103 transitions. [2018-02-04 17:50:51,471 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-02-04 17:50:51,471 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 43 [2018-02-04 17:50:51,471 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 17:50:51,471 INFO L225 Difference]: With dead ends: 94 [2018-02-04 17:50:51,471 INFO L226 Difference]: Without dead ends: 92 [2018-02-04 17:50:51,472 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 56 GetRequests, 38 SyntacticMatches, 1 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=55, Invalid=287, Unknown=0, NotChecked=0, Total=342 [2018-02-04 17:50:51,472 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 92 states. [2018-02-04 17:50:51,473 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 92 to 84. [2018-02-04 17:50:51,473 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 84 states. [2018-02-04 17:50:51,473 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 84 states to 84 states and 93 transitions. [2018-02-04 17:50:51,474 INFO L78 Accepts]: Start accepts. Automaton has 84 states and 93 transitions. Word has length 43 [2018-02-04 17:50:51,474 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 17:50:51,474 INFO L432 AbstractCegarLoop]: Abstraction has 84 states and 93 transitions. [2018-02-04 17:50:51,474 INFO L433 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-02-04 17:50:51,474 INFO L276 IsEmpty]: Start isEmpty. Operand 84 states and 93 transitions. [2018-02-04 17:50:51,474 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2018-02-04 17:50:51,474 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 17:50:51,474 INFO L351 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 17:50:51,474 INFO L371 AbstractCegarLoop]: === Iteration 15 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-04 17:50:51,475 INFO L82 PathProgramCache]: Analyzing trace with hash -1794030318, now seen corresponding path program 1 times [2018-02-04 17:50:51,475 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 17:50:51,475 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 17:50:51,475 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:50:51,475 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 17:50:51,475 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:50:51,481 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 17:50:51,481 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 17:50:51,501 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-02-04 17:50:51,502 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 17:50:51,502 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-02-04 17:50:51,502 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-02-04 17:50:51,502 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-02-04 17:50:51,502 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-02-04 17:50:51,502 INFO L87 Difference]: Start difference. First operand 84 states and 93 transitions. Second operand 5 states. [2018-02-04 17:50:51,515 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 17:50:51,515 INFO L93 Difference]: Finished difference Result 90 states and 99 transitions. [2018-02-04 17:50:51,515 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-02-04 17:50:51,515 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 50 [2018-02-04 17:50:51,515 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 17:50:51,516 INFO L225 Difference]: With dead ends: 90 [2018-02-04 17:50:51,516 INFO L226 Difference]: Without dead ends: 90 [2018-02-04 17:50:51,516 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-02-04 17:50:51,516 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 90 states. [2018-02-04 17:50:51,518 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 90 to 89. [2018-02-04 17:50:51,518 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 89 states. [2018-02-04 17:50:51,518 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 89 states to 89 states and 98 transitions. [2018-02-04 17:50:51,519 INFO L78 Accepts]: Start accepts. Automaton has 89 states and 98 transitions. Word has length 50 [2018-02-04 17:50:51,519 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 17:50:51,519 INFO L432 AbstractCegarLoop]: Abstraction has 89 states and 98 transitions. [2018-02-04 17:50:51,519 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-02-04 17:50:51,519 INFO L276 IsEmpty]: Start isEmpty. Operand 89 states and 98 transitions. [2018-02-04 17:50:51,520 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2018-02-04 17:50:51,520 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 17:50:51,520 INFO L351 BasicCegarLoop]: trace histogram [5, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 17:50:51,520 INFO L371 AbstractCegarLoop]: === Iteration 16 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-04 17:50:51,520 INFO L82 PathProgramCache]: Analyzing trace with hash 1999383815, now seen corresponding path program 1 times [2018-02-04 17:50:51,520 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 17:50:51,520 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 17:50:51,521 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:50:51,521 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 17:50:51,521 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:50:51,528 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 17:50:51,529 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 17:50:51,535 INFO L430 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-02-04 17:50:51,535 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 17:50:51,535 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 17:50:51,536 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 17:50:51,543 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 17:50:51,546 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 17:50:51,578 INFO L134 CoverageAnalysis]: Checked inductivity of 19 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-02-04 17:50:51,578 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 17:50:51,578 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9] total 9 [2018-02-04 17:50:51,578 INFO L409 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-02-04 17:50:51,578 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-02-04 17:50:51,579 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=30, Invalid=42, Unknown=0, NotChecked=0, Total=72 [2018-02-04 17:50:51,579 INFO L87 Difference]: Start difference. First operand 89 states and 98 transitions. Second operand 9 states. [2018-02-04 17:50:51,595 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 17:50:51,595 INFO L93 Difference]: Finished difference Result 92 states and 101 transitions. [2018-02-04 17:50:51,597 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-02-04 17:50:51,597 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 50 [2018-02-04 17:50:51,597 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 17:50:51,597 INFO L225 Difference]: With dead ends: 92 [2018-02-04 17:50:51,597 INFO L226 Difference]: Without dead ends: 90 [2018-02-04 17:50:51,597 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 50 GetRequests, 42 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=34, Invalid=56, Unknown=0, NotChecked=0, Total=90 [2018-02-04 17:50:51,598 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 90 states. [2018-02-04 17:50:51,599 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 90 to 90. [2018-02-04 17:50:51,599 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 90 states. [2018-02-04 17:50:51,599 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 90 states to 90 states and 99 transitions. [2018-02-04 17:50:51,600 INFO L78 Accepts]: Start accepts. Automaton has 90 states and 99 transitions. Word has length 50 [2018-02-04 17:50:51,600 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 17:50:51,600 INFO L432 AbstractCegarLoop]: Abstraction has 90 states and 99 transitions. [2018-02-04 17:50:51,600 INFO L433 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-02-04 17:50:51,600 INFO L276 IsEmpty]: Start isEmpty. Operand 90 states and 99 transitions. [2018-02-04 17:50:51,600 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2018-02-04 17:50:51,600 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 17:50:51,600 INFO L351 BasicCegarLoop]: trace histogram [6, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 17:50:51,600 INFO L371 AbstractCegarLoop]: === Iteration 17 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-04 17:50:51,601 INFO L82 PathProgramCache]: Analyzing trace with hash 23273882, now seen corresponding path program 2 times [2018-02-04 17:50:51,601 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 17:50:51,601 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 17:50:51,601 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:50:51,601 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 17:50:51,601 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:50:51,608 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 17:50:51,608 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 17:50:51,615 INFO L430 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-02-04 17:50:51,615 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 17:50:51,615 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 17:50:51,615 INFO L109 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-02-04 17:50:51,631 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2018-02-04 17:50:51,631 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 17:50:51,634 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 17:50:51,646 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-02-04 17:50:51,648 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-02-04 17:50:51,648 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 17:50:51,649 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 17:50:51,652 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 17:50:51,652 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:18, output treesize:14 [2018-02-04 17:50:51,660 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 16 [2018-02-04 17:50:51,661 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:51,662 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:51,664 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 31 [2018-02-04 17:50:51,665 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 17:50:51,669 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 17:50:51,687 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 17:50:51,688 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:27, output treesize:23 [2018-02-04 17:50:51,702 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 23 [2018-02-04 17:50:51,705 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:51,706 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:51,707 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:51,708 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:51,709 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:51,710 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:51,711 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 6 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 78 [2018-02-04 17:50:51,712 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 17:50:51,748 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 17:50:51,758 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 17:50:51,758 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:36, output treesize:32 [2018-02-04 17:50:51,781 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 30 [2018-02-04 17:50:51,787 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:51,788 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:51,788 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:51,789 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:51,790 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:51,791 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:51,792 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:51,793 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:51,793 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:51,794 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:51,795 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:51,796 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:51,797 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 12 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 149 [2018-02-04 17:50:51,798 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 17:50:51,817 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 17:50:51,836 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 17:50:51,836 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:45, output treesize:41 [2018-02-04 17:50:51,860 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 37 [2018-02-04 17:50:51,863 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:51,864 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:51,865 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:51,865 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:51,866 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:51,867 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:51,867 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:51,868 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:51,868 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:51,869 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:51,870 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:51,870 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:51,871 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:51,872 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:51,872 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:51,873 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:51,874 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 16 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 206 [2018-02-04 17:50:51,875 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 17:50:51,895 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 17:50:51,903 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 17:50:51,903 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:54, output treesize:50 [2018-02-04 17:50:51,921 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 57 treesize of output 44 [2018-02-04 17:50:51,931 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:51,932 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:51,932 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:51,933 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:51,934 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:51,934 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:51,935 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:51,936 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:51,936 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:51,937 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:51,937 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:51,938 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:51,939 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:51,939 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:51,940 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:51,941 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:51,941 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:51,942 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:51,943 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:51,943 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:51,944 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:51,945 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 5 select indices, 5 select index equivalence classes, 21 disjoint index pairs (out of 10 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 253 [2018-02-04 17:50:51,946 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 17:50:51,992 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 17:50:52,000 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 17:50:52,000 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:63, output treesize:59 [2018-02-04 17:50:52,022 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 51 [2018-02-04 17:50:52,026 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:52,026 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:52,027 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:52,027 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:52,028 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:52,029 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:52,029 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:52,030 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:52,030 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:52,031 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:52,032 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:52,032 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:52,033 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:52,033 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:52,039 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:52,039 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:52,042 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:52,043 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:52,044 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:52,045 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:52,046 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:52,046 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:52,047 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:52,048 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:52,049 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:52,049 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:52,050 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:52,051 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 6 select indices, 6 select index equivalence classes, 27 disjoint index pairs (out of 15 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 308 [2018-02-04 17:50:52,052 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 17:50:52,094 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 17:50:52,106 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 17:50:52,106 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:72, output treesize:68 [2018-02-04 17:50:52,245 WARN L307 Elim1Store]: Array PQE input equivalent to false [2018-02-04 17:50:52,245 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 17:50:52,251 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 17:50:52,251 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 4 variables, input treesize:148, output treesize:1 [2018-02-04 17:50:52,260 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2018-02-04 17:50:52,260 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 17:50:52,260 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [15] imperfect sequences [] total 15 [2018-02-04 17:50:52,260 INFO L409 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-02-04 17:50:52,261 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-02-04 17:50:52,261 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=59, Invalid=151, Unknown=0, NotChecked=0, Total=210 [2018-02-04 17:50:52,261 INFO L87 Difference]: Start difference. First operand 90 states and 99 transitions. Second operand 15 states. [2018-02-04 17:50:53,589 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 17:50:53,590 INFO L93 Difference]: Finished difference Result 89 states and 97 transitions. [2018-02-04 17:50:53,590 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-02-04 17:50:53,590 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 51 [2018-02-04 17:50:53,590 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 17:50:53,590 INFO L225 Difference]: With dead ends: 89 [2018-02-04 17:50:53,590 INFO L226 Difference]: Without dead ends: 86 [2018-02-04 17:50:53,591 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 61 GetRequests, 37 SyntacticMatches, 0 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 119 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=165, Invalid=485, Unknown=0, NotChecked=0, Total=650 [2018-02-04 17:50:53,591 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 86 states. [2018-02-04 17:50:53,592 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 86 to 86. [2018-02-04 17:50:53,592 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 86 states. [2018-02-04 17:50:53,592 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 86 states to 86 states and 94 transitions. [2018-02-04 17:50:53,593 INFO L78 Accepts]: Start accepts. Automaton has 86 states and 94 transitions. Word has length 51 [2018-02-04 17:50:53,593 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 17:50:53,593 INFO L432 AbstractCegarLoop]: Abstraction has 86 states and 94 transitions. [2018-02-04 17:50:53,593 INFO L433 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-02-04 17:50:53,593 INFO L276 IsEmpty]: Start isEmpty. Operand 86 states and 94 transitions. [2018-02-04 17:50:53,593 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2018-02-04 17:50:53,593 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 17:50:53,593 INFO L351 BasicCegarLoop]: trace histogram [6, 4, 4, 4, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 17:50:53,593 INFO L371 AbstractCegarLoop]: === Iteration 18 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-04 17:50:53,593 INFO L82 PathProgramCache]: Analyzing trace with hash 751925157, now seen corresponding path program 3 times [2018-02-04 17:50:53,593 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 17:50:53,593 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 17:50:53,594 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:50:53,594 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 17:50:53,594 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:50:53,600 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 17:50:53,600 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 17:50:53,604 INFO L430 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-02-04 17:50:53,604 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 17:50:53,604 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 17:50:53,605 INFO L109 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-02-04 17:50:53,617 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 2 check-sat command(s) [2018-02-04 17:50:53,617 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 17:50:53,620 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 17:50:53,627 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-02-04 17:50:53,627 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 17:50:53,630 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 17:50:53,630 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-02-04 17:50:53,671 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-02-04 17:50:53,673 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-02-04 17:50:53,673 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 17:50:53,674 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 17:50:53,680 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 17:50:53,680 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:23, output treesize:16 [2018-02-04 17:50:53,692 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 16 [2018-02-04 17:50:53,694 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:53,695 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:53,695 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 31 [2018-02-04 17:50:53,696 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 17:50:53,702 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 17:50:53,709 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 17:50:53,709 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:29, output treesize:25 [2018-02-04 17:50:53,724 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 23 [2018-02-04 17:50:53,726 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:53,727 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:53,728 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:53,728 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:53,729 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:53,729 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:53,730 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 6 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 78 [2018-02-04 17:50:53,730 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 17:50:53,737 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 17:50:53,742 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 17:50:53,743 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:38, output treesize:34 [2018-02-04 17:50:53,766 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 30 [2018-02-04 17:50:53,768 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:53,769 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:53,770 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:53,770 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:53,771 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:53,771 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:53,772 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:53,779 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:53,780 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:53,781 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:53,781 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:53,782 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:53,783 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 12 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 149 [2018-02-04 17:50:53,783 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 17:50:53,797 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 17:50:53,803 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 17:50:53,803 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:47, output treesize:43 [2018-02-04 17:50:53,818 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 37 [2018-02-04 17:50:53,821 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:53,821 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:53,822 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:53,823 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:53,823 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:53,824 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:53,824 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:53,825 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:53,825 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:53,826 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:53,827 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:53,827 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:53,828 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:53,828 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:53,828 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:53,829 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:53,829 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 16 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 206 [2018-02-04 17:50:53,830 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 17:50:53,845 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 17:50:53,852 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 17:50:53,852 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:56, output treesize:52 [2018-02-04 17:50:53,869 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 57 treesize of output 44 [2018-02-04 17:50:53,873 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:53,874 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:53,874 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:53,875 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:53,875 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:53,876 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:53,876 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:53,877 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:53,877 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:53,878 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:53,878 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:53,879 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:53,879 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:53,880 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:53,880 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:53,881 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:53,881 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:53,881 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:53,882 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:53,883 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:53,883 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:53,884 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 5 select indices, 5 select index equivalence classes, 21 disjoint index pairs (out of 10 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 253 [2018-02-04 17:50:53,884 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 17:50:53,907 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 17:50:53,914 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 17:50:53,914 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:65, output treesize:61 [2018-02-04 17:50:53,930 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 51 [2018-02-04 17:50:53,932 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:53,933 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:53,933 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:53,934 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:53,934 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:53,935 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:53,935 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:53,936 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:53,937 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:53,937 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:53,938 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:53,938 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:53,939 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:53,939 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:53,940 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:53,940 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:53,941 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:53,941 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:53,947 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:53,948 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:53,948 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:53,949 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:53,949 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:53,950 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:53,951 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:53,951 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:53,952 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:53,952 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 6 select indices, 6 select index equivalence classes, 27 disjoint index pairs (out of 15 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 308 [2018-02-04 17:50:53,953 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 17:50:53,991 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 17:50:54,000 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 17:50:54,000 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:74, output treesize:70 [2018-02-04 17:50:54,097 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 57 treesize of output 41 [2018-02-04 17:50:54,099 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:54,100 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:54,100 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:54,101 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:54,101 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:54,102 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:54,102 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 8 select indices, 8 select index equivalence classes, 27 disjoint index pairs (out of 28 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 31 [2018-02-04 17:50:54,102 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 17:50:54,107 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 17:50:54,112 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-02-04 17:50:54,112 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:81, output treesize:25 [2018-02-04 17:50:54,150 INFO L134 CoverageAnalysis]: Checked inductivity of 51 backedges. 10 proven. 6 refuted. 0 times theorem prover too weak. 35 trivial. 0 not checked. [2018-02-04 17:50:54,150 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 17:50:54,150 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17] total 17 [2018-02-04 17:50:54,150 INFO L409 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-02-04 17:50:54,150 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-02-04 17:50:54,151 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=79, Invalid=227, Unknown=0, NotChecked=0, Total=306 [2018-02-04 17:50:54,151 INFO L87 Difference]: Start difference. First operand 86 states and 94 transitions. Second operand 18 states. [2018-02-04 17:50:54,559 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 17:50:54,559 INFO L93 Difference]: Finished difference Result 85 states and 93 transitions. [2018-02-04 17:50:54,559 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-02-04 17:50:54,559 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 51 [2018-02-04 17:50:54,559 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 17:50:54,560 INFO L225 Difference]: With dead ends: 85 [2018-02-04 17:50:54,560 INFO L226 Difference]: Without dead ends: 85 [2018-02-04 17:50:54,560 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 62 GetRequests, 33 SyntacticMatches, 1 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 166 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=209, Invalid=661, Unknown=0, NotChecked=0, Total=870 [2018-02-04 17:50:54,560 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 85 states. [2018-02-04 17:50:54,561 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 85 to 72. [2018-02-04 17:50:54,561 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 72 states. [2018-02-04 17:50:54,561 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 72 states to 72 states and 78 transitions. [2018-02-04 17:50:54,562 INFO L78 Accepts]: Start accepts. Automaton has 72 states and 78 transitions. Word has length 51 [2018-02-04 17:50:54,562 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 17:50:54,562 INFO L432 AbstractCegarLoop]: Abstraction has 72 states and 78 transitions. [2018-02-04 17:50:54,562 INFO L433 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-02-04 17:50:54,562 INFO L276 IsEmpty]: Start isEmpty. Operand 72 states and 78 transitions. [2018-02-04 17:50:54,562 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2018-02-04 17:50:54,562 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 17:50:54,562 INFO L351 BasicCegarLoop]: trace histogram [6, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 17:50:54,562 INFO L371 AbstractCegarLoop]: === Iteration 19 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-04 17:50:54,562 INFO L82 PathProgramCache]: Analyzing trace with hash 1764257009, now seen corresponding path program 1 times [2018-02-04 17:50:54,562 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 17:50:54,563 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 17:50:54,563 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:50:54,563 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 17:50:54,563 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:50:54,569 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 17:50:54,570 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 17:50:54,572 INFO L430 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-02-04 17:50:54,572 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 17:50:54,572 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 17:50:54,573 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 17:50:54,580 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 17:50:54,582 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 17:50:54,669 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-02-04 17:50:54,670 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 17:50:54,670 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10] total 10 [2018-02-04 17:50:54,670 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-02-04 17:50:54,670 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-02-04 17:50:54,671 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=38, Invalid=52, Unknown=0, NotChecked=0, Total=90 [2018-02-04 17:50:54,671 INFO L87 Difference]: Start difference. First operand 72 states and 78 transitions. Second operand 10 states. [2018-02-04 17:50:54,684 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 17:50:54,684 INFO L93 Difference]: Finished difference Result 75 states and 81 transitions. [2018-02-04 17:50:54,684 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-02-04 17:50:54,684 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 54 [2018-02-04 17:50:54,684 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 17:50:54,685 INFO L225 Difference]: With dead ends: 75 [2018-02-04 17:50:54,685 INFO L226 Difference]: Without dead ends: 73 [2018-02-04 17:50:54,685 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 54 GetRequests, 45 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=42, Invalid=68, Unknown=0, NotChecked=0, Total=110 [2018-02-04 17:50:54,685 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 73 states. [2018-02-04 17:50:54,686 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 73 to 73. [2018-02-04 17:50:54,686 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 73 states. [2018-02-04 17:50:54,687 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 73 states to 73 states and 79 transitions. [2018-02-04 17:50:54,687 INFO L78 Accepts]: Start accepts. Automaton has 73 states and 79 transitions. Word has length 54 [2018-02-04 17:50:54,687 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 17:50:54,687 INFO L432 AbstractCegarLoop]: Abstraction has 73 states and 79 transitions. [2018-02-04 17:50:54,687 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-02-04 17:50:54,687 INFO L276 IsEmpty]: Start isEmpty. Operand 73 states and 79 transitions. [2018-02-04 17:50:54,688 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2018-02-04 17:50:54,688 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 17:50:54,688 INFO L351 BasicCegarLoop]: trace histogram [7, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 17:50:54,688 INFO L371 AbstractCegarLoop]: === Iteration 20 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-04 17:50:54,688 INFO L82 PathProgramCache]: Analyzing trace with hash 1591533572, now seen corresponding path program 2 times [2018-02-04 17:50:54,688 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 17:50:54,688 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 17:50:54,688 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:50:54,689 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 17:50:54,689 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:50:54,694 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 17:50:54,695 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 17:50:54,699 INFO L430 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-02-04 17:50:54,699 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 17:50:54,699 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 17:50:54,700 INFO L109 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-02-04 17:50:54,715 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-02-04 17:50:54,715 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 17:50:54,716 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 17:50:54,749 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-02-04 17:50:54,750 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 17:50:54,750 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11] total 11 [2018-02-04 17:50:54,750 INFO L409 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-02-04 17:50:54,750 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-02-04 17:50:54,750 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=47, Invalid=63, Unknown=0, NotChecked=0, Total=110 [2018-02-04 17:50:54,750 INFO L87 Difference]: Start difference. First operand 73 states and 79 transitions. Second operand 11 states. [2018-02-04 17:50:54,770 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 17:50:54,770 INFO L93 Difference]: Finished difference Result 76 states and 82 transitions. [2018-02-04 17:50:54,775 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-02-04 17:50:54,775 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 55 [2018-02-04 17:50:54,775 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 17:50:54,775 INFO L225 Difference]: With dead ends: 76 [2018-02-04 17:50:54,775 INFO L226 Difference]: Without dead ends: 74 [2018-02-04 17:50:54,776 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 55 GetRequests, 45 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=51, Invalid=81, Unknown=0, NotChecked=0, Total=132 [2018-02-04 17:50:54,776 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 74 states. [2018-02-04 17:50:54,777 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 74 to 74. [2018-02-04 17:50:54,778 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 74 states. [2018-02-04 17:50:54,778 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 74 states to 74 states and 80 transitions. [2018-02-04 17:50:54,778 INFO L78 Accepts]: Start accepts. Automaton has 74 states and 80 transitions. Word has length 55 [2018-02-04 17:50:54,778 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 17:50:54,778 INFO L432 AbstractCegarLoop]: Abstraction has 74 states and 80 transitions. [2018-02-04 17:50:54,778 INFO L433 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-02-04 17:50:54,779 INFO L276 IsEmpty]: Start isEmpty. Operand 74 states and 80 transitions. [2018-02-04 17:50:54,779 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2018-02-04 17:50:54,779 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 17:50:54,779 INFO L351 BasicCegarLoop]: trace histogram [8, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 17:50:54,779 INFO L371 AbstractCegarLoop]: === Iteration 21 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-04 17:50:54,779 INFO L82 PathProgramCache]: Analyzing trace with hash 532074321, now seen corresponding path program 3 times [2018-02-04 17:50:54,779 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 17:50:54,780 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 17:50:54,780 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:50:54,780 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 17:50:54,780 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:50:54,787 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 17:50:54,788 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 17:50:54,794 INFO L430 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-02-04 17:50:54,795 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 17:50:54,795 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 17:50:54,795 INFO L109 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-02-04 17:50:54,808 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 2 check-sat command(s) [2018-02-04 17:50:54,808 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 17:50:54,809 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 17:50:54,829 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-02-04 17:50:54,830 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-02-04 17:50:54,831 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 17:50:54,831 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 17:50:54,834 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 17:50:54,835 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:18, output treesize:14 [2018-02-04 17:50:54,844 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 16 [2018-02-04 17:50:54,846 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:54,846 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:54,847 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 31 [2018-02-04 17:50:54,847 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 17:50:54,851 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 17:50:54,855 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 17:50:54,855 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:27, output treesize:23 [2018-02-04 17:50:54,864 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 23 [2018-02-04 17:50:54,866 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:54,867 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:54,867 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:54,868 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:54,869 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:54,869 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:54,870 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 6 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 78 [2018-02-04 17:50:54,870 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 17:50:54,907 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 17:50:54,914 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 17:50:54,914 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:36, output treesize:32 [2018-02-04 17:50:54,930 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 30 [2018-02-04 17:50:54,932 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:54,933 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:54,934 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:54,935 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:54,936 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:54,937 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:54,938 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:54,939 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:54,940 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:54,941 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:54,941 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:54,942 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:54,943 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 12 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 149 [2018-02-04 17:50:54,944 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 17:50:54,964 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 17:50:54,986 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 17:50:54,986 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:45, output treesize:41 [2018-02-04 17:50:55,002 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 37 [2018-02-04 17:50:55,004 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:55,005 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:55,005 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:55,006 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:55,007 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:55,007 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:55,008 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:55,008 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:55,009 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:55,010 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:55,010 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:55,011 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:55,011 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:55,012 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:55,013 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:55,013 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:55,014 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 16 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 206 [2018-02-04 17:50:55,015 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 17:50:55,036 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 17:50:55,044 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 17:50:55,044 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:54, output treesize:50 [2018-02-04 17:50:55,061 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 57 treesize of output 44 [2018-02-04 17:50:55,063 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:55,064 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:55,064 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:55,065 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:55,065 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:55,066 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:55,067 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:55,067 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:55,068 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:55,068 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:55,069 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:55,070 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:55,070 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:55,071 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:55,072 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:55,072 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:55,073 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:55,074 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:55,074 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:55,075 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:55,076 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:55,076 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 5 select indices, 5 select index equivalence classes, 21 disjoint index pairs (out of 10 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 253 [2018-02-04 17:50:55,077 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 17:50:55,106 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 17:50:55,114 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 17:50:55,114 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:63, output treesize:59 [2018-02-04 17:50:55,133 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 51 [2018-02-04 17:50:55,135 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:55,136 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:55,137 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:55,137 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:55,138 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:55,139 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:55,139 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:55,140 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:55,140 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:55,141 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:55,142 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:55,142 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:55,143 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:55,144 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:55,144 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:55,145 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:55,145 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:55,146 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:55,147 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:55,147 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:55,148 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:55,149 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:55,149 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:55,150 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:55,151 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:55,151 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:55,152 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:55,153 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 6 select indices, 6 select index equivalence classes, 27 disjoint index pairs (out of 15 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 308 [2018-02-04 17:50:55,153 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 17:50:55,193 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 17:50:55,203 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 17:50:55,203 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:72, output treesize:68 [2018-02-04 17:50:55,452 WARN L307 Elim1Store]: Array PQE input equivalent to false [2018-02-04 17:50:55,453 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 17:50:55,454 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 17:50:55,454 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 4 variables, input treesize:155, output treesize:1 [2018-02-04 17:50:55,468 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-02-04 17:50:55,469 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 17:50:55,469 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18] total 18 [2018-02-04 17:50:55,469 INFO L409 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-02-04 17:50:55,469 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-02-04 17:50:55,469 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=71, Invalid=235, Unknown=0, NotChecked=0, Total=306 [2018-02-04 17:50:55,470 INFO L87 Difference]: Start difference. First operand 74 states and 80 transitions. Second operand 18 states. [2018-02-04 17:50:56,418 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 17:50:56,418 INFO L93 Difference]: Finished difference Result 86 states and 92 transitions. [2018-02-04 17:50:56,418 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-02-04 17:50:56,418 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 56 [2018-02-04 17:50:56,418 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 17:50:56,418 INFO L225 Difference]: With dead ends: 86 [2018-02-04 17:50:56,418 INFO L226 Difference]: Without dead ends: 83 [2018-02-04 17:50:56,419 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 66 GetRequests, 39 SyntacticMatches, 0 SemanticMatches, 27 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 180 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=177, Invalid=635, Unknown=0, NotChecked=0, Total=812 [2018-02-04 17:50:56,419 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 83 states. [2018-02-04 17:50:56,420 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 83 to 80. [2018-02-04 17:50:56,420 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 80 states. [2018-02-04 17:50:56,421 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 80 states to 80 states and 86 transitions. [2018-02-04 17:50:56,421 INFO L78 Accepts]: Start accepts. Automaton has 80 states and 86 transitions. Word has length 56 [2018-02-04 17:50:56,421 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 17:50:56,421 INFO L432 AbstractCegarLoop]: Abstraction has 80 states and 86 transitions. [2018-02-04 17:50:56,421 INFO L433 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-02-04 17:50:56,421 INFO L276 IsEmpty]: Start isEmpty. Operand 80 states and 86 transitions. [2018-02-04 17:50:56,422 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 63 [2018-02-04 17:50:56,422 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 17:50:56,422 INFO L351 BasicCegarLoop]: trace histogram [8, 3, 3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 17:50:56,422 INFO L371 AbstractCegarLoop]: === Iteration 22 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-04 17:50:56,422 INFO L82 PathProgramCache]: Analyzing trace with hash 1969480589, now seen corresponding path program 4 times [2018-02-04 17:50:56,422 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 17:50:56,422 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 17:50:56,423 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:50:56,423 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 17:50:56,423 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:50:56,432 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 17:50:56,433 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 17:50:56,442 INFO L430 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-02-04 17:50:56,443 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 17:50:56,443 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 17:50:56,443 INFO L109 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-02-04 17:50:56,458 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-02-04 17:50:56,458 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 17:50:56,461 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 17:50:56,514 INFO L134 CoverageAnalysis]: Checked inductivity of 52 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-02-04 17:50:56,514 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 17:50:56,514 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12] total 12 [2018-02-04 17:50:56,515 INFO L409 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-02-04 17:50:56,515 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-02-04 17:50:56,515 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=57, Invalid=75, Unknown=0, NotChecked=0, Total=132 [2018-02-04 17:50:56,515 INFO L87 Difference]: Start difference. First operand 80 states and 86 transitions. Second operand 12 states. [2018-02-04 17:50:56,526 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 17:50:56,527 INFO L93 Difference]: Finished difference Result 83 states and 89 transitions. [2018-02-04 17:50:56,527 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-02-04 17:50:56,527 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 62 [2018-02-04 17:50:56,527 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 17:50:56,527 INFO L225 Difference]: With dead ends: 83 [2018-02-04 17:50:56,527 INFO L226 Difference]: Without dead ends: 81 [2018-02-04 17:50:56,527 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 62 GetRequests, 51 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=61, Invalid=95, Unknown=0, NotChecked=0, Total=156 [2018-02-04 17:50:56,527 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 81 states. [2018-02-04 17:50:56,528 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 81 to 81. [2018-02-04 17:50:56,529 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 81 states. [2018-02-04 17:50:56,529 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 81 states to 81 states and 87 transitions. [2018-02-04 17:50:56,529 INFO L78 Accepts]: Start accepts. Automaton has 81 states and 87 transitions. Word has length 62 [2018-02-04 17:50:56,529 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 17:50:56,529 INFO L432 AbstractCegarLoop]: Abstraction has 81 states and 87 transitions. [2018-02-04 17:50:56,529 INFO L433 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-02-04 17:50:56,530 INFO L276 IsEmpty]: Start isEmpty. Operand 81 states and 87 transitions. [2018-02-04 17:50:56,530 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 64 [2018-02-04 17:50:56,530 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 17:50:56,530 INFO L351 BasicCegarLoop]: trace histogram [9, 3, 3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 17:50:56,530 INFO L371 AbstractCegarLoop]: === Iteration 23 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-04 17:50:56,531 INFO L82 PathProgramCache]: Analyzing trace with hash 906597280, now seen corresponding path program 5 times [2018-02-04 17:50:56,531 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 17:50:56,531 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 17:50:56,531 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:50:56,531 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 17:50:56,531 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:50:56,540 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 17:50:56,541 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 17:50:56,558 INFO L430 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-02-04 17:50:56,558 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 17:50:56,558 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 17:50:56,559 INFO L109 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-02-04 17:50:56,577 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 6 check-sat command(s) [2018-02-04 17:50:56,577 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 17:50:56,579 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 17:50:56,647 INFO L134 CoverageAnalysis]: Checked inductivity of 61 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-02-04 17:50:56,647 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 17:50:56,647 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13] total 13 [2018-02-04 17:50:56,647 INFO L409 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-02-04 17:50:56,648 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-02-04 17:50:56,648 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=68, Invalid=88, Unknown=0, NotChecked=0, Total=156 [2018-02-04 17:50:56,648 INFO L87 Difference]: Start difference. First operand 81 states and 87 transitions. Second operand 13 states. [2018-02-04 17:50:56,676 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 17:50:56,677 INFO L93 Difference]: Finished difference Result 84 states and 90 transitions. [2018-02-04 17:50:56,677 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-02-04 17:50:56,677 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 63 [2018-02-04 17:50:56,677 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 17:50:56,678 INFO L225 Difference]: With dead ends: 84 [2018-02-04 17:50:56,678 INFO L226 Difference]: Without dead ends: 82 [2018-02-04 17:50:56,678 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 63 GetRequests, 51 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=72, Invalid=110, Unknown=0, NotChecked=0, Total=182 [2018-02-04 17:50:56,678 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 82 states. [2018-02-04 17:50:56,680 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 82 to 82. [2018-02-04 17:50:56,680 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 82 states. [2018-02-04 17:50:56,680 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 82 states to 82 states and 88 transitions. [2018-02-04 17:50:56,680 INFO L78 Accepts]: Start accepts. Automaton has 82 states and 88 transitions. Word has length 63 [2018-02-04 17:50:56,680 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 17:50:56,680 INFO L432 AbstractCegarLoop]: Abstraction has 82 states and 88 transitions. [2018-02-04 17:50:56,680 INFO L433 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-02-04 17:50:56,681 INFO L276 IsEmpty]: Start isEmpty. Operand 82 states and 88 transitions. [2018-02-04 17:50:56,681 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2018-02-04 17:50:56,681 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 17:50:56,681 INFO L351 BasicCegarLoop]: trace histogram [10, 3, 3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 17:50:56,681 INFO L371 AbstractCegarLoop]: === Iteration 24 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-04 17:50:56,682 INFO L82 PathProgramCache]: Analyzing trace with hash -1978014227, now seen corresponding path program 6 times [2018-02-04 17:50:56,682 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 17:50:56,682 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 17:50:56,682 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:50:56,682 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 17:50:56,682 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:50:56,691 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 17:50:56,692 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 17:50:56,713 INFO L430 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-02-04 17:50:56,713 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 17:50:56,714 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 17:50:56,714 INFO L109 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-02-04 17:50:56,734 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 3 check-sat command(s) [2018-02-04 17:50:56,734 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 17:50:56,737 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 17:50:56,742 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-02-04 17:50:56,742 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 17:50:56,746 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 17:50:56,746 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-02-04 17:50:56,793 INFO L134 CoverageAnalysis]: Checked inductivity of 71 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 67 trivial. 0 not checked. [2018-02-04 17:50:56,793 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 17:50:56,793 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7] total 7 [2018-02-04 17:50:56,793 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-02-04 17:50:56,793 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-02-04 17:50:56,793 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=38, Unknown=0, NotChecked=0, Total=56 [2018-02-04 17:50:56,794 INFO L87 Difference]: Start difference. First operand 82 states and 88 transitions. Second operand 8 states. [2018-02-04 17:50:56,886 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 17:50:56,886 INFO L93 Difference]: Finished difference Result 93 states and 100 transitions. [2018-02-04 17:50:56,886 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-02-04 17:50:56,886 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 64 [2018-02-04 17:50:56,886 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 17:50:56,887 INFO L225 Difference]: With dead ends: 93 [2018-02-04 17:50:56,887 INFO L226 Difference]: Without dead ends: 93 [2018-02-04 17:50:56,887 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 66 GetRequests, 54 SyntacticMatches, 3 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=33, Invalid=77, Unknown=0, NotChecked=0, Total=110 [2018-02-04 17:50:56,887 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 93 states. [2018-02-04 17:50:56,888 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 93 to 88. [2018-02-04 17:50:56,888 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 88 states. [2018-02-04 17:50:56,889 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 88 states to 88 states and 95 transitions. [2018-02-04 17:50:56,889 INFO L78 Accepts]: Start accepts. Automaton has 88 states and 95 transitions. Word has length 64 [2018-02-04 17:50:56,889 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 17:50:56,889 INFO L432 AbstractCegarLoop]: Abstraction has 88 states and 95 transitions. [2018-02-04 17:50:56,889 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-02-04 17:50:56,889 INFO L276 IsEmpty]: Start isEmpty. Operand 88 states and 95 transitions. [2018-02-04 17:50:56,889 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2018-02-04 17:50:56,889 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 17:50:56,889 INFO L351 BasicCegarLoop]: trace histogram [10, 3, 3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 17:50:56,890 INFO L371 AbstractCegarLoop]: === Iteration 25 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-04 17:50:56,890 INFO L82 PathProgramCache]: Analyzing trace with hash -564587941, now seen corresponding path program 1 times [2018-02-04 17:50:56,890 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 17:50:56,890 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 17:50:56,890 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:50:56,890 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 17:50:56,890 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:50:56,897 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 17:50:56,897 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 17:50:56,905 INFO L430 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-02-04 17:50:56,905 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 17:50:56,905 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 17:50:56,905 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 17:50:56,913 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 17:50:56,914 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 17:50:56,960 INFO L134 CoverageAnalysis]: Checked inductivity of 67 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-02-04 17:50:56,960 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 17:50:56,960 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14] total 14 [2018-02-04 17:50:56,960 INFO L409 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-02-04 17:50:56,961 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-02-04 17:50:56,961 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=80, Invalid=102, Unknown=0, NotChecked=0, Total=182 [2018-02-04 17:50:56,961 INFO L87 Difference]: Start difference. First operand 88 states and 95 transitions. Second operand 14 states. [2018-02-04 17:50:56,981 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 17:50:56,981 INFO L93 Difference]: Finished difference Result 91 states and 98 transitions. [2018-02-04 17:50:56,981 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-02-04 17:50:56,981 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 67 [2018-02-04 17:50:56,981 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 17:50:56,981 INFO L225 Difference]: With dead ends: 91 [2018-02-04 17:50:56,981 INFO L226 Difference]: Without dead ends: 89 [2018-02-04 17:50:56,982 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 67 GetRequests, 54 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=84, Invalid=126, Unknown=0, NotChecked=0, Total=210 [2018-02-04 17:50:56,982 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 89 states. [2018-02-04 17:50:56,982 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 89 to 89. [2018-02-04 17:50:56,983 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 89 states. [2018-02-04 17:50:56,983 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 89 states to 89 states and 96 transitions. [2018-02-04 17:50:56,983 INFO L78 Accepts]: Start accepts. Automaton has 89 states and 96 transitions. Word has length 67 [2018-02-04 17:50:56,983 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 17:50:56,983 INFO L432 AbstractCegarLoop]: Abstraction has 89 states and 96 transitions. [2018-02-04 17:50:56,983 INFO L433 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-02-04 17:50:56,983 INFO L276 IsEmpty]: Start isEmpty. Operand 89 states and 96 transitions. [2018-02-04 17:50:56,984 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2018-02-04 17:50:56,984 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 17:50:56,984 INFO L351 BasicCegarLoop]: trace histogram [11, 3, 3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 17:50:56,984 INFO L371 AbstractCegarLoop]: === Iteration 26 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-04 17:50:56,984 INFO L82 PathProgramCache]: Analyzing trace with hash 841840168, now seen corresponding path program 2 times [2018-02-04 17:50:56,984 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 17:50:56,984 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 17:50:56,985 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:50:56,985 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 17:50:56,985 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:50:56,993 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 17:50:56,994 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 17:50:56,999 INFO L430 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-02-04 17:50:56,999 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 17:50:56,999 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 17:50:57,000 INFO L109 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-02-04 17:50:57,013 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2018-02-04 17:50:57,013 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 17:50:57,016 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 17:50:57,036 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-02-04 17:50:57,037 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-02-04 17:50:57,037 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 17:50:57,039 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 17:50:57,043 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 17:50:57,043 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:18, output treesize:14 [2018-02-04 17:50:57,053 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 16 [2018-02-04 17:50:57,055 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:57,056 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:57,056 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 31 [2018-02-04 17:50:57,057 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 17:50:57,062 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 17:50:57,067 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 17:50:57,067 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:27, output treesize:23 [2018-02-04 17:50:57,079 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 23 [2018-02-04 17:50:57,082 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:57,083 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:57,084 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:57,085 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:57,086 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:57,086 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:57,087 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 6 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 78 [2018-02-04 17:50:57,088 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 17:50:57,095 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 17:50:57,101 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 17:50:57,101 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:36, output treesize:32 [2018-02-04 17:50:57,114 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 30 [2018-02-04 17:50:57,116 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:57,117 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:57,118 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:57,118 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:57,119 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:57,120 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:57,121 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:57,121 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:57,122 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:57,123 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:57,124 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:57,124 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:57,125 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 12 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 149 [2018-02-04 17:50:57,126 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 17:50:57,142 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 17:50:57,149 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 17:50:57,149 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:45, output treesize:41 [2018-02-04 17:50:57,166 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 37 [2018-02-04 17:50:57,168 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:57,169 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:57,169 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:57,170 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:57,171 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:57,171 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:57,172 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:57,173 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:57,173 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:57,174 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:57,174 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:57,175 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:57,176 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:57,176 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:57,177 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:57,178 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:57,178 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 16 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 206 [2018-02-04 17:50:57,178 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 17:50:57,202 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 17:50:57,210 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 17:50:57,210 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:54, output treesize:50 [2018-02-04 17:50:57,225 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 57 treesize of output 44 [2018-02-04 17:50:57,226 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:57,227 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:57,228 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:57,228 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:57,229 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:57,229 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:57,230 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:57,230 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:57,231 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:57,231 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:57,232 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:57,232 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:57,233 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:57,233 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:57,234 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:57,235 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:57,235 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:57,236 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:57,236 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:57,237 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:57,238 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:57,238 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 5 select indices, 5 select index equivalence classes, 21 disjoint index pairs (out of 10 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 253 [2018-02-04 17:50:57,239 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 17:50:57,274 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 17:50:57,281 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 17:50:57,281 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:63, output treesize:59 [2018-02-04 17:50:57,297 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 51 [2018-02-04 17:50:57,300 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:57,301 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:57,301 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:57,302 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:57,303 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:57,303 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:57,304 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:57,305 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:57,305 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:57,306 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:57,307 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:57,307 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:57,308 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:57,308 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:57,309 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:57,309 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:57,309 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:57,310 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:57,310 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:57,311 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:57,312 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:57,312 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:57,313 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:57,313 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:57,314 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:57,315 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:57,315 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:57,316 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 6 select indices, 6 select index equivalence classes, 27 disjoint index pairs (out of 15 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 308 [2018-02-04 17:50:57,317 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 17:50:57,345 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 17:50:57,353 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 17:50:57,353 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:72, output treesize:68 [2018-02-04 17:50:57,559 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 78 trivial. 0 not checked. [2018-02-04 17:50:57,559 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 17:50:57,560 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [15] imperfect sequences [] total 15 [2018-02-04 17:50:57,560 INFO L409 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-02-04 17:50:57,560 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-02-04 17:50:57,560 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=59, Invalid=151, Unknown=0, NotChecked=0, Total=210 [2018-02-04 17:50:57,560 INFO L87 Difference]: Start difference. First operand 89 states and 96 transitions. Second operand 15 states. [2018-02-04 17:50:58,483 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 17:50:58,484 INFO L93 Difference]: Finished difference Result 87 states and 93 transitions. [2018-02-04 17:50:58,484 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-02-04 17:50:58,484 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 68 [2018-02-04 17:50:58,484 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 17:50:58,485 INFO L225 Difference]: With dead ends: 87 [2018-02-04 17:50:58,485 INFO L226 Difference]: Without dead ends: 84 [2018-02-04 17:50:58,485 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 78 GetRequests, 52 SyntacticMatches, 2 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 127 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=165, Invalid=485, Unknown=0, NotChecked=0, Total=650 [2018-02-04 17:50:58,485 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 84 states. [2018-02-04 17:50:58,486 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 84 to 84. [2018-02-04 17:50:58,486 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 84 states. [2018-02-04 17:50:58,486 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 84 states to 84 states and 90 transitions. [2018-02-04 17:50:58,487 INFO L78 Accepts]: Start accepts. Automaton has 84 states and 90 transitions. Word has length 68 [2018-02-04 17:50:58,487 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 17:50:58,487 INFO L432 AbstractCegarLoop]: Abstraction has 84 states and 90 transitions. [2018-02-04 17:50:58,487 INFO L433 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-02-04 17:50:58,487 INFO L276 IsEmpty]: Start isEmpty. Operand 84 states and 90 transitions. [2018-02-04 17:50:58,487 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2018-02-04 17:50:58,487 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 17:50:58,487 INFO L351 BasicCegarLoop]: trace histogram [11, 3, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 17:50:58,487 INFO L371 AbstractCegarLoop]: === Iteration 27 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-04 17:50:58,487 INFO L82 PathProgramCache]: Analyzing trace with hash -387013233, now seen corresponding path program 1 times [2018-02-04 17:50:58,487 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 17:50:58,487 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 17:50:58,488 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:50:58,488 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 17:50:58,488 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:50:58,495 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 17:50:58,495 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 17:50:58,500 INFO L430 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-02-04 17:50:58,500 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 17:50:58,500 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 17:50:58,501 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 17:50:58,510 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 17:50:58,512 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 17:50:58,586 INFO L134 CoverageAnalysis]: Checked inductivity of 81 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-02-04 17:50:58,586 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 17:50:58,586 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15] total 15 [2018-02-04 17:50:58,587 INFO L409 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-02-04 17:50:58,587 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-02-04 17:50:58,587 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=93, Invalid=117, Unknown=0, NotChecked=0, Total=210 [2018-02-04 17:50:58,587 INFO L87 Difference]: Start difference. First operand 84 states and 90 transitions. Second operand 15 states. [2018-02-04 17:50:58,608 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 17:50:58,608 INFO L93 Difference]: Finished difference Result 87 states and 93 transitions. [2018-02-04 17:50:58,608 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-02-04 17:50:58,608 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 71 [2018-02-04 17:50:58,609 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 17:50:58,609 INFO L225 Difference]: With dead ends: 87 [2018-02-04 17:50:58,609 INFO L226 Difference]: Without dead ends: 85 [2018-02-04 17:50:58,609 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 71 GetRequests, 57 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=97, Invalid=143, Unknown=0, NotChecked=0, Total=240 [2018-02-04 17:50:58,609 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 85 states. [2018-02-04 17:50:58,611 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 85 to 85. [2018-02-04 17:50:58,611 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 85 states. [2018-02-04 17:50:58,611 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 85 states to 85 states and 91 transitions. [2018-02-04 17:50:58,611 INFO L78 Accepts]: Start accepts. Automaton has 85 states and 91 transitions. Word has length 71 [2018-02-04 17:50:58,611 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 17:50:58,612 INFO L432 AbstractCegarLoop]: Abstraction has 85 states and 91 transitions. [2018-02-04 17:50:58,612 INFO L433 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-02-04 17:50:58,612 INFO L276 IsEmpty]: Start isEmpty. Operand 85 states and 91 transitions. [2018-02-04 17:50:58,612 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2018-02-04 17:50:58,612 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 17:50:58,612 INFO L351 BasicCegarLoop]: trace histogram [12, 3, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 17:50:58,612 INFO L371 AbstractCegarLoop]: === Iteration 28 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-04 17:50:58,613 INFO L82 PathProgramCache]: Analyzing trace with hash -1323148580, now seen corresponding path program 2 times [2018-02-04 17:50:58,613 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 17:50:58,613 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 17:50:58,613 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:50:58,613 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 17:50:58,614 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:50:58,623 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 17:50:58,624 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 17:50:58,634 INFO L430 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-02-04 17:50:58,634 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 17:50:58,634 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 17:50:58,635 INFO L109 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-02-04 17:50:58,652 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-02-04 17:50:58,653 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 17:50:58,655 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 17:50:58,673 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-02-04 17:50:58,675 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-02-04 17:50:58,675 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 17:50:58,676 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 17:50:58,680 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 17:50:58,680 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:18, output treesize:14 [2018-02-04 17:50:58,690 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 16 [2018-02-04 17:50:58,693 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:58,694 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:58,695 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 31 [2018-02-04 17:50:58,695 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 17:50:58,700 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 17:50:58,706 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 17:50:58,706 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:27, output treesize:23 [2018-02-04 17:50:58,719 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 23 [2018-02-04 17:50:58,723 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:58,724 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:58,725 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:58,726 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:58,727 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:58,728 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:58,729 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 6 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 78 [2018-02-04 17:50:58,729 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 17:50:58,739 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 17:50:58,746 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 17:50:58,747 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:36, output treesize:32 [2018-02-04 17:50:58,761 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 30 [2018-02-04 17:50:58,764 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:58,765 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:58,766 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:58,767 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:58,768 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:58,769 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:58,770 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:58,770 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:58,771 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:58,772 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:58,773 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:58,774 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:58,775 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 12 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 149 [2018-02-04 17:50:58,775 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 17:50:58,789 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 17:50:58,796 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 17:50:58,796 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:45, output treesize:41 [2018-02-04 17:50:58,811 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 37 [2018-02-04 17:50:58,813 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:58,813 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:58,814 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:58,815 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:58,815 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:58,816 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:58,817 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:58,817 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:58,818 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:58,819 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:58,819 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:58,820 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:58,821 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:58,821 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:58,822 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:58,823 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:58,823 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 16 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 206 [2018-02-04 17:50:58,824 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 17:50:58,844 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 17:50:58,852 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 17:50:58,852 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:54, output treesize:50 [2018-02-04 17:50:58,870 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 57 treesize of output 44 [2018-02-04 17:50:58,873 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:58,873 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:58,874 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:58,875 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:58,875 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:58,876 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:58,877 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:58,877 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:58,878 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:58,879 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:58,879 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:58,880 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:58,880 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:58,881 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:58,882 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:58,882 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:58,883 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:58,884 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:58,885 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:58,885 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:58,886 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:58,887 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 5 select indices, 5 select index equivalence classes, 21 disjoint index pairs (out of 10 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 253 [2018-02-04 17:50:58,887 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 17:50:58,916 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 17:50:58,923 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 17:50:58,923 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:63, output treesize:59 [2018-02-04 17:50:58,939 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 51 [2018-02-04 17:50:58,942 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:58,943 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:58,944 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:58,944 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:58,945 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:58,946 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:58,963 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:58,964 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:58,964 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:58,965 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:58,966 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:58,966 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:58,967 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:58,967 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:58,968 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:58,968 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:58,969 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:58,969 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:58,970 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:58,970 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:58,971 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:58,972 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:58,972 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:58,973 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:58,973 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:58,974 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:58,974 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:50:58,975 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 6 select indices, 6 select index equivalence classes, 27 disjoint index pairs (out of 15 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 308 [2018-02-04 17:50:58,975 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 17:50:59,006 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 17:50:59,015 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 17:50:59,015 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:72, output treesize:68 [2018-02-04 17:50:59,237 INFO L134 CoverageAnalysis]: Checked inductivity of 93 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 90 trivial. 0 not checked. [2018-02-04 17:50:59,238 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 17:50:59,238 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16] total 16 [2018-02-04 17:50:59,238 INFO L409 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-02-04 17:50:59,238 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-02-04 17:50:59,238 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=63, Invalid=177, Unknown=0, NotChecked=0, Total=240 [2018-02-04 17:50:59,238 INFO L87 Difference]: Start difference. First operand 85 states and 91 transitions. Second operand 16 states. [2018-02-04 17:51:00,326 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 17:51:00,326 INFO L93 Difference]: Finished difference Result 90 states and 95 transitions. [2018-02-04 17:51:00,326 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-02-04 17:51:00,326 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 72 [2018-02-04 17:51:00,326 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 17:51:00,327 INFO L225 Difference]: With dead ends: 90 [2018-02-04 17:51:00,327 INFO L226 Difference]: Without dead ends: 87 [2018-02-04 17:51:00,327 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 83 GetRequests, 55 SyntacticMatches, 2 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 162 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=176, Invalid=580, Unknown=0, NotChecked=0, Total=756 [2018-02-04 17:51:00,327 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 87 states. [2018-02-04 17:51:00,328 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 87 to 85. [2018-02-04 17:51:00,328 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 85 states. [2018-02-04 17:51:00,328 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 85 states to 85 states and 90 transitions. [2018-02-04 17:51:00,329 INFO L78 Accepts]: Start accepts. Automaton has 85 states and 90 transitions. Word has length 72 [2018-02-04 17:51:00,329 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 17:51:00,329 INFO L432 AbstractCegarLoop]: Abstraction has 85 states and 90 transitions. [2018-02-04 17:51:00,329 INFO L433 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-02-04 17:51:00,329 INFO L276 IsEmpty]: Start isEmpty. Operand 85 states and 90 transitions. [2018-02-04 17:51:00,329 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2018-02-04 17:51:00,329 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 17:51:00,329 INFO L351 BasicCegarLoop]: trace histogram [12, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 17:51:00,329 INFO L371 AbstractCegarLoop]: === Iteration 29 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-04 17:51:00,329 INFO L82 PathProgramCache]: Analyzing trace with hash -1824701743, now seen corresponding path program 7 times [2018-02-04 17:51:00,329 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 17:51:00,329 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 17:51:00,330 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:51:00,330 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 17:51:00,330 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:51:00,336 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 17:51:00,337 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 17:51:00,344 INFO L430 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-02-04 17:51:00,344 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 17:51:00,344 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 17:51:00,345 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 17:51:00,353 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 17:51:00,354 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 17:51:00,425 INFO L134 CoverageAnalysis]: Checked inductivity of 104 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2018-02-04 17:51:00,425 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 17:51:00,425 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16] total 16 [2018-02-04 17:51:00,425 INFO L409 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-02-04 17:51:00,425 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-02-04 17:51:00,425 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=107, Invalid=133, Unknown=0, NotChecked=0, Total=240 [2018-02-04 17:51:00,426 INFO L87 Difference]: Start difference. First operand 85 states and 90 transitions. Second operand 16 states. [2018-02-04 17:51:00,445 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 17:51:00,445 INFO L93 Difference]: Finished difference Result 88 states and 93 transitions. [2018-02-04 17:51:00,446 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-02-04 17:51:00,446 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 72 [2018-02-04 17:51:00,446 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 17:51:00,446 INFO L225 Difference]: With dead ends: 88 [2018-02-04 17:51:00,446 INFO L226 Difference]: Without dead ends: 86 [2018-02-04 17:51:00,446 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 72 GetRequests, 57 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=111, Invalid=161, Unknown=0, NotChecked=0, Total=272 [2018-02-04 17:51:00,446 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 86 states. [2018-02-04 17:51:00,448 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 86 to 86. [2018-02-04 17:51:00,448 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 86 states. [2018-02-04 17:51:00,448 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 86 states to 86 states and 91 transitions. [2018-02-04 17:51:00,448 INFO L78 Accepts]: Start accepts. Automaton has 86 states and 91 transitions. Word has length 72 [2018-02-04 17:51:00,448 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 17:51:00,448 INFO L432 AbstractCegarLoop]: Abstraction has 86 states and 91 transitions. [2018-02-04 17:51:00,448 INFO L433 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-02-04 17:51:00,448 INFO L276 IsEmpty]: Start isEmpty. Operand 86 states and 91 transitions. [2018-02-04 17:51:00,449 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 74 [2018-02-04 17:51:00,449 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 17:51:00,449 INFO L351 BasicCegarLoop]: trace histogram [13, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 17:51:00,449 INFO L371 AbstractCegarLoop]: === Iteration 30 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-04 17:51:00,449 INFO L82 PathProgramCache]: Analyzing trace with hash -780126428, now seen corresponding path program 8 times [2018-02-04 17:51:00,449 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 17:51:00,449 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 17:51:00,449 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:51:00,450 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 17:51:00,450 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:51:00,456 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 17:51:00,456 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 17:51:00,468 INFO L430 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-02-04 17:51:00,468 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 17:51:00,468 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 17:51:00,469 INFO L109 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-02-04 17:51:00,480 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-02-04 17:51:00,481 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 17:51:00,482 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 17:51:00,553 INFO L134 CoverageAnalysis]: Checked inductivity of 117 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2018-02-04 17:51:00,553 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 17:51:00,553 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17] total 17 [2018-02-04 17:51:00,553 INFO L409 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-02-04 17:51:00,554 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-02-04 17:51:00,554 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=122, Invalid=150, Unknown=0, NotChecked=0, Total=272 [2018-02-04 17:51:00,554 INFO L87 Difference]: Start difference. First operand 86 states and 91 transitions. Second operand 17 states. [2018-02-04 17:51:00,600 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 17:51:00,600 INFO L93 Difference]: Finished difference Result 89 states and 94 transitions. [2018-02-04 17:51:00,601 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-02-04 17:51:00,601 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 73 [2018-02-04 17:51:00,601 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 17:51:00,601 INFO L225 Difference]: With dead ends: 89 [2018-02-04 17:51:00,601 INFO L226 Difference]: Without dead ends: 87 [2018-02-04 17:51:00,602 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 73 GetRequests, 57 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=126, Invalid=180, Unknown=0, NotChecked=0, Total=306 [2018-02-04 17:51:00,602 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 87 states. [2018-02-04 17:51:00,603 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 87 to 87. [2018-02-04 17:51:00,603 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 87 states. [2018-02-04 17:51:00,604 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 87 states to 87 states and 92 transitions. [2018-02-04 17:51:00,604 INFO L78 Accepts]: Start accepts. Automaton has 87 states and 92 transitions. Word has length 73 [2018-02-04 17:51:00,604 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 17:51:00,604 INFO L432 AbstractCegarLoop]: Abstraction has 87 states and 92 transitions. [2018-02-04 17:51:00,604 INFO L433 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-02-04 17:51:00,604 INFO L276 IsEmpty]: Start isEmpty. Operand 87 states and 92 transitions. [2018-02-04 17:51:00,605 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2018-02-04 17:51:00,605 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 17:51:00,605 INFO L351 BasicCegarLoop]: trace histogram [14, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 17:51:00,605 INFO L371 AbstractCegarLoop]: === Iteration 31 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-04 17:51:00,605 INFO L82 PathProgramCache]: Analyzing trace with hash 1536937265, now seen corresponding path program 9 times [2018-02-04 17:51:00,605 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 17:51:00,605 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 17:51:00,606 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:51:00,606 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 17:51:00,606 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:51:00,615 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 17:51:00,616 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 17:51:00,632 INFO L430 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-02-04 17:51:00,632 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 17:51:00,632 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 17:51:00,632 INFO L109 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-02-04 17:51:00,641 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 2 check-sat command(s) [2018-02-04 17:51:00,641 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 17:51:00,643 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 17:51:00,645 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-02-04 17:51:00,645 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 17:51:00,652 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 17:51:00,652 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-02-04 17:51:00,684 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-02-04 17:51:00,685 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-02-04 17:51:00,686 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 17:51:00,688 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 17:51:00,692 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 17:51:00,692 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:23, output treesize:16 [2018-02-04 17:51:00,701 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 16 [2018-02-04 17:51:00,703 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:00,704 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:00,704 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 31 [2018-02-04 17:51:00,705 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 17:51:00,709 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 17:51:00,715 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 17:51:00,715 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:29, output treesize:25 [2018-02-04 17:51:00,736 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 23 [2018-02-04 17:51:00,738 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:00,738 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:00,739 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:00,740 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:00,741 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:00,741 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:00,742 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 6 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 78 [2018-02-04 17:51:00,743 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 17:51:00,752 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 17:51:00,758 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 17:51:00,759 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:38, output treesize:34 [2018-02-04 17:51:00,797 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 30 [2018-02-04 17:51:00,799 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:00,800 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:00,801 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:00,801 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:00,802 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:00,803 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:00,803 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:00,804 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:00,805 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:00,806 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:00,806 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:00,807 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:00,808 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 12 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 149 [2018-02-04 17:51:00,808 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 17:51:00,826 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 17:51:00,834 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 17:51:00,834 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:47, output treesize:43 [2018-02-04 17:51:00,852 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 37 [2018-02-04 17:51:00,855 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:00,856 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:00,856 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:00,857 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:00,858 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:00,858 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:00,859 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:00,860 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:00,860 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:00,861 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:00,862 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:00,862 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:00,863 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:00,864 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:00,865 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:00,865 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:00,866 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 16 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 206 [2018-02-04 17:51:00,867 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 17:51:00,891 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 17:51:00,907 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 17:51:00,908 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:56, output treesize:52 [2018-02-04 17:51:00,929 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 57 treesize of output 44 [2018-02-04 17:51:00,932 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:00,932 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:00,933 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:00,934 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:00,934 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:00,935 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:00,936 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:00,936 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:00,937 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:00,938 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:00,938 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:00,939 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:00,940 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:00,940 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:00,941 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:00,942 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:00,943 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:00,943 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:00,944 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:00,945 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:00,946 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:00,946 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 5 select indices, 5 select index equivalence classes, 21 disjoint index pairs (out of 10 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 253 [2018-02-04 17:51:00,947 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 17:51:00,990 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 17:51:01,001 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 17:51:01,001 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:65, output treesize:61 [2018-02-04 17:51:01,028 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 51 [2018-02-04 17:51:01,031 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:01,031 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:01,032 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:01,033 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:01,034 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:01,034 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:01,035 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:01,036 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:01,036 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:01,037 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:01,038 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:01,039 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:01,039 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:01,040 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:01,041 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:01,042 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:01,042 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:01,043 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:01,044 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:01,044 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:01,045 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:01,046 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:01,055 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:01,056 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:01,057 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:01,058 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:01,058 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:01,059 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 6 select indices, 6 select index equivalence classes, 27 disjoint index pairs (out of 15 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 308 [2018-02-04 17:51:01,060 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 17:51:01,114 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 17:51:01,128 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 17:51:01,129 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:74, output treesize:70 [2018-02-04 17:51:01,286 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 57 treesize of output 41 [2018-02-04 17:51:01,288 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:01,288 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:01,289 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:01,289 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:01,290 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:01,290 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:01,291 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 8 select indices, 8 select index equivalence classes, 27 disjoint index pairs (out of 28 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 31 [2018-02-04 17:51:01,291 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 17:51:01,296 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 17:51:01,301 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-02-04 17:51:01,301 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:81, output treesize:25 [2018-02-04 17:51:01,350 INFO L134 CoverageAnalysis]: Checked inductivity of 131 backedges. 6 proven. 4 refuted. 0 times theorem prover too weak. 121 trivial. 0 not checked. [2018-02-04 17:51:01,350 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 17:51:01,350 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18] total 18 [2018-02-04 17:51:01,351 INFO L409 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-02-04 17:51:01,351 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-02-04 17:51:01,351 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=87, Invalid=255, Unknown=0, NotChecked=0, Total=342 [2018-02-04 17:51:01,351 INFO L87 Difference]: Start difference. First operand 87 states and 92 transitions. Second operand 19 states. [2018-02-04 17:51:02,016 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 17:51:02,016 INFO L93 Difference]: Finished difference Result 86 states and 91 transitions. [2018-02-04 17:51:02,016 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-02-04 17:51:02,016 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 74 [2018-02-04 17:51:02,016 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 17:51:02,017 INFO L225 Difference]: With dead ends: 86 [2018-02-04 17:51:02,017 INFO L226 Difference]: Without dead ends: 86 [2018-02-04 17:51:02,017 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 86 GetRequests, 54 SyntacticMatches, 2 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 222 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=228, Invalid=764, Unknown=0, NotChecked=0, Total=992 [2018-02-04 17:51:02,017 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 86 states. [2018-02-04 17:51:02,018 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 86 to 85. [2018-02-04 17:51:02,018 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 85 states. [2018-02-04 17:51:02,019 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 85 states to 85 states and 90 transitions. [2018-02-04 17:51:02,019 INFO L78 Accepts]: Start accepts. Automaton has 85 states and 90 transitions. Word has length 74 [2018-02-04 17:51:02,019 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 17:51:02,019 INFO L432 AbstractCegarLoop]: Abstraction has 85 states and 90 transitions. [2018-02-04 17:51:02,019 INFO L433 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-02-04 17:51:02,019 INFO L276 IsEmpty]: Start isEmpty. Operand 85 states and 90 transitions. [2018-02-04 17:51:02,020 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2018-02-04 17:51:02,020 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 17:51:02,020 INFO L351 BasicCegarLoop]: trace histogram [14, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 17:51:02,020 INFO L371 AbstractCegarLoop]: === Iteration 32 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-04 17:51:02,020 INFO L82 PathProgramCache]: Analyzing trace with hash 1229266112, now seen corresponding path program 3 times [2018-02-04 17:51:02,021 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 17:51:02,021 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 17:51:02,021 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:51:02,021 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 17:51:02,021 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:51:02,033 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 17:51:02,033 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 17:51:02,043 INFO L430 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-02-04 17:51:02,043 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 17:51:02,043 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 17:51:02,044 INFO L109 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-02-04 17:51:02,064 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2018-02-04 17:51:02,064 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 17:51:02,067 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 17:51:02,086 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-02-04 17:51:02,087 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-02-04 17:51:02,088 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 17:51:02,089 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 17:51:02,093 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 17:51:02,093 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:18, output treesize:14 [2018-02-04 17:51:02,105 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 16 [2018-02-04 17:51:02,108 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:02,109 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:02,109 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 31 [2018-02-04 17:51:02,110 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 17:51:02,116 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 17:51:02,122 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 17:51:02,122 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:27, output treesize:23 [2018-02-04 17:51:02,133 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 23 [2018-02-04 17:51:02,135 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:02,135 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:02,136 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:02,137 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:02,138 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:02,139 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:02,139 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 6 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 78 [2018-02-04 17:51:02,139 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 17:51:02,147 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 17:51:02,153 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 17:51:02,153 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:36, output treesize:32 [2018-02-04 17:51:02,165 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 30 [2018-02-04 17:51:02,168 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:02,169 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:02,169 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:02,170 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:02,171 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:02,171 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:02,172 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:02,173 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:02,173 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:02,174 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:02,175 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:02,175 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:02,176 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 12 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 149 [2018-02-04 17:51:02,176 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 17:51:02,191 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 17:51:02,199 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 17:51:02,199 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:45, output treesize:41 [2018-02-04 17:51:02,220 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 37 [2018-02-04 17:51:02,225 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:02,226 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:02,231 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:02,232 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:02,233 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:02,233 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:02,234 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:02,235 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:02,235 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:02,236 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:02,237 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:02,238 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:02,239 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:02,240 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:02,240 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:02,241 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:02,242 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 16 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 206 [2018-02-04 17:51:02,242 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 17:51:02,284 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 17:51:02,292 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 17:51:02,292 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:54, output treesize:50 [2018-02-04 17:51:02,325 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 57 treesize of output 44 [2018-02-04 17:51:02,328 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:02,329 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:02,330 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:02,330 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:02,331 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:02,334 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:02,335 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:02,336 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:02,336 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:02,337 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:02,338 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:02,338 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:02,343 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:02,344 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:02,344 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:02,345 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:02,348 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:02,348 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:02,349 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:02,350 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:02,351 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:02,352 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 5 select indices, 5 select index equivalence classes, 21 disjoint index pairs (out of 10 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 253 [2018-02-04 17:51:02,352 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 17:51:02,382 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 17:51:02,392 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 17:51:02,392 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:63, output treesize:59 [2018-02-04 17:51:02,429 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 51 [2018-02-04 17:51:02,432 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:02,433 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:02,434 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:02,435 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:02,451 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:02,452 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:02,453 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:02,454 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:02,455 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:02,455 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:02,456 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:02,457 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:02,458 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:02,458 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:02,459 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:02,460 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:02,461 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:02,461 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:02,462 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:02,463 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:02,463 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:02,464 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:02,465 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:02,466 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:02,466 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:02,467 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:02,468 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 17:51:02,471 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 6 select indices, 6 select index equivalence classes, 27 disjoint index pairs (out of 15 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 308 [2018-02-04 17:51:02,472 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 17:51:02,510 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 17:51:02,519 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 17:51:02,519 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:72, output treesize:68 [2018-02-04 17:51:02,822 INFO L134 CoverageAnalysis]: Checked inductivity of 129 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 117 trivial. 0 not checked. [2018-02-04 17:51:02,822 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 17:51:02,822 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17] total 17 [2018-02-04 17:51:02,823 INFO L409 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-02-04 17:51:02,823 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-02-04 17:51:02,823 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=68, Invalid=204, Unknown=0, NotChecked=0, Total=272 [2018-02-04 17:51:02,823 INFO L87 Difference]: Start difference. First operand 85 states and 90 transitions. Second operand 17 states. [2018-02-04 17:51:03,714 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 17:51:03,714 INFO L93 Difference]: Finished difference Result 97 states and 102 transitions. [2018-02-04 17:51:03,714 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-02-04 17:51:03,714 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 80 [2018-02-04 17:51:03,715 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 17:51:03,715 INFO L225 Difference]: With dead ends: 97 [2018-02-04 17:51:03,715 INFO L226 Difference]: Without dead ends: 94 [2018-02-04 17:51:03,715 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 92 GetRequests, 62 SyntacticMatches, 2 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 198 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=190, Invalid=680, Unknown=0, NotChecked=0, Total=870 [2018-02-04 17:51:03,716 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 94 states. [2018-02-04 17:51:03,717 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 94 to 91. [2018-02-04 17:51:03,717 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 91 states. [2018-02-04 17:51:03,718 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 91 states to 91 states and 96 transitions. [2018-02-04 17:51:03,718 INFO L78 Accepts]: Start accepts. Automaton has 91 states and 96 transitions. Word has length 80 [2018-02-04 17:51:03,718 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 17:51:03,718 INFO L432 AbstractCegarLoop]: Abstraction has 91 states and 96 transitions. [2018-02-04 17:51:03,718 INFO L433 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-02-04 17:51:03,718 INFO L276 IsEmpty]: Start isEmpty. Operand 91 states and 96 transitions. [2018-02-04 17:51:03,719 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 87 [2018-02-04 17:51:03,719 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 17:51:03,719 INFO L351 BasicCegarLoop]: trace histogram [14, 4, 4, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 17:51:03,719 INFO L371 AbstractCegarLoop]: === Iteration 33 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-04 17:51:03,719 INFO L82 PathProgramCache]: Analyzing trace with hash -210067132, now seen corresponding path program 4 times [2018-02-04 17:51:03,719 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 17:51:03,719 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 17:51:03,720 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:51:03,720 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 17:51:03,720 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:51:03,731 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 17:51:03,731 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 17:51:03,915 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 39 trivial. 0 not checked. [2018-02-04 17:51:03,915 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 17:51:03,915 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 17:51:03,916 INFO L109 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-02-04 17:51:03,932 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-02-04 17:51:03,932 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 17:51:03,935 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 17:51:04,168 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 10 proven. 29 refuted. 0 times theorem prover too weak. 105 trivial. 0 not checked. [2018-02-04 17:51:04,169 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 17:51:04,169 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 14] total 30 [2018-02-04 17:51:04,169 INFO L409 AbstractCegarLoop]: Interpolant automaton has 30 states [2018-02-04 17:51:04,169 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2018-02-04 17:51:04,170 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=189, Invalid=681, Unknown=0, NotChecked=0, Total=870 [2018-02-04 17:51:04,170 INFO L87 Difference]: Start difference. First operand 91 states and 96 transitions. Second operand 30 states. [2018-02-04 17:51:04,504 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 17:51:04,504 INFO L93 Difference]: Finished difference Result 136 states and 143 transitions. [2018-02-04 17:51:04,504 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2018-02-04 17:51:04,505 INFO L78 Accepts]: Start accepts. Automaton has 30 states. Word has length 86 [2018-02-04 17:51:04,505 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 17:51:04,505 INFO L225 Difference]: With dead ends: 136 [2018-02-04 17:51:04,505 INFO L226 Difference]: Without dead ends: 101 [2018-02-04 17:51:04,505 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 110 GetRequests, 75 SyntacticMatches, 0 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 277 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=236, Invalid=1096, Unknown=0, NotChecked=0, Total=1332 [2018-02-04 17:51:04,505 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 101 states. [2018-02-04 17:51:04,506 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 101 to 98. [2018-02-04 17:51:04,507 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 98 states. [2018-02-04 17:51:04,507 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 98 states to 98 states and 103 transitions. [2018-02-04 17:51:04,507 INFO L78 Accepts]: Start accepts. Automaton has 98 states and 103 transitions. Word has length 86 [2018-02-04 17:51:04,507 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 17:51:04,507 INFO L432 AbstractCegarLoop]: Abstraction has 98 states and 103 transitions. [2018-02-04 17:51:04,507 INFO L433 AbstractCegarLoop]: Interpolant automaton has 30 states. [2018-02-04 17:51:04,507 INFO L276 IsEmpty]: Start isEmpty. Operand 98 states and 103 transitions. [2018-02-04 17:51:04,507 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2018-02-04 17:51:04,507 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 17:51:04,508 INFO L351 BasicCegarLoop]: trace histogram [15, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 17:51:04,508 INFO L371 AbstractCegarLoop]: === Iteration 34 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-04 17:51:04,508 INFO L82 PathProgramCache]: Analyzing trace with hash 907572819, now seen corresponding path program 5 times [2018-02-04 17:51:04,508 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 17:51:04,508 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 17:51:04,508 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:51:04,508 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 17:51:04,508 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:51:04,520 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 17:51:04,521 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 17:51:04,714 INFO L134 CoverageAnalysis]: Checked inductivity of 174 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:51:04,714 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 17:51:04,714 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 17:51:04,715 INFO L109 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-02-04 17:51:04,740 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 9 check-sat command(s) [2018-02-04 17:51:04,740 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 17:51:04,744 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 17:51:04,903 INFO L134 CoverageAnalysis]: Checked inductivity of 174 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:51:04,903 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 17:51:04,904 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19] total 36 [2018-02-04 17:51:04,904 INFO L409 AbstractCegarLoop]: Interpolant automaton has 36 states [2018-02-04 17:51:04,904 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2018-02-04 17:51:04,904 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=491, Invalid=769, Unknown=0, NotChecked=0, Total=1260 [2018-02-04 17:51:04,905 INFO L87 Difference]: Start difference. First operand 98 states and 103 transitions. Second operand 36 states. [2018-02-04 17:51:04,944 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 17:51:04,944 INFO L93 Difference]: Finished difference Result 101 states and 106 transitions. [2018-02-04 17:51:04,947 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-02-04 17:51:04,947 INFO L78 Accepts]: Start accepts. Automaton has 36 states. Word has length 93 [2018-02-04 17:51:04,947 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 17:51:04,947 INFO L225 Difference]: With dead ends: 101 [2018-02-04 17:51:04,947 INFO L226 Difference]: Without dead ends: 99 [2018-02-04 17:51:04,948 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 112 GetRequests, 77 SyntacticMatches, 0 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 550 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=511, Invalid=821, Unknown=0, NotChecked=0, Total=1332 [2018-02-04 17:51:04,948 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 99 states. [2018-02-04 17:51:04,949 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 99 to 99. [2018-02-04 17:51:04,950 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 99 states. [2018-02-04 17:51:04,950 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 99 states to 99 states and 104 transitions. [2018-02-04 17:51:04,950 INFO L78 Accepts]: Start accepts. Automaton has 99 states and 104 transitions. Word has length 93 [2018-02-04 17:51:04,950 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 17:51:04,950 INFO L432 AbstractCegarLoop]: Abstraction has 99 states and 104 transitions. [2018-02-04 17:51:04,950 INFO L433 AbstractCegarLoop]: Interpolant automaton has 36 states. [2018-02-04 17:51:04,951 INFO L276 IsEmpty]: Start isEmpty. Operand 99 states and 104 transitions. [2018-02-04 17:51:04,951 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2018-02-04 17:51:04,951 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 17:51:04,951 INFO L351 BasicCegarLoop]: trace histogram [16, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 17:51:04,951 INFO L371 AbstractCegarLoop]: === Iteration 35 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-04 17:51:04,951 INFO L82 PathProgramCache]: Analyzing trace with hash -397311008, now seen corresponding path program 6 times [2018-02-04 17:51:04,952 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 17:51:04,952 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 17:51:04,952 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:51:04,952 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 17:51:04,952 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:51:04,964 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 17:51:04,965 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 17:51:05,157 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:51:05,157 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 17:51:05,157 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 17:51:05,158 INFO L109 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-02-04 17:51:05,190 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 9 check-sat command(s) [2018-02-04 17:51:05,190 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 17:51:05,193 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 17:51:05,384 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:51:05,384 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 17:51:05,384 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 20] total 38 [2018-02-04 17:51:05,385 INFO L409 AbstractCegarLoop]: Interpolant automaton has 38 states [2018-02-04 17:51:05,385 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2018-02-04 17:51:05,385 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=547, Invalid=859, Unknown=0, NotChecked=0, Total=1406 [2018-02-04 17:51:05,386 INFO L87 Difference]: Start difference. First operand 99 states and 104 transitions. Second operand 38 states. [2018-02-04 17:51:05,448 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 17:51:05,448 INFO L93 Difference]: Finished difference Result 102 states and 107 transitions. [2018-02-04 17:51:05,449 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-02-04 17:51:05,449 INFO L78 Accepts]: Start accepts. Automaton has 38 states. Word has length 94 [2018-02-04 17:51:05,449 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 17:51:05,449 INFO L225 Difference]: With dead ends: 102 [2018-02-04 17:51:05,449 INFO L226 Difference]: Without dead ends: 100 [2018-02-04 17:51:05,450 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 114 GetRequests, 77 SyntacticMatches, 0 SemanticMatches, 37 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 619 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=568, Invalid=914, Unknown=0, NotChecked=0, Total=1482 [2018-02-04 17:51:05,450 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 100 states. [2018-02-04 17:51:05,451 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 100 to 100. [2018-02-04 17:51:05,451 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 100 states. [2018-02-04 17:51:05,452 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 100 states to 100 states and 105 transitions. [2018-02-04 17:51:05,452 INFO L78 Accepts]: Start accepts. Automaton has 100 states and 105 transitions. Word has length 94 [2018-02-04 17:51:05,452 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 17:51:05,452 INFO L432 AbstractCegarLoop]: Abstraction has 100 states and 105 transitions. [2018-02-04 17:51:05,452 INFO L433 AbstractCegarLoop]: Interpolant automaton has 38 states. [2018-02-04 17:51:05,452 INFO L276 IsEmpty]: Start isEmpty. Operand 100 states and 105 transitions. [2018-02-04 17:51:05,453 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2018-02-04 17:51:05,453 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 17:51:05,453 INFO L351 BasicCegarLoop]: trace histogram [17, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 17:51:05,453 INFO L371 AbstractCegarLoop]: === Iteration 36 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-04 17:51:05,453 INFO L82 PathProgramCache]: Analyzing trace with hash 2100963315, now seen corresponding path program 7 times [2018-02-04 17:51:05,453 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 17:51:05,453 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 17:51:05,454 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:51:05,454 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 17:51:05,454 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:51:05,465 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 17:51:05,465 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 17:51:05,677 INFO L134 CoverageAnalysis]: Checked inductivity of 207 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:51:05,678 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 17:51:05,678 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 17:51:05,678 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 17:51:05,690 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 17:51:05,693 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 17:51:05,869 INFO L134 CoverageAnalysis]: Checked inductivity of 207 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:51:05,870 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 17:51:05,870 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 21] total 40 [2018-02-04 17:51:05,870 INFO L409 AbstractCegarLoop]: Interpolant automaton has 40 states [2018-02-04 17:51:05,871 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 40 interpolants. [2018-02-04 17:51:05,871 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=606, Invalid=954, Unknown=0, NotChecked=0, Total=1560 [2018-02-04 17:51:05,871 INFO L87 Difference]: Start difference. First operand 100 states and 105 transitions. Second operand 40 states. [2018-02-04 17:51:05,926 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 17:51:05,926 INFO L93 Difference]: Finished difference Result 103 states and 108 transitions. [2018-02-04 17:51:05,926 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-02-04 17:51:05,926 INFO L78 Accepts]: Start accepts. Automaton has 40 states. Word has length 95 [2018-02-04 17:51:05,927 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 17:51:05,927 INFO L225 Difference]: With dead ends: 103 [2018-02-04 17:51:05,927 INFO L226 Difference]: Without dead ends: 101 [2018-02-04 17:51:05,927 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 116 GetRequests, 77 SyntacticMatches, 0 SemanticMatches, 39 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 692 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=628, Invalid=1012, Unknown=0, NotChecked=0, Total=1640 [2018-02-04 17:51:05,927 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 101 states. [2018-02-04 17:51:05,928 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 101 to 101. [2018-02-04 17:51:05,928 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 101 states. [2018-02-04 17:51:05,929 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 101 states to 101 states and 106 transitions. [2018-02-04 17:51:05,929 INFO L78 Accepts]: Start accepts. Automaton has 101 states and 106 transitions. Word has length 95 [2018-02-04 17:51:05,929 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 17:51:05,929 INFO L432 AbstractCegarLoop]: Abstraction has 101 states and 106 transitions. [2018-02-04 17:51:05,929 INFO L433 AbstractCegarLoop]: Interpolant automaton has 40 states. [2018-02-04 17:51:05,929 INFO L276 IsEmpty]: Start isEmpty. Operand 101 states and 106 transitions. [2018-02-04 17:51:05,929 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2018-02-04 17:51:05,929 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 17:51:05,929 INFO L351 BasicCegarLoop]: trace histogram [18, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 17:51:05,929 INFO L371 AbstractCegarLoop]: === Iteration 37 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-04 17:51:05,930 INFO L82 PathProgramCache]: Analyzing trace with hash -2056911296, now seen corresponding path program 8 times [2018-02-04 17:51:05,930 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 17:51:05,930 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 17:51:05,930 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:51:05,930 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 17:51:05,930 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:51:05,943 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 17:51:05,944 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 17:51:06,193 INFO L134 CoverageAnalysis]: Checked inductivity of 225 backedges. 0 proven. 171 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:51:06,194 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 17:51:06,194 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 17:51:06,194 INFO L109 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-02-04 17:51:06,214 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-02-04 17:51:06,215 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 17:51:06,218 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 17:51:06,430 INFO L134 CoverageAnalysis]: Checked inductivity of 225 backedges. 0 proven. 171 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:51:06,431 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 17:51:06,431 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 22] total 42 [2018-02-04 17:51:06,431 INFO L409 AbstractCegarLoop]: Interpolant automaton has 42 states [2018-02-04 17:51:06,431 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 42 interpolants. [2018-02-04 17:51:06,432 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=668, Invalid=1054, Unknown=0, NotChecked=0, Total=1722 [2018-02-04 17:51:06,432 INFO L87 Difference]: Start difference. First operand 101 states and 106 transitions. Second operand 42 states. [2018-02-04 17:51:06,506 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 17:51:06,507 INFO L93 Difference]: Finished difference Result 104 states and 109 transitions. [2018-02-04 17:51:06,507 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-02-04 17:51:06,507 INFO L78 Accepts]: Start accepts. Automaton has 42 states. Word has length 96 [2018-02-04 17:51:06,507 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 17:51:06,507 INFO L225 Difference]: With dead ends: 104 [2018-02-04 17:51:06,507 INFO L226 Difference]: Without dead ends: 102 [2018-02-04 17:51:06,508 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 118 GetRequests, 77 SyntacticMatches, 0 SemanticMatches, 41 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 769 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=691, Invalid=1115, Unknown=0, NotChecked=0, Total=1806 [2018-02-04 17:51:06,508 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 102 states. [2018-02-04 17:51:06,509 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 102 to 102. [2018-02-04 17:51:06,510 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 102 states. [2018-02-04 17:51:06,510 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 102 states to 102 states and 107 transitions. [2018-02-04 17:51:06,510 INFO L78 Accepts]: Start accepts. Automaton has 102 states and 107 transitions. Word has length 96 [2018-02-04 17:51:06,510 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 17:51:06,510 INFO L432 AbstractCegarLoop]: Abstraction has 102 states and 107 transitions. [2018-02-04 17:51:06,510 INFO L433 AbstractCegarLoop]: Interpolant automaton has 42 states. [2018-02-04 17:51:06,510 INFO L276 IsEmpty]: Start isEmpty. Operand 102 states and 107 transitions. [2018-02-04 17:51:06,511 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 98 [2018-02-04 17:51:06,511 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 17:51:06,511 INFO L351 BasicCegarLoop]: trace histogram [19, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 17:51:06,511 INFO L371 AbstractCegarLoop]: === Iteration 38 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-04 17:51:06,511 INFO L82 PathProgramCache]: Analyzing trace with hash -2102005357, now seen corresponding path program 9 times [2018-02-04 17:51:06,511 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 17:51:06,511 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 17:51:06,512 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:51:06,512 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 17:51:06,512 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:51:06,523 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 17:51:06,524 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 17:51:06,756 INFO L134 CoverageAnalysis]: Checked inductivity of 244 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:51:06,757 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 17:51:06,757 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 17:51:06,757 INFO L109 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-02-04 17:51:06,779 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) [2018-02-04 17:51:06,779 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 17:51:06,783 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 17:51:06,979 INFO L134 CoverageAnalysis]: Checked inductivity of 244 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:51:06,980 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 17:51:06,980 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 23] total 44 [2018-02-04 17:51:06,980 INFO L409 AbstractCegarLoop]: Interpolant automaton has 44 states [2018-02-04 17:51:06,980 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 44 interpolants. [2018-02-04 17:51:06,981 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=733, Invalid=1159, Unknown=0, NotChecked=0, Total=1892 [2018-02-04 17:51:06,981 INFO L87 Difference]: Start difference. First operand 102 states and 107 transitions. Second operand 44 states. [2018-02-04 17:51:07,023 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 17:51:07,023 INFO L93 Difference]: Finished difference Result 105 states and 110 transitions. [2018-02-04 17:51:07,023 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-02-04 17:51:07,023 INFO L78 Accepts]: Start accepts. Automaton has 44 states. Word has length 97 [2018-02-04 17:51:07,023 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 17:51:07,024 INFO L225 Difference]: With dead ends: 105 [2018-02-04 17:51:07,024 INFO L226 Difference]: Without dead ends: 103 [2018-02-04 17:51:07,024 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 120 GetRequests, 77 SyntacticMatches, 0 SemanticMatches, 43 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 850 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=757, Invalid=1223, Unknown=0, NotChecked=0, Total=1980 [2018-02-04 17:51:07,025 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 103 states. [2018-02-04 17:51:07,026 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 103 to 103. [2018-02-04 17:51:07,026 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 103 states. [2018-02-04 17:51:07,027 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 103 states to 103 states and 108 transitions. [2018-02-04 17:51:07,027 INFO L78 Accepts]: Start accepts. Automaton has 103 states and 108 transitions. Word has length 97 [2018-02-04 17:51:07,027 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 17:51:07,027 INFO L432 AbstractCegarLoop]: Abstraction has 103 states and 108 transitions. [2018-02-04 17:51:07,027 INFO L433 AbstractCegarLoop]: Interpolant automaton has 44 states. [2018-02-04 17:51:07,027 INFO L276 IsEmpty]: Start isEmpty. Operand 103 states and 108 transitions. [2018-02-04 17:51:07,028 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 99 [2018-02-04 17:51:07,028 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 17:51:07,028 INFO L351 BasicCegarLoop]: trace histogram [20, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 17:51:07,028 INFO L371 AbstractCegarLoop]: === Iteration 39 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-04 17:51:07,028 INFO L82 PathProgramCache]: Analyzing trace with hash 795046048, now seen corresponding path program 10 times [2018-02-04 17:51:07,028 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 17:51:07,028 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 17:51:07,029 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:51:07,029 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 17:51:07,029 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:51:07,042 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 17:51:07,043 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 17:51:07,297 INFO L134 CoverageAnalysis]: Checked inductivity of 264 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:51:07,298 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 17:51:07,298 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 17:51:07,298 INFO L109 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-02-04 17:51:07,315 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-02-04 17:51:07,316 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 17:51:07,319 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 17:51:07,553 INFO L134 CoverageAnalysis]: Checked inductivity of 264 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:51:07,553 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 17:51:07,553 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 24] total 46 [2018-02-04 17:51:07,553 INFO L409 AbstractCegarLoop]: Interpolant automaton has 46 states [2018-02-04 17:51:07,554 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 46 interpolants. [2018-02-04 17:51:07,554 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=801, Invalid=1269, Unknown=0, NotChecked=0, Total=2070 [2018-02-04 17:51:07,554 INFO L87 Difference]: Start difference. First operand 103 states and 108 transitions. Second operand 46 states. [2018-02-04 17:51:07,605 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 17:51:07,605 INFO L93 Difference]: Finished difference Result 106 states and 111 transitions. [2018-02-04 17:51:07,605 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-02-04 17:51:07,605 INFO L78 Accepts]: Start accepts. Automaton has 46 states. Word has length 98 [2018-02-04 17:51:07,606 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 17:51:07,606 INFO L225 Difference]: With dead ends: 106 [2018-02-04 17:51:07,606 INFO L226 Difference]: Without dead ends: 104 [2018-02-04 17:51:07,606 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 122 GetRequests, 77 SyntacticMatches, 0 SemanticMatches, 45 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 935 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=826, Invalid=1336, Unknown=0, NotChecked=0, Total=2162 [2018-02-04 17:51:07,607 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 104 states. [2018-02-04 17:51:07,608 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 104 to 104. [2018-02-04 17:51:07,608 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 104 states. [2018-02-04 17:51:07,608 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 104 states to 104 states and 109 transitions. [2018-02-04 17:51:07,608 INFO L78 Accepts]: Start accepts. Automaton has 104 states and 109 transitions. Word has length 98 [2018-02-04 17:51:07,608 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 17:51:07,608 INFO L432 AbstractCegarLoop]: Abstraction has 104 states and 109 transitions. [2018-02-04 17:51:07,608 INFO L433 AbstractCegarLoop]: Interpolant automaton has 46 states. [2018-02-04 17:51:07,608 INFO L276 IsEmpty]: Start isEmpty. Operand 104 states and 109 transitions. [2018-02-04 17:51:07,609 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 100 [2018-02-04 17:51:07,609 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 17:51:07,609 INFO L351 BasicCegarLoop]: trace histogram [21, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 17:51:07,609 INFO L371 AbstractCegarLoop]: === Iteration 40 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-04 17:51:07,609 INFO L82 PathProgramCache]: Analyzing trace with hash 409326387, now seen corresponding path program 11 times [2018-02-04 17:51:07,609 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 17:51:07,609 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 17:51:07,609 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:51:07,609 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 17:51:07,610 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:51:07,617 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 17:51:07,617 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 17:51:07,896 INFO L134 CoverageAnalysis]: Checked inductivity of 285 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:51:07,896 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 17:51:07,896 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 17:51:07,897 INFO L109 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-02-04 17:51:07,912 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 12 check-sat command(s) [2018-02-04 17:51:07,912 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 17:51:07,914 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 17:51:08,071 INFO L134 CoverageAnalysis]: Checked inductivity of 285 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:51:08,071 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 17:51:08,071 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 25] total 48 [2018-02-04 17:51:08,072 INFO L409 AbstractCegarLoop]: Interpolant automaton has 48 states [2018-02-04 17:51:08,072 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 48 interpolants. [2018-02-04 17:51:08,072 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=872, Invalid=1384, Unknown=0, NotChecked=0, Total=2256 [2018-02-04 17:51:08,072 INFO L87 Difference]: Start difference. First operand 104 states and 109 transitions. Second operand 48 states. [2018-02-04 17:51:08,107 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 17:51:08,108 INFO L93 Difference]: Finished difference Result 107 states and 112 transitions. [2018-02-04 17:51:08,119 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-02-04 17:51:08,119 INFO L78 Accepts]: Start accepts. Automaton has 48 states. Word has length 99 [2018-02-04 17:51:08,119 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 17:51:08,119 INFO L225 Difference]: With dead ends: 107 [2018-02-04 17:51:08,119 INFO L226 Difference]: Without dead ends: 105 [2018-02-04 17:51:08,120 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 124 GetRequests, 77 SyntacticMatches, 0 SemanticMatches, 47 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1024 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=898, Invalid=1454, Unknown=0, NotChecked=0, Total=2352 [2018-02-04 17:51:08,120 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 105 states. [2018-02-04 17:51:08,121 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 105 to 105. [2018-02-04 17:51:08,121 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 105 states. [2018-02-04 17:51:08,122 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 105 states to 105 states and 110 transitions. [2018-02-04 17:51:08,122 INFO L78 Accepts]: Start accepts. Automaton has 105 states and 110 transitions. Word has length 99 [2018-02-04 17:51:08,122 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 17:51:08,122 INFO L432 AbstractCegarLoop]: Abstraction has 105 states and 110 transitions. [2018-02-04 17:51:08,122 INFO L433 AbstractCegarLoop]: Interpolant automaton has 48 states. [2018-02-04 17:51:08,122 INFO L276 IsEmpty]: Start isEmpty. Operand 105 states and 110 transitions. [2018-02-04 17:51:08,122 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 101 [2018-02-04 17:51:08,122 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 17:51:08,122 INFO L351 BasicCegarLoop]: trace histogram [22, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 17:51:08,122 INFO L371 AbstractCegarLoop]: === Iteration 41 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-04 17:51:08,123 INFO L82 PathProgramCache]: Analyzing trace with hash 1336918784, now seen corresponding path program 12 times [2018-02-04 17:51:08,123 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 17:51:08,123 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 17:51:08,123 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:51:08,123 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 17:51:08,123 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:51:08,131 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 17:51:08,131 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 17:51:08,388 INFO L134 CoverageAnalysis]: Checked inductivity of 307 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:51:08,388 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 17:51:08,388 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 17:51:08,389 INFO L109 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-02-04 17:51:08,424 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 12 check-sat command(s) [2018-02-04 17:51:08,424 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 17:51:08,429 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 17:51:08,621 INFO L134 CoverageAnalysis]: Checked inductivity of 307 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:51:08,621 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 17:51:08,622 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [26, 26] total 50 [2018-02-04 17:51:08,622 INFO L409 AbstractCegarLoop]: Interpolant automaton has 50 states [2018-02-04 17:51:08,622 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 50 interpolants. [2018-02-04 17:51:08,622 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=925, Invalid=1525, Unknown=0, NotChecked=0, Total=2450 [2018-02-04 17:51:08,623 INFO L87 Difference]: Start difference. First operand 105 states and 110 transitions. Second operand 50 states. [2018-02-04 17:51:08,681 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 17:51:08,681 INFO L93 Difference]: Finished difference Result 108 states and 113 transitions. [2018-02-04 17:51:08,682 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2018-02-04 17:51:08,682 INFO L78 Accepts]: Start accepts. Automaton has 50 states. Word has length 100 [2018-02-04 17:51:08,682 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 17:51:08,682 INFO L225 Difference]: With dead ends: 108 [2018-02-04 17:51:08,682 INFO L226 Difference]: Without dead ends: 106 [2018-02-04 17:51:08,683 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 127 GetRequests, 77 SyntacticMatches, 0 SemanticMatches, 50 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1145 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=1001, Invalid=1651, Unknown=0, NotChecked=0, Total=2652 [2018-02-04 17:51:08,683 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 106 states. [2018-02-04 17:51:08,685 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 106 to 106. [2018-02-04 17:51:08,685 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 106 states. [2018-02-04 17:51:08,685 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 106 states to 106 states and 111 transitions. [2018-02-04 17:51:08,685 INFO L78 Accepts]: Start accepts. Automaton has 106 states and 111 transitions. Word has length 100 [2018-02-04 17:51:08,685 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 17:51:08,685 INFO L432 AbstractCegarLoop]: Abstraction has 106 states and 111 transitions. [2018-02-04 17:51:08,685 INFO L433 AbstractCegarLoop]: Interpolant automaton has 50 states. [2018-02-04 17:51:08,685 INFO L276 IsEmpty]: Start isEmpty. Operand 106 states and 111 transitions. [2018-02-04 17:51:08,686 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 102 [2018-02-04 17:51:08,686 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 17:51:08,686 INFO L351 BasicCegarLoop]: trace histogram [23, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 17:51:08,686 INFO L371 AbstractCegarLoop]: === Iteration 42 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-04 17:51:08,686 INFO L82 PathProgramCache]: Analyzing trace with hash 27512019, now seen corresponding path program 13 times [2018-02-04 17:51:08,686 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 17:51:08,686 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 17:51:08,686 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:51:08,687 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 17:51:08,687 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:51:08,697 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 17:51:08,698 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 17:51:09,003 INFO L134 CoverageAnalysis]: Checked inductivity of 330 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:51:09,004 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 17:51:09,004 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 17:51:09,004 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 17:51:09,012 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 17:51:09,014 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 17:51:09,181 INFO L134 CoverageAnalysis]: Checked inductivity of 330 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:51:09,181 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 17:51:09,181 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [27, 27] total 52 [2018-02-04 17:51:09,182 INFO L409 AbstractCegarLoop]: Interpolant automaton has 52 states [2018-02-04 17:51:09,182 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 52 interpolants. [2018-02-04 17:51:09,182 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1001, Invalid=1651, Unknown=0, NotChecked=0, Total=2652 [2018-02-04 17:51:09,182 INFO L87 Difference]: Start difference. First operand 106 states and 111 transitions. Second operand 52 states. [2018-02-04 17:51:09,242 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 17:51:09,242 INFO L93 Difference]: Finished difference Result 109 states and 114 transitions. [2018-02-04 17:51:09,242 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2018-02-04 17:51:09,242 INFO L78 Accepts]: Start accepts. Automaton has 52 states. Word has length 101 [2018-02-04 17:51:09,242 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 17:51:09,243 INFO L225 Difference]: With dead ends: 109 [2018-02-04 17:51:09,243 INFO L226 Difference]: Without dead ends: 107 [2018-02-04 17:51:09,243 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 129 GetRequests, 77 SyntacticMatches, 0 SemanticMatches, 52 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1243 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=1080, Invalid=1782, Unknown=0, NotChecked=0, Total=2862 [2018-02-04 17:51:09,243 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 107 states. [2018-02-04 17:51:09,244 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 107 to 107. [2018-02-04 17:51:09,244 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 107 states. [2018-02-04 17:51:09,244 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 107 states to 107 states and 112 transitions. [2018-02-04 17:51:09,245 INFO L78 Accepts]: Start accepts. Automaton has 107 states and 112 transitions. Word has length 101 [2018-02-04 17:51:09,245 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 17:51:09,245 INFO L432 AbstractCegarLoop]: Abstraction has 107 states and 112 transitions. [2018-02-04 17:51:09,245 INFO L433 AbstractCegarLoop]: Interpolant automaton has 52 states. [2018-02-04 17:51:09,245 INFO L276 IsEmpty]: Start isEmpty. Operand 107 states and 112 transitions. [2018-02-04 17:51:09,245 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 103 [2018-02-04 17:51:09,245 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 17:51:09,245 INFO L351 BasicCegarLoop]: trace histogram [24, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 17:51:09,245 INFO L371 AbstractCegarLoop]: === Iteration 43 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-04 17:51:09,245 INFO L82 PathProgramCache]: Analyzing trace with hash -1909392032, now seen corresponding path program 14 times [2018-02-04 17:51:09,245 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 17:51:09,245 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 17:51:09,246 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:51:09,246 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 17:51:09,246 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:51:09,254 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 17:51:09,255 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 17:51:09,592 INFO L134 CoverageAnalysis]: Checked inductivity of 354 backedges. 0 proven. 300 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:51:09,593 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 17:51:09,593 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 17:51:09,593 INFO L109 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-02-04 17:51:09,606 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-02-04 17:51:09,606 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 17:51:09,609 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 17:51:09,832 INFO L134 CoverageAnalysis]: Checked inductivity of 354 backedges. 0 proven. 300 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:51:09,832 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 17:51:09,832 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [28, 28] total 54 [2018-02-04 17:51:09,833 INFO L409 AbstractCegarLoop]: Interpolant automaton has 54 states [2018-02-04 17:51:09,833 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 54 interpolants. [2018-02-04 17:51:09,834 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1080, Invalid=1782, Unknown=0, NotChecked=0, Total=2862 [2018-02-04 17:51:09,834 INFO L87 Difference]: Start difference. First operand 107 states and 112 transitions. Second operand 54 states. [2018-02-04 17:51:09,904 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 17:51:09,904 INFO L93 Difference]: Finished difference Result 110 states and 115 transitions. [2018-02-04 17:51:09,911 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2018-02-04 17:51:09,911 INFO L78 Accepts]: Start accepts. Automaton has 54 states. Word has length 102 [2018-02-04 17:51:09,911 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 17:51:09,911 INFO L225 Difference]: With dead ends: 110 [2018-02-04 17:51:09,912 INFO L226 Difference]: Without dead ends: 108 [2018-02-04 17:51:09,913 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 131 GetRequests, 77 SyntacticMatches, 0 SemanticMatches, 54 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1345 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=1162, Invalid=1918, Unknown=0, NotChecked=0, Total=3080 [2018-02-04 17:51:09,913 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 108 states. [2018-02-04 17:51:09,914 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 108 to 108. [2018-02-04 17:51:09,915 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 108 states. [2018-02-04 17:51:09,915 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 108 states to 108 states and 113 transitions. [2018-02-04 17:51:09,915 INFO L78 Accepts]: Start accepts. Automaton has 108 states and 113 transitions. Word has length 102 [2018-02-04 17:51:09,915 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 17:51:09,915 INFO L432 AbstractCegarLoop]: Abstraction has 108 states and 113 transitions. [2018-02-04 17:51:09,915 INFO L433 AbstractCegarLoop]: Interpolant automaton has 54 states. [2018-02-04 17:51:09,916 INFO L276 IsEmpty]: Start isEmpty. Operand 108 states and 113 transitions. [2018-02-04 17:51:09,916 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 104 [2018-02-04 17:51:09,916 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 17:51:09,916 INFO L351 BasicCegarLoop]: trace histogram [25, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 17:51:09,916 INFO L371 AbstractCegarLoop]: === Iteration 44 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-04 17:51:09,916 INFO L82 PathProgramCache]: Analyzing trace with hash -1823875469, now seen corresponding path program 15 times [2018-02-04 17:51:09,917 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 17:51:09,917 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 17:51:09,917 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:51:09,917 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 17:51:09,917 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:51:09,931 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 17:51:09,932 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 17:51:10,279 INFO L134 CoverageAnalysis]: Checked inductivity of 379 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:51:10,280 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 17:51:10,280 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 17:51:10,280 INFO L109 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-02-04 17:51:10,311 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 14 check-sat command(s) [2018-02-04 17:51:10,311 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 17:51:10,316 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 17:51:10,617 INFO L134 CoverageAnalysis]: Checked inductivity of 379 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:51:10,618 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 17:51:10,618 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [29, 29] total 56 [2018-02-04 17:51:10,618 INFO L409 AbstractCegarLoop]: Interpolant automaton has 56 states [2018-02-04 17:51:10,619 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 56 interpolants. [2018-02-04 17:51:10,619 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1162, Invalid=1918, Unknown=0, NotChecked=0, Total=3080 [2018-02-04 17:51:10,619 INFO L87 Difference]: Start difference. First operand 108 states and 113 transitions. Second operand 56 states. [2018-02-04 17:51:10,722 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 17:51:10,723 INFO L93 Difference]: Finished difference Result 111 states and 116 transitions. [2018-02-04 17:51:10,723 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2018-02-04 17:51:10,723 INFO L78 Accepts]: Start accepts. Automaton has 56 states. Word has length 103 [2018-02-04 17:51:10,723 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 17:51:10,724 INFO L225 Difference]: With dead ends: 111 [2018-02-04 17:51:10,724 INFO L226 Difference]: Without dead ends: 109 [2018-02-04 17:51:10,725 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 133 GetRequests, 77 SyntacticMatches, 0 SemanticMatches, 56 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1451 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=1247, Invalid=2059, Unknown=0, NotChecked=0, Total=3306 [2018-02-04 17:51:10,725 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 109 states. [2018-02-04 17:51:10,726 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 109 to 109. [2018-02-04 17:51:10,727 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 109 states. [2018-02-04 17:51:10,727 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 109 states to 109 states and 114 transitions. [2018-02-04 17:51:10,727 INFO L78 Accepts]: Start accepts. Automaton has 109 states and 114 transitions. Word has length 103 [2018-02-04 17:51:10,727 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 17:51:10,727 INFO L432 AbstractCegarLoop]: Abstraction has 109 states and 114 transitions. [2018-02-04 17:51:10,727 INFO L433 AbstractCegarLoop]: Interpolant automaton has 56 states. [2018-02-04 17:51:10,727 INFO L276 IsEmpty]: Start isEmpty. Operand 109 states and 114 transitions. [2018-02-04 17:51:10,728 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 105 [2018-02-04 17:51:10,728 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 17:51:10,728 INFO L351 BasicCegarLoop]: trace histogram [26, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 17:51:10,728 INFO L371 AbstractCegarLoop]: === Iteration 45 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-04 17:51:10,728 INFO L82 PathProgramCache]: Analyzing trace with hash 827137984, now seen corresponding path program 16 times [2018-02-04 17:51:10,728 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 17:51:10,728 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 17:51:10,729 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:51:10,729 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 17:51:10,729 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:51:10,743 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 17:51:10,743 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 17:51:11,174 INFO L134 CoverageAnalysis]: Checked inductivity of 405 backedges. 0 proven. 351 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:51:11,174 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 17:51:11,175 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 17:51:11,175 INFO L109 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-02-04 17:51:11,196 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-02-04 17:51:11,196 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 17:51:11,200 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 17:51:11,493 INFO L134 CoverageAnalysis]: Checked inductivity of 405 backedges. 0 proven. 351 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:51:11,493 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 17:51:11,493 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [30, 30] total 58 [2018-02-04 17:51:11,494 INFO L409 AbstractCegarLoop]: Interpolant automaton has 58 states [2018-02-04 17:51:11,494 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 58 interpolants. [2018-02-04 17:51:11,494 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1247, Invalid=2059, Unknown=0, NotChecked=0, Total=3306 [2018-02-04 17:51:11,494 INFO L87 Difference]: Start difference. First operand 109 states and 114 transitions. Second operand 58 states. [2018-02-04 17:51:11,559 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 17:51:11,560 INFO L93 Difference]: Finished difference Result 112 states and 117 transitions. [2018-02-04 17:51:11,562 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2018-02-04 17:51:11,562 INFO L78 Accepts]: Start accepts. Automaton has 58 states. Word has length 104 [2018-02-04 17:51:11,562 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 17:51:11,562 INFO L225 Difference]: With dead ends: 112 [2018-02-04 17:51:11,563 INFO L226 Difference]: Without dead ends: 110 [2018-02-04 17:51:11,563 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 135 GetRequests, 77 SyntacticMatches, 0 SemanticMatches, 58 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1561 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=1335, Invalid=2205, Unknown=0, NotChecked=0, Total=3540 [2018-02-04 17:51:11,563 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 110 states. [2018-02-04 17:51:11,564 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 110 to 110. [2018-02-04 17:51:11,564 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 110 states. [2018-02-04 17:51:11,565 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 110 states to 110 states and 115 transitions. [2018-02-04 17:51:11,565 INFO L78 Accepts]: Start accepts. Automaton has 110 states and 115 transitions. Word has length 104 [2018-02-04 17:51:11,565 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 17:51:11,565 INFO L432 AbstractCegarLoop]: Abstraction has 110 states and 115 transitions. [2018-02-04 17:51:11,565 INFO L433 AbstractCegarLoop]: Interpolant automaton has 58 states. [2018-02-04 17:51:11,565 INFO L276 IsEmpty]: Start isEmpty. Operand 110 states and 115 transitions. [2018-02-04 17:51:11,566 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 106 [2018-02-04 17:51:11,566 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 17:51:11,566 INFO L351 BasicCegarLoop]: trace histogram [27, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 17:51:11,566 INFO L371 AbstractCegarLoop]: === Iteration 46 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-04 17:51:11,566 INFO L82 PathProgramCache]: Analyzing trace with hash 1404176403, now seen corresponding path program 17 times [2018-02-04 17:51:11,567 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 17:51:11,567 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 17:51:11,567 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:51:11,567 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 17:51:11,567 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:51:11,583 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 17:51:11,583 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 17:51:12,008 INFO L134 CoverageAnalysis]: Checked inductivity of 432 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:51:12,008 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 17:51:12,008 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 17:51:12,009 INFO L109 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-02-04 17:51:12,033 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 15 check-sat command(s) [2018-02-04 17:51:12,034 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 17:51:12,037 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 17:51:12,410 INFO L134 CoverageAnalysis]: Checked inductivity of 432 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:51:12,410 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 17:51:12,410 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [31, 31] total 60 [2018-02-04 17:51:12,410 INFO L409 AbstractCegarLoop]: Interpolant automaton has 60 states [2018-02-04 17:51:12,411 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 60 interpolants. [2018-02-04 17:51:12,411 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1335, Invalid=2205, Unknown=0, NotChecked=0, Total=3540 [2018-02-04 17:51:12,411 INFO L87 Difference]: Start difference. First operand 110 states and 115 transitions. Second operand 60 states. [2018-02-04 17:51:12,480 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 17:51:12,480 INFO L93 Difference]: Finished difference Result 113 states and 118 transitions. [2018-02-04 17:51:12,483 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2018-02-04 17:51:12,483 INFO L78 Accepts]: Start accepts. Automaton has 60 states. Word has length 105 [2018-02-04 17:51:12,483 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 17:51:12,484 INFO L225 Difference]: With dead ends: 113 [2018-02-04 17:51:12,484 INFO L226 Difference]: Without dead ends: 111 [2018-02-04 17:51:12,484 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 137 GetRequests, 77 SyntacticMatches, 0 SemanticMatches, 60 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1675 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=1426, Invalid=2356, Unknown=0, NotChecked=0, Total=3782 [2018-02-04 17:51:12,484 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 111 states. [2018-02-04 17:51:12,486 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 111 to 111. [2018-02-04 17:51:12,486 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 111 states. [2018-02-04 17:51:12,486 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 111 states to 111 states and 116 transitions. [2018-02-04 17:51:12,487 INFO L78 Accepts]: Start accepts. Automaton has 111 states and 116 transitions. Word has length 105 [2018-02-04 17:51:12,487 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 17:51:12,487 INFO L432 AbstractCegarLoop]: Abstraction has 111 states and 116 transitions. [2018-02-04 17:51:12,487 INFO L433 AbstractCegarLoop]: Interpolant automaton has 60 states. [2018-02-04 17:51:12,487 INFO L276 IsEmpty]: Start isEmpty. Operand 111 states and 116 transitions. [2018-02-04 17:51:12,487 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 107 [2018-02-04 17:51:12,487 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 17:51:12,488 INFO L351 BasicCegarLoop]: trace histogram [28, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 17:51:12,488 INFO L371 AbstractCegarLoop]: === Iteration 47 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-04 17:51:12,488 INFO L82 PathProgramCache]: Analyzing trace with hash 2112498208, now seen corresponding path program 18 times [2018-02-04 17:51:12,488 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 17:51:12,488 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 17:51:12,489 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:51:12,489 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 17:51:12,489 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:51:12,506 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 17:51:12,507 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 17:51:12,930 INFO L134 CoverageAnalysis]: Checked inductivity of 460 backedges. 0 proven. 406 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:51:12,930 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 17:51:12,930 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 17:51:12,931 INFO L109 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-02-04 17:51:12,989 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 15 check-sat command(s) [2018-02-04 17:51:12,989 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 17:51:12,994 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 17:51:13,340 INFO L134 CoverageAnalysis]: Checked inductivity of 460 backedges. 0 proven. 406 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:51:13,340 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 17:51:13,340 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [32, 32] total 62 [2018-02-04 17:51:13,340 INFO L409 AbstractCegarLoop]: Interpolant automaton has 62 states [2018-02-04 17:51:13,341 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 62 interpolants. [2018-02-04 17:51:13,341 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1426, Invalid=2356, Unknown=0, NotChecked=0, Total=3782 [2018-02-04 17:51:13,341 INFO L87 Difference]: Start difference. First operand 111 states and 116 transitions. Second operand 62 states. [2018-02-04 17:51:13,461 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 17:51:13,461 INFO L93 Difference]: Finished difference Result 114 states and 119 transitions. [2018-02-04 17:51:13,462 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2018-02-04 17:51:13,462 INFO L78 Accepts]: Start accepts. Automaton has 62 states. Word has length 106 [2018-02-04 17:51:13,462 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 17:51:13,462 INFO L225 Difference]: With dead ends: 114 [2018-02-04 17:51:13,462 INFO L226 Difference]: Without dead ends: 112 [2018-02-04 17:51:13,463 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 139 GetRequests, 77 SyntacticMatches, 0 SemanticMatches, 62 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1793 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=1520, Invalid=2512, Unknown=0, NotChecked=0, Total=4032 [2018-02-04 17:51:13,463 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 112 states. [2018-02-04 17:51:13,464 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 112 to 112. [2018-02-04 17:51:13,464 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 112 states. [2018-02-04 17:51:13,465 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 112 states to 112 states and 117 transitions. [2018-02-04 17:51:13,465 INFO L78 Accepts]: Start accepts. Automaton has 112 states and 117 transitions. Word has length 106 [2018-02-04 17:51:13,465 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 17:51:13,465 INFO L432 AbstractCegarLoop]: Abstraction has 112 states and 117 transitions. [2018-02-04 17:51:13,465 INFO L433 AbstractCegarLoop]: Interpolant automaton has 62 states. [2018-02-04 17:51:13,465 INFO L276 IsEmpty]: Start isEmpty. Operand 112 states and 117 transitions. [2018-02-04 17:51:13,465 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 108 [2018-02-04 17:51:13,466 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 17:51:13,466 INFO L351 BasicCegarLoop]: trace histogram [29, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 17:51:13,466 INFO L371 AbstractCegarLoop]: === Iteration 48 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-04 17:51:13,466 INFO L82 PathProgramCache]: Analyzing trace with hash -1699329613, now seen corresponding path program 19 times [2018-02-04 17:51:13,466 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 17:51:13,466 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 17:51:13,467 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:51:13,467 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 17:51:13,467 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:51:13,482 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 17:51:13,483 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 17:51:13,875 INFO L134 CoverageAnalysis]: Checked inductivity of 489 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:51:13,875 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 17:51:13,875 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 17:51:13,876 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 17:51:13,884 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 17:51:13,887 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 17:51:14,143 INFO L134 CoverageAnalysis]: Checked inductivity of 489 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:51:14,143 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 17:51:14,144 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [33, 33] total 64 [2018-02-04 17:51:14,144 INFO L409 AbstractCegarLoop]: Interpolant automaton has 64 states [2018-02-04 17:51:14,144 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 64 interpolants. [2018-02-04 17:51:14,144 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1520, Invalid=2512, Unknown=0, NotChecked=0, Total=4032 [2018-02-04 17:51:14,145 INFO L87 Difference]: Start difference. First operand 112 states and 117 transitions. Second operand 64 states. [2018-02-04 17:51:14,214 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 17:51:14,214 INFO L93 Difference]: Finished difference Result 115 states and 120 transitions. [2018-02-04 17:51:14,219 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2018-02-04 17:51:14,219 INFO L78 Accepts]: Start accepts. Automaton has 64 states. Word has length 107 [2018-02-04 17:51:14,219 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 17:51:14,220 INFO L225 Difference]: With dead ends: 115 [2018-02-04 17:51:14,220 INFO L226 Difference]: Without dead ends: 113 [2018-02-04 17:51:14,221 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 141 GetRequests, 77 SyntacticMatches, 0 SemanticMatches, 64 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1915 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=1617, Invalid=2673, Unknown=0, NotChecked=0, Total=4290 [2018-02-04 17:51:14,221 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 113 states. [2018-02-04 17:51:14,222 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 113 to 113. [2018-02-04 17:51:14,222 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 113 states. [2018-02-04 17:51:14,223 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 113 states to 113 states and 118 transitions. [2018-02-04 17:51:14,223 INFO L78 Accepts]: Start accepts. Automaton has 113 states and 118 transitions. Word has length 107 [2018-02-04 17:51:14,223 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 17:51:14,223 INFO L432 AbstractCegarLoop]: Abstraction has 113 states and 118 transitions. [2018-02-04 17:51:14,223 INFO L433 AbstractCegarLoop]: Interpolant automaton has 64 states. [2018-02-04 17:51:14,224 INFO L276 IsEmpty]: Start isEmpty. Operand 113 states and 118 transitions. [2018-02-04 17:51:14,224 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 109 [2018-02-04 17:51:14,224 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 17:51:14,224 INFO L351 BasicCegarLoop]: trace histogram [30, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 17:51:14,224 INFO L371 AbstractCegarLoop]: === Iteration 49 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-04 17:51:14,224 INFO L82 PathProgramCache]: Analyzing trace with hash 393092224, now seen corresponding path program 20 times [2018-02-04 17:51:14,225 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 17:51:14,225 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 17:51:14,225 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:51:14,225 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 17:51:14,225 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:51:14,240 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 17:51:14,241 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 17:51:14,680 INFO L134 CoverageAnalysis]: Checked inductivity of 519 backedges. 0 proven. 465 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:51:14,680 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 17:51:14,680 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 17:51:14,680 INFO L109 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-02-04 17:51:14,696 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-02-04 17:51:14,697 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 17:51:14,701 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 17:51:15,013 INFO L134 CoverageAnalysis]: Checked inductivity of 519 backedges. 0 proven. 465 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:51:15,013 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 17:51:15,014 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [34, 34] total 66 [2018-02-04 17:51:15,014 INFO L409 AbstractCegarLoop]: Interpolant automaton has 66 states [2018-02-04 17:51:15,014 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 66 interpolants. [2018-02-04 17:51:15,014 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1617, Invalid=2673, Unknown=0, NotChecked=0, Total=4290 [2018-02-04 17:51:15,015 INFO L87 Difference]: Start difference. First operand 113 states and 118 transitions. Second operand 66 states. [2018-02-04 17:51:15,091 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 17:51:15,091 INFO L93 Difference]: Finished difference Result 116 states and 121 transitions. [2018-02-04 17:51:15,092 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2018-02-04 17:51:15,092 INFO L78 Accepts]: Start accepts. Automaton has 66 states. Word has length 108 [2018-02-04 17:51:15,092 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 17:51:15,092 INFO L225 Difference]: With dead ends: 116 [2018-02-04 17:51:15,092 INFO L226 Difference]: Without dead ends: 114 [2018-02-04 17:51:15,093 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 143 GetRequests, 77 SyntacticMatches, 0 SemanticMatches, 66 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2041 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=1717, Invalid=2839, Unknown=0, NotChecked=0, Total=4556 [2018-02-04 17:51:15,093 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 114 states. [2018-02-04 17:51:15,094 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 114 to 114. [2018-02-04 17:51:15,094 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 114 states. [2018-02-04 17:51:15,094 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 114 states to 114 states and 119 transitions. [2018-02-04 17:51:15,094 INFO L78 Accepts]: Start accepts. Automaton has 114 states and 119 transitions. Word has length 108 [2018-02-04 17:51:15,094 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 17:51:15,094 INFO L432 AbstractCegarLoop]: Abstraction has 114 states and 119 transitions. [2018-02-04 17:51:15,094 INFO L433 AbstractCegarLoop]: Interpolant automaton has 66 states. [2018-02-04 17:51:15,094 INFO L276 IsEmpty]: Start isEmpty. Operand 114 states and 119 transitions. [2018-02-04 17:51:15,095 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 110 [2018-02-04 17:51:15,095 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 17:51:15,095 INFO L351 BasicCegarLoop]: trace histogram [31, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 17:51:15,095 INFO L371 AbstractCegarLoop]: === Iteration 50 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-04 17:51:15,095 INFO L82 PathProgramCache]: Analyzing trace with hash 833659731, now seen corresponding path program 21 times [2018-02-04 17:51:15,095 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 17:51:15,095 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 17:51:15,096 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:51:15,096 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 17:51:15,096 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:51:15,105 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 17:51:15,106 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 17:51:15,598 INFO L134 CoverageAnalysis]: Checked inductivity of 550 backedges. 0 proven. 496 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:51:15,598 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 17:51:15,598 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 17:51:15,599 INFO L109 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-02-04 17:51:15,624 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 17 check-sat command(s) [2018-02-04 17:51:15,624 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 17:51:15,627 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 17:51:16,086 INFO L134 CoverageAnalysis]: Checked inductivity of 550 backedges. 0 proven. 496 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:51:16,086 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 17:51:16,086 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [35, 35] total 68 [2018-02-04 17:51:16,086 INFO L409 AbstractCegarLoop]: Interpolant automaton has 68 states [2018-02-04 17:51:16,086 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 68 interpolants. [2018-02-04 17:51:16,087 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1717, Invalid=2839, Unknown=0, NotChecked=0, Total=4556 [2018-02-04 17:51:16,087 INFO L87 Difference]: Start difference. First operand 114 states and 119 transitions. Second operand 68 states. [2018-02-04 17:51:16,159 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 17:51:16,159 INFO L93 Difference]: Finished difference Result 117 states and 122 transitions. [2018-02-04 17:51:16,159 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2018-02-04 17:51:16,159 INFO L78 Accepts]: Start accepts. Automaton has 68 states. Word has length 109 [2018-02-04 17:51:16,160 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 17:51:16,160 INFO L225 Difference]: With dead ends: 117 [2018-02-04 17:51:16,160 INFO L226 Difference]: Without dead ends: 115 [2018-02-04 17:51:16,160 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 145 GetRequests, 77 SyntacticMatches, 0 SemanticMatches, 68 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2171 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=1820, Invalid=3010, Unknown=0, NotChecked=0, Total=4830 [2018-02-04 17:51:16,160 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 115 states. [2018-02-04 17:51:16,161 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 115 to 115. [2018-02-04 17:51:16,162 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 115 states. [2018-02-04 17:51:16,162 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 115 states to 115 states and 120 transitions. [2018-02-04 17:51:16,162 INFO L78 Accepts]: Start accepts. Automaton has 115 states and 120 transitions. Word has length 109 [2018-02-04 17:51:16,162 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 17:51:16,162 INFO L432 AbstractCegarLoop]: Abstraction has 115 states and 120 transitions. [2018-02-04 17:51:16,162 INFO L433 AbstractCegarLoop]: Interpolant automaton has 68 states. [2018-02-04 17:51:16,162 INFO L276 IsEmpty]: Start isEmpty. Operand 115 states and 120 transitions. [2018-02-04 17:51:16,163 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 111 [2018-02-04 17:51:16,163 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 17:51:16,163 INFO L351 BasicCegarLoop]: trace histogram [32, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 17:51:16,163 INFO L371 AbstractCegarLoop]: === Iteration 51 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-04 17:51:16,163 INFO L82 PathProgramCache]: Analyzing trace with hash 1606350560, now seen corresponding path program 22 times [2018-02-04 17:51:16,164 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 17:51:16,164 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 17:51:16,164 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:51:16,164 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 17:51:16,164 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:51:16,175 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 17:51:16,175 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 17:51:16,782 INFO L134 CoverageAnalysis]: Checked inductivity of 582 backedges. 0 proven. 528 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:51:16,782 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 17:51:16,782 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 17:51:16,782 INFO L109 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-02-04 17:51:16,796 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-02-04 17:51:16,796 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 17:51:16,799 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 17:51:17,109 INFO L134 CoverageAnalysis]: Checked inductivity of 582 backedges. 0 proven. 528 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:51:17,109 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 17:51:17,109 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [36, 36] total 70 [2018-02-04 17:51:17,109 INFO L409 AbstractCegarLoop]: Interpolant automaton has 70 states [2018-02-04 17:51:17,110 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 70 interpolants. [2018-02-04 17:51:17,110 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1820, Invalid=3010, Unknown=0, NotChecked=0, Total=4830 [2018-02-04 17:51:17,111 INFO L87 Difference]: Start difference. First operand 115 states and 120 transitions. Second operand 70 states. [2018-02-04 17:51:17,191 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 17:51:17,191 INFO L93 Difference]: Finished difference Result 118 states and 123 transitions. [2018-02-04 17:51:17,191 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2018-02-04 17:51:17,191 INFO L78 Accepts]: Start accepts. Automaton has 70 states. Word has length 110 [2018-02-04 17:51:17,192 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 17:51:17,192 INFO L225 Difference]: With dead ends: 118 [2018-02-04 17:51:17,192 INFO L226 Difference]: Without dead ends: 116 [2018-02-04 17:51:17,192 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 147 GetRequests, 77 SyntacticMatches, 0 SemanticMatches, 70 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2305 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=1926, Invalid=3186, Unknown=0, NotChecked=0, Total=5112 [2018-02-04 17:51:17,192 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 116 states. [2018-02-04 17:51:17,194 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 116 to 116. [2018-02-04 17:51:17,194 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 116 states. [2018-02-04 17:51:17,194 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 116 states to 116 states and 121 transitions. [2018-02-04 17:51:17,194 INFO L78 Accepts]: Start accepts. Automaton has 116 states and 121 transitions. Word has length 110 [2018-02-04 17:51:17,194 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 17:51:17,195 INFO L432 AbstractCegarLoop]: Abstraction has 116 states and 121 transitions. [2018-02-04 17:51:17,195 INFO L433 AbstractCegarLoop]: Interpolant automaton has 70 states. [2018-02-04 17:51:17,195 INFO L276 IsEmpty]: Start isEmpty. Operand 116 states and 121 transitions. [2018-02-04 17:51:17,195 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 112 [2018-02-04 17:51:17,195 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 17:51:17,195 INFO L351 BasicCegarLoop]: trace histogram [33, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 17:51:17,195 INFO L371 AbstractCegarLoop]: === Iteration 52 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-04 17:51:17,195 INFO L82 PathProgramCache]: Analyzing trace with hash -210037517, now seen corresponding path program 23 times [2018-02-04 17:51:17,195 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 17:51:17,196 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 17:51:17,196 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:51:17,196 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 17:51:17,196 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:51:17,206 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 17:51:17,206 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 17:51:17,858 INFO L134 CoverageAnalysis]: Checked inductivity of 615 backedges. 0 proven. 561 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:51:17,859 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 17:51:17,859 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 17:51:17,859 INFO L109 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-02-04 17:51:17,883 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 18 check-sat command(s) [2018-02-04 17:51:17,883 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 17:51:17,887 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 17:51:18,282 INFO L134 CoverageAnalysis]: Checked inductivity of 615 backedges. 0 proven. 561 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:51:18,283 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 17:51:18,283 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [37, 37] total 72 [2018-02-04 17:51:18,283 INFO L409 AbstractCegarLoop]: Interpolant automaton has 72 states [2018-02-04 17:51:18,284 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 72 interpolants. [2018-02-04 17:51:18,284 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1926, Invalid=3186, Unknown=0, NotChecked=0, Total=5112 [2018-02-04 17:51:18,284 INFO L87 Difference]: Start difference. First operand 116 states and 121 transitions. Second operand 72 states. [2018-02-04 17:51:18,356 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 17:51:18,356 INFO L93 Difference]: Finished difference Result 119 states and 124 transitions. [2018-02-04 17:51:18,356 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 37 states. [2018-02-04 17:51:18,356 INFO L78 Accepts]: Start accepts. Automaton has 72 states. Word has length 111 [2018-02-04 17:51:18,356 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 17:51:18,357 INFO L225 Difference]: With dead ends: 119 [2018-02-04 17:51:18,357 INFO L226 Difference]: Without dead ends: 117 [2018-02-04 17:51:18,357 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 149 GetRequests, 77 SyntacticMatches, 0 SemanticMatches, 72 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2443 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=2035, Invalid=3367, Unknown=0, NotChecked=0, Total=5402 [2018-02-04 17:51:18,357 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 117 states. [2018-02-04 17:51:18,359 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 117 to 117. [2018-02-04 17:51:18,359 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 117 states. [2018-02-04 17:51:18,360 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 117 states to 117 states and 122 transitions. [2018-02-04 17:51:18,360 INFO L78 Accepts]: Start accepts. Automaton has 117 states and 122 transitions. Word has length 111 [2018-02-04 17:51:18,360 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 17:51:18,360 INFO L432 AbstractCegarLoop]: Abstraction has 117 states and 122 transitions. [2018-02-04 17:51:18,360 INFO L433 AbstractCegarLoop]: Interpolant automaton has 72 states. [2018-02-04 17:51:18,360 INFO L276 IsEmpty]: Start isEmpty. Operand 117 states and 122 transitions. [2018-02-04 17:51:18,361 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 113 [2018-02-04 17:51:18,361 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 17:51:18,361 INFO L351 BasicCegarLoop]: trace histogram [34, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 17:51:18,361 INFO L371 AbstractCegarLoop]: === Iteration 53 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-04 17:51:18,361 INFO L82 PathProgramCache]: Analyzing trace with hash -683493056, now seen corresponding path program 24 times [2018-02-04 17:51:18,361 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 17:51:18,361 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 17:51:18,362 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:51:18,362 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 17:51:18,362 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:51:18,385 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 17:51:18,386 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 17:51:18,795 INFO L134 CoverageAnalysis]: Checked inductivity of 649 backedges. 0 proven. 595 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:51:18,795 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 17:51:18,795 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 17:51:18,796 INFO L109 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-02-04 17:51:18,819 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 18 check-sat command(s) [2018-02-04 17:51:18,820 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 17:51:18,823 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 17:51:19,320 INFO L134 CoverageAnalysis]: Checked inductivity of 649 backedges. 0 proven. 595 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:51:19,320 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 17:51:19,320 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [38, 38] total 74 [2018-02-04 17:51:19,321 INFO L409 AbstractCegarLoop]: Interpolant automaton has 74 states [2018-02-04 17:51:19,321 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 74 interpolants. [2018-02-04 17:51:19,322 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2035, Invalid=3367, Unknown=0, NotChecked=0, Total=5402 [2018-02-04 17:51:19,322 INFO L87 Difference]: Start difference. First operand 117 states and 122 transitions. Second operand 74 states. [2018-02-04 17:51:19,399 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 17:51:19,400 INFO L93 Difference]: Finished difference Result 120 states and 125 transitions. [2018-02-04 17:51:19,400 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2018-02-04 17:51:19,400 INFO L78 Accepts]: Start accepts. Automaton has 74 states. Word has length 112 [2018-02-04 17:51:19,400 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 17:51:19,401 INFO L225 Difference]: With dead ends: 120 [2018-02-04 17:51:19,401 INFO L226 Difference]: Without dead ends: 118 [2018-02-04 17:51:19,401 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 151 GetRequests, 77 SyntacticMatches, 0 SemanticMatches, 74 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2585 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=2147, Invalid=3553, Unknown=0, NotChecked=0, Total=5700 [2018-02-04 17:51:19,401 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 118 states. [2018-02-04 17:51:19,403 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 118 to 118. [2018-02-04 17:51:19,403 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 118 states. [2018-02-04 17:51:19,403 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 118 states to 118 states and 123 transitions. [2018-02-04 17:51:19,403 INFO L78 Accepts]: Start accepts. Automaton has 118 states and 123 transitions. Word has length 112 [2018-02-04 17:51:19,403 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 17:51:19,403 INFO L432 AbstractCegarLoop]: Abstraction has 118 states and 123 transitions. [2018-02-04 17:51:19,403 INFO L433 AbstractCegarLoop]: Interpolant automaton has 74 states. [2018-02-04 17:51:19,404 INFO L276 IsEmpty]: Start isEmpty. Operand 118 states and 123 transitions. [2018-02-04 17:51:19,404 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 114 [2018-02-04 17:51:19,404 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 17:51:19,404 INFO L351 BasicCegarLoop]: trace histogram [35, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 17:51:19,404 INFO L371 AbstractCegarLoop]: === Iteration 54 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-04 17:51:19,405 INFO L82 PathProgramCache]: Analyzing trace with hash 1819254419, now seen corresponding path program 25 times [2018-02-04 17:51:19,405 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 17:51:19,405 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 17:51:19,405 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:51:19,405 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 17:51:19,405 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:51:19,423 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 17:51:19,423 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 17:51:19,938 INFO L134 CoverageAnalysis]: Checked inductivity of 684 backedges. 0 proven. 630 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:51:19,938 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 17:51:19,938 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 17:51:19,939 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 17:51:19,948 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 17:51:19,951 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 17:51:20,348 INFO L134 CoverageAnalysis]: Checked inductivity of 684 backedges. 0 proven. 630 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:51:20,369 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 17:51:20,369 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [39, 39] total 76 [2018-02-04 17:51:20,369 INFO L409 AbstractCegarLoop]: Interpolant automaton has 76 states [2018-02-04 17:51:20,369 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 76 interpolants. [2018-02-04 17:51:20,370 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2147, Invalid=3553, Unknown=0, NotChecked=0, Total=5700 [2018-02-04 17:51:20,370 INFO L87 Difference]: Start difference. First operand 118 states and 123 transitions. Second operand 76 states. [2018-02-04 17:51:20,436 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 17:51:20,436 INFO L93 Difference]: Finished difference Result 121 states and 126 transitions. [2018-02-04 17:51:20,436 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 39 states. [2018-02-04 17:51:20,436 INFO L78 Accepts]: Start accepts. Automaton has 76 states. Word has length 113 [2018-02-04 17:51:20,436 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 17:51:20,437 INFO L225 Difference]: With dead ends: 121 [2018-02-04 17:51:20,437 INFO L226 Difference]: Without dead ends: 119 [2018-02-04 17:51:20,437 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 153 GetRequests, 77 SyntacticMatches, 0 SemanticMatches, 76 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2731 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=2262, Invalid=3744, Unknown=0, NotChecked=0, Total=6006 [2018-02-04 17:51:20,437 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 119 states. [2018-02-04 17:51:20,438 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 119 to 119. [2018-02-04 17:51:20,438 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 119 states. [2018-02-04 17:51:20,438 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 119 states to 119 states and 124 transitions. [2018-02-04 17:51:20,438 INFO L78 Accepts]: Start accepts. Automaton has 119 states and 124 transitions. Word has length 113 [2018-02-04 17:51:20,439 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 17:51:20,439 INFO L432 AbstractCegarLoop]: Abstraction has 119 states and 124 transitions. [2018-02-04 17:51:20,439 INFO L433 AbstractCegarLoop]: Interpolant automaton has 76 states. [2018-02-04 17:51:20,439 INFO L276 IsEmpty]: Start isEmpty. Operand 119 states and 124 transitions. [2018-02-04 17:51:20,439 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 115 [2018-02-04 17:51:20,439 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 17:51:20,439 INFO L351 BasicCegarLoop]: trace histogram [36, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 17:51:20,439 INFO L371 AbstractCegarLoop]: === Iteration 55 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-04 17:51:20,439 INFO L82 PathProgramCache]: Analyzing trace with hash 2095014816, now seen corresponding path program 26 times [2018-02-04 17:51:20,439 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 17:51:20,439 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 17:51:20,440 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:51:20,440 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 17:51:20,440 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:51:20,451 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 17:51:20,451 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 17:51:20,969 INFO L134 CoverageAnalysis]: Checked inductivity of 720 backedges. 0 proven. 666 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:51:20,969 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 17:51:20,969 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 17:51:20,970 INFO L109 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-02-04 17:51:20,983 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-02-04 17:51:20,983 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 17:51:20,986 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 17:51:21,456 INFO L134 CoverageAnalysis]: Checked inductivity of 720 backedges. 0 proven. 666 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:51:21,457 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 17:51:21,457 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [40, 40] total 78 [2018-02-04 17:51:21,457 INFO L409 AbstractCegarLoop]: Interpolant automaton has 78 states [2018-02-04 17:51:21,457 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 78 interpolants. [2018-02-04 17:51:21,458 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2262, Invalid=3744, Unknown=0, NotChecked=0, Total=6006 [2018-02-04 17:51:21,458 INFO L87 Difference]: Start difference. First operand 119 states and 124 transitions. Second operand 78 states. [2018-02-04 17:51:21,533 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 17:51:21,533 INFO L93 Difference]: Finished difference Result 122 states and 127 transitions. [2018-02-04 17:51:21,534 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 40 states. [2018-02-04 17:51:21,534 INFO L78 Accepts]: Start accepts. Automaton has 78 states. Word has length 114 [2018-02-04 17:51:21,534 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 17:51:21,534 INFO L225 Difference]: With dead ends: 122 [2018-02-04 17:51:21,534 INFO L226 Difference]: Without dead ends: 120 [2018-02-04 17:51:21,535 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 155 GetRequests, 77 SyntacticMatches, 0 SemanticMatches, 78 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2881 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=2380, Invalid=3940, Unknown=0, NotChecked=0, Total=6320 [2018-02-04 17:51:21,535 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 120 states. [2018-02-04 17:51:21,536 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 120 to 120. [2018-02-04 17:51:21,536 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 120 states. [2018-02-04 17:51:21,536 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 120 states to 120 states and 125 transitions. [2018-02-04 17:51:21,536 INFO L78 Accepts]: Start accepts. Automaton has 120 states and 125 transitions. Word has length 114 [2018-02-04 17:51:21,536 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 17:51:21,536 INFO L432 AbstractCegarLoop]: Abstraction has 120 states and 125 transitions. [2018-02-04 17:51:21,537 INFO L433 AbstractCegarLoop]: Interpolant automaton has 78 states. [2018-02-04 17:51:21,537 INFO L276 IsEmpty]: Start isEmpty. Operand 120 states and 125 transitions. [2018-02-04 17:51:21,537 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 116 [2018-02-04 17:51:21,537 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 17:51:21,537 INFO L351 BasicCegarLoop]: trace histogram [37, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 17:51:21,537 INFO L371 AbstractCegarLoop]: === Iteration 56 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-04 17:51:21,537 INFO L82 PathProgramCache]: Analyzing trace with hash 2053652531, now seen corresponding path program 27 times [2018-02-04 17:51:21,537 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 17:51:21,537 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 17:51:21,538 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:51:21,538 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 17:51:21,538 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:51:21,558 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 17:51:21,559 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 17:51:22,080 INFO L134 CoverageAnalysis]: Checked inductivity of 757 backedges. 0 proven. 703 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:51:22,080 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 17:51:22,080 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 17:51:22,080 INFO L109 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-02-04 17:51:22,102 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 20 check-sat command(s) [2018-02-04 17:51:22,102 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 17:51:22,108 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 17:51:22,569 INFO L134 CoverageAnalysis]: Checked inductivity of 757 backedges. 0 proven. 703 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:51:22,570 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 17:51:22,570 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [41, 41] total 80 [2018-02-04 17:51:22,570 INFO L409 AbstractCegarLoop]: Interpolant automaton has 80 states [2018-02-04 17:51:22,570 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 80 interpolants. [2018-02-04 17:51:22,571 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2380, Invalid=3940, Unknown=0, NotChecked=0, Total=6320 [2018-02-04 17:51:22,571 INFO L87 Difference]: Start difference. First operand 120 states and 125 transitions. Second operand 80 states. [2018-02-04 17:51:22,673 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 17:51:22,673 INFO L93 Difference]: Finished difference Result 123 states and 128 transitions. [2018-02-04 17:51:22,673 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 41 states. [2018-02-04 17:51:22,673 INFO L78 Accepts]: Start accepts. Automaton has 80 states. Word has length 115 [2018-02-04 17:51:22,674 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 17:51:22,674 INFO L225 Difference]: With dead ends: 123 [2018-02-04 17:51:22,674 INFO L226 Difference]: Without dead ends: 121 [2018-02-04 17:51:22,674 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 157 GetRequests, 77 SyntacticMatches, 0 SemanticMatches, 80 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3035 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=2501, Invalid=4141, Unknown=0, NotChecked=0, Total=6642 [2018-02-04 17:51:22,675 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 121 states. [2018-02-04 17:51:22,676 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 121 to 121. [2018-02-04 17:51:22,676 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 121 states. [2018-02-04 17:51:22,676 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 121 states to 121 states and 126 transitions. [2018-02-04 17:51:22,676 INFO L78 Accepts]: Start accepts. Automaton has 121 states and 126 transitions. Word has length 115 [2018-02-04 17:51:22,676 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 17:51:22,676 INFO L432 AbstractCegarLoop]: Abstraction has 121 states and 126 transitions. [2018-02-04 17:51:22,676 INFO L433 AbstractCegarLoop]: Interpolant automaton has 80 states. [2018-02-04 17:51:22,676 INFO L276 IsEmpty]: Start isEmpty. Operand 121 states and 126 transitions. [2018-02-04 17:51:22,677 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 117 [2018-02-04 17:51:22,677 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 17:51:22,677 INFO L351 BasicCegarLoop]: trace histogram [38, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 17:51:22,677 INFO L371 AbstractCegarLoop]: === Iteration 57 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-04 17:51:22,677 INFO L82 PathProgramCache]: Analyzing trace with hash 771421696, now seen corresponding path program 28 times [2018-02-04 17:51:22,677 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 17:51:22,677 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 17:51:22,677 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:51:22,678 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 17:51:22,678 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:51:22,689 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 17:51:22,689 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 17:51:23,175 INFO L134 CoverageAnalysis]: Checked inductivity of 795 backedges. 0 proven. 741 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:51:23,175 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 17:51:23,176 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 17:51:23,176 INFO L109 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-02-04 17:51:23,195 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-02-04 17:51:23,195 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 17:51:23,199 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 17:51:23,624 INFO L134 CoverageAnalysis]: Checked inductivity of 795 backedges. 0 proven. 741 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:51:23,624 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 17:51:23,625 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [42, 42] total 82 [2018-02-04 17:51:23,625 INFO L409 AbstractCegarLoop]: Interpolant automaton has 82 states [2018-02-04 17:51:23,625 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 82 interpolants. [2018-02-04 17:51:23,626 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2501, Invalid=4141, Unknown=0, NotChecked=0, Total=6642 [2018-02-04 17:51:23,626 INFO L87 Difference]: Start difference. First operand 121 states and 126 transitions. Second operand 82 states. [2018-02-04 17:51:23,710 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 17:51:23,710 INFO L93 Difference]: Finished difference Result 124 states and 129 transitions. [2018-02-04 17:51:23,710 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 42 states. [2018-02-04 17:51:23,710 INFO L78 Accepts]: Start accepts. Automaton has 82 states. Word has length 116 [2018-02-04 17:51:23,711 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 17:51:23,711 INFO L225 Difference]: With dead ends: 124 [2018-02-04 17:51:23,711 INFO L226 Difference]: Without dead ends: 122 [2018-02-04 17:51:23,712 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 159 GetRequests, 77 SyntacticMatches, 0 SemanticMatches, 82 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3193 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=2625, Invalid=4347, Unknown=0, NotChecked=0, Total=6972 [2018-02-04 17:51:23,712 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 122 states. [2018-02-04 17:51:23,712 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 122 to 122. [2018-02-04 17:51:23,713 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 122 states. [2018-02-04 17:51:23,713 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 122 states to 122 states and 127 transitions. [2018-02-04 17:51:23,713 INFO L78 Accepts]: Start accepts. Automaton has 122 states and 127 transitions. Word has length 116 [2018-02-04 17:51:23,713 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 17:51:23,713 INFO L432 AbstractCegarLoop]: Abstraction has 122 states and 127 transitions. [2018-02-04 17:51:23,713 INFO L433 AbstractCegarLoop]: Interpolant automaton has 82 states. [2018-02-04 17:51:23,713 INFO L276 IsEmpty]: Start isEmpty. Operand 122 states and 127 transitions. [2018-02-04 17:51:23,713 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 118 [2018-02-04 17:51:23,713 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 17:51:23,713 INFO L351 BasicCegarLoop]: trace histogram [39, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 17:51:23,714 INFO L371 AbstractCegarLoop]: === Iteration 58 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-04 17:51:23,714 INFO L82 PathProgramCache]: Analyzing trace with hash -323028525, now seen corresponding path program 29 times [2018-02-04 17:51:23,714 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 17:51:23,714 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 17:51:23,714 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:51:23,714 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 17:51:23,714 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:51:23,725 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 17:51:23,726 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 17:51:24,247 INFO L134 CoverageAnalysis]: Checked inductivity of 834 backedges. 0 proven. 780 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:51:24,247 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 17:51:24,247 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 17:51:24,247 INFO L109 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-02-04 17:51:24,274 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 21 check-sat command(s) [2018-02-04 17:51:24,274 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 17:51:24,278 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 17:51:24,814 INFO L134 CoverageAnalysis]: Checked inductivity of 834 backedges. 0 proven. 780 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:51:24,814 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 17:51:24,814 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [43, 43] total 84 [2018-02-04 17:51:24,815 INFO L409 AbstractCegarLoop]: Interpolant automaton has 84 states [2018-02-04 17:51:24,815 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 84 interpolants. [2018-02-04 17:51:24,815 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2625, Invalid=4347, Unknown=0, NotChecked=0, Total=6972 [2018-02-04 17:51:24,816 INFO L87 Difference]: Start difference. First operand 122 states and 127 transitions. Second operand 84 states. [2018-02-04 17:51:24,876 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 17:51:24,876 INFO L93 Difference]: Finished difference Result 125 states and 130 transitions. [2018-02-04 17:51:24,876 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 43 states. [2018-02-04 17:51:24,876 INFO L78 Accepts]: Start accepts. Automaton has 84 states. Word has length 117 [2018-02-04 17:51:24,876 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 17:51:24,876 INFO L225 Difference]: With dead ends: 125 [2018-02-04 17:51:24,876 INFO L226 Difference]: Without dead ends: 123 [2018-02-04 17:51:24,877 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 161 GetRequests, 77 SyntacticMatches, 0 SemanticMatches, 84 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3355 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=2752, Invalid=4558, Unknown=0, NotChecked=0, Total=7310 [2018-02-04 17:51:24,877 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 123 states. [2018-02-04 17:51:24,878 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 123 to 123. [2018-02-04 17:51:24,878 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 123 states. [2018-02-04 17:51:24,878 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 123 states to 123 states and 128 transitions. [2018-02-04 17:51:24,878 INFO L78 Accepts]: Start accepts. Automaton has 123 states and 128 transitions. Word has length 117 [2018-02-04 17:51:24,879 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 17:51:24,879 INFO L432 AbstractCegarLoop]: Abstraction has 123 states and 128 transitions. [2018-02-04 17:51:24,879 INFO L433 AbstractCegarLoop]: Interpolant automaton has 84 states. [2018-02-04 17:51:24,879 INFO L276 IsEmpty]: Start isEmpty. Operand 123 states and 128 transitions. [2018-02-04 17:51:24,879 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 119 [2018-02-04 17:51:24,879 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 17:51:24,879 INFO L351 BasicCegarLoop]: trace histogram [40, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 17:51:24,880 INFO L371 AbstractCegarLoop]: === Iteration 59 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-04 17:51:24,880 INFO L82 PathProgramCache]: Analyzing trace with hash 108752992, now seen corresponding path program 30 times [2018-02-04 17:51:24,880 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 17:51:24,880 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 17:51:24,880 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:51:24,880 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 17:51:24,881 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:51:24,908 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 17:51:24,909 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 17:51:25,442 INFO L134 CoverageAnalysis]: Checked inductivity of 874 backedges. 0 proven. 820 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:51:25,442 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 17:51:25,442 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 17:51:25,443 INFO L109 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-02-04 17:51:25,478 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 21 check-sat command(s) [2018-02-04 17:51:25,479 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 17:51:25,484 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 17:51:25,998 INFO L134 CoverageAnalysis]: Checked inductivity of 874 backedges. 0 proven. 820 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:51:25,998 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 17:51:25,998 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [44, 44] total 86 [2018-02-04 17:51:25,998 INFO L409 AbstractCegarLoop]: Interpolant automaton has 86 states [2018-02-04 17:51:25,999 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 86 interpolants. [2018-02-04 17:51:25,999 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2752, Invalid=4558, Unknown=0, NotChecked=0, Total=7310 [2018-02-04 17:51:25,999 INFO L87 Difference]: Start difference. First operand 123 states and 128 transitions. Second operand 86 states. [2018-02-04 17:51:26,100 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 17:51:26,100 INFO L93 Difference]: Finished difference Result 126 states and 131 transitions. [2018-02-04 17:51:26,100 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 44 states. [2018-02-04 17:51:26,100 INFO L78 Accepts]: Start accepts. Automaton has 86 states. Word has length 118 [2018-02-04 17:51:26,100 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 17:51:26,101 INFO L225 Difference]: With dead ends: 126 [2018-02-04 17:51:26,101 INFO L226 Difference]: Without dead ends: 124 [2018-02-04 17:51:26,101 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 163 GetRequests, 77 SyntacticMatches, 0 SemanticMatches, 86 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3521 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=2882, Invalid=4774, Unknown=0, NotChecked=0, Total=7656 [2018-02-04 17:51:26,101 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 124 states. [2018-02-04 17:51:26,102 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 124 to 124. [2018-02-04 17:51:26,102 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 124 states. [2018-02-04 17:51:26,102 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 124 states to 124 states and 129 transitions. [2018-02-04 17:51:26,102 INFO L78 Accepts]: Start accepts. Automaton has 124 states and 129 transitions. Word has length 118 [2018-02-04 17:51:26,103 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 17:51:26,103 INFO L432 AbstractCegarLoop]: Abstraction has 124 states and 129 transitions. [2018-02-04 17:51:26,103 INFO L433 AbstractCegarLoop]: Interpolant automaton has 86 states. [2018-02-04 17:51:26,103 INFO L276 IsEmpty]: Start isEmpty. Operand 124 states and 129 transitions. [2018-02-04 17:51:26,103 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 120 [2018-02-04 17:51:26,103 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 17:51:26,103 INFO L351 BasicCegarLoop]: trace histogram [41, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 17:51:26,104 INFO L371 AbstractCegarLoop]: === Iteration 60 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-04 17:51:26,104 INFO L82 PathProgramCache]: Analyzing trace with hash 609078131, now seen corresponding path program 31 times [2018-02-04 17:51:26,104 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 17:51:26,104 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 17:51:26,104 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:51:26,104 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 17:51:26,104 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:51:26,116 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 17:51:26,117 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 17:51:26,687 INFO L134 CoverageAnalysis]: Checked inductivity of 915 backedges. 0 proven. 861 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:51:26,687 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 17:51:26,687 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 17:51:26,687 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 17:51:26,698 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 17:51:26,701 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 17:51:27,162 INFO L134 CoverageAnalysis]: Checked inductivity of 915 backedges. 0 proven. 861 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:51:27,162 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 17:51:27,162 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [45, 45] total 88 [2018-02-04 17:51:27,162 INFO L409 AbstractCegarLoop]: Interpolant automaton has 88 states [2018-02-04 17:51:27,163 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 88 interpolants. [2018-02-04 17:51:27,163 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2882, Invalid=4774, Unknown=0, NotChecked=0, Total=7656 [2018-02-04 17:51:27,164 INFO L87 Difference]: Start difference. First operand 124 states and 129 transitions. Second operand 88 states. [2018-02-04 17:51:27,258 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 17:51:27,258 INFO L93 Difference]: Finished difference Result 127 states and 132 transitions. [2018-02-04 17:51:27,259 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 45 states. [2018-02-04 17:51:27,259 INFO L78 Accepts]: Start accepts. Automaton has 88 states. Word has length 119 [2018-02-04 17:51:27,259 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 17:51:27,259 INFO L225 Difference]: With dead ends: 127 [2018-02-04 17:51:27,259 INFO L226 Difference]: Without dead ends: 125 [2018-02-04 17:51:27,260 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 165 GetRequests, 77 SyntacticMatches, 0 SemanticMatches, 88 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3691 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=3015, Invalid=4995, Unknown=0, NotChecked=0, Total=8010 [2018-02-04 17:51:27,260 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 125 states. [2018-02-04 17:51:27,262 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 125 to 125. [2018-02-04 17:51:27,262 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 125 states. [2018-02-04 17:51:27,263 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 125 states to 125 states and 130 transitions. [2018-02-04 17:51:27,263 INFO L78 Accepts]: Start accepts. Automaton has 125 states and 130 transitions. Word has length 119 [2018-02-04 17:51:27,263 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 17:51:27,263 INFO L432 AbstractCegarLoop]: Abstraction has 125 states and 130 transitions. [2018-02-04 17:51:27,263 INFO L433 AbstractCegarLoop]: Interpolant automaton has 88 states. [2018-02-04 17:51:27,263 INFO L276 IsEmpty]: Start isEmpty. Operand 125 states and 130 transitions. [2018-02-04 17:51:27,264 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 121 [2018-02-04 17:51:27,264 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 17:51:27,264 INFO L351 BasicCegarLoop]: trace histogram [42, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 17:51:27,264 INFO L371 AbstractCegarLoop]: === Iteration 61 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-04 17:51:27,264 INFO L82 PathProgramCache]: Analyzing trace with hash -1060711744, now seen corresponding path program 32 times [2018-02-04 17:51:27,264 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 17:51:27,265 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 17:51:27,265 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:51:27,265 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 17:51:27,265 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:51:27,282 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 17:51:27,283 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 17:51:27,943 INFO L134 CoverageAnalysis]: Checked inductivity of 957 backedges. 0 proven. 903 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:51:27,943 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 17:51:27,943 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 17:51:27,943 INFO L109 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-02-04 17:51:27,958 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-02-04 17:51:27,958 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 17:51:27,962 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 17:51:28,427 INFO L134 CoverageAnalysis]: Checked inductivity of 957 backedges. 0 proven. 903 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:51:28,427 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 17:51:28,427 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [46, 46] total 90 [2018-02-04 17:51:28,427 INFO L409 AbstractCegarLoop]: Interpolant automaton has 90 states [2018-02-04 17:51:28,428 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 90 interpolants. [2018-02-04 17:51:28,428 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3015, Invalid=4995, Unknown=0, NotChecked=0, Total=8010 [2018-02-04 17:51:28,428 INFO L87 Difference]: Start difference. First operand 125 states and 130 transitions. Second operand 90 states. [2018-02-04 17:51:28,509 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 17:51:28,509 INFO L93 Difference]: Finished difference Result 128 states and 133 transitions. [2018-02-04 17:51:28,510 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 46 states. [2018-02-04 17:51:28,510 INFO L78 Accepts]: Start accepts. Automaton has 90 states. Word has length 120 [2018-02-04 17:51:28,510 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 17:51:28,510 INFO L225 Difference]: With dead ends: 128 [2018-02-04 17:51:28,510 INFO L226 Difference]: Without dead ends: 126 [2018-02-04 17:51:28,511 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 167 GetRequests, 77 SyntacticMatches, 0 SemanticMatches, 90 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3865 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=3151, Invalid=5221, Unknown=0, NotChecked=0, Total=8372 [2018-02-04 17:51:28,511 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 126 states. [2018-02-04 17:51:28,512 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 126 to 126. [2018-02-04 17:51:28,512 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 126 states. [2018-02-04 17:51:28,513 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 126 states to 126 states and 131 transitions. [2018-02-04 17:51:28,513 INFO L78 Accepts]: Start accepts. Automaton has 126 states and 131 transitions. Word has length 120 [2018-02-04 17:51:28,513 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 17:51:28,513 INFO L432 AbstractCegarLoop]: Abstraction has 126 states and 131 transitions. [2018-02-04 17:51:28,513 INFO L433 AbstractCegarLoop]: Interpolant automaton has 90 states. [2018-02-04 17:51:28,513 INFO L276 IsEmpty]: Start isEmpty. Operand 126 states and 131 transitions. [2018-02-04 17:51:28,514 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 122 [2018-02-04 17:51:28,514 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 17:51:28,514 INFO L351 BasicCegarLoop]: trace histogram [43, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 17:51:28,514 INFO L371 AbstractCegarLoop]: === Iteration 62 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-04 17:51:28,514 INFO L82 PathProgramCache]: Analyzing trace with hash -1284590317, now seen corresponding path program 33 times [2018-02-04 17:51:28,514 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 17:51:28,514 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 17:51:28,515 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:51:28,515 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 17:51:28,515 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:51:28,535 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 17:51:28,536 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 17:51:29,167 INFO L134 CoverageAnalysis]: Checked inductivity of 1000 backedges. 0 proven. 946 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:51:29,167 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 17:51:29,167 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 17:51:29,167 INFO L109 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-02-04 17:51:29,190 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 23 check-sat command(s) [2018-02-04 17:51:29,190 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 17:51:29,194 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 17:51:29,797 INFO L134 CoverageAnalysis]: Checked inductivity of 1000 backedges. 0 proven. 946 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:51:29,797 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 17:51:29,797 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [47, 47] total 92 [2018-02-04 17:51:29,797 INFO L409 AbstractCegarLoop]: Interpolant automaton has 92 states [2018-02-04 17:51:29,798 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 92 interpolants. [2018-02-04 17:51:29,798 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3151, Invalid=5221, Unknown=0, NotChecked=0, Total=8372 [2018-02-04 17:51:29,798 INFO L87 Difference]: Start difference. First operand 126 states and 131 transitions. Second operand 92 states. [2018-02-04 17:51:29,885 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 17:51:29,886 INFO L93 Difference]: Finished difference Result 129 states and 134 transitions. [2018-02-04 17:51:29,886 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 47 states. [2018-02-04 17:51:29,886 INFO L78 Accepts]: Start accepts. Automaton has 92 states. Word has length 121 [2018-02-04 17:51:29,886 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 17:51:29,886 INFO L225 Difference]: With dead ends: 129 [2018-02-04 17:51:29,886 INFO L226 Difference]: Without dead ends: 127 [2018-02-04 17:51:29,887 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 169 GetRequests, 77 SyntacticMatches, 0 SemanticMatches, 92 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4043 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=3290, Invalid=5452, Unknown=0, NotChecked=0, Total=8742 [2018-02-04 17:51:29,887 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 127 states. [2018-02-04 17:51:29,888 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 127 to 127. [2018-02-04 17:51:29,888 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 127 states. [2018-02-04 17:51:29,888 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 127 states to 127 states and 132 transitions. [2018-02-04 17:51:29,888 INFO L78 Accepts]: Start accepts. Automaton has 127 states and 132 transitions. Word has length 121 [2018-02-04 17:51:29,888 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 17:51:29,888 INFO L432 AbstractCegarLoop]: Abstraction has 127 states and 132 transitions. [2018-02-04 17:51:29,888 INFO L433 AbstractCegarLoop]: Interpolant automaton has 92 states. [2018-02-04 17:51:29,888 INFO L276 IsEmpty]: Start isEmpty. Operand 127 states and 132 transitions. [2018-02-04 17:51:29,889 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 123 [2018-02-04 17:51:29,889 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 17:51:29,889 INFO L351 BasicCegarLoop]: trace histogram [44, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 17:51:29,889 INFO L371 AbstractCegarLoop]: === Iteration 63 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-04 17:51:29,889 INFO L82 PathProgramCache]: Analyzing trace with hash 365108512, now seen corresponding path program 34 times [2018-02-04 17:51:29,889 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 17:51:29,889 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 17:51:29,890 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:51:29,890 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 17:51:29,890 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:51:29,903 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 17:51:29,903 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 17:51:30,491 INFO L134 CoverageAnalysis]: Checked inductivity of 1044 backedges. 0 proven. 990 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:51:30,491 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 17:51:30,491 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 17:51:30,492 INFO L109 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-02-04 17:51:30,511 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-02-04 17:51:30,511 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 17:51:30,515 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 17:51:31,060 INFO L134 CoverageAnalysis]: Checked inductivity of 1044 backedges. 0 proven. 990 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:51:31,060 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 17:51:31,061 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [48, 48] total 94 [2018-02-04 17:51:31,061 INFO L409 AbstractCegarLoop]: Interpolant automaton has 94 states [2018-02-04 17:51:31,061 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 94 interpolants. [2018-02-04 17:51:31,062 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3290, Invalid=5452, Unknown=0, NotChecked=0, Total=8742 [2018-02-04 17:51:31,062 INFO L87 Difference]: Start difference. First operand 127 states and 132 transitions. Second operand 94 states. [2018-02-04 17:51:31,151 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 17:51:31,151 INFO L93 Difference]: Finished difference Result 130 states and 135 transitions. [2018-02-04 17:51:31,151 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 48 states. [2018-02-04 17:51:31,152 INFO L78 Accepts]: Start accepts. Automaton has 94 states. Word has length 122 [2018-02-04 17:51:31,152 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 17:51:31,152 INFO L225 Difference]: With dead ends: 130 [2018-02-04 17:51:31,152 INFO L226 Difference]: Without dead ends: 128 [2018-02-04 17:51:31,153 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 171 GetRequests, 77 SyntacticMatches, 0 SemanticMatches, 94 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4225 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=3432, Invalid=5688, Unknown=0, NotChecked=0, Total=9120 [2018-02-04 17:51:31,153 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 128 states. [2018-02-04 17:51:31,154 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 128 to 128. [2018-02-04 17:51:31,154 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 128 states. [2018-02-04 17:51:31,154 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 128 states to 128 states and 133 transitions. [2018-02-04 17:51:31,154 INFO L78 Accepts]: Start accepts. Automaton has 128 states and 133 transitions. Word has length 122 [2018-02-04 17:51:31,154 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 17:51:31,154 INFO L432 AbstractCegarLoop]: Abstraction has 128 states and 133 transitions. [2018-02-04 17:51:31,155 INFO L433 AbstractCegarLoop]: Interpolant automaton has 94 states. [2018-02-04 17:51:31,155 INFO L276 IsEmpty]: Start isEmpty. Operand 128 states and 133 transitions. [2018-02-04 17:51:31,155 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 124 [2018-02-04 17:51:31,155 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 17:51:31,155 INFO L351 BasicCegarLoop]: trace histogram [45, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 17:51:31,156 INFO L371 AbstractCegarLoop]: === Iteration 64 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-04 17:51:31,156 INFO L82 PathProgramCache]: Analyzing trace with hash -33835341, now seen corresponding path program 35 times [2018-02-04 17:51:31,156 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 17:51:31,156 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 17:51:31,156 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:51:31,157 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 17:51:31,157 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:51:31,171 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 17:51:31,171 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 17:51:31,868 INFO L134 CoverageAnalysis]: Checked inductivity of 1089 backedges. 0 proven. 1035 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:51:31,868 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 17:51:31,868 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 17:51:31,869 INFO L109 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-02-04 17:51:31,906 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 24 check-sat command(s) [2018-02-04 17:51:31,907 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 17:51:31,911 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 17:51:32,459 INFO L134 CoverageAnalysis]: Checked inductivity of 1089 backedges. 0 proven. 1035 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:51:32,459 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 17:51:32,460 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [49, 49] total 96 [2018-02-04 17:51:32,460 INFO L409 AbstractCegarLoop]: Interpolant automaton has 96 states [2018-02-04 17:51:32,461 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 96 interpolants. [2018-02-04 17:51:32,461 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3432, Invalid=5688, Unknown=0, NotChecked=0, Total=9120 [2018-02-04 17:51:32,461 INFO L87 Difference]: Start difference. First operand 128 states and 133 transitions. Second operand 96 states. [2018-02-04 17:51:32,565 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 17:51:32,565 INFO L93 Difference]: Finished difference Result 131 states and 136 transitions. [2018-02-04 17:51:32,565 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 49 states. [2018-02-04 17:51:32,566 INFO L78 Accepts]: Start accepts. Automaton has 96 states. Word has length 123 [2018-02-04 17:51:32,566 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 17:51:32,566 INFO L225 Difference]: With dead ends: 131 [2018-02-04 17:51:32,566 INFO L226 Difference]: Without dead ends: 129 [2018-02-04 17:51:32,567 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 173 GetRequests, 77 SyntacticMatches, 0 SemanticMatches, 96 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4411 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=3577, Invalid=5929, Unknown=0, NotChecked=0, Total=9506 [2018-02-04 17:51:32,567 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 129 states. [2018-02-04 17:51:32,568 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 129 to 129. [2018-02-04 17:51:32,568 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 129 states. [2018-02-04 17:51:32,568 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 129 states to 129 states and 134 transitions. [2018-02-04 17:51:32,568 INFO L78 Accepts]: Start accepts. Automaton has 129 states and 134 transitions. Word has length 123 [2018-02-04 17:51:32,568 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 17:51:32,568 INFO L432 AbstractCegarLoop]: Abstraction has 129 states and 134 transitions. [2018-02-04 17:51:32,568 INFO L433 AbstractCegarLoop]: Interpolant automaton has 96 states. [2018-02-04 17:51:32,568 INFO L276 IsEmpty]: Start isEmpty. Operand 129 states and 134 transitions. [2018-02-04 17:51:32,569 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 125 [2018-02-04 17:51:32,569 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 17:51:32,569 INFO L351 BasicCegarLoop]: trace histogram [46, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 17:51:32,569 INFO L371 AbstractCegarLoop]: === Iteration 65 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-04 17:51:32,570 INFO L82 PathProgramCache]: Analyzing trace with hash 483807104, now seen corresponding path program 36 times [2018-02-04 17:51:32,570 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 17:51:32,570 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 17:51:32,570 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:51:32,570 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 17:51:32,571 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:51:32,587 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 17:51:32,588 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 17:51:33,229 INFO L134 CoverageAnalysis]: Checked inductivity of 1135 backedges. 0 proven. 1081 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:51:33,229 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 17:51:33,229 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 17:51:33,230 INFO L109 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-02-04 17:51:33,277 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 24 check-sat command(s) [2018-02-04 17:51:33,277 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 17:51:33,282 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 17:51:33,826 INFO L134 CoverageAnalysis]: Checked inductivity of 1135 backedges. 0 proven. 1081 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:51:33,826 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 17:51:33,826 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [50, 50] total 98 [2018-02-04 17:51:33,827 INFO L409 AbstractCegarLoop]: Interpolant automaton has 98 states [2018-02-04 17:51:33,827 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 98 interpolants. [2018-02-04 17:51:33,828 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3577, Invalid=5929, Unknown=0, NotChecked=0, Total=9506 [2018-02-04 17:51:33,828 INFO L87 Difference]: Start difference. First operand 129 states and 134 transitions. Second operand 98 states. [2018-02-04 17:51:33,925 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 17:51:33,925 INFO L93 Difference]: Finished difference Result 132 states and 137 transitions. [2018-02-04 17:51:33,925 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 50 states. [2018-02-04 17:51:33,925 INFO L78 Accepts]: Start accepts. Automaton has 98 states. Word has length 124 [2018-02-04 17:51:33,925 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 17:51:33,926 INFO L225 Difference]: With dead ends: 132 [2018-02-04 17:51:33,926 INFO L226 Difference]: Without dead ends: 130 [2018-02-04 17:51:33,926 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 175 GetRequests, 77 SyntacticMatches, 0 SemanticMatches, 98 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4601 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=3725, Invalid=6175, Unknown=0, NotChecked=0, Total=9900 [2018-02-04 17:51:33,926 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 130 states. [2018-02-04 17:51:33,927 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 130 to 130. [2018-02-04 17:51:33,928 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 130 states. [2018-02-04 17:51:33,928 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 130 states to 130 states and 135 transitions. [2018-02-04 17:51:33,928 INFO L78 Accepts]: Start accepts. Automaton has 130 states and 135 transitions. Word has length 124 [2018-02-04 17:51:33,928 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 17:51:33,928 INFO L432 AbstractCegarLoop]: Abstraction has 130 states and 135 transitions. [2018-02-04 17:51:33,928 INFO L433 AbstractCegarLoop]: Interpolant automaton has 98 states. [2018-02-04 17:51:33,928 INFO L276 IsEmpty]: Start isEmpty. Operand 130 states and 135 transitions. [2018-02-04 17:51:33,929 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 126 [2018-02-04 17:51:33,929 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 17:51:33,929 INFO L351 BasicCegarLoop]: trace histogram [47, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 17:51:33,929 INFO L371 AbstractCegarLoop]: === Iteration 66 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-04 17:51:33,930 INFO L82 PathProgramCache]: Analyzing trace with hash -649146285, now seen corresponding path program 37 times [2018-02-04 17:51:33,930 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 17:51:33,930 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 17:51:33,930 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:51:33,930 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 17:51:33,931 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:51:33,953 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 17:51:33,954 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 17:51:34,647 INFO L134 CoverageAnalysis]: Checked inductivity of 1182 backedges. 0 proven. 1128 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:51:34,647 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 17:51:34,647 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 17:51:34,648 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 17:51:34,661 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 17:51:34,664 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 17:51:35,339 INFO L134 CoverageAnalysis]: Checked inductivity of 1182 backedges. 0 proven. 1128 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:51:35,339 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 17:51:35,339 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [51, 51] total 100 [2018-02-04 17:51:35,339 INFO L409 AbstractCegarLoop]: Interpolant automaton has 100 states [2018-02-04 17:51:35,340 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 100 interpolants. [2018-02-04 17:51:35,341 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3725, Invalid=6175, Unknown=0, NotChecked=0, Total=9900 [2018-02-04 17:51:35,341 INFO L87 Difference]: Start difference. First operand 130 states and 135 transitions. Second operand 100 states. [2018-02-04 17:51:35,468 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 17:51:35,468 INFO L93 Difference]: Finished difference Result 133 states and 138 transitions. [2018-02-04 17:51:35,469 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 51 states. [2018-02-04 17:51:35,469 INFO L78 Accepts]: Start accepts. Automaton has 100 states. Word has length 125 [2018-02-04 17:51:35,469 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 17:51:35,469 INFO L225 Difference]: With dead ends: 133 [2018-02-04 17:51:35,469 INFO L226 Difference]: Without dead ends: 131 [2018-02-04 17:51:35,469 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 177 GetRequests, 77 SyntacticMatches, 0 SemanticMatches, 100 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4795 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=3876, Invalid=6426, Unknown=0, NotChecked=0, Total=10302 [2018-02-04 17:51:35,470 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 131 states. [2018-02-04 17:51:35,471 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 131 to 131. [2018-02-04 17:51:35,471 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 131 states. [2018-02-04 17:51:35,471 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 131 states to 131 states and 136 transitions. [2018-02-04 17:51:35,471 INFO L78 Accepts]: Start accepts. Automaton has 131 states and 136 transitions. Word has length 125 [2018-02-04 17:51:35,471 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 17:51:35,472 INFO L432 AbstractCegarLoop]: Abstraction has 131 states and 136 transitions. [2018-02-04 17:51:35,472 INFO L433 AbstractCegarLoop]: Interpolant automaton has 100 states. [2018-02-04 17:51:35,472 INFO L276 IsEmpty]: Start isEmpty. Operand 131 states and 136 transitions. [2018-02-04 17:51:35,472 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 127 [2018-02-04 17:51:35,472 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 17:51:35,473 INFO L351 BasicCegarLoop]: trace histogram [48, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 17:51:35,473 INFO L371 AbstractCegarLoop]: === Iteration 67 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-04 17:51:35,473 INFO L82 PathProgramCache]: Analyzing trace with hash -1410962976, now seen corresponding path program 38 times [2018-02-04 17:51:35,473 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 17:51:35,473 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 17:51:35,474 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:51:35,474 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 17:51:35,474 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:51:35,500 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 17:51:35,500 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 17:51:36,221 INFO L134 CoverageAnalysis]: Checked inductivity of 1230 backedges. 0 proven. 1176 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:51:36,222 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 17:51:36,222 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 17:51:36,222 INFO L109 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-02-04 17:51:36,238 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-02-04 17:51:36,238 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 17:51:36,242 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 17:51:36,846 INFO L134 CoverageAnalysis]: Checked inductivity of 1230 backedges. 0 proven. 1176 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:51:36,846 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 17:51:36,846 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [52, 52] total 102 [2018-02-04 17:51:36,846 INFO L409 AbstractCegarLoop]: Interpolant automaton has 102 states [2018-02-04 17:51:36,847 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 102 interpolants. [2018-02-04 17:51:36,848 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3876, Invalid=6426, Unknown=0, NotChecked=0, Total=10302 [2018-02-04 17:51:36,848 INFO L87 Difference]: Start difference. First operand 131 states and 136 transitions. Second operand 102 states. [2018-02-04 17:51:36,954 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 17:51:36,954 INFO L93 Difference]: Finished difference Result 134 states and 139 transitions. [2018-02-04 17:51:36,954 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 52 states. [2018-02-04 17:51:36,954 INFO L78 Accepts]: Start accepts. Automaton has 102 states. Word has length 126 [2018-02-04 17:51:36,955 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 17:51:36,955 INFO L225 Difference]: With dead ends: 134 [2018-02-04 17:51:36,955 INFO L226 Difference]: Without dead ends: 132 [2018-02-04 17:51:36,956 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 179 GetRequests, 77 SyntacticMatches, 0 SemanticMatches, 102 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4993 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=4030, Invalid=6682, Unknown=0, NotChecked=0, Total=10712 [2018-02-04 17:51:36,956 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 132 states. [2018-02-04 17:51:36,957 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 132 to 132. [2018-02-04 17:51:36,957 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 132 states. [2018-02-04 17:51:36,957 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 132 states to 132 states and 137 transitions. [2018-02-04 17:51:36,957 INFO L78 Accepts]: Start accepts. Automaton has 132 states and 137 transitions. Word has length 126 [2018-02-04 17:51:36,957 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 17:51:36,957 INFO L432 AbstractCegarLoop]: Abstraction has 132 states and 137 transitions. [2018-02-04 17:51:36,957 INFO L433 AbstractCegarLoop]: Interpolant automaton has 102 states. [2018-02-04 17:51:36,958 INFO L276 IsEmpty]: Start isEmpty. Operand 132 states and 137 transitions. [2018-02-04 17:51:36,958 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 128 [2018-02-04 17:51:36,958 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 17:51:36,958 INFO L351 BasicCegarLoop]: trace histogram [49, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 17:51:36,958 INFO L371 AbstractCegarLoop]: === Iteration 68 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-04 17:51:36,959 INFO L82 PathProgramCache]: Analyzing trace with hash 742523379, now seen corresponding path program 39 times [2018-02-04 17:51:36,959 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 17:51:36,959 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 17:51:36,959 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:51:36,959 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 17:51:36,959 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:51:36,979 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 17:51:36,980 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 17:51:37,741 INFO L134 CoverageAnalysis]: Checked inductivity of 1279 backedges. 0 proven. 1225 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:51:37,741 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 17:51:37,742 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 17:51:37,742 INFO L109 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-02-04 17:51:37,770 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 26 check-sat command(s) [2018-02-04 17:51:37,770 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 17:51:37,784 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 17:51:38,415 INFO L134 CoverageAnalysis]: Checked inductivity of 1279 backedges. 0 proven. 1225 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:51:38,415 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 17:51:38,415 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [53, 53] total 104 [2018-02-04 17:51:38,415 INFO L409 AbstractCegarLoop]: Interpolant automaton has 104 states [2018-02-04 17:51:38,416 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 104 interpolants. [2018-02-04 17:51:38,417 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=4030, Invalid=6682, Unknown=0, NotChecked=0, Total=10712 [2018-02-04 17:51:38,417 INFO L87 Difference]: Start difference. First operand 132 states and 137 transitions. Second operand 104 states. [2018-02-04 17:51:38,530 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 17:51:38,530 INFO L93 Difference]: Finished difference Result 135 states and 140 transitions. [2018-02-04 17:51:38,530 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 53 states. [2018-02-04 17:51:38,530 INFO L78 Accepts]: Start accepts. Automaton has 104 states. Word has length 127 [2018-02-04 17:51:38,530 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 17:51:38,530 INFO L225 Difference]: With dead ends: 135 [2018-02-04 17:51:38,531 INFO L226 Difference]: Without dead ends: 133 [2018-02-04 17:51:38,532 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 181 GetRequests, 77 SyntacticMatches, 0 SemanticMatches, 104 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5195 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=4187, Invalid=6943, Unknown=0, NotChecked=0, Total=11130 [2018-02-04 17:51:38,532 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 133 states. [2018-02-04 17:51:38,533 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 133 to 133. [2018-02-04 17:51:38,533 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 133 states. [2018-02-04 17:51:38,533 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 133 states to 133 states and 138 transitions. [2018-02-04 17:51:38,534 INFO L78 Accepts]: Start accepts. Automaton has 133 states and 138 transitions. Word has length 127 [2018-02-04 17:51:38,534 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 17:51:38,534 INFO L432 AbstractCegarLoop]: Abstraction has 133 states and 138 transitions. [2018-02-04 17:51:38,534 INFO L433 AbstractCegarLoop]: Interpolant automaton has 104 states. [2018-02-04 17:51:38,534 INFO L276 IsEmpty]: Start isEmpty. Operand 133 states and 138 transitions. [2018-02-04 17:51:38,534 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 129 [2018-02-04 17:51:38,535 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 17:51:38,535 INFO L351 BasicCegarLoop]: trace histogram [50, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 17:51:38,535 INFO L371 AbstractCegarLoop]: === Iteration 69 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-04 17:51:38,535 INFO L82 PathProgramCache]: Analyzing trace with hash -1218876352, now seen corresponding path program 40 times [2018-02-04 17:51:38,535 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 17:51:38,535 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 17:51:38,536 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:51:38,536 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 17:51:38,536 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:51:38,563 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 17:51:38,564 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 17:51:39,380 INFO L134 CoverageAnalysis]: Checked inductivity of 1329 backedges. 0 proven. 1275 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:51:39,380 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 17:51:39,381 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 17:51:39,381 INFO L109 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-02-04 17:51:39,401 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-02-04 17:51:39,401 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 17:51:39,405 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 17:51:40,028 INFO L134 CoverageAnalysis]: Checked inductivity of 1329 backedges. 0 proven. 1275 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:51:40,028 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 17:51:40,028 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [54, 54] total 106 [2018-02-04 17:51:40,028 INFO L409 AbstractCegarLoop]: Interpolant automaton has 106 states [2018-02-04 17:51:40,029 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 106 interpolants. [2018-02-04 17:51:40,029 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=4187, Invalid=6943, Unknown=0, NotChecked=0, Total=11130 [2018-02-04 17:51:40,029 INFO L87 Difference]: Start difference. First operand 133 states and 138 transitions. Second operand 106 states. [2018-02-04 17:51:40,140 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 17:51:40,140 INFO L93 Difference]: Finished difference Result 136 states and 141 transitions. [2018-02-04 17:51:40,140 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 54 states. [2018-02-04 17:51:40,140 INFO L78 Accepts]: Start accepts. Automaton has 106 states. Word has length 128 [2018-02-04 17:51:40,140 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 17:51:40,140 INFO L225 Difference]: With dead ends: 136 [2018-02-04 17:51:40,140 INFO L226 Difference]: Without dead ends: 134 [2018-02-04 17:51:40,141 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 183 GetRequests, 77 SyntacticMatches, 0 SemanticMatches, 106 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5401 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=4347, Invalid=7209, Unknown=0, NotChecked=0, Total=11556 [2018-02-04 17:51:40,141 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 134 states. [2018-02-04 17:51:40,142 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 134 to 134. [2018-02-04 17:51:40,142 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 134 states. [2018-02-04 17:51:40,142 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 134 states to 134 states and 139 transitions. [2018-02-04 17:51:40,142 INFO L78 Accepts]: Start accepts. Automaton has 134 states and 139 transitions. Word has length 128 [2018-02-04 17:51:40,143 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 17:51:40,143 INFO L432 AbstractCegarLoop]: Abstraction has 134 states and 139 transitions. [2018-02-04 17:51:40,143 INFO L433 AbstractCegarLoop]: Interpolant automaton has 106 states. [2018-02-04 17:51:40,143 INFO L276 IsEmpty]: Start isEmpty. Operand 134 states and 139 transitions. [2018-02-04 17:51:40,143 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 130 [2018-02-04 17:51:40,143 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 17:51:40,143 INFO L351 BasicCegarLoop]: trace histogram [51, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 17:51:40,143 INFO L371 AbstractCegarLoop]: === Iteration 70 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-04 17:51:40,143 INFO L82 PathProgramCache]: Analyzing trace with hash -1892725869, now seen corresponding path program 41 times [2018-02-04 17:51:40,143 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 17:51:40,143 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 17:51:40,144 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:51:40,144 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 17:51:40,144 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:51:40,159 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 17:51:40,160 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 17:51:40,889 INFO L134 CoverageAnalysis]: Checked inductivity of 1380 backedges. 0 proven. 1326 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:51:40,889 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 17:51:40,889 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 17:51:40,889 INFO L109 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-02-04 17:51:40,927 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 27 check-sat command(s) [2018-02-04 17:51:40,927 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 17:51:40,932 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 17:51:41,642 INFO L134 CoverageAnalysis]: Checked inductivity of 1380 backedges. 0 proven. 1326 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:51:41,643 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 17:51:41,643 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [55, 55] total 108 [2018-02-04 17:51:41,643 INFO L409 AbstractCegarLoop]: Interpolant automaton has 108 states [2018-02-04 17:51:41,643 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 108 interpolants. [2018-02-04 17:51:41,644 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=4347, Invalid=7209, Unknown=0, NotChecked=0, Total=11556 [2018-02-04 17:51:41,644 INFO L87 Difference]: Start difference. First operand 134 states and 139 transitions. Second operand 108 states. [2018-02-04 17:51:41,746 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 17:51:41,746 INFO L93 Difference]: Finished difference Result 137 states and 142 transitions. [2018-02-04 17:51:41,747 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 55 states. [2018-02-04 17:51:41,747 INFO L78 Accepts]: Start accepts. Automaton has 108 states. Word has length 129 [2018-02-04 17:51:41,747 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 17:51:41,747 INFO L225 Difference]: With dead ends: 137 [2018-02-04 17:51:41,747 INFO L226 Difference]: Without dead ends: 135 [2018-02-04 17:51:41,748 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 185 GetRequests, 77 SyntacticMatches, 0 SemanticMatches, 108 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5611 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=4510, Invalid=7480, Unknown=0, NotChecked=0, Total=11990 [2018-02-04 17:51:41,748 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 135 states. [2018-02-04 17:51:41,749 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 135 to 135. [2018-02-04 17:51:41,749 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 135 states. [2018-02-04 17:51:41,749 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 135 states to 135 states and 140 transitions. [2018-02-04 17:51:41,749 INFO L78 Accepts]: Start accepts. Automaton has 135 states and 140 transitions. Word has length 129 [2018-02-04 17:51:41,749 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 17:51:41,749 INFO L432 AbstractCegarLoop]: Abstraction has 135 states and 140 transitions. [2018-02-04 17:51:41,749 INFO L433 AbstractCegarLoop]: Interpolant automaton has 108 states. [2018-02-04 17:51:41,749 INFO L276 IsEmpty]: Start isEmpty. Operand 135 states and 140 transitions. [2018-02-04 17:51:41,749 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 131 [2018-02-04 17:51:41,750 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 17:51:41,750 INFO L351 BasicCegarLoop]: trace histogram [52, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 17:51:41,750 INFO L371 AbstractCegarLoop]: === Iteration 71 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-04 17:51:41,750 INFO L82 PathProgramCache]: Analyzing trace with hash -1307224416, now seen corresponding path program 42 times [2018-02-04 17:51:41,750 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 17:51:41,750 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 17:51:41,750 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:51:41,750 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 17:51:41,750 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:51:41,766 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 17:51:41,767 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 17:51:42,586 INFO L134 CoverageAnalysis]: Checked inductivity of 1432 backedges. 0 proven. 1378 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:51:42,586 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 17:51:42,586 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 17:51:42,586 INFO L109 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-02-04 17:51:42,617 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 27 check-sat command(s) [2018-02-04 17:51:42,617 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 17:51:42,622 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 17:51:43,388 INFO L134 CoverageAnalysis]: Checked inductivity of 1432 backedges. 0 proven. 1378 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:51:43,388 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 17:51:43,389 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [56, 56] total 110 [2018-02-04 17:51:43,389 INFO L409 AbstractCegarLoop]: Interpolant automaton has 110 states [2018-02-04 17:51:43,390 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 110 interpolants. [2018-02-04 17:51:43,390 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=4510, Invalid=7480, Unknown=0, NotChecked=0, Total=11990 [2018-02-04 17:51:43,391 INFO L87 Difference]: Start difference. First operand 135 states and 140 transitions. Second operand 110 states. [2018-02-04 17:51:43,530 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 17:51:43,530 INFO L93 Difference]: Finished difference Result 138 states and 143 transitions. [2018-02-04 17:51:43,530 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 56 states. [2018-02-04 17:51:43,531 INFO L78 Accepts]: Start accepts. Automaton has 110 states. Word has length 130 [2018-02-04 17:51:43,531 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 17:51:43,531 INFO L225 Difference]: With dead ends: 138 [2018-02-04 17:51:43,531 INFO L226 Difference]: Without dead ends: 136 [2018-02-04 17:51:43,532 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 187 GetRequests, 77 SyntacticMatches, 0 SemanticMatches, 110 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5825 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=4676, Invalid=7756, Unknown=0, NotChecked=0, Total=12432 [2018-02-04 17:51:43,533 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 136 states. [2018-02-04 17:51:43,533 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 136 to 136. [2018-02-04 17:51:43,533 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 136 states. [2018-02-04 17:51:43,534 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 136 states to 136 states and 141 transitions. [2018-02-04 17:51:43,534 INFO L78 Accepts]: Start accepts. Automaton has 136 states and 141 transitions. Word has length 130 [2018-02-04 17:51:43,534 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 17:51:43,534 INFO L432 AbstractCegarLoop]: Abstraction has 136 states and 141 transitions. [2018-02-04 17:51:43,534 INFO L433 AbstractCegarLoop]: Interpolant automaton has 110 states. [2018-02-04 17:51:43,534 INFO L276 IsEmpty]: Start isEmpty. Operand 136 states and 141 transitions. [2018-02-04 17:51:43,534 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 132 [2018-02-04 17:51:43,534 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 17:51:43,535 INFO L351 BasicCegarLoop]: trace histogram [53, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 17:51:43,535 INFO L371 AbstractCegarLoop]: === Iteration 72 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-04 17:51:43,535 INFO L82 PathProgramCache]: Analyzing trace with hash -336548557, now seen corresponding path program 43 times [2018-02-04 17:51:43,535 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 17:51:43,535 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 17:51:43,536 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:51:43,536 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 17:51:43,536 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:51:43,553 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 17:51:43,554 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 17:51:44,480 INFO L134 CoverageAnalysis]: Checked inductivity of 1485 backedges. 0 proven. 1431 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:51:44,480 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 17:51:44,481 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 17:51:44,481 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 17:51:44,494 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 17:51:44,498 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 17:51:45,246 INFO L134 CoverageAnalysis]: Checked inductivity of 1485 backedges. 0 proven. 1431 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:51:45,246 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 17:51:45,247 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [57, 57] total 112 [2018-02-04 17:51:45,247 INFO L409 AbstractCegarLoop]: Interpolant automaton has 112 states [2018-02-04 17:51:45,248 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 112 interpolants. [2018-02-04 17:51:45,248 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=4676, Invalid=7756, Unknown=0, NotChecked=0, Total=12432 [2018-02-04 17:51:45,248 INFO L87 Difference]: Start difference. First operand 136 states and 141 transitions. Second operand 112 states. [2018-02-04 17:51:45,372 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 17:51:45,372 INFO L93 Difference]: Finished difference Result 139 states and 144 transitions. [2018-02-04 17:51:45,373 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 57 states. [2018-02-04 17:51:45,373 INFO L78 Accepts]: Start accepts. Automaton has 112 states. Word has length 131 [2018-02-04 17:51:45,373 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 17:51:45,373 INFO L225 Difference]: With dead ends: 139 [2018-02-04 17:51:45,373 INFO L226 Difference]: Without dead ends: 137 [2018-02-04 17:51:45,374 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 189 GetRequests, 77 SyntacticMatches, 0 SemanticMatches, 112 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6043 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=4845, Invalid=8037, Unknown=0, NotChecked=0, Total=12882 [2018-02-04 17:51:45,374 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 137 states. [2018-02-04 17:51:45,375 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 137 to 137. [2018-02-04 17:51:45,375 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 137 states. [2018-02-04 17:51:45,375 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 137 states to 137 states and 142 transitions. [2018-02-04 17:51:45,375 INFO L78 Accepts]: Start accepts. Automaton has 137 states and 142 transitions. Word has length 131 [2018-02-04 17:51:45,375 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 17:51:45,375 INFO L432 AbstractCegarLoop]: Abstraction has 137 states and 142 transitions. [2018-02-04 17:51:45,375 INFO L433 AbstractCegarLoop]: Interpolant automaton has 112 states. [2018-02-04 17:51:45,375 INFO L276 IsEmpty]: Start isEmpty. Operand 137 states and 142 transitions. [2018-02-04 17:51:45,376 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 133 [2018-02-04 17:51:45,376 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 17:51:45,376 INFO L351 BasicCegarLoop]: trace histogram [54, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 17:51:45,376 INFO L371 AbstractCegarLoop]: === Iteration 73 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-04 17:51:45,376 INFO L82 PathProgramCache]: Analyzing trace with hash -310368000, now seen corresponding path program 44 times [2018-02-04 17:51:45,376 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 17:51:45,376 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 17:51:45,376 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:51:45,377 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 17:51:45,377 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:51:45,394 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 17:51:45,394 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 17:51:46,272 INFO L134 CoverageAnalysis]: Checked inductivity of 1539 backedges. 0 proven. 1485 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:51:46,272 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 17:51:46,272 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 17:51:46,273 INFO L109 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-02-04 17:51:46,290 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-02-04 17:51:46,290 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 17:51:46,293 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 17:51:47,013 INFO L134 CoverageAnalysis]: Checked inductivity of 1539 backedges. 0 proven. 1485 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:51:47,013 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 17:51:47,013 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [58, 58] total 114 [2018-02-04 17:51:47,014 INFO L409 AbstractCegarLoop]: Interpolant automaton has 114 states [2018-02-04 17:51:47,014 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 114 interpolants. [2018-02-04 17:51:47,015 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=4845, Invalid=8037, Unknown=0, NotChecked=0, Total=12882 [2018-02-04 17:51:47,015 INFO L87 Difference]: Start difference. First operand 137 states and 142 transitions. Second operand 114 states. [2018-02-04 17:51:47,145 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 17:51:47,145 INFO L93 Difference]: Finished difference Result 140 states and 145 transitions. [2018-02-04 17:51:47,145 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 58 states. [2018-02-04 17:51:47,146 INFO L78 Accepts]: Start accepts. Automaton has 114 states. Word has length 132 [2018-02-04 17:51:47,146 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 17:51:47,146 INFO L225 Difference]: With dead ends: 140 [2018-02-04 17:51:47,146 INFO L226 Difference]: Without dead ends: 138 [2018-02-04 17:51:47,147 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 191 GetRequests, 77 SyntacticMatches, 0 SemanticMatches, 114 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6265 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=5017, Invalid=8323, Unknown=0, NotChecked=0, Total=13340 [2018-02-04 17:51:47,147 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 138 states. [2018-02-04 17:51:47,148 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 138 to 138. [2018-02-04 17:51:47,148 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 138 states. [2018-02-04 17:51:47,148 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 138 states to 138 states and 143 transitions. [2018-02-04 17:51:47,148 INFO L78 Accepts]: Start accepts. Automaton has 138 states and 143 transitions. Word has length 132 [2018-02-04 17:51:47,148 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 17:51:47,148 INFO L432 AbstractCegarLoop]: Abstraction has 138 states and 143 transitions. [2018-02-04 17:51:47,148 INFO L433 AbstractCegarLoop]: Interpolant automaton has 114 states. [2018-02-04 17:51:47,148 INFO L276 IsEmpty]: Start isEmpty. Operand 138 states and 143 transitions. [2018-02-04 17:51:47,149 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 134 [2018-02-04 17:51:47,149 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 17:51:47,149 INFO L351 BasicCegarLoop]: trace histogram [55, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 17:51:47,149 INFO L371 AbstractCegarLoop]: === Iteration 74 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-04 17:51:47,149 INFO L82 PathProgramCache]: Analyzing trace with hash 501229267, now seen corresponding path program 45 times [2018-02-04 17:51:47,149 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 17:51:47,149 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 17:51:47,150 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:51:47,150 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 17:51:47,150 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:51:47,168 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 17:51:47,168 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 17:51:48,080 INFO L134 CoverageAnalysis]: Checked inductivity of 1594 backedges. 0 proven. 1540 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:51:48,080 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 17:51:48,080 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 17:51:48,080 INFO L109 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-02-04 17:51:48,106 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 29 check-sat command(s) [2018-02-04 17:51:48,106 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 17:51:48,112 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 17:51:48,841 INFO L134 CoverageAnalysis]: Checked inductivity of 1594 backedges. 0 proven. 1540 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:51:48,841 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 17:51:48,841 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [59, 59] total 116 [2018-02-04 17:51:48,841 INFO L409 AbstractCegarLoop]: Interpolant automaton has 116 states [2018-02-04 17:51:48,842 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 116 interpolants. [2018-02-04 17:51:48,843 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5017, Invalid=8323, Unknown=0, NotChecked=0, Total=13340 [2018-02-04 17:51:48,843 INFO L87 Difference]: Start difference. First operand 138 states and 143 transitions. Second operand 116 states. [2018-02-04 17:51:48,987 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 17:51:48,988 INFO L93 Difference]: Finished difference Result 141 states and 146 transitions. [2018-02-04 17:51:48,988 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 59 states. [2018-02-04 17:51:48,988 INFO L78 Accepts]: Start accepts. Automaton has 116 states. Word has length 133 [2018-02-04 17:51:48,988 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 17:51:48,988 INFO L225 Difference]: With dead ends: 141 [2018-02-04 17:51:48,988 INFO L226 Difference]: Without dead ends: 139 [2018-02-04 17:51:48,989 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 193 GetRequests, 77 SyntacticMatches, 0 SemanticMatches, 116 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6491 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=5192, Invalid=8614, Unknown=0, NotChecked=0, Total=13806 [2018-02-04 17:51:48,989 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 139 states. [2018-02-04 17:51:48,990 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 139 to 139. [2018-02-04 17:51:48,990 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 139 states. [2018-02-04 17:51:48,990 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 139 states to 139 states and 144 transitions. [2018-02-04 17:51:48,991 INFO L78 Accepts]: Start accepts. Automaton has 139 states and 144 transitions. Word has length 133 [2018-02-04 17:51:48,991 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 17:51:48,991 INFO L432 AbstractCegarLoop]: Abstraction has 139 states and 144 transitions. [2018-02-04 17:51:48,991 INFO L433 AbstractCegarLoop]: Interpolant automaton has 116 states. [2018-02-04 17:51:48,991 INFO L276 IsEmpty]: Start isEmpty. Operand 139 states and 144 transitions. [2018-02-04 17:51:48,991 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 135 [2018-02-04 17:51:48,991 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 17:51:48,992 INFO L351 BasicCegarLoop]: trace histogram [56, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 17:51:48,992 INFO L371 AbstractCegarLoop]: === Iteration 75 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-04 17:51:48,992 INFO L82 PathProgramCache]: Analyzing trace with hash -109059232, now seen corresponding path program 46 times [2018-02-04 17:51:48,992 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 17:51:48,992 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 17:51:48,992 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:51:48,992 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 17:51:48,992 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:51:49,009 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 17:51:49,010 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 17:51:50,021 INFO L134 CoverageAnalysis]: Checked inductivity of 1650 backedges. 0 proven. 1596 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:51:50,021 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 17:51:50,021 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 17:51:50,022 INFO L109 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-02-04 17:51:50,048 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-02-04 17:51:50,048 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 17:51:50,053 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 17:51:50,856 INFO L134 CoverageAnalysis]: Checked inductivity of 1650 backedges. 0 proven. 1596 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:51:50,856 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 17:51:50,856 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [60, 60] total 118 [2018-02-04 17:51:50,856 INFO L409 AbstractCegarLoop]: Interpolant automaton has 118 states [2018-02-04 17:51:50,857 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 118 interpolants. [2018-02-04 17:51:50,857 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5192, Invalid=8614, Unknown=0, NotChecked=0, Total=13806 [2018-02-04 17:51:50,857 INFO L87 Difference]: Start difference. First operand 139 states and 144 transitions. Second operand 118 states. [2018-02-04 17:51:50,989 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 17:51:50,989 INFO L93 Difference]: Finished difference Result 142 states and 147 transitions. [2018-02-04 17:51:50,990 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 60 states. [2018-02-04 17:51:50,990 INFO L78 Accepts]: Start accepts. Automaton has 118 states. Word has length 134 [2018-02-04 17:51:50,990 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 17:51:50,990 INFO L225 Difference]: With dead ends: 142 [2018-02-04 17:51:50,990 INFO L226 Difference]: Without dead ends: 140 [2018-02-04 17:51:50,991 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 195 GetRequests, 77 SyntacticMatches, 0 SemanticMatches, 118 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6721 ImplicationChecksByTransitivity, 1.7s TimeCoverageRelationStatistics Valid=5370, Invalid=8910, Unknown=0, NotChecked=0, Total=14280 [2018-02-04 17:51:50,991 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 140 states. [2018-02-04 17:51:50,992 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 140 to 140. [2018-02-04 17:51:50,992 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 140 states. [2018-02-04 17:51:50,992 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 140 states to 140 states and 145 transitions. [2018-02-04 17:51:50,992 INFO L78 Accepts]: Start accepts. Automaton has 140 states and 145 transitions. Word has length 134 [2018-02-04 17:51:50,992 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 17:51:50,992 INFO L432 AbstractCegarLoop]: Abstraction has 140 states and 145 transitions. [2018-02-04 17:51:50,992 INFO L433 AbstractCegarLoop]: Interpolant automaton has 118 states. [2018-02-04 17:51:50,992 INFO L276 IsEmpty]: Start isEmpty. Operand 140 states and 145 transitions. [2018-02-04 17:51:50,993 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 136 [2018-02-04 17:51:50,993 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 17:51:50,993 INFO L351 BasicCegarLoop]: trace histogram [57, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 17:51:50,993 INFO L371 AbstractCegarLoop]: === Iteration 76 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-04 17:51:50,993 INFO L82 PathProgramCache]: Analyzing trace with hash -1848133517, now seen corresponding path program 47 times [2018-02-04 17:51:50,993 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 17:51:50,993 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 17:51:50,993 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:51:50,993 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 17:51:50,993 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:51:51,012 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 17:51:51,013 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 17:51:51,931 INFO L134 CoverageAnalysis]: Checked inductivity of 1707 backedges. 0 proven. 1653 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:51:51,931 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 17:51:51,931 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 17:51:51,932 INFO L109 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-02-04 17:51:51,971 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 30 check-sat command(s) [2018-02-04 17:51:51,971 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 17:51:51,975 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 17:51:52,761 INFO L134 CoverageAnalysis]: Checked inductivity of 1707 backedges. 0 proven. 1653 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:51:52,761 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 17:51:52,761 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [61, 61] total 120 [2018-02-04 17:51:52,762 INFO L409 AbstractCegarLoop]: Interpolant automaton has 120 states [2018-02-04 17:51:52,762 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 120 interpolants. [2018-02-04 17:51:52,763 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5370, Invalid=8910, Unknown=0, NotChecked=0, Total=14280 [2018-02-04 17:51:52,763 INFO L87 Difference]: Start difference. First operand 140 states and 145 transitions. Second operand 120 states. [2018-02-04 17:51:52,898 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 17:51:52,899 INFO L93 Difference]: Finished difference Result 143 states and 148 transitions. [2018-02-04 17:51:52,899 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 61 states. [2018-02-04 17:51:52,899 INFO L78 Accepts]: Start accepts. Automaton has 120 states. Word has length 135 [2018-02-04 17:51:52,899 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 17:51:52,899 INFO L225 Difference]: With dead ends: 143 [2018-02-04 17:51:52,899 INFO L226 Difference]: Without dead ends: 141 [2018-02-04 17:51:52,900 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 197 GetRequests, 77 SyntacticMatches, 0 SemanticMatches, 120 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6955 ImplicationChecksByTransitivity, 1.6s TimeCoverageRelationStatistics Valid=5551, Invalid=9211, Unknown=0, NotChecked=0, Total=14762 [2018-02-04 17:51:52,900 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 141 states. [2018-02-04 17:51:52,901 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 141 to 141. [2018-02-04 17:51:52,901 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 141 states. [2018-02-04 17:51:52,901 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 141 states to 141 states and 146 transitions. [2018-02-04 17:51:52,901 INFO L78 Accepts]: Start accepts. Automaton has 141 states and 146 transitions. Word has length 135 [2018-02-04 17:51:52,901 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 17:51:52,901 INFO L432 AbstractCegarLoop]: Abstraction has 141 states and 146 transitions. [2018-02-04 17:51:52,901 INFO L433 AbstractCegarLoop]: Interpolant automaton has 120 states. [2018-02-04 17:51:52,901 INFO L276 IsEmpty]: Start isEmpty. Operand 141 states and 146 transitions. [2018-02-04 17:51:52,902 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 137 [2018-02-04 17:51:52,902 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 17:51:52,902 INFO L351 BasicCegarLoop]: trace histogram [58, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 17:51:52,902 INFO L371 AbstractCegarLoop]: === Iteration 77 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-04 17:51:52,902 INFO L82 PathProgramCache]: Analyzing trace with hash 75138496, now seen corresponding path program 48 times [2018-02-04 17:51:52,902 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 17:51:52,902 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 17:51:52,902 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:51:52,902 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 17:51:52,902 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:51:52,921 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 17:51:52,921 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 17:51:53,869 INFO L134 CoverageAnalysis]: Checked inductivity of 1765 backedges. 0 proven. 1711 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:51:53,869 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 17:51:53,869 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 17:51:53,869 INFO L109 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-02-04 17:51:53,898 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 30 check-sat command(s) [2018-02-04 17:51:53,898 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 17:51:53,903 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 17:51:54,737 INFO L134 CoverageAnalysis]: Checked inductivity of 1765 backedges. 0 proven. 1711 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:51:54,738 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 17:51:54,738 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [62, 62] total 122 [2018-02-04 17:51:54,738 INFO L409 AbstractCegarLoop]: Interpolant automaton has 122 states [2018-02-04 17:51:54,739 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 122 interpolants. [2018-02-04 17:51:54,740 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5551, Invalid=9211, Unknown=0, NotChecked=0, Total=14762 [2018-02-04 17:51:54,740 INFO L87 Difference]: Start difference. First operand 141 states and 146 transitions. Second operand 122 states. [2018-02-04 17:51:54,831 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 17:51:54,831 INFO L93 Difference]: Finished difference Result 144 states and 149 transitions. [2018-02-04 17:51:54,832 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 62 states. [2018-02-04 17:51:54,832 INFO L78 Accepts]: Start accepts. Automaton has 122 states. Word has length 136 [2018-02-04 17:51:54,832 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 17:51:54,832 INFO L225 Difference]: With dead ends: 144 [2018-02-04 17:51:54,832 INFO L226 Difference]: Without dead ends: 142 [2018-02-04 17:51:54,833 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 199 GetRequests, 77 SyntacticMatches, 0 SemanticMatches, 122 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7193 ImplicationChecksByTransitivity, 1.6s TimeCoverageRelationStatistics Valid=5735, Invalid=9517, Unknown=0, NotChecked=0, Total=15252 [2018-02-04 17:51:54,833 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 142 states. [2018-02-04 17:51:54,834 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 142 to 142. [2018-02-04 17:51:54,834 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 142 states. [2018-02-04 17:51:54,834 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 142 states to 142 states and 147 transitions. [2018-02-04 17:51:54,835 INFO L78 Accepts]: Start accepts. Automaton has 142 states and 147 transitions. Word has length 136 [2018-02-04 17:51:54,835 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 17:51:54,835 INFO L432 AbstractCegarLoop]: Abstraction has 142 states and 147 transitions. [2018-02-04 17:51:54,835 INFO L433 AbstractCegarLoop]: Interpolant automaton has 122 states. [2018-02-04 17:51:54,835 INFO L276 IsEmpty]: Start isEmpty. Operand 142 states and 147 transitions. [2018-02-04 17:51:54,835 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 138 [2018-02-04 17:51:54,836 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 17:51:54,836 INFO L351 BasicCegarLoop]: trace histogram [59, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 17:51:54,836 INFO L371 AbstractCegarLoop]: === Iteration 78 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-04 17:51:54,836 INFO L82 PathProgramCache]: Analyzing trace with hash -432971245, now seen corresponding path program 49 times [2018-02-04 17:51:54,836 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 17:51:54,836 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 17:51:54,836 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:51:54,836 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 17:51:54,837 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:51:54,856 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 17:51:54,857 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 17:51:55,983 INFO L134 CoverageAnalysis]: Checked inductivity of 1824 backedges. 0 proven. 1770 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:51:55,983 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 17:51:55,983 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 17:51:55,983 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 17:51:56,000 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 17:51:56,004 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 17:51:56,904 INFO L134 CoverageAnalysis]: Checked inductivity of 1824 backedges. 0 proven. 1770 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:51:56,905 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 17:51:56,905 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [63, 63] total 124 [2018-02-04 17:51:56,905 INFO L409 AbstractCegarLoop]: Interpolant automaton has 124 states [2018-02-04 17:51:56,906 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 124 interpolants. [2018-02-04 17:51:56,907 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5735, Invalid=9517, Unknown=0, NotChecked=0, Total=15252 [2018-02-04 17:51:56,907 INFO L87 Difference]: Start difference. First operand 142 states and 147 transitions. Second operand 124 states. [2018-02-04 17:51:57,039 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 17:51:57,039 INFO L93 Difference]: Finished difference Result 145 states and 150 transitions. [2018-02-04 17:51:57,041 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 63 states. [2018-02-04 17:51:57,041 INFO L78 Accepts]: Start accepts. Automaton has 124 states. Word has length 137 [2018-02-04 17:51:57,041 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 17:51:57,041 INFO L225 Difference]: With dead ends: 145 [2018-02-04 17:51:57,041 INFO L226 Difference]: Without dead ends: 143 [2018-02-04 17:51:57,042 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 201 GetRequests, 77 SyntacticMatches, 0 SemanticMatches, 124 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7435 ImplicationChecksByTransitivity, 1.8s TimeCoverageRelationStatistics Valid=5922, Invalid=9828, Unknown=0, NotChecked=0, Total=15750 [2018-02-04 17:51:57,043 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 143 states. [2018-02-04 17:51:57,043 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 143 to 143. [2018-02-04 17:51:57,043 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 143 states. [2018-02-04 17:51:57,044 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 143 states to 143 states and 148 transitions. [2018-02-04 17:51:57,044 INFO L78 Accepts]: Start accepts. Automaton has 143 states and 148 transitions. Word has length 137 [2018-02-04 17:51:57,044 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 17:51:57,044 INFO L432 AbstractCegarLoop]: Abstraction has 143 states and 148 transitions. [2018-02-04 17:51:57,044 INFO L433 AbstractCegarLoop]: Interpolant automaton has 124 states. [2018-02-04 17:51:57,044 INFO L276 IsEmpty]: Start isEmpty. Operand 143 states and 148 transitions. [2018-02-04 17:51:57,044 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 139 [2018-02-04 17:51:57,044 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 17:51:57,044 INFO L351 BasicCegarLoop]: trace histogram [60, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 17:51:57,044 INFO L371 AbstractCegarLoop]: === Iteration 79 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-04 17:51:57,044 INFO L82 PathProgramCache]: Analyzing trace with hash 995495968, now seen corresponding path program 50 times [2018-02-04 17:51:57,045 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 17:51:57,045 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 17:51:57,045 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:51:57,045 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 17:51:57,045 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:51:57,066 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 17:51:57,066 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 17:51:58,115 INFO L134 CoverageAnalysis]: Checked inductivity of 1884 backedges. 0 proven. 1830 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:51:58,115 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 17:51:58,115 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 17:51:58,115 INFO L109 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-02-04 17:51:58,135 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-02-04 17:51:58,135 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 17:51:58,139 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 17:51:59,004 INFO L134 CoverageAnalysis]: Checked inductivity of 1884 backedges. 0 proven. 1830 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:51:59,004 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 17:51:59,005 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [64, 64] total 126 [2018-02-04 17:51:59,005 INFO L409 AbstractCegarLoop]: Interpolant automaton has 126 states [2018-02-04 17:51:59,006 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 126 interpolants. [2018-02-04 17:51:59,007 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5922, Invalid=9828, Unknown=0, NotChecked=0, Total=15750 [2018-02-04 17:51:59,007 INFO L87 Difference]: Start difference. First operand 143 states and 148 transitions. Second operand 126 states. [2018-02-04 17:51:59,146 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 17:51:59,146 INFO L93 Difference]: Finished difference Result 146 states and 151 transitions. [2018-02-04 17:51:59,147 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 64 states. [2018-02-04 17:51:59,147 INFO L78 Accepts]: Start accepts. Automaton has 126 states. Word has length 138 [2018-02-04 17:51:59,147 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 17:51:59,147 INFO L225 Difference]: With dead ends: 146 [2018-02-04 17:51:59,147 INFO L226 Difference]: Without dead ends: 144 [2018-02-04 17:51:59,148 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 203 GetRequests, 77 SyntacticMatches, 0 SemanticMatches, 126 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7681 ImplicationChecksByTransitivity, 1.8s TimeCoverageRelationStatistics Valid=6112, Invalid=10144, Unknown=0, NotChecked=0, Total=16256 [2018-02-04 17:51:59,149 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 144 states. [2018-02-04 17:51:59,149 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 144 to 144. [2018-02-04 17:51:59,149 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 144 states. [2018-02-04 17:51:59,150 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 144 states to 144 states and 149 transitions. [2018-02-04 17:51:59,150 INFO L78 Accepts]: Start accepts. Automaton has 144 states and 149 transitions. Word has length 138 [2018-02-04 17:51:59,150 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 17:51:59,150 INFO L432 AbstractCegarLoop]: Abstraction has 144 states and 149 transitions. [2018-02-04 17:51:59,150 INFO L433 AbstractCegarLoop]: Interpolant automaton has 126 states. [2018-02-04 17:51:59,150 INFO L276 IsEmpty]: Start isEmpty. Operand 144 states and 149 transitions. [2018-02-04 17:51:59,150 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 140 [2018-02-04 17:51:59,150 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 17:51:59,150 INFO L351 BasicCegarLoop]: trace histogram [61, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 17:51:59,150 INFO L371 AbstractCegarLoop]: === Iteration 80 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-04 17:51:59,150 INFO L82 PathProgramCache]: Analyzing trace with hash -1966660685, now seen corresponding path program 51 times [2018-02-04 17:51:59,151 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 17:51:59,151 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 17:51:59,151 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:51:59,151 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 17:51:59,151 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:51:59,172 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 17:51:59,172 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 17:52:00,300 INFO L134 CoverageAnalysis]: Checked inductivity of 1945 backedges. 0 proven. 1891 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:52:00,300 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 17:52:00,300 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 17:52:00,300 INFO L109 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-02-04 17:52:00,344 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 32 check-sat command(s) [2018-02-04 17:52:00,344 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 17:52:00,354 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 17:52:01,280 INFO L134 CoverageAnalysis]: Checked inductivity of 1945 backedges. 0 proven. 1891 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:52:01,280 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 17:52:01,280 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [65, 65] total 128 [2018-02-04 17:52:01,280 INFO L409 AbstractCegarLoop]: Interpolant automaton has 128 states [2018-02-04 17:52:01,281 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 128 interpolants. [2018-02-04 17:52:01,282 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=6112, Invalid=10144, Unknown=0, NotChecked=0, Total=16256 [2018-02-04 17:52:01,282 INFO L87 Difference]: Start difference. First operand 144 states and 149 transitions. Second operand 128 states. [2018-02-04 17:52:01,440 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 17:52:01,440 INFO L93 Difference]: Finished difference Result 147 states and 152 transitions. [2018-02-04 17:52:01,440 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 65 states. [2018-02-04 17:52:01,440 INFO L78 Accepts]: Start accepts. Automaton has 128 states. Word has length 139 [2018-02-04 17:52:01,440 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 17:52:01,441 INFO L225 Difference]: With dead ends: 147 [2018-02-04 17:52:01,441 INFO L226 Difference]: Without dead ends: 145 [2018-02-04 17:52:01,441 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 205 GetRequests, 77 SyntacticMatches, 0 SemanticMatches, 128 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7931 ImplicationChecksByTransitivity, 1.9s TimeCoverageRelationStatistics Valid=6305, Invalid=10465, Unknown=0, NotChecked=0, Total=16770 [2018-02-04 17:52:01,442 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 145 states. [2018-02-04 17:52:01,442 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 145 to 145. [2018-02-04 17:52:01,442 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 145 states. [2018-02-04 17:52:01,443 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 145 states to 145 states and 150 transitions. [2018-02-04 17:52:01,443 INFO L78 Accepts]: Start accepts. Automaton has 145 states and 150 transitions. Word has length 139 [2018-02-04 17:52:01,443 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 17:52:01,443 INFO L432 AbstractCegarLoop]: Abstraction has 145 states and 150 transitions. [2018-02-04 17:52:01,443 INFO L433 AbstractCegarLoop]: Interpolant automaton has 128 states. [2018-02-04 17:52:01,443 INFO L276 IsEmpty]: Start isEmpty. Operand 145 states and 150 transitions. [2018-02-04 17:52:01,443 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 141 [2018-02-04 17:52:01,443 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 17:52:01,443 INFO L351 BasicCegarLoop]: trace histogram [62, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 17:52:01,443 INFO L371 AbstractCegarLoop]: === Iteration 81 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-04 17:52:01,443 INFO L82 PathProgramCache]: Analyzing trace with hash 695763584, now seen corresponding path program 52 times [2018-02-04 17:52:01,443 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 17:52:01,444 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 17:52:01,444 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:52:01,444 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 17:52:01,444 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:52:01,465 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 17:52:01,466 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 17:52:02,820 INFO L134 CoverageAnalysis]: Checked inductivity of 2007 backedges. 0 proven. 1953 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:52:02,820 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 17:52:02,821 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 17:52:02,821 INFO L109 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-02-04 17:52:02,858 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-02-04 17:52:02,858 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 17:52:02,864 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 17:52:03,946 INFO L134 CoverageAnalysis]: Checked inductivity of 2007 backedges. 0 proven. 1953 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:52:03,946 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 17:52:03,946 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [66, 66] total 130 [2018-02-04 17:52:03,946 INFO L409 AbstractCegarLoop]: Interpolant automaton has 130 states [2018-02-04 17:52:03,947 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 130 interpolants. [2018-02-04 17:52:03,948 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=6305, Invalid=10465, Unknown=0, NotChecked=0, Total=16770 [2018-02-04 17:52:03,948 INFO L87 Difference]: Start difference. First operand 145 states and 150 transitions. Second operand 130 states. [2018-02-04 17:52:04,091 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 17:52:04,091 INFO L93 Difference]: Finished difference Result 148 states and 153 transitions. [2018-02-04 17:52:04,092 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 66 states. [2018-02-04 17:52:04,092 INFO L78 Accepts]: Start accepts. Automaton has 130 states. Word has length 140 [2018-02-04 17:52:04,092 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 17:52:04,092 INFO L225 Difference]: With dead ends: 148 [2018-02-04 17:52:04,092 INFO L226 Difference]: Without dead ends: 146 [2018-02-04 17:52:04,093 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 207 GetRequests, 77 SyntacticMatches, 0 SemanticMatches, 130 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8185 ImplicationChecksByTransitivity, 2.3s TimeCoverageRelationStatistics Valid=6501, Invalid=10791, Unknown=0, NotChecked=0, Total=17292 [2018-02-04 17:52:04,093 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 146 states. [2018-02-04 17:52:04,094 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 146 to 146. [2018-02-04 17:52:04,094 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 146 states. [2018-02-04 17:52:04,094 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 146 states to 146 states and 151 transitions. [2018-02-04 17:52:04,094 INFO L78 Accepts]: Start accepts. Automaton has 146 states and 151 transitions. Word has length 140 [2018-02-04 17:52:04,094 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 17:52:04,095 INFO L432 AbstractCegarLoop]: Abstraction has 146 states and 151 transitions. [2018-02-04 17:52:04,095 INFO L433 AbstractCegarLoop]: Interpolant automaton has 130 states. [2018-02-04 17:52:04,095 INFO L276 IsEmpty]: Start isEmpty. Operand 146 states and 151 transitions. [2018-02-04 17:52:04,095 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 142 [2018-02-04 17:52:04,095 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 17:52:04,095 INFO L351 BasicCegarLoop]: trace histogram [63, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 17:52:04,095 INFO L371 AbstractCegarLoop]: === Iteration 82 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-04 17:52:04,095 INFO L82 PathProgramCache]: Analyzing trace with hash 1626537299, now seen corresponding path program 53 times [2018-02-04 17:52:04,095 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 17:52:04,095 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 17:52:04,096 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:52:04,096 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 17:52:04,096 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:52:04,118 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 17:52:04,119 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 17:52:05,284 INFO L134 CoverageAnalysis]: Checked inductivity of 2070 backedges. 0 proven. 2016 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:52:05,285 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 17:52:05,285 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 17:52:05,285 INFO L109 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-02-04 17:52:05,357 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 33 check-sat command(s) [2018-02-04 17:52:05,357 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 17:52:05,361 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 17:52:06,292 INFO L134 CoverageAnalysis]: Checked inductivity of 2070 backedges. 0 proven. 2016 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:52:06,292 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 17:52:06,292 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [67, 67] total 132 [2018-02-04 17:52:06,292 INFO L409 AbstractCegarLoop]: Interpolant automaton has 132 states [2018-02-04 17:52:06,293 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 132 interpolants. [2018-02-04 17:52:06,294 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=6501, Invalid=10791, Unknown=0, NotChecked=0, Total=17292 [2018-02-04 17:52:06,294 INFO L87 Difference]: Start difference. First operand 146 states and 151 transitions. Second operand 132 states. [2018-02-04 17:52:06,425 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 17:52:06,425 INFO L93 Difference]: Finished difference Result 149 states and 154 transitions. [2018-02-04 17:52:06,425 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 67 states. [2018-02-04 17:52:06,425 INFO L78 Accepts]: Start accepts. Automaton has 132 states. Word has length 141 [2018-02-04 17:52:06,426 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 17:52:06,426 INFO L225 Difference]: With dead ends: 149 [2018-02-04 17:52:06,426 INFO L226 Difference]: Without dead ends: 147 [2018-02-04 17:52:06,427 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 209 GetRequests, 77 SyntacticMatches, 0 SemanticMatches, 132 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8443 ImplicationChecksByTransitivity, 1.9s TimeCoverageRelationStatistics Valid=6700, Invalid=11122, Unknown=0, NotChecked=0, Total=17822 [2018-02-04 17:52:06,427 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 147 states. [2018-02-04 17:52:06,428 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 147 to 147. [2018-02-04 17:52:06,428 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 147 states. [2018-02-04 17:52:06,428 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 147 states to 147 states and 152 transitions. [2018-02-04 17:52:06,428 INFO L78 Accepts]: Start accepts. Automaton has 147 states and 152 transitions. Word has length 141 [2018-02-04 17:52:06,428 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 17:52:06,428 INFO L432 AbstractCegarLoop]: Abstraction has 147 states and 152 transitions. [2018-02-04 17:52:06,428 INFO L433 AbstractCegarLoop]: Interpolant automaton has 132 states. [2018-02-04 17:52:06,428 INFO L276 IsEmpty]: Start isEmpty. Operand 147 states and 152 transitions. [2018-02-04 17:52:06,429 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 143 [2018-02-04 17:52:06,429 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 17:52:06,429 INFO L351 BasicCegarLoop]: trace histogram [64, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 17:52:06,429 INFO L371 AbstractCegarLoop]: === Iteration 83 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-04 17:52:06,429 INFO L82 PathProgramCache]: Analyzing trace with hash 415751392, now seen corresponding path program 54 times [2018-02-04 17:52:06,429 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 17:52:06,429 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 17:52:06,429 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:52:06,429 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 17:52:06,430 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:52:06,453 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 17:52:06,453 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 17:52:07,649 INFO L134 CoverageAnalysis]: Checked inductivity of 2134 backedges. 0 proven. 2080 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:52:07,649 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 17:52:07,649 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 17:52:07,650 INFO L109 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-02-04 17:52:07,683 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 33 check-sat command(s) [2018-02-04 17:52:07,683 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 17:52:07,689 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 17:52:08,692 INFO L134 CoverageAnalysis]: Checked inductivity of 2134 backedges. 0 proven. 2080 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:52:08,692 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 17:52:08,692 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [68, 68] total 134 [2018-02-04 17:52:08,692 INFO L409 AbstractCegarLoop]: Interpolant automaton has 134 states [2018-02-04 17:52:08,693 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 134 interpolants. [2018-02-04 17:52:08,694 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=6700, Invalid=11122, Unknown=0, NotChecked=0, Total=17822 [2018-02-04 17:52:08,694 INFO L87 Difference]: Start difference. First operand 147 states and 152 transitions. Second operand 134 states. [2018-02-04 17:52:08,851 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 17:52:08,851 INFO L93 Difference]: Finished difference Result 150 states and 155 transitions. [2018-02-04 17:52:08,851 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 68 states. [2018-02-04 17:52:08,851 INFO L78 Accepts]: Start accepts. Automaton has 134 states. Word has length 142 [2018-02-04 17:52:08,852 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 17:52:08,852 INFO L225 Difference]: With dead ends: 150 [2018-02-04 17:52:08,852 INFO L226 Difference]: Without dead ends: 148 [2018-02-04 17:52:08,853 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 211 GetRequests, 77 SyntacticMatches, 0 SemanticMatches, 134 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8705 ImplicationChecksByTransitivity, 2.0s TimeCoverageRelationStatistics Valid=6902, Invalid=11458, Unknown=0, NotChecked=0, Total=18360 [2018-02-04 17:52:08,853 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 148 states. [2018-02-04 17:52:08,853 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 148 to 148. [2018-02-04 17:52:08,853 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 148 states. [2018-02-04 17:52:08,854 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 148 states to 148 states and 153 transitions. [2018-02-04 17:52:08,854 INFO L78 Accepts]: Start accepts. Automaton has 148 states and 153 transitions. Word has length 142 [2018-02-04 17:52:08,854 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 17:52:08,854 INFO L432 AbstractCegarLoop]: Abstraction has 148 states and 153 transitions. [2018-02-04 17:52:08,854 INFO L433 AbstractCegarLoop]: Interpolant automaton has 134 states. [2018-02-04 17:52:08,854 INFO L276 IsEmpty]: Start isEmpty. Operand 148 states and 153 transitions. [2018-02-04 17:52:08,854 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 144 [2018-02-04 17:52:08,854 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 17:52:08,855 INFO L351 BasicCegarLoop]: trace histogram [65, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 17:52:08,855 INFO L371 AbstractCegarLoop]: === Iteration 84 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-04 17:52:08,855 INFO L82 PathProgramCache]: Analyzing trace with hash 1536093939, now seen corresponding path program 55 times [2018-02-04 17:52:08,855 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 17:52:08,855 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 17:52:08,855 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:52:08,855 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 17:52:08,855 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:52:08,878 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 17:52:08,879 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 17:52:10,123 INFO L134 CoverageAnalysis]: Checked inductivity of 2199 backedges. 0 proven. 2145 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:52:10,123 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 17:52:10,123 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 17:52:10,124 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 17:52:10,141 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 17:52:10,145 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 17:52:11,215 INFO L134 CoverageAnalysis]: Checked inductivity of 2199 backedges. 0 proven. 2145 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:52:11,215 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 17:52:11,215 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [69, 69] total 136 [2018-02-04 17:52:11,215 INFO L409 AbstractCegarLoop]: Interpolant automaton has 136 states [2018-02-04 17:52:11,216 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 136 interpolants. [2018-02-04 17:52:11,216 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=6902, Invalid=11458, Unknown=0, NotChecked=0, Total=18360 [2018-02-04 17:52:11,216 INFO L87 Difference]: Start difference. First operand 148 states and 153 transitions. Second operand 136 states. [2018-02-04 17:52:11,369 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 17:52:11,369 INFO L93 Difference]: Finished difference Result 151 states and 156 transitions. [2018-02-04 17:52:11,369 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 69 states. [2018-02-04 17:52:11,369 INFO L78 Accepts]: Start accepts. Automaton has 136 states. Word has length 143 [2018-02-04 17:52:11,369 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 17:52:11,370 INFO L225 Difference]: With dead ends: 151 [2018-02-04 17:52:11,370 INFO L226 Difference]: Without dead ends: 149 [2018-02-04 17:52:11,370 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 213 GetRequests, 77 SyntacticMatches, 0 SemanticMatches, 136 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8971 ImplicationChecksByTransitivity, 2.2s TimeCoverageRelationStatistics Valid=7107, Invalid=11799, Unknown=0, NotChecked=0, Total=18906 [2018-02-04 17:52:11,370 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 149 states. [2018-02-04 17:52:11,371 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 149 to 149. [2018-02-04 17:52:11,371 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 149 states. [2018-02-04 17:52:11,371 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 149 states to 149 states and 154 transitions. [2018-02-04 17:52:11,371 INFO L78 Accepts]: Start accepts. Automaton has 149 states and 154 transitions. Word has length 143 [2018-02-04 17:52:11,372 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 17:52:11,372 INFO L432 AbstractCegarLoop]: Abstraction has 149 states and 154 transitions. [2018-02-04 17:52:11,372 INFO L433 AbstractCegarLoop]: Interpolant automaton has 136 states. [2018-02-04 17:52:11,372 INFO L276 IsEmpty]: Start isEmpty. Operand 149 states and 154 transitions. [2018-02-04 17:52:11,372 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 145 [2018-02-04 17:52:11,372 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 17:52:11,372 INFO L351 BasicCegarLoop]: trace histogram [66, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 17:52:11,372 INFO L371 AbstractCegarLoop]: === Iteration 85 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-04 17:52:11,373 INFO L82 PathProgramCache]: Analyzing trace with hash 1906974528, now seen corresponding path program 56 times [2018-02-04 17:52:11,373 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 17:52:11,373 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 17:52:11,373 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:52:11,373 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 17:52:11,373 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:52:11,398 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 17:52:11,398 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 17:52:12,646 INFO L134 CoverageAnalysis]: Checked inductivity of 2265 backedges. 0 proven. 2211 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:52:12,646 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 17:52:12,646 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 17:52:12,647 INFO L109 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-02-04 17:52:12,669 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-02-04 17:52:12,669 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 17:52:12,675 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 17:52:13,735 INFO L134 CoverageAnalysis]: Checked inductivity of 2265 backedges. 0 proven. 2211 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:52:13,735 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 17:52:13,735 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [70, 70] total 138 [2018-02-04 17:52:13,735 INFO L409 AbstractCegarLoop]: Interpolant automaton has 138 states [2018-02-04 17:52:13,736 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 138 interpolants. [2018-02-04 17:52:13,736 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7107, Invalid=11799, Unknown=0, NotChecked=0, Total=18906 [2018-02-04 17:52:13,736 INFO L87 Difference]: Start difference. First operand 149 states and 154 transitions. Second operand 138 states. [2018-02-04 17:52:13,888 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 17:52:13,888 INFO L93 Difference]: Finished difference Result 152 states and 157 transitions. [2018-02-04 17:52:13,888 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 70 states. [2018-02-04 17:52:13,888 INFO L78 Accepts]: Start accepts. Automaton has 138 states. Word has length 144 [2018-02-04 17:52:13,888 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 17:52:13,889 INFO L225 Difference]: With dead ends: 152 [2018-02-04 17:52:13,889 INFO L226 Difference]: Without dead ends: 150 [2018-02-04 17:52:13,889 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 215 GetRequests, 77 SyntacticMatches, 0 SemanticMatches, 138 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9241 ImplicationChecksByTransitivity, 2.1s TimeCoverageRelationStatistics Valid=7315, Invalid=12145, Unknown=0, NotChecked=0, Total=19460 [2018-02-04 17:52:13,889 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 150 states. [2018-02-04 17:52:13,890 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 150 to 150. [2018-02-04 17:52:13,890 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 150 states. [2018-02-04 17:52:13,891 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 150 states to 150 states and 155 transitions. [2018-02-04 17:52:13,891 INFO L78 Accepts]: Start accepts. Automaton has 150 states and 155 transitions. Word has length 144 [2018-02-04 17:52:13,891 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 17:52:13,891 INFO L432 AbstractCegarLoop]: Abstraction has 150 states and 155 transitions. [2018-02-04 17:52:13,891 INFO L433 AbstractCegarLoop]: Interpolant automaton has 138 states. [2018-02-04 17:52:13,891 INFO L276 IsEmpty]: Start isEmpty. Operand 150 states and 155 transitions. [2018-02-04 17:52:13,891 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 146 [2018-02-04 17:52:13,891 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 17:52:13,891 INFO L351 BasicCegarLoop]: trace histogram [67, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 17:52:13,891 INFO L371 AbstractCegarLoop]: === Iteration 86 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-04 17:52:13,892 INFO L82 PathProgramCache]: Analyzing trace with hash 519370899, now seen corresponding path program 57 times [2018-02-04 17:52:13,892 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 17:52:13,892 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 17:52:13,892 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:52:13,892 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 17:52:13,892 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:52:13,917 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 17:52:13,918 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 17:52:15,183 INFO L134 CoverageAnalysis]: Checked inductivity of 2332 backedges. 0 proven. 2278 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:52:15,183 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 17:52:15,183 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 17:52:15,183 INFO L109 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-02-04 17:52:15,217 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 35 check-sat command(s) [2018-02-04 17:52:15,217 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 17:52:15,244 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 17:52:16,482 INFO L134 CoverageAnalysis]: Checked inductivity of 2332 backedges. 0 proven. 2278 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:52:16,483 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 17:52:16,483 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [71, 71] total 140 [2018-02-04 17:52:16,483 INFO L409 AbstractCegarLoop]: Interpolant automaton has 140 states [2018-02-04 17:52:16,484 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 140 interpolants. [2018-02-04 17:52:16,484 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7315, Invalid=12145, Unknown=0, NotChecked=0, Total=19460 [2018-02-04 17:52:16,484 INFO L87 Difference]: Start difference. First operand 150 states and 155 transitions. Second operand 140 states. [2018-02-04 17:52:16,652 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 17:52:16,652 INFO L93 Difference]: Finished difference Result 153 states and 158 transitions. [2018-02-04 17:52:16,653 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 71 states. [2018-02-04 17:52:16,653 INFO L78 Accepts]: Start accepts. Automaton has 140 states. Word has length 145 [2018-02-04 17:52:16,653 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 17:52:16,653 INFO L225 Difference]: With dead ends: 153 [2018-02-04 17:52:16,653 INFO L226 Difference]: Without dead ends: 151 [2018-02-04 17:52:16,654 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 217 GetRequests, 77 SyntacticMatches, 0 SemanticMatches, 140 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9515 ImplicationChecksByTransitivity, 2.3s TimeCoverageRelationStatistics Valid=7526, Invalid=12496, Unknown=0, NotChecked=0, Total=20022 [2018-02-04 17:52:16,654 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 151 states. [2018-02-04 17:52:16,655 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 151 to 151. [2018-02-04 17:52:16,655 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 151 states. [2018-02-04 17:52:16,655 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 151 states to 151 states and 156 transitions. [2018-02-04 17:52:16,655 INFO L78 Accepts]: Start accepts. Automaton has 151 states and 156 transitions. Word has length 145 [2018-02-04 17:52:16,655 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 17:52:16,655 INFO L432 AbstractCegarLoop]: Abstraction has 151 states and 156 transitions. [2018-02-04 17:52:16,655 INFO L433 AbstractCegarLoop]: Interpolant automaton has 140 states. [2018-02-04 17:52:16,656 INFO L276 IsEmpty]: Start isEmpty. Operand 151 states and 156 transitions. [2018-02-04 17:52:16,656 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 147 [2018-02-04 17:52:16,656 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 17:52:16,656 INFO L351 BasicCegarLoop]: trace histogram [68, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 17:52:16,656 INFO L371 AbstractCegarLoop]: === Iteration 87 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-04 17:52:16,656 INFO L82 PathProgramCache]: Analyzing trace with hash 453331360, now seen corresponding path program 58 times [2018-02-04 17:52:16,656 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 17:52:16,656 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 17:52:16,657 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:52:16,657 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 17:52:16,657 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:52:16,682 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 17:52:16,682 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 17:52:18,114 INFO L134 CoverageAnalysis]: Checked inductivity of 2400 backedges. 0 proven. 2346 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:52:18,114 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 17:52:18,114 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 17:52:18,114 INFO L109 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-02-04 17:52:18,151 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-02-04 17:52:18,151 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 17:52:18,158 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 17:52:19,427 INFO L134 CoverageAnalysis]: Checked inductivity of 2400 backedges. 0 proven. 2346 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:52:19,427 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 17:52:19,427 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [72, 72] total 142 [2018-02-04 17:52:19,428 INFO L409 AbstractCegarLoop]: Interpolant automaton has 142 states [2018-02-04 17:52:19,429 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 142 interpolants. [2018-02-04 17:52:19,430 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7526, Invalid=12496, Unknown=0, NotChecked=0, Total=20022 [2018-02-04 17:52:19,430 INFO L87 Difference]: Start difference. First operand 151 states and 156 transitions. Second operand 142 states. [2018-02-04 17:52:19,586 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 17:52:19,586 INFO L93 Difference]: Finished difference Result 154 states and 159 transitions. [2018-02-04 17:52:19,586 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 72 states. [2018-02-04 17:52:19,586 INFO L78 Accepts]: Start accepts. Automaton has 142 states. Word has length 146 [2018-02-04 17:52:19,587 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 17:52:19,587 INFO L225 Difference]: With dead ends: 154 [2018-02-04 17:52:19,587 INFO L226 Difference]: Without dead ends: 152 [2018-02-04 17:52:19,588 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 219 GetRequests, 77 SyntacticMatches, 0 SemanticMatches, 142 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9793 ImplicationChecksByTransitivity, 2.5s TimeCoverageRelationStatistics Valid=7740, Invalid=12852, Unknown=0, NotChecked=0, Total=20592 [2018-02-04 17:52:19,588 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 152 states. [2018-02-04 17:52:19,589 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 152 to 152. [2018-02-04 17:52:19,589 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 152 states. [2018-02-04 17:52:19,589 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 152 states to 152 states and 157 transitions. [2018-02-04 17:52:19,589 INFO L78 Accepts]: Start accepts. Automaton has 152 states and 157 transitions. Word has length 146 [2018-02-04 17:52:19,589 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 17:52:19,590 INFO L432 AbstractCegarLoop]: Abstraction has 152 states and 157 transitions. [2018-02-04 17:52:19,590 INFO L433 AbstractCegarLoop]: Interpolant automaton has 142 states. [2018-02-04 17:52:19,590 INFO L276 IsEmpty]: Start isEmpty. Operand 152 states and 157 transitions. [2018-02-04 17:52:19,590 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 148 [2018-02-04 17:52:19,590 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 17:52:19,590 INFO L351 BasicCegarLoop]: trace histogram [69, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 17:52:19,590 INFO L371 AbstractCegarLoop]: === Iteration 88 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-04 17:52:19,590 INFO L82 PathProgramCache]: Analyzing trace with hash -1593894349, now seen corresponding path program 59 times [2018-02-04 17:52:19,590 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 17:52:19,590 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 17:52:19,591 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:52:19,591 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 17:52:19,591 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:52:19,643 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 17:52:19,644 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 17:52:21,133 INFO L134 CoverageAnalysis]: Checked inductivity of 2469 backedges. 0 proven. 2415 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:52:21,133 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 17:52:21,133 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 17:52:21,134 INFO L109 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-02-04 17:52:21,197 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 36 check-sat command(s) [2018-02-04 17:52:21,197 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 17:52:21,203 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 17:52:22,474 INFO L134 CoverageAnalysis]: Checked inductivity of 2469 backedges. 0 proven. 2415 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:52:22,474 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 17:52:22,474 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [73, 73] total 144 [2018-02-04 17:52:22,474 INFO L409 AbstractCegarLoop]: Interpolant automaton has 144 states [2018-02-04 17:52:22,475 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 144 interpolants. [2018-02-04 17:52:22,476 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7740, Invalid=12852, Unknown=0, NotChecked=0, Total=20592 [2018-02-04 17:52:22,477 INFO L87 Difference]: Start difference. First operand 152 states and 157 transitions. Second operand 144 states. [2018-02-04 17:52:22,656 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 17:52:22,657 INFO L93 Difference]: Finished difference Result 155 states and 160 transitions. [2018-02-04 17:52:22,657 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 73 states. [2018-02-04 17:52:22,657 INFO L78 Accepts]: Start accepts. Automaton has 144 states. Word has length 147 [2018-02-04 17:52:22,657 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 17:52:22,657 INFO L225 Difference]: With dead ends: 155 [2018-02-04 17:52:22,658 INFO L226 Difference]: Without dead ends: 153 [2018-02-04 17:52:22,659 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 221 GetRequests, 77 SyntacticMatches, 0 SemanticMatches, 144 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10075 ImplicationChecksByTransitivity, 2.6s TimeCoverageRelationStatistics Valid=7957, Invalid=13213, Unknown=0, NotChecked=0, Total=21170 [2018-02-04 17:52:22,659 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 153 states. [2018-02-04 17:52:22,659 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 153 to 153. [2018-02-04 17:52:22,660 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 153 states. [2018-02-04 17:52:22,660 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 153 states to 153 states and 158 transitions. [2018-02-04 17:52:22,660 INFO L78 Accepts]: Start accepts. Automaton has 153 states and 158 transitions. Word has length 147 [2018-02-04 17:52:22,660 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 17:52:22,660 INFO L432 AbstractCegarLoop]: Abstraction has 153 states and 158 transitions. [2018-02-04 17:52:22,660 INFO L433 AbstractCegarLoop]: Interpolant automaton has 144 states. [2018-02-04 17:52:22,660 INFO L276 IsEmpty]: Start isEmpty. Operand 153 states and 158 transitions. [2018-02-04 17:52:22,660 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 149 [2018-02-04 17:52:22,660 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 17:52:22,660 INFO L351 BasicCegarLoop]: trace histogram [70, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 17:52:22,661 INFO L371 AbstractCegarLoop]: === Iteration 89 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-04 17:52:22,661 INFO L82 PathProgramCache]: Analyzing trace with hash -633381888, now seen corresponding path program 60 times [2018-02-04 17:52:22,661 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 17:52:22,661 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 17:52:22,661 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:52:22,661 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 17:52:22,661 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:52:22,687 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 17:52:22,688 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 17:52:24,216 INFO L134 CoverageAnalysis]: Checked inductivity of 2539 backedges. 0 proven. 2485 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:52:24,216 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 17:52:24,216 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 17:52:24,217 INFO L109 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-02-04 17:52:24,256 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 36 check-sat command(s) [2018-02-04 17:52:24,256 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 17:52:24,265 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 17:52:25,580 INFO L134 CoverageAnalysis]: Checked inductivity of 2539 backedges. 0 proven. 2485 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:52:25,580 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 17:52:25,580 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [74, 74] total 146 [2018-02-04 17:52:25,580 INFO L409 AbstractCegarLoop]: Interpolant automaton has 146 states [2018-02-04 17:52:25,581 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 146 interpolants. [2018-02-04 17:52:25,583 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7957, Invalid=13213, Unknown=0, NotChecked=0, Total=21170 [2018-02-04 17:52:25,583 INFO L87 Difference]: Start difference. First operand 153 states and 158 transitions. Second operand 146 states. [2018-02-04 17:52:25,728 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 17:52:25,728 INFO L93 Difference]: Finished difference Result 156 states and 161 transitions. [2018-02-04 17:52:25,728 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 74 states. [2018-02-04 17:52:25,728 INFO L78 Accepts]: Start accepts. Automaton has 146 states. Word has length 148 [2018-02-04 17:52:25,729 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 17:52:25,729 INFO L225 Difference]: With dead ends: 156 [2018-02-04 17:52:25,729 INFO L226 Difference]: Without dead ends: 154 [2018-02-04 17:52:25,730 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 223 GetRequests, 77 SyntacticMatches, 0 SemanticMatches, 146 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10361 ImplicationChecksByTransitivity, 2.6s TimeCoverageRelationStatistics Valid=8177, Invalid=13579, Unknown=0, NotChecked=0, Total=21756 [2018-02-04 17:52:25,730 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 154 states. [2018-02-04 17:52:25,731 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 154 to 154. [2018-02-04 17:52:25,731 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 154 states. [2018-02-04 17:52:25,731 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 154 states to 154 states and 159 transitions. [2018-02-04 17:52:25,731 INFO L78 Accepts]: Start accepts. Automaton has 154 states and 159 transitions. Word has length 148 [2018-02-04 17:52:25,731 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 17:52:25,731 INFO L432 AbstractCegarLoop]: Abstraction has 154 states and 159 transitions. [2018-02-04 17:52:25,731 INFO L433 AbstractCegarLoop]: Interpolant automaton has 146 states. [2018-02-04 17:52:25,731 INFO L276 IsEmpty]: Start isEmpty. Operand 154 states and 159 transitions. [2018-02-04 17:52:25,732 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 150 [2018-02-04 17:52:25,732 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 17:52:25,732 INFO L351 BasicCegarLoop]: trace histogram [71, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 17:52:25,732 INFO L371 AbstractCegarLoop]: === Iteration 90 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-04 17:52:25,732 INFO L82 PathProgramCache]: Analyzing trace with hash -922266669, now seen corresponding path program 61 times [2018-02-04 17:52:25,732 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 17:52:25,732 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 17:52:25,732 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:52:25,733 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 17:52:25,733 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:52:25,761 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 17:52:25,761 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 17:52:27,330 INFO L134 CoverageAnalysis]: Checked inductivity of 2610 backedges. 0 proven. 2556 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:52:27,330 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 17:52:27,330 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 17:52:27,330 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 17:52:27,351 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 17:52:27,356 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 17:52:28,659 INFO L134 CoverageAnalysis]: Checked inductivity of 2610 backedges. 0 proven. 2556 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:52:28,660 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 17:52:28,660 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [75, 75] total 148 [2018-02-04 17:52:28,660 INFO L409 AbstractCegarLoop]: Interpolant automaton has 148 states [2018-02-04 17:52:28,661 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 148 interpolants. [2018-02-04 17:52:28,662 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=8177, Invalid=13579, Unknown=0, NotChecked=0, Total=21756 [2018-02-04 17:52:28,663 INFO L87 Difference]: Start difference. First operand 154 states and 159 transitions. Second operand 148 states. [2018-02-04 17:52:28,847 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 17:52:28,848 INFO L93 Difference]: Finished difference Result 157 states and 162 transitions. [2018-02-04 17:52:28,848 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 75 states. [2018-02-04 17:52:28,848 INFO L78 Accepts]: Start accepts. Automaton has 148 states. Word has length 149 [2018-02-04 17:52:28,848 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 17:52:28,848 INFO L225 Difference]: With dead ends: 157 [2018-02-04 17:52:28,848 INFO L226 Difference]: Without dead ends: 155 [2018-02-04 17:52:28,849 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 225 GetRequests, 77 SyntacticMatches, 0 SemanticMatches, 148 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10651 ImplicationChecksByTransitivity, 2.7s TimeCoverageRelationStatistics Valid=8400, Invalid=13950, Unknown=0, NotChecked=0, Total=22350 [2018-02-04 17:52:28,849 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 155 states. [2018-02-04 17:52:28,850 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 155 to 155. [2018-02-04 17:52:28,850 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 155 states. [2018-02-04 17:52:28,850 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 155 states to 155 states and 160 transitions. [2018-02-04 17:52:28,850 INFO L78 Accepts]: Start accepts. Automaton has 155 states and 160 transitions. Word has length 149 [2018-02-04 17:52:28,850 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 17:52:28,850 INFO L432 AbstractCegarLoop]: Abstraction has 155 states and 160 transitions. [2018-02-04 17:52:28,850 INFO L433 AbstractCegarLoop]: Interpolant automaton has 148 states. [2018-02-04 17:52:28,851 INFO L276 IsEmpty]: Start isEmpty. Operand 155 states and 160 transitions. [2018-02-04 17:52:28,851 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 151 [2018-02-04 17:52:28,851 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 17:52:28,851 INFO L351 BasicCegarLoop]: trace histogram [72, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 17:52:28,851 INFO L371 AbstractCegarLoop]: === Iteration 91 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-04 17:52:28,851 INFO L82 PathProgramCache]: Analyzing trace with hash -1287760288, now seen corresponding path program 62 times [2018-02-04 17:52:28,851 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 17:52:28,851 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 17:52:28,851 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:52:28,851 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 17:52:28,852 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:52:28,877 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 17:52:28,878 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 17:52:30,537 INFO L134 CoverageAnalysis]: Checked inductivity of 2682 backedges. 0 proven. 2628 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:52:30,537 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 17:52:30,537 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 17:52:30,538 INFO L109 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-02-04 17:52:30,570 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-02-04 17:52:30,570 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 17:52:30,576 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 17:52:31,927 INFO L134 CoverageAnalysis]: Checked inductivity of 2682 backedges. 0 proven. 2628 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:52:31,927 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 17:52:31,927 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [76, 76] total 150 [2018-02-04 17:52:31,928 INFO L409 AbstractCegarLoop]: Interpolant automaton has 150 states [2018-02-04 17:52:31,929 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 150 interpolants. [2018-02-04 17:52:31,930 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=8400, Invalid=13950, Unknown=0, NotChecked=0, Total=22350 [2018-02-04 17:52:31,930 INFO L87 Difference]: Start difference. First operand 155 states and 160 transitions. Second operand 150 states. [2018-02-04 17:52:32,112 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 17:52:32,112 INFO L93 Difference]: Finished difference Result 158 states and 163 transitions. [2018-02-04 17:52:32,113 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 76 states. [2018-02-04 17:52:32,113 INFO L78 Accepts]: Start accepts. Automaton has 150 states. Word has length 150 [2018-02-04 17:52:32,113 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 17:52:32,113 INFO L225 Difference]: With dead ends: 158 [2018-02-04 17:52:32,113 INFO L226 Difference]: Without dead ends: 156 [2018-02-04 17:52:32,115 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 227 GetRequests, 77 SyntacticMatches, 0 SemanticMatches, 150 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10945 ImplicationChecksByTransitivity, 2.8s TimeCoverageRelationStatistics Valid=8626, Invalid=14326, Unknown=0, NotChecked=0, Total=22952 [2018-02-04 17:52:32,115 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 156 states. [2018-02-04 17:52:32,116 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 156 to 156. [2018-02-04 17:52:32,116 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 156 states. [2018-02-04 17:52:32,116 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 156 states to 156 states and 161 transitions. [2018-02-04 17:52:32,116 INFO L78 Accepts]: Start accepts. Automaton has 156 states and 161 transitions. Word has length 150 [2018-02-04 17:52:32,116 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 17:52:32,116 INFO L432 AbstractCegarLoop]: Abstraction has 156 states and 161 transitions. [2018-02-04 17:52:32,116 INFO L433 AbstractCegarLoop]: Interpolant automaton has 150 states. [2018-02-04 17:52:32,116 INFO L276 IsEmpty]: Start isEmpty. Operand 156 states and 161 transitions. [2018-02-04 17:52:32,117 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 152 [2018-02-04 17:52:32,117 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 17:52:32,117 INFO L351 BasicCegarLoop]: trace histogram [73, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 17:52:32,117 INFO L371 AbstractCegarLoop]: === Iteration 92 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-04 17:52:32,117 INFO L82 PathProgramCache]: Analyzing trace with hash 266839411, now seen corresponding path program 63 times [2018-02-04 17:52:32,117 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 17:52:32,117 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 17:52:32,117 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:52:32,117 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 17:52:32,117 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:52:32,148 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 17:52:32,149 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 17:52:33,788 INFO L134 CoverageAnalysis]: Checked inductivity of 2755 backedges. 0 proven. 2701 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:52:33,788 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 17:52:33,788 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 17:52:33,789 INFO L109 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-02-04 17:52:33,825 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 38 check-sat command(s) [2018-02-04 17:52:33,825 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 17:52:33,841 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 17:52:35,251 INFO L134 CoverageAnalysis]: Checked inductivity of 2755 backedges. 0 proven. 2701 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:52:35,251 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 17:52:35,251 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [77, 77] total 152 [2018-02-04 17:52:35,252 INFO L409 AbstractCegarLoop]: Interpolant automaton has 152 states [2018-02-04 17:52:35,253 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 152 interpolants. [2018-02-04 17:52:35,254 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=8626, Invalid=14326, Unknown=0, NotChecked=0, Total=22952 [2018-02-04 17:52:35,254 INFO L87 Difference]: Start difference. First operand 156 states and 161 transitions. Second operand 152 states. [2018-02-04 17:52:35,442 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 17:52:35,442 INFO L93 Difference]: Finished difference Result 159 states and 164 transitions. [2018-02-04 17:52:35,442 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 77 states. [2018-02-04 17:52:35,443 INFO L78 Accepts]: Start accepts. Automaton has 152 states. Word has length 151 [2018-02-04 17:52:35,443 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 17:52:35,443 INFO L225 Difference]: With dead ends: 159 [2018-02-04 17:52:35,443 INFO L226 Difference]: Without dead ends: 157 [2018-02-04 17:52:35,444 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 229 GetRequests, 77 SyntacticMatches, 0 SemanticMatches, 152 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11243 ImplicationChecksByTransitivity, 2.8s TimeCoverageRelationStatistics Valid=8855, Invalid=14707, Unknown=0, NotChecked=0, Total=23562 [2018-02-04 17:52:35,444 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 157 states. [2018-02-04 17:52:35,445 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 157 to 157. [2018-02-04 17:52:35,445 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 157 states. [2018-02-04 17:52:35,445 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 157 states to 157 states and 162 transitions. [2018-02-04 17:52:35,446 INFO L78 Accepts]: Start accepts. Automaton has 157 states and 162 transitions. Word has length 151 [2018-02-04 17:52:35,446 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 17:52:35,446 INFO L432 AbstractCegarLoop]: Abstraction has 157 states and 162 transitions. [2018-02-04 17:52:35,446 INFO L433 AbstractCegarLoop]: Interpolant automaton has 152 states. [2018-02-04 17:52:35,446 INFO L276 IsEmpty]: Start isEmpty. Operand 157 states and 162 transitions. [2018-02-04 17:52:35,446 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 153 [2018-02-04 17:52:35,446 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 17:52:35,446 INFO L351 BasicCegarLoop]: trace histogram [74, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 17:52:35,446 INFO L371 AbstractCegarLoop]: === Iteration 93 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-04 17:52:35,446 INFO L82 PathProgramCache]: Analyzing trace with hash 1214789824, now seen corresponding path program 64 times [2018-02-04 17:52:35,446 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 17:52:35,446 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 17:52:35,447 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:52:35,447 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 17:52:35,447 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:52:35,477 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 17:52:35,478 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 17:52:37,191 INFO L134 CoverageAnalysis]: Checked inductivity of 2829 backedges. 0 proven. 2775 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:52:37,191 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 17:52:37,191 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 17:52:37,192 INFO L109 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-02-04 17:52:37,234 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-02-04 17:52:37,234 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 17:52:37,243 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 17:52:38,730 INFO L134 CoverageAnalysis]: Checked inductivity of 2829 backedges. 0 proven. 2775 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:52:38,730 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 17:52:38,730 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [78, 78] total 154 [2018-02-04 17:52:38,731 INFO L409 AbstractCegarLoop]: Interpolant automaton has 154 states [2018-02-04 17:52:38,732 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 154 interpolants. [2018-02-04 17:52:38,733 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=8855, Invalid=14707, Unknown=0, NotChecked=0, Total=23562 [2018-02-04 17:52:38,733 INFO L87 Difference]: Start difference. First operand 157 states and 162 transitions. Second operand 154 states. [2018-02-04 17:52:38,918 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 17:52:38,918 INFO L93 Difference]: Finished difference Result 160 states and 165 transitions. [2018-02-04 17:52:38,919 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 78 states. [2018-02-04 17:52:38,919 INFO L78 Accepts]: Start accepts. Automaton has 154 states. Word has length 152 [2018-02-04 17:52:38,919 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 17:52:38,919 INFO L225 Difference]: With dead ends: 160 [2018-02-04 17:52:38,919 INFO L226 Difference]: Without dead ends: 158 [2018-02-04 17:52:38,921 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 231 GetRequests, 77 SyntacticMatches, 0 SemanticMatches, 154 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11545 ImplicationChecksByTransitivity, 3.0s TimeCoverageRelationStatistics Valid=9087, Invalid=15093, Unknown=0, NotChecked=0, Total=24180 [2018-02-04 17:52:38,921 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 158 states. [2018-02-04 17:52:38,921 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 158 to 158. [2018-02-04 17:52:38,922 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 158 states. [2018-02-04 17:52:38,922 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 158 states to 158 states and 163 transitions. [2018-02-04 17:52:38,922 INFO L78 Accepts]: Start accepts. Automaton has 158 states and 163 transitions. Word has length 152 [2018-02-04 17:52:38,922 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 17:52:38,922 INFO L432 AbstractCegarLoop]: Abstraction has 158 states and 163 transitions. [2018-02-04 17:52:38,922 INFO L433 AbstractCegarLoop]: Interpolant automaton has 154 states. [2018-02-04 17:52:38,922 INFO L276 IsEmpty]: Start isEmpty. Operand 158 states and 163 transitions. [2018-02-04 17:52:38,922 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 154 [2018-02-04 17:52:38,922 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 17:52:38,923 INFO L351 BasicCegarLoop]: trace histogram [75, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 17:52:38,923 INFO L371 AbstractCegarLoop]: === Iteration 94 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-04 17:52:38,923 INFO L82 PathProgramCache]: Analyzing trace with hash 536481555, now seen corresponding path program 65 times [2018-02-04 17:52:38,923 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 17:52:38,923 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 17:52:38,923 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:52:38,923 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 17:52:38,923 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:52:38,955 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 17:52:38,956 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 17:52:40,688 INFO L134 CoverageAnalysis]: Checked inductivity of 2904 backedges. 0 proven. 2850 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:52:40,688 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 17:52:40,688 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 17:52:40,689 INFO L109 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-02-04 17:52:40,758 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 39 check-sat command(s) [2018-02-04 17:52:40,758 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 17:52:40,764 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 17:52:42,233 INFO L134 CoverageAnalysis]: Checked inductivity of 2904 backedges. 0 proven. 2850 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:52:42,233 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 17:52:42,233 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [79, 79] total 156 [2018-02-04 17:52:42,234 INFO L409 AbstractCegarLoop]: Interpolant automaton has 156 states [2018-02-04 17:52:42,235 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 156 interpolants. [2018-02-04 17:52:42,236 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9087, Invalid=15093, Unknown=0, NotChecked=0, Total=24180 [2018-02-04 17:52:42,236 INFO L87 Difference]: Start difference. First operand 158 states and 163 transitions. Second operand 156 states. [2018-02-04 17:52:42,395 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 17:52:42,396 INFO L93 Difference]: Finished difference Result 161 states and 166 transitions. [2018-02-04 17:52:42,396 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 79 states. [2018-02-04 17:52:42,396 INFO L78 Accepts]: Start accepts. Automaton has 156 states. Word has length 153 [2018-02-04 17:52:42,396 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 17:52:42,396 INFO L225 Difference]: With dead ends: 161 [2018-02-04 17:52:42,396 INFO L226 Difference]: Without dead ends: 159 [2018-02-04 17:52:42,398 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 233 GetRequests, 77 SyntacticMatches, 0 SemanticMatches, 156 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11851 ImplicationChecksByTransitivity, 3.0s TimeCoverageRelationStatistics Valid=9322, Invalid=15484, Unknown=0, NotChecked=0, Total=24806 [2018-02-04 17:52:42,398 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 159 states. [2018-02-04 17:52:42,399 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 159 to 159. [2018-02-04 17:52:42,399 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 159 states. [2018-02-04 17:52:42,399 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 159 states to 159 states and 164 transitions. [2018-02-04 17:52:42,399 INFO L78 Accepts]: Start accepts. Automaton has 159 states and 164 transitions. Word has length 153 [2018-02-04 17:52:42,399 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 17:52:42,399 INFO L432 AbstractCegarLoop]: Abstraction has 159 states and 164 transitions. [2018-02-04 17:52:42,399 INFO L433 AbstractCegarLoop]: Interpolant automaton has 156 states. [2018-02-04 17:52:42,399 INFO L276 IsEmpty]: Start isEmpty. Operand 159 states and 164 transitions. [2018-02-04 17:52:42,399 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 155 [2018-02-04 17:52:42,400 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 17:52:42,400 INFO L351 BasicCegarLoop]: trace histogram [76, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 17:52:42,400 INFO L371 AbstractCegarLoop]: === Iteration 95 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-04 17:52:42,400 INFO L82 PathProgramCache]: Analyzing trace with hash 983761696, now seen corresponding path program 66 times [2018-02-04 17:52:42,400 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 17:52:42,400 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 17:52:42,400 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:52:42,400 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 17:52:42,400 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:52:42,431 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 17:52:42,432 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 17:52:44,161 INFO L134 CoverageAnalysis]: Checked inductivity of 2980 backedges. 0 proven. 2926 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:52:44,161 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 17:52:44,161 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 17:52:44,161 INFO L109 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-02-04 17:52:44,204 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 39 check-sat command(s) [2018-02-04 17:52:44,204 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 17:52:44,216 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 17:52:45,695 INFO L134 CoverageAnalysis]: Checked inductivity of 2980 backedges. 0 proven. 2926 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:52:45,695 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 17:52:45,695 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [80, 80] total 158 [2018-02-04 17:52:45,695 INFO L409 AbstractCegarLoop]: Interpolant automaton has 158 states [2018-02-04 17:52:45,697 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 158 interpolants. [2018-02-04 17:52:45,698 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9322, Invalid=15484, Unknown=0, NotChecked=0, Total=24806 [2018-02-04 17:52:45,698 INFO L87 Difference]: Start difference. First operand 159 states and 164 transitions. Second operand 158 states. [2018-02-04 17:52:45,872 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 17:52:45,872 INFO L93 Difference]: Finished difference Result 162 states and 167 transitions. [2018-02-04 17:52:45,872 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 80 states. [2018-02-04 17:52:45,873 INFO L78 Accepts]: Start accepts. Automaton has 158 states. Word has length 154 [2018-02-04 17:52:45,873 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 17:52:45,873 INFO L225 Difference]: With dead ends: 162 [2018-02-04 17:52:45,873 INFO L226 Difference]: Without dead ends: 160 [2018-02-04 17:52:45,874 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 235 GetRequests, 77 SyntacticMatches, 0 SemanticMatches, 158 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12161 ImplicationChecksByTransitivity, 3.0s TimeCoverageRelationStatistics Valid=9560, Invalid=15880, Unknown=0, NotChecked=0, Total=25440 [2018-02-04 17:52:45,874 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 160 states. [2018-02-04 17:52:45,875 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 160 to 160. [2018-02-04 17:52:45,875 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 160 states. [2018-02-04 17:52:45,876 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 160 states to 160 states and 165 transitions. [2018-02-04 17:52:45,876 INFO L78 Accepts]: Start accepts. Automaton has 160 states and 165 transitions. Word has length 154 [2018-02-04 17:52:45,876 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 17:52:45,876 INFO L432 AbstractCegarLoop]: Abstraction has 160 states and 165 transitions. [2018-02-04 17:52:45,876 INFO L433 AbstractCegarLoop]: Interpolant automaton has 158 states. [2018-02-04 17:52:45,876 INFO L276 IsEmpty]: Start isEmpty. Operand 160 states and 165 transitions. [2018-02-04 17:52:45,876 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 156 [2018-02-04 17:52:45,876 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 17:52:45,876 INFO L351 BasicCegarLoop]: trace histogram [77, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 17:52:45,876 INFO L371 AbstractCegarLoop]: === Iteration 96 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-04 17:52:45,876 INFO L82 PathProgramCache]: Analyzing trace with hash 1964544179, now seen corresponding path program 67 times [2018-02-04 17:52:45,877 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 17:52:45,877 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 17:52:45,877 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:52:45,877 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 17:52:45,877 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:52:45,908 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 17:52:45,909 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 17:52:47,630 INFO L134 CoverageAnalysis]: Checked inductivity of 3057 backedges. 0 proven. 3003 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:52:47,631 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 17:52:47,631 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 17:52:47,631 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 17:52:47,654 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 17:52:47,658 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 17:52:49,059 INFO L134 CoverageAnalysis]: Checked inductivity of 3057 backedges. 0 proven. 3003 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:52:49,059 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 17:52:49,059 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [81, 81] total 160 [2018-02-04 17:52:49,059 INFO L409 AbstractCegarLoop]: Interpolant automaton has 160 states [2018-02-04 17:52:49,061 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 160 interpolants. [2018-02-04 17:52:49,062 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9560, Invalid=15880, Unknown=0, NotChecked=0, Total=25440 [2018-02-04 17:52:49,062 INFO L87 Difference]: Start difference. First operand 160 states and 165 transitions. Second operand 160 states. [2018-02-04 17:52:49,267 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 17:52:49,267 INFO L93 Difference]: Finished difference Result 163 states and 168 transitions. [2018-02-04 17:52:49,268 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 81 states. [2018-02-04 17:52:49,268 INFO L78 Accepts]: Start accepts. Automaton has 160 states. Word has length 155 [2018-02-04 17:52:49,268 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 17:52:49,268 INFO L225 Difference]: With dead ends: 163 [2018-02-04 17:52:49,268 INFO L226 Difference]: Without dead ends: 161 [2018-02-04 17:52:49,270 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 237 GetRequests, 77 SyntacticMatches, 0 SemanticMatches, 160 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12475 ImplicationChecksByTransitivity, 2.9s TimeCoverageRelationStatistics Valid=9801, Invalid=16281, Unknown=0, NotChecked=0, Total=26082 [2018-02-04 17:52:49,270 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 161 states. [2018-02-04 17:52:49,271 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 161 to 161. [2018-02-04 17:52:49,271 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 161 states. [2018-02-04 17:52:49,271 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 161 states to 161 states and 166 transitions. [2018-02-04 17:52:49,271 INFO L78 Accepts]: Start accepts. Automaton has 161 states and 166 transitions. Word has length 155 [2018-02-04 17:52:49,271 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 17:52:49,271 INFO L432 AbstractCegarLoop]: Abstraction has 161 states and 166 transitions. [2018-02-04 17:52:49,271 INFO L433 AbstractCegarLoop]: Interpolant automaton has 160 states. [2018-02-04 17:52:49,271 INFO L276 IsEmpty]: Start isEmpty. Operand 161 states and 166 transitions. [2018-02-04 17:52:49,272 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 157 [2018-02-04 17:52:49,272 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 17:52:49,272 INFO L351 BasicCegarLoop]: trace histogram [78, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 17:52:49,272 INFO L371 AbstractCegarLoop]: === Iteration 97 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-04 17:52:49,272 INFO L82 PathProgramCache]: Analyzing trace with hash -1990937216, now seen corresponding path program 68 times [2018-02-04 17:52:49,272 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 17:52:49,272 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 17:52:49,272 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:52:49,272 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 17:52:49,272 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:52:49,305 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 17:52:49,305 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 17:52:51,035 INFO L134 CoverageAnalysis]: Checked inductivity of 3135 backedges. 0 proven. 3081 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:52:51,035 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 17:52:51,035 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 17:52:51,035 INFO L109 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-02-04 17:52:51,066 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-02-04 17:52:51,066 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 17:52:51,074 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 17:52:52,647 INFO L134 CoverageAnalysis]: Checked inductivity of 3135 backedges. 0 proven. 3081 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:52:52,647 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 17:52:52,647 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [82, 82] total 162 [2018-02-04 17:52:52,648 INFO L409 AbstractCegarLoop]: Interpolant automaton has 162 states [2018-02-04 17:52:52,649 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 162 interpolants. [2018-02-04 17:52:52,650 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9801, Invalid=16281, Unknown=0, NotChecked=0, Total=26082 [2018-02-04 17:52:52,650 INFO L87 Difference]: Start difference. First operand 161 states and 166 transitions. Second operand 162 states. [2018-02-04 17:52:52,825 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 17:52:52,825 INFO L93 Difference]: Finished difference Result 164 states and 169 transitions. [2018-02-04 17:52:52,825 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 82 states. [2018-02-04 17:52:52,825 INFO L78 Accepts]: Start accepts. Automaton has 162 states. Word has length 156 [2018-02-04 17:52:52,826 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 17:52:52,826 INFO L225 Difference]: With dead ends: 164 [2018-02-04 17:52:52,826 INFO L226 Difference]: Without dead ends: 162 [2018-02-04 17:52:52,827 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 239 GetRequests, 77 SyntacticMatches, 0 SemanticMatches, 162 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12793 ImplicationChecksByTransitivity, 3.1s TimeCoverageRelationStatistics Valid=10045, Invalid=16687, Unknown=0, NotChecked=0, Total=26732 [2018-02-04 17:52:52,827 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 162 states. [2018-02-04 17:52:52,828 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 162 to 162. [2018-02-04 17:52:52,828 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 162 states. [2018-02-04 17:52:52,828 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 162 states to 162 states and 167 transitions. [2018-02-04 17:52:52,829 INFO L78 Accepts]: Start accepts. Automaton has 162 states and 167 transitions. Word has length 156 [2018-02-04 17:52:52,829 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 17:52:52,829 INFO L432 AbstractCegarLoop]: Abstraction has 162 states and 167 transitions. [2018-02-04 17:52:52,829 INFO L433 AbstractCegarLoop]: Interpolant automaton has 162 states. [2018-02-04 17:52:52,829 INFO L276 IsEmpty]: Start isEmpty. Operand 162 states and 167 transitions. [2018-02-04 17:52:52,829 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 158 [2018-02-04 17:52:52,829 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 17:52:52,829 INFO L351 BasicCegarLoop]: trace histogram [79, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 17:52:52,830 INFO L371 AbstractCegarLoop]: === Iteration 98 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-04 17:52:52,830 INFO L82 PathProgramCache]: Analyzing trace with hash -56808877, now seen corresponding path program 69 times [2018-02-04 17:52:52,830 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 17:52:52,830 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 17:52:52,830 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:52:52,830 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 17:52:52,831 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:52:52,866 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 17:52:52,867 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 17:52:54,784 INFO L134 CoverageAnalysis]: Checked inductivity of 3214 backedges. 0 proven. 3160 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:52:54,784 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 17:52:54,784 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 17:52:54,784 INFO L109 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-02-04 17:52:54,822 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 41 check-sat command(s) [2018-02-04 17:52:54,822 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 17:52:54,836 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 17:52:56,413 INFO L134 CoverageAnalysis]: Checked inductivity of 3214 backedges. 0 proven. 3160 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:52:56,413 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 17:52:56,413 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [83, 83] total 164 [2018-02-04 17:52:56,413 INFO L409 AbstractCegarLoop]: Interpolant automaton has 164 states [2018-02-04 17:52:56,415 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 164 interpolants. [2018-02-04 17:52:56,416 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=10045, Invalid=16687, Unknown=0, NotChecked=0, Total=26732 [2018-02-04 17:52:56,416 INFO L87 Difference]: Start difference. First operand 162 states and 167 transitions. Second operand 164 states. [2018-02-04 17:52:56,647 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 17:52:56,647 INFO L93 Difference]: Finished difference Result 165 states and 170 transitions. [2018-02-04 17:52:56,647 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 83 states. [2018-02-04 17:52:56,647 INFO L78 Accepts]: Start accepts. Automaton has 164 states. Word has length 157 [2018-02-04 17:52:56,648 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 17:52:56,648 INFO L225 Difference]: With dead ends: 165 [2018-02-04 17:52:56,648 INFO L226 Difference]: Without dead ends: 163 [2018-02-04 17:52:56,649 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 241 GetRequests, 77 SyntacticMatches, 0 SemanticMatches, 164 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13115 ImplicationChecksByTransitivity, 3.3s TimeCoverageRelationStatistics Valid=10292, Invalid=17098, Unknown=0, NotChecked=0, Total=27390 [2018-02-04 17:52:56,650 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 163 states. [2018-02-04 17:52:56,650 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 163 to 163. [2018-02-04 17:52:56,651 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 163 states. [2018-02-04 17:52:56,651 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 163 states to 163 states and 168 transitions. [2018-02-04 17:52:56,651 INFO L78 Accepts]: Start accepts. Automaton has 163 states and 168 transitions. Word has length 157 [2018-02-04 17:52:56,651 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 17:52:56,651 INFO L432 AbstractCegarLoop]: Abstraction has 163 states and 168 transitions. [2018-02-04 17:52:56,651 INFO L433 AbstractCegarLoop]: Interpolant automaton has 164 states. [2018-02-04 17:52:56,651 INFO L276 IsEmpty]: Start isEmpty. Operand 163 states and 168 transitions. [2018-02-04 17:52:56,651 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 159 [2018-02-04 17:52:56,651 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 17:52:56,651 INFO L351 BasicCegarLoop]: trace histogram [80, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 17:52:56,652 INFO L371 AbstractCegarLoop]: === Iteration 99 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-04 17:52:56,652 INFO L82 PathProgramCache]: Analyzing trace with hash -228372512, now seen corresponding path program 70 times [2018-02-04 17:52:56,652 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 17:52:56,652 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 17:52:56,652 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:52:56,652 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 17:52:56,652 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:52:56,687 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 17:52:56,688 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 17:52:58,618 INFO L134 CoverageAnalysis]: Checked inductivity of 3294 backedges. 0 proven. 3240 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:52:58,618 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 17:52:58,618 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 17:52:58,619 INFO L109 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-02-04 17:52:58,668 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-02-04 17:52:58,668 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 17:52:58,677 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 17:53:00,303 INFO L134 CoverageAnalysis]: Checked inductivity of 3294 backedges. 0 proven. 3240 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:53:00,303 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 17:53:00,303 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [84, 84] total 166 [2018-02-04 17:53:00,303 INFO L409 AbstractCegarLoop]: Interpolant automaton has 166 states [2018-02-04 17:53:00,304 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 166 interpolants. [2018-02-04 17:53:00,306 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=10292, Invalid=17098, Unknown=0, NotChecked=0, Total=27390 [2018-02-04 17:53:00,306 INFO L87 Difference]: Start difference. First operand 163 states and 168 transitions. Second operand 166 states. [2018-02-04 17:53:00,507 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 17:53:00,507 INFO L93 Difference]: Finished difference Result 166 states and 171 transitions. [2018-02-04 17:53:00,508 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 84 states. [2018-02-04 17:53:00,508 INFO L78 Accepts]: Start accepts. Automaton has 166 states. Word has length 158 [2018-02-04 17:53:00,508 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 17:53:00,508 INFO L225 Difference]: With dead ends: 166 [2018-02-04 17:53:00,508 INFO L226 Difference]: Without dead ends: 164 [2018-02-04 17:53:00,510 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 243 GetRequests, 77 SyntacticMatches, 0 SemanticMatches, 166 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13441 ImplicationChecksByTransitivity, 3.3s TimeCoverageRelationStatistics Valid=10542, Invalid=17514, Unknown=0, NotChecked=0, Total=28056 [2018-02-04 17:53:00,511 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 164 states. [2018-02-04 17:53:00,512 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 164 to 164. [2018-02-04 17:53:00,512 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 164 states. [2018-02-04 17:53:00,513 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 164 states to 164 states and 169 transitions. [2018-02-04 17:53:00,513 INFO L78 Accepts]: Start accepts. Automaton has 164 states and 169 transitions. Word has length 158 [2018-02-04 17:53:00,513 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 17:53:00,513 INFO L432 AbstractCegarLoop]: Abstraction has 164 states and 169 transitions. [2018-02-04 17:53:00,513 INFO L433 AbstractCegarLoop]: Interpolant automaton has 166 states. [2018-02-04 17:53:00,513 INFO L276 IsEmpty]: Start isEmpty. Operand 164 states and 169 transitions. [2018-02-04 17:53:00,514 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 160 [2018-02-04 17:53:00,514 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 17:53:00,514 INFO L351 BasicCegarLoop]: trace histogram [81, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 17:53:00,514 INFO L371 AbstractCegarLoop]: === Iteration 100 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-04 17:53:00,514 INFO L82 PathProgramCache]: Analyzing trace with hash -1251877901, now seen corresponding path program 71 times [2018-02-04 17:53:00,514 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 17:53:00,514 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 17:53:00,515 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:53:00,515 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 17:53:00,515 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:53:00,554 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 17:53:00,555 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 17:53:02,942 INFO L134 CoverageAnalysis]: Checked inductivity of 3375 backedges. 0 proven. 3321 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:53:02,942 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 17:53:02,942 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 17:53:02,943 INFO L109 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-02-04 17:53:03,028 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 42 check-sat command(s) [2018-02-04 17:53:03,028 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 17:53:03,036 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 17:53:04,742 INFO L134 CoverageAnalysis]: Checked inductivity of 3375 backedges. 0 proven. 3321 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:53:04,742 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 17:53:04,742 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [85, 85] total 168 [2018-02-04 17:53:04,742 INFO L409 AbstractCegarLoop]: Interpolant automaton has 168 states [2018-02-04 17:53:04,744 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 168 interpolants. [2018-02-04 17:53:04,745 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=10542, Invalid=17514, Unknown=0, NotChecked=0, Total=28056 [2018-02-04 17:53:04,745 INFO L87 Difference]: Start difference. First operand 164 states and 169 transitions. Second operand 168 states. [2018-02-04 17:53:04,944 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 17:53:04,944 INFO L93 Difference]: Finished difference Result 167 states and 172 transitions. [2018-02-04 17:53:04,944 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 85 states. [2018-02-04 17:53:04,944 INFO L78 Accepts]: Start accepts. Automaton has 168 states. Word has length 159 [2018-02-04 17:53:04,944 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 17:53:04,945 INFO L225 Difference]: With dead ends: 167 [2018-02-04 17:53:04,945 INFO L226 Difference]: Without dead ends: 165 [2018-02-04 17:53:04,946 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 245 GetRequests, 77 SyntacticMatches, 0 SemanticMatches, 168 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13771 ImplicationChecksByTransitivity, 3.9s TimeCoverageRelationStatistics Valid=10795, Invalid=17935, Unknown=0, NotChecked=0, Total=28730 [2018-02-04 17:53:04,946 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 165 states. [2018-02-04 17:53:04,947 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 165 to 165. [2018-02-04 17:53:04,947 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 165 states. [2018-02-04 17:53:04,947 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 165 states to 165 states and 170 transitions. [2018-02-04 17:53:04,948 INFO L78 Accepts]: Start accepts. Automaton has 165 states and 170 transitions. Word has length 159 [2018-02-04 17:53:04,948 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 17:53:04,948 INFO L432 AbstractCegarLoop]: Abstraction has 165 states and 170 transitions. [2018-02-04 17:53:04,948 INFO L433 AbstractCegarLoop]: Interpolant automaton has 168 states. [2018-02-04 17:53:04,948 INFO L276 IsEmpty]: Start isEmpty. Operand 165 states and 170 transitions. [2018-02-04 17:53:04,948 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 161 [2018-02-04 17:53:04,948 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 17:53:04,948 INFO L351 BasicCegarLoop]: trace histogram [82, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 17:53:04,948 INFO L371 AbstractCegarLoop]: === Iteration 101 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-04 17:53:04,949 INFO L82 PathProgramCache]: Analyzing trace with hash 1379193408, now seen corresponding path program 72 times [2018-02-04 17:53:04,949 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 17:53:04,949 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 17:53:04,949 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:53:04,949 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 17:53:04,949 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:53:04,988 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 17:53:04,988 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 17:53:06,909 INFO L134 CoverageAnalysis]: Checked inductivity of 3457 backedges. 0 proven. 3403 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:53:06,910 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 17:53:06,910 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 17:53:06,910 INFO L109 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-02-04 17:53:06,965 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 42 check-sat command(s) [2018-02-04 17:53:06,965 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 17:53:06,973 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 17:53:08,613 INFO L134 CoverageAnalysis]: Checked inductivity of 3457 backedges. 0 proven. 3403 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:53:08,613 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 17:53:08,613 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [86, 86] total 170 [2018-02-04 17:53:08,613 INFO L409 AbstractCegarLoop]: Interpolant automaton has 170 states [2018-02-04 17:53:08,614 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 170 interpolants. [2018-02-04 17:53:08,616 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=10795, Invalid=17935, Unknown=0, NotChecked=0, Total=28730 [2018-02-04 17:53:08,616 INFO L87 Difference]: Start difference. First operand 165 states and 170 transitions. Second operand 170 states. [2018-02-04 17:53:08,825 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 17:53:08,825 INFO L93 Difference]: Finished difference Result 168 states and 173 transitions. [2018-02-04 17:53:08,826 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 86 states. [2018-02-04 17:53:08,826 INFO L78 Accepts]: Start accepts. Automaton has 170 states. Word has length 160 [2018-02-04 17:53:08,826 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 17:53:08,826 INFO L225 Difference]: With dead ends: 168 [2018-02-04 17:53:08,826 INFO L226 Difference]: Without dead ends: 166 [2018-02-04 17:53:08,850 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 247 GetRequests, 77 SyntacticMatches, 0 SemanticMatches, 170 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14105 ImplicationChecksByTransitivity, 3.3s TimeCoverageRelationStatistics Valid=11051, Invalid=18361, Unknown=0, NotChecked=0, Total=29412 [2018-02-04 17:53:08,850 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 166 states. [2018-02-04 17:53:08,851 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 166 to 166. [2018-02-04 17:53:08,851 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 166 states. [2018-02-04 17:53:08,851 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 166 states to 166 states and 171 transitions. [2018-02-04 17:53:08,851 INFO L78 Accepts]: Start accepts. Automaton has 166 states and 171 transitions. Word has length 160 [2018-02-04 17:53:08,851 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 17:53:08,851 INFO L432 AbstractCegarLoop]: Abstraction has 166 states and 171 transitions. [2018-02-04 17:53:08,851 INFO L433 AbstractCegarLoop]: Interpolant automaton has 170 states. [2018-02-04 17:53:08,851 INFO L276 IsEmpty]: Start isEmpty. Operand 166 states and 171 transitions. [2018-02-04 17:53:08,851 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 162 [2018-02-04 17:53:08,852 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 17:53:08,852 INFO L351 BasicCegarLoop]: trace histogram [83, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 17:53:08,852 INFO L371 AbstractCegarLoop]: === Iteration 102 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-04 17:53:08,852 INFO L82 PathProgramCache]: Analyzing trace with hash 1338025363, now seen corresponding path program 73 times [2018-02-04 17:53:08,852 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 17:53:08,852 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 17:53:08,852 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:53:08,852 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 17:53:08,852 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:53:08,889 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 17:53:08,890 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 17:53:10,914 INFO L134 CoverageAnalysis]: Checked inductivity of 3540 backedges. 0 proven. 3486 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:53:10,914 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 17:53:10,914 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 17:53:10,914 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 17:53:10,956 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 17:53:10,961 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 17:53:12,623 INFO L134 CoverageAnalysis]: Checked inductivity of 3540 backedges. 0 proven. 3486 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:53:12,623 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 17:53:12,623 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [87, 87] total 172 [2018-02-04 17:53:12,624 INFO L409 AbstractCegarLoop]: Interpolant automaton has 172 states [2018-02-04 17:53:12,624 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 172 interpolants. [2018-02-04 17:53:12,625 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11051, Invalid=18361, Unknown=0, NotChecked=0, Total=29412 [2018-02-04 17:53:12,625 INFO L87 Difference]: Start difference. First operand 166 states and 171 transitions. Second operand 172 states. [2018-02-04 17:53:12,773 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 17:53:12,773 INFO L93 Difference]: Finished difference Result 169 states and 174 transitions. [2018-02-04 17:53:12,773 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 87 states. [2018-02-04 17:53:12,773 INFO L78 Accepts]: Start accepts. Automaton has 172 states. Word has length 161 [2018-02-04 17:53:12,774 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 17:53:12,774 INFO L225 Difference]: With dead ends: 169 [2018-02-04 17:53:12,774 INFO L226 Difference]: Without dead ends: 167 [2018-02-04 17:53:12,776 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 249 GetRequests, 77 SyntacticMatches, 0 SemanticMatches, 172 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14443 ImplicationChecksByTransitivity, 3.5s TimeCoverageRelationStatistics Valid=11310, Invalid=18792, Unknown=0, NotChecked=0, Total=30102 [2018-02-04 17:53:12,776 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 167 states. [2018-02-04 17:53:12,777 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 167 to 167. [2018-02-04 17:53:12,777 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 167 states. [2018-02-04 17:53:12,778 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 167 states to 167 states and 172 transitions. [2018-02-04 17:53:12,778 INFO L78 Accepts]: Start accepts. Automaton has 167 states and 172 transitions. Word has length 161 [2018-02-04 17:53:12,778 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 17:53:12,778 INFO L432 AbstractCegarLoop]: Abstraction has 167 states and 172 transitions. [2018-02-04 17:53:12,778 INFO L433 AbstractCegarLoop]: Interpolant automaton has 172 states. [2018-02-04 17:53:12,778 INFO L276 IsEmpty]: Start isEmpty. Operand 167 states and 172 transitions. [2018-02-04 17:53:12,779 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 163 [2018-02-04 17:53:12,779 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 17:53:12,779 INFO L351 BasicCegarLoop]: trace histogram [84, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 17:53:12,779 INFO L371 AbstractCegarLoop]: === Iteration 103 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-04 17:53:12,779 INFO L82 PathProgramCache]: Analyzing trace with hash 61815968, now seen corresponding path program 74 times [2018-02-04 17:53:12,779 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 17:53:12,779 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 17:53:12,780 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:53:12,780 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 17:53:12,780 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:53:12,817 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 17:53:12,817 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 17:53:14,799 INFO L134 CoverageAnalysis]: Checked inductivity of 3624 backedges. 0 proven. 3570 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:53:14,799 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 17:53:14,800 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 17:53:14,800 INFO L109 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-02-04 17:53:14,833 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-02-04 17:53:14,833 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 17:53:14,840 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 17:53:16,470 INFO L134 CoverageAnalysis]: Checked inductivity of 3624 backedges. 0 proven. 3570 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:53:16,470 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 17:53:16,470 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [88, 88] total 174 [2018-02-04 17:53:16,471 INFO L409 AbstractCegarLoop]: Interpolant automaton has 174 states [2018-02-04 17:53:16,472 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 174 interpolants. [2018-02-04 17:53:16,473 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11310, Invalid=18792, Unknown=0, NotChecked=0, Total=30102 [2018-02-04 17:53:16,473 INFO L87 Difference]: Start difference. First operand 167 states and 172 transitions. Second operand 174 states. [2018-02-04 17:53:16,708 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 17:53:16,708 INFO L93 Difference]: Finished difference Result 170 states and 175 transitions. [2018-02-04 17:53:16,709 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 88 states. [2018-02-04 17:53:16,709 INFO L78 Accepts]: Start accepts. Automaton has 174 states. Word has length 162 [2018-02-04 17:53:16,709 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 17:53:16,710 INFO L225 Difference]: With dead ends: 170 [2018-02-04 17:53:16,710 INFO L226 Difference]: Without dead ends: 168 [2018-02-04 17:53:16,711 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 251 GetRequests, 77 SyntacticMatches, 0 SemanticMatches, 174 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14785 ImplicationChecksByTransitivity, 3.4s TimeCoverageRelationStatistics Valid=11572, Invalid=19228, Unknown=0, NotChecked=0, Total=30800 [2018-02-04 17:53:16,711 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 168 states. [2018-02-04 17:53:16,712 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 168 to 168. [2018-02-04 17:53:16,712 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 168 states. [2018-02-04 17:53:16,712 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 168 states to 168 states and 173 transitions. [2018-02-04 17:53:16,712 INFO L78 Accepts]: Start accepts. Automaton has 168 states and 173 transitions. Word has length 162 [2018-02-04 17:53:16,712 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 17:53:16,713 INFO L432 AbstractCegarLoop]: Abstraction has 168 states and 173 transitions. [2018-02-04 17:53:16,713 INFO L433 AbstractCegarLoop]: Interpolant automaton has 174 states. [2018-02-04 17:53:16,713 INFO L276 IsEmpty]: Start isEmpty. Operand 168 states and 173 transitions. [2018-02-04 17:53:16,713 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 164 [2018-02-04 17:53:16,713 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 17:53:16,713 INFO L351 BasicCegarLoop]: trace histogram [85, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 17:53:16,713 INFO L371 AbstractCegarLoop]: === Iteration 104 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-04 17:53:16,713 INFO L82 PathProgramCache]: Analyzing trace with hash -845969613, now seen corresponding path program 75 times [2018-02-04 17:53:16,713 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 17:53:16,713 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 17:53:16,714 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:53:16,714 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 17:53:16,714 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:53:16,756 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 17:53:16,756 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 17:53:18,817 INFO L134 CoverageAnalysis]: Checked inductivity of 3709 backedges. 0 proven. 3655 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:53:18,817 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 17:53:18,817 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 17:53:18,818 INFO L109 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-02-04 17:53:18,887 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 44 check-sat command(s) [2018-02-04 17:53:18,887 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 17:53:18,907 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 17:53:20,621 INFO L134 CoverageAnalysis]: Checked inductivity of 3709 backedges. 0 proven. 3655 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:53:20,621 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 17:53:20,622 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [89, 89] total 176 [2018-02-04 17:53:20,622 INFO L409 AbstractCegarLoop]: Interpolant automaton has 176 states [2018-02-04 17:53:20,623 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 176 interpolants. [2018-02-04 17:53:20,625 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11572, Invalid=19228, Unknown=0, NotChecked=0, Total=30800 [2018-02-04 17:53:20,625 INFO L87 Difference]: Start difference. First operand 168 states and 173 transitions. Second operand 176 states. [2018-02-04 17:53:20,879 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 17:53:20,879 INFO L93 Difference]: Finished difference Result 171 states and 176 transitions. [2018-02-04 17:53:20,879 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 89 states. [2018-02-04 17:53:20,879 INFO L78 Accepts]: Start accepts. Automaton has 176 states. Word has length 163 [2018-02-04 17:53:20,880 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 17:53:20,880 INFO L225 Difference]: With dead ends: 171 [2018-02-04 17:53:20,880 INFO L226 Difference]: Without dead ends: 169 [2018-02-04 17:53:20,881 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 253 GetRequests, 77 SyntacticMatches, 0 SemanticMatches, 176 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15131 ImplicationChecksByTransitivity, 3.6s TimeCoverageRelationStatistics Valid=11837, Invalid=19669, Unknown=0, NotChecked=0, Total=31506 [2018-02-04 17:53:20,882 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 169 states. [2018-02-04 17:53:20,882 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 169 to 169. [2018-02-04 17:53:20,883 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 169 states. [2018-02-04 17:53:20,883 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 169 states to 169 states and 174 transitions. [2018-02-04 17:53:20,883 INFO L78 Accepts]: Start accepts. Automaton has 169 states and 174 transitions. Word has length 163 [2018-02-04 17:53:20,883 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 17:53:20,883 INFO L432 AbstractCegarLoop]: Abstraction has 169 states and 174 transitions. [2018-02-04 17:53:20,883 INFO L433 AbstractCegarLoop]: Interpolant automaton has 176 states. [2018-02-04 17:53:20,883 INFO L276 IsEmpty]: Start isEmpty. Operand 169 states and 174 transitions. [2018-02-04 17:53:20,883 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 165 [2018-02-04 17:53:20,883 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 17:53:20,883 INFO L351 BasicCegarLoop]: trace histogram [86, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 17:53:20,884 INFO L371 AbstractCegarLoop]: === Iteration 105 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-04 17:53:20,884 INFO L82 PathProgramCache]: Analyzing trace with hash 1077448448, now seen corresponding path program 76 times [2018-02-04 17:53:20,884 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 17:53:20,884 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 17:53:20,884 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:53:20,884 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 17:53:20,884 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:53:20,924 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 17:53:20,925 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 17:53:23,066 INFO L134 CoverageAnalysis]: Checked inductivity of 3795 backedges. 0 proven. 3741 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:53:23,067 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 17:53:23,067 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 17:53:23,067 INFO L109 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-02-04 17:53:23,124 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-02-04 17:53:23,124 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 17:53:23,134 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 17:53:24,880 INFO L134 CoverageAnalysis]: Checked inductivity of 3795 backedges. 0 proven. 3741 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:53:24,880 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 17:53:24,880 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [90, 90] total 178 [2018-02-04 17:53:24,880 INFO L409 AbstractCegarLoop]: Interpolant automaton has 178 states [2018-02-04 17:53:24,881 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 178 interpolants. [2018-02-04 17:53:24,883 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11837, Invalid=19669, Unknown=0, NotChecked=0, Total=31506 [2018-02-04 17:53:24,883 INFO L87 Difference]: Start difference. First operand 169 states and 174 transitions. Second operand 178 states. [2018-02-04 17:53:25,107 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 17:53:25,107 INFO L93 Difference]: Finished difference Result 172 states and 177 transitions. [2018-02-04 17:53:25,107 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 90 states. [2018-02-04 17:53:25,108 INFO L78 Accepts]: Start accepts. Automaton has 178 states. Word has length 164 [2018-02-04 17:53:25,108 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 17:53:25,108 INFO L225 Difference]: With dead ends: 172 [2018-02-04 17:53:25,108 INFO L226 Difference]: Without dead ends: 170 [2018-02-04 17:53:25,110 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 255 GetRequests, 77 SyntacticMatches, 0 SemanticMatches, 178 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15481 ImplicationChecksByTransitivity, 3.6s TimeCoverageRelationStatistics Valid=12105, Invalid=20115, Unknown=0, NotChecked=0, Total=32220 [2018-02-04 17:53:25,110 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 170 states. [2018-02-04 17:53:25,110 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 170 to 170. [2018-02-04 17:53:25,110 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 170 states. [2018-02-04 17:53:25,111 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 170 states to 170 states and 175 transitions. [2018-02-04 17:53:25,111 INFO L78 Accepts]: Start accepts. Automaton has 170 states and 175 transitions. Word has length 164 [2018-02-04 17:53:25,111 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 17:53:25,111 INFO L432 AbstractCegarLoop]: Abstraction has 170 states and 175 transitions. [2018-02-04 17:53:25,111 INFO L433 AbstractCegarLoop]: Interpolant automaton has 178 states. [2018-02-04 17:53:25,111 INFO L276 IsEmpty]: Start isEmpty. Operand 170 states and 175 transitions. [2018-02-04 17:53:25,112 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 166 [2018-02-04 17:53:25,112 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 17:53:25,112 INFO L351 BasicCegarLoop]: trace histogram [87, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 17:53:25,112 INFO L371 AbstractCegarLoop]: === Iteration 106 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-04 17:53:25,112 INFO L82 PathProgramCache]: Analyzing trace with hash 573866195, now seen corresponding path program 77 times [2018-02-04 17:53:25,112 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 17:53:25,112 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 17:53:25,113 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:53:25,113 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 17:53:25,113 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:53:25,155 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 17:53:25,155 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 17:53:27,254 INFO L134 CoverageAnalysis]: Checked inductivity of 3882 backedges. 0 proven. 3828 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:53:27,254 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 17:53:27,254 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 17:53:27,255 INFO L109 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-02-04 17:53:27,349 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 45 check-sat command(s) [2018-02-04 17:53:27,349 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 17:53:27,356 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 17:53:29,236 INFO L134 CoverageAnalysis]: Checked inductivity of 3882 backedges. 0 proven. 3828 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:53:29,236 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 17:53:29,237 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [91, 91] total 180 [2018-02-04 17:53:29,237 INFO L409 AbstractCegarLoop]: Interpolant automaton has 180 states [2018-02-04 17:53:29,238 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 180 interpolants. [2018-02-04 17:53:29,239 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=12105, Invalid=20115, Unknown=0, NotChecked=0, Total=32220 [2018-02-04 17:53:29,239 INFO L87 Difference]: Start difference. First operand 170 states and 175 transitions. Second operand 180 states. [2018-02-04 17:53:29,438 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 17:53:29,438 INFO L93 Difference]: Finished difference Result 173 states and 178 transitions. [2018-02-04 17:53:29,438 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 91 states. [2018-02-04 17:53:29,438 INFO L78 Accepts]: Start accepts. Automaton has 180 states. Word has length 165 [2018-02-04 17:53:29,438 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 17:53:29,439 INFO L225 Difference]: With dead ends: 173 [2018-02-04 17:53:29,439 INFO L226 Difference]: Without dead ends: 171 [2018-02-04 17:53:29,439 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 257 GetRequests, 77 SyntacticMatches, 0 SemanticMatches, 180 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15835 ImplicationChecksByTransitivity, 3.7s TimeCoverageRelationStatistics Valid=12376, Invalid=20566, Unknown=0, NotChecked=0, Total=32942 [2018-02-04 17:53:29,440 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 171 states. [2018-02-04 17:53:29,440 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 171 to 171. [2018-02-04 17:53:29,441 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 171 states. [2018-02-04 17:53:29,441 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 171 states to 171 states and 176 transitions. [2018-02-04 17:53:29,441 INFO L78 Accepts]: Start accepts. Automaton has 171 states and 176 transitions. Word has length 165 [2018-02-04 17:53:29,441 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 17:53:29,441 INFO L432 AbstractCegarLoop]: Abstraction has 171 states and 176 transitions. [2018-02-04 17:53:29,441 INFO L433 AbstractCegarLoop]: Interpolant automaton has 180 states. [2018-02-04 17:53:29,441 INFO L276 IsEmpty]: Start isEmpty. Operand 171 states and 176 transitions. [2018-02-04 17:53:29,442 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 167 [2018-02-04 17:53:29,442 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 17:53:29,442 INFO L351 BasicCegarLoop]: trace histogram [88, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 17:53:29,442 INFO L371 AbstractCegarLoop]: === Iteration 107 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-02-04 17:53:29,442 INFO L82 PathProgramCache]: Analyzing trace with hash 2142685536, now seen corresponding path program 78 times [2018-02-04 17:53:29,442 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 17:53:29,442 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 17:53:29,443 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:53:29,443 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 17:53:29,443 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 17:53:29,484 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 17:53:29,484 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 17:53:31,626 INFO L134 CoverageAnalysis]: Checked inductivity of 3970 backedges. 0 proven. 3916 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-02-04 17:53:31,626 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 17:53:31,626 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 17:53:31,626 INFO L109 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-02-04 17:53:31,683 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 45 check-sat command(s) [2018-02-04 17:53:31,683 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 17:53:31,690 INFO L270 TraceCheckSpWp]: Computing forward predicates... Received shutdown request... [2018-02-04 17:53:32,119 INFO L175 TraceCheckSpWp]: Timeout while computing interpolants [2018-02-04 17:53:32,119 WARN L491 AbstractCegarLoop]: Verification canceled [2018-02-04 17:53:32,123 WARN L185 ceAbstractionStarter]: Timeout [2018-02-04 17:53:32,124 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 04.02 05:53:32 BoogieIcfgContainer [2018-02-04 17:53:32,124 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-02-04 17:53:32,124 INFO L168 Benchmark]: Toolchain (without parser) took 164064.99 ms. Allocated memory was 405.8 MB in the beginning and 2.2 GB in the end (delta: 1.8 GB). Free memory was 362.5 MB in the beginning and 1.8 GB in the end (delta: -1.5 GB). Peak memory consumption was 357.6 MB. Max. memory is 5.3 GB. [2018-02-04 17:53:32,125 INFO L168 Benchmark]: CDTParser took 0.16 ms. Allocated memory is still 405.8 MB. Free memory is still 367.8 MB. There was no memory consumed. Max. memory is 5.3 GB. [2018-02-04 17:53:32,126 INFO L168 Benchmark]: CACSL2BoogieTranslator took 165.70 ms. Allocated memory is still 405.8 MB. Free memory was 362.5 MB in the beginning and 351.9 MB in the end (delta: 10.6 MB). Peak memory consumption was 10.6 MB. Max. memory is 5.3 GB. [2018-02-04 17:53:32,126 INFO L168 Benchmark]: Boogie Preprocessor took 27.30 ms. Allocated memory is still 405.8 MB. Free memory was 351.9 MB in the beginning and 349.3 MB in the end (delta: 2.6 MB). Peak memory consumption was 2.6 MB. Max. memory is 5.3 GB. [2018-02-04 17:53:32,126 INFO L168 Benchmark]: RCFGBuilder took 224.83 ms. Allocated memory is still 405.8 MB. Free memory was 349.3 MB in the beginning and 324.0 MB in the end (delta: 25.3 MB). Peak memory consumption was 25.3 MB. Max. memory is 5.3 GB. [2018-02-04 17:53:32,126 INFO L168 Benchmark]: TraceAbstraction took 163644.26 ms. Allocated memory was 405.8 MB in the beginning and 2.2 GB in the end (delta: 1.8 GB). Free memory was 324.0 MB in the beginning and 1.8 GB in the end (delta: -1.5 GB). Peak memory consumption was 319.2 MB. Max. memory is 5.3 GB. [2018-02-04 17:53:32,128 INFO L344 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.16 ms. Allocated memory is still 405.8 MB. Free memory is still 367.8 MB. There was no memory consumed. Max. memory is 5.3 GB. * CACSL2BoogieTranslator took 165.70 ms. Allocated memory is still 405.8 MB. Free memory was 362.5 MB in the beginning and 351.9 MB in the end (delta: 10.6 MB). Peak memory consumption was 10.6 MB. Max. memory is 5.3 GB. * Boogie Preprocessor took 27.30 ms. Allocated memory is still 405.8 MB. Free memory was 351.9 MB in the beginning and 349.3 MB in the end (delta: 2.6 MB). Peak memory consumption was 2.6 MB. Max. memory is 5.3 GB. * RCFGBuilder took 224.83 ms. Allocated memory is still 405.8 MB. Free memory was 349.3 MB in the beginning and 324.0 MB in the end (delta: 25.3 MB). Peak memory consumption was 25.3 MB. Max. memory is 5.3 GB. * TraceAbstraction took 163644.26 ms. Allocated memory was 405.8 MB in the beginning and 2.2 GB in the end (delta: 1.8 GB). Free memory was 324.0 MB in the beginning and 1.8 GB in the end (delta: -1.5 GB). Peak memory consumption was 319.2 MB. Max. memory is 5.3 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 663). Cancelled while BasicCegarLoop was analyzing trace of length 167 with TraceHistMax 88, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantifier-free) to 132 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 662). Cancelled while BasicCegarLoop was analyzing trace of length 167 with TraceHistMax 88, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantifier-free) to 132 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 662). Cancelled while BasicCegarLoop was analyzing trace of length 167 with TraceHistMax 88, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantifier-free) to 132 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 663). Cancelled while BasicCegarLoop was analyzing trace of length 167 with TraceHistMax 88, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantifier-free) to 132 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 653). Cancelled while BasicCegarLoop was analyzing trace of length 167 with TraceHistMax 88, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantifier-free) to 132 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 653). Cancelled while BasicCegarLoop was analyzing trace of length 167 with TraceHistMax 88, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantifier-free) to 132 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 652). Cancelled while BasicCegarLoop was analyzing trace of length 167 with TraceHistMax 88, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantifier-free) to 132 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 652). Cancelled while BasicCegarLoop was analyzing trace of length 167 with TraceHistMax 88, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantifier-free) to 132 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 674). Cancelled while BasicCegarLoop was analyzing trace of length 167 with TraceHistMax 88, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantifier-free) to 132 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 678). Cancelled while BasicCegarLoop was analyzing trace of length 167 with TraceHistMax 88, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantifier-free) to 132 known predicates. - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 672). Cancelled while BasicCegarLoop was analyzing trace of length 167 with TraceHistMax 88, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantifier-free) to 132 known predicates. - TimeoutResultAtElement [Line: 670]: Timeout (TraceAbstraction) Unable to prove that all allocated memory was freed (line 670). Cancelled while BasicCegarLoop was analyzing trace of length 167 with TraceHistMax 88, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantifier-free) to 132 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 676). Cancelled while BasicCegarLoop was analyzing trace of length 167 with TraceHistMax 88, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantifier-free) to 132 known predicates. - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 672). Cancelled while BasicCegarLoop was analyzing trace of length 167 with TraceHistMax 88, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantifier-free) to 132 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 673). Cancelled while BasicCegarLoop was analyzing trace of length 167 with TraceHistMax 88, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantifier-free) to 132 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 675). Cancelled while BasicCegarLoop was analyzing trace of length 167 with TraceHistMax 88, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantifier-free) to 132 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 677). Cancelled while BasicCegarLoop was analyzing trace of length 167 with TraceHistMax 88, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantifier-free) to 132 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 676). Cancelled while BasicCegarLoop was analyzing trace of length 167 with TraceHistMax 88, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantifier-free) to 132 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 677). Cancelled while BasicCegarLoop was analyzing trace of length 167 with TraceHistMax 88, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantifier-free) to 132 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 679). Cancelled while BasicCegarLoop was analyzing trace of length 167 with TraceHistMax 88, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantifier-free) to 132 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 673). Cancelled while BasicCegarLoop was analyzing trace of length 167 with TraceHistMax 88, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantifier-free) to 132 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 674). Cancelled while BasicCegarLoop was analyzing trace of length 167 with TraceHistMax 88, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantifier-free) to 132 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 678). Cancelled while BasicCegarLoop was analyzing trace of length 167 with TraceHistMax 88, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantifier-free) to 132 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 675). Cancelled while BasicCegarLoop was analyzing trace of length 167 with TraceHistMax 88, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantifier-free) to 132 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 679). Cancelled while BasicCegarLoop was analyzing trace of length 167 with TraceHistMax 88, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantifier-free) to 132 known predicates. - StatisticsResult: Ultimate Automizer benchmark data CFG has 7 procedures, 80 locations, 25 error locations. TIMEOUT Result, 163.6s OverallTime, 107 OverallIterations, 88 TraceHistogramMax, 17.6s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 5749 SDtfs, 1302 SDslu, 246637 SDs, 0 SdLazy, 21393 SolverSat, 847 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 10.8s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 15088 GetRequests, 6757 SyntacticMatches, 20 SemanticMatches, 8311 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 475849 ImplicationChecksByTransitivity, 128.0s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=171occurred in iteration=106, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.2s AutomataMinimizationTime, 106 MinimizatonAttempts, 55 StatesRemovedByMinimization, 13 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.2s SsaConstructionTime, 4.2s SatisfiabilityAnalysisTime, 137.3s InterpolantComputationTime, 21894 NumberOfCodeBlocks, 21769 NumberOfCodeBlocksAsserted, 1195 NumberOfCheckSat, 20460 ConstructedInterpolants, 257 QuantifiedInterpolants, 8452110 SizeOfPredicates, 154 NumberOfNonLiveVariables, 39878 ConjunctsInSsa, 4340 ConjunctsInUnsatCore, 182 InterpolantComputations, 13 PerfectInterpolantSequences, 8827/235474 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: Timeout Written .csv to /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/20051113-1.c_false-valid-memtrack.i_svcomp-DerefFreeMemtrack-32bit-Automizer_SmtInterpol_NoArray.epf_AutomizerC.xml/Csv-Benchmark-0-2018-02-04_17-53-32-134.csv Written .csv to /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/20051113-1.c_false-valid-memtrack.i_svcomp-DerefFreeMemtrack-32bit-Automizer_SmtInterpol_NoArray.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-0-2018-02-04_17-53-32-134.csv Completed graceful shutdown