java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/cade18-smtinterpol/svcomp-DerefFreeMemtrack-32bit-Automizer_SmtInterpol_NoArray.epf -i ../../../trunk/examples/svcomp/ldv-memsafety/memleaks_test22_2_true-valid-memsafety_true-termination.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-c17473d-m [2018-02-04 19:28:41,338 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-02-04 19:28:41,339 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-02-04 19:28:41,349 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-02-04 19:28:41,349 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-02-04 19:28:41,350 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-02-04 19:28:41,351 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-02-04 19:28:41,352 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-02-04 19:28:41,354 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-02-04 19:28:41,355 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-02-04 19:28:41,355 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-02-04 19:28:41,356 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-02-04 19:28:41,356 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-02-04 19:28:41,357 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-02-04 19:28:41,358 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-02-04 19:28:41,360 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-02-04 19:28:41,362 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-02-04 19:28:41,363 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-02-04 19:28:41,364 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-02-04 19:28:41,365 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-02-04 19:28:41,367 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-02-04 19:28:41,367 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-02-04 19:28:41,367 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-02-04 19:28:41,368 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-02-04 19:28:41,368 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-02-04 19:28:41,369 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-02-04 19:28:41,370 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-02-04 19:28:41,370 INFO L177 SettingsManager]: PEA to Boogie provides no preferences, ignoring... [2018-02-04 19:28:41,370 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-02-04 19:28:41,370 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-02-04 19:28:41,371 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-02-04 19:28:41,371 INFO L98 SettingsManager]: Beginning loading settings from /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/cade18-smtinterpol/svcomp-DerefFreeMemtrack-32bit-Automizer_SmtInterpol_NoArray.epf [2018-02-04 19:28:41,381 INFO L110 SettingsManager]: Loading preferences was successful [2018-02-04 19:28:41,381 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-02-04 19:28:41,382 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-02-04 19:28:41,382 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-02-04 19:28:41,382 INFO L133 SettingsManager]: * Use SBE=true [2018-02-04 19:28:41,383 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-02-04 19:28:41,383 INFO L133 SettingsManager]: * sizeof long=4 [2018-02-04 19:28:41,383 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-02-04 19:28:41,383 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-02-04 19:28:41,383 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-02-04 19:28:41,383 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-02-04 19:28:41,383 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-02-04 19:28:41,384 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-02-04 19:28:41,384 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-02-04 19:28:41,384 INFO L133 SettingsManager]: * sizeof long double=12 [2018-02-04 19:28:41,384 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-02-04 19:28:41,384 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-02-04 19:28:41,384 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-02-04 19:28:41,384 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-02-04 19:28:41,385 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-02-04 19:28:41,385 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-02-04 19:28:41,385 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-02-04 19:28:41,385 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-02-04 19:28:41,385 INFO L133 SettingsManager]: * Trace refinement strategy=SMTINTERPOL [2018-02-04 19:28:41,413 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-02-04 19:28:41,422 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully initialized [2018-02-04 19:28:41,424 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-02-04 19:28:41,426 INFO L271 PluginConnector]: Initializing CDTParser... [2018-02-04 19:28:41,426 INFO L276 PluginConnector]: CDTParser initialized [2018-02-04 19:28:41,426 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/ldv-memsafety/memleaks_test22_2_true-valid-memsafety_true-termination.i [2018-02-04 19:28:41,577 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-02-04 19:28:41,579 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-02-04 19:28:41,579 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-02-04 19:28:41,580 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-02-04 19:28:41,585 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-02-04 19:28:41,586 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 04.02 07:28:41" (1/1) ... [2018-02-04 19:28:41,588 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@581e1694 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 07:28:41, skipping insertion in model container [2018-02-04 19:28:41,589 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 04.02 07:28:41" (1/1) ... [2018-02-04 19:28:41,602 INFO L153 Dispatcher]: Using SV-COMP mode [2018-02-04 19:28:41,635 INFO L153 Dispatcher]: Using SV-COMP mode [2018-02-04 19:28:41,725 INFO L450 PostProcessor]: Settings: Checked method=main [2018-02-04 19:28:41,742 INFO L450 PostProcessor]: Settings: Checked method=main [2018-02-04 19:28:41,749 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 07:28:41 WrapperNode [2018-02-04 19:28:41,749 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-02-04 19:28:41,749 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-02-04 19:28:41,749 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-02-04 19:28:41,749 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-02-04 19:28:41,757 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 07:28:41" (1/1) ... [2018-02-04 19:28:41,757 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 07:28:41" (1/1) ... [2018-02-04 19:28:41,765 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 07:28:41" (1/1) ... [2018-02-04 19:28:41,765 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 07:28:41" (1/1) ... [2018-02-04 19:28:41,769 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 07:28:41" (1/1) ... [2018-02-04 19:28:41,771 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 07:28:41" (1/1) ... [2018-02-04 19:28:41,772 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 07:28:41" (1/1) ... [2018-02-04 19:28:41,775 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-02-04 19:28:41,775 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-02-04 19:28:41,775 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-02-04 19:28:41,776 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-02-04 19:28:41,776 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 07:28:41" (1/1) ... No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-02-04 19:28:41,809 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-02-04 19:28:41,809 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-02-04 19:28:41,809 INFO L136 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~TO~VOID [2018-02-04 19:28:41,809 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_malloc [2018-02-04 19:28:41,809 INFO L136 BoogieDeclarations]: Found implementation of procedure LDV_INIT_LIST_HEAD [2018-02-04 19:28:41,809 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_atomic_add_return [2018-02-04 19:28:41,809 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_atomic_sub_return [2018-02-04 19:28:41,810 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kref_sub [2018-02-04 19:28:41,810 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kref_init [2018-02-04 19:28:41,810 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kref_get [2018-02-04 19:28:41,810 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kref_put [2018-02-04 19:28:41,810 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_cleanup [2018-02-04 19:28:41,810 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_release [2018-02-04 19:28:41,810 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_put [2018-02-04 19:28:41,810 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_get [2018-02-04 19:28:41,811 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_init_internal [2018-02-04 19:28:41,811 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_init [2018-02-04 19:28:41,811 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_create [2018-02-04 19:28:41,811 INFO L136 BoogieDeclarations]: Found implementation of procedure entry_point [2018-02-04 19:28:41,811 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-02-04 19:28:41,811 INFO L128 BoogieDeclarations]: Found specification of procedure write~int [2018-02-04 19:28:41,811 INFO L128 BoogieDeclarations]: Found specification of procedure read~int [2018-02-04 19:28:41,811 INFO L128 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2018-02-04 19:28:41,811 INFO L128 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2018-02-04 19:28:41,812 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.free [2018-02-04 19:28:41,812 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-02-04 19:28:41,812 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-02-04 19:28:41,812 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2018-02-04 19:28:41,812 INFO L136 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2018-02-04 19:28:41,812 INFO L128 BoogieDeclarations]: Found specification of procedure malloc [2018-02-04 19:28:41,812 INFO L128 BoogieDeclarations]: Found specification of procedure free [2018-02-04 19:28:41,812 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2018-02-04 19:28:41,812 INFO L128 BoogieDeclarations]: Found specification of procedure memset [2018-02-04 19:28:41,812 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_malloc [2018-02-04 19:28:41,813 INFO L128 BoogieDeclarations]: Found specification of procedure LDV_INIT_LIST_HEAD [2018-02-04 19:28:41,813 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_atomic_add_return [2018-02-04 19:28:41,813 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_atomic_sub_return [2018-02-04 19:28:41,813 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kref_sub [2018-02-04 19:28:41,813 INFO L128 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~TO~VOID [2018-02-04 19:28:41,813 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kref_init [2018-02-04 19:28:41,813 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kref_get [2018-02-04 19:28:41,813 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kref_put [2018-02-04 19:28:41,814 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_cleanup [2018-02-04 19:28:41,814 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_release [2018-02-04 19:28:41,814 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_put [2018-02-04 19:28:41,814 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_get [2018-02-04 19:28:41,814 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_init_internal [2018-02-04 19:28:41,814 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_init [2018-02-04 19:28:41,814 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_create [2018-02-04 19:28:41,814 INFO L128 BoogieDeclarations]: Found specification of procedure entry_point [2018-02-04 19:28:41,815 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-02-04 19:28:41,815 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-02-04 19:28:41,815 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-02-04 19:28:41,995 WARN L455 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-02-04 19:28:42,110 INFO L257 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-02-04 19:28:42,110 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 04.02 07:28:42 BoogieIcfgContainer [2018-02-04 19:28:42,110 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-02-04 19:28:42,111 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-02-04 19:28:42,111 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-02-04 19:28:42,113 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-02-04 19:28:42,114 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 04.02 07:28:41" (1/3) ... [2018-02-04 19:28:42,114 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@c17bffa and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 04.02 07:28:42, skipping insertion in model container [2018-02-04 19:28:42,114 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 07:28:41" (2/3) ... [2018-02-04 19:28:42,114 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@c17bffa and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 04.02 07:28:42, skipping insertion in model container [2018-02-04 19:28:42,114 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 04.02 07:28:42" (3/3) ... [2018-02-04 19:28:42,115 INFO L107 eAbstractionObserver]: Analyzing ICFG memleaks_test22_2_true-valid-memsafety_true-termination.i [2018-02-04 19:28:42,121 INFO L128 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-02-04 19:28:42,125 INFO L140 ceAbstractionStarter]: Appying trace abstraction to program that has 23 error locations. [2018-02-04 19:28:42,148 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-02-04 19:28:42,148 INFO L323 AbstractCegarLoop]: Hoare is false [2018-02-04 19:28:42,148 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-02-04 19:28:42,148 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-02-04 19:28:42,148 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-02-04 19:28:42,148 INFO L327 AbstractCegarLoop]: Difference is false [2018-02-04 19:28:42,148 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-02-04 19:28:42,148 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-02-04 19:28:42,149 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-02-04 19:28:42,159 INFO L276 IsEmpty]: Start isEmpty. Operand 143 states. [2018-02-04 19:28:42,166 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-02-04 19:28:42,166 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:28:42,167 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:28:42,167 INFO L371 AbstractCegarLoop]: === Iteration 1 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 19:28:42,170 INFO L82 PathProgramCache]: Analyzing trace with hash -998986606, now seen corresponding path program 1 times [2018-02-04 19:28:42,171 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:28:42,171 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:28:42,205 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:28:42,205 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:28:42,205 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:28:42,237 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:28:42,242 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:28:42,422 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 19:28:42,424 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 19:28:42,424 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-02-04 19:28:42,425 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-02-04 19:28:42,433 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-02-04 19:28:42,433 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-02-04 19:28:42,435 INFO L87 Difference]: Start difference. First operand 143 states. Second operand 5 states. [2018-02-04 19:28:42,487 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 19:28:42,487 INFO L93 Difference]: Finished difference Result 149 states and 158 transitions. [2018-02-04 19:28:42,487 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-02-04 19:28:42,489 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 17 [2018-02-04 19:28:42,489 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 19:28:42,499 INFO L225 Difference]: With dead ends: 149 [2018-02-04 19:28:42,499 INFO L226 Difference]: Without dead ends: 146 [2018-02-04 19:28:42,501 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-02-04 19:28:42,514 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 146 states. [2018-02-04 19:28:42,534 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 146 to 144. [2018-02-04 19:28:42,536 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 144 states. [2018-02-04 19:28:42,538 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 144 states to 144 states and 153 transitions. [2018-02-04 19:28:42,539 INFO L78 Accepts]: Start accepts. Automaton has 144 states and 153 transitions. Word has length 17 [2018-02-04 19:28:42,539 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 19:28:42,539 INFO L432 AbstractCegarLoop]: Abstraction has 144 states and 153 transitions. [2018-02-04 19:28:42,540 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-02-04 19:28:42,540 INFO L276 IsEmpty]: Start isEmpty. Operand 144 states and 153 transitions. [2018-02-04 19:28:42,540 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2018-02-04 19:28:42,540 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:28:42,541 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:28:42,541 INFO L371 AbstractCegarLoop]: === Iteration 2 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 19:28:42,541 INFO L82 PathProgramCache]: Analyzing trace with hash -2077747980, now seen corresponding path program 1 times [2018-02-04 19:28:42,541 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:28:42,541 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:28:42,542 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:28:42,543 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:28:42,543 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:28:42,556 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:28:42,557 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:28:42,593 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 19:28:42,593 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 19:28:42,593 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-02-04 19:28:42,594 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-02-04 19:28:42,594 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-02-04 19:28:42,594 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-02-04 19:28:42,594 INFO L87 Difference]: Start difference. First operand 144 states and 153 transitions. Second operand 6 states. [2018-02-04 19:28:42,698 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 19:28:42,698 INFO L93 Difference]: Finished difference Result 145 states and 154 transitions. [2018-02-04 19:28:42,698 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-02-04 19:28:42,698 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 19 [2018-02-04 19:28:42,699 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 19:28:42,700 INFO L225 Difference]: With dead ends: 145 [2018-02-04 19:28:42,700 INFO L226 Difference]: Without dead ends: 145 [2018-02-04 19:28:42,701 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-02-04 19:28:42,701 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 145 states. [2018-02-04 19:28:42,706 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 145 to 143. [2018-02-04 19:28:42,706 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 143 states. [2018-02-04 19:28:42,707 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 143 states to 143 states and 152 transitions. [2018-02-04 19:28:42,707 INFO L78 Accepts]: Start accepts. Automaton has 143 states and 152 transitions. Word has length 19 [2018-02-04 19:28:42,708 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 19:28:42,708 INFO L432 AbstractCegarLoop]: Abstraction has 143 states and 152 transitions. [2018-02-04 19:28:42,708 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-02-04 19:28:42,708 INFO L276 IsEmpty]: Start isEmpty. Operand 143 states and 152 transitions. [2018-02-04 19:28:42,708 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2018-02-04 19:28:42,708 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:28:42,708 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:28:42,708 INFO L371 AbstractCegarLoop]: === Iteration 3 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 19:28:42,708 INFO L82 PathProgramCache]: Analyzing trace with hash -2077747979, now seen corresponding path program 1 times [2018-02-04 19:28:42,709 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:28:42,709 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:28:42,709 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:28:42,709 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:28:42,710 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:28:42,724 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:28:42,725 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:28:42,876 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 19:28:42,876 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 19:28:42,876 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-02-04 19:28:42,877 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-02-04 19:28:42,877 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-02-04 19:28:42,877 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-02-04 19:28:42,877 INFO L87 Difference]: Start difference. First operand 143 states and 152 transitions. Second operand 7 states. [2018-02-04 19:28:43,063 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 19:28:43,064 INFO L93 Difference]: Finished difference Result 144 states and 153 transitions. [2018-02-04 19:28:43,064 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-02-04 19:28:43,064 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 19 [2018-02-04 19:28:43,064 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 19:28:43,065 INFO L225 Difference]: With dead ends: 144 [2018-02-04 19:28:43,066 INFO L226 Difference]: Without dead ends: 144 [2018-02-04 19:28:43,067 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2018-02-04 19:28:43,067 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 144 states. [2018-02-04 19:28:43,073 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 144 to 142. [2018-02-04 19:28:43,073 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 142 states. [2018-02-04 19:28:43,074 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 142 states to 142 states and 151 transitions. [2018-02-04 19:28:43,075 INFO L78 Accepts]: Start accepts. Automaton has 142 states and 151 transitions. Word has length 19 [2018-02-04 19:28:43,075 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 19:28:43,075 INFO L432 AbstractCegarLoop]: Abstraction has 142 states and 151 transitions. [2018-02-04 19:28:43,075 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-02-04 19:28:43,075 INFO L276 IsEmpty]: Start isEmpty. Operand 142 states and 151 transitions. [2018-02-04 19:28:43,076 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-02-04 19:28:43,076 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:28:43,076 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:28:43,076 INFO L371 AbstractCegarLoop]: === Iteration 4 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 19:28:43,076 INFO L82 PathProgramCache]: Analyzing trace with hash -471802203, now seen corresponding path program 1 times [2018-02-04 19:28:43,076 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:28:43,076 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:28:43,077 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:28:43,078 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:28:43,078 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:28:43,088 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:28:43,089 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:28:43,143 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 19:28:43,143 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 19:28:43,143 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-02-04 19:28:43,144 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-02-04 19:28:43,144 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-02-04 19:28:43,144 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-02-04 19:28:43,144 INFO L87 Difference]: Start difference. First operand 142 states and 151 transitions. Second operand 7 states. [2018-02-04 19:28:43,180 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 19:28:43,181 INFO L93 Difference]: Finished difference Result 159 states and 170 transitions. [2018-02-04 19:28:43,183 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-02-04 19:28:43,183 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 27 [2018-02-04 19:28:43,183 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 19:28:43,184 INFO L225 Difference]: With dead ends: 159 [2018-02-04 19:28:43,184 INFO L226 Difference]: Without dead ends: 159 [2018-02-04 19:28:43,184 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-02-04 19:28:43,184 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 159 states. [2018-02-04 19:28:43,190 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 159 to 151. [2018-02-04 19:28:43,191 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 151 states. [2018-02-04 19:28:43,192 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 151 states to 151 states and 160 transitions. [2018-02-04 19:28:43,192 INFO L78 Accepts]: Start accepts. Automaton has 151 states and 160 transitions. Word has length 27 [2018-02-04 19:28:43,193 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 19:28:43,193 INFO L432 AbstractCegarLoop]: Abstraction has 151 states and 160 transitions. [2018-02-04 19:28:43,193 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-02-04 19:28:43,193 INFO L276 IsEmpty]: Start isEmpty. Operand 151 states and 160 transitions. [2018-02-04 19:28:43,193 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-02-04 19:28:43,193 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:28:43,194 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:28:43,194 INFO L371 AbstractCegarLoop]: === Iteration 5 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 19:28:43,194 INFO L82 PathProgramCache]: Analyzing trace with hash 131109242, now seen corresponding path program 1 times [2018-02-04 19:28:43,194 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:28:43,194 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:28:43,195 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:28:43,195 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:28:43,195 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:28:43,206 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:28:43,207 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:28:43,280 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 19:28:43,280 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 19:28:43,280 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-02-04 19:28:43,281 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-02-04 19:28:43,281 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-02-04 19:28:43,281 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-02-04 19:28:43,281 INFO L87 Difference]: Start difference. First operand 151 states and 160 transitions. Second operand 10 states. [2018-02-04 19:28:43,458 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 19:28:43,458 INFO L93 Difference]: Finished difference Result 150 states and 159 transitions. [2018-02-04 19:28:43,458 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-02-04 19:28:43,458 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 34 [2018-02-04 19:28:43,458 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 19:28:43,459 INFO L225 Difference]: With dead ends: 150 [2018-02-04 19:28:43,459 INFO L226 Difference]: Without dead ends: 150 [2018-02-04 19:28:43,459 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=29, Invalid=127, Unknown=0, NotChecked=0, Total=156 [2018-02-04 19:28:43,459 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 150 states. [2018-02-04 19:28:43,463 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 150 to 150. [2018-02-04 19:28:43,464 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 150 states. [2018-02-04 19:28:43,465 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 150 states to 150 states and 159 transitions. [2018-02-04 19:28:43,465 INFO L78 Accepts]: Start accepts. Automaton has 150 states and 159 transitions. Word has length 34 [2018-02-04 19:28:43,465 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 19:28:43,465 INFO L432 AbstractCegarLoop]: Abstraction has 150 states and 159 transitions. [2018-02-04 19:28:43,466 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-02-04 19:28:43,466 INFO L276 IsEmpty]: Start isEmpty. Operand 150 states and 159 transitions. [2018-02-04 19:28:43,466 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-02-04 19:28:43,466 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:28:43,467 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:28:43,467 INFO L371 AbstractCegarLoop]: === Iteration 6 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 19:28:43,467 INFO L82 PathProgramCache]: Analyzing trace with hash 131109243, now seen corresponding path program 1 times [2018-02-04 19:28:43,467 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:28:43,467 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:28:43,468 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:28:43,468 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:28:43,468 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:28:43,477 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:28:43,478 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:28:43,498 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 19:28:43,499 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 19:28:43,499 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-02-04 19:28:43,499 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-02-04 19:28:43,499 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-02-04 19:28:43,499 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-02-04 19:28:43,500 INFO L87 Difference]: Start difference. First operand 150 states and 159 transitions. Second operand 4 states. [2018-02-04 19:28:43,511 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 19:28:43,511 INFO L93 Difference]: Finished difference Result 153 states and 162 transitions. [2018-02-04 19:28:43,523 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-02-04 19:28:43,523 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 34 [2018-02-04 19:28:43,523 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 19:28:43,524 INFO L225 Difference]: With dead ends: 153 [2018-02-04 19:28:43,524 INFO L226 Difference]: Without dead ends: 151 [2018-02-04 19:28:43,524 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-02-04 19:28:43,525 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 151 states. [2018-02-04 19:28:43,529 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 151 to 151. [2018-02-04 19:28:43,529 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 151 states. [2018-02-04 19:28:43,530 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 151 states to 151 states and 160 transitions. [2018-02-04 19:28:43,530 INFO L78 Accepts]: Start accepts. Automaton has 151 states and 160 transitions. Word has length 34 [2018-02-04 19:28:43,531 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 19:28:43,531 INFO L432 AbstractCegarLoop]: Abstraction has 151 states and 160 transitions. [2018-02-04 19:28:43,531 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-02-04 19:28:43,531 INFO L276 IsEmpty]: Start isEmpty. Operand 151 states and 160 transitions. [2018-02-04 19:28:43,532 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-02-04 19:28:43,532 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:28:43,532 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:28:43,532 INFO L371 AbstractCegarLoop]: === Iteration 7 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 19:28:43,532 INFO L82 PathProgramCache]: Analyzing trace with hash -2110897305, now seen corresponding path program 1 times [2018-02-04 19:28:43,532 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:28:43,532 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:28:43,534 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:28:43,534 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:28:43,534 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:28:43,545 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:28:43,546 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:28:43,571 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 19:28:43,571 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 19:28:43,571 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 19:28:43,572 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:28:43,593 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:28:43,601 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 19:28:43,626 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 19:28:43,626 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 19:28:43,626 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 6 [2018-02-04 19:28:43,627 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-02-04 19:28:43,627 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-02-04 19:28:43,627 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-02-04 19:28:43,627 INFO L87 Difference]: Start difference. First operand 151 states and 160 transitions. Second operand 6 states. [2018-02-04 19:28:43,649 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 19:28:43,649 INFO L93 Difference]: Finished difference Result 154 states and 163 transitions. [2018-02-04 19:28:43,650 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-02-04 19:28:43,650 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 35 [2018-02-04 19:28:43,650 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 19:28:43,651 INFO L225 Difference]: With dead ends: 154 [2018-02-04 19:28:43,651 INFO L226 Difference]: Without dead ends: 152 [2018-02-04 19:28:43,651 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 40 GetRequests, 35 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=16, Invalid=26, Unknown=0, NotChecked=0, Total=42 [2018-02-04 19:28:43,652 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 152 states. [2018-02-04 19:28:43,656 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 152 to 152. [2018-02-04 19:28:43,656 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 152 states. [2018-02-04 19:28:43,657 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 152 states to 152 states and 161 transitions. [2018-02-04 19:28:43,657 INFO L78 Accepts]: Start accepts. Automaton has 152 states and 161 transitions. Word has length 35 [2018-02-04 19:28:43,657 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 19:28:43,658 INFO L432 AbstractCegarLoop]: Abstraction has 152 states and 161 transitions. [2018-02-04 19:28:43,658 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-02-04 19:28:43,658 INFO L276 IsEmpty]: Start isEmpty. Operand 152 states and 161 transitions. [2018-02-04 19:28:43,658 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-02-04 19:28:43,659 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:28:43,659 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:28:43,659 INFO L371 AbstractCegarLoop]: === Iteration 8 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 19:28:43,659 INFO L82 PathProgramCache]: Analyzing trace with hash 1181841647, now seen corresponding path program 1 times [2018-02-04 19:28:43,659 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:28:43,659 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:28:43,660 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:28:43,660 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:28:43,660 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:28:43,670 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:28:43,671 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:28:43,732 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 19:28:43,732 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 19:28:43,732 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-02-04 19:28:43,732 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-02-04 19:28:43,733 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-02-04 19:28:43,733 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-02-04 19:28:43,733 INFO L87 Difference]: Start difference. First operand 152 states and 161 transitions. Second operand 7 states. [2018-02-04 19:28:43,768 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 19:28:43,768 INFO L93 Difference]: Finished difference Result 163 states and 174 transitions. [2018-02-04 19:28:43,768 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-02-04 19:28:43,769 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 36 [2018-02-04 19:28:43,769 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 19:28:43,770 INFO L225 Difference]: With dead ends: 163 [2018-02-04 19:28:43,770 INFO L226 Difference]: Without dead ends: 163 [2018-02-04 19:28:43,770 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-02-04 19:28:43,771 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 163 states. [2018-02-04 19:28:43,774 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 163 to 159. [2018-02-04 19:28:43,775 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 159 states. [2018-02-04 19:28:43,776 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 159 states to 159 states and 169 transitions. [2018-02-04 19:28:43,776 INFO L78 Accepts]: Start accepts. Automaton has 159 states and 169 transitions. Word has length 36 [2018-02-04 19:28:43,776 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 19:28:43,776 INFO L432 AbstractCegarLoop]: Abstraction has 159 states and 169 transitions. [2018-02-04 19:28:43,776 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-02-04 19:28:43,776 INFO L276 IsEmpty]: Start isEmpty. Operand 159 states and 169 transitions. [2018-02-04 19:28:43,777 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-02-04 19:28:43,777 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:28:43,777 INFO L351 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:28:43,777 INFO L371 AbstractCegarLoop]: === Iteration 9 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 19:28:43,777 INFO L82 PathProgramCache]: Analyzing trace with hash 1401343739, now seen corresponding path program 2 times [2018-02-04 19:28:43,777 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:28:43,777 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:28:43,778 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:28:43,778 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:28:43,778 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:28:43,787 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:28:43,788 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:28:43,814 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 19:28:43,814 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 19:28:43,815 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 19:28:43,815 INFO L109 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-02-04 19:28:43,836 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2018-02-04 19:28:43,836 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 19:28:43,840 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 19:28:43,873 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-02-04 19:28:43,875 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 19:28:43,890 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-02-04 19:28:43,891 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:28:43,903 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-02-04 19:28:43,903 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:38, output treesize:36 [2018-02-04 19:28:44,170 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-02-04 19:28:44,170 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-02-04 19:28:44,170 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [15] imperfect sequences [6] total 20 [2018-02-04 19:28:44,171 INFO L409 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-02-04 19:28:44,171 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-02-04 19:28:44,171 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=51, Invalid=329, Unknown=0, NotChecked=0, Total=380 [2018-02-04 19:28:44,172 INFO L87 Difference]: Start difference. First operand 159 states and 169 transitions. Second operand 20 states. [2018-02-04 19:28:44,728 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 19:28:44,728 INFO L93 Difference]: Finished difference Result 181 states and 191 transitions. [2018-02-04 19:28:44,729 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-02-04 19:28:44,729 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 36 [2018-02-04 19:28:44,729 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 19:28:44,730 INFO L225 Difference]: With dead ends: 181 [2018-02-04 19:28:44,730 INFO L226 Difference]: Without dead ends: 179 [2018-02-04 19:28:44,731 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 50 GetRequests, 23 SyntacticMatches, 0 SemanticMatches, 27 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 102 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=104, Invalid=708, Unknown=0, NotChecked=0, Total=812 [2018-02-04 19:28:44,731 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 179 states. [2018-02-04 19:28:44,734 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 179 to 159. [2018-02-04 19:28:44,734 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 159 states. [2018-02-04 19:28:44,735 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 159 states to 159 states and 169 transitions. [2018-02-04 19:28:44,736 INFO L78 Accepts]: Start accepts. Automaton has 159 states and 169 transitions. Word has length 36 [2018-02-04 19:28:44,736 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 19:28:44,736 INFO L432 AbstractCegarLoop]: Abstraction has 159 states and 169 transitions. [2018-02-04 19:28:44,736 INFO L433 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-02-04 19:28:44,736 INFO L276 IsEmpty]: Start isEmpty. Operand 159 states and 169 transitions. [2018-02-04 19:28:44,737 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2018-02-04 19:28:44,737 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:28:44,737 INFO L351 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:28:44,738 INFO L371 AbstractCegarLoop]: === Iteration 10 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 19:28:44,738 INFO L82 PathProgramCache]: Analyzing trace with hash -1379512829, now seen corresponding path program 1 times [2018-02-04 19:28:44,738 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:28:44,738 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:28:44,739 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:28:44,739 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 19:28:44,740 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:28:44,745 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:28:44,746 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:28:44,764 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-02-04 19:28:44,765 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 19:28:44,765 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-02-04 19:28:44,765 INFO L409 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-02-04 19:28:44,765 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-02-04 19:28:44,765 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-02-04 19:28:44,765 INFO L87 Difference]: Start difference. First operand 159 states and 169 transitions. Second operand 3 states. [2018-02-04 19:28:44,832 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 19:28:44,832 INFO L93 Difference]: Finished difference Result 177 states and 190 transitions. [2018-02-04 19:28:44,832 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-02-04 19:28:44,832 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 39 [2018-02-04 19:28:44,832 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 19:28:44,833 INFO L225 Difference]: With dead ends: 177 [2018-02-04 19:28:44,833 INFO L226 Difference]: Without dead ends: 163 [2018-02-04 19:28:44,833 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 11 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-02-04 19:28:44,834 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 163 states. [2018-02-04 19:28:44,837 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 163 to 155. [2018-02-04 19:28:44,838 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 155 states. [2018-02-04 19:28:44,838 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 155 states to 155 states and 164 transitions. [2018-02-04 19:28:44,839 INFO L78 Accepts]: Start accepts. Automaton has 155 states and 164 transitions. Word has length 39 [2018-02-04 19:28:44,839 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 19:28:44,839 INFO L432 AbstractCegarLoop]: Abstraction has 155 states and 164 transitions. [2018-02-04 19:28:44,839 INFO L433 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-02-04 19:28:44,839 INFO L276 IsEmpty]: Start isEmpty. Operand 155 states and 164 transitions. [2018-02-04 19:28:44,840 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-02-04 19:28:44,840 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:28:44,840 INFO L351 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:28:44,840 INFO L371 AbstractCegarLoop]: === Iteration 11 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 19:28:44,840 INFO L82 PathProgramCache]: Analyzing trace with hash 710655878, now seen corresponding path program 1 times [2018-02-04 19:28:44,840 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:28:44,841 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:28:44,841 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:28:44,841 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:28:44,842 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:28:44,850 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:28:44,851 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:28:44,912 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-02-04 19:28:44,912 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 19:28:44,913 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-02-04 19:28:44,913 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-02-04 19:28:44,913 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-02-04 19:28:44,913 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-02-04 19:28:44,913 INFO L87 Difference]: Start difference. First operand 155 states and 164 transitions. Second operand 10 states. [2018-02-04 19:28:45,102 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 19:28:45,102 INFO L93 Difference]: Finished difference Result 153 states and 162 transitions. [2018-02-04 19:28:45,102 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-02-04 19:28:45,102 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 42 [2018-02-04 19:28:45,103 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 19:28:45,103 INFO L225 Difference]: With dead ends: 153 [2018-02-04 19:28:45,103 INFO L226 Difference]: Without dead ends: 153 [2018-02-04 19:28:45,104 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=29, Invalid=127, Unknown=0, NotChecked=0, Total=156 [2018-02-04 19:28:45,104 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 153 states. [2018-02-04 19:28:45,107 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 153 to 153. [2018-02-04 19:28:45,107 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 153 states. [2018-02-04 19:28:45,108 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 153 states to 153 states and 162 transitions. [2018-02-04 19:28:45,108 INFO L78 Accepts]: Start accepts. Automaton has 153 states and 162 transitions. Word has length 42 [2018-02-04 19:28:45,108 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 19:28:45,108 INFO L432 AbstractCegarLoop]: Abstraction has 153 states and 162 transitions. [2018-02-04 19:28:45,108 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-02-04 19:28:45,108 INFO L276 IsEmpty]: Start isEmpty. Operand 153 states and 162 transitions. [2018-02-04 19:28:45,109 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-02-04 19:28:45,109 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:28:45,110 INFO L351 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:28:45,110 INFO L371 AbstractCegarLoop]: === Iteration 12 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 19:28:45,110 INFO L82 PathProgramCache]: Analyzing trace with hash 710655879, now seen corresponding path program 1 times [2018-02-04 19:28:45,110 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:28:45,110 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:28:45,111 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:28:45,111 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:28:45,111 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:28:45,120 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:28:45,120 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:28:45,150 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 19:28:45,150 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 19:28:45,150 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 19:28:45,151 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:28:45,163 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:28:45,166 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 19:28:45,174 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 19:28:45,175 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 19:28:45,175 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 8 [2018-02-04 19:28:45,175 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-02-04 19:28:45,175 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-02-04 19:28:45,176 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=33, Unknown=0, NotChecked=0, Total=56 [2018-02-04 19:28:45,176 INFO L87 Difference]: Start difference. First operand 153 states and 162 transitions. Second operand 8 states. [2018-02-04 19:28:45,192 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 19:28:45,192 INFO L93 Difference]: Finished difference Result 156 states and 165 transitions. [2018-02-04 19:28:45,192 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-02-04 19:28:45,192 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 42 [2018-02-04 19:28:45,192 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 19:28:45,193 INFO L225 Difference]: With dead ends: 156 [2018-02-04 19:28:45,193 INFO L226 Difference]: Without dead ends: 154 [2018-02-04 19:28:45,193 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 49 GetRequests, 42 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2018-02-04 19:28:45,194 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 154 states. [2018-02-04 19:28:45,196 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 154 to 154. [2018-02-04 19:28:45,196 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 154 states. [2018-02-04 19:28:45,197 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 154 states to 154 states and 163 transitions. [2018-02-04 19:28:45,197 INFO L78 Accepts]: Start accepts. Automaton has 154 states and 163 transitions. Word has length 42 [2018-02-04 19:28:45,197 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 19:28:45,197 INFO L432 AbstractCegarLoop]: Abstraction has 154 states and 163 transitions. [2018-02-04 19:28:45,197 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-02-04 19:28:45,197 INFO L276 IsEmpty]: Start isEmpty. Operand 154 states and 163 transitions. [2018-02-04 19:28:45,198 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2018-02-04 19:28:45,198 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:28:45,198 INFO L351 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:28:45,198 INFO L371 AbstractCegarLoop]: === Iteration 13 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 19:28:45,199 INFO L82 PathProgramCache]: Analyzing trace with hash -495427355, now seen corresponding path program 1 times [2018-02-04 19:28:45,199 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:28:45,199 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:28:45,200 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:28:45,200 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:28:45,200 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:28:45,204 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:28:45,212 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:28:45,228 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-02-04 19:28:45,228 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 19:28:45,228 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-02-04 19:28:45,228 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-02-04 19:28:45,228 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-02-04 19:28:45,229 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-02-04 19:28:45,229 INFO L87 Difference]: Start difference. First operand 154 states and 163 transitions. Second operand 6 states. [2018-02-04 19:28:45,245 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 19:28:45,245 INFO L93 Difference]: Finished difference Result 138 states and 145 transitions. [2018-02-04 19:28:45,245 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-02-04 19:28:45,245 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 41 [2018-02-04 19:28:45,245 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 19:28:45,246 INFO L225 Difference]: With dead ends: 138 [2018-02-04 19:28:45,246 INFO L226 Difference]: Without dead ends: 138 [2018-02-04 19:28:45,246 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-02-04 19:28:45,246 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 138 states. [2018-02-04 19:28:45,247 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 138 to 138. [2018-02-04 19:28:45,248 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 138 states. [2018-02-04 19:28:45,248 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 138 states to 138 states and 145 transitions. [2018-02-04 19:28:45,248 INFO L78 Accepts]: Start accepts. Automaton has 138 states and 145 transitions. Word has length 41 [2018-02-04 19:28:45,249 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 19:28:45,249 INFO L432 AbstractCegarLoop]: Abstraction has 138 states and 145 transitions. [2018-02-04 19:28:45,249 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-02-04 19:28:45,249 INFO L276 IsEmpty]: Start isEmpty. Operand 138 states and 145 transitions. [2018-02-04 19:28:45,249 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-02-04 19:28:45,249 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:28:45,249 INFO L351 BasicCegarLoop]: trace histogram [4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:28:45,250 INFO L371 AbstractCegarLoop]: === Iteration 14 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 19:28:45,250 INFO L82 PathProgramCache]: Analyzing trace with hash -141638285, now seen corresponding path program 2 times [2018-02-04 19:28:45,250 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:28:45,250 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:28:45,251 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:28:45,251 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:28:45,251 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:28:45,260 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:28:45,261 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:28:45,290 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 19:28:45,290 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 19:28:45,290 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 19:28:45,291 INFO L109 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-02-04 19:28:45,305 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2018-02-04 19:28:45,305 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 19:28:45,309 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 19:28:45,324 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-02-04 19:28:45,324 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 19:28:45,334 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-02-04 19:28:45,334 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:28:45,346 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-02-04 19:28:45,346 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:38, output treesize:36 [2018-02-04 19:28:45,564 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-02-04 19:28:45,564 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-02-04 19:28:45,564 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [15] imperfect sequences [8] total 22 [2018-02-04 19:28:45,565 INFO L409 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-02-04 19:28:45,565 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-02-04 19:28:45,565 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=62, Invalid=400, Unknown=0, NotChecked=0, Total=462 [2018-02-04 19:28:45,565 INFO L87 Difference]: Start difference. First operand 138 states and 145 transitions. Second operand 22 states. [2018-02-04 19:28:46,077 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 19:28:46,077 INFO L93 Difference]: Finished difference Result 139 states and 146 transitions. [2018-02-04 19:28:46,077 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-02-04 19:28:46,077 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 43 [2018-02-04 19:28:46,077 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 19:28:46,078 INFO L225 Difference]: With dead ends: 139 [2018-02-04 19:28:46,078 INFO L226 Difference]: Without dead ends: 137 [2018-02-04 19:28:46,078 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 61 GetRequests, 28 SyntacticMatches, 2 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 170 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=139, Invalid=917, Unknown=0, NotChecked=0, Total=1056 [2018-02-04 19:28:46,078 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 137 states. [2018-02-04 19:28:46,080 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 137 to 137. [2018-02-04 19:28:46,080 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 137 states. [2018-02-04 19:28:46,080 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 137 states to 137 states and 144 transitions. [2018-02-04 19:28:46,080 INFO L78 Accepts]: Start accepts. Automaton has 137 states and 144 transitions. Word has length 43 [2018-02-04 19:28:46,080 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 19:28:46,080 INFO L432 AbstractCegarLoop]: Abstraction has 137 states and 144 transitions. [2018-02-04 19:28:46,080 INFO L433 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-02-04 19:28:46,080 INFO L276 IsEmpty]: Start isEmpty. Operand 137 states and 144 transitions. [2018-02-04 19:28:46,081 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-02-04 19:28:46,081 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:28:46,081 INFO L351 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:28:46,081 INFO L371 AbstractCegarLoop]: === Iteration 15 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 19:28:46,081 INFO L82 PathProgramCache]: Analyzing trace with hash 1517747909, now seen corresponding path program 1 times [2018-02-04 19:28:46,081 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:28:46,081 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:28:46,082 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:28:46,082 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 19:28:46,082 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:28:46,086 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:28:46,087 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:28:46,144 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-02-04 19:28:46,144 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 19:28:46,145 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-02-04 19:28:46,145 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-02-04 19:28:46,145 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-02-04 19:28:46,145 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2018-02-04 19:28:46,145 INFO L87 Difference]: Start difference. First operand 137 states and 144 transitions. Second operand 8 states. [2018-02-04 19:28:46,183 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 19:28:46,183 INFO L93 Difference]: Finished difference Result 139 states and 145 transitions. [2018-02-04 19:28:46,184 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-02-04 19:28:46,184 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 47 [2018-02-04 19:28:46,184 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 19:28:46,184 INFO L225 Difference]: With dead ends: 139 [2018-02-04 19:28:46,184 INFO L226 Difference]: Without dead ends: 137 [2018-02-04 19:28:46,185 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=69, Unknown=0, NotChecked=0, Total=90 [2018-02-04 19:28:46,185 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 137 states. [2018-02-04 19:28:46,187 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 137 to 137. [2018-02-04 19:28:46,187 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 137 states. [2018-02-04 19:28:46,188 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 137 states to 137 states and 143 transitions. [2018-02-04 19:28:46,188 INFO L78 Accepts]: Start accepts. Automaton has 137 states and 143 transitions. Word has length 47 [2018-02-04 19:28:46,188 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 19:28:46,188 INFO L432 AbstractCegarLoop]: Abstraction has 137 states and 143 transitions. [2018-02-04 19:28:46,188 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-02-04 19:28:46,188 INFO L276 IsEmpty]: Start isEmpty. Operand 137 states and 143 transitions. [2018-02-04 19:28:46,188 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2018-02-04 19:28:46,188 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:28:46,188 INFO L351 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:28:46,188 INFO L371 AbstractCegarLoop]: === Iteration 16 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 19:28:46,189 INFO L82 PathProgramCache]: Analyzing trace with hash 2035822852, now seen corresponding path program 1 times [2018-02-04 19:28:46,189 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:28:46,189 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:28:46,189 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:28:46,190 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:28:46,190 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:28:46,196 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:28:46,196 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:28:46,235 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-02-04 19:28:46,235 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 19:28:46,236 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-02-04 19:28:46,236 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-02-04 19:28:46,236 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-02-04 19:28:46,236 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-02-04 19:28:46,236 INFO L87 Difference]: Start difference. First operand 137 states and 143 transitions. Second operand 10 states. [2018-02-04 19:28:46,290 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 19:28:46,291 INFO L93 Difference]: Finished difference Result 141 states and 146 transitions. [2018-02-04 19:28:46,291 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-02-04 19:28:46,291 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 52 [2018-02-04 19:28:46,291 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 19:28:46,291 INFO L225 Difference]: With dead ends: 141 [2018-02-04 19:28:46,291 INFO L226 Difference]: Without dead ends: 137 [2018-02-04 19:28:46,292 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=29, Invalid=127, Unknown=0, NotChecked=0, Total=156 [2018-02-04 19:28:46,292 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 137 states. [2018-02-04 19:28:46,293 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 137 to 137. [2018-02-04 19:28:46,293 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 137 states. [2018-02-04 19:28:46,293 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 137 states to 137 states and 142 transitions. [2018-02-04 19:28:46,294 INFO L78 Accepts]: Start accepts. Automaton has 137 states and 142 transitions. Word has length 52 [2018-02-04 19:28:46,294 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 19:28:46,294 INFO L432 AbstractCegarLoop]: Abstraction has 137 states and 142 transitions. [2018-02-04 19:28:46,294 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-02-04 19:28:46,294 INFO L276 IsEmpty]: Start isEmpty. Operand 137 states and 142 transitions. [2018-02-04 19:28:46,294 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 64 [2018-02-04 19:28:46,294 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:28:46,294 INFO L351 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:28:46,295 INFO L371 AbstractCegarLoop]: === Iteration 17 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 19:28:46,295 INFO L82 PathProgramCache]: Analyzing trace with hash 1511828740, now seen corresponding path program 1 times [2018-02-04 19:28:46,295 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:28:46,295 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:28:46,295 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:28:46,295 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:28:46,295 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:28:46,305 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:28:46,306 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:28:46,394 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-02-04 19:28:46,394 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 19:28:46,394 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2018-02-04 19:28:46,394 INFO L409 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-02-04 19:28:46,395 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-02-04 19:28:46,395 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=133, Unknown=0, NotChecked=0, Total=156 [2018-02-04 19:28:46,395 INFO L87 Difference]: Start difference. First operand 137 states and 142 transitions. Second operand 13 states. [2018-02-04 19:28:46,557 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 19:28:46,558 INFO L93 Difference]: Finished difference Result 135 states and 140 transitions. [2018-02-04 19:28:46,558 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-02-04 19:28:46,558 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 63 [2018-02-04 19:28:46,558 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 19:28:46,558 INFO L225 Difference]: With dead ends: 135 [2018-02-04 19:28:46,558 INFO L226 Difference]: Without dead ends: 135 [2018-02-04 19:28:46,559 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=39, Invalid=233, Unknown=0, NotChecked=0, Total=272 [2018-02-04 19:28:46,559 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 135 states. [2018-02-04 19:28:46,560 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 135 to 135. [2018-02-04 19:28:46,560 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 135 states. [2018-02-04 19:28:46,560 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 135 states to 135 states and 140 transitions. [2018-02-04 19:28:46,560 INFO L78 Accepts]: Start accepts. Automaton has 135 states and 140 transitions. Word has length 63 [2018-02-04 19:28:46,561 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 19:28:46,561 INFO L432 AbstractCegarLoop]: Abstraction has 135 states and 140 transitions. [2018-02-04 19:28:46,561 INFO L433 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-02-04 19:28:46,561 INFO L276 IsEmpty]: Start isEmpty. Operand 135 states and 140 transitions. [2018-02-04 19:28:46,561 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 64 [2018-02-04 19:28:46,561 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:28:46,561 INFO L351 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:28:46,561 INFO L371 AbstractCegarLoop]: === Iteration 18 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 19:28:46,561 INFO L82 PathProgramCache]: Analyzing trace with hash 1511828741, now seen corresponding path program 1 times [2018-02-04 19:28:46,561 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:28:46,561 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:28:46,562 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:28:46,562 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:28:46,562 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:28:46,569 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:28:46,569 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:28:46,616 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 19:28:46,617 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 19:28:46,617 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 19:28:46,617 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:28:46,629 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:28:46,633 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 19:28:46,646 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 19:28:46,646 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 19:28:46,646 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9] total 10 [2018-02-04 19:28:46,646 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-02-04 19:28:46,646 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-02-04 19:28:46,646 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=38, Invalid=52, Unknown=0, NotChecked=0, Total=90 [2018-02-04 19:28:46,646 INFO L87 Difference]: Start difference. First operand 135 states and 140 transitions. Second operand 10 states. [2018-02-04 19:28:46,663 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 19:28:46,663 INFO L93 Difference]: Finished difference Result 138 states and 143 transitions. [2018-02-04 19:28:46,663 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-02-04 19:28:46,663 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 63 [2018-02-04 19:28:46,663 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 19:28:46,664 INFO L225 Difference]: With dead ends: 138 [2018-02-04 19:28:46,664 INFO L226 Difference]: Without dead ends: 136 [2018-02-04 19:28:46,664 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 72 GetRequests, 63 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=42, Invalid=68, Unknown=0, NotChecked=0, Total=110 [2018-02-04 19:28:46,664 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 136 states. [2018-02-04 19:28:46,666 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 136 to 136. [2018-02-04 19:28:46,666 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 136 states. [2018-02-04 19:28:46,667 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 136 states to 136 states and 141 transitions. [2018-02-04 19:28:46,667 INFO L78 Accepts]: Start accepts. Automaton has 136 states and 141 transitions. Word has length 63 [2018-02-04 19:28:46,667 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 19:28:46,667 INFO L432 AbstractCegarLoop]: Abstraction has 136 states and 141 transitions. [2018-02-04 19:28:46,667 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-02-04 19:28:46,667 INFO L276 IsEmpty]: Start isEmpty. Operand 136 states and 141 transitions. [2018-02-04 19:28:46,667 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2018-02-04 19:28:46,668 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:28:46,668 INFO L351 BasicCegarLoop]: trace histogram [6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:28:46,668 INFO L371 AbstractCegarLoop]: === Iteration 19 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 19:28:46,668 INFO L82 PathProgramCache]: Analyzing trace with hash 2058801817, now seen corresponding path program 2 times [2018-02-04 19:28:46,668 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:28:46,668 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:28:46,669 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:28:46,669 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:28:46,669 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:28:46,676 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:28:46,677 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:28:46,719 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 19:28:46,719 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 19:28:46,719 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 19:28:46,719 INFO L109 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-02-04 19:28:46,742 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2018-02-04 19:28:46,744 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 19:28:46,749 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 19:28:46,768 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-02-04 19:28:46,768 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 19:28:46,782 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-02-04 19:28:46,782 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:28:46,808 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-02-04 19:28:46,808 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:38, output treesize:36 [2018-02-04 19:28:47,124 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2018-02-04 19:28:47,124 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-02-04 19:28:47,124 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [18] imperfect sequences [10] total 27 [2018-02-04 19:28:47,124 INFO L409 AbstractCegarLoop]: Interpolant automaton has 27 states [2018-02-04 19:28:47,124 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2018-02-04 19:28:47,124 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=86, Invalid=616, Unknown=0, NotChecked=0, Total=702 [2018-02-04 19:28:47,125 INFO L87 Difference]: Start difference. First operand 136 states and 141 transitions. Second operand 27 states. [2018-02-04 19:28:47,771 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 19:28:47,771 INFO L93 Difference]: Finished difference Result 137 states and 142 transitions. [2018-02-04 19:28:47,772 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2018-02-04 19:28:47,772 INFO L78 Accepts]: Start accepts. Automaton has 27 states. Word has length 64 [2018-02-04 19:28:47,772 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 19:28:47,772 INFO L225 Difference]: With dead ends: 137 [2018-02-04 19:28:47,772 INFO L226 Difference]: Without dead ends: 135 [2018-02-04 19:28:47,773 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 87 GetRequests, 47 SyntacticMatches, 1 SemanticMatches, 39 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 260 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=201, Invalid=1439, Unknown=0, NotChecked=0, Total=1640 [2018-02-04 19:28:47,773 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 135 states. [2018-02-04 19:28:47,774 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 135 to 135. [2018-02-04 19:28:47,774 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 135 states. [2018-02-04 19:28:47,774 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 135 states to 135 states and 140 transitions. [2018-02-04 19:28:47,775 INFO L78 Accepts]: Start accepts. Automaton has 135 states and 140 transitions. Word has length 64 [2018-02-04 19:28:47,775 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 19:28:47,775 INFO L432 AbstractCegarLoop]: Abstraction has 135 states and 140 transitions. [2018-02-04 19:28:47,775 INFO L433 AbstractCegarLoop]: Interpolant automaton has 27 states. [2018-02-04 19:28:47,775 INFO L276 IsEmpty]: Start isEmpty. Operand 135 states and 140 transitions. [2018-02-04 19:28:47,775 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2018-02-04 19:28:47,775 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:28:47,775 INFO L351 BasicCegarLoop]: trace histogram [7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:28:47,775 INFO L371 AbstractCegarLoop]: === Iteration 20 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 19:28:47,775 INFO L82 PathProgramCache]: Analyzing trace with hash -243629328, now seen corresponding path program 1 times [2018-02-04 19:28:47,775 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:28:47,776 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:28:47,776 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:28:47,776 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 19:28:47,776 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:28:47,784 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:28:47,785 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:28:47,848 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2018-02-04 19:28:47,848 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 19:28:47,848 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2018-02-04 19:28:47,849 INFO L409 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-02-04 19:28:47,849 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-02-04 19:28:47,849 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=91, Unknown=0, NotChecked=0, Total=110 [2018-02-04 19:28:47,849 INFO L87 Difference]: Start difference. First operand 135 states and 140 transitions. Second operand 11 states. [2018-02-04 19:28:47,923 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 19:28:47,923 INFO L93 Difference]: Finished difference Result 138 states and 142 transitions. [2018-02-04 19:28:47,923 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-02-04 19:28:47,924 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 74 [2018-02-04 19:28:47,924 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 19:28:47,924 INFO L225 Difference]: With dead ends: 138 [2018-02-04 19:28:47,924 INFO L226 Difference]: Without dead ends: 135 [2018-02-04 19:28:47,925 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=31, Invalid=151, Unknown=0, NotChecked=0, Total=182 [2018-02-04 19:28:47,925 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 135 states. [2018-02-04 19:28:47,926 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 135 to 135. [2018-02-04 19:28:47,927 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 135 states. [2018-02-04 19:28:47,927 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 135 states to 135 states and 139 transitions. [2018-02-04 19:28:47,927 INFO L78 Accepts]: Start accepts. Automaton has 135 states and 139 transitions. Word has length 74 [2018-02-04 19:28:47,927 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 19:28:47,927 INFO L432 AbstractCegarLoop]: Abstraction has 135 states and 139 transitions. [2018-02-04 19:28:47,928 INFO L433 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-02-04 19:28:47,928 INFO L276 IsEmpty]: Start isEmpty. Operand 135 states and 139 transitions. [2018-02-04 19:28:47,928 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 88 [2018-02-04 19:28:47,928 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:28:47,928 INFO L351 BasicCegarLoop]: trace histogram [7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:28:47,928 INFO L371 AbstractCegarLoop]: === Iteration 21 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 19:28:47,929 INFO L82 PathProgramCache]: Analyzing trace with hash 254396120, now seen corresponding path program 1 times [2018-02-04 19:28:47,929 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:28:47,929 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:28:47,929 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:28:47,930 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:28:47,930 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:28:47,943 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:28:47,944 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:28:48,081 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2018-02-04 19:28:48,081 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 19:28:48,081 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [17] imperfect sequences [] total 17 [2018-02-04 19:28:48,081 INFO L409 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-02-04 19:28:48,082 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-02-04 19:28:48,082 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=271, Unknown=0, NotChecked=0, Total=306 [2018-02-04 19:28:48,082 INFO L87 Difference]: Start difference. First operand 135 states and 139 transitions. Second operand 18 states. [2018-02-04 19:28:48,335 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 19:28:48,335 INFO L93 Difference]: Finished difference Result 163 states and 174 transitions. [2018-02-04 19:28:48,335 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-02-04 19:28:48,335 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 87 [2018-02-04 19:28:48,335 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 19:28:48,336 INFO L225 Difference]: With dead ends: 163 [2018-02-04 19:28:48,336 INFO L226 Difference]: Without dead ends: 163 [2018-02-04 19:28:48,336 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 44 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=59, Invalid=493, Unknown=0, NotChecked=0, Total=552 [2018-02-04 19:28:48,336 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 163 states. [2018-02-04 19:28:48,338 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 163 to 158. [2018-02-04 19:28:48,338 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 158 states. [2018-02-04 19:28:48,338 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 158 states to 158 states and 170 transitions. [2018-02-04 19:28:48,338 INFO L78 Accepts]: Start accepts. Automaton has 158 states and 170 transitions. Word has length 87 [2018-02-04 19:28:48,339 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 19:28:48,339 INFO L432 AbstractCegarLoop]: Abstraction has 158 states and 170 transitions. [2018-02-04 19:28:48,339 INFO L433 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-02-04 19:28:48,339 INFO L276 IsEmpty]: Start isEmpty. Operand 158 states and 170 transitions. [2018-02-04 19:28:48,339 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 88 [2018-02-04 19:28:48,339 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:28:48,339 INFO L351 BasicCegarLoop]: trace histogram [7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:28:48,339 INFO L371 AbstractCegarLoop]: === Iteration 22 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 19:28:48,339 INFO L82 PathProgramCache]: Analyzing trace with hash 254396121, now seen corresponding path program 1 times [2018-02-04 19:28:48,339 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:28:48,340 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:28:48,340 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:28:48,340 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:28:48,340 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:28:48,348 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:28:48,349 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:28:48,397 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 19:28:48,397 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 19:28:48,397 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 19:28:48,398 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:28:48,412 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:28:48,416 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 19:28:48,441 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 19:28:48,441 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 19:28:48,441 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11] total 12 [2018-02-04 19:28:48,442 INFO L409 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-02-04 19:28:48,442 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-02-04 19:28:48,442 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=57, Invalid=75, Unknown=0, NotChecked=0, Total=132 [2018-02-04 19:28:48,442 INFO L87 Difference]: Start difference. First operand 158 states and 170 transitions. Second operand 12 states. [2018-02-04 19:28:48,466 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 19:28:48,466 INFO L93 Difference]: Finished difference Result 161 states and 173 transitions. [2018-02-04 19:28:48,467 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-02-04 19:28:48,467 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 87 [2018-02-04 19:28:48,467 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 19:28:48,468 INFO L225 Difference]: With dead ends: 161 [2018-02-04 19:28:48,468 INFO L226 Difference]: Without dead ends: 159 [2018-02-04 19:28:48,468 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 98 GetRequests, 87 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=61, Invalid=95, Unknown=0, NotChecked=0, Total=156 [2018-02-04 19:28:48,468 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 159 states. [2018-02-04 19:28:48,471 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 159 to 159. [2018-02-04 19:28:48,471 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 159 states. [2018-02-04 19:28:48,472 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 159 states to 159 states and 171 transitions. [2018-02-04 19:28:48,472 INFO L78 Accepts]: Start accepts. Automaton has 159 states and 171 transitions. Word has length 87 [2018-02-04 19:28:48,472 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 19:28:48,472 INFO L432 AbstractCegarLoop]: Abstraction has 159 states and 171 transitions. [2018-02-04 19:28:48,473 INFO L433 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-02-04 19:28:48,473 INFO L276 IsEmpty]: Start isEmpty. Operand 159 states and 171 transitions. [2018-02-04 19:28:48,473 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 89 [2018-02-04 19:28:48,473 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:28:48,474 INFO L351 BasicCegarLoop]: trace histogram [8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:28:48,474 INFO L371 AbstractCegarLoop]: === Iteration 23 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 19:28:48,474 INFO L82 PathProgramCache]: Analyzing trace with hash -388927379, now seen corresponding path program 2 times [2018-02-04 19:28:48,474 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:28:48,474 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:28:48,475 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:28:48,475 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:28:48,475 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:28:48,489 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:28:48,490 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:28:48,581 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 19:28:48,581 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 19:28:48,581 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 19:28:48,582 INFO L109 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-02-04 19:28:48,609 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2018-02-04 19:28:48,610 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 19:28:48,615 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 19:28:48,634 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-02-04 19:28:48,634 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 19:28:48,650 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-02-04 19:28:48,650 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:28:48,661 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-02-04 19:28:48,662 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:38, output treesize:36 [2018-02-04 19:28:49,123 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2018-02-04 19:28:49,123 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-02-04 19:28:49,123 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [20] imperfect sequences [12] total 31 [2018-02-04 19:28:49,124 INFO L409 AbstractCegarLoop]: Interpolant automaton has 31 states [2018-02-04 19:28:49,124 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 31 interpolants. [2018-02-04 19:28:49,124 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=111, Invalid=819, Unknown=0, NotChecked=0, Total=930 [2018-02-04 19:28:49,125 INFO L87 Difference]: Start difference. First operand 159 states and 171 transitions. Second operand 31 states. [2018-02-04 19:28:49,850 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 19:28:49,851 INFO L93 Difference]: Finished difference Result 160 states and 170 transitions. [2018-02-04 19:28:49,851 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2018-02-04 19:28:49,851 INFO L78 Accepts]: Start accepts. Automaton has 31 states. Word has length 88 [2018-02-04 19:28:49,851 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 19:28:49,851 INFO L225 Difference]: With dead ends: 160 [2018-02-04 19:28:49,851 INFO L226 Difference]: Without dead ends: 158 [2018-02-04 19:28:49,852 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 116 GetRequests, 67 SyntacticMatches, 3 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 394 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=271, Invalid=1985, Unknown=0, NotChecked=0, Total=2256 [2018-02-04 19:28:49,852 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 158 states. [2018-02-04 19:28:49,854 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 158 to 158. [2018-02-04 19:28:49,854 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 158 states. [2018-02-04 19:28:49,855 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 158 states to 158 states and 168 transitions. [2018-02-04 19:28:49,855 INFO L78 Accepts]: Start accepts. Automaton has 158 states and 168 transitions. Word has length 88 [2018-02-04 19:28:49,855 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 19:28:49,855 INFO L432 AbstractCegarLoop]: Abstraction has 158 states and 168 transitions. [2018-02-04 19:28:49,856 INFO L433 AbstractCegarLoop]: Interpolant automaton has 31 states. [2018-02-04 19:28:49,856 INFO L276 IsEmpty]: Start isEmpty. Operand 158 states and 168 transitions. [2018-02-04 19:28:49,856 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2018-02-04 19:28:49,856 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:28:49,857 INFO L351 BasicCegarLoop]: trace histogram [9, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:28:49,857 INFO L371 AbstractCegarLoop]: === Iteration 24 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 19:28:49,857 INFO L82 PathProgramCache]: Analyzing trace with hash 1868073210, now seen corresponding path program 1 times [2018-02-04 19:28:49,857 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:28:49,857 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:28:49,858 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:28:49,858 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 19:28:49,858 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:28:49,870 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:28:49,871 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:28:49,944 INFO L134 CoverageAnalysis]: Checked inductivity of 49 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 46 trivial. 0 not checked. [2018-02-04 19:28:49,944 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 19:28:49,944 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 19:28:49,945 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:28:49,962 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:28:49,966 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 19:28:50,085 INFO L134 CoverageAnalysis]: Checked inductivity of 49 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-02-04 19:28:50,086 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 19:28:50,086 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 13] total 22 [2018-02-04 19:28:50,086 INFO L409 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-02-04 19:28:50,086 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-02-04 19:28:50,086 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=86, Invalid=376, Unknown=0, NotChecked=0, Total=462 [2018-02-04 19:28:50,086 INFO L87 Difference]: Start difference. First operand 158 states and 168 transitions. Second operand 22 states. [2018-02-04 19:28:50,233 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 19:28:50,233 INFO L93 Difference]: Finished difference Result 162 states and 168 transitions. [2018-02-04 19:28:50,233 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-02-04 19:28:50,233 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 92 [2018-02-04 19:28:50,233 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 19:28:50,233 INFO L225 Difference]: With dead ends: 162 [2018-02-04 19:28:50,234 INFO L226 Difference]: Without dead ends: 156 [2018-02-04 19:28:50,234 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 106 GetRequests, 82 SyntacticMatches, 0 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=102, Invalid=548, Unknown=0, NotChecked=0, Total=650 [2018-02-04 19:28:50,234 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 156 states. [2018-02-04 19:28:50,235 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 156 to 156. [2018-02-04 19:28:50,236 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 156 states. [2018-02-04 19:28:50,236 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 156 states to 156 states and 162 transitions. [2018-02-04 19:28:50,236 INFO L78 Accepts]: Start accepts. Automaton has 156 states and 162 transitions. Word has length 92 [2018-02-04 19:28:50,236 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 19:28:50,236 INFO L432 AbstractCegarLoop]: Abstraction has 156 states and 162 transitions. [2018-02-04 19:28:50,236 INFO L433 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-02-04 19:28:50,236 INFO L276 IsEmpty]: Start isEmpty. Operand 156 states and 162 transitions. [2018-02-04 19:28:50,237 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 105 [2018-02-04 19:28:50,237 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:28:50,237 INFO L351 BasicCegarLoop]: trace histogram [10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:28:50,237 INFO L371 AbstractCegarLoop]: === Iteration 25 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 19:28:50,237 INFO L82 PathProgramCache]: Analyzing trace with hash -63866368, now seen corresponding path program 1 times [2018-02-04 19:28:50,237 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:28:50,237 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:28:50,238 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:28:50,238 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:28:50,238 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:28:50,247 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:28:50,247 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:28:50,420 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 55 trivial. 0 not checked. [2018-02-04 19:28:50,420 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 19:28:50,420 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [20] imperfect sequences [] total 20 [2018-02-04 19:28:50,420 INFO L409 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-02-04 19:28:50,420 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-02-04 19:28:50,420 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=39, Invalid=381, Unknown=0, NotChecked=0, Total=420 [2018-02-04 19:28:50,421 INFO L87 Difference]: Start difference. First operand 156 states and 162 transitions. Second operand 21 states. [2018-02-04 19:28:50,788 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 19:28:50,788 INFO L93 Difference]: Finished difference Result 166 states and 175 transitions. [2018-02-04 19:28:50,788 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-02-04 19:28:50,788 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 104 [2018-02-04 19:28:50,788 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 19:28:50,789 INFO L225 Difference]: With dead ends: 166 [2018-02-04 19:28:50,789 INFO L226 Difference]: Without dead ends: 166 [2018-02-04 19:28:50,789 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 36 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=75, Invalid=795, Unknown=0, NotChecked=0, Total=870 [2018-02-04 19:28:50,789 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 166 states. [2018-02-04 19:28:50,792 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 166 to 162. [2018-02-04 19:28:50,792 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 162 states. [2018-02-04 19:28:50,793 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 162 states to 162 states and 172 transitions. [2018-02-04 19:28:50,793 INFO L78 Accepts]: Start accepts. Automaton has 162 states and 172 transitions. Word has length 104 [2018-02-04 19:28:50,794 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 19:28:50,794 INFO L432 AbstractCegarLoop]: Abstraction has 162 states and 172 transitions. [2018-02-04 19:28:50,794 INFO L433 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-02-04 19:28:50,794 INFO L276 IsEmpty]: Start isEmpty. Operand 162 states and 172 transitions. [2018-02-04 19:28:50,794 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 105 [2018-02-04 19:28:50,794 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:28:50,795 INFO L351 BasicCegarLoop]: trace histogram [10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:28:50,795 INFO L371 AbstractCegarLoop]: === Iteration 26 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 19:28:50,795 INFO L82 PathProgramCache]: Analyzing trace with hash -63866367, now seen corresponding path program 1 times [2018-02-04 19:28:50,795 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:28:50,795 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:28:50,796 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:28:50,796 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:28:50,796 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:28:50,810 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:28:50,811 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:28:50,914 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 19:28:50,914 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 19:28:50,914 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 19:28:50,914 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:28:50,935 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:28:50,939 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 19:28:50,956 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 19:28:50,956 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 19:28:50,956 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14] total 15 [2018-02-04 19:28:50,956 INFO L409 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-02-04 19:28:50,957 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-02-04 19:28:50,957 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=93, Invalid=117, Unknown=0, NotChecked=0, Total=210 [2018-02-04 19:28:50,957 INFO L87 Difference]: Start difference. First operand 162 states and 172 transitions. Second operand 15 states. [2018-02-04 19:28:51,002 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 19:28:51,002 INFO L93 Difference]: Finished difference Result 165 states and 175 transitions. [2018-02-04 19:28:51,003 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-02-04 19:28:51,003 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 104 [2018-02-04 19:28:51,003 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 19:28:51,004 INFO L225 Difference]: With dead ends: 165 [2018-02-04 19:28:51,004 INFO L226 Difference]: Without dead ends: 163 [2018-02-04 19:28:51,004 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 118 GetRequests, 104 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 29 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=97, Invalid=143, Unknown=0, NotChecked=0, Total=240 [2018-02-04 19:28:51,005 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 163 states. [2018-02-04 19:28:51,008 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 163 to 163. [2018-02-04 19:28:51,008 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 163 states. [2018-02-04 19:28:51,008 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 163 states to 163 states and 173 transitions. [2018-02-04 19:28:51,009 INFO L78 Accepts]: Start accepts. Automaton has 163 states and 173 transitions. Word has length 104 [2018-02-04 19:28:51,009 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 19:28:51,009 INFO L432 AbstractCegarLoop]: Abstraction has 163 states and 173 transitions. [2018-02-04 19:28:51,009 INFO L433 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-02-04 19:28:51,009 INFO L276 IsEmpty]: Start isEmpty. Operand 163 states and 173 transitions. [2018-02-04 19:28:51,009 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 106 [2018-02-04 19:28:51,010 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:28:51,010 INFO L351 BasicCegarLoop]: trace histogram [11, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:28:51,010 INFO L371 AbstractCegarLoop]: === Iteration 27 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 19:28:51,010 INFO L82 PathProgramCache]: Analyzing trace with hash -1207457043, now seen corresponding path program 2 times [2018-02-04 19:28:51,010 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:28:51,010 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:28:51,011 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:28:51,011 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:28:51,011 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:28:51,030 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:28:51,031 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:28:51,146 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 19:28:51,147 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 19:28:51,147 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 19:28:51,147 INFO L109 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-02-04 19:28:51,168 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2018-02-04 19:28:51,168 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 19:28:51,173 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 19:28:51,182 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-02-04 19:28:51,182 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 19:28:51,192 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-02-04 19:28:51,193 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:28:51,201 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-02-04 19:28:51,201 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:38, output treesize:36 [2018-02-04 19:28:51,659 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 66 trivial. 0 not checked. [2018-02-04 19:28:51,659 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-02-04 19:28:51,659 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [24] imperfect sequences [15] total 38 [2018-02-04 19:28:51,659 INFO L409 AbstractCegarLoop]: Interpolant automaton has 38 states [2018-02-04 19:28:51,660 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2018-02-04 19:28:51,660 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=159, Invalid=1247, Unknown=0, NotChecked=0, Total=1406 [2018-02-04 19:28:51,660 INFO L87 Difference]: Start difference. First operand 163 states and 173 transitions. Second operand 38 states. [2018-02-04 19:28:52,628 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 19:28:52,628 INFO L93 Difference]: Finished difference Result 164 states and 173 transitions. [2018-02-04 19:28:52,628 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2018-02-04 19:28:52,628 INFO L78 Accepts]: Start accepts. Automaton has 38 states. Word has length 105 [2018-02-04 19:28:52,628 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 19:28:52,629 INFO L225 Difference]: With dead ends: 164 [2018-02-04 19:28:52,629 INFO L226 Difference]: Without dead ends: 162 [2018-02-04 19:28:52,630 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 141 GetRequests, 78 SyntacticMatches, 5 SemanticMatches, 58 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 659 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=404, Invalid=3136, Unknown=0, NotChecked=0, Total=3540 [2018-02-04 19:28:52,630 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 162 states. [2018-02-04 19:28:52,631 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 162 to 162. [2018-02-04 19:28:52,631 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 162 states. [2018-02-04 19:28:52,631 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 162 states to 162 states and 171 transitions. [2018-02-04 19:28:52,631 INFO L78 Accepts]: Start accepts. Automaton has 162 states and 171 transitions. Word has length 105 [2018-02-04 19:28:52,632 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 19:28:52,632 INFO L432 AbstractCegarLoop]: Abstraction has 162 states and 171 transitions. [2018-02-04 19:28:52,632 INFO L433 AbstractCegarLoop]: Interpolant automaton has 38 states. [2018-02-04 19:28:52,632 INFO L276 IsEmpty]: Start isEmpty. Operand 162 states and 171 transitions. [2018-02-04 19:28:52,632 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 111 [2018-02-04 19:28:52,632 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:28:52,632 INFO L351 BasicCegarLoop]: trace histogram [12, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:28:52,632 INFO L371 AbstractCegarLoop]: === Iteration 28 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 19:28:52,632 INFO L82 PathProgramCache]: Analyzing trace with hash 2055534530, now seen corresponding path program 1 times [2018-02-04 19:28:52,632 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:28:52,632 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:28:52,633 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:28:52,633 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 19:28:52,633 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:28:52,642 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:28:52,643 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:28:52,744 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 19:28:52,744 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 19:28:52,744 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 19:28:52,745 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:28:52,768 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:28:52,772 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 19:28:52,787 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 19:28:52,788 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 19:28:52,788 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 16] total 17 [2018-02-04 19:28:52,788 INFO L409 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-02-04 19:28:52,789 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-02-04 19:28:52,789 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=122, Invalid=150, Unknown=0, NotChecked=0, Total=272 [2018-02-04 19:28:52,789 INFO L87 Difference]: Start difference. First operand 162 states and 171 transitions. Second operand 17 states. [2018-02-04 19:28:52,821 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 19:28:52,821 INFO L93 Difference]: Finished difference Result 165 states and 174 transitions. [2018-02-04 19:28:52,821 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-02-04 19:28:52,821 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 110 [2018-02-04 19:28:52,821 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 19:28:52,822 INFO L225 Difference]: With dead ends: 165 [2018-02-04 19:28:52,822 INFO L226 Difference]: Without dead ends: 163 [2018-02-04 19:28:52,822 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 126 GetRequests, 110 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 35 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=126, Invalid=180, Unknown=0, NotChecked=0, Total=306 [2018-02-04 19:28:52,822 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 163 states. [2018-02-04 19:28:52,823 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 163 to 163. [2018-02-04 19:28:52,823 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 163 states. [2018-02-04 19:28:52,824 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 163 states to 163 states and 172 transitions. [2018-02-04 19:28:52,824 INFO L78 Accepts]: Start accepts. Automaton has 163 states and 172 transitions. Word has length 110 [2018-02-04 19:28:52,824 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 19:28:52,824 INFO L432 AbstractCegarLoop]: Abstraction has 163 states and 172 transitions. [2018-02-04 19:28:52,824 INFO L433 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-02-04 19:28:52,824 INFO L276 IsEmpty]: Start isEmpty. Operand 163 states and 172 transitions. [2018-02-04 19:28:52,824 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 112 [2018-02-04 19:28:52,824 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:28:52,825 INFO L351 BasicCegarLoop]: trace histogram [13, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:28:52,825 INFO L371 AbstractCegarLoop]: === Iteration 29 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 19:28:52,825 INFO L82 PathProgramCache]: Analyzing trace with hash 1832241070, now seen corresponding path program 2 times [2018-02-04 19:28:52,825 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:28:52,825 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:28:52,825 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:28:52,825 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:28:52,825 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:28:52,834 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:28:52,835 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:28:52,950 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 19:28:52,950 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 19:28:52,951 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 19:28:52,951 INFO L109 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-02-04 19:28:52,981 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2018-02-04 19:28:52,981 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-02-04 19:28:52,986 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 19:28:53,083 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-02-04 19:28:53,084 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-02-04 19:28:53,084 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:28:53,085 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:28:53,086 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:28:53,086 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:11, output treesize:7 [2018-02-04 19:28:53,184 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-02-04 19:28:53,186 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-02-04 19:28:53,190 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-02-04 19:28:53,190 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:38, output treesize:26 [2018-02-04 19:28:53,193 WARN L1033 $PredicateComparison]: unable to prove that (exists ((LDV_INIT_LIST_HEAD_~list.offset Int) (v_DerPreprocessor_2 Int)) (and (= |c_#memory_int| (store |c_old(#memory_int)| |c_LDV_INIT_LIST_HEAD_#in~list.base| (let ((.cse0 (+ LDV_INIT_LIST_HEAD_~list.offset 4))) (store (store (select |c_old(#memory_int)| |c_LDV_INIT_LIST_HEAD_#in~list.base|) LDV_INIT_LIST_HEAD_~list.offset v_DerPreprocessor_2) .cse0 (select (select |c_#memory_int| |c_LDV_INIT_LIST_HEAD_#in~list.base|) .cse0))))) (<= LDV_INIT_LIST_HEAD_~list.offset |c_LDV_INIT_LIST_HEAD_#in~list.offset|))) is different from true [2018-02-04 19:28:53,198 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 27 [2018-02-04 19:28:53,200 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:53,202 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 35 [2018-02-04 19:28:53,205 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:53,205 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:53,209 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 37 [2018-02-04 19:28:53,209 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-02-04 19:28:53,214 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:28:53,216 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:28:53,220 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:28:53,220 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 3 variables, input treesize:37, output treesize:9 [2018-02-04 19:28:53,475 WARN L1033 $PredicateComparison]: unable to prove that (exists ((ldv_atomic_add_return_~temp~0 Int)) (let ((.cse0 (select |c_old(#memory_int)| |c_ldv_atomic_add_return_#in~v.base|))) (and (<= (+ |c_ldv_atomic_add_return_#in~i| (select .cse0 |c_ldv_atomic_add_return_#in~v.offset|)) ldv_atomic_add_return_~temp~0) (= |c_#memory_int| (store |c_old(#memory_int)| |c_ldv_atomic_add_return_#in~v.base| (store .cse0 |c_ldv_atomic_add_return_#in~v.offset| ldv_atomic_add_return_~temp~0)))))) is different from true [2018-02-04 19:28:53,480 WARN L1033 $PredicateComparison]: unable to prove that (exists ((ldv_atomic_add_return_~temp~0 Int)) (let ((.cse0 (select |c_old(#memory_int)| |c_ldv_kref_get_#in~kref.base|))) (and (= (store |c_old(#memory_int)| |c_ldv_kref_get_#in~kref.base| (store .cse0 |c_ldv_kref_get_#in~kref.offset| ldv_atomic_add_return_~temp~0)) |c_#memory_int|) (<= (+ (select .cse0 |c_ldv_kref_get_#in~kref.offset|) 1) ldv_atomic_add_return_~temp~0)))) is different from true [2018-02-04 19:28:53,491 WARN L1033 $PredicateComparison]: unable to prove that (exists ((ldv_atomic_add_return_~temp~0 Int)) (let ((.cse0 (select |c_old(#memory_int)| |c_ldv_kobject_get_#in~kobj.base|)) (.cse1 (+ |c_ldv_kobject_get_#in~kobj.offset| 12))) (and (= (store |c_old(#memory_int)| |c_ldv_kobject_get_#in~kobj.base| (store .cse0 .cse1 ldv_atomic_add_return_~temp~0)) |c_#memory_int|) (<= (+ (select .cse0 .cse1) 1) ldv_atomic_add_return_~temp~0)))) is different from true [2018-02-04 19:28:53,496 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:53,496 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 27 [2018-02-04 19:28:53,498 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 15 [2018-02-04 19:28:53,498 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:28:53,501 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:28:53,503 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:28:53,503 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:28, output treesize:7 [2018-02-04 19:28:53,734 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2018-02-04 19:28:53,738 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 13 treesize of output 17 [2018-02-04 19:28:53,738 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 2 xjuncts. [2018-02-04 19:28:53,740 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-02-04 19:28:53,741 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 2 xjuncts. [2018-02-04 19:28:53,741 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:17, output treesize:8 [2018-02-04 19:28:53,981 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 91 trivial. 0 not checked. [2018-02-04 19:28:53,981 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-02-04 19:28:53,981 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [49] imperfect sequences [17] total 64 [2018-02-04 19:28:53,981 INFO L409 AbstractCegarLoop]: Interpolant automaton has 64 states [2018-02-04 19:28:53,981 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 64 interpolants. [2018-02-04 19:28:53,982 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=230, Invalid=3322, Unknown=4, NotChecked=476, Total=4032 [2018-02-04 19:28:53,982 INFO L87 Difference]: Start difference. First operand 163 states and 172 transitions. Second operand 64 states. [2018-02-04 19:28:55,889 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 19:28:55,889 INFO L93 Difference]: Finished difference Result 168 states and 171 transitions. [2018-02-04 19:28:55,889 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 66 states. [2018-02-04 19:28:55,889 INFO L78 Accepts]: Start accepts. Automaton has 64 states. Word has length 111 [2018-02-04 19:28:55,889 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 19:28:55,890 INFO L225 Difference]: With dead ends: 168 [2018-02-04 19:28:55,890 INFO L226 Difference]: Without dead ends: 157 [2018-02-04 19:28:55,892 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 156 GetRequests, 65 SyntacticMatches, 0 SemanticMatches, 91 ConstructedPredicates, 4 IntricatePredicates, 0 DeprecatedPredicates, 1403 ImplicationChecksByTransitivity, 1.6s TimeCoverageRelationStatistics Valid=381, Invalid=7463, Unknown=4, NotChecked=708, Total=8556 [2018-02-04 19:28:55,892 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 157 states. [2018-02-04 19:28:55,894 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 157 to 157. [2018-02-04 19:28:55,894 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 157 states. [2018-02-04 19:28:55,894 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 157 states to 157 states and 160 transitions. [2018-02-04 19:28:55,894 INFO L78 Accepts]: Start accepts. Automaton has 157 states and 160 transitions. Word has length 111 [2018-02-04 19:28:55,894 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 19:28:55,894 INFO L432 AbstractCegarLoop]: Abstraction has 157 states and 160 transitions. [2018-02-04 19:28:55,894 INFO L433 AbstractCegarLoop]: Interpolant automaton has 64 states. [2018-02-04 19:28:55,894 INFO L276 IsEmpty]: Start isEmpty. Operand 157 states and 160 transitions. [2018-02-04 19:28:55,895 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 120 [2018-02-04 19:28:55,895 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:28:55,895 INFO L351 BasicCegarLoop]: trace histogram [14, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:28:55,895 INFO L371 AbstractCegarLoop]: === Iteration 30 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 19:28:55,895 INFO L82 PathProgramCache]: Analyzing trace with hash 1142789455, now seen corresponding path program 1 times [2018-02-04 19:28:55,895 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:28:55,895 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:28:55,896 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:28:55,896 INFO L107 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-02-04 19:28:55,896 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:28:55,912 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:28:55,913 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:28:56,112 INFO L134 CoverageAnalysis]: Checked inductivity of 114 backedges. 2 proven. 7 refuted. 0 times theorem prover too weak. 105 trivial. 0 not checked. [2018-02-04 19:28:56,112 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 19:28:56,112 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 19:28:56,113 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:28:56,137 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:28:56,143 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 19:28:56,432 INFO L134 CoverageAnalysis]: Checked inductivity of 114 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-02-04 19:28:56,433 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 19:28:56,433 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 18] total 35 [2018-02-04 19:28:56,433 INFO L409 AbstractCegarLoop]: Interpolant automaton has 35 states [2018-02-04 19:28:56,433 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 35 interpolants. [2018-02-04 19:28:56,434 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=174, Invalid=1016, Unknown=0, NotChecked=0, Total=1190 [2018-02-04 19:28:56,434 INFO L87 Difference]: Start difference. First operand 157 states and 160 transitions. Second operand 35 states. [2018-02-04 19:28:57,357 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 19:28:57,357 INFO L93 Difference]: Finished difference Result 169 states and 172 transitions. [2018-02-04 19:28:57,357 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2018-02-04 19:28:57,357 INFO L78 Accepts]: Start accepts. Automaton has 35 states. Word has length 119 [2018-02-04 19:28:57,357 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 19:28:57,358 INFO L225 Difference]: With dead ends: 169 [2018-02-04 19:28:57,358 INFO L226 Difference]: Without dead ends: 167 [2018-02-04 19:28:57,359 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 171 GetRequests, 108 SyntacticMatches, 0 SemanticMatches, 63 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 526 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=521, Invalid=3639, Unknown=0, NotChecked=0, Total=4160 [2018-02-04 19:28:57,359 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 167 states. [2018-02-04 19:28:57,360 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 167 to 165. [2018-02-04 19:28:57,361 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 165 states. [2018-02-04 19:28:57,361 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 165 states to 165 states and 168 transitions. [2018-02-04 19:28:57,361 INFO L78 Accepts]: Start accepts. Automaton has 165 states and 168 transitions. Word has length 119 [2018-02-04 19:28:57,361 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 19:28:57,361 INFO L432 AbstractCegarLoop]: Abstraction has 165 states and 168 transitions. [2018-02-04 19:28:57,361 INFO L433 AbstractCegarLoop]: Interpolant automaton has 35 states. [2018-02-04 19:28:57,361 INFO L276 IsEmpty]: Start isEmpty. Operand 165 states and 168 transitions. [2018-02-04 19:28:57,362 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 135 [2018-02-04 19:28:57,362 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:28:57,362 INFO L351 BasicCegarLoop]: trace histogram [15, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:28:57,362 INFO L371 AbstractCegarLoop]: === Iteration 31 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 19:28:57,362 INFO L82 PathProgramCache]: Analyzing trace with hash -577478985, now seen corresponding path program 1 times [2018-02-04 19:28:57,362 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:28:57,362 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:28:57,363 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:28:57,363 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:28:57,363 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:28:57,375 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:28:57,376 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:28:57,662 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 9 refuted. 0 times theorem prover too weak. 127 trivial. 0 not checked. [2018-02-04 19:28:57,662 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 19:28:57,663 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 19:28:57,663 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:28:57,688 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:28:57,692 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 19:28:58,052 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-02-04 19:28:58,052 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-02-04 19:28:58,052 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 19] total 39 [2018-02-04 19:28:58,052 INFO L409 AbstractCegarLoop]: Interpolant automaton has 39 states [2018-02-04 19:28:58,053 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 39 interpolants. [2018-02-04 19:28:58,053 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=195, Invalid=1287, Unknown=0, NotChecked=0, Total=1482 [2018-02-04 19:28:58,053 INFO L87 Difference]: Start difference. First operand 165 states and 168 transitions. Second operand 39 states. [2018-02-04 19:28:59,054 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 19:28:59,054 INFO L93 Difference]: Finished difference Result 169 states and 172 transitions. [2018-02-04 19:28:59,054 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 39 states. [2018-02-04 19:28:59,054 INFO L78 Accepts]: Start accepts. Automaton has 39 states. Word has length 134 [2018-02-04 19:28:59,054 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 19:28:59,055 INFO L225 Difference]: With dead ends: 169 [2018-02-04 19:28:59,055 INFO L226 Difference]: Without dead ends: 167 [2018-02-04 19:28:59,056 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 194 GetRequests, 122 SyntacticMatches, 0 SemanticMatches, 72 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 600 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=595, Invalid=4807, Unknown=0, NotChecked=0, Total=5402 [2018-02-04 19:28:59,056 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 167 states. [2018-02-04 19:28:59,058 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 167 to 165. [2018-02-04 19:28:59,058 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 165 states. [2018-02-04 19:28:59,059 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 165 states to 165 states and 168 transitions. [2018-02-04 19:28:59,059 INFO L78 Accepts]: Start accepts. Automaton has 165 states and 168 transitions. Word has length 134 [2018-02-04 19:28:59,059 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 19:28:59,059 INFO L432 AbstractCegarLoop]: Abstraction has 165 states and 168 transitions. [2018-02-04 19:28:59,059 INFO L433 AbstractCegarLoop]: Interpolant automaton has 39 states. [2018-02-04 19:28:59,060 INFO L276 IsEmpty]: Start isEmpty. Operand 165 states and 168 transitions. [2018-02-04 19:28:59,060 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 140 [2018-02-04 19:28:59,060 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 19:28:59,060 INFO L351 BasicCegarLoop]: trace histogram [16, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 19:28:59,060 INFO L371 AbstractCegarLoop]: === Iteration 32 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-02-04 19:28:59,061 INFO L82 PathProgramCache]: Analyzing trace with hash -460832411, now seen corresponding path program 1 times [2018-02-04 19:28:59,061 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-02-04 19:28:59,061 INFO L67 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-02-04 19:28:59,061 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:28:59,062 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:28:59,062 INFO L125 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-02-04 19:28:59,139 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:28:59,140 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-02-04 19:28:59,157 INFO L430 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-02-04 19:28:59,158 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-02-04 19:28:59,158 INFO L213 onRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-02-04 19:28:59,158 INFO L109 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-02-04 19:28:59,265 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 19:28:59,275 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-02-04 19:28:59,304 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-02-04 19:28:59,305 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-02-04 19:28:59,306 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:28:59,307 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:28:59,312 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:28:59,312 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:20, output treesize:16 [2018-02-04 19:28:59,327 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 20 [2018-02-04 19:28:59,330 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:59,330 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 27 [2018-02-04 19:28:59,331 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:28:59,336 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:28:59,343 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-02-04 19:28:59,343 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:31, output treesize:27 [2018-02-04 19:28:59,365 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 29 [2018-02-04 19:28:59,368 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:28:59,370 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 38 [2018-02-04 19:28:59,370 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:28:59,377 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:28:59,387 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-02-04 19:28:59,388 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:47, output treesize:43 [2018-02-04 19:29:01,723 WARN L143 SmtUtils]: Spent 316ms on a formula simplification that was a NOOP. DAG size: 29 [2018-02-04 19:29:01,744 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 38 [2018-02-04 19:29:01,746 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:01,749 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 49 [2018-02-04 19:29:01,749 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:29:01,754 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:29:01,763 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 3 dim-0 vars, and 1 xjuncts. [2018-02-04 19:29:01,763 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:63, output treesize:59 [2018-02-04 19:29:03,097 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 39 [2018-02-04 19:29:03,108 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:03,113 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 50 [2018-02-04 19:29:03,114 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:29:03,121 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:29:03,131 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-02-04 19:29:03,131 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:59, output treesize:55 [2018-02-04 19:29:05,186 WARN L143 SmtUtils]: Spent 2031ms on a formula simplification that was a NOOP. DAG size: 34 [2018-02-04 19:29:05,190 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 60 treesize of output 49 [2018-02-04 19:29:05,194 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:05,195 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:05,200 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 2 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 72 [2018-02-04 19:29:05,200 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:29:05,207 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:29:05,216 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-02-04 19:29:05,216 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:71, output treesize:67 [2018-02-04 19:29:07,493 WARN L143 SmtUtils]: Spent 2255ms on a formula simplification that was a NOOP. DAG size: 38 [2018-02-04 19:29:07,497 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 72 treesize of output 59 [2018-02-04 19:29:07,503 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:07,504 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:07,504 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:07,513 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:07,514 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 5 select indices, 5 select index equivalence classes, 4 disjoint index pairs (out of 10 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 104 [2018-02-04 19:29:07,514 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:29:07,529 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:29:07,539 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-02-04 19:29:07,540 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:83, output treesize:79 [2018-02-04 19:29:11,583 WARN L143 SmtUtils]: Spent 4024ms on a formula simplification that was a NOOP. DAG size: 42 [2018-02-04 19:29:11,588 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 84 treesize of output 69 [2018-02-04 19:29:11,592 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:11,595 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:11,596 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:11,600 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:11,600 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:11,601 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:11,610 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:11,611 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 6 select indices, 6 select index equivalence classes, 7 disjoint index pairs (out of 15 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 69 treesize of output 146 [2018-02-04 19:29:11,611 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:29:11,625 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:29:11,637 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-02-04 19:29:11,637 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:95, output treesize:91 [2018-02-04 19:29:13,951 WARN L143 SmtUtils]: Spent 2286ms on a formula simplification that was a NOOP. DAG size: 46 [2018-02-04 19:29:13,956 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 96 treesize of output 79 [2018-02-04 19:29:13,959 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:13,961 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:13,964 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:13,965 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:13,968 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:13,971 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:13,972 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:13,974 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:13,980 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:13,980 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:13,987 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:13,988 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 7 select indices, 7 select index equivalence classes, 11 disjoint index pairs (out of 21 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 79 treesize of output 198 [2018-02-04 19:29:13,988 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:29:14,010 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:29:14,024 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-02-04 19:29:14,025 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:107, output treesize:103 [2018-02-04 19:29:14,808 WARN L143 SmtUtils]: Spent 755ms on a formula simplification that was a NOOP. DAG size: 50 [2018-02-04 19:29:14,814 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 108 treesize of output 89 [2018-02-04 19:29:14,817 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:14,820 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:14,825 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:14,833 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:14,834 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:14,837 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:14,840 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:14,841 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:14,842 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:14,844 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:14,852 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:14,853 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:14,853 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:14,862 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:14,863 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:14,864 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:14,865 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 8 select indices, 8 select index equivalence classes, 16 disjoint index pairs (out of 28 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 89 treesize of output 260 [2018-02-04 19:29:14,865 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:29:14,895 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:29:14,913 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-02-04 19:29:14,913 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:119, output treesize:115 [2018-02-04 19:29:17,223 WARN L143 SmtUtils]: Spent 2278ms on a formula simplification that was a NOOP. DAG size: 54 [2018-02-04 19:29:17,228 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 120 treesize of output 99 [2018-02-04 19:29:17,232 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:17,234 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:17,234 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:17,238 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:17,239 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:17,240 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:17,242 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:17,242 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:17,245 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:17,246 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:17,247 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:17,250 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:17,256 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:17,260 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:17,260 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:17,261 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:17,264 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:17,265 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:17,266 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:17,275 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:17,276 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:17,276 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:17,277 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 9 select indices, 9 select index equivalence classes, 22 disjoint index pairs (out of 36 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 99 treesize of output 332 [2018-02-04 19:29:17,278 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:29:17,318 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:29:17,336 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-02-04 19:29:17,336 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:131, output treesize:127 [2018-02-04 19:29:18,129 WARN L143 SmtUtils]: Spent 753ms on a formula simplification that was a NOOP. DAG size: 58 [2018-02-04 19:29:18,135 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 132 treesize of output 109 [2018-02-04 19:29:18,138 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:18,139 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:18,141 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:18,142 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:18,145 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:18,146 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:18,147 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:18,148 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:18,150 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:18,150 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:18,153 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:18,154 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:18,155 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:18,158 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:18,158 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:18,163 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:18,163 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:18,164 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:18,168 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:18,173 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:18,177 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:18,178 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:18,179 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:18,182 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:18,183 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:18,183 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:18,193 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:18,194 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:18,195 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:18,197 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 10 select indices, 10 select index equivalence classes, 29 disjoint index pairs (out of 45 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 109 treesize of output 414 [2018-02-04 19:29:18,197 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:29:18,252 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:29:18,272 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-02-04 19:29:18,272 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:143, output treesize:139 [2018-02-04 19:29:22,342 WARN L143 SmtUtils]: Spent 4029ms on a formula simplification that was a NOOP. DAG size: 62 [2018-02-04 19:29:22,348 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 144 treesize of output 119 [2018-02-04 19:29:22,352 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:22,354 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:22,356 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:22,357 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:22,358 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:22,361 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:22,362 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:22,363 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:22,364 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:22,366 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:22,367 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:22,368 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:22,373 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:22,373 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:22,374 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:22,377 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:22,378 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:22,379 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:22,383 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:22,384 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:22,385 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:22,390 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:22,396 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:22,397 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:22,402 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:22,403 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:22,403 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:22,405 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:22,410 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:22,411 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:22,412 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:22,415 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:22,416 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:22,417 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:22,429 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:22,430 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:22,431 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:22,432 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 11 select indices, 11 select index equivalence classes, 37 disjoint index pairs (out of 55 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 119 treesize of output 506 [2018-02-04 19:29:22,434 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:29:22,525 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:29:22,554 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-02-04 19:29:22,555 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:155, output treesize:151 [2018-02-04 19:29:25,170 WARN L143 SmtUtils]: Spent 2529ms on a formula simplification that was a NOOP. DAG size: 66 [2018-02-04 19:29:25,178 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 156 treesize of output 129 [2018-02-04 19:29:25,184 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:25,185 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:25,187 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:25,191 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:25,193 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:25,194 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:25,199 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:25,200 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:25,201 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:25,202 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:25,203 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:25,206 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:25,207 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:25,207 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:25,211 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:25,212 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:25,213 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:25,214 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:25,216 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:25,217 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:25,218 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:25,221 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:25,222 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:25,223 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:25,225 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:25,226 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:25,227 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:25,231 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:25,232 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:25,233 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:25,239 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:25,245 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:25,246 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:25,250 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:25,251 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:25,252 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:25,253 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:25,257 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:25,258 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:25,258 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:25,262 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:25,263 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:25,264 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:25,275 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:25,276 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:25,277 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:25,278 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 12 select indices, 12 select index equivalence classes, 46 disjoint index pairs (out of 66 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 129 treesize of output 608 [2018-02-04 19:29:25,279 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:29:25,371 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:29:25,395 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-02-04 19:29:25,395 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:167, output treesize:163 [2018-02-04 19:29:27,754 WARN L143 SmtUtils]: Spent 2310ms on a formula simplification that was a NOOP. DAG size: 70 [2018-02-04 19:29:27,761 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 168 treesize of output 139 [2018-02-04 19:29:27,765 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:27,766 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:27,766 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:27,767 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:27,767 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:27,768 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:27,768 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:27,769 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:27,769 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:27,771 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:27,780 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:27,782 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:27,782 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:27,783 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:27,783 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:27,784 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:27,784 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:27,785 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:27,785 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:27,787 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:27,788 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:27,789 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:27,789 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:27,790 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:27,790 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:27,791 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:27,791 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:27,794 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:27,794 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:27,795 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:27,795 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:27,796 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:27,797 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:27,797 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:27,799 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:27,800 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:27,800 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:27,801 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:27,801 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:27,802 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:27,804 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:27,805 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:27,805 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:27,806 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:27,806 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:27,809 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:27,809 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:27,810 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:27,810 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:27,813 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:27,813 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:27,814 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:27,816 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:27,816 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:27,818 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:27,820 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:27,824 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 13 select indices, 13 select index equivalence classes, 56 disjoint index pairs (out of 78 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 139 treesize of output 720 [2018-02-04 19:29:27,825 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:29:27,947 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:29:27,974 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-02-04 19:29:27,974 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:179, output treesize:175 [2018-02-04 19:29:32,059 WARN L143 SmtUtils]: Spent 4031ms on a formula simplification that was a NOOP. DAG size: 74 [2018-02-04 19:29:32,065 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 179 treesize of output 148 [2018-02-04 19:29:32,076 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:32,077 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:32,080 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:32,081 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:32,082 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:32,083 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:32,084 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:32,085 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:32,087 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:32,090 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:32,091 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:32,092 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:32,095 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:32,096 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:32,096 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:32,097 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:32,098 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:32,099 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:32,102 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:32,104 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:32,105 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:32,107 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:32,109 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:32,109 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:32,110 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:32,111 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:32,112 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:32,115 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:32,117 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:32,118 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:32,129 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:32,137 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:32,138 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:32,140 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:32,141 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:32,142 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:32,144 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:32,148 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:32,149 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:32,150 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:32,151 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:32,152 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:32,153 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:32,155 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:32,158 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:32,159 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:32,160 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:32,161 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:32,162 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:32,165 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:32,167 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:32,168 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:32,169 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:32,170 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:32,173 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:32,175 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:32,176 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:32,177 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:32,180 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:32,183 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:32,184 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:32,186 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:32,190 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:32,191 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:32,201 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:32,203 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:32,206 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:32,207 INFO L303 Elim1Store]: Index analysis took 139 ms [2018-02-04 19:29:32,208 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 14 select indices, 14 select index equivalence classes, 67 disjoint index pairs (out of 91 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 148 treesize of output 830 [2018-02-04 19:29:32,209 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:29:32,361 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:29:32,391 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 3 dim-0 vars, and 1 xjuncts. [2018-02-04 19:29:32,391 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:198, output treesize:194 [2018-02-04 19:29:34,490 WARN L143 SmtUtils]: Spent 2013ms on a formula simplification that was a NOOP. DAG size: 82 [2018-02-04 19:29:38,615 WARN L143 SmtUtils]: Spent 2013ms on a formula simplification that was a NOOP. DAG size: 81 [2018-02-04 19:29:38,973 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-02-04 19:29:38,976 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-02-04 19:29:38,978 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-02-04 19:29:38,978 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:42, output treesize:27 [2018-02-04 19:29:38,979 WARN L1033 $PredicateComparison]: unable to prove that (exists ((v_DerPreprocessor_4 Int)) (= (store |c_old(#memory_$Pointer$.offset)| |c_ldv_kobject_init_internal_#in~kobj.base| (let ((.cse0 (+ |c_ldv_kobject_init_internal_#in~kobj.offset| 4))) (store (store (store (select |c_old(#memory_$Pointer$.offset)| |c_ldv_kobject_init_internal_#in~kobj.base|) (+ |c_ldv_kobject_init_internal_#in~kobj.offset| 12) v_DerPreprocessor_4) .cse0 .cse0) (+ |c_ldv_kobject_init_internal_#in~kobj.offset| 8) .cse0))) |c_#memory_$Pointer$.offset|)) is different from true [2018-02-04 19:29:38,982 WARN L1033 $PredicateComparison]: unable to prove that (exists ((v_DerPreprocessor_4 Int)) (= (store |c_old(#memory_$Pointer$.offset)| |c_ldv_kobject_init_#in~kobj.base| (let ((.cse0 (+ |c_ldv_kobject_init_#in~kobj.offset| 4))) (store (store (store (select |c_old(#memory_$Pointer$.offset)| |c_ldv_kobject_init_#in~kobj.base|) (+ |c_ldv_kobject_init_#in~kobj.offset| 12) v_DerPreprocessor_4) .cse0 .cse0) (+ |c_ldv_kobject_init_#in~kobj.offset| 8) .cse0))) |c_#memory_$Pointer$.offset|)) is different from true [2018-02-04 19:29:38,991 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:38,992 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 163 treesize of output 155 [2018-02-04 19:29:39,005 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,011 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,015 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,021 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,027 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,033 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,038 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,044 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,049 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,054 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,070 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,075 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,080 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,086 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,092 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,098 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,103 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,107 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,113 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,118 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,123 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,128 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,133 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,147 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,152 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,157 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,163 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,169 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,175 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,181 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,187 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,192 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,197 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,202 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,206 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,212 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,216 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,221 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,226 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,231 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,234 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,238 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,243 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,249 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,254 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,259 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,264 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,280 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,285 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,291 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,296 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,300 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,305 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,311 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,315 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,320 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,325 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,340 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,346 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,351 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,357 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,364 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,370 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,377 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,382 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,388 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,404 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,410 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,416 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,421 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,427 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,434 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,449 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,486 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,502 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,507 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,512 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,526 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,531 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,551 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,557 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,562 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,569 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,584 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,589 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,594 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,601 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,607 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,622 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,627 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,633 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,634 INFO L682 Elim1Store]: detected equality via solver [2018-02-04 19:29:39,649 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,654 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,659 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,702 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,708 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,713 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,713 INFO L682 Elim1Store]: detected equality via solver [2018-02-04 19:29:39,843 INFO L303 Elim1Store]: Index analysis took 849 ms [2018-02-04 19:29:39,863 INFO L477 Elim1Store]: Elim1 applied some preprocessing eliminated variable of array dimension 1, 1 stores, 15 select indices, 15 select index equivalence classes, 90 disjoint index pairs (out of 105 index pairs), introduced 2 new quantified variables, introduced 4 case distinctions, treesize of input 155 treesize of output 1059 [2018-02-04 19:29:39,882 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,883 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,884 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,885 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,886 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,887 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,888 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,889 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,890 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,891 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,892 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,893 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,894 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,895 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,896 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,896 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,898 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,899 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,899 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,900 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,901 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,902 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,903 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,904 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,905 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,906 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,907 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,908 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,909 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,910 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,911 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,912 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,913 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,914 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,915 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,916 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,917 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,917 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,918 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,919 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,920 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,921 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,922 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,923 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,924 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,924 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,925 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,926 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,927 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,928 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,929 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,930 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,931 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,932 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,957 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,958 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,959 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,960 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,961 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,962 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,963 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,964 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,965 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,966 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,971 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,972 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,973 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,974 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,975 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,977 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,978 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,979 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,980 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,980 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,981 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,982 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,983 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,984 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,985 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,986 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,987 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,988 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,989 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,990 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,991 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,993 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,994 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,995 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,995 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,997 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,998 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:39,998 INFO L682 Elim1Store]: detected equality via solver [2018-02-04 19:29:40,017 INFO L303 Elim1Store]: Index analysis took 138 ms [2018-02-04 19:29:40,026 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 14 select indices, 14 select index equivalence classes, 98 disjoint index pairs (out of 91 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 1044 treesize of output 1172 [2018-02-04 19:29:40,393 WARN L146 SmtUtils]: Spent 364ms on a formula simplification. DAG size of input: 227 DAG size of output 107 [2018-02-04 19:29:40,396 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,397 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,397 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,398 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,398 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,398 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,399 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,399 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,400 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,400 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,401 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,401 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,402 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,402 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,403 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,403 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,403 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,404 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,404 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,405 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,405 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,406 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,406 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,407 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,407 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,408 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,408 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,409 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,409 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,409 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,410 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,410 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,411 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,411 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,412 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,412 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,413 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,413 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,413 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,414 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,414 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,415 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,415 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,416 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,416 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,417 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,417 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,418 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,418 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,418 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,419 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,419 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,420 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,420 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,421 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,421 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,422 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,422 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,423 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,423 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,424 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,424 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,425 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,425 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,426 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,426 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,427 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,427 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,428 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,428 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,429 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,429 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,430 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,430 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,430 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,431 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,431 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,432 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,432 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,433 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,433 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,434 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,434 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,435 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,435 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,436 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,436 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,436 INFO L682 Elim1Store]: detected equality via solver [2018-02-04 19:29:40,437 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,438 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,446 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 13 select indices, 13 select index equivalence classes, 79 disjoint index pairs (out of 78 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 131 treesize of output 1016 [2018-02-04 19:29:40,447 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-02-04 19:29:40,709 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,718 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,719 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,719 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,720 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,720 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,721 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,722 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,722 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,723 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,724 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,724 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,725 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,726 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,726 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,727 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,728 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,728 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,729 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,729 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,730 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,731 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,731 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,732 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,733 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,733 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,734 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,735 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,736 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,737 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,737 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,738 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,739 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,739 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,740 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,741 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,742 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,742 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,743 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,744 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,744 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,745 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,746 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,746 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,747 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,748 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,748 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,749 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,750 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,750 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,751 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,752 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,752 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,753 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,754 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,754 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,755 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,755 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,756 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,757 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,757 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,758 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,759 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,760 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,760 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,761 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,762 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,762 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,763 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,764 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,764 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,765 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,766 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,766 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,767 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,768 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,768 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,769 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,770 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,771 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,771 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,772 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,773 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,773 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,774 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,775 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,775 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,776 INFO L682 Elim1Store]: detected equality via solver [2018-02-04 19:29:40,776 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,787 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:40,805 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 13 select indices, 13 select index equivalence classes, 79 disjoint index pairs (out of 78 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 127 treesize of output 1016 [2018-02-04 19:29:40,806 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-02-04 19:29:41,049 INFO L267 ElimStorePlain]: Start of recursive call 4: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-02-04 19:29:42,310 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:42,314 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:42,316 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:42,320 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:42,322 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:42,326 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:42,329 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:42,332 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:42,334 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:42,343 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:42,346 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:42,349 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:42,352 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:42,355 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:42,358 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:42,361 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:42,364 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:42,367 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:42,370 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:42,372 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:42,375 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:42,378 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:42,387 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:42,390 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:42,392 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:42,395 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:42,398 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:42,401 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:42,405 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:42,408 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:42,411 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:42,414 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:42,418 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:42,420 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:42,427 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:42,430 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:42,433 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:42,436 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:42,439 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:42,443 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:42,446 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:42,449 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:42,451 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:42,454 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:42,457 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:42,460 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:42,462 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:42,465 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:42,468 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:42,471 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:42,474 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:42,477 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:42,480 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:42,483 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:42,486 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:42,489 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:42,498 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:42,501 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:42,504 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:42,507 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:42,510 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:42,513 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:42,516 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:42,519 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:42,522 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:42,529 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:42,532 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:42,535 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:42,538 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:42,541 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:42,544 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:42,547 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:42,551 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:42,559 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:42,569 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:42,579 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:42,583 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:42,592 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:42,594 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:42,597 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:42,600 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:42,603 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:42,605 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:42,614 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:42,617 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:42,621 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:42,623 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:42,625 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:42,632 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:42,635 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:42,637 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:42,640 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:42,643 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:42,669 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:42,672 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:42,674 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:42,677 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:42,679 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:42,681 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:42,684 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:42,686 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:42,689 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:42,689 INFO L682 Elim1Store]: detected equality via solver [2018-02-04 19:29:42,768 INFO L303 Elim1Store]: Index analysis took 463 ms [2018-02-04 19:29:42,787 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 15 select indices, 15 select index equivalence classes, 90 disjoint index pairs (out of 105 index pairs), introduced 1 new quantified variables, introduced 5 case distinctions, treesize of input 152 treesize of output 1082 [2018-02-04 19:29:43,681 WARN L146 SmtUtils]: Spent 889ms on a formula simplification. DAG size of input: 276 DAG size of output 173 [2018-02-04 19:29:43,685 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:43,685 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:43,686 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:43,686 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:43,687 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:43,687 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:43,688 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:43,688 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:43,689 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:43,689 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:43,690 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:43,690 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:43,691 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:43,691 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:43,692 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:43,692 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:43,693 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:43,694 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:43,694 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:43,695 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:43,695 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:43,696 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:43,696 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:43,697 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:43,697 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:43,698 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:43,698 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:43,699 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:43,701 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:43,702 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:43,702 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:43,703 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:43,703 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:43,704 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:43,705 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:43,705 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:43,706 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:43,706 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:43,707 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:43,707 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:43,708 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:43,708 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:43,709 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:43,709 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:43,710 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:43,710 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:43,711 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:43,711 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:43,712 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:43,712 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:43,713 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:43,714 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:43,714 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:43,715 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:43,715 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:43,716 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:43,716 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:43,717 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:43,717 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:43,718 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:43,718 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:43,719 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:43,719 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:43,720 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:43,720 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:43,721 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:43,721 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:43,722 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:43,722 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:43,723 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:43,723 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:43,724 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:43,724 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:43,725 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:43,725 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:43,726 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:43,726 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:43,727 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:43,728 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:43,728 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:43,729 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:43,729 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:43,730 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:43,730 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:43,731 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:43,731 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:43,732 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:43,732 INFO L682 Elim1Store]: detected equality via solver [2018-02-04 19:29:43,732 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:43,734 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:43,742 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 13 select indices, 13 select index equivalence classes, 79 disjoint index pairs (out of 78 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 133 treesize of output 1022 [2018-02-04 19:29:43,743 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 1 xjuncts. [2018-02-04 19:29:44,076 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:44,078 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:44,080 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:44,081 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:44,082 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:44,084 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:44,086 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:44,087 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:44,091 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:44,093 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:44,095 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:44,096 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:44,098 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:44,099 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:44,100 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:44,102 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:44,103 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:44,105 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:44,106 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:44,108 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:44,111 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:44,112 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:44,113 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:44,115 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:44,117 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:44,118 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:44,120 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:44,121 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:44,123 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:44,124 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:44,126 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:44,129 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:44,130 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:44,132 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:44,133 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:44,135 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:44,137 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:44,138 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:44,140 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:44,141 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:44,143 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:44,144 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:44,146 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:44,147 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:44,149 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:44,151 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:44,152 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:44,154 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:44,155 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:44,156 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:44,158 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:44,161 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:44,161 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:44,163 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:44,165 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:44,166 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:44,167 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:44,169 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:44,170 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:44,173 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:44,175 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:44,176 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:44,178 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:44,179 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:44,181 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:44,182 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:44,185 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:44,186 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:44,186 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:44,188 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:44,189 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:44,191 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:44,193 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:44,194 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:44,195 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:44,196 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:44,198 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:44,200 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:44,202 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:44,204 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:44,205 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:44,206 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:44,212 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:44,216 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:44,217 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:44,218 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:44,219 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:44,221 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:44,223 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:44,223 INFO L682 Elim1Store]: detected equality via solver [2018-02-04 19:29:44,225 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:44,229 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:44,264 INFO L303 Elim1Store]: Index analysis took 192 ms [2018-02-04 19:29:44,275 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 14 select indices, 14 select index equivalence classes, 81 disjoint index pairs (out of 91 index pairs), introduced 0 new quantified variables, introduced 3 case distinctions, treesize of input 129 treesize of output 1055 [2018-02-04 19:29:44,277 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 2 xjuncts. [2018-02-04 19:29:45,074 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:45,076 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:45,077 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:45,078 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:45,080 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:45,081 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:45,083 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:45,084 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:45,085 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:45,088 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:45,090 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:45,091 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:45,093 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:45,095 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:45,096 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:45,098 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:45,099 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:45,101 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:45,102 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:45,103 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:45,107 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:45,108 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:45,110 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:45,111 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:45,113 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:45,114 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:45,115 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:45,117 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:45,119 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:45,120 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:45,122 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:45,123 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:45,125 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:45,126 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:45,128 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:45,129 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:45,131 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:45,132 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:45,134 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:45,135 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:45,138 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:45,139 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:45,139 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:45,140 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:45,141 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:45,143 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:45,144 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:45,146 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:45,149 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:45,150 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:45,151 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:45,153 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:45,154 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:45,156 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:45,157 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:45,161 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:45,162 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:45,164 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:45,166 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:45,167 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:45,168 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:45,171 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:45,173 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:45,174 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:45,175 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:45,177 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:45,179 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:45,180 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:45,181 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:45,182 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:45,184 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:45,186 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:45,187 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:45,191 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:45,192 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:45,193 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:45,199 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:45,201 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:45,202 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:45,203 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:45,207 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:45,237 INFO L303 Elim1Store]: Index analysis took 165 ms [2018-02-04 19:29:45,249 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 14 select indices, 14 select index equivalence classes, 81 disjoint index pairs (out of 91 index pairs), introduced 0 new quantified variables, introduced 3 case distinctions, treesize of input 124 treesize of output 985 [2018-02-04 19:29:45,251 INFO L267 ElimStorePlain]: Start of recursive call 10: End of recursive call: and 2 xjuncts. [2018-02-04 19:29:46,077 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,078 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,078 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,079 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,080 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,081 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,081 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,082 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,083 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,084 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,084 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,085 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,086 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,086 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,087 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,088 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,088 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,089 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,090 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,091 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,091 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,092 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,093 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,093 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,094 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,095 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,100 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,101 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,101 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,102 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,103 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,104 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,104 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,105 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,106 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,106 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,107 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,108 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,108 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,109 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,110 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,110 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,111 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,112 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,113 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,114 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,114 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,115 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,116 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,116 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,117 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,117 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,118 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,119 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,120 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,120 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,121 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,122 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,122 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,123 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,124 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,124 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,125 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,126 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,127 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,127 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,128 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,129 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,130 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,130 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,131 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,132 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,132 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,133 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,134 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,135 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,135 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,136 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,138 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,151 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 13 select indices, 13 select index equivalence classes, 79 disjoint index pairs (out of 78 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 122 treesize of output 958 [2018-02-04 19:29:46,152 INFO L267 ElimStorePlain]: Start of recursive call 11: End of recursive call: and 1 xjuncts. [2018-02-04 19:29:46,471 INFO L267 ElimStorePlain]: Start of recursive call 7: 4 dim-1 vars, End of recursive call: and 6 xjuncts. [2018-02-04 19:29:46,829 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,832 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,834 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,837 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,840 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,842 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,844 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,847 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,849 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,852 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,855 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,856 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,859 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,862 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,864 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,867 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,869 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,871 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,873 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,875 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,877 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,879 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,881 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,884 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,887 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,889 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,891 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,893 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,896 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,899 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,901 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,903 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,906 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,908 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,910 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,913 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,915 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,918 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,921 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,924 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,926 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,929 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,932 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,934 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,937 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,939 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,942 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,944 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,947 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,949 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,952 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,954 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,957 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,959 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,961 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,964 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,966 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,969 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,971 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,973 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,976 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,979 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,981 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,984 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,986 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,989 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,991 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,993 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,996 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:46,998 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,000 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,003 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,005 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,007 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,009 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,012 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,014 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,017 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,019 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,021 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,024 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,026 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,028 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,032 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,034 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,036 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,039 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,042 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,044 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,047 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,047 INFO L682 Elim1Store]: detected equality via solver [2018-02-04 19:29:47,050 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,052 INFO L303 Elim1Store]: Index analysis took 228 ms [2018-02-04 19:29:47,053 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 13 select indices, 13 select index equivalence classes, 79 disjoint index pairs (out of 78 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 151 treesize of output 1000 [2018-02-04 19:29:47,154 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,154 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,155 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,155 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,156 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,156 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,157 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,158 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,158 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,159 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,159 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,160 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,160 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,161 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,161 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,162 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,162 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,163 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,163 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,164 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,164 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,165 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,165 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,166 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,166 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,167 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,167 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,168 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,168 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,169 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,169 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,170 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,170 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,171 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,171 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,172 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,172 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,173 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,173 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,174 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,174 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,175 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,176 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,176 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,177 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,177 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,178 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,178 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,179 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,179 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,180 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,180 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,181 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,181 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,182 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,182 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,183 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,183 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,184 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,184 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,185 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,185 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,186 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,186 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,187 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,187 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,188 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,188 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,189 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,189 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,190 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,190 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,191 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,191 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,192 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,192 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,193 INFO L682 Elim1Store]: detected equality via solver [2018-02-04 19:29:47,193 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,194 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,196 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 13 select indices, 13 select index equivalence classes, 80 disjoint index pairs (out of 78 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 124 treesize of output 997 [2018-02-04 19:29:47,197 INFO L267 ElimStorePlain]: Start of recursive call 13: End of recursive call: and 1 xjuncts. [2018-02-04 19:29:47,393 INFO L267 ElimStorePlain]: Start of recursive call 12: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:29:47,665 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,669 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,671 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,674 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,677 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,680 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,683 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,685 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,688 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,696 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,699 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,702 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,705 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,707 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,710 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,713 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,716 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,719 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,722 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,724 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,727 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,735 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,738 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,741 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,744 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,747 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,748 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,752 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,755 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,758 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,760 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,763 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,771 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,774 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,777 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,780 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,782 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,785 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,788 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,791 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,794 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,797 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,800 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,803 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,806 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,811 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,815 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,820 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,823 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,827 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,831 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,834 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,842 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,845 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,848 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,852 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,856 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,861 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,865 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,870 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,880 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,884 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,887 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,890 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,893 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,896 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,899 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,909 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,913 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,916 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,921 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,925 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,929 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,933 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,936 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,939 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,943 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,945 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,948 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,956 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,959 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,961 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,965 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,973 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,976 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,978 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:47,980 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:48,003 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:48,006 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:48,009 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:48,012 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:48,015 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:48,015 INFO L682 Elim1Store]: detected equality via solver [2018-02-04 19:29:48,018 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:48,022 INFO L303 Elim1Store]: Index analysis took 362 ms [2018-02-04 19:29:48,030 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 14 select indices, 14 select index equivalence classes, 81 disjoint index pairs (out of 91 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 150 treesize of output 1023 [2018-02-04 19:29:48,337 WARN L146 SmtUtils]: Spent 304ms on a formula simplification. DAG size of input: 175 DAG size of output 111 [2018-02-04 19:29:48,340 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:48,341 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:48,341 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:48,342 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:48,342 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:48,343 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:48,343 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:48,345 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:48,345 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:48,346 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:48,346 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:48,347 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:48,347 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:48,348 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:48,349 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:48,349 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:48,350 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:48,350 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:48,352 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:48,352 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:48,353 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:48,353 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:48,354 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:48,354 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:48,355 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:48,355 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:48,356 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:48,356 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:48,357 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:48,358 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:48,358 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:48,359 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:48,359 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:48,360 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:48,360 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:48,361 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:48,361 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:48,362 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:48,363 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:48,364 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:48,364 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:48,365 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:48,365 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:48,366 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:48,366 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:48,367 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:48,368 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:48,369 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:48,369 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:48,370 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:48,370 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:48,371 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:48,371 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:48,373 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:48,373 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:48,374 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:48,374 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:48,375 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:48,375 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:48,377 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:48,377 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:48,378 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:48,378 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:48,379 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:48,379 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:48,380 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:48,381 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:48,382 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:48,382 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:48,383 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:48,383 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:48,385 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:48,387 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:48,388 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:48,388 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:48,389 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:48,390 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:48,390 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:48,390 INFO L682 Elim1Store]: detected equality via solver [2018-02-04 19:29:48,391 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:48,392 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:48,400 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 14 select indices, 14 select index equivalence classes, 83 disjoint index pairs (out of 91 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 146 treesize of output 1053 [2018-02-04 19:29:48,403 INFO L267 ElimStorePlain]: Start of recursive call 15: End of recursive call: and 2 xjuncts. [2018-02-04 19:29:49,195 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:49,196 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:49,196 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:49,197 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:49,198 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:49,198 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:49,199 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:49,200 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:49,200 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:49,201 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:49,202 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:49,203 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:49,203 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:49,204 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:49,205 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:49,205 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:49,206 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:49,207 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:49,208 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:49,208 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:49,209 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:49,210 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:49,210 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:49,211 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:49,212 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:49,213 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:49,213 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:49,214 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:49,215 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:49,216 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:49,217 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:49,217 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:49,218 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:49,219 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:49,219 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:49,220 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:49,221 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:49,221 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:49,222 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:49,223 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:49,224 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:49,224 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:49,225 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:49,226 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:49,226 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:49,227 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:49,228 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:49,228 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:49,229 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:49,230 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:49,231 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:49,231 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:49,232 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:49,233 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:49,233 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:49,234 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:49,235 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:49,235 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:49,236 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:49,237 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:49,238 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:49,238 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:49,239 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:49,240 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:49,240 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:49,241 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:49,242 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:49,242 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:49,243 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:49,244 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:49,244 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:49,245 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:49,246 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:49,247 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:49,247 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:49,248 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:49,248 INFO L682 Elim1Store]: detected equality via solver [2018-02-04 19:29:49,249 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:49,250 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:49,253 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 13 select indices, 13 select index equivalence classes, 80 disjoint index pairs (out of 78 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 134 treesize of output 1009 [2018-02-04 19:29:49,254 INFO L267 ElimStorePlain]: Start of recursive call 16: End of recursive call: and 1 xjuncts. [2018-02-04 19:29:49,496 INFO L267 ElimStorePlain]: Start of recursive call 14: 2 dim-1 vars, End of recursive call: and 3 xjuncts. [2018-02-04 19:29:49,780 INFO L267 ElimStorePlain]: Start of recursive call 3: 2 dim-0 vars, 4 dim-1 vars, End of recursive call: and 12 xjuncts. [2018-02-04 19:29:49,895 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 4 xjuncts. [2018-02-04 19:29:49,988 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 5 dim-0 vars, and 4 xjuncts. [2018-02-04 19:29:49,988 INFO L202 ElimStorePlain]: Needed 16 recursive calls to eliminate 4 variables, input treesize:177, output treesize:533 [2018-02-04 19:29:50,482 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 122 treesize of output 95 [2018-02-04 19:29:50,486 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:50,486 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:50,488 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:50,488 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:50,489 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:50,490 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:50,491 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:50,491 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:50,492 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:50,493 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:50,494 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:50,495 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:50,495 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:50,496 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:50,497 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:50,497 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:50,498 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:50,499 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:50,500 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:50,500 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:50,501 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:50,502 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:50,503 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:50,503 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:50,504 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:50,504 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:50,505 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:50,505 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:50,506 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:50,507 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:50,507 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:50,508 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:50,509 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:50,509 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:50,510 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:50,510 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:50,511 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:50,512 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:50,512 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:50,513 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:50,513 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:50,514 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:50,515 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:50,515 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:50,516 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:50,517 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:50,517 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:50,518 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:50,518 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:50,519 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:50,520 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:50,520 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:50,521 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:50,521 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:50,522 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:50,523 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:50,523 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:50,524 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:50,525 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:50,525 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:50,526 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:50,527 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:50,528 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:50,528 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:50,529 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:50,529 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:50,530 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:50,531 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:50,531 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:50,532 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:50,533 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:50,533 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:50,534 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:50,535 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:50,535 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:50,536 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:50,536 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:50,537 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:50,549 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 12 select indices, 12 select index equivalence classes, 79 disjoint index pairs (out of 66 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 95 treesize of output 667 [2018-02-04 19:29:50,549 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:29:50,684 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:29:50,698 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-02-04 19:29:50,699 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:131, output treesize:112 [2018-02-04 19:29:51,026 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 118 treesize of output 91 [2018-02-04 19:29:51,029 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,030 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,031 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,031 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,032 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,033 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,033 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,034 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,035 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,035 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,036 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,037 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,037 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,038 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,039 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,039 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,040 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,041 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,041 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,042 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,043 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,044 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,044 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,045 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,045 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,046 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,047 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,048 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,048 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,049 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,049 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,050 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,051 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,052 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,052 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,053 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,054 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,054 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,055 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,056 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,056 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,057 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,058 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,059 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,059 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,060 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,061 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,061 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,062 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,063 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,063 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,064 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,065 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,065 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,066 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,067 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,067 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,068 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,069 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,070 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,070 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,071 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,072 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,072 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,073 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,074 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,074 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,075 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,076 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,076 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,077 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,078 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,079 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,079 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,080 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,081 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,093 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 12 select indices, 12 select index equivalence classes, 79 disjoint index pairs (out of 66 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 91 treesize of output 635 [2018-02-04 19:29:51,093 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-02-04 19:29:51,229 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-02-04 19:29:51,244 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-02-04 19:29:51,244 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:124, output treesize:109 [2018-02-04 19:29:51,771 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 118 treesize of output 91 [2018-02-04 19:29:51,775 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,776 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,778 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,779 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,779 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,780 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,781 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,782 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,783 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,784 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,786 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,788 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,789 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,790 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,791 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,792 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,793 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,794 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,795 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,797 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,797 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,799 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,800 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,801 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,802 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,803 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,804 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,805 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,806 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,807 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,809 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,810 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,812 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,812 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,813 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,814 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,815 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,816 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,819 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,820 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,821 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,822 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,823 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,824 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,825 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,827 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,828 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,829 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,829 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,830 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,831 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,833 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,834 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,836 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,837 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,839 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,840 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,842 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,843 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,845 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,846 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,847 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,849 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,850 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,852 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,856 INFO L700 Elim1Store]: detected not equals via solver [2018-02-04 19:29:51,874 INFO L303 Elim1Store]: Index analysis took 102 ms [2018-02-04 19:29:51,950 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 12 select indices, 12 select index equivalence classes, 67 disjoint index pairs (out of 66 index pairs), introduced 0 new quantified variables, introduced 24 case distinctions, treesize of input 91 treesize of output 627 [2018-02-04 19:29:51,951 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 12 [2018-02-04 19:29:57,580 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 4096 xjuncts. Received shutdown request... [2018-02-04 19:31:53,683 INFO L175 TraceCheckSpWp]: Timeout while computing interpolants [2018-02-04 19:31:53,684 WARN L491 AbstractCegarLoop]: Verification canceled [2018-02-04 19:31:53,687 WARN L185 ceAbstractionStarter]: Timeout [2018-02-04 19:31:53,688 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 04.02 07:31:53 BoogieIcfgContainer [2018-02-04 19:31:53,688 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-02-04 19:31:53,688 INFO L168 Benchmark]: Toolchain (without parser) took 192110.41 ms. Allocated memory was 401.1 MB in the beginning and 604.0 MB in the end (delta: 202.9 MB). Free memory was 355.1 MB in the beginning and 473.3 MB in the end (delta: -118.1 MB). Peak memory consumption was 1.3 GB. Max. memory is 5.3 GB. [2018-02-04 19:31:53,689 INFO L168 Benchmark]: CDTParser took 4.70 ms. Allocated memory is still 401.1 MB. Free memory is still 361.7 MB. There was no memory consumed. Max. memory is 5.3 GB. [2018-02-04 19:31:53,689 INFO L168 Benchmark]: CACSL2BoogieTranslator took 169.65 ms. Allocated memory is still 401.1 MB. Free memory was 355.1 MB in the beginning and 340.6 MB in the end (delta: 14.5 MB). Peak memory consumption was 14.5 MB. Max. memory is 5.3 GB. [2018-02-04 19:31:53,690 INFO L168 Benchmark]: Boogie Preprocessor took 25.77 ms. Allocated memory is still 401.1 MB. Free memory was 340.6 MB in the beginning and 339.3 MB in the end (delta: 1.3 MB). Peak memory consumption was 1.3 MB. Max. memory is 5.3 GB. [2018-02-04 19:31:53,690 INFO L168 Benchmark]: RCFGBuilder took 335.03 ms. Allocated memory is still 401.1 MB. Free memory was 339.3 MB in the beginning and 302.1 MB in the end (delta: 37.1 MB). Peak memory consumption was 37.1 MB. Max. memory is 5.3 GB. [2018-02-04 19:31:53,690 INFO L168 Benchmark]: TraceAbstraction took 191576.71 ms. Allocated memory was 401.1 MB in the beginning and 604.0 MB in the end (delta: 202.9 MB). Free memory was 302.1 MB in the beginning and 473.3 MB in the end (delta: -171.1 MB). Peak memory consumption was 1.2 GB. Max. memory is 5.3 GB. [2018-02-04 19:31:53,691 INFO L344 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 4.70 ms. Allocated memory is still 401.1 MB. Free memory is still 361.7 MB. There was no memory consumed. Max. memory is 5.3 GB. * CACSL2BoogieTranslator took 169.65 ms. Allocated memory is still 401.1 MB. Free memory was 355.1 MB in the beginning and 340.6 MB in the end (delta: 14.5 MB). Peak memory consumption was 14.5 MB. Max. memory is 5.3 GB. * Boogie Preprocessor took 25.77 ms. Allocated memory is still 401.1 MB. Free memory was 340.6 MB in the beginning and 339.3 MB in the end (delta: 1.3 MB). Peak memory consumption was 1.3 MB. Max. memory is 5.3 GB. * RCFGBuilder took 335.03 ms. Allocated memory is still 401.1 MB. Free memory was 339.3 MB in the beginning and 302.1 MB in the end (delta: 37.1 MB). Peak memory consumption was 37.1 MB. Max. memory is 5.3 GB. * TraceAbstraction took 191576.71 ms. Allocated memory was 401.1 MB in the beginning and 604.0 MB in the end (delta: 202.9 MB). Free memory was 302.1 MB in the beginning and 473.3 MB in the end (delta: -171.1 MB). Peak memory consumption was 1.2 GB. Max. memory is 5.3 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1294). Cancelled while BasicCegarLoop was analyzing trace of length 140 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 4289. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1294). Cancelled while BasicCegarLoop was analyzing trace of length 140 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 4289. - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1411). Cancelled while BasicCegarLoop was analyzing trace of length 140 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 4289. - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1411). Cancelled while BasicCegarLoop was analyzing trace of length 140 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 4289. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1265). Cancelled while BasicCegarLoop was analyzing trace of length 140 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 4289. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1265). Cancelled while BasicCegarLoop was analyzing trace of length 140 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 4289. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1267). Cancelled while BasicCegarLoop was analyzing trace of length 140 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 4289. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1267). Cancelled while BasicCegarLoop was analyzing trace of length 140 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 4289. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1256). Cancelled while BasicCegarLoop was analyzing trace of length 140 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 4289. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1256). Cancelled while BasicCegarLoop was analyzing trace of length 140 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 4289. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1258). Cancelled while BasicCegarLoop was analyzing trace of length 140 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 4289. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1258). Cancelled while BasicCegarLoop was analyzing trace of length 140 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 4289. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1344). Cancelled while BasicCegarLoop was analyzing trace of length 140 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 4289. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1340). Cancelled while BasicCegarLoop was analyzing trace of length 140 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 4289. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1344). Cancelled while BasicCegarLoop was analyzing trace of length 140 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 4289. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1340). Cancelled while BasicCegarLoop was analyzing trace of length 140 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 4289. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1339). Cancelled while BasicCegarLoop was analyzing trace of length 140 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 4289. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1339). Cancelled while BasicCegarLoop was analyzing trace of length 140 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 4289. - TimeoutResultAtElement [Line: 1443]: Timeout (TraceAbstraction) Unable to prove that all allocated memory was freed (line 1443). Cancelled while BasicCegarLoop was analyzing trace of length 140 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 4289. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1099). Cancelled while BasicCegarLoop was analyzing trace of length 140 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 4289. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1100). Cancelled while BasicCegarLoop was analyzing trace of length 140 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 4289. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1100). Cancelled while BasicCegarLoop was analyzing trace of length 140 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 4289. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1099). Cancelled while BasicCegarLoop was analyzing trace of length 140 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 4289. - StatisticsResult: Ultimate Automizer benchmark data CFG has 21 procedures, 143 locations, 23 error locations. TIMEOUT Result, 191.5s OverallTime, 32 OverallIterations, 16 TraceHistogramMax, 9.4s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 3812 SDtfs, 1165 SDslu, 34006 SDs, 0 SdLazy, 16825 SolverSat, 337 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 5.3s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 1774 GetRequests, 1096 SyntacticMatches, 11 SemanticMatches, 667 ConstructedPredicates, 4 IntricatePredicates, 0 DeprecatedPredicates, 4335 ImplicationChecksByTransitivity, 7.6s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=165occurred in iteration=30, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.1s AutomataMinimizationTime, 31 MinimizatonAttempts, 59 StatesRemovedByMinimization, 11 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.0s SsaConstructionTime, 0.5s SatisfiabilityAnalysisTime, 6.4s InterpolantComputationTime, 3201 NumberOfCodeBlocks, 3157 NumberOfCodeBlocksAsserted, 46 NumberOfCheckSat, 3155 ConstructedInterpolants, 174 QuantifiedInterpolants, 666322 SizeOfPredicates, 113 NumberOfNonLiveVariables, 5731 ConjunctsInSsa, 543 ConjunctsInUnsatCore, 46 InterpolantComputations, 22 PerfectInterpolantSequences, 706/1588 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: Timeout Written .csv to /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memleaks_test22_2_true-valid-memsafety_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_SmtInterpol_NoArray.epf_AutomizerC.xml/Csv-Benchmark-0-2018-02-04_19-31-53-698.csv Written .csv to /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memleaks_test22_2_true-valid-memsafety_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_SmtInterpol_NoArray.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-0-2018-02-04_19-31-53-698.csv Completed graceful shutdown