java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/cade18-smtinterpol/svcomp-DerefFreeMemtrack-32bit-Automizer_z3.epf -i ../../../trunk/examples/svcomp/memsafety/test-0234_true-valid-memsafety.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-c17473d-m [2018-02-04 20:30:29,315 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-02-04 20:30:29,316 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-02-04 20:30:29,326 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-02-04 20:30:29,326 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-02-04 20:30:29,327 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-02-04 20:30:29,328 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-02-04 20:30:29,330 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-02-04 20:30:29,331 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-02-04 20:30:29,332 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-02-04 20:30:29,333 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-02-04 20:30:29,333 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-02-04 20:30:29,334 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-02-04 20:30:29,335 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-02-04 20:30:29,336 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-02-04 20:30:29,337 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-02-04 20:30:29,339 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-02-04 20:30:29,340 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-02-04 20:30:29,341 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-02-04 20:30:29,342 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-02-04 20:30:29,344 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-02-04 20:30:29,344 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-02-04 20:30:29,345 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-02-04 20:30:29,346 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-02-04 20:30:29,346 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-02-04 20:30:29,347 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-02-04 20:30:29,347 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-02-04 20:30:29,348 INFO L177 SettingsManager]: PEA to Boogie provides no preferences, ignoring... [2018-02-04 20:30:29,348 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-02-04 20:30:29,348 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-02-04 20:30:29,349 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-02-04 20:30:29,349 INFO L98 SettingsManager]: Beginning loading settings from /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/cade18-smtinterpol/svcomp-DerefFreeMemtrack-32bit-Automizer_z3.epf [2018-02-04 20:30:29,359 INFO L110 SettingsManager]: Loading preferences was successful [2018-02-04 20:30:29,360 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-02-04 20:30:29,361 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-02-04 20:30:29,361 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-02-04 20:30:29,361 INFO L133 SettingsManager]: * Use SBE=true [2018-02-04 20:30:29,361 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-02-04 20:30:29,361 INFO L133 SettingsManager]: * sizeof long=4 [2018-02-04 20:30:29,361 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-02-04 20:30:29,362 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-02-04 20:30:29,362 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-02-04 20:30:29,362 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-02-04 20:30:29,362 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-02-04 20:30:29,362 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-02-04 20:30:29,362 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-02-04 20:30:29,363 INFO L133 SettingsManager]: * sizeof long double=12 [2018-02-04 20:30:29,363 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-02-04 20:30:29,363 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-02-04 20:30:29,363 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-02-04 20:30:29,363 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-02-04 20:30:29,363 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-02-04 20:30:29,364 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-02-04 20:30:29,364 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=Craig_NestedInterpolation [2018-02-04 20:30:29,364 INFO L133 SettingsManager]: * SMT solver=External_Z3InterpolationMode [2018-02-04 20:30:29,364 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-02-04 20:30:29,394 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-02-04 20:30:29,404 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully initialized [2018-02-04 20:30:29,407 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-02-04 20:30:29,409 INFO L271 PluginConnector]: Initializing CDTParser... [2018-02-04 20:30:29,409 INFO L276 PluginConnector]: CDTParser initialized [2018-02-04 20:30:29,410 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/memsafety/test-0234_true-valid-memsafety.i [2018-02-04 20:30:29,573 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-02-04 20:30:29,574 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-02-04 20:30:29,575 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-02-04 20:30:29,575 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-02-04 20:30:29,581 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-02-04 20:30:29,581 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 04.02 08:30:29" (1/1) ... [2018-02-04 20:30:29,584 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@3dd6f628 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 08:30:29, skipping insertion in model container [2018-02-04 20:30:29,584 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 04.02 08:30:29" (1/1) ... [2018-02-04 20:30:29,599 INFO L153 Dispatcher]: Using SV-COMP mode [2018-02-04 20:30:29,634 INFO L153 Dispatcher]: Using SV-COMP mode [2018-02-04 20:30:29,728 INFO L450 PostProcessor]: Settings: Checked method=main [2018-02-04 20:30:29,773 INFO L450 PostProcessor]: Settings: Checked method=main [2018-02-04 20:30:29,780 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 08:30:29 WrapperNode [2018-02-04 20:30:29,780 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-02-04 20:30:29,781 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-02-04 20:30:29,781 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-02-04 20:30:29,781 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-02-04 20:30:29,791 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 08:30:29" (1/1) ... [2018-02-04 20:30:29,791 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 08:30:29" (1/1) ... [2018-02-04 20:30:29,798 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 08:30:29" (1/1) ... [2018-02-04 20:30:29,798 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 08:30:29" (1/1) ... [2018-02-04 20:30:29,805 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 08:30:29" (1/1) ... [2018-02-04 20:30:29,809 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 08:30:29" (1/1) ... [2018-02-04 20:30:29,810 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 08:30:29" (1/1) ... [2018-02-04 20:30:29,812 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-02-04 20:30:29,812 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-02-04 20:30:29,812 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-02-04 20:30:29,812 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-02-04 20:30:29,813 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 08:30:29" (1/1) ... No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-02-04 20:30:29,847 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-02-04 20:30:29,847 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-02-04 20:30:29,847 INFO L136 BoogieDeclarations]: Found implementation of procedure calloc_model [2018-02-04 20:30:29,847 INFO L136 BoogieDeclarations]: Found implementation of procedure zalloc_or_die [2018-02-04 20:30:29,848 INFO L136 BoogieDeclarations]: Found implementation of procedure l4_insert [2018-02-04 20:30:29,848 INFO L136 BoogieDeclarations]: Found implementation of procedure l3_insert [2018-02-04 20:30:29,848 INFO L136 BoogieDeclarations]: Found implementation of procedure l2_insert [2018-02-04 20:30:29,848 INFO L136 BoogieDeclarations]: Found implementation of procedure l1_insert [2018-02-04 20:30:29,848 INFO L136 BoogieDeclarations]: Found implementation of procedure l0_insert [2018-02-04 20:30:29,848 INFO L136 BoogieDeclarations]: Found implementation of procedure l4_destroy [2018-02-04 20:30:29,848 INFO L136 BoogieDeclarations]: Found implementation of procedure l3_destroy [2018-02-04 20:30:29,848 INFO L136 BoogieDeclarations]: Found implementation of procedure l2_destroy [2018-02-04 20:30:29,848 INFO L136 BoogieDeclarations]: Found implementation of procedure l1_destroy [2018-02-04 20:30:29,848 INFO L136 BoogieDeclarations]: Found implementation of procedure l0_destroy [2018-02-04 20:30:29,848 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-02-04 20:30:29,848 INFO L128 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2018-02-04 20:30:29,849 INFO L128 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2018-02-04 20:30:29,849 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.free [2018-02-04 20:30:29,849 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-02-04 20:30:29,849 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-02-04 20:30:29,849 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2018-02-04 20:30:29,849 INFO L136 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2018-02-04 20:30:29,849 INFO L128 BoogieDeclarations]: Found specification of procedure malloc [2018-02-04 20:30:29,849 INFO L128 BoogieDeclarations]: Found specification of procedure free [2018-02-04 20:30:29,849 INFO L128 BoogieDeclarations]: Found specification of procedure abort [2018-02-04 20:30:29,849 INFO L128 BoogieDeclarations]: Found specification of procedure memset [2018-02-04 20:30:29,849 INFO L128 BoogieDeclarations]: Found specification of procedure calloc_model [2018-02-04 20:30:29,849 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2018-02-04 20:30:29,849 INFO L128 BoogieDeclarations]: Found specification of procedure zalloc_or_die [2018-02-04 20:30:29,849 INFO L128 BoogieDeclarations]: Found specification of procedure l4_insert [2018-02-04 20:30:29,849 INFO L128 BoogieDeclarations]: Found specification of procedure l3_insert [2018-02-04 20:30:29,850 INFO L128 BoogieDeclarations]: Found specification of procedure l2_insert [2018-02-04 20:30:29,850 INFO L128 BoogieDeclarations]: Found specification of procedure l1_insert [2018-02-04 20:30:29,850 INFO L128 BoogieDeclarations]: Found specification of procedure l0_insert [2018-02-04 20:30:29,850 INFO L128 BoogieDeclarations]: Found specification of procedure l4_destroy [2018-02-04 20:30:29,850 INFO L128 BoogieDeclarations]: Found specification of procedure l3_destroy [2018-02-04 20:30:29,850 INFO L128 BoogieDeclarations]: Found specification of procedure l2_destroy [2018-02-04 20:30:29,850 INFO L128 BoogieDeclarations]: Found specification of procedure l1_destroy [2018-02-04 20:30:29,850 INFO L128 BoogieDeclarations]: Found specification of procedure l0_destroy [2018-02-04 20:30:29,850 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-02-04 20:30:29,850 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-02-04 20:30:29,850 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-02-04 20:30:30,114 WARN L455 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-02-04 20:30:30,309 INFO L257 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-02-04 20:30:30,310 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 04.02 08:30:30 BoogieIcfgContainer [2018-02-04 20:30:30,310 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-02-04 20:30:30,310 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-02-04 20:30:30,310 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-02-04 20:30:30,312 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-02-04 20:30:30,312 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 04.02 08:30:29" (1/3) ... [2018-02-04 20:30:30,313 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@75bc25de and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 04.02 08:30:30, skipping insertion in model container [2018-02-04 20:30:30,313 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 04.02 08:30:29" (2/3) ... [2018-02-04 20:30:30,313 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@75bc25de and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 04.02 08:30:30, skipping insertion in model container [2018-02-04 20:30:30,313 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 04.02 08:30:30" (3/3) ... [2018-02-04 20:30:30,314 INFO L107 eAbstractionObserver]: Analyzing ICFG test-0234_true-valid-memsafety.i [2018-02-04 20:30:30,319 INFO L128 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:Craig_NestedInterpolation Determinization: PREDICATE_ABSTRACTION [2018-02-04 20:30:30,324 INFO L140 ceAbstractionStarter]: Appying trace abstraction to program that has 71 error locations. [2018-02-04 20:30:30,346 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-02-04 20:30:30,346 INFO L323 AbstractCegarLoop]: Hoare is false [2018-02-04 20:30:30,346 INFO L324 AbstractCegarLoop]: Compute interpolants for Craig_NestedInterpolation [2018-02-04 20:30:30,346 INFO L325 AbstractCegarLoop]: Backedges is CANONICAL [2018-02-04 20:30:30,347 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-02-04 20:30:30,347 INFO L327 AbstractCegarLoop]: Difference is false [2018-02-04 20:30:30,347 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-02-04 20:30:30,347 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-02-04 20:30:30,348 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-02-04 20:30:30,359 INFO L276 IsEmpty]: Start isEmpty. Operand 231 states. [2018-02-04 20:30:30,365 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 5 [2018-02-04 20:30:30,365 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 20:30:30,366 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1] [2018-02-04 20:30:30,366 INFO L371 AbstractCegarLoop]: === Iteration 1 === [l3_destroyErr0RequiresViolation, l3_destroyErr3RequiresViolation, l3_destroyErr1RequiresViolation, l3_destroyErr2RequiresViolation, l3_destroyErr4RequiresViolation, l3_destroyErr5RequiresViolation, l0_insertErr3RequiresViolation, l0_insertErr1RequiresViolation, l0_insertErr5RequiresViolation, l0_insertErr2RequiresViolation, l0_insertErr4RequiresViolation, l0_insertErr0RequiresViolation, l4_destroyErr4RequiresViolation, l4_destroyErr6RequiresViolation, l4_destroyErr2RequiresViolation, l4_destroyErr3RequiresViolation, l4_destroyErr1RequiresViolation, l4_destroyErr7RequiresViolation, l4_destroyErr0RequiresViolation, l4_destroyErr5RequiresViolation, l2_insertErr3RequiresViolation, l2_insertErr5RequiresViolation, l2_insertErr0RequiresViolation, l2_insertErr1RequiresViolation, l2_insertErr4RequiresViolation, l2_insertErr2RequiresViolation, mainErr1RequiresViolation, mainErr2EnsuresViolation, mainErr0RequiresViolation, l3_insertErr4RequiresViolation, l3_insertErr0RequiresViolation, l3_insertErr5RequiresViolation, l3_insertErr3RequiresViolation, l3_insertErr1RequiresViolation, l3_insertErr2RequiresViolation, l1_insertErr4RequiresViolation, l1_insertErr0RequiresViolation, l1_insertErr2RequiresViolation, l1_insertErr3RequiresViolation, l1_insertErr1RequiresViolation, l1_insertErr5RequiresViolation, l0_destroyErr5RequiresViolation, l0_destroyErr3RequiresViolation, l0_destroyErr1RequiresViolation, l0_destroyErr0RequiresViolation, l0_destroyErr4RequiresViolation, l0_destroyErr2RequiresViolation, calloc_modelErr0RequiresViolation, calloc_modelErr1RequiresViolation, l4_insertErr5RequiresViolation, l4_insertErr3RequiresViolation, l4_insertErr4RequiresViolation, l4_insertErr6RequiresViolation, l4_insertErr2RequiresViolation, l4_insertErr0RequiresViolation, l4_insertErr1RequiresViolation, l4_insertErr7RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr0RequiresViolation, l1_destroyErr2RequiresViolation, l1_destroyErr4RequiresViolation, l1_destroyErr0RequiresViolation, l1_destroyErr1RequiresViolation, l1_destroyErr5RequiresViolation, l1_destroyErr3RequiresViolation, l2_destroyErr1RequiresViolation, l2_destroyErr0RequiresViolation, l2_destroyErr2RequiresViolation, l2_destroyErr4RequiresViolation, l2_destroyErr5RequiresViolation, l2_destroyErr3RequiresViolation]=== [2018-02-04 20:30:30,369 INFO L82 PathProgramCache]: Analyzing trace with hash 12092192, now seen corresponding path program 1 times No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-02-04 20:30:30,377 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 20:30:30,391 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:30,410 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 20:30:30,434 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 20:30:30,434 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-02-04 20:30:30,435 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 20:30:30,435 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 20:30:30,435 INFO L182 omatonBuilderFactory]: Interpolants [234#true, 235#false, 236#(= 1 (select |#valid| |~#list~0.base|))] [2018-02-04 20:30:30,436 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 20:30:30,436 INFO L409 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-02-04 20:30:30,444 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-02-04 20:30:30,445 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-02-04 20:30:30,446 INFO L87 Difference]: Start difference. First operand 231 states. Second operand 3 states. [2018-02-04 20:30:30,617 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 20:30:30,617 INFO L93 Difference]: Finished difference Result 260 states and 279 transitions. [2018-02-04 20:30:30,619 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-02-04 20:30:30,619 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 4 [2018-02-04 20:30:30,620 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 20:30:30,640 INFO L225 Difference]: With dead ends: 260 [2018-02-04 20:30:30,641 INFO L226 Difference]: Without dead ends: 257 [2018-02-04 20:30:30,642 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-02-04 20:30:30,654 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 257 states. [2018-02-04 20:30:30,740 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 257 to 226. [2018-02-04 20:30:30,741 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 226 states. [2018-02-04 20:30:30,744 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 226 states to 226 states and 241 transitions. [2018-02-04 20:30:30,744 INFO L78 Accepts]: Start accepts. Automaton has 226 states and 241 transitions. Word has length 4 [2018-02-04 20:30:30,745 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 20:30:30,745 INFO L432 AbstractCegarLoop]: Abstraction has 226 states and 241 transitions. [2018-02-04 20:30:30,745 INFO L433 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-02-04 20:30:30,745 INFO L276 IsEmpty]: Start isEmpty. Operand 226 states and 241 transitions. [2018-02-04 20:30:30,745 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 5 [2018-02-04 20:30:30,746 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 20:30:30,746 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1] [2018-02-04 20:30:30,746 INFO L371 AbstractCegarLoop]: === Iteration 2 === [l3_destroyErr0RequiresViolation, l3_destroyErr3RequiresViolation, l3_destroyErr1RequiresViolation, l3_destroyErr2RequiresViolation, l3_destroyErr4RequiresViolation, l3_destroyErr5RequiresViolation, l0_insertErr3RequiresViolation, l0_insertErr1RequiresViolation, l0_insertErr5RequiresViolation, l0_insertErr2RequiresViolation, l0_insertErr4RequiresViolation, l0_insertErr0RequiresViolation, l4_destroyErr4RequiresViolation, l4_destroyErr6RequiresViolation, l4_destroyErr2RequiresViolation, l4_destroyErr3RequiresViolation, l4_destroyErr1RequiresViolation, l4_destroyErr7RequiresViolation, l4_destroyErr0RequiresViolation, l4_destroyErr5RequiresViolation, l2_insertErr3RequiresViolation, l2_insertErr5RequiresViolation, l2_insertErr0RequiresViolation, l2_insertErr1RequiresViolation, l2_insertErr4RequiresViolation, l2_insertErr2RequiresViolation, mainErr1RequiresViolation, mainErr2EnsuresViolation, mainErr0RequiresViolation, l3_insertErr4RequiresViolation, l3_insertErr0RequiresViolation, l3_insertErr5RequiresViolation, l3_insertErr3RequiresViolation, l3_insertErr1RequiresViolation, l3_insertErr2RequiresViolation, l1_insertErr4RequiresViolation, l1_insertErr0RequiresViolation, l1_insertErr2RequiresViolation, l1_insertErr3RequiresViolation, l1_insertErr1RequiresViolation, l1_insertErr5RequiresViolation, l0_destroyErr5RequiresViolation, l0_destroyErr3RequiresViolation, l0_destroyErr1RequiresViolation, l0_destroyErr0RequiresViolation, l0_destroyErr4RequiresViolation, l0_destroyErr2RequiresViolation, calloc_modelErr0RequiresViolation, calloc_modelErr1RequiresViolation, l4_insertErr5RequiresViolation, l4_insertErr3RequiresViolation, l4_insertErr4RequiresViolation, l4_insertErr6RequiresViolation, l4_insertErr2RequiresViolation, l4_insertErr0RequiresViolation, l4_insertErr1RequiresViolation, l4_insertErr7RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr0RequiresViolation, l1_destroyErr2RequiresViolation, l1_destroyErr4RequiresViolation, l1_destroyErr0RequiresViolation, l1_destroyErr1RequiresViolation, l1_destroyErr5RequiresViolation, l1_destroyErr3RequiresViolation, l2_destroyErr1RequiresViolation, l2_destroyErr0RequiresViolation, l2_destroyErr2RequiresViolation, l2_destroyErr4RequiresViolation, l2_destroyErr5RequiresViolation, l2_destroyErr3RequiresViolation]=== [2018-02-04 20:30:30,747 INFO L82 PathProgramCache]: Analyzing trace with hash 12092193, now seen corresponding path program 1 times No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 3 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-02-04 20:30:30,750 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 20:30:30,756 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:30,759 WARN L195 Executor]: ExternalInterpolator (z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in) stderr output: WARNING: array quantifier [2018-02-04 20:30:30,764 WARN L251 NnfTransformerHelper]: thrown away annotations [(:qid itp)] [2018-02-04 20:30:30,764 WARN L251 NnfTransformerHelper]: thrown away annotations [(:qid itp)] [2018-02-04 20:30:30,765 WARN L251 NnfTransformerHelper]: thrown away annotations [(:qid itp)] [2018-02-04 20:30:30,765 WARN L251 NnfTransformerHelper]: thrown away annotations [(:qid itp)] [2018-02-04 20:30:30,791 WARN L1033 $PredicateComparison]: unable to prove that (exists ((%0 (Array Int Int))) (! (forall ((%1 Int)) (! (= (store %0 %1 4) (store |c_#length| %1 4)) :qid itp)) :qid itp)) is different from true [2018-02-04 20:30:30,810 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 20:30:30,835 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 20:30:30,835 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-02-04 20:30:30,835 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 20:30:30,835 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 20:30:30,835 INFO L182 omatonBuilderFactory]: Interpolants [723#true, 724#false, 725#(exists ((%0 (Array Int Int))) (! (forall ((%1 Int)) (! (= (store %0 %1 4) (store |#length| %1 4)) :qid itp)) :qid itp)), 726#(and (<= (+ |~#list~0.offset| 4) (select |#length| |~#list~0.base|)) (= 4 (select |#length| |~#list~0.base|)) (<= 0 |~#list~0.offset|))] [2018-02-04 20:30:30,835 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 20:30:30,836 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-02-04 20:30:30,837 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-02-04 20:30:30,837 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=4, Unknown=1, NotChecked=2, Total=12 [2018-02-04 20:30:30,837 INFO L87 Difference]: Start difference. First operand 226 states and 241 transitions. Second operand 4 states. [2018-02-04 20:30:30,932 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 20:30:30,933 INFO L93 Difference]: Finished difference Result 233 states and 251 transitions. [2018-02-04 20:30:30,933 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-02-04 20:30:30,933 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 4 [2018-02-04 20:30:30,933 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 20:30:30,935 INFO L225 Difference]: With dead ends: 233 [2018-02-04 20:30:30,935 INFO L226 Difference]: Without dead ends: 233 [2018-02-04 20:30:30,936 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=4, Unknown=1, NotChecked=2, Total=12 [2018-02-04 20:30:30,936 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 233 states. [2018-02-04 20:30:30,944 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 233 to 225. [2018-02-04 20:30:30,945 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 225 states. [2018-02-04 20:30:30,946 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 225 states to 225 states and 240 transitions. [2018-02-04 20:30:30,946 INFO L78 Accepts]: Start accepts. Automaton has 225 states and 240 transitions. Word has length 4 [2018-02-04 20:30:30,947 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 20:30:30,947 INFO L432 AbstractCegarLoop]: Abstraction has 225 states and 240 transitions. [2018-02-04 20:30:30,947 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-02-04 20:30:30,947 INFO L276 IsEmpty]: Start isEmpty. Operand 225 states and 240 transitions. [2018-02-04 20:30:30,947 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-02-04 20:30:30,947 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 20:30:30,948 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 20:30:30,948 INFO L371 AbstractCegarLoop]: === Iteration 3 === [l3_destroyErr0RequiresViolation, l3_destroyErr3RequiresViolation, l3_destroyErr1RequiresViolation, l3_destroyErr2RequiresViolation, l3_destroyErr4RequiresViolation, l3_destroyErr5RequiresViolation, l0_insertErr3RequiresViolation, l0_insertErr1RequiresViolation, l0_insertErr5RequiresViolation, l0_insertErr2RequiresViolation, l0_insertErr4RequiresViolation, l0_insertErr0RequiresViolation, l4_destroyErr4RequiresViolation, l4_destroyErr6RequiresViolation, l4_destroyErr2RequiresViolation, l4_destroyErr3RequiresViolation, l4_destroyErr1RequiresViolation, l4_destroyErr7RequiresViolation, l4_destroyErr0RequiresViolation, l4_destroyErr5RequiresViolation, l2_insertErr3RequiresViolation, l2_insertErr5RequiresViolation, l2_insertErr0RequiresViolation, l2_insertErr1RequiresViolation, l2_insertErr4RequiresViolation, l2_insertErr2RequiresViolation, mainErr1RequiresViolation, mainErr2EnsuresViolation, mainErr0RequiresViolation, l3_insertErr4RequiresViolation, l3_insertErr0RequiresViolation, l3_insertErr5RequiresViolation, l3_insertErr3RequiresViolation, l3_insertErr1RequiresViolation, l3_insertErr2RequiresViolation, l1_insertErr4RequiresViolation, l1_insertErr0RequiresViolation, l1_insertErr2RequiresViolation, l1_insertErr3RequiresViolation, l1_insertErr1RequiresViolation, l1_insertErr5RequiresViolation, l0_destroyErr5RequiresViolation, l0_destroyErr3RequiresViolation, l0_destroyErr1RequiresViolation, l0_destroyErr0RequiresViolation, l0_destroyErr4RequiresViolation, l0_destroyErr2RequiresViolation, calloc_modelErr0RequiresViolation, calloc_modelErr1RequiresViolation, l4_insertErr5RequiresViolation, l4_insertErr3RequiresViolation, l4_insertErr4RequiresViolation, l4_insertErr6RequiresViolation, l4_insertErr2RequiresViolation, l4_insertErr0RequiresViolation, l4_insertErr1RequiresViolation, l4_insertErr7RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr0RequiresViolation, l1_destroyErr2RequiresViolation, l1_destroyErr4RequiresViolation, l1_destroyErr0RequiresViolation, l1_destroyErr1RequiresViolation, l1_destroyErr5RequiresViolation, l1_destroyErr3RequiresViolation, l2_destroyErr1RequiresViolation, l2_destroyErr0RequiresViolation, l2_destroyErr2RequiresViolation, l2_destroyErr4RequiresViolation, l2_destroyErr5RequiresViolation, l2_destroyErr3RequiresViolation]=== [2018-02-04 20:30:30,948 INFO L82 PathProgramCache]: Analyzing trace with hash 1806231127, now seen corresponding path program 1 times No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-02-04 20:30:30,953 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 20:30:30,965 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:30,968 WARN L195 Executor]: ExternalInterpolator (z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in) stderr output: WARNING: array quantifier [2018-02-04 20:30:30,970 WARN L251 NnfTransformerHelper]: thrown away annotations [(:qid itp)] [2018-02-04 20:30:30,970 WARN L251 NnfTransformerHelper]: thrown away annotations [(:qid itp)] [2018-02-04 20:30:30,970 WARN L251 NnfTransformerHelper]: thrown away annotations [(:qid itp)] [2018-02-04 20:30:30,971 WARN L251 NnfTransformerHelper]: thrown away annotations [(:qid itp)] [2018-02-04 20:30:30,976 WARN L1033 $PredicateComparison]: unable to prove that (exists ((%0 (Array Int Int))) (! (forall ((%1 Int)) (! (= (store |c_#valid| %1 1) (store %0 %1 1)) :qid itp)) :qid itp)) is different from true [2018-02-04 20:30:31,005 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:31,008 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 20:30:31,034 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 20:30:31,034 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-02-04 20:30:31,034 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 20:30:31,034 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 20:30:31,035 INFO L182 omatonBuilderFactory]: Interpolants [1185#true, 1186#false, 1192#(exists ((%0 (Array Int Int))) (! (forall ((%1 Int)) (! (= (store |#valid| %1 1) (store %0 %1 1)) :qid itp)) :qid itp)), 1193#(= 1 (select |#valid| |calloc_model_#t~malloc0.base|)), 1194#(= 1 (select |#valid| calloc_model_~ptr~0.base)), 1195#(and (= |~#list~0.base| |old(~#list~0.base)|) (= |#valid| |old(#valid)|) (= |~#list~0.offset| |old(~#list~0.offset)|) (= |#NULL.base| |old(#NULL.base)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |old(#length)| |#length|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))] [2018-02-04 20:30:31,035 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 20:30:31,035 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-02-04 20:30:31,035 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-02-04 20:30:31,035 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=14, Unknown=1, NotChecked=6, Total=30 [2018-02-04 20:30:31,036 INFO L87 Difference]: Start difference. First operand 225 states and 240 transitions. Second operand 6 states. [2018-02-04 20:30:31,493 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 20:30:31,493 INFO L93 Difference]: Finished difference Result 256 states and 277 transitions. [2018-02-04 20:30:31,496 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-02-04 20:30:31,496 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 17 [2018-02-04 20:30:31,496 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 20:30:31,498 INFO L225 Difference]: With dead ends: 256 [2018-02-04 20:30:31,498 INFO L226 Difference]: Without dead ends: 256 [2018-02-04 20:30:31,498 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=16, Invalid=27, Unknown=3, NotChecked=10, Total=56 [2018-02-04 20:30:31,499 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 256 states. [2018-02-04 20:30:31,517 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 256 to 224. [2018-02-04 20:30:31,517 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 224 states. [2018-02-04 20:30:31,519 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 224 states to 224 states and 239 transitions. [2018-02-04 20:30:31,519 INFO L78 Accepts]: Start accepts. Automaton has 224 states and 239 transitions. Word has length 17 [2018-02-04 20:30:31,519 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 20:30:31,519 INFO L432 AbstractCegarLoop]: Abstraction has 224 states and 239 transitions. [2018-02-04 20:30:31,519 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-02-04 20:30:31,519 INFO L276 IsEmpty]: Start isEmpty. Operand 224 states and 239 transitions. [2018-02-04 20:30:31,520 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-02-04 20:30:31,520 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 20:30:31,520 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 20:30:31,520 INFO L371 AbstractCegarLoop]: === Iteration 4 === [l3_destroyErr0RequiresViolation, l3_destroyErr3RequiresViolation, l3_destroyErr1RequiresViolation, l3_destroyErr2RequiresViolation, l3_destroyErr4RequiresViolation, l3_destroyErr5RequiresViolation, l0_insertErr3RequiresViolation, l0_insertErr1RequiresViolation, l0_insertErr5RequiresViolation, l0_insertErr2RequiresViolation, l0_insertErr4RequiresViolation, l0_insertErr0RequiresViolation, l4_destroyErr4RequiresViolation, l4_destroyErr6RequiresViolation, l4_destroyErr2RequiresViolation, l4_destroyErr3RequiresViolation, l4_destroyErr1RequiresViolation, l4_destroyErr7RequiresViolation, l4_destroyErr0RequiresViolation, l4_destroyErr5RequiresViolation, l2_insertErr3RequiresViolation, l2_insertErr5RequiresViolation, l2_insertErr0RequiresViolation, l2_insertErr1RequiresViolation, l2_insertErr4RequiresViolation, l2_insertErr2RequiresViolation, mainErr1RequiresViolation, mainErr2EnsuresViolation, mainErr0RequiresViolation, l3_insertErr4RequiresViolation, l3_insertErr0RequiresViolation, l3_insertErr5RequiresViolation, l3_insertErr3RequiresViolation, l3_insertErr1RequiresViolation, l3_insertErr2RequiresViolation, l1_insertErr4RequiresViolation, l1_insertErr0RequiresViolation, l1_insertErr2RequiresViolation, l1_insertErr3RequiresViolation, l1_insertErr1RequiresViolation, l1_insertErr5RequiresViolation, l0_destroyErr5RequiresViolation, l0_destroyErr3RequiresViolation, l0_destroyErr1RequiresViolation, l0_destroyErr0RequiresViolation, l0_destroyErr4RequiresViolation, l0_destroyErr2RequiresViolation, calloc_modelErr0RequiresViolation, calloc_modelErr1RequiresViolation, l4_insertErr5RequiresViolation, l4_insertErr3RequiresViolation, l4_insertErr4RequiresViolation, l4_insertErr6RequiresViolation, l4_insertErr2RequiresViolation, l4_insertErr0RequiresViolation, l4_insertErr1RequiresViolation, l4_insertErr7RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr0RequiresViolation, l1_destroyErr2RequiresViolation, l1_destroyErr4RequiresViolation, l1_destroyErr0RequiresViolation, l1_destroyErr1RequiresViolation, l1_destroyErr5RequiresViolation, l1_destroyErr3RequiresViolation, l2_destroyErr1RequiresViolation, l2_destroyErr0RequiresViolation, l2_destroyErr2RequiresViolation, l2_destroyErr4RequiresViolation, l2_destroyErr5RequiresViolation, l2_destroyErr3RequiresViolation]=== [2018-02-04 20:30:31,520 INFO L82 PathProgramCache]: Analyzing trace with hash 1806231128, now seen corresponding path program 1 times No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 5 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-02-04 20:30:31,528 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 20:30:31,544 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:31,555 WARN L195 Executor]: ExternalInterpolator (z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in) stderr output: WARNING: array quantifier WARNING: array quantifier [2018-02-04 20:30:31,574 WARN L251 NnfTransformerHelper]: thrown away annotations [(:qid itp)] [2018-02-04 20:30:31,574 WARN L251 NnfTransformerHelper]: thrown away annotations [(:qid itp)] [2018-02-04 20:30:31,574 WARN L251 NnfTransformerHelper]: thrown away annotations [(:qid itp)] [2018-02-04 20:30:31,575 WARN L251 NnfTransformerHelper]: thrown away annotations [(:qid itp)] [2018-02-04 20:30:31,586 WARN L251 NnfTransformerHelper]: thrown away annotations [(:qid itp)] [2018-02-04 20:30:31,586 WARN L251 NnfTransformerHelper]: thrown away annotations [(:qid itp)] [2018-02-04 20:30:31,586 WARN L251 NnfTransformerHelper]: thrown away annotations [(:qid itp)] [2018-02-04 20:30:31,586 WARN L251 NnfTransformerHelper]: thrown away annotations [(:qid itp)] [2018-02-04 20:30:31,760 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:31,763 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 20:30:31,780 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 20:30:31,781 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-02-04 20:30:31,781 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 20:30:31,781 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 20:30:31,781 INFO L182 omatonBuilderFactory]: Interpolants [1680#true, 1681#false, 1687#(= |zalloc_or_die_#in~size| 8), 1688#(= 8 zalloc_or_die_~size), 1689#(exists ((%0 (Array Int Int))) (! (and (= |calloc_model_#in~size| 8) (= |calloc_model_#in~nmemb| 1) (forall ((%1 Int)) (! (= (store %0 %1 8) (store |#length| %1 8)) :qid itp))) :qid itp)), 1690#(exists ((%0 (Array Int Int))) (! (and (= (ite (<= (mod (* (mod calloc_model_~nmemb 4294967296) (mod calloc_model_~size 4294967296)) 4294967296) 2147483647) (mod (* (mod calloc_model_~nmemb 4294967296) (mod calloc_model_~size 4294967296)) 4294967296) (+ (- 4294967296) (mod (* (mod calloc_model_~nmemb 4294967296) (mod calloc_model_~size 4294967296)) 4294967296))) 8) (forall ((%1 Int)) (! (= (store %0 %1 8) (store |#length| %1 8)) :qid itp))) :qid itp)), 1691#(and (= 8 (mod (* (mod calloc_model_~nmemb 4294967296) (mod calloc_model_~size 4294967296)) 4294967296)) (= 8 (select |#length| |calloc_model_#t~malloc0.base|)) (= 0 |calloc_model_#t~malloc0.offset|)), 1692#(and (<= 0 calloc_model_~ptr~0.offset) (or (and (< 2147483647 (mod (* (mod calloc_model_~nmemb 4294967296) (mod calloc_model_~size 4294967296)) 4294967296)) (<= (+ (mod (* (mod calloc_model_~nmemb 4294967296) (mod calloc_model_~size 4294967296)) 4294967296) calloc_model_~ptr~0.offset) (+ (select |#length| calloc_model_~ptr~0.base) 4294967296))) (<= (+ (mod (* (mod calloc_model_~nmemb 4294967296) (mod calloc_model_~size 4294967296)) 4294967296) calloc_model_~ptr~0.offset) (select |#length| calloc_model_~ptr~0.base)))), 1693#(and (= |~#list~0.base| |old(~#list~0.base)|) (= |#valid| |old(#valid)|) (= |~#list~0.offset| |old(~#list~0.offset)|) (= |#NULL.base| |old(#NULL.base)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |old(#length)| |#length|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))] [2018-02-04 20:30:31,781 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-02-04 20:30:31,781 INFO L409 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-02-04 20:30:31,782 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-02-04 20:30:31,782 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=56, Unknown=1, NotChecked=0, Total=72 [2018-02-04 20:30:31,782 INFO L87 Difference]: Start difference. First operand 224 states and 239 transitions. Second operand 9 states. [2018-02-04 20:30:32,419 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 20:30:32,420 INFO L93 Difference]: Finished difference Result 269 states and 291 transitions. [2018-02-04 20:30:32,420 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-02-04 20:30:32,420 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 17 [2018-02-04 20:30:32,420 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 20:30:32,421 INFO L225 Difference]: With dead ends: 269 [2018-02-04 20:30:32,421 INFO L226 Difference]: Without dead ends: 269 [2018-02-04 20:30:32,421 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=38, Invalid=136, Unknown=8, NotChecked=0, Total=182 [2018-02-04 20:30:32,422 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 269 states. [2018-02-04 20:30:32,428 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 269 to 237. [2018-02-04 20:30:32,429 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 237 states. [2018-02-04 20:30:32,429 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 237 states to 237 states and 252 transitions. [2018-02-04 20:30:32,429 INFO L78 Accepts]: Start accepts. Automaton has 237 states and 252 transitions. Word has length 17 [2018-02-04 20:30:32,430 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 20:30:32,430 INFO L432 AbstractCegarLoop]: Abstraction has 237 states and 252 transitions. [2018-02-04 20:30:32,430 INFO L433 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-02-04 20:30:32,430 INFO L276 IsEmpty]: Start isEmpty. Operand 237 states and 252 transitions. [2018-02-04 20:30:32,432 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 130 [2018-02-04 20:30:32,432 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 20:30:32,432 INFO L351 BasicCegarLoop]: trace histogram [6, 6, 6, 6, 6, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 20:30:32,432 INFO L371 AbstractCegarLoop]: === Iteration 5 === [l3_destroyErr0RequiresViolation, l3_destroyErr3RequiresViolation, l3_destroyErr1RequiresViolation, l3_destroyErr2RequiresViolation, l3_destroyErr4RequiresViolation, l3_destroyErr5RequiresViolation, l0_insertErr3RequiresViolation, l0_insertErr1RequiresViolation, l0_insertErr5RequiresViolation, l0_insertErr2RequiresViolation, l0_insertErr4RequiresViolation, l0_insertErr0RequiresViolation, l4_destroyErr4RequiresViolation, l4_destroyErr6RequiresViolation, l4_destroyErr2RequiresViolation, l4_destroyErr3RequiresViolation, l4_destroyErr1RequiresViolation, l4_destroyErr7RequiresViolation, l4_destroyErr0RequiresViolation, l4_destroyErr5RequiresViolation, l2_insertErr3RequiresViolation, l2_insertErr5RequiresViolation, l2_insertErr0RequiresViolation, l2_insertErr1RequiresViolation, l2_insertErr4RequiresViolation, l2_insertErr2RequiresViolation, mainErr1RequiresViolation, mainErr2EnsuresViolation, mainErr0RequiresViolation, l3_insertErr4RequiresViolation, l3_insertErr0RequiresViolation, l3_insertErr5RequiresViolation, l3_insertErr3RequiresViolation, l3_insertErr1RequiresViolation, l3_insertErr2RequiresViolation, l1_insertErr4RequiresViolation, l1_insertErr0RequiresViolation, l1_insertErr2RequiresViolation, l1_insertErr3RequiresViolation, l1_insertErr1RequiresViolation, l1_insertErr5RequiresViolation, l0_destroyErr5RequiresViolation, l0_destroyErr3RequiresViolation, l0_destroyErr1RequiresViolation, l0_destroyErr0RequiresViolation, l0_destroyErr4RequiresViolation, l0_destroyErr2RequiresViolation, calloc_modelErr0RequiresViolation, calloc_modelErr1RequiresViolation, l4_insertErr5RequiresViolation, l4_insertErr3RequiresViolation, l4_insertErr4RequiresViolation, l4_insertErr6RequiresViolation, l4_insertErr2RequiresViolation, l4_insertErr0RequiresViolation, l4_insertErr1RequiresViolation, l4_insertErr7RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr0RequiresViolation, l1_destroyErr2RequiresViolation, l1_destroyErr4RequiresViolation, l1_destroyErr0RequiresViolation, l1_destroyErr1RequiresViolation, l1_destroyErr5RequiresViolation, l1_destroyErr3RequiresViolation, l2_destroyErr1RequiresViolation, l2_destroyErr0RequiresViolation, l2_destroyErr2RequiresViolation, l2_destroyErr4RequiresViolation, l2_destroyErr5RequiresViolation, l2_destroyErr3RequiresViolation]=== [2018-02-04 20:30:32,432 INFO L82 PathProgramCache]: Analyzing trace with hash 840885617, now seen corresponding path program 1 times No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-02-04 20:30:32,436 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 20:30:32,496 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:32,514 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:32,522 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:32,528 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:32,536 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:32,543 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:32,547 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:32,551 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:32,556 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:32,567 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:32,571 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:32,580 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:32,585 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:32,588 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:32,594 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:32,606 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:32,830 WARN L146 SmtUtils]: Spent 210ms on a formula simplification. DAG size of input: 40 DAG size of output 22 [2018-02-04 20:30:32,843 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:32,867 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 86 proven. 0 refuted. 0 times theorem prover too weak. 124 trivial. 0 not checked. [2018-02-04 20:30:32,883 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 20:30:32,883 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2018-02-04 20:30:32,883 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 20:30:32,884 INFO L134 CoverageAnalysis]: Checked inductivity of 180 backedges. 56 proven. 0 refuted. 0 times theorem prover too weak. 124 trivial. 0 not checked. [2018-02-04 20:30:32,884 INFO L182 omatonBuilderFactory]: Interpolants [2400#(<= |#Ultimate.C_memset_#amount| 0), 2210#true, 2211#false, 2307#(and (= |~#list~0.base| |old(~#list~0.base)|) (= |#valid| |old(#valid)|) (= |~#list~0.offset| |old(~#list~0.offset)|) (= |#NULL.base| |old(#NULL.base)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |old(#length)| |#length|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)), 2308#(and (= |#valid| |old(#valid)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |old(#length)| |#length|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)), 2326#(and (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)), 2391#(not (= 8 |zalloc_or_die_#in~size|)), 2392#(and (= (mod (* (mod |calloc_model_#in~size| 4294967296) (mod calloc_model_~nmemb 4294967296)) 4294967296) (mod (* (mod calloc_model_~nmemb 4294967296) (mod calloc_model_~size 4294967296)) 4294967296)) (or (and (not (= calloc_model_~nmemb 1)) (not (= |calloc_model_#in~nmemb| 1))) (and (= |calloc_model_#in~nmemb| 1) (= calloc_model_~nmemb 1)))), 2378#(= zalloc_or_die_~size |zalloc_or_die_#in~size|), 2398#(or (not (= |calloc_model_#in~nmemb| 1)) (not (= (mod |calloc_model_#in~size| 4294967296) 8))), 2399#(= 0 |#Ultimate.C_memset_#t~loopctr42|)] [2018-02-04 20:30:32,884 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 86 proven. 0 refuted. 0 times theorem prover too weak. 124 trivial. 0 not checked. [2018-02-04 20:30:32,884 INFO L409 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-02-04 20:30:32,885 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-02-04 20:30:32,885 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=88, Unknown=0, NotChecked=0, Total=110 [2018-02-04 20:30:32,885 INFO L87 Difference]: Start difference. First operand 237 states and 252 transitions. Second operand 11 states. [2018-02-04 20:30:38,361 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 20:30:38,361 INFO L93 Difference]: Finished difference Result 283 states and 304 transitions. [2018-02-04 20:30:38,362 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-02-04 20:30:38,362 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 129 [2018-02-04 20:30:38,362 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 20:30:38,363 INFO L225 Difference]: With dead ends: 283 [2018-02-04 20:30:38,363 INFO L226 Difference]: Without dead ends: 276 [2018-02-04 20:30:38,364 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 51 GetRequests, 32 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 53 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=86, Invalid=334, Unknown=0, NotChecked=0, Total=420 [2018-02-04 20:30:38,364 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 276 states. [2018-02-04 20:30:38,370 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 276 to 240. [2018-02-04 20:30:38,370 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 240 states. [2018-02-04 20:30:38,371 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 240 states to 240 states and 256 transitions. [2018-02-04 20:30:38,371 INFO L78 Accepts]: Start accepts. Automaton has 240 states and 256 transitions. Word has length 129 [2018-02-04 20:30:38,372 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 20:30:38,372 INFO L432 AbstractCegarLoop]: Abstraction has 240 states and 256 transitions. [2018-02-04 20:30:38,372 INFO L433 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-02-04 20:30:38,372 INFO L276 IsEmpty]: Start isEmpty. Operand 240 states and 256 transitions. [2018-02-04 20:30:38,374 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 135 [2018-02-04 20:30:38,375 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 20:30:38,375 INFO L351 BasicCegarLoop]: trace histogram [6, 6, 6, 6, 6, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 20:30:38,375 INFO L371 AbstractCegarLoop]: === Iteration 6 === [l3_destroyErr0RequiresViolation, l3_destroyErr3RequiresViolation, l3_destroyErr1RequiresViolation, l3_destroyErr2RequiresViolation, l3_destroyErr4RequiresViolation, l3_destroyErr5RequiresViolation, l0_insertErr3RequiresViolation, l0_insertErr1RequiresViolation, l0_insertErr5RequiresViolation, l0_insertErr2RequiresViolation, l0_insertErr4RequiresViolation, l0_insertErr0RequiresViolation, l4_destroyErr4RequiresViolation, l4_destroyErr6RequiresViolation, l4_destroyErr2RequiresViolation, l4_destroyErr3RequiresViolation, l4_destroyErr1RequiresViolation, l4_destroyErr7RequiresViolation, l4_destroyErr0RequiresViolation, l4_destroyErr5RequiresViolation, l2_insertErr3RequiresViolation, l2_insertErr5RequiresViolation, l2_insertErr0RequiresViolation, l2_insertErr1RequiresViolation, l2_insertErr4RequiresViolation, l2_insertErr2RequiresViolation, mainErr1RequiresViolation, mainErr2EnsuresViolation, mainErr0RequiresViolation, l3_insertErr4RequiresViolation, l3_insertErr0RequiresViolation, l3_insertErr5RequiresViolation, l3_insertErr3RequiresViolation, l3_insertErr1RequiresViolation, l3_insertErr2RequiresViolation, l1_insertErr4RequiresViolation, l1_insertErr0RequiresViolation, l1_insertErr2RequiresViolation, l1_insertErr3RequiresViolation, l1_insertErr1RequiresViolation, l1_insertErr5RequiresViolation, l0_destroyErr5RequiresViolation, l0_destroyErr3RequiresViolation, l0_destroyErr1RequiresViolation, l0_destroyErr0RequiresViolation, l0_destroyErr4RequiresViolation, l0_destroyErr2RequiresViolation, calloc_modelErr0RequiresViolation, calloc_modelErr1RequiresViolation, l4_insertErr5RequiresViolation, l4_insertErr3RequiresViolation, l4_insertErr4RequiresViolation, l4_insertErr6RequiresViolation, l4_insertErr2RequiresViolation, l4_insertErr0RequiresViolation, l4_insertErr1RequiresViolation, l4_insertErr7RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr0RequiresViolation, l1_destroyErr2RequiresViolation, l1_destroyErr4RequiresViolation, l1_destroyErr0RequiresViolation, l1_destroyErr1RequiresViolation, l1_destroyErr5RequiresViolation, l1_destroyErr3RequiresViolation, l2_destroyErr1RequiresViolation, l2_destroyErr0RequiresViolation, l2_destroyErr2RequiresViolation, l2_destroyErr4RequiresViolation, l2_destroyErr5RequiresViolation, l2_destroyErr3RequiresViolation]=== [2018-02-04 20:30:38,375 INFO L82 PathProgramCache]: Analyzing trace with hash -1844342412, now seen corresponding path program 1 times No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 7 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-02-04 20:30:38,379 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 20:30:38,423 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:38,443 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:38,470 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:38,497 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:38,577 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:38,600 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:38,611 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:38,613 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:38,618 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:38,622 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:38,626 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:38,631 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:38,637 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:38,639 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:38,648 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:38,653 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:38,657 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:38,670 INFO L134 CoverageAnalysis]: Checked inductivity of 245 backedges. 30 proven. 69 refuted. 0 times theorem prover too weak. 146 trivial. 0 not checked. [2018-02-04 20:30:38,687 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 20:30:38,687 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12] total 12 [2018-02-04 20:30:38,687 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 20:30:38,687 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 60 refuted. 0 times theorem prover too weak. 130 trivial. 0 not checked. [2018-02-04 20:30:38,688 INFO L182 omatonBuilderFactory]: Interpolants [3072#(and (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)), 2945#true, 3073#(= 0 |#Ultimate.C_memset_#t~loopctr42|), 2946#false, 3074#(= 1 |#Ultimate.C_memset_#t~loopctr42|), 3075#(not (= 8 |#Ultimate.C_memset_#amount|)), 3047#(and (= |~#list~0.base| |old(~#list~0.base)|) (= |#valid| |old(#valid)|) (= |~#list~0.offset| |old(~#list~0.offset)|) (= |#NULL.base| |old(#NULL.base)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |old(#length)| |#length|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)), 3063#(not (= 8 |zalloc_or_die_#in~size|)), 3048#(and (= |#valid| |old(#valid)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |old(#length)| |#length|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)), 3064#(= (mod (* (mod |calloc_model_#in~nmemb| 4294967296) (mod |calloc_model_#in~size| 4294967296)) 4294967296) (mod (* (mod calloc_model_~nmemb 4294967296) (mod calloc_model_~size 4294967296)) 4294967296)), 3049#(or (and (not (= zalloc_or_die_~size 8)) (not (= |zalloc_or_die_#in~size| 8))) (and (= zalloc_or_die_~size 8) (= |zalloc_or_die_#in~size| 8))), 3071#(not (= (mod (* (mod |calloc_model_#in~nmemb| 4294967296) (mod |calloc_model_#in~size| 4294967296)) 4294967296) 8))] [2018-02-04 20:30:38,688 INFO L134 CoverageAnalysis]: Checked inductivity of 245 backedges. 30 proven. 69 refuted. 0 times theorem prover too weak. 146 trivial. 0 not checked. [2018-02-04 20:30:38,688 INFO L409 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-02-04 20:30:38,688 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-02-04 20:30:38,688 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=108, Unknown=0, NotChecked=0, Total=132 [2018-02-04 20:30:38,688 INFO L87 Difference]: Start difference. First operand 240 states and 256 transitions. Second operand 12 states. [2018-02-04 20:30:39,599 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 20:30:39,599 INFO L93 Difference]: Finished difference Result 289 states and 311 transitions. [2018-02-04 20:30:39,600 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-02-04 20:30:39,600 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 134 [2018-02-04 20:30:39,600 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 20:30:39,601 INFO L225 Difference]: With dead ends: 289 [2018-02-04 20:30:39,601 INFO L226 Difference]: Without dead ends: 282 [2018-02-04 20:30:39,601 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 56 GetRequests, 34 SyntacticMatches, 0 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 69 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=97, Invalid=455, Unknown=0, NotChecked=0, Total=552 [2018-02-04 20:30:39,602 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 282 states. [2018-02-04 20:30:39,605 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 282 to 241. [2018-02-04 20:30:39,605 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 241 states. [2018-02-04 20:30:39,606 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 241 states to 241 states and 258 transitions. [2018-02-04 20:30:39,606 INFO L78 Accepts]: Start accepts. Automaton has 241 states and 258 transitions. Word has length 134 [2018-02-04 20:30:39,606 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 20:30:39,606 INFO L432 AbstractCegarLoop]: Abstraction has 241 states and 258 transitions. [2018-02-04 20:30:39,606 INFO L433 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-02-04 20:30:39,606 INFO L276 IsEmpty]: Start isEmpty. Operand 241 states and 258 transitions. [2018-02-04 20:30:39,607 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 140 [2018-02-04 20:30:39,607 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 20:30:39,607 INFO L351 BasicCegarLoop]: trace histogram [10, 6, 6, 6, 6, 6, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 20:30:39,607 INFO L371 AbstractCegarLoop]: === Iteration 7 === [l3_destroyErr0RequiresViolation, l3_destroyErr3RequiresViolation, l3_destroyErr1RequiresViolation, l3_destroyErr2RequiresViolation, l3_destroyErr4RequiresViolation, l3_destroyErr5RequiresViolation, l0_insertErr3RequiresViolation, l0_insertErr1RequiresViolation, l0_insertErr5RequiresViolation, l0_insertErr2RequiresViolation, l0_insertErr4RequiresViolation, l0_insertErr0RequiresViolation, l4_destroyErr4RequiresViolation, l4_destroyErr6RequiresViolation, l4_destroyErr2RequiresViolation, l4_destroyErr3RequiresViolation, l4_destroyErr1RequiresViolation, l4_destroyErr7RequiresViolation, l4_destroyErr0RequiresViolation, l4_destroyErr5RequiresViolation, l2_insertErr3RequiresViolation, l2_insertErr5RequiresViolation, l2_insertErr0RequiresViolation, l2_insertErr1RequiresViolation, l2_insertErr4RequiresViolation, l2_insertErr2RequiresViolation, mainErr1RequiresViolation, mainErr2EnsuresViolation, mainErr0RequiresViolation, l3_insertErr4RequiresViolation, l3_insertErr0RequiresViolation, l3_insertErr5RequiresViolation, l3_insertErr3RequiresViolation, l3_insertErr1RequiresViolation, l3_insertErr2RequiresViolation, l1_insertErr4RequiresViolation, l1_insertErr0RequiresViolation, l1_insertErr2RequiresViolation, l1_insertErr3RequiresViolation, l1_insertErr1RequiresViolation, l1_insertErr5RequiresViolation, l0_destroyErr5RequiresViolation, l0_destroyErr3RequiresViolation, l0_destroyErr1RequiresViolation, l0_destroyErr0RequiresViolation, l0_destroyErr4RequiresViolation, l0_destroyErr2RequiresViolation, calloc_modelErr0RequiresViolation, calloc_modelErr1RequiresViolation, l4_insertErr5RequiresViolation, l4_insertErr3RequiresViolation, l4_insertErr4RequiresViolation, l4_insertErr6RequiresViolation, l4_insertErr2RequiresViolation, l4_insertErr0RequiresViolation, l4_insertErr1RequiresViolation, l4_insertErr7RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr0RequiresViolation, l1_destroyErr2RequiresViolation, l1_destroyErr4RequiresViolation, l1_destroyErr0RequiresViolation, l1_destroyErr1RequiresViolation, l1_destroyErr5RequiresViolation, l1_destroyErr3RequiresViolation, l2_destroyErr1RequiresViolation, l2_destroyErr0RequiresViolation, l2_destroyErr2RequiresViolation, l2_destroyErr4RequiresViolation, l2_destroyErr5RequiresViolation, l2_destroyErr3RequiresViolation]=== [2018-02-04 20:30:39,607 INFO L82 PathProgramCache]: Analyzing trace with hash 1256681681, now seen corresponding path program 2 times No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-02-04 20:30:39,610 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 20:30:39,651 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:39,676 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:39,689 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:39,711 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:39,790 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:39,823 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:39,827 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:39,829 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:39,835 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:39,839 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:39,842 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:39,847 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:39,851 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:39,853 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:39,859 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:39,863 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:39,865 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:39,876 INFO L134 CoverageAnalysis]: Checked inductivity of 305 backedges. 30 proven. 91 refuted. 0 times theorem prover too weak. 184 trivial. 0 not checked. [2018-02-04 20:30:39,892 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 20:30:39,892 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13] total 13 [2018-02-04 20:30:39,892 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 20:30:39,893 INFO L134 CoverageAnalysis]: Checked inductivity of 200 backedges. 0 proven. 64 refuted. 0 times theorem prover too weak. 136 trivial. 0 not checked. [2018-02-04 20:30:39,893 INFO L182 omatonBuilderFactory]: Interpolants [3840#(not (= (mod (* (mod |calloc_model_#in~nmemb| 4294967296) (mod |calloc_model_#in~size| 4294967296)) 4294967296) 8)), 3841#(and (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)), 3842#(= 0 |#Ultimate.C_memset_#t~loopctr42|), 3843#(= 1 |#Ultimate.C_memset_#t~loopctr42|), 3844#(= |#Ultimate.C_memset_#t~loopctr42| 2), 3845#(not (= 8 |#Ultimate.C_memset_#amount|)), 3814#(and (= |~#list~0.base| |old(~#list~0.base)|) (= |#valid| |old(#valid)|) (= |~#list~0.offset| |old(~#list~0.offset)|) (= |#NULL.base| |old(#NULL.base)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |old(#length)| |#length|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)), 3815#(and (= |#valid| |old(#valid)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |old(#length)| |#length|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)), 3816#(or (and (not (= zalloc_or_die_~size 8)) (not (= |zalloc_or_die_#in~size| 8))) (and (= zalloc_or_die_~size 8) (= |zalloc_or_die_#in~size| 8))), 3831#(not (= 8 |zalloc_or_die_#in~size|)), 3832#(= (mod (* (mod |calloc_model_#in~nmemb| 4294967296) (mod |calloc_model_#in~size| 4294967296)) 4294967296) (mod (* (mod calloc_model_~nmemb 4294967296) (mod calloc_model_~size 4294967296)) 4294967296)), 3707#true, 3708#false] [2018-02-04 20:30:39,893 INFO L134 CoverageAnalysis]: Checked inductivity of 305 backedges. 30 proven. 91 refuted. 0 times theorem prover too weak. 184 trivial. 0 not checked. [2018-02-04 20:30:39,893 INFO L409 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-02-04 20:30:39,893 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-02-04 20:30:39,893 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=26, Invalid=130, Unknown=0, NotChecked=0, Total=156 [2018-02-04 20:30:39,894 INFO L87 Difference]: Start difference. First operand 241 states and 258 transitions. Second operand 13 states. [2018-02-04 20:30:40,058 WARN L143 SmtUtils]: Spent 134ms on a formula simplification that was a NOOP. DAG size: 35 [2018-02-04 20:30:40,864 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 20:30:40,864 INFO L93 Difference]: Finished difference Result 292 states and 315 transitions. [2018-02-04 20:30:40,864 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-02-04 20:30:40,864 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 139 [2018-02-04 20:30:40,865 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 20:30:40,866 INFO L225 Difference]: With dead ends: 292 [2018-02-04 20:30:40,866 INFO L226 Difference]: Without dead ends: 285 [2018-02-04 20:30:40,866 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 58 GetRequests, 34 SyntacticMatches, 0 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 83 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=103, Invalid=547, Unknown=0, NotChecked=0, Total=650 [2018-02-04 20:30:40,866 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 285 states. [2018-02-04 20:30:40,871 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 285 to 242. [2018-02-04 20:30:40,871 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 242 states. [2018-02-04 20:30:40,872 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 242 states to 242 states and 260 transitions. [2018-02-04 20:30:40,872 INFO L78 Accepts]: Start accepts. Automaton has 242 states and 260 transitions. Word has length 139 [2018-02-04 20:30:40,873 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 20:30:40,873 INFO L432 AbstractCegarLoop]: Abstraction has 242 states and 260 transitions. [2018-02-04 20:30:40,873 INFO L433 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-02-04 20:30:40,873 INFO L276 IsEmpty]: Start isEmpty. Operand 242 states and 260 transitions. [2018-02-04 20:30:40,874 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 145 [2018-02-04 20:30:40,874 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 20:30:40,875 INFO L351 BasicCegarLoop]: trace histogram [15, 6, 6, 6, 6, 6, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 20:30:40,875 INFO L371 AbstractCegarLoop]: === Iteration 8 === [l3_destroyErr0RequiresViolation, l3_destroyErr3RequiresViolation, l3_destroyErr1RequiresViolation, l3_destroyErr2RequiresViolation, l3_destroyErr4RequiresViolation, l3_destroyErr5RequiresViolation, l0_insertErr3RequiresViolation, l0_insertErr1RequiresViolation, l0_insertErr5RequiresViolation, l0_insertErr2RequiresViolation, l0_insertErr4RequiresViolation, l0_insertErr0RequiresViolation, l4_destroyErr4RequiresViolation, l4_destroyErr6RequiresViolation, l4_destroyErr2RequiresViolation, l4_destroyErr3RequiresViolation, l4_destroyErr1RequiresViolation, l4_destroyErr7RequiresViolation, l4_destroyErr0RequiresViolation, l4_destroyErr5RequiresViolation, l2_insertErr3RequiresViolation, l2_insertErr5RequiresViolation, l2_insertErr0RequiresViolation, l2_insertErr1RequiresViolation, l2_insertErr4RequiresViolation, l2_insertErr2RequiresViolation, mainErr1RequiresViolation, mainErr2EnsuresViolation, mainErr0RequiresViolation, l3_insertErr4RequiresViolation, l3_insertErr0RequiresViolation, l3_insertErr5RequiresViolation, l3_insertErr3RequiresViolation, l3_insertErr1RequiresViolation, l3_insertErr2RequiresViolation, l1_insertErr4RequiresViolation, l1_insertErr0RequiresViolation, l1_insertErr2RequiresViolation, l1_insertErr3RequiresViolation, l1_insertErr1RequiresViolation, l1_insertErr5RequiresViolation, l0_destroyErr5RequiresViolation, l0_destroyErr3RequiresViolation, l0_destroyErr1RequiresViolation, l0_destroyErr0RequiresViolation, l0_destroyErr4RequiresViolation, l0_destroyErr2RequiresViolation, calloc_modelErr0RequiresViolation, calloc_modelErr1RequiresViolation, l4_insertErr5RequiresViolation, l4_insertErr3RequiresViolation, l4_insertErr4RequiresViolation, l4_insertErr6RequiresViolation, l4_insertErr2RequiresViolation, l4_insertErr0RequiresViolation, l4_insertErr1RequiresViolation, l4_insertErr7RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr0RequiresViolation, l1_destroyErr2RequiresViolation, l1_destroyErr4RequiresViolation, l1_destroyErr0RequiresViolation, l1_destroyErr1RequiresViolation, l1_destroyErr5RequiresViolation, l1_destroyErr3RequiresViolation, l2_destroyErr1RequiresViolation, l2_destroyErr0RequiresViolation, l2_destroyErr2RequiresViolation, l2_destroyErr4RequiresViolation, l2_destroyErr5RequiresViolation, l2_destroyErr3RequiresViolation]=== [2018-02-04 20:30:40,875 INFO L82 PathProgramCache]: Analyzing trace with hash 1886414356, now seen corresponding path program 3 times No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 9 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-02-04 20:30:40,886 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 20:30:40,916 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:40,930 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:40,938 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:40,956 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:41,032 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:41,076 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:41,080 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:41,082 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:41,087 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:41,090 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:41,093 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:41,097 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:41,101 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:41,103 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:41,109 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:41,114 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:41,116 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:41,126 INFO L134 CoverageAnalysis]: Checked inductivity of 390 backedges. 30 proven. 122 refuted. 0 times theorem prover too weak. 238 trivial. 0 not checked. [2018-02-04 20:30:41,143 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 20:30:41,143 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14] total 14 [2018-02-04 20:30:41,144 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 20:30:41,144 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 68 refuted. 0 times theorem prover too weak. 142 trivial. 0 not checked. [2018-02-04 20:30:41,144 INFO L182 omatonBuilderFactory]: Interpolants [4491#true, 4492#false, 4621#(not (= 8 |zalloc_or_die_#in~size|)), 4622#(= (mod (* (mod |calloc_model_#in~nmemb| 4294967296) (mod |calloc_model_#in~size| 4294967296)) 4294967296) (mod (* (mod calloc_model_~nmemb 4294967296) (mod calloc_model_~size 4294967296)) 4294967296)), 4631#(not (= (mod (* (mod |calloc_model_#in~nmemb| 4294967296) (mod |calloc_model_#in~size| 4294967296)) 4294967296) 8)), 4632#(and (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)), 4633#(= 0 |#Ultimate.C_memset_#t~loopctr42|), 4634#(= 1 |#Ultimate.C_memset_#t~loopctr42|), 4603#(and (= |~#list~0.base| |old(~#list~0.base)|) (= |#valid| |old(#valid)|) (= |~#list~0.offset| |old(~#list~0.offset)|) (= |#NULL.base| |old(#NULL.base)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |old(#length)| |#length|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)), 4635#(= |#Ultimate.C_memset_#t~loopctr42| 2), 4604#(and (= |#valid| |old(#valid)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |old(#length)| |#length|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)), 4636#(or (and (< |#Ultimate.C_memset_#t~loopctr42| |#Ultimate.C_memset_#amount|) (< 3 |#Ultimate.C_memset_#amount|)) (and (<= |#Ultimate.C_memset_#amount| 3) (<= |#Ultimate.C_memset_#amount| |#Ultimate.C_memset_#t~loopctr42|))), 4605#(or (and (not (= zalloc_or_die_~size 8)) (not (= |zalloc_or_die_#in~size| 8))) (and (= zalloc_or_die_~size 8) (= |zalloc_or_die_#in~size| 8))), 4637#(<= |#Ultimate.C_memset_#amount| 3)] [2018-02-04 20:30:41,145 INFO L134 CoverageAnalysis]: Checked inductivity of 390 backedges. 30 proven. 122 refuted. 0 times theorem prover too weak. 238 trivial. 0 not checked. [2018-02-04 20:30:41,145 INFO L409 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-02-04 20:30:41,145 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-02-04 20:30:41,145 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=28, Invalid=154, Unknown=0, NotChecked=0, Total=182 [2018-02-04 20:30:41,145 INFO L87 Difference]: Start difference. First operand 242 states and 260 transitions. Second operand 14 states. [2018-02-04 20:30:42,126 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 20:30:42,127 INFO L93 Difference]: Finished difference Result 295 states and 319 transitions. [2018-02-04 20:30:42,127 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-02-04 20:30:42,127 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 144 [2018-02-04 20:30:42,127 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 20:30:42,128 INFO L225 Difference]: With dead ends: 295 [2018-02-04 20:30:42,129 INFO L226 Difference]: Without dead ends: 288 [2018-02-04 20:30:42,129 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 60 GetRequests, 34 SyntacticMatches, 0 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 98 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=115, Invalid=641, Unknown=0, NotChecked=0, Total=756 [2018-02-04 20:30:42,129 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 288 states. [2018-02-04 20:30:42,134 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 288 to 243. [2018-02-04 20:30:42,134 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 243 states. [2018-02-04 20:30:42,135 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 243 states to 243 states and 262 transitions. [2018-02-04 20:30:42,136 INFO L78 Accepts]: Start accepts. Automaton has 243 states and 262 transitions. Word has length 144 [2018-02-04 20:30:42,136 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 20:30:42,136 INFO L432 AbstractCegarLoop]: Abstraction has 243 states and 262 transitions. [2018-02-04 20:30:42,136 INFO L433 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-02-04 20:30:42,136 INFO L276 IsEmpty]: Start isEmpty. Operand 243 states and 262 transitions. [2018-02-04 20:30:42,137 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 150 [2018-02-04 20:30:42,137 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 20:30:42,138 INFO L351 BasicCegarLoop]: trace histogram [20, 6, 6, 6, 6, 6, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 20:30:42,138 INFO L371 AbstractCegarLoop]: === Iteration 9 === [l3_destroyErr0RequiresViolation, l3_destroyErr3RequiresViolation, l3_destroyErr1RequiresViolation, l3_destroyErr2RequiresViolation, l3_destroyErr4RequiresViolation, l3_destroyErr5RequiresViolation, l0_insertErr3RequiresViolation, l0_insertErr1RequiresViolation, l0_insertErr5RequiresViolation, l0_insertErr2RequiresViolation, l0_insertErr4RequiresViolation, l0_insertErr0RequiresViolation, l4_destroyErr4RequiresViolation, l4_destroyErr6RequiresViolation, l4_destroyErr2RequiresViolation, l4_destroyErr3RequiresViolation, l4_destroyErr1RequiresViolation, l4_destroyErr7RequiresViolation, l4_destroyErr0RequiresViolation, l4_destroyErr5RequiresViolation, l2_insertErr3RequiresViolation, l2_insertErr5RequiresViolation, l2_insertErr0RequiresViolation, l2_insertErr1RequiresViolation, l2_insertErr4RequiresViolation, l2_insertErr2RequiresViolation, mainErr1RequiresViolation, mainErr2EnsuresViolation, mainErr0RequiresViolation, l3_insertErr4RequiresViolation, l3_insertErr0RequiresViolation, l3_insertErr5RequiresViolation, l3_insertErr3RequiresViolation, l3_insertErr1RequiresViolation, l3_insertErr2RequiresViolation, l1_insertErr4RequiresViolation, l1_insertErr0RequiresViolation, l1_insertErr2RequiresViolation, l1_insertErr3RequiresViolation, l1_insertErr1RequiresViolation, l1_insertErr5RequiresViolation, l0_destroyErr5RequiresViolation, l0_destroyErr3RequiresViolation, l0_destroyErr1RequiresViolation, l0_destroyErr0RequiresViolation, l0_destroyErr4RequiresViolation, l0_destroyErr2RequiresViolation, calloc_modelErr0RequiresViolation, calloc_modelErr1RequiresViolation, l4_insertErr5RequiresViolation, l4_insertErr3RequiresViolation, l4_insertErr4RequiresViolation, l4_insertErr6RequiresViolation, l4_insertErr2RequiresViolation, l4_insertErr0RequiresViolation, l4_insertErr1RequiresViolation, l4_insertErr7RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr0RequiresViolation, l1_destroyErr2RequiresViolation, l1_destroyErr4RequiresViolation, l1_destroyErr0RequiresViolation, l1_destroyErr1RequiresViolation, l1_destroyErr5RequiresViolation, l1_destroyErr3RequiresViolation, l2_destroyErr1RequiresViolation, l2_destroyErr0RequiresViolation, l2_destroyErr2RequiresViolation, l2_destroyErr4RequiresViolation, l2_destroyErr5RequiresViolation, l2_destroyErr3RequiresViolation]=== [2018-02-04 20:30:42,138 INFO L82 PathProgramCache]: Analyzing trace with hash 1008444465, now seen corresponding path program 4 times No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-02-04 20:30:42,142 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 20:30:42,179 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:42,192 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:42,210 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:42,228 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:42,309 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:42,363 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:42,367 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:42,370 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:42,374 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:42,378 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:42,380 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:42,385 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:42,388 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:42,391 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:42,395 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:42,398 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:42,401 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:42,411 INFO L134 CoverageAnalysis]: Checked inductivity of 500 backedges. 30 proven. 162 refuted. 0 times theorem prover too weak. 308 trivial. 0 not checked. [2018-02-04 20:30:42,427 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 20:30:42,427 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15] total 15 [2018-02-04 20:30:42,427 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 20:30:42,427 INFO L134 CoverageAnalysis]: Checked inductivity of 220 backedges. 0 proven. 72 refuted. 0 times theorem prover too weak. 148 trivial. 0 not checked. [2018-02-04 20:30:42,427 INFO L182 omatonBuilderFactory]: Interpolants [5444#(not (= (mod (* (mod |calloc_model_#in~nmemb| 4294967296) (mod |calloc_model_#in~size| 4294967296)) 4294967296) 8)), 5445#(and (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)), 5414#(and (= |~#list~0.base| |old(~#list~0.base)|) (= |#valid| |old(#valid)|) (= |~#list~0.offset| |old(~#list~0.offset)|) (= |#NULL.base| |old(#NULL.base)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |old(#length)| |#length|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)), 5446#(= 0 |#Ultimate.C_memset_#t~loopctr42|), 5415#(and (= |#valid| |old(#valid)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |old(#length)| |#length|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)), 5447#(<= |#Ultimate.C_memset_#t~loopctr42| 1), 5416#(or (and (not (= zalloc_or_die_~size 8)) (not (= |zalloc_or_die_#in~size| 8))) (and (= zalloc_or_die_~size 8) (= |zalloc_or_die_#in~size| 8))), 5448#(<= |#Ultimate.C_memset_#t~loopctr42| 2), 5449#(<= |#Ultimate.C_memset_#t~loopctr42| 3), 5450#(<= |#Ultimate.C_memset_#t~loopctr42| 4), 5451#(not (= 8 |#Ultimate.C_memset_#amount|)), 5297#true, 5298#false, 5433#(not (= 8 |zalloc_or_die_#in~size|)), 5434#(= (mod (* (mod |calloc_model_#in~nmemb| 4294967296) (mod |calloc_model_#in~size| 4294967296)) 4294967296) (mod (* (mod calloc_model_~nmemb 4294967296) (mod calloc_model_~size 4294967296)) 4294967296))] [2018-02-04 20:30:42,427 INFO L134 CoverageAnalysis]: Checked inductivity of 500 backedges. 30 proven. 162 refuted. 0 times theorem prover too weak. 308 trivial. 0 not checked. [2018-02-04 20:30:42,428 INFO L409 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-02-04 20:30:42,428 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-02-04 20:30:42,428 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=40, Invalid=170, Unknown=0, NotChecked=0, Total=210 [2018-02-04 20:30:42,428 INFO L87 Difference]: Start difference. First operand 243 states and 262 transitions. Second operand 15 states. [2018-02-04 20:30:43,390 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 20:30:43,390 INFO L93 Difference]: Finished difference Result 298 states and 323 transitions. [2018-02-04 20:30:43,390 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-02-04 20:30:43,391 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 149 [2018-02-04 20:30:43,391 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 20:30:43,392 INFO L225 Difference]: With dead ends: 298 [2018-02-04 20:30:43,392 INFO L226 Difference]: Without dead ends: 291 [2018-02-04 20:30:43,392 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 62 GetRequests, 34 SyntacticMatches, 0 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 118 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=149, Invalid=721, Unknown=0, NotChecked=0, Total=870 [2018-02-04 20:30:43,392 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 291 states. [2018-02-04 20:30:43,396 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 291 to 244. [2018-02-04 20:30:43,396 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 244 states. [2018-02-04 20:30:43,397 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 244 states to 244 states and 264 transitions. [2018-02-04 20:30:43,398 INFO L78 Accepts]: Start accepts. Automaton has 244 states and 264 transitions. Word has length 149 [2018-02-04 20:30:43,398 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 20:30:43,398 INFO L432 AbstractCegarLoop]: Abstraction has 244 states and 264 transitions. [2018-02-04 20:30:43,398 INFO L433 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-02-04 20:30:43,398 INFO L276 IsEmpty]: Start isEmpty. Operand 244 states and 264 transitions. [2018-02-04 20:30:43,399 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 155 [2018-02-04 20:30:43,400 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 20:30:43,400 INFO L351 BasicCegarLoop]: trace histogram [25, 6, 6, 6, 6, 6, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 20:30:43,400 INFO L371 AbstractCegarLoop]: === Iteration 10 === [l3_destroyErr0RequiresViolation, l3_destroyErr3RequiresViolation, l3_destroyErr1RequiresViolation, l3_destroyErr2RequiresViolation, l3_destroyErr4RequiresViolation, l3_destroyErr5RequiresViolation, l0_insertErr3RequiresViolation, l0_insertErr1RequiresViolation, l0_insertErr5RequiresViolation, l0_insertErr2RequiresViolation, l0_insertErr4RequiresViolation, l0_insertErr0RequiresViolation, l4_destroyErr4RequiresViolation, l4_destroyErr6RequiresViolation, l4_destroyErr2RequiresViolation, l4_destroyErr3RequiresViolation, l4_destroyErr1RequiresViolation, l4_destroyErr7RequiresViolation, l4_destroyErr0RequiresViolation, l4_destroyErr5RequiresViolation, l2_insertErr3RequiresViolation, l2_insertErr5RequiresViolation, l2_insertErr0RequiresViolation, l2_insertErr1RequiresViolation, l2_insertErr4RequiresViolation, l2_insertErr2RequiresViolation, mainErr1RequiresViolation, mainErr2EnsuresViolation, mainErr0RequiresViolation, l3_insertErr4RequiresViolation, l3_insertErr0RequiresViolation, l3_insertErr5RequiresViolation, l3_insertErr3RequiresViolation, l3_insertErr1RequiresViolation, l3_insertErr2RequiresViolation, l1_insertErr4RequiresViolation, l1_insertErr0RequiresViolation, l1_insertErr2RequiresViolation, l1_insertErr3RequiresViolation, l1_insertErr1RequiresViolation, l1_insertErr5RequiresViolation, l0_destroyErr5RequiresViolation, l0_destroyErr3RequiresViolation, l0_destroyErr1RequiresViolation, l0_destroyErr0RequiresViolation, l0_destroyErr4RequiresViolation, l0_destroyErr2RequiresViolation, calloc_modelErr0RequiresViolation, calloc_modelErr1RequiresViolation, l4_insertErr5RequiresViolation, l4_insertErr3RequiresViolation, l4_insertErr4RequiresViolation, l4_insertErr6RequiresViolation, l4_insertErr2RequiresViolation, l4_insertErr0RequiresViolation, l4_insertErr1RequiresViolation, l4_insertErr7RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr0RequiresViolation, l1_destroyErr2RequiresViolation, l1_destroyErr4RequiresViolation, l1_destroyErr0RequiresViolation, l1_destroyErr1RequiresViolation, l1_destroyErr5RequiresViolation, l1_destroyErr3RequiresViolation, l2_destroyErr1RequiresViolation, l2_destroyErr0RequiresViolation, l2_destroyErr2RequiresViolation, l2_destroyErr4RequiresViolation, l2_destroyErr5RequiresViolation, l2_destroyErr3RequiresViolation]=== [2018-02-04 20:30:43,400 INFO L82 PathProgramCache]: Analyzing trace with hash 1591579316, now seen corresponding path program 5 times No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 11 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-02-04 20:30:43,405 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 20:30:43,444 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:43,459 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:43,469 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:43,488 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:43,569 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:43,620 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:43,625 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:43,628 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:43,634 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:43,638 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:43,640 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:43,645 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:43,649 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:43,652 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:43,657 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:43,662 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:43,665 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:43,676 INFO L134 CoverageAnalysis]: Checked inductivity of 635 backedges. 30 proven. 211 refuted. 0 times theorem prover too weak. 394 trivial. 0 not checked. [2018-02-04 20:30:43,693 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 20:30:43,693 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16] total 16 [2018-02-04 20:30:43,693 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 20:30:43,694 INFO L134 CoverageAnalysis]: Checked inductivity of 230 backedges. 0 proven. 76 refuted. 0 times theorem prover too weak. 154 trivial. 0 not checked. [2018-02-04 20:30:43,694 INFO L182 omatonBuilderFactory]: Interpolants [6247#(and (= |~#list~0.base| |old(~#list~0.base)|) (= |#valid| |old(#valid)|) (= |~#list~0.offset| |old(~#list~0.offset)|) (= |#NULL.base| |old(#NULL.base)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |old(#length)| |#length|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)), 6279#(not (= (mod (* (mod |calloc_model_#in~nmemb| 4294967296) (mod |calloc_model_#in~size| 4294967296)) 4294967296) 8)), 6248#(and (= |#valid| |old(#valid)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |old(#length)| |#length|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)), 6280#(and (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)), 6249#(or (and (not (= zalloc_or_die_~size 8)) (not (= |zalloc_or_die_#in~size| 8))) (and (= zalloc_or_die_~size 8) (= |zalloc_or_die_#in~size| 8))), 6281#(= 0 |#Ultimate.C_memset_#t~loopctr42|), 6282#(<= |#Ultimate.C_memset_#t~loopctr42| 1), 6283#(<= |#Ultimate.C_memset_#t~loopctr42| 2), 6284#(<= |#Ultimate.C_memset_#t~loopctr42| 3), 6125#true, 6285#(<= |#Ultimate.C_memset_#t~loopctr42| 4), 6126#false, 6286#(<= |#Ultimate.C_memset_#t~loopctr42| 5), 6287#(not (= 8 |#Ultimate.C_memset_#amount|)), 6267#(not (= 8 |zalloc_or_die_#in~size|)), 6268#(= (mod (* (mod |calloc_model_#in~nmemb| 4294967296) (mod |calloc_model_#in~size| 4294967296)) 4294967296) (mod (* (mod calloc_model_~nmemb 4294967296) (mod calloc_model_~size 4294967296)) 4294967296))] [2018-02-04 20:30:43,694 INFO L134 CoverageAnalysis]: Checked inductivity of 635 backedges. 30 proven. 211 refuted. 0 times theorem prover too weak. 394 trivial. 0 not checked. [2018-02-04 20:30:43,694 INFO L409 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-02-04 20:30:43,694 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-02-04 20:30:43,694 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=47, Invalid=193, Unknown=0, NotChecked=0, Total=240 [2018-02-04 20:30:43,695 INFO L87 Difference]: Start difference. First operand 244 states and 264 transitions. Second operand 16 states. [2018-02-04 20:30:44,784 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 20:30:44,784 INFO L93 Difference]: Finished difference Result 301 states and 327 transitions. [2018-02-04 20:30:44,784 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2018-02-04 20:30:44,784 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 154 [2018-02-04 20:30:44,784 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 20:30:44,785 INFO L225 Difference]: With dead ends: 301 [2018-02-04 20:30:44,785 INFO L226 Difference]: Without dead ends: 294 [2018-02-04 20:30:44,785 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 64 GetRequests, 34 SyntacticMatches, 0 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 136 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=171, Invalid=821, Unknown=0, NotChecked=0, Total=992 [2018-02-04 20:30:44,786 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 294 states. [2018-02-04 20:30:44,788 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 294 to 245. [2018-02-04 20:30:44,788 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 245 states. [2018-02-04 20:30:44,789 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 245 states to 245 states and 266 transitions. [2018-02-04 20:30:44,789 INFO L78 Accepts]: Start accepts. Automaton has 245 states and 266 transitions. Word has length 154 [2018-02-04 20:30:44,789 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 20:30:44,789 INFO L432 AbstractCegarLoop]: Abstraction has 245 states and 266 transitions. [2018-02-04 20:30:44,789 INFO L433 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-02-04 20:30:44,789 INFO L276 IsEmpty]: Start isEmpty. Operand 245 states and 266 transitions. [2018-02-04 20:30:44,790 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 160 [2018-02-04 20:30:44,790 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 20:30:44,790 INFO L351 BasicCegarLoop]: trace histogram [30, 6, 6, 6, 6, 6, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 20:30:44,790 INFO L371 AbstractCegarLoop]: === Iteration 11 === [l3_destroyErr0RequiresViolation, l3_destroyErr3RequiresViolation, l3_destroyErr1RequiresViolation, l3_destroyErr2RequiresViolation, l3_destroyErr4RequiresViolation, l3_destroyErr5RequiresViolation, l0_insertErr3RequiresViolation, l0_insertErr1RequiresViolation, l0_insertErr5RequiresViolation, l0_insertErr2RequiresViolation, l0_insertErr4RequiresViolation, l0_insertErr0RequiresViolation, l4_destroyErr4RequiresViolation, l4_destroyErr6RequiresViolation, l4_destroyErr2RequiresViolation, l4_destroyErr3RequiresViolation, l4_destroyErr1RequiresViolation, l4_destroyErr7RequiresViolation, l4_destroyErr0RequiresViolation, l4_destroyErr5RequiresViolation, l2_insertErr3RequiresViolation, l2_insertErr5RequiresViolation, l2_insertErr0RequiresViolation, l2_insertErr1RequiresViolation, l2_insertErr4RequiresViolation, l2_insertErr2RequiresViolation, mainErr1RequiresViolation, mainErr2EnsuresViolation, mainErr0RequiresViolation, l3_insertErr4RequiresViolation, l3_insertErr0RequiresViolation, l3_insertErr5RequiresViolation, l3_insertErr3RequiresViolation, l3_insertErr1RequiresViolation, l3_insertErr2RequiresViolation, l1_insertErr4RequiresViolation, l1_insertErr0RequiresViolation, l1_insertErr2RequiresViolation, l1_insertErr3RequiresViolation, l1_insertErr1RequiresViolation, l1_insertErr5RequiresViolation, l0_destroyErr5RequiresViolation, l0_destroyErr3RequiresViolation, l0_destroyErr1RequiresViolation, l0_destroyErr0RequiresViolation, l0_destroyErr4RequiresViolation, l0_destroyErr2RequiresViolation, calloc_modelErr0RequiresViolation, calloc_modelErr1RequiresViolation, l4_insertErr5RequiresViolation, l4_insertErr3RequiresViolation, l4_insertErr4RequiresViolation, l4_insertErr6RequiresViolation, l4_insertErr2RequiresViolation, l4_insertErr0RequiresViolation, l4_insertErr1RequiresViolation, l4_insertErr7RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr0RequiresViolation, l1_destroyErr2RequiresViolation, l1_destroyErr4RequiresViolation, l1_destroyErr0RequiresViolation, l1_destroyErr1RequiresViolation, l1_destroyErr5RequiresViolation, l1_destroyErr3RequiresViolation, l2_destroyErr1RequiresViolation, l2_destroyErr0RequiresViolation, l2_destroyErr2RequiresViolation, l2_destroyErr4RequiresViolation, l2_destroyErr5RequiresViolation, l2_destroyErr3RequiresViolation]=== [2018-02-04 20:30:44,791 INFO L82 PathProgramCache]: Analyzing trace with hash 1130463121, now seen corresponding path program 6 times No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 12 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-02-04 20:30:44,800 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 20:30:44,831 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:44,845 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:44,855 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:44,873 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:44,967 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:45,028 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:45,032 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:45,035 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:45,040 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:45,044 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:45,046 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:45,052 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:45,057 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:45,062 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:45,069 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:45,074 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:45,077 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:45,088 INFO L134 CoverageAnalysis]: Checked inductivity of 795 backedges. 30 proven. 269 refuted. 0 times theorem prover too weak. 496 trivial. 0 not checked. [2018-02-04 20:30:45,105 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 20:30:45,105 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17] total 17 [2018-02-04 20:30:45,105 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 20:30:45,105 INFO L134 CoverageAnalysis]: Checked inductivity of 240 backedges. 0 proven. 80 refuted. 0 times theorem prover too weak. 160 trivial. 0 not checked. [2018-02-04 20:30:45,105 INFO L182 omatonBuilderFactory]: Interpolants [6976#false, 7104#(or (and (not (= zalloc_or_die_~size 8)) (not (= |zalloc_or_die_#in~size| 8))) (and (= zalloc_or_die_~size 8) (= |zalloc_or_die_#in~size| 8))), 7136#(not (= (mod (* (mod |calloc_model_#in~nmemb| 4294967296) (mod |calloc_model_#in~size| 4294967296)) 4294967296) 8)), 7137#(and (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)), 7138#(= 0 |#Ultimate.C_memset_#t~loopctr42|), 7139#(= 1 |#Ultimate.C_memset_#t~loopctr42|), 7140#(= |#Ultimate.C_memset_#t~loopctr42| 2), 7141#(<= |#Ultimate.C_memset_#t~loopctr42| 3), 7142#(<= |#Ultimate.C_memset_#t~loopctr42| 4), 7143#(<= |#Ultimate.C_memset_#t~loopctr42| 5), 7144#(<= |#Ultimate.C_memset_#t~loopctr42| 6), 7145#(not (= 8 |#Ultimate.C_memset_#amount|)), 7123#(not (= 8 |zalloc_or_die_#in~size|)), 7124#(= (mod (* (mod |calloc_model_#in~nmemb| 4294967296) (mod |calloc_model_#in~size| 4294967296)) 4294967296) (mod (* (mod calloc_model_~nmemb 4294967296) (mod calloc_model_~size 4294967296)) 4294967296)), 7102#(and (= |~#list~0.base| |old(~#list~0.base)|) (= |#valid| |old(#valid)|) (= |~#list~0.offset| |old(~#list~0.offset)|) (= |#NULL.base| |old(#NULL.base)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |old(#length)| |#length|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)), 6975#true, 7103#(and (= |#valid| |old(#valid)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |old(#length)| |#length|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))] [2018-02-04 20:30:45,106 INFO L134 CoverageAnalysis]: Checked inductivity of 795 backedges. 30 proven. 269 refuted. 0 times theorem prover too weak. 496 trivial. 0 not checked. [2018-02-04 20:30:45,106 INFO L409 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-02-04 20:30:45,106 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-02-04 20:30:45,106 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=52, Invalid=220, Unknown=0, NotChecked=0, Total=272 [2018-02-04 20:30:45,106 INFO L87 Difference]: Start difference. First operand 245 states and 266 transitions. Second operand 17 states. [2018-02-04 20:30:46,240 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 20:30:46,240 INFO L93 Difference]: Finished difference Result 304 states and 331 transitions. [2018-02-04 20:30:46,240 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2018-02-04 20:30:46,240 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 159 [2018-02-04 20:30:46,240 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 20:30:46,241 INFO L225 Difference]: With dead ends: 304 [2018-02-04 20:30:46,242 INFO L226 Difference]: Without dead ends: 297 [2018-02-04 20:30:46,242 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 66 GetRequests, 34 SyntacticMatches, 0 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 153 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=185, Invalid=937, Unknown=0, NotChecked=0, Total=1122 [2018-02-04 20:30:46,243 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 297 states. [2018-02-04 20:30:46,247 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 297 to 246. [2018-02-04 20:30:46,247 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 246 states. [2018-02-04 20:30:46,248 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 246 states to 246 states and 268 transitions. [2018-02-04 20:30:46,249 INFO L78 Accepts]: Start accepts. Automaton has 246 states and 268 transitions. Word has length 159 [2018-02-04 20:30:46,249 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 20:30:46,249 INFO L432 AbstractCegarLoop]: Abstraction has 246 states and 268 transitions. [2018-02-04 20:30:46,249 INFO L433 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-02-04 20:30:46,249 INFO L276 IsEmpty]: Start isEmpty. Operand 246 states and 268 transitions. [2018-02-04 20:30:46,251 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 165 [2018-02-04 20:30:46,251 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 20:30:46,251 INFO L351 BasicCegarLoop]: trace histogram [35, 6, 6, 6, 6, 6, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 20:30:46,251 INFO L371 AbstractCegarLoop]: === Iteration 12 === [l3_destroyErr0RequiresViolation, l3_destroyErr3RequiresViolation, l3_destroyErr1RequiresViolation, l3_destroyErr2RequiresViolation, l3_destroyErr4RequiresViolation, l3_destroyErr5RequiresViolation, l0_insertErr3RequiresViolation, l0_insertErr1RequiresViolation, l0_insertErr5RequiresViolation, l0_insertErr2RequiresViolation, l0_insertErr4RequiresViolation, l0_insertErr0RequiresViolation, l4_destroyErr4RequiresViolation, l4_destroyErr6RequiresViolation, l4_destroyErr2RequiresViolation, l4_destroyErr3RequiresViolation, l4_destroyErr1RequiresViolation, l4_destroyErr7RequiresViolation, l4_destroyErr0RequiresViolation, l4_destroyErr5RequiresViolation, l2_insertErr3RequiresViolation, l2_insertErr5RequiresViolation, l2_insertErr0RequiresViolation, l2_insertErr1RequiresViolation, l2_insertErr4RequiresViolation, l2_insertErr2RequiresViolation, mainErr1RequiresViolation, mainErr2EnsuresViolation, mainErr0RequiresViolation, l3_insertErr4RequiresViolation, l3_insertErr0RequiresViolation, l3_insertErr5RequiresViolation, l3_insertErr3RequiresViolation, l3_insertErr1RequiresViolation, l3_insertErr2RequiresViolation, l1_insertErr4RequiresViolation, l1_insertErr0RequiresViolation, l1_insertErr2RequiresViolation, l1_insertErr3RequiresViolation, l1_insertErr1RequiresViolation, l1_insertErr5RequiresViolation, l0_destroyErr5RequiresViolation, l0_destroyErr3RequiresViolation, l0_destroyErr1RequiresViolation, l0_destroyErr0RequiresViolation, l0_destroyErr4RequiresViolation, l0_destroyErr2RequiresViolation, calloc_modelErr0RequiresViolation, calloc_modelErr1RequiresViolation, l4_insertErr5RequiresViolation, l4_insertErr3RequiresViolation, l4_insertErr4RequiresViolation, l4_insertErr6RequiresViolation, l4_insertErr2RequiresViolation, l4_insertErr0RequiresViolation, l4_insertErr1RequiresViolation, l4_insertErr7RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr0RequiresViolation, l1_destroyErr2RequiresViolation, l1_destroyErr4RequiresViolation, l1_destroyErr0RequiresViolation, l1_destroyErr1RequiresViolation, l1_destroyErr5RequiresViolation, l1_destroyErr3RequiresViolation, l2_destroyErr1RequiresViolation, l2_destroyErr0RequiresViolation, l2_destroyErr2RequiresViolation, l2_destroyErr4RequiresViolation, l2_destroyErr5RequiresViolation, l2_destroyErr3RequiresViolation]=== [2018-02-04 20:30:46,251 INFO L82 PathProgramCache]: Analyzing trace with hash -1091365036, now seen corresponding path program 7 times No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 13 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-02-04 20:30:46,255 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 20:30:46,345 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:46,362 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:46,378 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:46,406 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:46,488 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:46,567 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:46,571 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:46,573 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:46,578 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:46,583 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:46,586 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:46,590 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:46,594 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:46,597 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:46,602 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:46,606 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:46,610 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:46,630 INFO L134 CoverageAnalysis]: Checked inductivity of 980 backedges. 30 proven. 336 refuted. 0 times theorem prover too weak. 614 trivial. 0 not checked. [2018-02-04 20:30:46,647 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 20:30:46,648 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18] total 18 [2018-02-04 20:30:46,648 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 20:30:46,648 INFO L134 CoverageAnalysis]: Checked inductivity of 250 backedges. 0 proven. 84 refuted. 0 times theorem prover too weak. 166 trivial. 0 not checked. [2018-02-04 20:30:46,649 INFO L182 omatonBuilderFactory]: Interpolants [8001#(not (= 8 |zalloc_or_die_#in~size|)), 8002#(= (mod (* (mod |calloc_model_#in~nmemb| 4294967296) (mod |calloc_model_#in~size| 4294967296)) 4294967296) (mod (* (mod calloc_model_~nmemb 4294967296) (mod calloc_model_~size 4294967296)) 4294967296)), 7847#true, 7848#false, 7979#(and (= |~#list~0.base| |old(~#list~0.base)|) (= |#valid| |old(#valid)|) (= |~#list~0.offset| |old(~#list~0.offset)|) (= |#NULL.base| |old(#NULL.base)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |old(#length)| |#length|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)), 7980#(and (= |#valid| |old(#valid)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |old(#length)| |#length|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)), 7981#(or (and (not (= zalloc_or_die_~size 8)) (not (= |zalloc_or_die_#in~size| 8))) (and (= zalloc_or_die_~size 8) (= |zalloc_or_die_#in~size| 8))), 8015#(not (= (mod (* (mod |calloc_model_#in~nmemb| 4294967296) (mod |calloc_model_#in~size| 4294967296)) 4294967296) 8)), 8016#(and (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)), 8017#(= 0 |#Ultimate.C_memset_#t~loopctr42|), 8018#(= 1 |#Ultimate.C_memset_#t~loopctr42|), 8019#(= |#Ultimate.C_memset_#t~loopctr42| 2), 8020#(= |#Ultimate.C_memset_#t~loopctr42| 3), 8021#(<= |#Ultimate.C_memset_#t~loopctr42| 4), 8022#(<= |#Ultimate.C_memset_#t~loopctr42| 5), 8023#(<= |#Ultimate.C_memset_#t~loopctr42| 6), 8024#(<= |#Ultimate.C_memset_#t~loopctr42| 7), 8025#(not (= 8 |#Ultimate.C_memset_#amount|))] [2018-02-04 20:30:46,649 INFO L134 CoverageAnalysis]: Checked inductivity of 980 backedges. 30 proven. 336 refuted. 0 times theorem prover too weak. 614 trivial. 0 not checked. [2018-02-04 20:30:46,649 INFO L409 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-02-04 20:30:46,649 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-02-04 20:30:46,650 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=58, Invalid=248, Unknown=0, NotChecked=0, Total=306 [2018-02-04 20:30:46,650 INFO L87 Difference]: Start difference. First operand 246 states and 268 transitions. Second operand 18 states. [2018-02-04 20:30:47,910 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 20:30:47,910 INFO L93 Difference]: Finished difference Result 307 states and 335 transitions. [2018-02-04 20:30:47,910 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2018-02-04 20:30:47,910 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 164 [2018-02-04 20:30:47,910 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 20:30:47,911 INFO L225 Difference]: With dead ends: 307 [2018-02-04 20:30:47,911 INFO L226 Difference]: Without dead ends: 300 [2018-02-04 20:30:47,912 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 68 GetRequests, 34 SyntacticMatches, 0 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 172 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=203, Invalid=1057, Unknown=0, NotChecked=0, Total=1260 [2018-02-04 20:30:47,912 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 300 states. [2018-02-04 20:30:47,917 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 300 to 247. [2018-02-04 20:30:47,917 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 247 states. [2018-02-04 20:30:47,918 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 247 states to 247 states and 270 transitions. [2018-02-04 20:30:47,918 INFO L78 Accepts]: Start accepts. Automaton has 247 states and 270 transitions. Word has length 164 [2018-02-04 20:30:47,918 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 20:30:47,918 INFO L432 AbstractCegarLoop]: Abstraction has 247 states and 270 transitions. [2018-02-04 20:30:47,918 INFO L433 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-02-04 20:30:47,919 INFO L276 IsEmpty]: Start isEmpty. Operand 247 states and 270 transitions. [2018-02-04 20:30:47,919 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 170 [2018-02-04 20:30:47,919 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 20:30:47,920 INFO L351 BasicCegarLoop]: trace histogram [40, 6, 6, 6, 6, 6, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 20:30:47,920 INFO L371 AbstractCegarLoop]: === Iteration 13 === [l3_destroyErr0RequiresViolation, l3_destroyErr3RequiresViolation, l3_destroyErr1RequiresViolation, l3_destroyErr2RequiresViolation, l3_destroyErr4RequiresViolation, l3_destroyErr5RequiresViolation, l0_insertErr3RequiresViolation, l0_insertErr1RequiresViolation, l0_insertErr5RequiresViolation, l0_insertErr2RequiresViolation, l0_insertErr4RequiresViolation, l0_insertErr0RequiresViolation, l4_destroyErr4RequiresViolation, l4_destroyErr6RequiresViolation, l4_destroyErr2RequiresViolation, l4_destroyErr3RequiresViolation, l4_destroyErr1RequiresViolation, l4_destroyErr7RequiresViolation, l4_destroyErr0RequiresViolation, l4_destroyErr5RequiresViolation, l2_insertErr3RequiresViolation, l2_insertErr5RequiresViolation, l2_insertErr0RequiresViolation, l2_insertErr1RequiresViolation, l2_insertErr4RequiresViolation, l2_insertErr2RequiresViolation, mainErr1RequiresViolation, mainErr2EnsuresViolation, mainErr0RequiresViolation, l3_insertErr4RequiresViolation, l3_insertErr0RequiresViolation, l3_insertErr5RequiresViolation, l3_insertErr3RequiresViolation, l3_insertErr1RequiresViolation, l3_insertErr2RequiresViolation, l1_insertErr4RequiresViolation, l1_insertErr0RequiresViolation, l1_insertErr2RequiresViolation, l1_insertErr3RequiresViolation, l1_insertErr1RequiresViolation, l1_insertErr5RequiresViolation, l0_destroyErr5RequiresViolation, l0_destroyErr3RequiresViolation, l0_destroyErr1RequiresViolation, l0_destroyErr0RequiresViolation, l0_destroyErr4RequiresViolation, l0_destroyErr2RequiresViolation, calloc_modelErr0RequiresViolation, calloc_modelErr1RequiresViolation, l4_insertErr5RequiresViolation, l4_insertErr3RequiresViolation, l4_insertErr4RequiresViolation, l4_insertErr6RequiresViolation, l4_insertErr2RequiresViolation, l4_insertErr0RequiresViolation, l4_insertErr1RequiresViolation, l4_insertErr7RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr0RequiresViolation, l1_destroyErr2RequiresViolation, l1_destroyErr4RequiresViolation, l1_destroyErr0RequiresViolation, l1_destroyErr1RequiresViolation, l1_destroyErr5RequiresViolation, l1_destroyErr3RequiresViolation, l2_destroyErr1RequiresViolation, l2_destroyErr0RequiresViolation, l2_destroyErr2RequiresViolation, l2_destroyErr4RequiresViolation, l2_destroyErr5RequiresViolation, l2_destroyErr3RequiresViolation]=== [2018-02-04 20:30:47,920 INFO L82 PathProgramCache]: Analyzing trace with hash -1663106319, now seen corresponding path program 8 times No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 14 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-02-04 20:30:47,924 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 20:30:47,962 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:47,968 WARN L195 Executor]: ExternalInterpolator (z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in) stderr output: WARNING: array quantifier WARNING: array quantifier WARNING: array quantifier [2018-02-04 20:30:47,974 WARN L251 NnfTransformerHelper]: thrown away annotations [(:qid itp)] [2018-02-04 20:30:47,975 WARN L251 NnfTransformerHelper]: thrown away annotations [(:qid itp)] [2018-02-04 20:30:47,975 WARN L251 NnfTransformerHelper]: thrown away annotations [(:qid itp)] [2018-02-04 20:30:47,975 WARN L251 NnfTransformerHelper]: thrown away annotations [(:qid itp)] [2018-02-04 20:30:47,982 WARN L251 NnfTransformerHelper]: thrown away annotations [(:qid itp)] [2018-02-04 20:30:47,982 WARN L251 NnfTransformerHelper]: thrown away annotations [(:qid itp)] [2018-02-04 20:30:47,982 WARN L251 NnfTransformerHelper]: thrown away annotations [(:qid itp)] [2018-02-04 20:30:47,982 WARN L251 NnfTransformerHelper]: thrown away annotations [(:qid itp)] [2018-02-04 20:30:47,985 WARN L307 Elim1Store]: Array PQE input equivalent to false [2018-02-04 20:30:47,985 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-02-04 20:30:48,062 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:48,082 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:48,086 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:48,099 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:48,105 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:48,109 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:48,113 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:48,119 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:48,125 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:48,129 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:48,137 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:48,144 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:48,148 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:48,154 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:48,158 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:48,162 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:48,175 INFO L134 CoverageAnalysis]: Checked inductivity of 1190 backedges. 20 proven. 10 refuted. 0 times theorem prover too weak. 1160 trivial. 0 not checked. [2018-02-04 20:30:48,191 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 20:30:48,191 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10] total 10 [2018-02-04 20:30:48,191 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 20:30:48,192 INFO L134 CoverageAnalysis]: Checked inductivity of 260 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 260 trivial. 0 not checked. [2018-02-04 20:30:48,192 INFO L182 omatonBuilderFactory]: Interpolants [8880#(exists ((%0 (Array Int Int))) (! (and (= |calloc_model_#in~nmemb| 1) (forall ((%1 Int)) (! (= (store %0 %1 119) (store |#length| %1 119)) :qid itp)) (= |calloc_model_#in~size| 119)) :qid itp)), 8881#(exists ((%0 (Array Int Int))) (! (and (= (ite (<= (mod (* (mod calloc_model_~nmemb 4294967296) (mod calloc_model_~size 4294967296)) 4294967296) 2147483647) (mod (* (mod calloc_model_~nmemb 4294967296) (mod calloc_model_~size 4294967296)) 4294967296) (+ (- 4294967296) (mod (* (mod calloc_model_~nmemb 4294967296) (mod calloc_model_~size 4294967296)) 4294967296))) 119) (forall ((%1 Int)) (! (= (store %0 %1 119) (store |#length| %1 119)) :qid itp))) :qid itp)), 8882#(and (= 119 (mod (* (mod calloc_model_~nmemb 4294967296) (mod calloc_model_~size 4294967296)) 4294967296)) (= 119 (select |#length| |calloc_model_#t~malloc0.base|)) (= 0 |calloc_model_#t~malloc0.offset|)), 8883#(and (<= 0 calloc_model_~ptr~0.offset) (or (and (< 2147483647 (mod (* (mod calloc_model_~nmemb 4294967296) (mod calloc_model_~size 4294967296)) 4294967296)) (<= (+ (mod (* (mod calloc_model_~nmemb 4294967296) (mod calloc_model_~size 4294967296)) 4294967296) calloc_model_~ptr~0.offset) (+ (select |#length| calloc_model_~ptr~0.base) 4294967296))) (<= (+ (mod (* (mod calloc_model_~nmemb 4294967296) (mod calloc_model_~size 4294967296)) 4294967296) calloc_model_~ptr~0.offset) (select |#length| calloc_model_~ptr~0.base)))), 8884#(and (= |~#list~0.base| |old(~#list~0.base)|) (= |#valid| |old(#valid)|) (= |~#list~0.offset| |old(~#list~0.offset)|) (= |#NULL.base| |old(#NULL.base)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |old(#length)| |#length|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)), 8741#true, 8885#(and (= |#valid| |old(#valid)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |old(#length)| |#length|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)), 8742#false, 8919#(and (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)), 8878#(= |zalloc_or_die_#in~size| 119), 8879#(= 119 zalloc_or_die_~size)] [2018-02-04 20:30:48,192 INFO L134 CoverageAnalysis]: Checked inductivity of 1190 backedges. 20 proven. 10 refuted. 0 times theorem prover too weak. 1160 trivial. 0 not checked. [2018-02-04 20:30:48,192 INFO L409 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-02-04 20:30:48,192 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-02-04 20:30:48,192 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=87, Unknown=1, NotChecked=0, Total=110 [2018-02-04 20:30:48,193 INFO L87 Difference]: Start difference. First operand 247 states and 270 transitions. Second operand 11 states. [2018-02-04 20:30:48,346 WARN L1011 $PredicateComparison]: unable to prove that (and (= |c_~#list~0.base| |c_old(~#list~0.base)|) (= |c_#valid| |c_old(#valid)|) (= |c_~#list~0.offset| |c_old(~#list~0.offset)|) (= |c_#NULL.base| |c_old(#NULL.base)|) (exists ((%0 (Array Int Int))) (! (and (= |c_calloc_model_#in~nmemb| 1) (forall ((%1 Int)) (! (= (store %0 %1 119) (store |c_#length| %1 119)) :qid itp)) (= |c_calloc_model_#in~size| 119)) :qid itp)) (= |c_#NULL.offset| |c_old(#NULL.offset)|) (= |c_#memory_$Pointer$.base| |c_old(#memory_$Pointer$.base)|) (= |c_old(#length)| |c_#length|) (= |c_#memory_$Pointer$.offset| |c_old(#memory_$Pointer$.offset)|)) is different from false [2018-02-04 20:30:49,002 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 20:30:49,002 INFO L93 Difference]: Finished difference Result 277 states and 305 transitions. [2018-02-04 20:30:49,003 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-02-04 20:30:49,003 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 169 [2018-02-04 20:30:49,003 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 20:30:49,004 INFO L225 Difference]: With dead ends: 277 [2018-02-04 20:30:49,004 INFO L226 Difference]: Without dead ends: 277 [2018-02-04 20:30:49,005 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 44 GetRequests, 30 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=47, Invalid=164, Unknown=3, NotChecked=26, Total=240 [2018-02-04 20:30:49,005 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 277 states. [2018-02-04 20:30:49,009 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 277 to 246. [2018-02-04 20:30:49,009 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 246 states. [2018-02-04 20:30:49,010 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 246 states to 246 states and 269 transitions. [2018-02-04 20:30:49,010 INFO L78 Accepts]: Start accepts. Automaton has 246 states and 269 transitions. Word has length 169 [2018-02-04 20:30:49,011 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 20:30:49,011 INFO L432 AbstractCegarLoop]: Abstraction has 246 states and 269 transitions. [2018-02-04 20:30:49,011 INFO L433 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-02-04 20:30:49,011 INFO L276 IsEmpty]: Start isEmpty. Operand 246 states and 269 transitions. [2018-02-04 20:30:49,013 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 183 [2018-02-04 20:30:49,013 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 20:30:49,013 INFO L351 BasicCegarLoop]: trace histogram [40, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 20:30:49,013 INFO L371 AbstractCegarLoop]: === Iteration 14 === [l3_destroyErr0RequiresViolation, l3_destroyErr3RequiresViolation, l3_destroyErr1RequiresViolation, l3_destroyErr2RequiresViolation, l3_destroyErr4RequiresViolation, l3_destroyErr5RequiresViolation, l0_insertErr3RequiresViolation, l0_insertErr1RequiresViolation, l0_insertErr5RequiresViolation, l0_insertErr2RequiresViolation, l0_insertErr4RequiresViolation, l0_insertErr0RequiresViolation, l4_destroyErr4RequiresViolation, l4_destroyErr6RequiresViolation, l4_destroyErr2RequiresViolation, l4_destroyErr3RequiresViolation, l4_destroyErr1RequiresViolation, l4_destroyErr7RequiresViolation, l4_destroyErr0RequiresViolation, l4_destroyErr5RequiresViolation, l2_insertErr3RequiresViolation, l2_insertErr5RequiresViolation, l2_insertErr0RequiresViolation, l2_insertErr1RequiresViolation, l2_insertErr4RequiresViolation, l2_insertErr2RequiresViolation, mainErr1RequiresViolation, mainErr2EnsuresViolation, mainErr0RequiresViolation, l3_insertErr4RequiresViolation, l3_insertErr0RequiresViolation, l3_insertErr5RequiresViolation, l3_insertErr3RequiresViolation, l3_insertErr1RequiresViolation, l3_insertErr2RequiresViolation, l1_insertErr4RequiresViolation, l1_insertErr0RequiresViolation, l1_insertErr2RequiresViolation, l1_insertErr3RequiresViolation, l1_insertErr1RequiresViolation, l1_insertErr5RequiresViolation, l0_destroyErr5RequiresViolation, l0_destroyErr3RequiresViolation, l0_destroyErr1RequiresViolation, l0_destroyErr0RequiresViolation, l0_destroyErr4RequiresViolation, l0_destroyErr2RequiresViolation, calloc_modelErr0RequiresViolation, calloc_modelErr1RequiresViolation, l4_insertErr5RequiresViolation, l4_insertErr3RequiresViolation, l4_insertErr4RequiresViolation, l4_insertErr6RequiresViolation, l4_insertErr2RequiresViolation, l4_insertErr0RequiresViolation, l4_insertErr1RequiresViolation, l4_insertErr7RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr0RequiresViolation, l1_destroyErr2RequiresViolation, l1_destroyErr4RequiresViolation, l1_destroyErr0RequiresViolation, l1_destroyErr1RequiresViolation, l1_destroyErr5RequiresViolation, l1_destroyErr3RequiresViolation, l2_destroyErr1RequiresViolation, l2_destroyErr0RequiresViolation, l2_destroyErr2RequiresViolation, l2_destroyErr4RequiresViolation, l2_destroyErr5RequiresViolation, l2_destroyErr3RequiresViolation]=== [2018-02-04 20:30:49,013 INFO L82 PathProgramCache]: Analyzing trace with hash 2109030340, now seen corresponding path program 1 times No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 15 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-02-04 20:30:49,020 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 20:30:49,062 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:49,075 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:49,088 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:49,094 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:49,105 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:49,114 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:49,120 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:49,124 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:49,130 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:49,136 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:49,140 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:49,147 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:49,152 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:49,155 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:49,161 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:49,166 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:49,169 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:49,173 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:49,183 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:49,250 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:49,278 INFO L134 CoverageAnalysis]: Checked inductivity of 1290 backedges. 110 proven. 0 refuted. 0 times theorem prover too weak. 1180 trivial. 0 not checked. [2018-02-04 20:30:49,295 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-02-04 20:30:49,295 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2018-02-04 20:30:49,295 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 20:30:49,295 INFO L134 CoverageAnalysis]: Checked inductivity of 275 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 270 trivial. 0 not checked. [2018-02-04 20:30:49,296 INFO L182 omatonBuilderFactory]: Interpolants [9585#true, 9921#(not (= 119 |zalloc_or_die_#in~size|)), 9586#false, 9922#(and (= |calloc_model_#in~size| calloc_model_~size) (= (mod (* (mod |calloc_model_#in~nmemb| 4294967296) (mod calloc_model_~size 4294967296)) 4294967296) (mod (* (mod calloc_model_~nmemb 4294967296) (mod calloc_model_~size 4294967296)) 4294967296))), 9908#(= zalloc_or_die_~size |zalloc_or_die_#in~size|), 9928#(or (not (= (mod |calloc_model_#in~nmemb| 4294967296) 1)) (not (= |calloc_model_#in~size| 119))), 9929#(= 0 |#Ultimate.C_memset_#t~loopctr42|), 9930#(<= |#Ultimate.C_memset_#amount| 0), 9740#(and (= |~#list~0.base| |old(~#list~0.base)|) (= |#valid| |old(#valid)|) (= |~#list~0.offset| |old(~#list~0.offset)|) (= |#NULL.base| |old(#NULL.base)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |old(#length)| |#length|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)), 9741#(and (= |#valid| |old(#valid)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |old(#length)| |#length|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)), 9775#(and (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))] [2018-02-04 20:30:49,296 INFO L134 CoverageAnalysis]: Checked inductivity of 1290 backedges. 110 proven. 0 refuted. 0 times theorem prover too weak. 1180 trivial. 0 not checked. [2018-02-04 20:30:49,296 INFO L409 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-02-04 20:30:49,296 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-02-04 20:30:49,296 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=88, Unknown=0, NotChecked=0, Total=110 [2018-02-04 20:30:49,296 INFO L87 Difference]: Start difference. First operand 246 states and 269 transitions. Second operand 11 states. [2018-02-04 20:30:53,103 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 20:30:53,104 INFO L93 Difference]: Finished difference Result 284 states and 311 transitions. [2018-02-04 20:30:53,104 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-02-04 20:30:53,104 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 182 [2018-02-04 20:30:53,105 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 20:30:53,106 INFO L225 Difference]: With dead ends: 284 [2018-02-04 20:30:53,106 INFO L226 Difference]: Without dead ends: 275 [2018-02-04 20:30:53,106 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 59 GetRequests, 37 SyntacticMatches, 0 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 86 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=109, Invalid=443, Unknown=0, NotChecked=0, Total=552 [2018-02-04 20:30:53,107 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 275 states. [2018-02-04 20:30:53,110 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 275 to 246. [2018-02-04 20:30:53,110 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 246 states. [2018-02-04 20:30:53,115 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 246 states to 246 states and 268 transitions. [2018-02-04 20:30:53,115 INFO L78 Accepts]: Start accepts. Automaton has 246 states and 268 transitions. Word has length 182 [2018-02-04 20:30:53,116 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 20:30:53,116 INFO L432 AbstractCegarLoop]: Abstraction has 246 states and 268 transitions. [2018-02-04 20:30:53,116 INFO L433 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-02-04 20:30:53,116 INFO L276 IsEmpty]: Start isEmpty. Operand 246 states and 268 transitions. [2018-02-04 20:30:53,117 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 184 [2018-02-04 20:30:53,117 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 20:30:53,118 INFO L351 BasicCegarLoop]: trace histogram [41, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 20:30:53,118 INFO L371 AbstractCegarLoop]: === Iteration 15 === [l3_destroyErr0RequiresViolation, l3_destroyErr3RequiresViolation, l3_destroyErr1RequiresViolation, l3_destroyErr2RequiresViolation, l3_destroyErr4RequiresViolation, l3_destroyErr5RequiresViolation, l0_insertErr3RequiresViolation, l0_insertErr1RequiresViolation, l0_insertErr5RequiresViolation, l0_insertErr2RequiresViolation, l0_insertErr4RequiresViolation, l0_insertErr0RequiresViolation, l4_destroyErr4RequiresViolation, l4_destroyErr6RequiresViolation, l4_destroyErr2RequiresViolation, l4_destroyErr3RequiresViolation, l4_destroyErr1RequiresViolation, l4_destroyErr7RequiresViolation, l4_destroyErr0RequiresViolation, l4_destroyErr5RequiresViolation, l2_insertErr3RequiresViolation, l2_insertErr5RequiresViolation, l2_insertErr0RequiresViolation, l2_insertErr1RequiresViolation, l2_insertErr4RequiresViolation, l2_insertErr2RequiresViolation, mainErr1RequiresViolation, mainErr2EnsuresViolation, mainErr0RequiresViolation, l3_insertErr4RequiresViolation, l3_insertErr0RequiresViolation, l3_insertErr5RequiresViolation, l3_insertErr3RequiresViolation, l3_insertErr1RequiresViolation, l3_insertErr2RequiresViolation, l1_insertErr4RequiresViolation, l1_insertErr0RequiresViolation, l1_insertErr2RequiresViolation, l1_insertErr3RequiresViolation, l1_insertErr1RequiresViolation, l1_insertErr5RequiresViolation, l0_destroyErr5RequiresViolation, l0_destroyErr3RequiresViolation, l0_destroyErr1RequiresViolation, l0_destroyErr0RequiresViolation, l0_destroyErr4RequiresViolation, l0_destroyErr2RequiresViolation, calloc_modelErr0RequiresViolation, calloc_modelErr1RequiresViolation, l4_insertErr5RequiresViolation, l4_insertErr3RequiresViolation, l4_insertErr4RequiresViolation, l4_insertErr6RequiresViolation, l4_insertErr2RequiresViolation, l4_insertErr0RequiresViolation, l4_insertErr1RequiresViolation, l4_insertErr7RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr0RequiresViolation, l1_destroyErr2RequiresViolation, l1_destroyErr4RequiresViolation, l1_destroyErr0RequiresViolation, l1_destroyErr1RequiresViolation, l1_destroyErr5RequiresViolation, l1_destroyErr3RequiresViolation, l2_destroyErr1RequiresViolation, l2_destroyErr0RequiresViolation, l2_destroyErr2RequiresViolation, l2_destroyErr4RequiresViolation, l2_destroyErr5RequiresViolation, l2_destroyErr3RequiresViolation]=== [2018-02-04 20:30:53,118 INFO L82 PathProgramCache]: Analyzing trace with hash -438624247, now seen corresponding path program 2 times No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 16 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-02-04 20:30:53,121 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 20:30:53,164 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:53,180 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:53,191 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:53,199 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:53,214 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:53,221 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:53,227 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:53,231 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:53,237 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:53,243 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:53,247 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:53,253 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:53,259 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:53,263 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:53,270 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:53,275 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:53,279 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:53,286 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:53,303 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:53,385 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:53,421 INFO L134 CoverageAnalysis]: Checked inductivity of 1336 backedges. 155 proven. 1 refuted. 0 times theorem prover too weak. 1180 trivial. 0 not checked. [2018-02-04 20:30:53,439 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 20:30:53,439 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12] total 12 [2018-02-04 20:30:53,439 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 20:30:53,439 INFO L134 CoverageAnalysis]: Checked inductivity of 280 backedges. 10 proven. 0 refuted. 0 times theorem prover too weak. 270 trivial. 0 not checked. [2018-02-04 20:30:53,440 INFO L182 omatonBuilderFactory]: Interpolants [10833#(not (= (mod (* (mod |calloc_model_#in~nmemb| 4294967296) (mod |calloc_model_#in~size| 4294967296)) 4294967296) 119)), 10834#(= 0 |#Ultimate.C_memset_#t~loopctr42|), 10643#(and (= |~#list~0.base| |old(~#list~0.base)|) (= |#valid| |old(#valid)|) (= |~#list~0.offset| |old(~#list~0.offset)|) (= |#NULL.base| |old(#NULL.base)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |old(#length)| |#length|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)), 10835#(= 1 |#Ultimate.C_memset_#t~loopctr42|), 10644#(and (= |#valid| |old(#valid)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |old(#length)| |#length|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)), 10836#(not (= |#Ultimate.C_memset_#amount| 119)), 10678#(and (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)), 10487#true, 10488#false, 10825#(not (= 119 |zalloc_or_die_#in~size|)), 10826#(= (mod (* (mod |calloc_model_#in~nmemb| 4294967296) (mod |calloc_model_#in~size| 4294967296)) 4294967296) (mod (* (mod calloc_model_~nmemb 4294967296) (mod calloc_model_~size 4294967296)) 4294967296)), 10811#(or (and (not (= zalloc_or_die_~size 119)) (not (= |zalloc_or_die_#in~size| 119))) (and (= zalloc_or_die_~size 119) (= |zalloc_or_die_#in~size| 119)))] [2018-02-04 20:30:53,440 INFO L134 CoverageAnalysis]: Checked inductivity of 1336 backedges. 155 proven. 1 refuted. 0 times theorem prover too weak. 1180 trivial. 0 not checked. [2018-02-04 20:30:53,440 INFO L409 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-02-04 20:30:53,440 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-02-04 20:30:53,440 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=108, Unknown=0, NotChecked=0, Total=132 [2018-02-04 20:30:53,440 INFO L87 Difference]: Start difference. First operand 246 states and 268 transitions. Second operand 12 states. [2018-02-04 20:30:54,337 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 20:30:54,337 INFO L93 Difference]: Finished difference Result 284 states and 310 transitions. [2018-02-04 20:30:54,337 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-02-04 20:30:54,337 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 183 [2018-02-04 20:30:54,338 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 20:30:54,339 INFO L225 Difference]: With dead ends: 284 [2018-02-04 20:30:54,339 INFO L226 Difference]: Without dead ends: 275 [2018-02-04 20:30:54,340 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 58 GetRequests, 39 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 49 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=75, Invalid=345, Unknown=0, NotChecked=0, Total=420 [2018-02-04 20:30:54,340 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 275 states. [2018-02-04 20:30:54,343 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 275 to 246. [2018-02-04 20:30:54,344 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 246 states. [2018-02-04 20:30:54,344 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 246 states to 246 states and 267 transitions. [2018-02-04 20:30:54,344 INFO L78 Accepts]: Start accepts. Automaton has 246 states and 267 transitions. Word has length 183 [2018-02-04 20:30:54,345 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 20:30:54,345 INFO L432 AbstractCegarLoop]: Abstraction has 246 states and 267 transitions. [2018-02-04 20:30:54,345 INFO L433 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-02-04 20:30:54,345 INFO L276 IsEmpty]: Start isEmpty. Operand 246 states and 267 transitions. [2018-02-04 20:30:54,345 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 185 [2018-02-04 20:30:54,346 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 20:30:54,346 INFO L351 BasicCegarLoop]: trace histogram [42, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 20:30:54,346 INFO L371 AbstractCegarLoop]: === Iteration 16 === [l3_destroyErr0RequiresViolation, l3_destroyErr3RequiresViolation, l3_destroyErr1RequiresViolation, l3_destroyErr2RequiresViolation, l3_destroyErr4RequiresViolation, l3_destroyErr5RequiresViolation, l0_insertErr3RequiresViolation, l0_insertErr1RequiresViolation, l0_insertErr5RequiresViolation, l0_insertErr2RequiresViolation, l0_insertErr4RequiresViolation, l0_insertErr0RequiresViolation, l4_destroyErr4RequiresViolation, l4_destroyErr6RequiresViolation, l4_destroyErr2RequiresViolation, l4_destroyErr3RequiresViolation, l4_destroyErr1RequiresViolation, l4_destroyErr7RequiresViolation, l4_destroyErr0RequiresViolation, l4_destroyErr5RequiresViolation, l2_insertErr3RequiresViolation, l2_insertErr5RequiresViolation, l2_insertErr0RequiresViolation, l2_insertErr1RequiresViolation, l2_insertErr4RequiresViolation, l2_insertErr2RequiresViolation, mainErr1RequiresViolation, mainErr2EnsuresViolation, mainErr0RequiresViolation, l3_insertErr4RequiresViolation, l3_insertErr0RequiresViolation, l3_insertErr5RequiresViolation, l3_insertErr3RequiresViolation, l3_insertErr1RequiresViolation, l3_insertErr2RequiresViolation, l1_insertErr4RequiresViolation, l1_insertErr0RequiresViolation, l1_insertErr2RequiresViolation, l1_insertErr3RequiresViolation, l1_insertErr1RequiresViolation, l1_insertErr5RequiresViolation, l0_destroyErr5RequiresViolation, l0_destroyErr3RequiresViolation, l0_destroyErr1RequiresViolation, l0_destroyErr0RequiresViolation, l0_destroyErr4RequiresViolation, l0_destroyErr2RequiresViolation, calloc_modelErr0RequiresViolation, calloc_modelErr1RequiresViolation, l4_insertErr5RequiresViolation, l4_insertErr3RequiresViolation, l4_insertErr4RequiresViolation, l4_insertErr6RequiresViolation, l4_insertErr2RequiresViolation, l4_insertErr0RequiresViolation, l4_insertErr1RequiresViolation, l4_insertErr7RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr0RequiresViolation, l1_destroyErr2RequiresViolation, l1_destroyErr4RequiresViolation, l1_destroyErr0RequiresViolation, l1_destroyErr1RequiresViolation, l1_destroyErr5RequiresViolation, l1_destroyErr3RequiresViolation, l2_destroyErr1RequiresViolation, l2_destroyErr0RequiresViolation, l2_destroyErr2RequiresViolation, l2_destroyErr4RequiresViolation, l2_destroyErr5RequiresViolation, l2_destroyErr3RequiresViolation]=== [2018-02-04 20:30:54,346 INFO L82 PathProgramCache]: Analyzing trace with hash -2106505116, now seen corresponding path program 3 times No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 17 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-02-04 20:30:54,348 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 20:30:54,382 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:54,395 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:54,404 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:54,408 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:54,414 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:54,420 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:54,424 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:54,427 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:54,432 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:54,437 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:54,440 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:54,445 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:54,449 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:54,453 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:54,458 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:54,462 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:54,465 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:54,470 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:54,485 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:55,123 WARN L146 SmtUtils]: Spent 622ms on a formula simplification. DAG size of input: 40 DAG size of output 22 [2018-02-04 20:30:55,135 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:55,185 INFO L134 CoverageAnalysis]: Checked inductivity of 1383 backedges. 200 proven. 3 refuted. 0 times theorem prover too weak. 1180 trivial. 0 not checked. [2018-02-04 20:30:55,201 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 20:30:55,201 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13] total 13 [2018-02-04 20:30:55,201 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 20:30:55,202 INFO L134 CoverageAnalysis]: Checked inductivity of 285 backedges. 15 proven. 0 refuted. 0 times theorem prover too weak. 270 trivial. 0 not checked. [2018-02-04 20:30:55,202 INFO L182 omatonBuilderFactory]: Interpolants [11725#(not (= 119 |zalloc_or_die_#in~size|)), 11726#(and (= (mod (* (mod |calloc_model_#in~size| 4294967296) (mod calloc_model_~nmemb 4294967296)) 4294967296) (mod (* (mod calloc_model_~nmemb 4294967296) (mod calloc_model_~size 4294967296)) 4294967296)) (or (and (not (= calloc_model_~nmemb 1)) (not (= |calloc_model_#in~nmemb| 1))) (and (= |calloc_model_#in~nmemb| 1) (= calloc_model_~nmemb 1)))), 11542#(and (= |~#list~0.base| |old(~#list~0.base)|) (= |#valid| |old(#valid)|) (= |~#list~0.offset| |old(~#list~0.offset)|) (= |#NULL.base| |old(#NULL.base)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |old(#length)| |#length|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)), 11734#(or (not (= |calloc_model_#in~nmemb| 1)) (not (= (mod |calloc_model_#in~size| 4294967296) 119))), 11543#(and (= |#valid| |old(#valid)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |old(#length)| |#length|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)), 11735#(= 0 |#Ultimate.C_memset_#t~loopctr42|), 11736#(and (< 0 |#Ultimate.C_memset_#amount|) (= 1 |#Ultimate.C_memset_#t~loopctr42|)), 11385#true, 11577#(and (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)), 11737#(and (< 1 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#t~loopctr42| 2)), 11386#false, 11738#(and (< 1 |#Ultimate.C_memset_#amount|) (<= |#Ultimate.C_memset_#amount| 2)), 11710#(or (and (not (= zalloc_or_die_~size 119)) (not (= |zalloc_or_die_#in~size| 119))) (and (= zalloc_or_die_~size 119) (= |zalloc_or_die_#in~size| 119)))] [2018-02-04 20:30:55,202 INFO L134 CoverageAnalysis]: Checked inductivity of 1383 backedges. 200 proven. 3 refuted. 0 times theorem prover too weak. 1180 trivial. 0 not checked. [2018-02-04 20:30:55,202 INFO L409 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-02-04 20:30:55,203 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-02-04 20:30:55,203 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=26, Invalid=130, Unknown=0, NotChecked=0, Total=156 [2018-02-04 20:30:55,203 INFO L87 Difference]: Start difference. First operand 246 states and 267 transitions. Second operand 13 states. [2018-02-04 20:30:57,005 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 20:30:57,005 INFO L93 Difference]: Finished difference Result 284 states and 309 transitions. [2018-02-04 20:30:57,005 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-02-04 20:30:57,005 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 184 [2018-02-04 20:30:57,005 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 20:30:57,006 INFO L225 Difference]: With dead ends: 284 [2018-02-04 20:30:57,006 INFO L226 Difference]: Without dead ends: 275 [2018-02-04 20:30:57,006 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 57 GetRequests, 37 SyntacticMatches, 0 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 51 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=77, Invalid=385, Unknown=0, NotChecked=0, Total=462 [2018-02-04 20:30:57,006 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 275 states. [2018-02-04 20:30:57,008 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 275 to 246. [2018-02-04 20:30:57,008 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 246 states. [2018-02-04 20:30:57,009 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 246 states to 246 states and 266 transitions. [2018-02-04 20:30:57,009 INFO L78 Accepts]: Start accepts. Automaton has 246 states and 266 transitions. Word has length 184 [2018-02-04 20:30:57,009 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 20:30:57,009 INFO L432 AbstractCegarLoop]: Abstraction has 246 states and 266 transitions. [2018-02-04 20:30:57,009 INFO L433 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-02-04 20:30:57,009 INFO L276 IsEmpty]: Start isEmpty. Operand 246 states and 266 transitions. [2018-02-04 20:30:57,010 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 186 [2018-02-04 20:30:57,010 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 20:30:57,010 INFO L351 BasicCegarLoop]: trace histogram [43, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 20:30:57,010 INFO L371 AbstractCegarLoop]: === Iteration 17 === [l3_destroyErr0RequiresViolation, l3_destroyErr3RequiresViolation, l3_destroyErr1RequiresViolation, l3_destroyErr2RequiresViolation, l3_destroyErr4RequiresViolation, l3_destroyErr5RequiresViolation, l0_insertErr3RequiresViolation, l0_insertErr1RequiresViolation, l0_insertErr5RequiresViolation, l0_insertErr2RequiresViolation, l0_insertErr4RequiresViolation, l0_insertErr0RequiresViolation, l4_destroyErr4RequiresViolation, l4_destroyErr6RequiresViolation, l4_destroyErr2RequiresViolation, l4_destroyErr3RequiresViolation, l4_destroyErr1RequiresViolation, l4_destroyErr7RequiresViolation, l4_destroyErr0RequiresViolation, l4_destroyErr5RequiresViolation, l2_insertErr3RequiresViolation, l2_insertErr5RequiresViolation, l2_insertErr0RequiresViolation, l2_insertErr1RequiresViolation, l2_insertErr4RequiresViolation, l2_insertErr2RequiresViolation, mainErr1RequiresViolation, mainErr2EnsuresViolation, mainErr0RequiresViolation, l3_insertErr4RequiresViolation, l3_insertErr0RequiresViolation, l3_insertErr5RequiresViolation, l3_insertErr3RequiresViolation, l3_insertErr1RequiresViolation, l3_insertErr2RequiresViolation, l1_insertErr4RequiresViolation, l1_insertErr0RequiresViolation, l1_insertErr2RequiresViolation, l1_insertErr3RequiresViolation, l1_insertErr1RequiresViolation, l1_insertErr5RequiresViolation, l0_destroyErr5RequiresViolation, l0_destroyErr3RequiresViolation, l0_destroyErr1RequiresViolation, l0_destroyErr0RequiresViolation, l0_destroyErr4RequiresViolation, l0_destroyErr2RequiresViolation, calloc_modelErr0RequiresViolation, calloc_modelErr1RequiresViolation, l4_insertErr5RequiresViolation, l4_insertErr3RequiresViolation, l4_insertErr4RequiresViolation, l4_insertErr6RequiresViolation, l4_insertErr2RequiresViolation, l4_insertErr0RequiresViolation, l4_insertErr1RequiresViolation, l4_insertErr7RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr0RequiresViolation, l1_destroyErr2RequiresViolation, l1_destroyErr4RequiresViolation, l1_destroyErr0RequiresViolation, l1_destroyErr1RequiresViolation, l1_destroyErr5RequiresViolation, l1_destroyErr3RequiresViolation, l2_destroyErr1RequiresViolation, l2_destroyErr0RequiresViolation, l2_destroyErr2RequiresViolation, l2_destroyErr4RequiresViolation, l2_destroyErr5RequiresViolation, l2_destroyErr3RequiresViolation]=== [2018-02-04 20:30:57,010 INFO L82 PathProgramCache]: Analyzing trace with hash 2023762793, now seen corresponding path program 4 times No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 18 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-02-04 20:30:57,014 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 20:30:57,048 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:57,061 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:57,069 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:57,073 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:57,079 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:57,085 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:57,090 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:57,093 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:57,100 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:57,105 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:57,109 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:57,118 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:57,124 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:57,129 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:57,136 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:57,140 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:57,143 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:57,149 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:57,166 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:57,245 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:57,291 INFO L134 CoverageAnalysis]: Checked inductivity of 1431 backedges. 245 proven. 6 refuted. 0 times theorem prover too weak. 1180 trivial. 0 not checked. [2018-02-04 20:30:57,307 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 20:30:57,307 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14] total 14 [2018-02-04 20:30:57,307 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 20:30:57,308 INFO L134 CoverageAnalysis]: Checked inductivity of 290 backedges. 20 proven. 0 refuted. 0 times theorem prover too weak. 270 trivial. 0 not checked. [2018-02-04 20:30:57,308 INFO L182 omatonBuilderFactory]: Interpolants [12288#false, 12480#(and (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)), 12640#(= 0 |#Ultimate.C_memset_#t~loopctr42|), 12641#(= 1 |#Ultimate.C_memset_#t~loopctr42|), 12642#(<= |#Ultimate.C_memset_#t~loopctr42| 2), 12643#(<= |#Ultimate.C_memset_#t~loopctr42| 3), 12644#(not (= |#Ultimate.C_memset_#amount| 119)), 12613#(or (and (not (= zalloc_or_die_~size 119)) (not (= |zalloc_or_die_#in~size| 119))) (and (= zalloc_or_die_~size 119) (= |zalloc_or_die_#in~size| 119))), 12629#(not (= 119 |zalloc_or_die_#in~size|)), 12630#(= (mod (* (mod |calloc_model_#in~nmemb| 4294967296) (mod |calloc_model_#in~size| 4294967296)) 4294967296) (mod (* (mod calloc_model_~nmemb 4294967296) (mod calloc_model_~size 4294967296)) 4294967296)), 12445#(and (= |~#list~0.base| |old(~#list~0.base)|) (= |#valid| |old(#valid)|) (= |~#list~0.offset| |old(~#list~0.offset)|) (= |#NULL.base| |old(#NULL.base)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |old(#length)| |#length|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)), 12446#(and (= |#valid| |old(#valid)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |old(#length)| |#length|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)), 12287#true, 12639#(not (= (mod (* (mod |calloc_model_#in~nmemb| 4294967296) (mod |calloc_model_#in~size| 4294967296)) 4294967296) 119))] [2018-02-04 20:30:57,308 INFO L134 CoverageAnalysis]: Checked inductivity of 1431 backedges. 245 proven. 6 refuted. 0 times theorem prover too weak. 1180 trivial. 0 not checked. [2018-02-04 20:30:57,308 INFO L409 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-02-04 20:30:57,308 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-02-04 20:30:57,309 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=149, Unknown=0, NotChecked=0, Total=182 [2018-02-04 20:30:57,309 INFO L87 Difference]: Start difference. First operand 246 states and 266 transitions. Second operand 14 states. [2018-02-04 20:30:58,136 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 20:30:58,136 INFO L93 Difference]: Finished difference Result 284 states and 308 transitions. [2018-02-04 20:30:58,136 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-02-04 20:30:58,136 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 185 [2018-02-04 20:30:58,137 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 20:30:58,137 INFO L225 Difference]: With dead ends: 284 [2018-02-04 20:30:58,137 INFO L226 Difference]: Without dead ends: 275 [2018-02-04 20:30:58,138 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 60 GetRequests, 39 SyntacticMatches, 0 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 55 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=86, Invalid=420, Unknown=0, NotChecked=0, Total=506 [2018-02-04 20:30:58,138 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 275 states. [2018-02-04 20:30:58,140 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 275 to 246. [2018-02-04 20:30:58,140 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 246 states. [2018-02-04 20:30:58,141 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 246 states to 246 states and 265 transitions. [2018-02-04 20:30:58,141 INFO L78 Accepts]: Start accepts. Automaton has 246 states and 265 transitions. Word has length 185 [2018-02-04 20:30:58,141 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 20:30:58,141 INFO L432 AbstractCegarLoop]: Abstraction has 246 states and 265 transitions. [2018-02-04 20:30:58,141 INFO L433 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-02-04 20:30:58,141 INFO L276 IsEmpty]: Start isEmpty. Operand 246 states and 265 transitions. [2018-02-04 20:30:58,141 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 187 [2018-02-04 20:30:58,142 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 20:30:58,142 INFO L351 BasicCegarLoop]: trace histogram [44, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 20:30:58,142 INFO L371 AbstractCegarLoop]: === Iteration 18 === [l3_destroyErr0RequiresViolation, l3_destroyErr3RequiresViolation, l3_destroyErr1RequiresViolation, l3_destroyErr2RequiresViolation, l3_destroyErr4RequiresViolation, l3_destroyErr5RequiresViolation, l0_insertErr3RequiresViolation, l0_insertErr1RequiresViolation, l0_insertErr5RequiresViolation, l0_insertErr2RequiresViolation, l0_insertErr4RequiresViolation, l0_insertErr0RequiresViolation, l4_destroyErr4RequiresViolation, l4_destroyErr6RequiresViolation, l4_destroyErr2RequiresViolation, l4_destroyErr3RequiresViolation, l4_destroyErr1RequiresViolation, l4_destroyErr7RequiresViolation, l4_destroyErr0RequiresViolation, l4_destroyErr5RequiresViolation, l2_insertErr3RequiresViolation, l2_insertErr5RequiresViolation, l2_insertErr0RequiresViolation, l2_insertErr1RequiresViolation, l2_insertErr4RequiresViolation, l2_insertErr2RequiresViolation, mainErr1RequiresViolation, mainErr2EnsuresViolation, mainErr0RequiresViolation, l3_insertErr4RequiresViolation, l3_insertErr0RequiresViolation, l3_insertErr5RequiresViolation, l3_insertErr3RequiresViolation, l3_insertErr1RequiresViolation, l3_insertErr2RequiresViolation, l1_insertErr4RequiresViolation, l1_insertErr0RequiresViolation, l1_insertErr2RequiresViolation, l1_insertErr3RequiresViolation, l1_insertErr1RequiresViolation, l1_insertErr5RequiresViolation, l0_destroyErr5RequiresViolation, l0_destroyErr3RequiresViolation, l0_destroyErr1RequiresViolation, l0_destroyErr0RequiresViolation, l0_destroyErr4RequiresViolation, l0_destroyErr2RequiresViolation, calloc_modelErr0RequiresViolation, calloc_modelErr1RequiresViolation, l4_insertErr5RequiresViolation, l4_insertErr3RequiresViolation, l4_insertErr4RequiresViolation, l4_insertErr6RequiresViolation, l4_insertErr2RequiresViolation, l4_insertErr0RequiresViolation, l4_insertErr1RequiresViolation, l4_insertErr7RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr0RequiresViolation, l1_destroyErr2RequiresViolation, l1_destroyErr4RequiresViolation, l1_destroyErr0RequiresViolation, l1_destroyErr1RequiresViolation, l1_destroyErr5RequiresViolation, l1_destroyErr3RequiresViolation, l2_destroyErr1RequiresViolation, l2_destroyErr0RequiresViolation, l2_destroyErr2RequiresViolation, l2_destroyErr4RequiresViolation, l2_destroyErr5RequiresViolation, l2_destroyErr3RequiresViolation]=== [2018-02-04 20:30:58,142 INFO L82 PathProgramCache]: Analyzing trace with hash 1213049092, now seen corresponding path program 5 times No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 19 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-02-04 20:30:58,144 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 20:30:58,179 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:58,193 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:58,202 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:58,206 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:58,213 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:58,219 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:58,224 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:58,227 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:58,234 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:58,239 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:58,242 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:58,247 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:58,250 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:58,254 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:58,259 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:58,263 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:58,267 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:58,273 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:58,288 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:58,556 WARN L146 SmtUtils]: Spent 253ms on a formula simplification. DAG size of input: 40 DAG size of output 22 [2018-02-04 20:30:58,570 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:58,669 INFO L134 CoverageAnalysis]: Checked inductivity of 1480 backedges. 290 proven. 10 refuted. 0 times theorem prover too weak. 1180 trivial. 0 not checked. [2018-02-04 20:30:58,687 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 20:30:58,687 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15] total 15 [2018-02-04 20:30:58,687 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 20:30:58,687 INFO L134 CoverageAnalysis]: Checked inductivity of 295 backedges. 25 proven. 0 refuted. 0 times theorem prover too weak. 270 trivial. 0 not checked. [2018-02-04 20:30:58,687 INFO L182 omatonBuilderFactory]: Interpolants [13537#(not (= 119 |zalloc_or_die_#in~size|)), 13538#(and (= (mod (* (mod |calloc_model_#in~size| 4294967296) (mod calloc_model_~nmemb 4294967296)) 4294967296) (mod (* (mod calloc_model_~nmemb 4294967296) (mod calloc_model_~size 4294967296)) 4294967296)) (or (and (not (= calloc_model_~nmemb 1)) (not (= |calloc_model_#in~nmemb| 1))) (and (= |calloc_model_#in~nmemb| 1) (= calloc_model_~nmemb 1)))), 13352#(and (= |~#list~0.base| |old(~#list~0.base)|) (= |#valid| |old(#valid)|) (= |~#list~0.offset| |old(~#list~0.offset)|) (= |#NULL.base| |old(#NULL.base)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |old(#length)| |#length|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)), 13193#true, 13353#(and (= |#valid| |old(#valid)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |old(#length)| |#length|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)), 13194#false, 13387#(and (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)), 13548#(or (not (= |calloc_model_#in~nmemb| 1)) (not (= (mod |calloc_model_#in~size| 4294967296) 119))), 13549#(= 0 |#Ultimate.C_memset_#t~loopctr42|), 13550#(and (< 0 |#Ultimate.C_memset_#amount|) (= 1 |#Ultimate.C_memset_#t~loopctr42|)), 13551#(and (= |#Ultimate.C_memset_#t~loopctr42| 2) (< 0 |#Ultimate.C_memset_#amount|)), 13520#(or (and (not (= zalloc_or_die_~size 119)) (not (= |zalloc_or_die_#in~size| 119))) (and (= zalloc_or_die_~size 119) (= |zalloc_or_die_#in~size| 119))), 13552#(and (= |#Ultimate.C_memset_#t~loopctr42| 3) (< 0 |#Ultimate.C_memset_#amount|)), 13553#(and (< 3 |#Ultimate.C_memset_#amount|) (or (and (< 4 |#Ultimate.C_memset_#amount|) (< |#Ultimate.C_memset_#t~loopctr42| |#Ultimate.C_memset_#amount|)) (and (<= |#Ultimate.C_memset_#amount| 4) (<= |#Ultimate.C_memset_#amount| |#Ultimate.C_memset_#t~loopctr42|)))), 13554#(and (<= |#Ultimate.C_memset_#amount| 4) (< 3 |#Ultimate.C_memset_#amount|))] [2018-02-04 20:30:58,688 INFO L134 CoverageAnalysis]: Checked inductivity of 1480 backedges. 290 proven. 10 refuted. 0 times theorem prover too weak. 1180 trivial. 0 not checked. [2018-02-04 20:30:58,688 INFO L409 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-02-04 20:30:58,688 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-02-04 20:30:58,688 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=30, Invalid=180, Unknown=0, NotChecked=0, Total=210 [2018-02-04 20:30:58,688 INFO L87 Difference]: Start difference. First operand 246 states and 265 transitions. Second operand 15 states. [2018-02-04 20:30:59,732 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 20:30:59,732 INFO L93 Difference]: Finished difference Result 284 states and 307 transitions. [2018-02-04 20:30:59,732 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-02-04 20:30:59,732 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 186 [2018-02-04 20:30:59,733 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 20:30:59,733 INFO L225 Difference]: With dead ends: 284 [2018-02-04 20:30:59,733 INFO L226 Difference]: Without dead ends: 275 [2018-02-04 20:30:59,734 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 59 GetRequests, 37 SyntacticMatches, 0 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 55 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=81, Invalid=471, Unknown=0, NotChecked=0, Total=552 [2018-02-04 20:30:59,734 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 275 states. [2018-02-04 20:30:59,737 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 275 to 246. [2018-02-04 20:30:59,738 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 246 states. [2018-02-04 20:30:59,738 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 246 states to 246 states and 264 transitions. [2018-02-04 20:30:59,738 INFO L78 Accepts]: Start accepts. Automaton has 246 states and 264 transitions. Word has length 186 [2018-02-04 20:30:59,738 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 20:30:59,738 INFO L432 AbstractCegarLoop]: Abstraction has 246 states and 264 transitions. [2018-02-04 20:30:59,738 INFO L433 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-02-04 20:30:59,739 INFO L276 IsEmpty]: Start isEmpty. Operand 246 states and 264 transitions. [2018-02-04 20:30:59,739 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 188 [2018-02-04 20:30:59,739 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 20:30:59,739 INFO L351 BasicCegarLoop]: trace histogram [45, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 20:30:59,740 INFO L371 AbstractCegarLoop]: === Iteration 19 === [l3_destroyErr0RequiresViolation, l3_destroyErr3RequiresViolation, l3_destroyErr1RequiresViolation, l3_destroyErr2RequiresViolation, l3_destroyErr4RequiresViolation, l3_destroyErr5RequiresViolation, l0_insertErr3RequiresViolation, l0_insertErr1RequiresViolation, l0_insertErr5RequiresViolation, l0_insertErr2RequiresViolation, l0_insertErr4RequiresViolation, l0_insertErr0RequiresViolation, l4_destroyErr4RequiresViolation, l4_destroyErr6RequiresViolation, l4_destroyErr2RequiresViolation, l4_destroyErr3RequiresViolation, l4_destroyErr1RequiresViolation, l4_destroyErr7RequiresViolation, l4_destroyErr0RequiresViolation, l4_destroyErr5RequiresViolation, l2_insertErr3RequiresViolation, l2_insertErr5RequiresViolation, l2_insertErr0RequiresViolation, l2_insertErr1RequiresViolation, l2_insertErr4RequiresViolation, l2_insertErr2RequiresViolation, mainErr1RequiresViolation, mainErr2EnsuresViolation, mainErr0RequiresViolation, l3_insertErr4RequiresViolation, l3_insertErr0RequiresViolation, l3_insertErr5RequiresViolation, l3_insertErr3RequiresViolation, l3_insertErr1RequiresViolation, l3_insertErr2RequiresViolation, l1_insertErr4RequiresViolation, l1_insertErr0RequiresViolation, l1_insertErr2RequiresViolation, l1_insertErr3RequiresViolation, l1_insertErr1RequiresViolation, l1_insertErr5RequiresViolation, l0_destroyErr5RequiresViolation, l0_destroyErr3RequiresViolation, l0_destroyErr1RequiresViolation, l0_destroyErr0RequiresViolation, l0_destroyErr4RequiresViolation, l0_destroyErr2RequiresViolation, calloc_modelErr0RequiresViolation, calloc_modelErr1RequiresViolation, l4_insertErr5RequiresViolation, l4_insertErr3RequiresViolation, l4_insertErr4RequiresViolation, l4_insertErr6RequiresViolation, l4_insertErr2RequiresViolation, l4_insertErr0RequiresViolation, l4_insertErr1RequiresViolation, l4_insertErr7RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr0RequiresViolation, l1_destroyErr2RequiresViolation, l1_destroyErr4RequiresViolation, l1_destroyErr0RequiresViolation, l1_destroyErr1RequiresViolation, l1_destroyErr5RequiresViolation, l1_destroyErr3RequiresViolation, l2_destroyErr1RequiresViolation, l2_destroyErr0RequiresViolation, l2_destroyErr2RequiresViolation, l2_destroyErr4RequiresViolation, l2_destroyErr5RequiresViolation, l2_destroyErr3RequiresViolation]=== [2018-02-04 20:30:59,740 INFO L82 PathProgramCache]: Analyzing trace with hash 1850728137, now seen corresponding path program 6 times No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 20 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-02-04 20:30:59,744 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 20:30:59,787 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:59,801 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:59,810 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:59,814 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:59,821 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:59,826 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:59,830 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:59,833 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:59,838 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:59,842 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:59,845 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:59,850 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:59,855 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:59,858 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:59,863 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:59,867 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:59,871 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:59,878 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:59,898 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:30:59,956 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:00,019 INFO L134 CoverageAnalysis]: Checked inductivity of 1530 backedges. 335 proven. 15 refuted. 0 times theorem prover too weak. 1180 trivial. 0 not checked. [2018-02-04 20:31:00,035 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 20:31:00,036 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16] total 16 [2018-02-04 20:31:00,036 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 20:31:00,036 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 30 proven. 0 refuted. 0 times theorem prover too weak. 270 trivial. 0 not checked. [2018-02-04 20:31:00,036 INFO L182 omatonBuilderFactory]: Interpolants [14464#(= |#Ultimate.C_memset_#t~loopctr42| 2), 14465#(<= |#Ultimate.C_memset_#t~loopctr42| 3), 14466#(<= |#Ultimate.C_memset_#t~loopctr42| 4), 14467#(<= |#Ultimate.C_memset_#t~loopctr42| 5), 14468#(<= |#Ultimate.C_memset_#amount| 5), 14449#(not (= 119 |zalloc_or_die_#in~size|)), 14450#(and (= calloc_model_~size |calloc_model_#in~size|) (= (mod (* (mod |calloc_model_#in~nmemb| 4294967296) (mod calloc_model_~size 4294967296)) 4294967296) (mod (* (mod calloc_model_~nmemb 4294967296) (mod calloc_model_~size 4294967296)) 4294967296))), 14103#true, 14263#(and (= |~#list~0.base| |old(~#list~0.base)|) (= |#valid| |old(#valid)|) (= |~#list~0.offset| |old(~#list~0.offset)|) (= |#NULL.base| |old(#NULL.base)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |old(#length)| |#length|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)), 14104#false, 14264#(and (= |#valid| |old(#valid)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |old(#length)| |#length|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)), 14298#(and (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)), 14461#(or (not (= (mod |calloc_model_#in~nmemb| 4294967296) 1)) (not (= |calloc_model_#in~size| 119))), 14462#(= 0 |#Ultimate.C_memset_#t~loopctr42|), 14431#(or (and (not (= zalloc_or_die_~size 119)) (not (= |zalloc_or_die_#in~size| 119))) (and (= zalloc_or_die_~size 119) (= |zalloc_or_die_#in~size| 119))), 14463#(= 1 |#Ultimate.C_memset_#t~loopctr42|)] [2018-02-04 20:31:00,037 INFO L134 CoverageAnalysis]: Checked inductivity of 1530 backedges. 335 proven. 15 refuted. 0 times theorem prover too weak. 1180 trivial. 0 not checked. [2018-02-04 20:31:00,037 INFO L409 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-02-04 20:31:00,037 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-02-04 20:31:00,038 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=44, Invalid=196, Unknown=0, NotChecked=0, Total=240 [2018-02-04 20:31:00,038 INFO L87 Difference]: Start difference. First operand 246 states and 264 transitions. Second operand 16 states. [2018-02-04 20:31:01,011 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 20:31:01,011 INFO L93 Difference]: Finished difference Result 284 states and 306 transitions. [2018-02-04 20:31:01,011 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-02-04 20:31:01,011 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 187 [2018-02-04 20:31:01,012 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 20:31:01,013 INFO L225 Difference]: With dead ends: 284 [2018-02-04 20:31:01,013 INFO L226 Difference]: Without dead ends: 275 [2018-02-04 20:31:01,013 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 63 GetRequests, 37 SyntacticMatches, 0 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 89 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=123, Invalid=633, Unknown=0, NotChecked=0, Total=756 [2018-02-04 20:31:01,013 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 275 states. [2018-02-04 20:31:01,015 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 275 to 246. [2018-02-04 20:31:01,015 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 246 states. [2018-02-04 20:31:01,016 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 246 states to 246 states and 263 transitions. [2018-02-04 20:31:01,016 INFO L78 Accepts]: Start accepts. Automaton has 246 states and 263 transitions. Word has length 187 [2018-02-04 20:31:01,016 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 20:31:01,016 INFO L432 AbstractCegarLoop]: Abstraction has 246 states and 263 transitions. [2018-02-04 20:31:01,016 INFO L433 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-02-04 20:31:01,016 INFO L276 IsEmpty]: Start isEmpty. Operand 246 states and 263 transitions. [2018-02-04 20:31:01,017 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 189 [2018-02-04 20:31:01,017 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 20:31:01,017 INFO L351 BasicCegarLoop]: trace histogram [46, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 20:31:01,017 INFO L371 AbstractCegarLoop]: === Iteration 20 === [l3_destroyErr0RequiresViolation, l3_destroyErr3RequiresViolation, l3_destroyErr1RequiresViolation, l3_destroyErr2RequiresViolation, l3_destroyErr4RequiresViolation, l3_destroyErr5RequiresViolation, l0_insertErr3RequiresViolation, l0_insertErr1RequiresViolation, l0_insertErr5RequiresViolation, l0_insertErr2RequiresViolation, l0_insertErr4RequiresViolation, l0_insertErr0RequiresViolation, l4_destroyErr4RequiresViolation, l4_destroyErr6RequiresViolation, l4_destroyErr2RequiresViolation, l4_destroyErr3RequiresViolation, l4_destroyErr1RequiresViolation, l4_destroyErr7RequiresViolation, l4_destroyErr0RequiresViolation, l4_destroyErr5RequiresViolation, l2_insertErr3RequiresViolation, l2_insertErr5RequiresViolation, l2_insertErr0RequiresViolation, l2_insertErr1RequiresViolation, l2_insertErr4RequiresViolation, l2_insertErr2RequiresViolation, mainErr1RequiresViolation, mainErr2EnsuresViolation, mainErr0RequiresViolation, l3_insertErr4RequiresViolation, l3_insertErr0RequiresViolation, l3_insertErr5RequiresViolation, l3_insertErr3RequiresViolation, l3_insertErr1RequiresViolation, l3_insertErr2RequiresViolation, l1_insertErr4RequiresViolation, l1_insertErr0RequiresViolation, l1_insertErr2RequiresViolation, l1_insertErr3RequiresViolation, l1_insertErr1RequiresViolation, l1_insertErr5RequiresViolation, l0_destroyErr5RequiresViolation, l0_destroyErr3RequiresViolation, l0_destroyErr1RequiresViolation, l0_destroyErr0RequiresViolation, l0_destroyErr4RequiresViolation, l0_destroyErr2RequiresViolation, calloc_modelErr0RequiresViolation, calloc_modelErr1RequiresViolation, l4_insertErr5RequiresViolation, l4_insertErr3RequiresViolation, l4_insertErr4RequiresViolation, l4_insertErr6RequiresViolation, l4_insertErr2RequiresViolation, l4_insertErr0RequiresViolation, l4_insertErr1RequiresViolation, l4_insertErr7RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr0RequiresViolation, l1_destroyErr2RequiresViolation, l1_destroyErr4RequiresViolation, l1_destroyErr0RequiresViolation, l1_destroyErr1RequiresViolation, l1_destroyErr5RequiresViolation, l1_destroyErr3RequiresViolation, l2_destroyErr1RequiresViolation, l2_destroyErr0RequiresViolation, l2_destroyErr2RequiresViolation, l2_destroyErr4RequiresViolation, l2_destroyErr5RequiresViolation, l2_destroyErr3RequiresViolation]=== [2018-02-04 20:31:01,017 INFO L82 PathProgramCache]: Analyzing trace with hash 143942052, now seen corresponding path program 7 times No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 21 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-02-04 20:31:01,020 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 20:31:01,061 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:01,075 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:01,084 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:01,088 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:01,095 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:01,100 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:01,105 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:01,108 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:01,113 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:01,117 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:01,120 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:01,125 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:01,130 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:01,133 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:01,138 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:01,143 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:01,145 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:01,152 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:01,170 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:01,190 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:01,248 INFO L134 CoverageAnalysis]: Checked inductivity of 1581 backedges. 380 proven. 21 refuted. 0 times theorem prover too weak. 1180 trivial. 0 not checked. [2018-02-04 20:31:01,266 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 20:31:01,266 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17] total 17 [2018-02-04 20:31:01,266 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 20:31:01,267 INFO L134 CoverageAnalysis]: Checked inductivity of 305 backedges. 35 proven. 0 refuted. 0 times theorem prover too weak. 270 trivial. 0 not checked. [2018-02-04 20:31:01,267 INFO L182 omatonBuilderFactory]: Interpolants [15392#(not (= |#Ultimate.C_memset_#amount| 119)), 15371#(not (= 119 |zalloc_or_die_#in~size|)), 15372#(and (= calloc_model_~size |calloc_model_#in~size|) (or (and (not (= calloc_model_~nmemb 1)) (not (= |calloc_model_#in~nmemb| 1))) (and (= |calloc_model_#in~nmemb| 1) (= calloc_model_~nmemb 1)))), 15023#true, 15024#false, 15184#(and (= |~#list~0.base| |old(~#list~0.base)|) (= |#valid| |old(#valid)|) (= |~#list~0.offset| |old(~#list~0.offset)|) (= |#NULL.base| |old(#NULL.base)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |old(#length)| |#length|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)), 15185#(and (= |#valid| |old(#valid)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |old(#length)| |#length|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)), 15219#(and (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)), 15352#(or (and (not (= zalloc_or_die_~size 119)) (not (= |zalloc_or_die_#in~size| 119))) (and (= zalloc_or_die_~size 119) (= |zalloc_or_die_#in~size| 119))), 15384#(or (not (= |calloc_model_#in~nmemb| 1)) (not (= |calloc_model_#in~size| 119))), 15385#(= 0 |#Ultimate.C_memset_#t~loopctr42|), 15386#(= 1 |#Ultimate.C_memset_#t~loopctr42|), 15387#(<= |#Ultimate.C_memset_#t~loopctr42| 2), 15388#(<= |#Ultimate.C_memset_#t~loopctr42| 3), 15389#(<= |#Ultimate.C_memset_#t~loopctr42| 4), 15390#(<= |#Ultimate.C_memset_#t~loopctr42| 5), 15391#(<= |#Ultimate.C_memset_#t~loopctr42| 6)] [2018-02-04 20:31:01,267 INFO L134 CoverageAnalysis]: Checked inductivity of 1581 backedges. 380 proven. 21 refuted. 0 times theorem prover too weak. 1180 trivial. 0 not checked. [2018-02-04 20:31:01,267 INFO L409 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-02-04 20:31:01,267 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-02-04 20:31:01,267 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=54, Invalid=218, Unknown=0, NotChecked=0, Total=272 [2018-02-04 20:31:01,267 INFO L87 Difference]: Start difference. First operand 246 states and 263 transitions. Second operand 17 states. [2018-02-04 20:31:02,329 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 20:31:02,329 INFO L93 Difference]: Finished difference Result 284 states and 305 transitions. [2018-02-04 20:31:02,330 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-02-04 20:31:02,330 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 188 [2018-02-04 20:31:02,330 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 20:31:02,331 INFO L225 Difference]: With dead ends: 284 [2018-02-04 20:31:02,331 INFO L226 Difference]: Without dead ends: 275 [2018-02-04 20:31:02,331 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 62 GetRequests, 35 SyntacticMatches, 0 SemanticMatches, 27 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 93 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=135, Invalid=677, Unknown=0, NotChecked=0, Total=812 [2018-02-04 20:31:02,332 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 275 states. [2018-02-04 20:31:02,335 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 275 to 246. [2018-02-04 20:31:02,336 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 246 states. [2018-02-04 20:31:02,336 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 246 states to 246 states and 262 transitions. [2018-02-04 20:31:02,336 INFO L78 Accepts]: Start accepts. Automaton has 246 states and 262 transitions. Word has length 188 [2018-02-04 20:31:02,337 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 20:31:02,337 INFO L432 AbstractCegarLoop]: Abstraction has 246 states and 262 transitions. [2018-02-04 20:31:02,337 INFO L433 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-02-04 20:31:02,337 INFO L276 IsEmpty]: Start isEmpty. Operand 246 states and 262 transitions. [2018-02-04 20:31:02,338 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 190 [2018-02-04 20:31:02,338 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 20:31:02,338 INFO L351 BasicCegarLoop]: trace histogram [47, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 20:31:02,338 INFO L371 AbstractCegarLoop]: === Iteration 21 === [l3_destroyErr0RequiresViolation, l3_destroyErr3RequiresViolation, l3_destroyErr1RequiresViolation, l3_destroyErr2RequiresViolation, l3_destroyErr4RequiresViolation, l3_destroyErr5RequiresViolation, l0_insertErr3RequiresViolation, l0_insertErr1RequiresViolation, l0_insertErr5RequiresViolation, l0_insertErr2RequiresViolation, l0_insertErr4RequiresViolation, l0_insertErr0RequiresViolation, l4_destroyErr4RequiresViolation, l4_destroyErr6RequiresViolation, l4_destroyErr2RequiresViolation, l4_destroyErr3RequiresViolation, l4_destroyErr1RequiresViolation, l4_destroyErr7RequiresViolation, l4_destroyErr0RequiresViolation, l4_destroyErr5RequiresViolation, l2_insertErr3RequiresViolation, l2_insertErr5RequiresViolation, l2_insertErr0RequiresViolation, l2_insertErr1RequiresViolation, l2_insertErr4RequiresViolation, l2_insertErr2RequiresViolation, mainErr1RequiresViolation, mainErr2EnsuresViolation, mainErr0RequiresViolation, l3_insertErr4RequiresViolation, l3_insertErr0RequiresViolation, l3_insertErr5RequiresViolation, l3_insertErr3RequiresViolation, l3_insertErr1RequiresViolation, l3_insertErr2RequiresViolation, l1_insertErr4RequiresViolation, l1_insertErr0RequiresViolation, l1_insertErr2RequiresViolation, l1_insertErr3RequiresViolation, l1_insertErr1RequiresViolation, l1_insertErr5RequiresViolation, l0_destroyErr5RequiresViolation, l0_destroyErr3RequiresViolation, l0_destroyErr1RequiresViolation, l0_destroyErr0RequiresViolation, l0_destroyErr4RequiresViolation, l0_destroyErr2RequiresViolation, calloc_modelErr0RequiresViolation, calloc_modelErr1RequiresViolation, l4_insertErr5RequiresViolation, l4_insertErr3RequiresViolation, l4_insertErr4RequiresViolation, l4_insertErr6RequiresViolation, l4_insertErr2RequiresViolation, l4_insertErr0RequiresViolation, l4_insertErr1RequiresViolation, l4_insertErr7RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr0RequiresViolation, l1_destroyErr2RequiresViolation, l1_destroyErr4RequiresViolation, l1_destroyErr0RequiresViolation, l1_destroyErr1RequiresViolation, l1_destroyErr5RequiresViolation, l1_destroyErr3RequiresViolation, l2_destroyErr1RequiresViolation, l2_destroyErr0RequiresViolation, l2_destroyErr2RequiresViolation, l2_destroyErr4RequiresViolation, l2_destroyErr5RequiresViolation, l2_destroyErr3RequiresViolation]=== [2018-02-04 20:31:02,338 INFO L82 PathProgramCache]: Analyzing trace with hash -1226819031, now seen corresponding path program 8 times No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 22 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-02-04 20:31:02,341 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 20:31:02,383 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:02,400 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:02,411 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:02,415 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:02,421 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:02,427 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:02,431 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:02,434 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:02,439 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:02,444 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:02,447 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:02,454 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:02,459 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:02,463 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:02,469 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:02,474 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:02,478 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:02,486 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:02,508 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:02,757 WARN L146 SmtUtils]: Spent 232ms on a formula simplification. DAG size of input: 40 DAG size of output 22 [2018-02-04 20:31:02,788 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:04,978 WARN L1033 $PredicateComparison]: unable to prove that (and (<= (* 7 |c_#Ultimate.C_memset_#t~loopctr42|) (+ (div (+ (- 1342177231) (* 268435449 |c_#Ultimate.C_memset_#amount|)) 268435456) 268435498)) (< 6 |c_#Ultimate.C_memset_#amount|)) is different from true [2018-02-04 20:31:08,695 INFO L134 CoverageAnalysis]: Checked inductivity of 1633 backedges. 425 proven. 21 refuted. 0 times theorem prover too weak. 1180 trivial. 7 not checked. [2018-02-04 20:31:08,712 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 20:31:08,712 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18] total 18 [2018-02-04 20:31:08,712 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 20:31:08,712 INFO L134 CoverageAnalysis]: Checked inductivity of 310 backedges. 40 proven. 0 refuted. 0 times theorem prover too weak. 270 trivial. 0 not checked. [2018-02-04 20:31:08,714 INFO L182 omatonBuilderFactory]: Interpolants [16320#(and (< 6 |#Ultimate.C_memset_#amount|) (<= (* 268435456 |#Ultimate.C_memset_#amount|) (+ (div (+ (- 1342177231) (* 268435449 |#Ultimate.C_memset_#amount|)) 268435456) (* 268435449 |#Ultimate.C_memset_#t~loopctr42|) 268435498))), 16297#(not (= 119 |zalloc_or_die_#in~size|)), 16298#(and (= (mod (* (mod |calloc_model_#in~size| 4294967296) (mod calloc_model_~nmemb 4294967296)) 4294967296) (mod (* (mod calloc_model_~nmemb 4294967296) (mod calloc_model_~size 4294967296)) 4294967296)) (or (and (not (= calloc_model_~nmemb 1)) (not (= |calloc_model_#in~nmemb| 1))) (and (= |calloc_model_#in~nmemb| 1) (= calloc_model_~nmemb 1)))), 15947#true, 15948#false, 16109#(and (= |~#list~0.base| |old(~#list~0.base)|) (= |#valid| |old(#valid)|) (= |~#list~0.offset| |old(~#list~0.offset)|) (= |#NULL.base| |old(#NULL.base)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |old(#length)| |#length|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)), 16110#(and (= |#valid| |old(#valid)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |old(#length)| |#length|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)), 16144#(and (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)), 16277#(or (and (not (= zalloc_or_die_~size 119)) (not (= |zalloc_or_die_#in~size| 119))) (and (= zalloc_or_die_~size 119) (= |zalloc_or_die_#in~size| 119))), 16311#(or (not (= |calloc_model_#in~nmemb| 1)) (not (= (mod |calloc_model_#in~size| 4294967296) 119))), 16312#(= 0 |#Ultimate.C_memset_#t~loopctr42|), 16313#(= 1 |#Ultimate.C_memset_#t~loopctr42|), 16314#(and (<= 2 |#Ultimate.C_memset_#t~loopctr42|) (<= |#Ultimate.C_memset_#t~loopctr42| 2)), 16315#(and (<= |#Ultimate.C_memset_#t~loopctr42| 3) (<= 3 |#Ultimate.C_memset_#t~loopctr42|)), 16316#(and (<= |#Ultimate.C_memset_#t~loopctr42| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr42|)), 16317#(and (<= |#Ultimate.C_memset_#t~loopctr42| 5) (<= 5 |#Ultimate.C_memset_#t~loopctr42|)), 16318#(and (<= 6 |#Ultimate.C_memset_#t~loopctr42|) (<= |#Ultimate.C_memset_#t~loopctr42| 6)), 16319#(and (<= (* 7 |#Ultimate.C_memset_#t~loopctr42|) (+ (div (+ (- 1342177231) (* 268435449 |#Ultimate.C_memset_#amount|)) 268435456) 268435498)) (< 6 |#Ultimate.C_memset_#amount|))] [2018-02-04 20:31:08,715 INFO L134 CoverageAnalysis]: Checked inductivity of 1633 backedges. 425 proven. 21 refuted. 0 times theorem prover too weak. 1180 trivial. 7 not checked. [2018-02-04 20:31:08,715 INFO L409 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-02-04 20:31:08,715 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-02-04 20:31:08,715 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=36, Invalid=238, Unknown=2, NotChecked=30, Total=306 [2018-02-04 20:31:08,715 INFO L87 Difference]: Start difference. First operand 246 states and 262 transitions. Second operand 18 states. [2018-02-04 20:31:34,624 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 20:31:34,625 INFO L93 Difference]: Finished difference Result 282 states and 302 transitions. [2018-02-04 20:31:34,625 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-02-04 20:31:34,625 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 189 [2018-02-04 20:31:34,625 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 20:31:34,626 INFO L225 Difference]: With dead ends: 282 [2018-02-04 20:31:34,626 INFO L226 Difference]: Without dead ends: 273 [2018-02-04 20:31:34,626 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 62 GetRequests, 38 SyntacticMatches, 0 SemanticMatches, 24 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 51 ImplicationChecksByTransitivity, 6.3s TimeCoverageRelationStatistics Valid=83, Invalid=519, Unknown=2, NotChecked=46, Total=650 [2018-02-04 20:31:34,626 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 273 states. [2018-02-04 20:31:34,629 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 273 to 244. [2018-02-04 20:31:34,629 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 244 states. [2018-02-04 20:31:34,630 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 244 states to 244 states and 259 transitions. [2018-02-04 20:31:34,630 INFO L78 Accepts]: Start accepts. Automaton has 244 states and 259 transitions. Word has length 189 [2018-02-04 20:31:34,630 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 20:31:34,630 INFO L432 AbstractCegarLoop]: Abstraction has 244 states and 259 transitions. [2018-02-04 20:31:34,630 INFO L433 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-02-04 20:31:34,631 INFO L276 IsEmpty]: Start isEmpty. Operand 244 states and 259 transitions. [2018-02-04 20:31:34,631 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 191 [2018-02-04 20:31:34,631 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 20:31:34,631 INFO L351 BasicCegarLoop]: trace histogram [48, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 20:31:34,632 INFO L371 AbstractCegarLoop]: === Iteration 22 === [l3_destroyErr0RequiresViolation, l3_destroyErr3RequiresViolation, l3_destroyErr1RequiresViolation, l3_destroyErr2RequiresViolation, l3_destroyErr4RequiresViolation, l3_destroyErr5RequiresViolation, l0_insertErr3RequiresViolation, l0_insertErr1RequiresViolation, l0_insertErr5RequiresViolation, l0_insertErr2RequiresViolation, l0_insertErr4RequiresViolation, l0_insertErr0RequiresViolation, l4_destroyErr4RequiresViolation, l4_destroyErr6RequiresViolation, l4_destroyErr2RequiresViolation, l4_destroyErr3RequiresViolation, l4_destroyErr1RequiresViolation, l4_destroyErr7RequiresViolation, l4_destroyErr0RequiresViolation, l4_destroyErr5RequiresViolation, l2_insertErr3RequiresViolation, l2_insertErr5RequiresViolation, l2_insertErr0RequiresViolation, l2_insertErr1RequiresViolation, l2_insertErr4RequiresViolation, l2_insertErr2RequiresViolation, mainErr1RequiresViolation, mainErr2EnsuresViolation, mainErr0RequiresViolation, l3_insertErr4RequiresViolation, l3_insertErr0RequiresViolation, l3_insertErr5RequiresViolation, l3_insertErr3RequiresViolation, l3_insertErr1RequiresViolation, l3_insertErr2RequiresViolation, l1_insertErr4RequiresViolation, l1_insertErr0RequiresViolation, l1_insertErr2RequiresViolation, l1_insertErr3RequiresViolation, l1_insertErr1RequiresViolation, l1_insertErr5RequiresViolation, l0_destroyErr5RequiresViolation, l0_destroyErr3RequiresViolation, l0_destroyErr1RequiresViolation, l0_destroyErr0RequiresViolation, l0_destroyErr4RequiresViolation, l0_destroyErr2RequiresViolation, calloc_modelErr0RequiresViolation, calloc_modelErr1RequiresViolation, l4_insertErr5RequiresViolation, l4_insertErr3RequiresViolation, l4_insertErr4RequiresViolation, l4_insertErr6RequiresViolation, l4_insertErr2RequiresViolation, l4_insertErr0RequiresViolation, l4_insertErr1RequiresViolation, l4_insertErr7RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr0RequiresViolation, l1_destroyErr2RequiresViolation, l1_destroyErr4RequiresViolation, l1_destroyErr0RequiresViolation, l1_destroyErr1RequiresViolation, l1_destroyErr5RequiresViolation, l1_destroyErr3RequiresViolation, l2_destroyErr1RequiresViolation, l2_destroyErr0RequiresViolation, l2_destroyErr2RequiresViolation, l2_destroyErr4RequiresViolation, l2_destroyErr5RequiresViolation, l2_destroyErr3RequiresViolation]=== [2018-02-04 20:31:34,632 INFO L82 PathProgramCache]: Analyzing trace with hash -770739644, now seen corresponding path program 9 times No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 23 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-02-04 20:31:34,636 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 20:31:34,685 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:34,710 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:34,720 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:34,725 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:34,733 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:34,740 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:34,745 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:34,748 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:34,756 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:34,762 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:34,767 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:34,775 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:34,782 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:34,787 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:34,793 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:34,799 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:34,802 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:34,812 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:34,833 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:34,913 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:35,011 INFO L134 CoverageAnalysis]: Checked inductivity of 1686 backedges. 470 proven. 36 refuted. 0 times theorem prover too weak. 1180 trivial. 0 not checked. [2018-02-04 20:31:35,027 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 20:31:35,027 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19] total 19 [2018-02-04 20:31:35,027 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 20:31:35,028 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 55 proven. 0 refuted. 0 times theorem prover too weak. 270 trivial. 0 not checked. [2018-02-04 20:31:35,028 INFO L182 omatonBuilderFactory]: Interpolants [16864#false, 17216#(= (mod (* (mod |calloc_model_#in~nmemb| 4294967296) (mod |calloc_model_#in~size| 4294967296)) 4294967296) (mod (* (mod calloc_model_~nmemb 4294967296) (mod calloc_model_~size 4294967296)) 4294967296)), 17026#(and (= |~#list~0.base| |old(~#list~0.base)|) (= |#valid| |old(#valid)|) (= |~#list~0.offset| |old(~#list~0.offset)|) (= |#NULL.base| |old(#NULL.base)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |old(#length)| |#length|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)), 17027#(and (= |#valid| |old(#valid)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |old(#length)| |#length|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)), 17061#(and (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)), 17194#(or (and (not (= zalloc_or_die_~size 119)) (not (= |zalloc_or_die_#in~size| 119))) (and (= zalloc_or_die_~size 119) (= |zalloc_or_die_#in~size| 119))), 17230#(not (= (mod (* (mod |calloc_model_#in~nmemb| 4294967296) (mod |calloc_model_#in~size| 4294967296)) 4294967296) 119)), 17231#(= 0 |#Ultimate.C_memset_#t~loopctr42|), 17232#(= 1 |#Ultimate.C_memset_#t~loopctr42|), 17233#(<= |#Ultimate.C_memset_#t~loopctr42| 2), 17234#(<= |#Ultimate.C_memset_#t~loopctr42| 3), 17235#(<= |#Ultimate.C_memset_#t~loopctr42| 4), 17236#(<= |#Ultimate.C_memset_#t~loopctr42| 5), 17237#(<= |#Ultimate.C_memset_#t~loopctr42| 6), 17238#(<= |#Ultimate.C_memset_#t~loopctr42| 7), 17239#(<= |#Ultimate.C_memset_#t~loopctr42| 8), 17240#(not (= 119 |#Ultimate.C_memset_#amount|)), 16863#true, 17215#(not (= 119 |zalloc_or_die_#in~size|))] [2018-02-04 20:31:35,028 INFO L134 CoverageAnalysis]: Checked inductivity of 1686 backedges. 470 proven. 36 refuted. 0 times theorem prover too weak. 1180 trivial. 0 not checked. [2018-02-04 20:31:35,028 INFO L409 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-02-04 20:31:35,028 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-02-04 20:31:35,029 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=73, Invalid=269, Unknown=0, NotChecked=0, Total=342 [2018-02-04 20:31:35,029 INFO L87 Difference]: Start difference. First operand 244 states and 259 transitions. Second operand 19 states. [2018-02-04 20:31:35,935 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 20:31:35,935 INFO L93 Difference]: Finished difference Result 286 states and 307 transitions. [2018-02-04 20:31:35,939 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-02-04 20:31:35,939 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 190 [2018-02-04 20:31:35,939 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 20:31:35,940 INFO L225 Difference]: With dead ends: 286 [2018-02-04 20:31:35,940 INFO L226 Difference]: Without dead ends: 279 [2018-02-04 20:31:35,940 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 65 GetRequests, 39 SyntacticMatches, 0 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 70 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=131, Invalid=625, Unknown=0, NotChecked=0, Total=756 [2018-02-04 20:31:35,940 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 279 states. [2018-02-04 20:31:35,943 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 279 to 247. [2018-02-04 20:31:35,943 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 247 states. [2018-02-04 20:31:35,944 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 247 states to 247 states and 263 transitions. [2018-02-04 20:31:35,944 INFO L78 Accepts]: Start accepts. Automaton has 247 states and 263 transitions. Word has length 190 [2018-02-04 20:31:35,945 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 20:31:35,945 INFO L432 AbstractCegarLoop]: Abstraction has 247 states and 263 transitions. [2018-02-04 20:31:35,945 INFO L433 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-02-04 20:31:35,945 INFO L276 IsEmpty]: Start isEmpty. Operand 247 states and 263 transitions. [2018-02-04 20:31:35,945 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 192 [2018-02-04 20:31:35,946 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 20:31:35,946 INFO L351 BasicCegarLoop]: trace histogram [49, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 20:31:35,946 INFO L371 AbstractCegarLoop]: === Iteration 23 === [l3_destroyErr0RequiresViolation, l3_destroyErr3RequiresViolation, l3_destroyErr1RequiresViolation, l3_destroyErr2RequiresViolation, l3_destroyErr4RequiresViolation, l3_destroyErr5RequiresViolation, l0_insertErr3RequiresViolation, l0_insertErr1RequiresViolation, l0_insertErr5RequiresViolation, l0_insertErr2RequiresViolation, l0_insertErr4RequiresViolation, l0_insertErr0RequiresViolation, l4_destroyErr4RequiresViolation, l4_destroyErr6RequiresViolation, l4_destroyErr2RequiresViolation, l4_destroyErr3RequiresViolation, l4_destroyErr1RequiresViolation, l4_destroyErr7RequiresViolation, l4_destroyErr0RequiresViolation, l4_destroyErr5RequiresViolation, l2_insertErr3RequiresViolation, l2_insertErr5RequiresViolation, l2_insertErr0RequiresViolation, l2_insertErr1RequiresViolation, l2_insertErr4RequiresViolation, l2_insertErr2RequiresViolation, mainErr1RequiresViolation, mainErr2EnsuresViolation, mainErr0RequiresViolation, l3_insertErr4RequiresViolation, l3_insertErr0RequiresViolation, l3_insertErr5RequiresViolation, l3_insertErr3RequiresViolation, l3_insertErr1RequiresViolation, l3_insertErr2RequiresViolation, l1_insertErr4RequiresViolation, l1_insertErr0RequiresViolation, l1_insertErr2RequiresViolation, l1_insertErr3RequiresViolation, l1_insertErr1RequiresViolation, l1_insertErr5RequiresViolation, l0_destroyErr5RequiresViolation, l0_destroyErr3RequiresViolation, l0_destroyErr1RequiresViolation, l0_destroyErr0RequiresViolation, l0_destroyErr4RequiresViolation, l0_destroyErr2RequiresViolation, calloc_modelErr0RequiresViolation, calloc_modelErr1RequiresViolation, l4_insertErr5RequiresViolation, l4_insertErr3RequiresViolation, l4_insertErr4RequiresViolation, l4_insertErr6RequiresViolation, l4_insertErr2RequiresViolation, l4_insertErr0RequiresViolation, l4_insertErr1RequiresViolation, l4_insertErr7RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr0RequiresViolation, l1_destroyErr2RequiresViolation, l1_destroyErr4RequiresViolation, l1_destroyErr0RequiresViolation, l1_destroyErr1RequiresViolation, l1_destroyErr5RequiresViolation, l1_destroyErr3RequiresViolation, l2_destroyErr1RequiresViolation, l2_destroyErr0RequiresViolation, l2_destroyErr2RequiresViolation, l2_destroyErr4RequiresViolation, l2_destroyErr5RequiresViolation, l2_destroyErr3RequiresViolation]=== [2018-02-04 20:31:35,946 INFO L82 PathProgramCache]: Analyzing trace with hash 482819465, now seen corresponding path program 10 times No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 24 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-02-04 20:31:35,948 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 20:31:35,981 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:35,994 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:36,002 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:36,006 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:36,012 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:36,016 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:36,020 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:36,022 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:36,027 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:36,031 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:36,034 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:36,039 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:36,043 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:36,046 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:36,050 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:36,054 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:36,057 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:36,064 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:36,082 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:36,173 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:36,309 INFO L134 CoverageAnalysis]: Checked inductivity of 1740 backedges. 515 proven. 45 refuted. 0 times theorem prover too weak. 1180 trivial. 0 not checked. [2018-02-04 20:31:36,324 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 20:31:36,324 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [20] total 20 [2018-02-04 20:31:36,324 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 20:31:36,325 INFO L134 CoverageAnalysis]: Checked inductivity of 315 backedges. 45 proven. 0 refuted. 0 times theorem prover too weak. 270 trivial. 0 not checked. [2018-02-04 20:31:36,325 INFO L182 omatonBuilderFactory]: Interpolants [17792#true, 17793#false, 18146#(not (= 119 |zalloc_or_die_#in~size|)), 18147#(= (mod (* (mod |calloc_model_#in~nmemb| 4294967296) (mod |calloc_model_#in~size| 4294967296)) 4294967296) (mod (* (mod calloc_model_~nmemb 4294967296) (mod calloc_model_~size 4294967296)) 4294967296)), 17956#(and (= |~#list~0.base| |old(~#list~0.base)|) (= |#valid| |old(#valid)|) (= |~#list~0.offset| |old(~#list~0.offset)|) (= |#NULL.base| |old(#NULL.base)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |old(#length)| |#length|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)), 17957#(and (= |#valid| |old(#valid)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |old(#length)| |#length|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)), 17991#(and (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)), 18124#(or (and (not (= zalloc_or_die_~size 119)) (not (= |zalloc_or_die_#in~size| 119))) (and (= zalloc_or_die_~size 119) (= |zalloc_or_die_#in~size| 119))), 18162#(not (= (mod (* (mod |calloc_model_#in~nmemb| 4294967296) (mod |calloc_model_#in~size| 4294967296)) 4294967296) 119)), 18163#(= 0 |#Ultimate.C_memset_#t~loopctr42|), 18164#(= 1 |#Ultimate.C_memset_#t~loopctr42|), 18165#(= |#Ultimate.C_memset_#t~loopctr42| 2), 18166#(<= |#Ultimate.C_memset_#t~loopctr42| 3), 18167#(<= |#Ultimate.C_memset_#t~loopctr42| 4), 18168#(<= |#Ultimate.C_memset_#t~loopctr42| 5), 18169#(<= |#Ultimate.C_memset_#t~loopctr42| 6), 18170#(<= |#Ultimate.C_memset_#t~loopctr42| 7), 18171#(<= |#Ultimate.C_memset_#t~loopctr42| 8), 18172#(<= |#Ultimate.C_memset_#t~loopctr42| 9), 18173#(not (= |#Ultimate.C_memset_#amount| 119))] [2018-02-04 20:31:36,325 INFO L134 CoverageAnalysis]: Checked inductivity of 1740 backedges. 515 proven. 45 refuted. 0 times theorem prover too weak. 1180 trivial. 0 not checked. [2018-02-04 20:31:36,325 INFO L409 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-02-04 20:31:36,326 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-02-04 20:31:36,326 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=82, Invalid=298, Unknown=0, NotChecked=0, Total=380 [2018-02-04 20:31:36,326 INFO L87 Difference]: Start difference. First operand 247 states and 263 transitions. Second operand 20 states. [2018-02-04 20:31:37,483 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 20:31:37,483 INFO L93 Difference]: Finished difference Result 289 states and 311 transitions. [2018-02-04 20:31:37,483 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-02-04 20:31:37,484 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 191 [2018-02-04 20:31:37,484 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 20:31:37,485 INFO L225 Difference]: With dead ends: 289 [2018-02-04 20:31:37,485 INFO L226 Difference]: Without dead ends: 282 [2018-02-04 20:31:37,486 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 67 GetRequests, 39 SyntacticMatches, 0 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 81 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=146, Invalid=724, Unknown=0, NotChecked=0, Total=870 [2018-02-04 20:31:37,486 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 282 states. [2018-02-04 20:31:37,489 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 282 to 248. [2018-02-04 20:31:37,489 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 248 states. [2018-02-04 20:31:37,490 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 248 states to 248 states and 265 transitions. [2018-02-04 20:31:37,490 INFO L78 Accepts]: Start accepts. Automaton has 248 states and 265 transitions. Word has length 191 [2018-02-04 20:31:37,490 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 20:31:37,490 INFO L432 AbstractCegarLoop]: Abstraction has 248 states and 265 transitions. [2018-02-04 20:31:37,490 INFO L433 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-02-04 20:31:37,490 INFO L276 IsEmpty]: Start isEmpty. Operand 248 states and 265 transitions. [2018-02-04 20:31:37,491 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 193 [2018-02-04 20:31:37,491 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 20:31:37,491 INFO L351 BasicCegarLoop]: trace histogram [50, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 20:31:37,491 INFO L371 AbstractCegarLoop]: === Iteration 24 === [l3_destroyErr0RequiresViolation, l3_destroyErr3RequiresViolation, l3_destroyErr1RequiresViolation, l3_destroyErr2RequiresViolation, l3_destroyErr4RequiresViolation, l3_destroyErr5RequiresViolation, l0_insertErr3RequiresViolation, l0_insertErr1RequiresViolation, l0_insertErr5RequiresViolation, l0_insertErr2RequiresViolation, l0_insertErr4RequiresViolation, l0_insertErr0RequiresViolation, l4_destroyErr4RequiresViolation, l4_destroyErr6RequiresViolation, l4_destroyErr2RequiresViolation, l4_destroyErr3RequiresViolation, l4_destroyErr1RequiresViolation, l4_destroyErr7RequiresViolation, l4_destroyErr0RequiresViolation, l4_destroyErr5RequiresViolation, l2_insertErr3RequiresViolation, l2_insertErr5RequiresViolation, l2_insertErr0RequiresViolation, l2_insertErr1RequiresViolation, l2_insertErr4RequiresViolation, l2_insertErr2RequiresViolation, mainErr1RequiresViolation, mainErr2EnsuresViolation, mainErr0RequiresViolation, l3_insertErr4RequiresViolation, l3_insertErr0RequiresViolation, l3_insertErr5RequiresViolation, l3_insertErr3RequiresViolation, l3_insertErr1RequiresViolation, l3_insertErr2RequiresViolation, l1_insertErr4RequiresViolation, l1_insertErr0RequiresViolation, l1_insertErr2RequiresViolation, l1_insertErr3RequiresViolation, l1_insertErr1RequiresViolation, l1_insertErr5RequiresViolation, l0_destroyErr5RequiresViolation, l0_destroyErr3RequiresViolation, l0_destroyErr1RequiresViolation, l0_destroyErr0RequiresViolation, l0_destroyErr4RequiresViolation, l0_destroyErr2RequiresViolation, calloc_modelErr0RequiresViolation, calloc_modelErr1RequiresViolation, l4_insertErr5RequiresViolation, l4_insertErr3RequiresViolation, l4_insertErr4RequiresViolation, l4_insertErr6RequiresViolation, l4_insertErr2RequiresViolation, l4_insertErr0RequiresViolation, l4_insertErr1RequiresViolation, l4_insertErr7RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr0RequiresViolation, l1_destroyErr2RequiresViolation, l1_destroyErr4RequiresViolation, l1_destroyErr0RequiresViolation, l1_destroyErr1RequiresViolation, l1_destroyErr5RequiresViolation, l1_destroyErr3RequiresViolation, l2_destroyErr1RequiresViolation, l2_destroyErr0RequiresViolation, l2_destroyErr2RequiresViolation, l2_destroyErr4RequiresViolation, l2_destroyErr5RequiresViolation, l2_destroyErr3RequiresViolation]=== [2018-02-04 20:31:37,492 INFO L82 PathProgramCache]: Analyzing trace with hash 688446180, now seen corresponding path program 11 times No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 25 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-02-04 20:31:37,504 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 20:31:37,566 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:37,583 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:37,614 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:37,619 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:37,625 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:37,631 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:37,634 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:37,637 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:37,642 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:37,646 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:37,649 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:37,654 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:37,658 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:37,661 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:37,666 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:37,670 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:37,673 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:37,680 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:37,702 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:37,728 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:37,833 INFO L134 CoverageAnalysis]: Checked inductivity of 1795 backedges. 560 proven. 55 refuted. 0 times theorem prover too weak. 1180 trivial. 0 not checked. [2018-02-04 20:31:37,849 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 20:31:37,849 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [21] total 21 [2018-02-04 20:31:37,849 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 20:31:37,850 INFO L134 CoverageAnalysis]: Checked inductivity of 315 backedges. 45 proven. 0 refuted. 0 times theorem prover too weak. 270 trivial. 0 not checked. [2018-02-04 20:31:37,850 INFO L182 omatonBuilderFactory]: Interpolants [19104#(or (not (= |calloc_model_#in~nmemb| 1)) (not (= |calloc_model_#in~size| 119))), 19105#(= 0 |#Ultimate.C_memset_#t~loopctr42|), 19106#(= 1 |#Ultimate.C_memset_#t~loopctr42|), 19107#(= |#Ultimate.C_memset_#t~loopctr42| 2), 19108#(= |#Ultimate.C_memset_#t~loopctr42| 3), 19109#(= 4 |#Ultimate.C_memset_#t~loopctr42|), 19110#(<= |#Ultimate.C_memset_#t~loopctr42| 5), 19111#(<= |#Ultimate.C_memset_#t~loopctr42| 6), 19112#(<= |#Ultimate.C_memset_#t~loopctr42| 7), 19113#(<= |#Ultimate.C_memset_#t~loopctr42| 8), 19114#(<= |#Ultimate.C_memset_#t~loopctr42| 9), 18731#true, 19115#(<= |#Ultimate.C_memset_#t~loopctr42| 10), 18732#false, 19116#(not (= |#Ultimate.C_memset_#amount| 119)), 19087#(not (= 119 |zalloc_or_die_#in~size|)), 18896#(and (= |~#list~0.base| |old(~#list~0.base)|) (= |#valid| |old(#valid)|) (= |~#list~0.offset| |old(~#list~0.offset)|) (= |#NULL.base| |old(#NULL.base)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |old(#length)| |#length|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)), 19088#(and (= |calloc_model_#in~size| calloc_model_~size) (or (and (not (= calloc_model_~nmemb 1)) (not (= |calloc_model_#in~nmemb| 1))) (and (= |calloc_model_#in~nmemb| 1) (= calloc_model_~nmemb 1)))), 18897#(and (= |#valid| |old(#valid)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |old(#length)| |#length|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)), 18931#(and (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)), 19064#(or (and (not (= zalloc_or_die_~size 119)) (not (= |zalloc_or_die_#in~size| 119))) (and (= zalloc_or_die_~size 119) (= |zalloc_or_die_#in~size| 119)))] [2018-02-04 20:31:37,850 INFO L134 CoverageAnalysis]: Checked inductivity of 1795 backedges. 560 proven. 55 refuted. 0 times theorem prover too weak. 1180 trivial. 0 not checked. [2018-02-04 20:31:37,850 INFO L409 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-02-04 20:31:37,850 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-02-04 20:31:37,851 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=87, Invalid=333, Unknown=0, NotChecked=0, Total=420 [2018-02-04 20:31:37,851 INFO L87 Difference]: Start difference. First operand 248 states and 265 transitions. Second operand 21 states. [2018-02-04 20:31:39,121 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 20:31:39,121 INFO L93 Difference]: Finished difference Result 289 states and 312 transitions. [2018-02-04 20:31:39,122 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2018-02-04 20:31:39,122 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 192 [2018-02-04 20:31:39,122 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 20:31:39,123 INFO L225 Difference]: With dead ends: 289 [2018-02-04 20:31:39,123 INFO L226 Difference]: Without dead ends: 282 [2018-02-04 20:31:39,124 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 68 GetRequests, 35 SyntacticMatches, 0 SemanticMatches, 33 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 127 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=183, Invalid=1007, Unknown=0, NotChecked=0, Total=1190 [2018-02-04 20:31:39,124 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 282 states. [2018-02-04 20:31:39,129 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 282 to 249. [2018-02-04 20:31:39,130 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 249 states. [2018-02-04 20:31:39,130 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 249 states to 249 states and 267 transitions. [2018-02-04 20:31:39,131 INFO L78 Accepts]: Start accepts. Automaton has 249 states and 267 transitions. Word has length 192 [2018-02-04 20:31:39,131 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 20:31:39,131 INFO L432 AbstractCegarLoop]: Abstraction has 249 states and 267 transitions. [2018-02-04 20:31:39,131 INFO L433 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-02-04 20:31:39,131 INFO L276 IsEmpty]: Start isEmpty. Operand 249 states and 267 transitions. [2018-02-04 20:31:39,135 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 194 [2018-02-04 20:31:39,135 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 20:31:39,135 INFO L351 BasicCegarLoop]: trace histogram [51, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 20:31:39,135 INFO L371 AbstractCegarLoop]: === Iteration 25 === [l3_destroyErr0RequiresViolation, l3_destroyErr3RequiresViolation, l3_destroyErr1RequiresViolation, l3_destroyErr2RequiresViolation, l3_destroyErr4RequiresViolation, l3_destroyErr5RequiresViolation, l0_insertErr3RequiresViolation, l0_insertErr1RequiresViolation, l0_insertErr5RequiresViolation, l0_insertErr2RequiresViolation, l0_insertErr4RequiresViolation, l0_insertErr0RequiresViolation, l4_destroyErr4RequiresViolation, l4_destroyErr6RequiresViolation, l4_destroyErr2RequiresViolation, l4_destroyErr3RequiresViolation, l4_destroyErr1RequiresViolation, l4_destroyErr7RequiresViolation, l4_destroyErr0RequiresViolation, l4_destroyErr5RequiresViolation, l2_insertErr3RequiresViolation, l2_insertErr5RequiresViolation, l2_insertErr0RequiresViolation, l2_insertErr1RequiresViolation, l2_insertErr4RequiresViolation, l2_insertErr2RequiresViolation, mainErr1RequiresViolation, mainErr2EnsuresViolation, mainErr0RequiresViolation, l3_insertErr4RequiresViolation, l3_insertErr0RequiresViolation, l3_insertErr5RequiresViolation, l3_insertErr3RequiresViolation, l3_insertErr1RequiresViolation, l3_insertErr2RequiresViolation, l1_insertErr4RequiresViolation, l1_insertErr0RequiresViolation, l1_insertErr2RequiresViolation, l1_insertErr3RequiresViolation, l1_insertErr1RequiresViolation, l1_insertErr5RequiresViolation, l0_destroyErr5RequiresViolation, l0_destroyErr3RequiresViolation, l0_destroyErr1RequiresViolation, l0_destroyErr0RequiresViolation, l0_destroyErr4RequiresViolation, l0_destroyErr2RequiresViolation, calloc_modelErr0RequiresViolation, calloc_modelErr1RequiresViolation, l4_insertErr5RequiresViolation, l4_insertErr3RequiresViolation, l4_insertErr4RequiresViolation, l4_insertErr6RequiresViolation, l4_insertErr2RequiresViolation, l4_insertErr0RequiresViolation, l4_insertErr1RequiresViolation, l4_insertErr7RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr0RequiresViolation, l1_destroyErr2RequiresViolation, l1_destroyErr4RequiresViolation, l1_destroyErr0RequiresViolation, l1_destroyErr1RequiresViolation, l1_destroyErr5RequiresViolation, l1_destroyErr3RequiresViolation, l2_destroyErr1RequiresViolation, l2_destroyErr0RequiresViolation, l2_destroyErr2RequiresViolation, l2_destroyErr4RequiresViolation, l2_destroyErr5RequiresViolation, l2_destroyErr3RequiresViolation]=== [2018-02-04 20:31:39,135 INFO L82 PathProgramCache]: Analyzing trace with hash -1527060247, now seen corresponding path program 12 times No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 26 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 26 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-02-04 20:31:39,147 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 20:31:39,229 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:39,244 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:39,254 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:39,259 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:39,274 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:39,281 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:39,286 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:39,290 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:39,296 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:39,300 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:39,303 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:39,307 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:39,311 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:39,314 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:39,318 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:39,322 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:39,325 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:39,332 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:39,352 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:39,376 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:39,474 INFO L134 CoverageAnalysis]: Checked inductivity of 1851 backedges. 605 proven. 66 refuted. 0 times theorem prover too weak. 1180 trivial. 0 not checked. [2018-02-04 20:31:39,490 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 20:31:39,490 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [22] total 22 [2018-02-04 20:31:39,490 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 20:31:39,491 INFO L134 CoverageAnalysis]: Checked inductivity of 315 backedges. 45 proven. 0 refuted. 0 times theorem prover too weak. 270 trivial. 0 not checked. [2018-02-04 20:31:39,491 INFO L182 omatonBuilderFactory]: Interpolants [20064#(<= |#Ultimate.C_memset_#t~loopctr42| 4), 20065#(<= |#Ultimate.C_memset_#t~loopctr42| 5), 20066#(<= |#Ultimate.C_memset_#t~loopctr42| 6), 19683#true, 20067#(<= |#Ultimate.C_memset_#t~loopctr42| 7), 19684#false, 20068#(<= |#Ultimate.C_memset_#t~loopctr42| 8), 20069#(<= |#Ultimate.C_memset_#t~loopctr42| 9), 20070#(<= |#Ultimate.C_memset_#t~loopctr42| 10), 20071#(<= |#Ultimate.C_memset_#t~loopctr42| 11), 20072#(not (= 119 |#Ultimate.C_memset_#amount|)), 19849#(and (= |~#list~0.base| |old(~#list~0.base)|) (= |#valid| |old(#valid)|) (= |~#list~0.offset| |old(~#list~0.offset)|) (= |#NULL.base| |old(#NULL.base)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |old(#length)| |#length|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)), 20041#(not (= 119 |zalloc_or_die_#in~size|)), 19850#(and (= |#valid| |old(#valid)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |old(#length)| |#length|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)), 20042#(and (= calloc_model_~size |calloc_model_#in~size|) (or (and (not (= calloc_model_~nmemb 1)) (not (= |calloc_model_#in~nmemb| 1))) (and (= |calloc_model_#in~nmemb| 1) (= calloc_model_~nmemb 1)))), 19884#(and (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)), 20017#(or (and (not (= zalloc_or_die_~size 119)) (not (= |zalloc_or_die_#in~size| 119))) (and (= zalloc_or_die_~size 119) (= |zalloc_or_die_#in~size| 119))), 20059#(or (not (= |calloc_model_#in~nmemb| 1)) (not (= |calloc_model_#in~size| 119))), 20060#(= 0 |#Ultimate.C_memset_#t~loopctr42|), 20061#(= 1 |#Ultimate.C_memset_#t~loopctr42|), 20062#(<= |#Ultimate.C_memset_#t~loopctr42| 2), 20063#(<= |#Ultimate.C_memset_#t~loopctr42| 3)] [2018-02-04 20:31:39,491 INFO L134 CoverageAnalysis]: Checked inductivity of 1851 backedges. 605 proven. 66 refuted. 0 times theorem prover too weak. 1180 trivial. 0 not checked. [2018-02-04 20:31:39,491 INFO L409 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-02-04 20:31:39,491 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-02-04 20:31:39,492 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=109, Invalid=353, Unknown=0, NotChecked=0, Total=462 [2018-02-04 20:31:39,492 INFO L87 Difference]: Start difference. First operand 249 states and 267 transitions. Second operand 22 states. [2018-02-04 20:31:40,503 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 20:31:40,503 INFO L93 Difference]: Finished difference Result 292 states and 316 transitions. [2018-02-04 20:31:40,503 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2018-02-04 20:31:40,503 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 193 [2018-02-04 20:31:40,504 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 20:31:40,504 INFO L225 Difference]: With dead ends: 292 [2018-02-04 20:31:40,504 INFO L226 Difference]: Without dead ends: 285 [2018-02-04 20:31:40,505 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 70 GetRequests, 35 SyntacticMatches, 0 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 147 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=219, Invalid=1113, Unknown=0, NotChecked=0, Total=1332 [2018-02-04 20:31:40,505 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 285 states. [2018-02-04 20:31:40,507 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 285 to 250. [2018-02-04 20:31:40,507 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 250 states. [2018-02-04 20:31:40,508 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 250 states to 250 states and 269 transitions. [2018-02-04 20:31:40,508 INFO L78 Accepts]: Start accepts. Automaton has 250 states and 269 transitions. Word has length 193 [2018-02-04 20:31:40,508 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 20:31:40,508 INFO L432 AbstractCegarLoop]: Abstraction has 250 states and 269 transitions. [2018-02-04 20:31:40,508 INFO L433 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-02-04 20:31:40,508 INFO L276 IsEmpty]: Start isEmpty. Operand 250 states and 269 transitions. [2018-02-04 20:31:40,509 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 195 [2018-02-04 20:31:40,509 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 20:31:40,509 INFO L351 BasicCegarLoop]: trace histogram [52, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 20:31:40,509 INFO L371 AbstractCegarLoop]: === Iteration 26 === [l3_destroyErr0RequiresViolation, l3_destroyErr3RequiresViolation, l3_destroyErr1RequiresViolation, l3_destroyErr2RequiresViolation, l3_destroyErr4RequiresViolation, l3_destroyErr5RequiresViolation, l0_insertErr3RequiresViolation, l0_insertErr1RequiresViolation, l0_insertErr5RequiresViolation, l0_insertErr2RequiresViolation, l0_insertErr4RequiresViolation, l0_insertErr0RequiresViolation, l4_destroyErr4RequiresViolation, l4_destroyErr6RequiresViolation, l4_destroyErr2RequiresViolation, l4_destroyErr3RequiresViolation, l4_destroyErr1RequiresViolation, l4_destroyErr7RequiresViolation, l4_destroyErr0RequiresViolation, l4_destroyErr5RequiresViolation, l2_insertErr3RequiresViolation, l2_insertErr5RequiresViolation, l2_insertErr0RequiresViolation, l2_insertErr1RequiresViolation, l2_insertErr4RequiresViolation, l2_insertErr2RequiresViolation, mainErr1RequiresViolation, mainErr2EnsuresViolation, mainErr0RequiresViolation, l3_insertErr4RequiresViolation, l3_insertErr0RequiresViolation, l3_insertErr5RequiresViolation, l3_insertErr3RequiresViolation, l3_insertErr1RequiresViolation, l3_insertErr2RequiresViolation, l1_insertErr4RequiresViolation, l1_insertErr0RequiresViolation, l1_insertErr2RequiresViolation, l1_insertErr3RequiresViolation, l1_insertErr1RequiresViolation, l1_insertErr5RequiresViolation, l0_destroyErr5RequiresViolation, l0_destroyErr3RequiresViolation, l0_destroyErr1RequiresViolation, l0_destroyErr0RequiresViolation, l0_destroyErr4RequiresViolation, l0_destroyErr2RequiresViolation, calloc_modelErr0RequiresViolation, calloc_modelErr1RequiresViolation, l4_insertErr5RequiresViolation, l4_insertErr3RequiresViolation, l4_insertErr4RequiresViolation, l4_insertErr6RequiresViolation, l4_insertErr2RequiresViolation, l4_insertErr0RequiresViolation, l4_insertErr1RequiresViolation, l4_insertErr7RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr0RequiresViolation, l1_destroyErr2RequiresViolation, l1_destroyErr4RequiresViolation, l1_destroyErr0RequiresViolation, l1_destroyErr1RequiresViolation, l1_destroyErr5RequiresViolation, l1_destroyErr3RequiresViolation, l2_destroyErr1RequiresViolation, l2_destroyErr0RequiresViolation, l2_destroyErr2RequiresViolation, l2_destroyErr4RequiresViolation, l2_destroyErr5RequiresViolation, l2_destroyErr3RequiresViolation]=== [2018-02-04 20:31:40,510 INFO L82 PathProgramCache]: Analyzing trace with hash -1488282748, now seen corresponding path program 13 times No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 27 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 27 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-02-04 20:31:40,518 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 20:31:40,552 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:40,566 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:40,575 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:40,579 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:40,586 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:40,591 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:40,595 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:40,599 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:40,605 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:40,610 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:40,614 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:40,620 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:40,624 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:40,627 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:40,632 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:40,635 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:40,638 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:40,646 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:40,667 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:40,690 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:40,797 INFO L134 CoverageAnalysis]: Checked inductivity of 1908 backedges. 650 proven. 78 refuted. 0 times theorem prover too weak. 1180 trivial. 0 not checked. [2018-02-04 20:31:40,813 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 20:31:40,813 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [23] total 23 [2018-02-04 20:31:40,813 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 20:31:40,813 INFO L134 CoverageAnalysis]: Checked inductivity of 315 backedges. 45 proven. 0 refuted. 0 times theorem prover too weak. 270 trivial. 0 not checked. [2018-02-04 20:31:40,813 INFO L182 omatonBuilderFactory]: Interpolants [21024#(or (not (= |calloc_model_#in~nmemb| 1)) (not (= |calloc_model_#in~size| 119))), 21025#(= 0 |#Ultimate.C_memset_#t~loopctr42|), 21026#(<= |#Ultimate.C_memset_#t~loopctr42| 1), 21027#(<= |#Ultimate.C_memset_#t~loopctr42| 2), 21028#(<= |#Ultimate.C_memset_#t~loopctr42| 3), 20645#true, 21029#(<= |#Ultimate.C_memset_#t~loopctr42| 4), 20646#false, 21030#(<= |#Ultimate.C_memset_#t~loopctr42| 5), 21031#(<= |#Ultimate.C_memset_#t~loopctr42| 6), 21032#(<= |#Ultimate.C_memset_#t~loopctr42| 7), 21033#(<= |#Ultimate.C_memset_#t~loopctr42| 8), 21034#(<= |#Ultimate.C_memset_#t~loopctr42| 9), 21035#(<= |#Ultimate.C_memset_#t~loopctr42| 10), 20812#(and (= |~#list~0.base| |old(~#list~0.base)|) (= |#valid| |old(#valid)|) (= |~#list~0.offset| |old(~#list~0.offset)|) (= |#NULL.base| |old(#NULL.base)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |old(#length)| |#length|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)), 21036#(<= |#Ultimate.C_memset_#t~loopctr42| 11), 20813#(and (= |#valid| |old(#valid)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |old(#length)| |#length|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)), 21037#(<= |#Ultimate.C_memset_#t~loopctr42| 12), 21005#(not (= 119 |zalloc_or_die_#in~size|)), 21006#(and (= calloc_model_~size |calloc_model_#in~size|) (or (and (not (= calloc_model_~nmemb 1)) (not (= |calloc_model_#in~nmemb| 1))) (and (= |calloc_model_#in~nmemb| 1) (= calloc_model_~nmemb 1)))), 21038#(not (= 119 |#Ultimate.C_memset_#amount|)), 20847#(and (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)), 20980#(or (and (not (= zalloc_or_die_~size 119)) (not (= |zalloc_or_die_#in~size| 119))) (and (= zalloc_or_die_~size 119) (= |zalloc_or_die_#in~size| 119)))] [2018-02-04 20:31:40,814 INFO L134 CoverageAnalysis]: Checked inductivity of 1908 backedges. 650 proven. 78 refuted. 0 times theorem prover too weak. 1180 trivial. 0 not checked. [2018-02-04 20:31:40,814 INFO L409 AbstractCegarLoop]: Interpolant automaton has 23 states [2018-02-04 20:31:40,814 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2018-02-04 20:31:40,814 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=124, Invalid=382, Unknown=0, NotChecked=0, Total=506 [2018-02-04 20:31:40,814 INFO L87 Difference]: Start difference. First operand 250 states and 269 transitions. Second operand 23 states. [2018-02-04 20:31:42,261 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 20:31:42,262 INFO L93 Difference]: Finished difference Result 295 states and 320 transitions. [2018-02-04 20:31:42,262 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2018-02-04 20:31:42,262 INFO L78 Accepts]: Start accepts. Automaton has 23 states. Word has length 194 [2018-02-04 20:31:42,262 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 20:31:42,263 INFO L225 Difference]: With dead ends: 295 [2018-02-04 20:31:42,263 INFO L226 Difference]: Without dead ends: 288 [2018-02-04 20:31:42,264 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 72 GetRequests, 35 SyntacticMatches, 0 SemanticMatches, 37 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 166 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=248, Invalid=1234, Unknown=0, NotChecked=0, Total=1482 [2018-02-04 20:31:42,264 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 288 states. [2018-02-04 20:31:42,266 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 288 to 251. [2018-02-04 20:31:42,266 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 251 states. [2018-02-04 20:31:42,267 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 251 states to 251 states and 271 transitions. [2018-02-04 20:31:42,267 INFO L78 Accepts]: Start accepts. Automaton has 251 states and 271 transitions. Word has length 194 [2018-02-04 20:31:42,267 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 20:31:42,267 INFO L432 AbstractCegarLoop]: Abstraction has 251 states and 271 transitions. [2018-02-04 20:31:42,268 INFO L433 AbstractCegarLoop]: Interpolant automaton has 23 states. [2018-02-04 20:31:42,268 INFO L276 IsEmpty]: Start isEmpty. Operand 251 states and 271 transitions. [2018-02-04 20:31:42,268 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 196 [2018-02-04 20:31:42,268 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 20:31:42,269 INFO L351 BasicCegarLoop]: trace histogram [53, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 20:31:42,269 INFO L371 AbstractCegarLoop]: === Iteration 27 === [l3_destroyErr0RequiresViolation, l3_destroyErr3RequiresViolation, l3_destroyErr1RequiresViolation, l3_destroyErr2RequiresViolation, l3_destroyErr4RequiresViolation, l3_destroyErr5RequiresViolation, l0_insertErr3RequiresViolation, l0_insertErr1RequiresViolation, l0_insertErr5RequiresViolation, l0_insertErr2RequiresViolation, l0_insertErr4RequiresViolation, l0_insertErr0RequiresViolation, l4_destroyErr4RequiresViolation, l4_destroyErr6RequiresViolation, l4_destroyErr2RequiresViolation, l4_destroyErr3RequiresViolation, l4_destroyErr1RequiresViolation, l4_destroyErr7RequiresViolation, l4_destroyErr0RequiresViolation, l4_destroyErr5RequiresViolation, l2_insertErr3RequiresViolation, l2_insertErr5RequiresViolation, l2_insertErr0RequiresViolation, l2_insertErr1RequiresViolation, l2_insertErr4RequiresViolation, l2_insertErr2RequiresViolation, mainErr1RequiresViolation, mainErr2EnsuresViolation, mainErr0RequiresViolation, l3_insertErr4RequiresViolation, l3_insertErr0RequiresViolation, l3_insertErr5RequiresViolation, l3_insertErr3RequiresViolation, l3_insertErr1RequiresViolation, l3_insertErr2RequiresViolation, l1_insertErr4RequiresViolation, l1_insertErr0RequiresViolation, l1_insertErr2RequiresViolation, l1_insertErr3RequiresViolation, l1_insertErr1RequiresViolation, l1_insertErr5RequiresViolation, l0_destroyErr5RequiresViolation, l0_destroyErr3RequiresViolation, l0_destroyErr1RequiresViolation, l0_destroyErr0RequiresViolation, l0_destroyErr4RequiresViolation, l0_destroyErr2RequiresViolation, calloc_modelErr0RequiresViolation, calloc_modelErr1RequiresViolation, l4_insertErr5RequiresViolation, l4_insertErr3RequiresViolation, l4_insertErr4RequiresViolation, l4_insertErr6RequiresViolation, l4_insertErr2RequiresViolation, l4_insertErr0RequiresViolation, l4_insertErr1RequiresViolation, l4_insertErr7RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr0RequiresViolation, l1_destroyErr2RequiresViolation, l1_destroyErr4RequiresViolation, l1_destroyErr0RequiresViolation, l1_destroyErr1RequiresViolation, l1_destroyErr5RequiresViolation, l1_destroyErr3RequiresViolation, l2_destroyErr1RequiresViolation, l2_destroyErr0RequiresViolation, l2_destroyErr2RequiresViolation, l2_destroyErr4RequiresViolation, l2_destroyErr5RequiresViolation, l2_destroyErr3RequiresViolation]=== [2018-02-04 20:31:42,269 INFO L82 PathProgramCache]: Analyzing trace with hash -286180279, now seen corresponding path program 14 times No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 28 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 28 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-02-04 20:31:42,273 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 20:31:42,319 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:42,336 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:42,346 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:42,350 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:42,358 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:42,364 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:42,369 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:42,372 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:42,378 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:42,383 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:42,387 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:42,393 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:42,398 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:42,401 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:42,407 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:42,413 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:42,416 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:42,426 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:42,451 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:42,478 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:42,620 INFO L134 CoverageAnalysis]: Checked inductivity of 1966 backedges. 695 proven. 91 refuted. 0 times theorem prover too weak. 1180 trivial. 0 not checked. [2018-02-04 20:31:42,636 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 20:31:42,636 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [24] total 24 [2018-02-04 20:31:42,636 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 20:31:42,637 INFO L134 CoverageAnalysis]: Checked inductivity of 315 backedges. 45 proven. 0 refuted. 0 times theorem prover too weak. 270 trivial. 0 not checked. [2018-02-04 20:31:42,637 INFO L182 omatonBuilderFactory]: Interpolants [21953#(or (and (not (= zalloc_or_die_~size 119)) (not (= |zalloc_or_die_#in~size| 119))) (and (= zalloc_or_die_~size 119) (= |zalloc_or_die_#in~size| 119))), 21999#(or (not (= |calloc_model_#in~nmemb| 1)) (not (= |calloc_model_#in~size| 119))), 22000#(= 0 |#Ultimate.C_memset_#t~loopctr42|), 21617#true, 22001#(<= |#Ultimate.C_memset_#t~loopctr42| 1), 21618#false, 22002#(<= |#Ultimate.C_memset_#t~loopctr42| 2), 22003#(<= |#Ultimate.C_memset_#t~loopctr42| 3), 22004#(<= |#Ultimate.C_memset_#t~loopctr42| 4), 22005#(<= |#Ultimate.C_memset_#t~loopctr42| 5), 22006#(<= |#Ultimate.C_memset_#t~loopctr42| 6), 22007#(<= |#Ultimate.C_memset_#t~loopctr42| 7), 22008#(<= |#Ultimate.C_memset_#t~loopctr42| 8), 21785#(and (= |~#list~0.base| |old(~#list~0.base)|) (= |#valid| |old(#valid)|) (= |~#list~0.offset| |old(~#list~0.offset)|) (= |#NULL.base| |old(#NULL.base)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |old(#length)| |#length|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)), 22009#(<= |#Ultimate.C_memset_#t~loopctr42| 9), 21786#(and (= |#valid| |old(#valid)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |old(#length)| |#length|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)), 22010#(<= |#Ultimate.C_memset_#t~loopctr42| 10), 22011#(<= |#Ultimate.C_memset_#t~loopctr42| 11), 21979#(not (= 119 |zalloc_or_die_#in~size|)), 21820#(and (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)), 21980#(and (= |calloc_model_#in~size| calloc_model_~size) (or (and (not (= calloc_model_~nmemb 1)) (not (= |calloc_model_#in~nmemb| 1))) (and (= |calloc_model_#in~nmemb| 1) (= calloc_model_~nmemb 1)))), 22012#(<= |#Ultimate.C_memset_#t~loopctr42| 12), 22013#(<= |#Ultimate.C_memset_#t~loopctr42| 13), 22014#(not (= 119 |#Ultimate.C_memset_#amount|))] [2018-02-04 20:31:42,637 INFO L134 CoverageAnalysis]: Checked inductivity of 1966 backedges. 695 proven. 91 refuted. 0 times theorem prover too weak. 1180 trivial. 0 not checked. [2018-02-04 20:31:42,637 INFO L409 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-02-04 20:31:42,637 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-02-04 20:31:42,637 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=139, Invalid=413, Unknown=0, NotChecked=0, Total=552 [2018-02-04 20:31:42,637 INFO L87 Difference]: Start difference. First operand 251 states and 271 transitions. Second operand 24 states. [2018-02-04 20:31:43,947 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 20:31:43,947 INFO L93 Difference]: Finished difference Result 298 states and 324 transitions. [2018-02-04 20:31:43,947 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2018-02-04 20:31:43,947 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 195 [2018-02-04 20:31:43,948 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 20:31:43,948 INFO L225 Difference]: With dead ends: 298 [2018-02-04 20:31:43,948 INFO L226 Difference]: Without dead ends: 291 [2018-02-04 20:31:43,949 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 74 GetRequests, 35 SyntacticMatches, 0 SemanticMatches, 39 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 185 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=278, Invalid=1362, Unknown=0, NotChecked=0, Total=1640 [2018-02-04 20:31:43,949 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 291 states. [2018-02-04 20:31:43,950 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 291 to 252. [2018-02-04 20:31:43,951 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 252 states. [2018-02-04 20:31:43,951 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 252 states and 273 transitions. [2018-02-04 20:31:43,951 INFO L78 Accepts]: Start accepts. Automaton has 252 states and 273 transitions. Word has length 195 [2018-02-04 20:31:43,951 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 20:31:43,951 INFO L432 AbstractCegarLoop]: Abstraction has 252 states and 273 transitions. [2018-02-04 20:31:43,951 INFO L433 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-02-04 20:31:43,951 INFO L276 IsEmpty]: Start isEmpty. Operand 252 states and 273 transitions. [2018-02-04 20:31:43,952 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 197 [2018-02-04 20:31:43,952 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 20:31:43,952 INFO L351 BasicCegarLoop]: trace histogram [54, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 20:31:43,952 INFO L371 AbstractCegarLoop]: === Iteration 28 === [l3_destroyErr0RequiresViolation, l3_destroyErr3RequiresViolation, l3_destroyErr1RequiresViolation, l3_destroyErr2RequiresViolation, l3_destroyErr4RequiresViolation, l3_destroyErr5RequiresViolation, l0_insertErr3RequiresViolation, l0_insertErr1RequiresViolation, l0_insertErr5RequiresViolation, l0_insertErr2RequiresViolation, l0_insertErr4RequiresViolation, l0_insertErr0RequiresViolation, l4_destroyErr4RequiresViolation, l4_destroyErr6RequiresViolation, l4_destroyErr2RequiresViolation, l4_destroyErr3RequiresViolation, l4_destroyErr1RequiresViolation, l4_destroyErr7RequiresViolation, l4_destroyErr0RequiresViolation, l4_destroyErr5RequiresViolation, l2_insertErr3RequiresViolation, l2_insertErr5RequiresViolation, l2_insertErr0RequiresViolation, l2_insertErr1RequiresViolation, l2_insertErr4RequiresViolation, l2_insertErr2RequiresViolation, mainErr1RequiresViolation, mainErr2EnsuresViolation, mainErr0RequiresViolation, l3_insertErr4RequiresViolation, l3_insertErr0RequiresViolation, l3_insertErr5RequiresViolation, l3_insertErr3RequiresViolation, l3_insertErr1RequiresViolation, l3_insertErr2RequiresViolation, l1_insertErr4RequiresViolation, l1_insertErr0RequiresViolation, l1_insertErr2RequiresViolation, l1_insertErr3RequiresViolation, l1_insertErr1RequiresViolation, l1_insertErr5RequiresViolation, l0_destroyErr5RequiresViolation, l0_destroyErr3RequiresViolation, l0_destroyErr1RequiresViolation, l0_destroyErr0RequiresViolation, l0_destroyErr4RequiresViolation, l0_destroyErr2RequiresViolation, calloc_modelErr0RequiresViolation, calloc_modelErr1RequiresViolation, l4_insertErr5RequiresViolation, l4_insertErr3RequiresViolation, l4_insertErr4RequiresViolation, l4_insertErr6RequiresViolation, l4_insertErr2RequiresViolation, l4_insertErr0RequiresViolation, l4_insertErr1RequiresViolation, l4_insertErr7RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr0RequiresViolation, l1_destroyErr2RequiresViolation, l1_destroyErr4RequiresViolation, l1_destroyErr0RequiresViolation, l1_destroyErr1RequiresViolation, l1_destroyErr5RequiresViolation, l1_destroyErr3RequiresViolation, l2_destroyErr1RequiresViolation, l2_destroyErr0RequiresViolation, l2_destroyErr2RequiresViolation, l2_destroyErr4RequiresViolation, l2_destroyErr5RequiresViolation, l2_destroyErr3RequiresViolation]=== [2018-02-04 20:31:43,952 INFO L82 PathProgramCache]: Analyzing trace with hash -1675709404, now seen corresponding path program 15 times No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 29 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 29 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-02-04 20:31:43,957 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 20:31:43,992 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:44,006 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:44,014 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:44,018 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:44,024 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:44,028 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:44,032 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:44,034 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:44,039 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:44,042 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:44,045 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:44,050 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:44,053 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:44,056 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:44,062 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:44,066 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:44,069 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:44,076 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:44,098 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:44,124 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:44,257 INFO L134 CoverageAnalysis]: Checked inductivity of 2025 backedges. 740 proven. 105 refuted. 0 times theorem prover too weak. 1180 trivial. 0 not checked. [2018-02-04 20:31:44,272 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 20:31:44,273 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [25] total 25 [2018-02-04 20:31:44,273 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 20:31:44,273 INFO L134 CoverageAnalysis]: Checked inductivity of 315 backedges. 45 proven. 0 refuted. 0 times theorem prover too weak. 270 trivial. 0 not checked. [2018-02-04 20:31:44,273 INFO L182 omatonBuilderFactory]: Interpolants [22599#true, 22600#false, 22984#(or (not (= |calloc_model_#in~nmemb| 1)) (not (= |calloc_model_#in~size| 119))), 22985#(= 0 |#Ultimate.C_memset_#t~loopctr42|), 22986#(= 1 |#Ultimate.C_memset_#t~loopctr42|), 22987#(<= |#Ultimate.C_memset_#t~loopctr42| 2), 22988#(<= |#Ultimate.C_memset_#t~loopctr42| 3), 22989#(<= |#Ultimate.C_memset_#t~loopctr42| 4), 22990#(<= |#Ultimate.C_memset_#t~loopctr42| 5), 22991#(<= |#Ultimate.C_memset_#t~loopctr42| 6), 22992#(<= |#Ultimate.C_memset_#t~loopctr42| 7), 22993#(<= |#Ultimate.C_memset_#t~loopctr42| 8), 22994#(<= |#Ultimate.C_memset_#t~loopctr42| 9), 22803#(and (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)), 22995#(<= |#Ultimate.C_memset_#t~loopctr42| 10), 22996#(<= |#Ultimate.C_memset_#t~loopctr42| 11), 22997#(<= |#Ultimate.C_memset_#t~loopctr42| 12), 22998#(<= |#Ultimate.C_memset_#t~loopctr42| 13), 22999#(<= |#Ultimate.C_memset_#t~loopctr42| 14), 22936#(or (and (not (= zalloc_or_die_~size 119)) (not (= |zalloc_or_die_#in~size| 119))) (and (= zalloc_or_die_~size 119) (= |zalloc_or_die_#in~size| 119))), 23000#(not (= 119 |#Ultimate.C_memset_#amount|)), 22768#(and (= |~#list~0.base| |old(~#list~0.base)|) (= |#valid| |old(#valid)|) (= |~#list~0.offset| |old(~#list~0.offset)|) (= |#NULL.base| |old(#NULL.base)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |old(#length)| |#length|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)), 22769#(and (= |#valid| |old(#valid)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |old(#length)| |#length|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)), 22963#(not (= 119 |zalloc_or_die_#in~size|)), 22964#(and (= |calloc_model_#in~size| calloc_model_~size) (or (and (not (= calloc_model_~nmemb 1)) (not (= |calloc_model_#in~nmemb| 1))) (and (= |calloc_model_#in~nmemb| 1) (= calloc_model_~nmemb 1))))] [2018-02-04 20:31:44,273 INFO L134 CoverageAnalysis]: Checked inductivity of 2025 backedges. 740 proven. 105 refuted. 0 times theorem prover too weak. 1180 trivial. 0 not checked. [2018-02-04 20:31:44,273 INFO L409 AbstractCegarLoop]: Interpolant automaton has 25 states [2018-02-04 20:31:44,273 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2018-02-04 20:31:44,274 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=154, Invalid=446, Unknown=0, NotChecked=0, Total=600 [2018-02-04 20:31:44,274 INFO L87 Difference]: Start difference. First operand 252 states and 273 transitions. Second operand 25 states. [2018-02-04 20:31:45,694 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 20:31:45,695 INFO L93 Difference]: Finished difference Result 301 states and 328 transitions. [2018-02-04 20:31:45,695 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2018-02-04 20:31:45,695 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 196 [2018-02-04 20:31:45,695 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 20:31:45,696 INFO L225 Difference]: With dead ends: 301 [2018-02-04 20:31:45,696 INFO L226 Difference]: Without dead ends: 294 [2018-02-04 20:31:45,697 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 76 GetRequests, 35 SyntacticMatches, 0 SemanticMatches, 41 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 204 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=309, Invalid=1497, Unknown=0, NotChecked=0, Total=1806 [2018-02-04 20:31:45,697 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 294 states. [2018-02-04 20:31:45,700 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 294 to 253. [2018-02-04 20:31:45,700 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 253 states. [2018-02-04 20:31:45,701 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 253 states to 253 states and 275 transitions. [2018-02-04 20:31:45,701 INFO L78 Accepts]: Start accepts. Automaton has 253 states and 275 transitions. Word has length 196 [2018-02-04 20:31:45,701 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 20:31:45,701 INFO L432 AbstractCegarLoop]: Abstraction has 253 states and 275 transitions. [2018-02-04 20:31:45,701 INFO L433 AbstractCegarLoop]: Interpolant automaton has 25 states. [2018-02-04 20:31:45,701 INFO L276 IsEmpty]: Start isEmpty. Operand 253 states and 275 transitions. [2018-02-04 20:31:45,702 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 198 [2018-02-04 20:31:45,702 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 20:31:45,702 INFO L351 BasicCegarLoop]: trace histogram [55, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 20:31:45,702 INFO L371 AbstractCegarLoop]: === Iteration 29 === [l3_destroyErr0RequiresViolation, l3_destroyErr3RequiresViolation, l3_destroyErr1RequiresViolation, l3_destroyErr2RequiresViolation, l3_destroyErr4RequiresViolation, l3_destroyErr5RequiresViolation, l0_insertErr3RequiresViolation, l0_insertErr1RequiresViolation, l0_insertErr5RequiresViolation, l0_insertErr2RequiresViolation, l0_insertErr4RequiresViolation, l0_insertErr0RequiresViolation, l4_destroyErr4RequiresViolation, l4_destroyErr6RequiresViolation, l4_destroyErr2RequiresViolation, l4_destroyErr3RequiresViolation, l4_destroyErr1RequiresViolation, l4_destroyErr7RequiresViolation, l4_destroyErr0RequiresViolation, l4_destroyErr5RequiresViolation, l2_insertErr3RequiresViolation, l2_insertErr5RequiresViolation, l2_insertErr0RequiresViolation, l2_insertErr1RequiresViolation, l2_insertErr4RequiresViolation, l2_insertErr2RequiresViolation, mainErr1RequiresViolation, mainErr2EnsuresViolation, mainErr0RequiresViolation, l3_insertErr4RequiresViolation, l3_insertErr0RequiresViolation, l3_insertErr5RequiresViolation, l3_insertErr3RequiresViolation, l3_insertErr1RequiresViolation, l3_insertErr2RequiresViolation, l1_insertErr4RequiresViolation, l1_insertErr0RequiresViolation, l1_insertErr2RequiresViolation, l1_insertErr3RequiresViolation, l1_insertErr1RequiresViolation, l1_insertErr5RequiresViolation, l0_destroyErr5RequiresViolation, l0_destroyErr3RequiresViolation, l0_destroyErr1RequiresViolation, l0_destroyErr0RequiresViolation, l0_destroyErr4RequiresViolation, l0_destroyErr2RequiresViolation, calloc_modelErr0RequiresViolation, calloc_modelErr1RequiresViolation, l4_insertErr5RequiresViolation, l4_insertErr3RequiresViolation, l4_insertErr4RequiresViolation, l4_insertErr6RequiresViolation, l4_insertErr2RequiresViolation, l4_insertErr0RequiresViolation, l4_insertErr1RequiresViolation, l4_insertErr7RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr0RequiresViolation, l1_destroyErr2RequiresViolation, l1_destroyErr4RequiresViolation, l1_destroyErr0RequiresViolation, l1_destroyErr1RequiresViolation, l1_destroyErr5RequiresViolation, l1_destroyErr3RequiresViolation, l2_destroyErr1RequiresViolation, l2_destroyErr0RequiresViolation, l2_destroyErr2RequiresViolation, l2_destroyErr4RequiresViolation, l2_destroyErr5RequiresViolation, l2_destroyErr3RequiresViolation]=== [2018-02-04 20:31:45,703 INFO L82 PathProgramCache]: Analyzing trace with hash -1801439319, now seen corresponding path program 16 times No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 30 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 30 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-02-04 20:31:45,717 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 20:31:45,783 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:45,816 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:45,827 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:45,832 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:45,839 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:45,845 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:45,850 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:45,853 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:45,859 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:45,864 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:45,868 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:45,874 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:45,879 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:45,884 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:45,892 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:45,898 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:45,903 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:45,916 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:45,949 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:45,984 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:46,117 INFO L134 CoverageAnalysis]: Checked inductivity of 2085 backedges. 785 proven. 120 refuted. 0 times theorem prover too weak. 1180 trivial. 0 not checked. [2018-02-04 20:31:46,132 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 20:31:46,132 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [26] total 26 [2018-02-04 20:31:46,133 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 20:31:46,133 INFO L134 CoverageAnalysis]: Checked inductivity of 315 backedges. 45 proven. 0 refuted. 0 times theorem prover too weak. 270 trivial. 0 not checked. [2018-02-04 20:31:46,133 INFO L182 omatonBuilderFactory]: Interpolants [23761#(and (= |~#list~0.base| |old(~#list~0.base)|) (= |#valid| |old(#valid)|) (= |~#list~0.offset| |old(~#list~0.offset)|) (= |#NULL.base| |old(#NULL.base)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |old(#length)| |#length|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)), 23762#(and (= |#valid| |old(#valid)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |old(#length)| |#length|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)), 23957#(not (= 119 |zalloc_or_die_#in~size|)), 23958#(and (= calloc_model_~size |calloc_model_#in~size|) (or (and (not (= calloc_model_~nmemb 1)) (not (= |calloc_model_#in~nmemb| 1))) (and (= |calloc_model_#in~nmemb| 1) (= calloc_model_~nmemb 1)))), 23591#true, 23592#false, 23979#(or (not (= |calloc_model_#in~nmemb| 1)) (not (= |calloc_model_#in~size| 119))), 23980#(= 0 |#Ultimate.C_memset_#t~loopctr42|), 23981#(= 1 |#Ultimate.C_memset_#t~loopctr42|), 23982#(= |#Ultimate.C_memset_#t~loopctr42| 2), 23983#(<= |#Ultimate.C_memset_#t~loopctr42| 3), 23984#(<= |#Ultimate.C_memset_#t~loopctr42| 4), 23985#(<= |#Ultimate.C_memset_#t~loopctr42| 5), 23986#(<= |#Ultimate.C_memset_#t~loopctr42| 6), 23987#(<= |#Ultimate.C_memset_#t~loopctr42| 7), 23796#(and (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)), 23988#(<= |#Ultimate.C_memset_#t~loopctr42| 8), 23989#(<= |#Ultimate.C_memset_#t~loopctr42| 9), 23990#(<= |#Ultimate.C_memset_#t~loopctr42| 10), 23991#(<= |#Ultimate.C_memset_#t~loopctr42| 11), 23992#(<= |#Ultimate.C_memset_#t~loopctr42| 12), 23929#(or (and (not (= zalloc_or_die_~size 119)) (not (= |zalloc_or_die_#in~size| 119))) (and (= zalloc_or_die_~size 119) (= |zalloc_or_die_#in~size| 119))), 23993#(<= |#Ultimate.C_memset_#t~loopctr42| 13), 23994#(<= |#Ultimate.C_memset_#t~loopctr42| 14), 23995#(<= |#Ultimate.C_memset_#t~loopctr42| 15), 23996#(not (= |#Ultimate.C_memset_#amount| 119))] [2018-02-04 20:31:46,133 INFO L134 CoverageAnalysis]: Checked inductivity of 2085 backedges. 785 proven. 120 refuted. 0 times theorem prover too weak. 1180 trivial. 0 not checked. [2018-02-04 20:31:46,133 INFO L409 AbstractCegarLoop]: Interpolant automaton has 26 states [2018-02-04 20:31:46,133 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2018-02-04 20:31:46,133 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=169, Invalid=481, Unknown=0, NotChecked=0, Total=650 [2018-02-04 20:31:46,134 INFO L87 Difference]: Start difference. First operand 253 states and 275 transitions. Second operand 26 states. [2018-02-04 20:31:49,624 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 20:31:49,624 INFO L93 Difference]: Finished difference Result 304 states and 332 transitions. [2018-02-04 20:31:49,624 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 40 states. [2018-02-04 20:31:49,624 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 197 [2018-02-04 20:31:49,624 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 20:31:49,625 INFO L225 Difference]: With dead ends: 304 [2018-02-04 20:31:49,625 INFO L226 Difference]: Without dead ends: 297 [2018-02-04 20:31:49,626 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 78 GetRequests, 35 SyntacticMatches, 0 SemanticMatches, 43 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 224 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=342, Invalid=1638, Unknown=0, NotChecked=0, Total=1980 [2018-02-04 20:31:49,626 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 297 states. [2018-02-04 20:31:49,628 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 297 to 254. [2018-02-04 20:31:49,628 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 254 states. [2018-02-04 20:31:49,629 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 254 states to 254 states and 277 transitions. [2018-02-04 20:31:49,629 INFO L78 Accepts]: Start accepts. Automaton has 254 states and 277 transitions. Word has length 197 [2018-02-04 20:31:49,629 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 20:31:49,629 INFO L432 AbstractCegarLoop]: Abstraction has 254 states and 277 transitions. [2018-02-04 20:31:49,629 INFO L433 AbstractCegarLoop]: Interpolant automaton has 26 states. [2018-02-04 20:31:49,629 INFO L276 IsEmpty]: Start isEmpty. Operand 254 states and 277 transitions. [2018-02-04 20:31:49,629 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 199 [2018-02-04 20:31:49,629 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 20:31:49,630 INFO L351 BasicCegarLoop]: trace histogram [56, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 20:31:49,630 INFO L371 AbstractCegarLoop]: === Iteration 30 === [l3_destroyErr0RequiresViolation, l3_destroyErr3RequiresViolation, l3_destroyErr1RequiresViolation, l3_destroyErr2RequiresViolation, l3_destroyErr4RequiresViolation, l3_destroyErr5RequiresViolation, l0_insertErr3RequiresViolation, l0_insertErr1RequiresViolation, l0_insertErr5RequiresViolation, l0_insertErr2RequiresViolation, l0_insertErr4RequiresViolation, l0_insertErr0RequiresViolation, l4_destroyErr4RequiresViolation, l4_destroyErr6RequiresViolation, l4_destroyErr2RequiresViolation, l4_destroyErr3RequiresViolation, l4_destroyErr1RequiresViolation, l4_destroyErr7RequiresViolation, l4_destroyErr0RequiresViolation, l4_destroyErr5RequiresViolation, l2_insertErr3RequiresViolation, l2_insertErr5RequiresViolation, l2_insertErr0RequiresViolation, l2_insertErr1RequiresViolation, l2_insertErr4RequiresViolation, l2_insertErr2RequiresViolation, mainErr1RequiresViolation, mainErr2EnsuresViolation, mainErr0RequiresViolation, l3_insertErr4RequiresViolation, l3_insertErr0RequiresViolation, l3_insertErr5RequiresViolation, l3_insertErr3RequiresViolation, l3_insertErr1RequiresViolation, l3_insertErr2RequiresViolation, l1_insertErr4RequiresViolation, l1_insertErr0RequiresViolation, l1_insertErr2RequiresViolation, l1_insertErr3RequiresViolation, l1_insertErr1RequiresViolation, l1_insertErr5RequiresViolation, l0_destroyErr5RequiresViolation, l0_destroyErr3RequiresViolation, l0_destroyErr1RequiresViolation, l0_destroyErr0RequiresViolation, l0_destroyErr4RequiresViolation, l0_destroyErr2RequiresViolation, calloc_modelErr0RequiresViolation, calloc_modelErr1RequiresViolation, l4_insertErr5RequiresViolation, l4_insertErr3RequiresViolation, l4_insertErr4RequiresViolation, l4_insertErr6RequiresViolation, l4_insertErr2RequiresViolation, l4_insertErr0RequiresViolation, l4_insertErr1RequiresViolation, l4_insertErr7RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr0RequiresViolation, l1_destroyErr2RequiresViolation, l1_destroyErr4RequiresViolation, l1_destroyErr0RequiresViolation, l1_destroyErr1RequiresViolation, l1_destroyErr5RequiresViolation, l1_destroyErr3RequiresViolation, l2_destroyErr1RequiresViolation, l2_destroyErr0RequiresViolation, l2_destroyErr2RequiresViolation, l2_destroyErr4RequiresViolation, l2_destroyErr5RequiresViolation, l2_destroyErr3RequiresViolation]=== [2018-02-04 20:31:49,630 INFO L82 PathProgramCache]: Analyzing trace with hash -1404099388, now seen corresponding path program 17 times No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 31 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 31 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-02-04 20:31:49,670 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 20:31:49,716 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:49,736 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:49,746 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:49,751 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:49,759 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:49,765 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:49,770 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:49,774 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:49,780 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:49,785 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:49,788 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:49,792 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:49,796 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:49,799 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:49,804 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:49,808 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:49,811 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:49,820 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:49,844 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:49,870 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:50,020 INFO L134 CoverageAnalysis]: Checked inductivity of 2146 backedges. 830 proven. 136 refuted. 0 times theorem prover too weak. 1180 trivial. 0 not checked. [2018-02-04 20:31:50,036 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 20:31:50,036 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [27] total 27 [2018-02-04 20:31:50,036 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 20:31:50,037 INFO L134 CoverageAnalysis]: Checked inductivity of 315 backedges. 45 proven. 0 refuted. 0 times theorem prover too weak. 270 trivial. 0 not checked. [2018-02-04 20:31:50,037 INFO L182 omatonBuilderFactory]: Interpolants [24961#(not (= 119 |zalloc_or_die_#in~size|)), 24962#(and (= calloc_model_~size |calloc_model_#in~size|) (or (and (not (= calloc_model_~nmemb 1)) (not (= |calloc_model_#in~nmemb| 1))) (and (= |calloc_model_#in~nmemb| 1) (= calloc_model_~nmemb 1)))), 24593#true, 24594#false, 24984#(or (not (= |calloc_model_#in~nmemb| 1)) (not (= |calloc_model_#in~size| 119))), 24985#(= 0 |#Ultimate.C_memset_#t~loopctr42|), 24986#(= 1 |#Ultimate.C_memset_#t~loopctr42|), 24987#(<= |#Ultimate.C_memset_#t~loopctr42| 2), 24988#(<= |#Ultimate.C_memset_#t~loopctr42| 3), 24989#(<= |#Ultimate.C_memset_#t~loopctr42| 4), 24990#(<= |#Ultimate.C_memset_#t~loopctr42| 5), 24799#(and (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)), 24991#(<= |#Ultimate.C_memset_#t~loopctr42| 6), 24992#(<= |#Ultimate.C_memset_#t~loopctr42| 7), 24993#(<= |#Ultimate.C_memset_#t~loopctr42| 8), 24994#(<= |#Ultimate.C_memset_#t~loopctr42| 9), 24995#(<= |#Ultimate.C_memset_#t~loopctr42| 10), 24932#(or (and (not (= zalloc_or_die_~size 119)) (not (= |zalloc_or_die_#in~size| 119))) (and (= zalloc_or_die_~size 119) (= |zalloc_or_die_#in~size| 119))), 24996#(<= |#Ultimate.C_memset_#t~loopctr42| 11), 24997#(<= |#Ultimate.C_memset_#t~loopctr42| 12), 24998#(<= |#Ultimate.C_memset_#t~loopctr42| 13), 24999#(<= |#Ultimate.C_memset_#t~loopctr42| 14), 25000#(<= |#Ultimate.C_memset_#t~loopctr42| 15), 25001#(<= |#Ultimate.C_memset_#t~loopctr42| 16), 25002#(not (= 119 |#Ultimate.C_memset_#amount|)), 24764#(and (= |~#list~0.base| |old(~#list~0.base)|) (= |#valid| |old(#valid)|) (= |~#list~0.offset| |old(~#list~0.offset)|) (= |#NULL.base| |old(#NULL.base)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |old(#length)| |#length|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)), 24765#(and (= |#valid| |old(#valid)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |old(#length)| |#length|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))] [2018-02-04 20:31:50,037 INFO L134 CoverageAnalysis]: Checked inductivity of 2146 backedges. 830 proven. 136 refuted. 0 times theorem prover too weak. 1180 trivial. 0 not checked. [2018-02-04 20:31:50,037 INFO L409 AbstractCegarLoop]: Interpolant automaton has 27 states [2018-02-04 20:31:50,037 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2018-02-04 20:31:50,037 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=189, Invalid=513, Unknown=0, NotChecked=0, Total=702 [2018-02-04 20:31:50,038 INFO L87 Difference]: Start difference. First operand 254 states and 277 transitions. Second operand 27 states. [2018-02-04 20:31:51,256 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 20:31:51,256 INFO L93 Difference]: Finished difference Result 307 states and 336 transitions. [2018-02-04 20:31:51,256 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 42 states. [2018-02-04 20:31:51,257 INFO L78 Accepts]: Start accepts. Automaton has 27 states. Word has length 198 [2018-02-04 20:31:51,257 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 20:31:51,258 INFO L225 Difference]: With dead ends: 307 [2018-02-04 20:31:51,258 INFO L226 Difference]: Without dead ends: 300 [2018-02-04 20:31:51,258 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 80 GetRequests, 35 SyntacticMatches, 0 SemanticMatches, 45 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 247 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=384, Invalid=1778, Unknown=0, NotChecked=0, Total=2162 [2018-02-04 20:31:51,259 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 300 states. [2018-02-04 20:31:51,261 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 300 to 255. [2018-02-04 20:31:51,261 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 255 states. [2018-02-04 20:31:51,262 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 255 states to 255 states and 279 transitions. [2018-02-04 20:31:51,262 INFO L78 Accepts]: Start accepts. Automaton has 255 states and 279 transitions. Word has length 198 [2018-02-04 20:31:51,262 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 20:31:51,262 INFO L432 AbstractCegarLoop]: Abstraction has 255 states and 279 transitions. [2018-02-04 20:31:51,262 INFO L433 AbstractCegarLoop]: Interpolant automaton has 27 states. [2018-02-04 20:31:51,262 INFO L276 IsEmpty]: Start isEmpty. Operand 255 states and 279 transitions. [2018-02-04 20:31:51,263 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 200 [2018-02-04 20:31:51,263 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 20:31:51,263 INFO L351 BasicCegarLoop]: trace histogram [57, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 20:31:51,263 INFO L371 AbstractCegarLoop]: === Iteration 31 === [l3_destroyErr0RequiresViolation, l3_destroyErr3RequiresViolation, l3_destroyErr1RequiresViolation, l3_destroyErr2RequiresViolation, l3_destroyErr4RequiresViolation, l3_destroyErr5RequiresViolation, l0_insertErr3RequiresViolation, l0_insertErr1RequiresViolation, l0_insertErr5RequiresViolation, l0_insertErr2RequiresViolation, l0_insertErr4RequiresViolation, l0_insertErr0RequiresViolation, l4_destroyErr4RequiresViolation, l4_destroyErr6RequiresViolation, l4_destroyErr2RequiresViolation, l4_destroyErr3RequiresViolation, l4_destroyErr1RequiresViolation, l4_destroyErr7RequiresViolation, l4_destroyErr0RequiresViolation, l4_destroyErr5RequiresViolation, l2_insertErr3RequiresViolation, l2_insertErr5RequiresViolation, l2_insertErr0RequiresViolation, l2_insertErr1RequiresViolation, l2_insertErr4RequiresViolation, l2_insertErr2RequiresViolation, mainErr1RequiresViolation, mainErr2EnsuresViolation, mainErr0RequiresViolation, l3_insertErr4RequiresViolation, l3_insertErr0RequiresViolation, l3_insertErr5RequiresViolation, l3_insertErr3RequiresViolation, l3_insertErr1RequiresViolation, l3_insertErr2RequiresViolation, l1_insertErr4RequiresViolation, l1_insertErr0RequiresViolation, l1_insertErr2RequiresViolation, l1_insertErr3RequiresViolation, l1_insertErr1RequiresViolation, l1_insertErr5RequiresViolation, l0_destroyErr5RequiresViolation, l0_destroyErr3RequiresViolation, l0_destroyErr1RequiresViolation, l0_destroyErr0RequiresViolation, l0_destroyErr4RequiresViolation, l0_destroyErr2RequiresViolation, calloc_modelErr0RequiresViolation, calloc_modelErr1RequiresViolation, l4_insertErr5RequiresViolation, l4_insertErr3RequiresViolation, l4_insertErr4RequiresViolation, l4_insertErr6RequiresViolation, l4_insertErr2RequiresViolation, l4_insertErr0RequiresViolation, l4_insertErr1RequiresViolation, l4_insertErr7RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr0RequiresViolation, l1_destroyErr2RequiresViolation, l1_destroyErr4RequiresViolation, l1_destroyErr0RequiresViolation, l1_destroyErr1RequiresViolation, l1_destroyErr5RequiresViolation, l1_destroyErr3RequiresViolation, l2_destroyErr1RequiresViolation, l2_destroyErr0RequiresViolation, l2_destroyErr2RequiresViolation, l2_destroyErr4RequiresViolation, l2_destroyErr5RequiresViolation, l2_destroyErr3RequiresViolation]=== [2018-02-04 20:31:51,264 INFO L82 PathProgramCache]: Analyzing trace with hash -1971463415, now seen corresponding path program 18 times No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 32 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 32 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-02-04 20:31:51,266 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 20:31:51,302 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:51,319 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:51,329 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:51,389 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:51,396 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:51,401 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:51,404 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:51,407 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:51,412 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:51,415 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:51,418 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:51,422 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:51,426 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:51,430 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:51,434 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:51,439 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:51,443 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:51,451 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:51,478 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:51,506 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:51,671 INFO L134 CoverageAnalysis]: Checked inductivity of 2208 backedges. 875 proven. 153 refuted. 0 times theorem prover too weak. 1180 trivial. 0 not checked. [2018-02-04 20:31:51,688 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 20:31:51,688 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [28] total 28 [2018-02-04 20:31:51,688 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 20:31:51,688 INFO L134 CoverageAnalysis]: Checked inductivity of 315 backedges. 45 proven. 0 refuted. 0 times theorem prover too weak. 270 trivial. 0 not checked. [2018-02-04 20:31:51,688 INFO L182 omatonBuilderFactory]: Interpolants [25605#true, 25606#false, 25999#(or (not (= |calloc_model_#in~nmemb| 1)) (not (= |calloc_model_#in~size| 119))), 26000#(= 0 |#Ultimate.C_memset_#t~loopctr42|), 26001#(= 1 |#Ultimate.C_memset_#t~loopctr42|), 26002#(= |#Ultimate.C_memset_#t~loopctr42| 2), 26003#(<= |#Ultimate.C_memset_#t~loopctr42| 3), 25812#(and (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)), 26004#(<= |#Ultimate.C_memset_#t~loopctr42| 4), 26005#(<= |#Ultimate.C_memset_#t~loopctr42| 5), 26006#(<= |#Ultimate.C_memset_#t~loopctr42| 6), 26007#(<= |#Ultimate.C_memset_#t~loopctr42| 7), 26008#(<= |#Ultimate.C_memset_#t~loopctr42| 8), 25945#(or (and (not (= zalloc_or_die_~size 119)) (not (= |zalloc_or_die_#in~size| 119))) (and (= zalloc_or_die_~size 119) (= |zalloc_or_die_#in~size| 119))), 26009#(<= |#Ultimate.C_memset_#t~loopctr42| 9), 26010#(<= |#Ultimate.C_memset_#t~loopctr42| 10), 26011#(<= |#Ultimate.C_memset_#t~loopctr42| 11), 26012#(<= |#Ultimate.C_memset_#t~loopctr42| 12), 26013#(<= |#Ultimate.C_memset_#t~loopctr42| 13), 26014#(<= |#Ultimate.C_memset_#t~loopctr42| 14), 26015#(<= |#Ultimate.C_memset_#t~loopctr42| 15), 26016#(<= |#Ultimate.C_memset_#t~loopctr42| 16), 26017#(<= |#Ultimate.C_memset_#t~loopctr42| 17), 26018#(not (= 119 |#Ultimate.C_memset_#amount|)), 25777#(and (= |~#list~0.base| |old(~#list~0.base)|) (= |#valid| |old(#valid)|) (= |~#list~0.offset| |old(~#list~0.offset)|) (= |#NULL.base| |old(#NULL.base)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |old(#length)| |#length|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)), 25778#(and (= |#valid| |old(#valid)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |old(#length)| |#length|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)), 25975#(not (= 119 |zalloc_or_die_#in~size|)), 25976#(and (= calloc_model_~size |calloc_model_#in~size|) (or (and (not (= calloc_model_~nmemb 1)) (not (= |calloc_model_#in~nmemb| 1))) (and (= |calloc_model_#in~nmemb| 1) (= calloc_model_~nmemb 1))))] [2018-02-04 20:31:51,689 INFO L134 CoverageAnalysis]: Checked inductivity of 2208 backedges. 875 proven. 153 refuted. 0 times theorem prover too weak. 1180 trivial. 0 not checked. [2018-02-04 20:31:51,689 INFO L409 AbstractCegarLoop]: Interpolant automaton has 28 states [2018-02-04 20:31:51,689 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2018-02-04 20:31:51,689 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=206, Invalid=550, Unknown=0, NotChecked=0, Total=756 [2018-02-04 20:31:51,689 INFO L87 Difference]: Start difference. First operand 255 states and 279 transitions. Second operand 28 states. [2018-02-04 20:31:53,144 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 20:31:53,144 INFO L93 Difference]: Finished difference Result 310 states and 340 transitions. [2018-02-04 20:31:53,144 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 44 states. [2018-02-04 20:31:53,144 INFO L78 Accepts]: Start accepts. Automaton has 28 states. Word has length 199 [2018-02-04 20:31:53,144 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 20:31:53,145 INFO L225 Difference]: With dead ends: 310 [2018-02-04 20:31:53,145 INFO L226 Difference]: Without dead ends: 303 [2018-02-04 20:31:53,146 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 82 GetRequests, 35 SyntacticMatches, 0 SemanticMatches, 47 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 269 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=423, Invalid=1929, Unknown=0, NotChecked=0, Total=2352 [2018-02-04 20:31:53,146 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 303 states. [2018-02-04 20:31:53,148 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 303 to 256. [2018-02-04 20:31:53,148 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 256 states. [2018-02-04 20:31:53,149 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 256 states to 256 states and 281 transitions. [2018-02-04 20:31:53,149 INFO L78 Accepts]: Start accepts. Automaton has 256 states and 281 transitions. Word has length 199 [2018-02-04 20:31:53,149 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 20:31:53,149 INFO L432 AbstractCegarLoop]: Abstraction has 256 states and 281 transitions. [2018-02-04 20:31:53,149 INFO L433 AbstractCegarLoop]: Interpolant automaton has 28 states. [2018-02-04 20:31:53,149 INFO L276 IsEmpty]: Start isEmpty. Operand 256 states and 281 transitions. [2018-02-04 20:31:53,150 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 201 [2018-02-04 20:31:53,150 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 20:31:53,150 INFO L351 BasicCegarLoop]: trace histogram [58, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 20:31:53,150 INFO L371 AbstractCegarLoop]: === Iteration 32 === [l3_destroyErr0RequiresViolation, l3_destroyErr3RequiresViolation, l3_destroyErr1RequiresViolation, l3_destroyErr2RequiresViolation, l3_destroyErr4RequiresViolation, l3_destroyErr5RequiresViolation, l0_insertErr3RequiresViolation, l0_insertErr1RequiresViolation, l0_insertErr5RequiresViolation, l0_insertErr2RequiresViolation, l0_insertErr4RequiresViolation, l0_insertErr0RequiresViolation, l4_destroyErr4RequiresViolation, l4_destroyErr6RequiresViolation, l4_destroyErr2RequiresViolation, l4_destroyErr3RequiresViolation, l4_destroyErr1RequiresViolation, l4_destroyErr7RequiresViolation, l4_destroyErr0RequiresViolation, l4_destroyErr5RequiresViolation, l2_insertErr3RequiresViolation, l2_insertErr5RequiresViolation, l2_insertErr0RequiresViolation, l2_insertErr1RequiresViolation, l2_insertErr4RequiresViolation, l2_insertErr2RequiresViolation, mainErr1RequiresViolation, mainErr2EnsuresViolation, mainErr0RequiresViolation, l3_insertErr4RequiresViolation, l3_insertErr0RequiresViolation, l3_insertErr5RequiresViolation, l3_insertErr3RequiresViolation, l3_insertErr1RequiresViolation, l3_insertErr2RequiresViolation, l1_insertErr4RequiresViolation, l1_insertErr0RequiresViolation, l1_insertErr2RequiresViolation, l1_insertErr3RequiresViolation, l1_insertErr1RequiresViolation, l1_insertErr5RequiresViolation, l0_destroyErr5RequiresViolation, l0_destroyErr3RequiresViolation, l0_destroyErr1RequiresViolation, l0_destroyErr0RequiresViolation, l0_destroyErr4RequiresViolation, l0_destroyErr2RequiresViolation, calloc_modelErr0RequiresViolation, calloc_modelErr1RequiresViolation, l4_insertErr5RequiresViolation, l4_insertErr3RequiresViolation, l4_insertErr4RequiresViolation, l4_insertErr6RequiresViolation, l4_insertErr2RequiresViolation, l4_insertErr0RequiresViolation, l4_insertErr1RequiresViolation, l4_insertErr7RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr0RequiresViolation, l1_destroyErr2RequiresViolation, l1_destroyErr4RequiresViolation, l1_destroyErr0RequiresViolation, l1_destroyErr1RequiresViolation, l1_destroyErr5RequiresViolation, l1_destroyErr3RequiresViolation, l2_destroyErr1RequiresViolation, l2_destroyErr0RequiresViolation, l2_destroyErr2RequiresViolation, l2_destroyErr4RequiresViolation, l2_destroyErr5RequiresViolation, l2_destroyErr3RequiresViolation]=== [2018-02-04 20:31:53,151 INFO L82 PathProgramCache]: Analyzing trace with hash 1915088228, now seen corresponding path program 19 times No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 33 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 33 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-02-04 20:31:53,154 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 20:31:53,191 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:53,209 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:53,216 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:53,220 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:53,226 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:53,231 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:53,234 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:53,237 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:53,242 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:53,246 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:53,248 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:53,253 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:53,257 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:53,260 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:53,264 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:53,268 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:53,271 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:53,280 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:53,306 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:53,333 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:53,504 INFO L134 CoverageAnalysis]: Checked inductivity of 2271 backedges. 920 proven. 171 refuted. 0 times theorem prover too weak. 1180 trivial. 0 not checked. [2018-02-04 20:31:53,521 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 20:31:53,521 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [29] total 29 [2018-02-04 20:31:53,521 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 20:31:53,521 INFO L134 CoverageAnalysis]: Checked inductivity of 315 backedges. 45 proven. 0 refuted. 0 times theorem prover too weak. 270 trivial. 0 not checked. [2018-02-04 20:31:53,521 INFO L182 omatonBuilderFactory]: Interpolants [26627#true, 26628#false, 27024#(or (not (= |calloc_model_#in~nmemb| 1)) (not (= |calloc_model_#in~size| 119))), 27025#(= 0 |#Ultimate.C_memset_#t~loopctr42|), 27026#(= 1 |#Ultimate.C_memset_#t~loopctr42|), 26835#(and (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)), 27027#(<= |#Ultimate.C_memset_#t~loopctr42| 2), 27028#(<= |#Ultimate.C_memset_#t~loopctr42| 3), 27029#(<= |#Ultimate.C_memset_#t~loopctr42| 4), 27030#(<= |#Ultimate.C_memset_#t~loopctr42| 5), 27031#(<= |#Ultimate.C_memset_#t~loopctr42| 6), 26968#(or (and (not (= zalloc_or_die_~size 119)) (not (= |zalloc_or_die_#in~size| 119))) (and (= zalloc_or_die_~size 119) (= |zalloc_or_die_#in~size| 119))), 27032#(<= |#Ultimate.C_memset_#t~loopctr42| 7), 27033#(<= |#Ultimate.C_memset_#t~loopctr42| 8), 27034#(<= |#Ultimate.C_memset_#t~loopctr42| 9), 27035#(<= |#Ultimate.C_memset_#t~loopctr42| 10), 27036#(<= |#Ultimate.C_memset_#t~loopctr42| 11), 27037#(<= |#Ultimate.C_memset_#t~loopctr42| 12), 27038#(<= |#Ultimate.C_memset_#t~loopctr42| 13), 27039#(<= |#Ultimate.C_memset_#t~loopctr42| 14), 27040#(<= |#Ultimate.C_memset_#t~loopctr42| 15), 27041#(<= |#Ultimate.C_memset_#t~loopctr42| 16), 27042#(<= |#Ultimate.C_memset_#t~loopctr42| 17), 27043#(<= |#Ultimate.C_memset_#t~loopctr42| 18), 27044#(not (= 119 |#Ultimate.C_memset_#amount|)), 26800#(and (= |~#list~0.base| |old(~#list~0.base)|) (= |#valid| |old(#valid)|) (= |~#list~0.offset| |old(~#list~0.offset)|) (= |#NULL.base| |old(#NULL.base)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |old(#length)| |#length|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)), 26801#(and (= |#valid| |old(#valid)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |old(#length)| |#length|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)), 26999#(not (= 119 |zalloc_or_die_#in~size|)), 27000#(and (= calloc_model_~size |calloc_model_#in~size|) (or (and (not (= calloc_model_~nmemb 1)) (not (= |calloc_model_#in~nmemb| 1))) (and (= |calloc_model_#in~nmemb| 1) (= calloc_model_~nmemb 1))))] [2018-02-04 20:31:53,521 INFO L134 CoverageAnalysis]: Checked inductivity of 2271 backedges. 920 proven. 171 refuted. 0 times theorem prover too weak. 1180 trivial. 0 not checked. [2018-02-04 20:31:53,522 INFO L409 AbstractCegarLoop]: Interpolant automaton has 29 states [2018-02-04 20:31:53,522 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2018-02-04 20:31:53,522 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=228, Invalid=584, Unknown=0, NotChecked=0, Total=812 [2018-02-04 20:31:53,522 INFO L87 Difference]: Start difference. First operand 256 states and 281 transitions. Second operand 29 states. [2018-02-04 20:31:57,241 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 20:31:57,241 INFO L93 Difference]: Finished difference Result 313 states and 344 transitions. [2018-02-04 20:31:57,242 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 46 states. [2018-02-04 20:31:57,242 INFO L78 Accepts]: Start accepts. Automaton has 29 states. Word has length 200 [2018-02-04 20:31:57,242 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 20:31:57,243 INFO L225 Difference]: With dead ends: 313 [2018-02-04 20:31:57,243 INFO L226 Difference]: Without dead ends: 306 [2018-02-04 20:31:57,243 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 84 GetRequests, 35 SyntacticMatches, 0 SemanticMatches, 49 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 294 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=471, Invalid=2079, Unknown=0, NotChecked=0, Total=2550 [2018-02-04 20:31:57,243 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 306 states. [2018-02-04 20:31:57,245 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 306 to 257. [2018-02-04 20:31:57,245 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 257 states. [2018-02-04 20:31:57,246 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 257 states to 257 states and 283 transitions. [2018-02-04 20:31:57,246 INFO L78 Accepts]: Start accepts. Automaton has 257 states and 283 transitions. Word has length 200 [2018-02-04 20:31:57,246 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 20:31:57,246 INFO L432 AbstractCegarLoop]: Abstraction has 257 states and 283 transitions. [2018-02-04 20:31:57,246 INFO L433 AbstractCegarLoop]: Interpolant automaton has 29 states. [2018-02-04 20:31:57,247 INFO L276 IsEmpty]: Start isEmpty. Operand 257 states and 283 transitions. [2018-02-04 20:31:57,247 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 202 [2018-02-04 20:31:57,247 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 20:31:57,248 INFO L351 BasicCegarLoop]: trace histogram [59, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 20:31:57,248 INFO L371 AbstractCegarLoop]: === Iteration 33 === [l3_destroyErr0RequiresViolation, l3_destroyErr3RequiresViolation, l3_destroyErr1RequiresViolation, l3_destroyErr2RequiresViolation, l3_destroyErr4RequiresViolation, l3_destroyErr5RequiresViolation, l0_insertErr3RequiresViolation, l0_insertErr1RequiresViolation, l0_insertErr5RequiresViolation, l0_insertErr2RequiresViolation, l0_insertErr4RequiresViolation, l0_insertErr0RequiresViolation, l4_destroyErr4RequiresViolation, l4_destroyErr6RequiresViolation, l4_destroyErr2RequiresViolation, l4_destroyErr3RequiresViolation, l4_destroyErr1RequiresViolation, l4_destroyErr7RequiresViolation, l4_destroyErr0RequiresViolation, l4_destroyErr5RequiresViolation, l2_insertErr3RequiresViolation, l2_insertErr5RequiresViolation, l2_insertErr0RequiresViolation, l2_insertErr1RequiresViolation, l2_insertErr4RequiresViolation, l2_insertErr2RequiresViolation, mainErr1RequiresViolation, mainErr2EnsuresViolation, mainErr0RequiresViolation, l3_insertErr4RequiresViolation, l3_insertErr0RequiresViolation, l3_insertErr5RequiresViolation, l3_insertErr3RequiresViolation, l3_insertErr1RequiresViolation, l3_insertErr2RequiresViolation, l1_insertErr4RequiresViolation, l1_insertErr0RequiresViolation, l1_insertErr2RequiresViolation, l1_insertErr3RequiresViolation, l1_insertErr1RequiresViolation, l1_insertErr5RequiresViolation, l0_destroyErr5RequiresViolation, l0_destroyErr3RequiresViolation, l0_destroyErr1RequiresViolation, l0_destroyErr0RequiresViolation, l0_destroyErr4RequiresViolation, l0_destroyErr2RequiresViolation, calloc_modelErr0RequiresViolation, calloc_modelErr1RequiresViolation, l4_insertErr5RequiresViolation, l4_insertErr3RequiresViolation, l4_insertErr4RequiresViolation, l4_insertErr6RequiresViolation, l4_insertErr2RequiresViolation, l4_insertErr0RequiresViolation, l4_insertErr1RequiresViolation, l4_insertErr7RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr0RequiresViolation, l1_destroyErr2RequiresViolation, l1_destroyErr4RequiresViolation, l1_destroyErr0RequiresViolation, l1_destroyErr1RequiresViolation, l1_destroyErr5RequiresViolation, l1_destroyErr3RequiresViolation, l2_destroyErr1RequiresViolation, l2_destroyErr0RequiresViolation, l2_destroyErr2RequiresViolation, l2_destroyErr4RequiresViolation, l2_destroyErr5RequiresViolation, l2_destroyErr3RequiresViolation]=== [2018-02-04 20:31:57,248 INFO L82 PathProgramCache]: Analyzing trace with hash 2139104873, now seen corresponding path program 20 times No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 34 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 34 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-02-04 20:31:57,251 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 20:31:57,290 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:57,308 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:57,316 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:57,319 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:57,328 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:57,335 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:57,339 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:57,342 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:57,347 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:57,351 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:57,354 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:57,359 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:57,363 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:57,366 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:57,370 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:57,374 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:57,378 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:57,387 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:57,416 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:57,447 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:31:57,680 INFO L134 CoverageAnalysis]: Checked inductivity of 2335 backedges. 965 proven. 190 refuted. 0 times theorem prover too weak. 1180 trivial. 0 not checked. [2018-02-04 20:31:57,696 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 20:31:57,696 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [30] total 30 [2018-02-04 20:31:57,697 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 20:31:57,697 INFO L134 CoverageAnalysis]: Checked inductivity of 315 backedges. 45 proven. 0 refuted. 0 times theorem prover too weak. 270 trivial. 0 not checked. [2018-02-04 20:31:57,697 INFO L182 omatonBuilderFactory]: Interpolants [28033#(not (= 119 |zalloc_or_die_#in~size|)), 28034#(and (= calloc_model_~size |calloc_model_#in~size|) (or (and (not (= calloc_model_~nmemb 1)) (not (= |calloc_model_#in~nmemb| 1))) (and (= |calloc_model_#in~nmemb| 1) (= calloc_model_~nmemb 1)))), 27659#true, 27660#false, 28059#(or (not (= |calloc_model_#in~nmemb| 1)) (not (= |calloc_model_#in~size| 119))), 27868#(and (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)), 28060#(= 0 |#Ultimate.C_memset_#t~loopctr42|), 28061#(<= |#Ultimate.C_memset_#t~loopctr42| 1), 28062#(<= |#Ultimate.C_memset_#t~loopctr42| 2), 28063#(<= |#Ultimate.C_memset_#t~loopctr42| 3), 28064#(<= |#Ultimate.C_memset_#t~loopctr42| 4), 28001#(or (and (not (= zalloc_or_die_~size 119)) (not (= |zalloc_or_die_#in~size| 119))) (and (= zalloc_or_die_~size 119) (= |zalloc_or_die_#in~size| 119))), 28065#(<= |#Ultimate.C_memset_#t~loopctr42| 5), 28066#(<= |#Ultimate.C_memset_#t~loopctr42| 6), 28067#(<= |#Ultimate.C_memset_#t~loopctr42| 7), 28068#(<= |#Ultimate.C_memset_#t~loopctr42| 8), 28069#(<= |#Ultimate.C_memset_#t~loopctr42| 9), 28070#(<= |#Ultimate.C_memset_#t~loopctr42| 10), 28071#(<= |#Ultimate.C_memset_#t~loopctr42| 11), 28072#(<= |#Ultimate.C_memset_#t~loopctr42| 12), 28073#(<= |#Ultimate.C_memset_#t~loopctr42| 13), 28074#(<= |#Ultimate.C_memset_#t~loopctr42| 14), 28075#(<= |#Ultimate.C_memset_#t~loopctr42| 15), 28076#(<= |#Ultimate.C_memset_#t~loopctr42| 16), 28077#(<= |#Ultimate.C_memset_#t~loopctr42| 17), 28078#(<= |#Ultimate.C_memset_#t~loopctr42| 18), 28079#(<= |#Ultimate.C_memset_#t~loopctr42| 19), 28080#(not (= 119 |#Ultimate.C_memset_#amount|)), 27833#(and (= |~#list~0.base| |old(~#list~0.base)|) (= |#valid| |old(#valid)|) (= |~#list~0.offset| |old(~#list~0.offset)|) (= |#NULL.base| |old(#NULL.base)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |old(#length)| |#length|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)), 27834#(and (= |#valid| |old(#valid)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |old(#length)| |#length|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))] [2018-02-04 20:31:57,697 INFO L134 CoverageAnalysis]: Checked inductivity of 2335 backedges. 965 proven. 190 refuted. 0 times theorem prover too weak. 1180 trivial. 0 not checked. [2018-02-04 20:31:57,697 INFO L409 AbstractCegarLoop]: Interpolant automaton has 30 states [2018-02-04 20:31:57,698 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2018-02-04 20:31:57,698 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=250, Invalid=620, Unknown=0, NotChecked=0, Total=870 [2018-02-04 20:31:57,698 INFO L87 Difference]: Start difference. First operand 257 states and 283 transitions. Second operand 30 states. [2018-02-04 20:32:00,949 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 20:32:00,949 INFO L93 Difference]: Finished difference Result 316 states and 348 transitions. [2018-02-04 20:32:00,949 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 48 states. [2018-02-04 20:32:00,949 INFO L78 Accepts]: Start accepts. Automaton has 30 states. Word has length 201 [2018-02-04 20:32:00,949 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 20:32:00,950 INFO L225 Difference]: With dead ends: 316 [2018-02-04 20:32:00,950 INFO L226 Difference]: Without dead ends: 309 [2018-02-04 20:32:00,951 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 86 GetRequests, 35 SyntacticMatches, 0 SemanticMatches, 51 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 320 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=521, Invalid=2235, Unknown=0, NotChecked=0, Total=2756 [2018-02-04 20:32:00,951 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 309 states. [2018-02-04 20:32:00,952 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 309 to 258. [2018-02-04 20:32:00,953 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 258 states. [2018-02-04 20:32:00,953 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 258 states to 258 states and 285 transitions. [2018-02-04 20:32:00,953 INFO L78 Accepts]: Start accepts. Automaton has 258 states and 285 transitions. Word has length 201 [2018-02-04 20:32:00,953 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 20:32:00,953 INFO L432 AbstractCegarLoop]: Abstraction has 258 states and 285 transitions. [2018-02-04 20:32:00,953 INFO L433 AbstractCegarLoop]: Interpolant automaton has 30 states. [2018-02-04 20:32:00,953 INFO L276 IsEmpty]: Start isEmpty. Operand 258 states and 285 transitions. [2018-02-04 20:32:00,954 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 203 [2018-02-04 20:32:00,954 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 20:32:00,954 INFO L351 BasicCegarLoop]: trace histogram [60, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 20:32:00,955 INFO L371 AbstractCegarLoop]: === Iteration 34 === [l3_destroyErr0RequiresViolation, l3_destroyErr3RequiresViolation, l3_destroyErr1RequiresViolation, l3_destroyErr2RequiresViolation, l3_destroyErr4RequiresViolation, l3_destroyErr5RequiresViolation, l0_insertErr3RequiresViolation, l0_insertErr1RequiresViolation, l0_insertErr5RequiresViolation, l0_insertErr2RequiresViolation, l0_insertErr4RequiresViolation, l0_insertErr0RequiresViolation, l4_destroyErr4RequiresViolation, l4_destroyErr6RequiresViolation, l4_destroyErr2RequiresViolation, l4_destroyErr3RequiresViolation, l4_destroyErr1RequiresViolation, l4_destroyErr7RequiresViolation, l4_destroyErr0RequiresViolation, l4_destroyErr5RequiresViolation, l2_insertErr3RequiresViolation, l2_insertErr5RequiresViolation, l2_insertErr0RequiresViolation, l2_insertErr1RequiresViolation, l2_insertErr4RequiresViolation, l2_insertErr2RequiresViolation, mainErr1RequiresViolation, mainErr2EnsuresViolation, mainErr0RequiresViolation, l3_insertErr4RequiresViolation, l3_insertErr0RequiresViolation, l3_insertErr5RequiresViolation, l3_insertErr3RequiresViolation, l3_insertErr1RequiresViolation, l3_insertErr2RequiresViolation, l1_insertErr4RequiresViolation, l1_insertErr0RequiresViolation, l1_insertErr2RequiresViolation, l1_insertErr3RequiresViolation, l1_insertErr1RequiresViolation, l1_insertErr5RequiresViolation, l0_destroyErr5RequiresViolation, l0_destroyErr3RequiresViolation, l0_destroyErr1RequiresViolation, l0_destroyErr0RequiresViolation, l0_destroyErr4RequiresViolation, l0_destroyErr2RequiresViolation, calloc_modelErr0RequiresViolation, calloc_modelErr1RequiresViolation, l4_insertErr5RequiresViolation, l4_insertErr3RequiresViolation, l4_insertErr4RequiresViolation, l4_insertErr6RequiresViolation, l4_insertErr2RequiresViolation, l4_insertErr0RequiresViolation, l4_insertErr1RequiresViolation, l4_insertErr7RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr0RequiresViolation, l1_destroyErr2RequiresViolation, l1_destroyErr4RequiresViolation, l1_destroyErr0RequiresViolation, l1_destroyErr1RequiresViolation, l1_destroyErr5RequiresViolation, l1_destroyErr3RequiresViolation, l2_destroyErr1RequiresViolation, l2_destroyErr0RequiresViolation, l2_destroyErr2RequiresViolation, l2_destroyErr4RequiresViolation, l2_destroyErr5RequiresViolation, l2_destroyErr3RequiresViolation]=== [2018-02-04 20:32:00,955 INFO L82 PathProgramCache]: Analyzing trace with hash 493686276, now seen corresponding path program 21 times No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 35 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 35 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-02-04 20:32:00,957 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 20:32:00,994 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:32:01,013 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:32:01,021 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:32:01,025 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:32:01,031 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:32:01,036 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:32:01,040 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:32:01,043 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:32:01,048 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:32:01,052 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:32:01,057 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:32:01,063 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:32:01,067 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:32:01,070 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:32:01,075 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:32:01,080 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:32:01,084 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:32:01,095 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:32:01,125 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:32:01,194 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:32:01,422 INFO L134 CoverageAnalysis]: Checked inductivity of 2400 backedges. 1010 proven. 210 refuted. 0 times theorem prover too weak. 1180 trivial. 0 not checked. [2018-02-04 20:32:01,438 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 20:32:01,438 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [31] total 31 [2018-02-04 20:32:01,438 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 20:32:01,438 INFO L134 CoverageAnalysis]: Checked inductivity of 315 backedges. 45 proven. 0 refuted. 0 times theorem prover too weak. 270 trivial. 0 not checked. [2018-02-04 20:32:01,438 INFO L182 omatonBuilderFactory]: Interpolants [29120#(<= |#Ultimate.C_memset_#t~loopctr42| 15), 29121#(<= |#Ultimate.C_memset_#t~loopctr42| 16), 29122#(<= |#Ultimate.C_memset_#t~loopctr42| 17), 29123#(<= |#Ultimate.C_memset_#t~loopctr42| 18), 29124#(<= |#Ultimate.C_memset_#t~loopctr42| 19), 29125#(<= |#Ultimate.C_memset_#t~loopctr42| 20), 29126#(<= |#Ultimate.C_memset_#amount| 20), 28876#(and (= |~#list~0.base| |old(~#list~0.base)|) (= |#valid| |old(#valid)|) (= |~#list~0.offset| |old(~#list~0.offset)|) (= |#NULL.base| |old(#NULL.base)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |old(#length)| |#length|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)), 28877#(and (= |#valid| |old(#valid)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |old(#length)| |#length|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)), 29077#(not (= 119 |zalloc_or_die_#in~size|)), 29078#(and (= calloc_model_~size |calloc_model_#in~size|) (= (mod (* (mod |calloc_model_#in~nmemb| 4294967296) (mod calloc_model_~size 4294967296)) 4294967296) (mod (* (mod calloc_model_~nmemb 4294967296) (mod calloc_model_~size 4294967296)) 4294967296))), 28701#true, 28702#false, 28911#(and (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)), 29104#(or (not (= (mod |calloc_model_#in~nmemb| 4294967296) 1)) (not (= |calloc_model_#in~size| 119))), 29105#(= 0 |#Ultimate.C_memset_#t~loopctr42|), 29106#(= 1 |#Ultimate.C_memset_#t~loopctr42|), 29107#(<= |#Ultimate.C_memset_#t~loopctr42| 2), 29044#(or (and (not (= zalloc_or_die_~size 119)) (not (= |zalloc_or_die_#in~size| 119))) (and (= zalloc_or_die_~size 119) (= |zalloc_or_die_#in~size| 119))), 29108#(<= |#Ultimate.C_memset_#t~loopctr42| 3), 29109#(<= |#Ultimate.C_memset_#t~loopctr42| 4), 29110#(<= |#Ultimate.C_memset_#t~loopctr42| 5), 29111#(<= |#Ultimate.C_memset_#t~loopctr42| 6), 29112#(<= |#Ultimate.C_memset_#t~loopctr42| 7), 29113#(<= |#Ultimate.C_memset_#t~loopctr42| 8), 29114#(<= |#Ultimate.C_memset_#t~loopctr42| 9), 29115#(<= |#Ultimate.C_memset_#t~loopctr42| 10), 29116#(<= |#Ultimate.C_memset_#t~loopctr42| 11), 29117#(<= |#Ultimate.C_memset_#t~loopctr42| 12), 29118#(<= |#Ultimate.C_memset_#t~loopctr42| 13), 29119#(<= |#Ultimate.C_memset_#t~loopctr42| 14)] [2018-02-04 20:32:01,439 INFO L134 CoverageAnalysis]: Checked inductivity of 2400 backedges. 1010 proven. 210 refuted. 0 times theorem prover too weak. 1180 trivial. 0 not checked. [2018-02-04 20:32:01,439 INFO L409 AbstractCegarLoop]: Interpolant automaton has 31 states [2018-02-04 20:32:01,439 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 31 interpolants. [2018-02-04 20:32:01,439 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=271, Invalid=659, Unknown=0, NotChecked=0, Total=930 [2018-02-04 20:32:01,439 INFO L87 Difference]: Start difference. First operand 258 states and 285 transitions. Second operand 31 states. [2018-02-04 20:32:04,684 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 20:32:04,684 INFO L93 Difference]: Finished difference Result 319 states and 352 transitions. [2018-02-04 20:32:04,684 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 50 states. [2018-02-04 20:32:04,684 INFO L78 Accepts]: Start accepts. Automaton has 31 states. Word has length 202 [2018-02-04 20:32:04,684 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 20:32:04,685 INFO L225 Difference]: With dead ends: 319 [2018-02-04 20:32:04,685 INFO L226 Difference]: Without dead ends: 312 [2018-02-04 20:32:04,685 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 90 GetRequests, 37 SyntacticMatches, 0 SemanticMatches, 53 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 345 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=570, Invalid=2400, Unknown=0, NotChecked=0, Total=2970 [2018-02-04 20:32:04,686 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 312 states. [2018-02-04 20:32:04,687 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 312 to 259. [2018-02-04 20:32:04,687 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 259 states. [2018-02-04 20:32:04,688 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 259 states to 259 states and 287 transitions. [2018-02-04 20:32:04,688 INFO L78 Accepts]: Start accepts. Automaton has 259 states and 287 transitions. Word has length 202 [2018-02-04 20:32:04,688 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 20:32:04,688 INFO L432 AbstractCegarLoop]: Abstraction has 259 states and 287 transitions. [2018-02-04 20:32:04,689 INFO L433 AbstractCegarLoop]: Interpolant automaton has 31 states. [2018-02-04 20:32:04,689 INFO L276 IsEmpty]: Start isEmpty. Operand 259 states and 287 transitions. [2018-02-04 20:32:04,689 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 204 [2018-02-04 20:32:04,689 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 20:32:04,690 INFO L351 BasicCegarLoop]: trace histogram [61, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 20:32:04,690 INFO L371 AbstractCegarLoop]: === Iteration 35 === [l3_destroyErr0RequiresViolation, l3_destroyErr3RequiresViolation, l3_destroyErr1RequiresViolation, l3_destroyErr2RequiresViolation, l3_destroyErr4RequiresViolation, l3_destroyErr5RequiresViolation, l0_insertErr3RequiresViolation, l0_insertErr1RequiresViolation, l0_insertErr5RequiresViolation, l0_insertErr2RequiresViolation, l0_insertErr4RequiresViolation, l0_insertErr0RequiresViolation, l4_destroyErr4RequiresViolation, l4_destroyErr6RequiresViolation, l4_destroyErr2RequiresViolation, l4_destroyErr3RequiresViolation, l4_destroyErr1RequiresViolation, l4_destroyErr7RequiresViolation, l4_destroyErr0RequiresViolation, l4_destroyErr5RequiresViolation, l2_insertErr3RequiresViolation, l2_insertErr5RequiresViolation, l2_insertErr0RequiresViolation, l2_insertErr1RequiresViolation, l2_insertErr4RequiresViolation, l2_insertErr2RequiresViolation, mainErr1RequiresViolation, mainErr2EnsuresViolation, mainErr0RequiresViolation, l3_insertErr4RequiresViolation, l3_insertErr0RequiresViolation, l3_insertErr5RequiresViolation, l3_insertErr3RequiresViolation, l3_insertErr1RequiresViolation, l3_insertErr2RequiresViolation, l1_insertErr4RequiresViolation, l1_insertErr0RequiresViolation, l1_insertErr2RequiresViolation, l1_insertErr3RequiresViolation, l1_insertErr1RequiresViolation, l1_insertErr5RequiresViolation, l0_destroyErr5RequiresViolation, l0_destroyErr3RequiresViolation, l0_destroyErr1RequiresViolation, l0_destroyErr0RequiresViolation, l0_destroyErr4RequiresViolation, l0_destroyErr2RequiresViolation, calloc_modelErr0RequiresViolation, calloc_modelErr1RequiresViolation, l4_insertErr5RequiresViolation, l4_insertErr3RequiresViolation, l4_insertErr4RequiresViolation, l4_insertErr6RequiresViolation, l4_insertErr2RequiresViolation, l4_insertErr0RequiresViolation, l4_insertErr1RequiresViolation, l4_insertErr7RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr0RequiresViolation, l1_destroyErr2RequiresViolation, l1_destroyErr4RequiresViolation, l1_destroyErr0RequiresViolation, l1_destroyErr1RequiresViolation, l1_destroyErr5RequiresViolation, l1_destroyErr3RequiresViolation, l2_destroyErr1RequiresViolation, l2_destroyErr0RequiresViolation, l2_destroyErr2RequiresViolation, l2_destroyErr4RequiresViolation, l2_destroyErr5RequiresViolation, l2_destroyErr3RequiresViolation]=== [2018-02-04 20:32:04,690 INFO L82 PathProgramCache]: Analyzing trace with hash 1025317321, now seen corresponding path program 22 times No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 36 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 36 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-02-04 20:32:04,693 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 20:32:04,731 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:32:04,752 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:32:04,760 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:32:04,763 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:32:04,769 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:32:04,774 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:32:04,777 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:32:04,780 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:32:04,785 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:32:04,788 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:32:04,792 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:32:04,798 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:32:04,802 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:32:04,806 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:32:04,812 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:32:04,817 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:32:04,821 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:32:04,830 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:32:04,861 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:32:04,930 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:32:05,181 INFO L134 CoverageAnalysis]: Checked inductivity of 2466 backedges. 1055 proven. 231 refuted. 0 times theorem prover too weak. 1180 trivial. 0 not checked. [2018-02-04 20:32:05,197 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 20:32:05,197 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [32] total 32 [2018-02-04 20:32:05,197 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 20:32:05,197 INFO L134 CoverageAnalysis]: Checked inductivity of 315 backedges. 45 proven. 0 refuted. 0 times theorem prover too weak. 270 trivial. 0 not checked. [2018-02-04 20:32:05,197 INFO L182 omatonBuilderFactory]: Interpolants [29964#(and (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)), 30159#(or (not (= (mod |calloc_model_#in~nmemb| 4294967296) 1)) (not (= |calloc_model_#in~size| 119))), 30160#(= 0 |#Ultimate.C_memset_#t~loopctr42|), 30097#(or (and (not (= zalloc_or_die_~size 119)) (not (= |zalloc_or_die_#in~size| 119))) (and (= zalloc_or_die_~size 119) (= |zalloc_or_die_#in~size| 119))), 30161#(<= |#Ultimate.C_memset_#t~loopctr42| 1), 30162#(<= |#Ultimate.C_memset_#t~loopctr42| 2), 30163#(<= |#Ultimate.C_memset_#t~loopctr42| 3), 30164#(<= |#Ultimate.C_memset_#t~loopctr42| 4), 30165#(<= |#Ultimate.C_memset_#t~loopctr42| 5), 30166#(<= |#Ultimate.C_memset_#t~loopctr42| 6), 30167#(<= |#Ultimate.C_memset_#t~loopctr42| 7), 30168#(<= |#Ultimate.C_memset_#t~loopctr42| 8), 30169#(<= |#Ultimate.C_memset_#t~loopctr42| 9), 30170#(<= |#Ultimate.C_memset_#t~loopctr42| 10), 30171#(<= |#Ultimate.C_memset_#t~loopctr42| 11), 30172#(<= |#Ultimate.C_memset_#t~loopctr42| 12), 30173#(<= |#Ultimate.C_memset_#t~loopctr42| 13), 30174#(<= |#Ultimate.C_memset_#t~loopctr42| 14), 30175#(<= |#Ultimate.C_memset_#t~loopctr42| 15), 30176#(<= |#Ultimate.C_memset_#t~loopctr42| 16), 30177#(<= |#Ultimate.C_memset_#t~loopctr42| 17), 30178#(<= |#Ultimate.C_memset_#t~loopctr42| 18), 30179#(<= |#Ultimate.C_memset_#t~loopctr42| 19), 30180#(<= |#Ultimate.C_memset_#t~loopctr42| 20), 30181#(<= |#Ultimate.C_memset_#t~loopctr42| 21), 30182#(<= |#Ultimate.C_memset_#amount| 21), 29929#(and (= |~#list~0.base| |old(~#list~0.base)|) (= |#valid| |old(#valid)|) (= |~#list~0.offset| |old(~#list~0.offset)|) (= |#NULL.base| |old(#NULL.base)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |old(#length)| |#length|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)), 29930#(and (= |#valid| |old(#valid)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |old(#length)| |#length|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)), 30131#(not (= 119 |zalloc_or_die_#in~size|)), 30132#(and (= |calloc_model_#in~size| calloc_model_~size) (= (mod (* (mod |calloc_model_#in~nmemb| 4294967296) (mod calloc_model_~size 4294967296)) 4294967296) (mod (* (mod calloc_model_~nmemb 4294967296) (mod calloc_model_~size 4294967296)) 4294967296))), 29753#true, 29754#false] [2018-02-04 20:32:05,198 INFO L134 CoverageAnalysis]: Checked inductivity of 2466 backedges. 1055 proven. 231 refuted. 0 times theorem prover too weak. 1180 trivial. 0 not checked. [2018-02-04 20:32:05,198 INFO L409 AbstractCegarLoop]: Interpolant automaton has 32 states [2018-02-04 20:32:05,198 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2018-02-04 20:32:05,198 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=295, Invalid=697, Unknown=0, NotChecked=0, Total=992 [2018-02-04 20:32:05,198 INFO L87 Difference]: Start difference. First operand 259 states and 287 transitions. Second operand 32 states. [2018-02-04 20:32:06,809 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 20:32:06,809 INFO L93 Difference]: Finished difference Result 322 states and 356 transitions. [2018-02-04 20:32:06,809 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 52 states. [2018-02-04 20:32:06,809 INFO L78 Accepts]: Start accepts. Automaton has 32 states. Word has length 203 [2018-02-04 20:32:06,809 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 20:32:06,810 INFO L225 Difference]: With dead ends: 322 [2018-02-04 20:32:06,810 INFO L226 Difference]: Without dead ends: 315 [2018-02-04 20:32:06,811 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 92 GetRequests, 37 SyntacticMatches, 0 SemanticMatches, 55 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 373 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=626, Invalid=2566, Unknown=0, NotChecked=0, Total=3192 [2018-02-04 20:32:06,811 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 315 states. [2018-02-04 20:32:06,813 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 315 to 260. [2018-02-04 20:32:06,813 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 260 states. [2018-02-04 20:32:06,813 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 260 states to 260 states and 289 transitions. [2018-02-04 20:32:06,813 INFO L78 Accepts]: Start accepts. Automaton has 260 states and 289 transitions. Word has length 203 [2018-02-04 20:32:06,813 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 20:32:06,813 INFO L432 AbstractCegarLoop]: Abstraction has 260 states and 289 transitions. [2018-02-04 20:32:06,813 INFO L433 AbstractCegarLoop]: Interpolant automaton has 32 states. [2018-02-04 20:32:06,813 INFO L276 IsEmpty]: Start isEmpty. Operand 260 states and 289 transitions. [2018-02-04 20:32:06,814 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 205 [2018-02-04 20:32:06,814 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 20:32:06,814 INFO L351 BasicCegarLoop]: trace histogram [62, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 20:32:06,814 INFO L371 AbstractCegarLoop]: === Iteration 36 === [l3_destroyErr0RequiresViolation, l3_destroyErr3RequiresViolation, l3_destroyErr1RequiresViolation, l3_destroyErr2RequiresViolation, l3_destroyErr4RequiresViolation, l3_destroyErr5RequiresViolation, l0_insertErr3RequiresViolation, l0_insertErr1RequiresViolation, l0_insertErr5RequiresViolation, l0_insertErr2RequiresViolation, l0_insertErr4RequiresViolation, l0_insertErr0RequiresViolation, l4_destroyErr4RequiresViolation, l4_destroyErr6RequiresViolation, l4_destroyErr2RequiresViolation, l4_destroyErr3RequiresViolation, l4_destroyErr1RequiresViolation, l4_destroyErr7RequiresViolation, l4_destroyErr0RequiresViolation, l4_destroyErr5RequiresViolation, l2_insertErr3RequiresViolation, l2_insertErr5RequiresViolation, l2_insertErr0RequiresViolation, l2_insertErr1RequiresViolation, l2_insertErr4RequiresViolation, l2_insertErr2RequiresViolation, mainErr1RequiresViolation, mainErr2EnsuresViolation, mainErr0RequiresViolation, l3_insertErr4RequiresViolation, l3_insertErr0RequiresViolation, l3_insertErr5RequiresViolation, l3_insertErr3RequiresViolation, l3_insertErr1RequiresViolation, l3_insertErr2RequiresViolation, l1_insertErr4RequiresViolation, l1_insertErr0RequiresViolation, l1_insertErr2RequiresViolation, l1_insertErr3RequiresViolation, l1_insertErr1RequiresViolation, l1_insertErr5RequiresViolation, l0_destroyErr5RequiresViolation, l0_destroyErr3RequiresViolation, l0_destroyErr1RequiresViolation, l0_destroyErr0RequiresViolation, l0_destroyErr4RequiresViolation, l0_destroyErr2RequiresViolation, calloc_modelErr0RequiresViolation, calloc_modelErr1RequiresViolation, l4_insertErr5RequiresViolation, l4_insertErr3RequiresViolation, l4_insertErr4RequiresViolation, l4_insertErr6RequiresViolation, l4_insertErr2RequiresViolation, l4_insertErr0RequiresViolation, l4_insertErr1RequiresViolation, l4_insertErr7RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr0RequiresViolation, l1_destroyErr2RequiresViolation, l1_destroyErr4RequiresViolation, l1_destroyErr0RequiresViolation, l1_destroyErr1RequiresViolation, l1_destroyErr5RequiresViolation, l1_destroyErr3RequiresViolation, l2_destroyErr1RequiresViolation, l2_destroyErr0RequiresViolation, l2_destroyErr2RequiresViolation, l2_destroyErr4RequiresViolation, l2_destroyErr5RequiresViolation, l2_destroyErr3RequiresViolation]=== [2018-02-04 20:32:06,814 INFO L82 PathProgramCache]: Analyzing trace with hash 326010532, now seen corresponding path program 23 times No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 37 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 37 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-02-04 20:32:06,818 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 20:32:06,855 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:32:06,876 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:32:06,886 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:32:06,890 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:32:06,895 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:32:06,900 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:32:06,904 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:32:06,907 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:32:06,914 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:32:06,919 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:32:06,922 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:32:06,928 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:32:06,933 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:32:06,937 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:32:06,943 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:32:06,948 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:32:06,953 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:32:06,963 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:32:06,994 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:32:07,553 WARN L146 SmtUtils]: Spent 532ms on a formula simplification. DAG size of input: 40 DAG size of output 22 [2018-02-04 20:32:07,965 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:32:22,209 WARN L143 SmtUtils]: Spent 955ms on a formula simplification that was a NOOP. DAG size: 17 [2018-02-04 20:32:22,232 INFO L134 CoverageAnalysis]: Checked inductivity of 2533 backedges. 1100 proven. 253 refuted. 0 times theorem prover too weak. 1180 trivial. 0 not checked. [2018-02-04 20:32:22,251 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 20:32:22,251 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [33] total 33 [2018-02-04 20:32:22,251 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 20:32:22,251 INFO L134 CoverageAnalysis]: Checked inductivity of 315 backedges. 45 proven. 0 refuted. 0 times theorem prover too weak. 270 trivial. 0 not checked. [2018-02-04 20:32:22,251 INFO L182 omatonBuilderFactory]: Interpolants [31232#(and (<= |#Ultimate.C_memset_#t~loopctr42| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr42|)), 31233#(and (<= |#Ultimate.C_memset_#t~loopctr42| 8) (<= 8 |#Ultimate.C_memset_#t~loopctr42|)), 31234#(and (<= |#Ultimate.C_memset_#t~loopctr42| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr42|)), 31235#(and (<= 10 |#Ultimate.C_memset_#t~loopctr42|) (<= |#Ultimate.C_memset_#t~loopctr42| 10)), 31236#(and (<= |#Ultimate.C_memset_#t~loopctr42| 11) (<= 11 |#Ultimate.C_memset_#t~loopctr42|)), 31237#(and (<= |#Ultimate.C_memset_#t~loopctr42| 12) (<= 12 |#Ultimate.C_memset_#t~loopctr42|)), 31238#(and (<= |#Ultimate.C_memset_#t~loopctr42| 13) (<= 13 |#Ultimate.C_memset_#t~loopctr42|)), 31239#(and (<= |#Ultimate.C_memset_#t~loopctr42| 14) (<= 14 |#Ultimate.C_memset_#t~loopctr42|)), 31240#(and (<= |#Ultimate.C_memset_#t~loopctr42| 15) (<= 15 |#Ultimate.C_memset_#t~loopctr42|)), 31241#(and (<= |#Ultimate.C_memset_#t~loopctr42| 16) (<= 16 |#Ultimate.C_memset_#t~loopctr42|)), 31242#(and (<= |#Ultimate.C_memset_#t~loopctr42| 17) (<= 17 |#Ultimate.C_memset_#t~loopctr42|)), 31243#(and (<= 18 |#Ultimate.C_memset_#t~loopctr42|) (<= |#Ultimate.C_memset_#t~loopctr42| 18)), 31244#(and (<= 19 |#Ultimate.C_memset_#t~loopctr42|) (<= |#Ultimate.C_memset_#t~loopctr42| 19)), 31245#(and (<= |#Ultimate.C_memset_#t~loopctr42| 20) (<= 20 |#Ultimate.C_memset_#t~loopctr42|)), 31246#(and (<= |#Ultimate.C_memset_#t~loopctr42| 21) (<= 21 |#Ultimate.C_memset_#t~loopctr42|)), 31247#(and (< 21 |#Ultimate.C_memset_#amount|) (<= (* 97 |#Ultimate.C_memset_#t~loopctr42|) (+ (div (+ (- 73014441898) (* 4294967199 |#Ultimate.C_memset_#amount|)) 4294967296) 4294969333))), 30992#(and (= |~#list~0.base| |old(~#list~0.base)|) (= |#valid| |old(#valid)|) (= |~#list~0.offset| |old(~#list~0.offset)|) (= |#NULL.base| |old(#NULL.base)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |old(#length)| |#length|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)), 31248#(and (< 21 |#Ultimate.C_memset_#amount|) (<= (* 4294967296 |#Ultimate.C_memset_#amount|) (+ (div (+ (- 73014441898) (* 4294967199 |#Ultimate.C_memset_#amount|)) 4294967296) (* 4294967199 |#Ultimate.C_memset_#t~loopctr42|) 4294969333))), 30993#(and (= |#valid| |old(#valid)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |old(#length)| |#length|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)), 31195#(not (= 119 |zalloc_or_die_#in~size|)), 31196#(and (= (mod (* (mod |calloc_model_#in~size| 4294967296) (mod calloc_model_~nmemb 4294967296)) 4294967296) (mod (* (mod calloc_model_~nmemb 4294967296) (mod calloc_model_~size 4294967296)) 4294967296)) (or (and (not (= calloc_model_~nmemb 1)) (not (= |calloc_model_#in~nmemb| 1))) (and (= |calloc_model_#in~nmemb| 1) (= calloc_model_~nmemb 1)))), 30815#true, 30816#false, 31027#(and (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)), 31160#(or (and (not (= zalloc_or_die_~size 119)) (not (= |zalloc_or_die_#in~size| 119))) (and (= zalloc_or_die_~size 119) (= |zalloc_or_die_#in~size| 119))), 31224#(or (not (= |calloc_model_#in~nmemb| 1)) (not (= (mod |calloc_model_#in~size| 4294967296) 119))), 31225#(= 0 |#Ultimate.C_memset_#t~loopctr42|), 31226#(= 1 |#Ultimate.C_memset_#t~loopctr42|), 31227#(and (<= 2 |#Ultimate.C_memset_#t~loopctr42|) (<= |#Ultimate.C_memset_#t~loopctr42| 2)), 31228#(and (<= |#Ultimate.C_memset_#t~loopctr42| 3) (<= 3 |#Ultimate.C_memset_#t~loopctr42|)), 31229#(and (<= |#Ultimate.C_memset_#t~loopctr42| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr42|)), 31230#(and (<= |#Ultimate.C_memset_#t~loopctr42| 5) (<= 5 |#Ultimate.C_memset_#t~loopctr42|)), 31231#(and (<= 6 |#Ultimate.C_memset_#t~loopctr42|) (<= |#Ultimate.C_memset_#t~loopctr42| 6))] [2018-02-04 20:32:22,252 INFO L134 CoverageAnalysis]: Checked inductivity of 2533 backedges. 1100 proven. 253 refuted. 0 times theorem prover too weak. 1180 trivial. 0 not checked. [2018-02-04 20:32:22,252 INFO L409 AbstractCegarLoop]: Interpolant automaton has 33 states [2018-02-04 20:32:22,252 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 33 interpolants. [2018-02-04 20:32:22,252 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=66, Invalid=984, Unknown=6, NotChecked=0, Total=1056 [2018-02-04 20:32:22,252 INFO L87 Difference]: Start difference. First operand 260 states and 289 transitions. Second operand 33 states. [2018-02-04 20:32:33,970 WARN L143 SmtUtils]: Spent 383ms on a formula simplification that was a NOOP. DAG size: 21 [2018-02-04 20:33:06,752 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 20:33:06,752 INFO L93 Difference]: Finished difference Result 328 states and 363 transitions. [2018-02-04 20:33:06,752 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 37 states. [2018-02-04 20:33:06,752 INFO L78 Accepts]: Start accepts. Automaton has 33 states. Word has length 204 [2018-02-04 20:33:06,752 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 20:33:06,753 INFO L225 Difference]: With dead ends: 328 [2018-02-04 20:33:06,753 INFO L226 Difference]: Without dead ends: 321 [2018-02-04 20:33:06,754 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 78 GetRequests, 38 SyntacticMatches, 0 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 91 ImplicationChecksByTransitivity, 15.4s TimeCoverageRelationStatistics Valid=117, Invalid=1599, Unknown=6, NotChecked=0, Total=1722 [2018-02-04 20:33:06,754 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 321 states. [2018-02-04 20:33:06,755 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 321 to 261. [2018-02-04 20:33:06,755 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 261 states. [2018-02-04 20:33:06,756 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 261 states to 261 states and 291 transitions. [2018-02-04 20:33:06,756 INFO L78 Accepts]: Start accepts. Automaton has 261 states and 291 transitions. Word has length 204 [2018-02-04 20:33:06,756 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 20:33:06,756 INFO L432 AbstractCegarLoop]: Abstraction has 261 states and 291 transitions. [2018-02-04 20:33:06,756 INFO L433 AbstractCegarLoop]: Interpolant automaton has 33 states. [2018-02-04 20:33:06,756 INFO L276 IsEmpty]: Start isEmpty. Operand 261 states and 291 transitions. [2018-02-04 20:33:06,757 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 206 [2018-02-04 20:33:06,757 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 20:33:06,757 INFO L351 BasicCegarLoop]: trace histogram [63, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 20:33:06,757 INFO L371 AbstractCegarLoop]: === Iteration 37 === [l3_destroyErr0RequiresViolation, l3_destroyErr3RequiresViolation, l3_destroyErr1RequiresViolation, l3_destroyErr2RequiresViolation, l3_destroyErr4RequiresViolation, l3_destroyErr5RequiresViolation, l0_insertErr3RequiresViolation, l0_insertErr1RequiresViolation, l0_insertErr5RequiresViolation, l0_insertErr2RequiresViolation, l0_insertErr4RequiresViolation, l0_insertErr0RequiresViolation, l4_destroyErr4RequiresViolation, l4_destroyErr6RequiresViolation, l4_destroyErr2RequiresViolation, l4_destroyErr3RequiresViolation, l4_destroyErr1RequiresViolation, l4_destroyErr7RequiresViolation, l4_destroyErr0RequiresViolation, l4_destroyErr5RequiresViolation, l2_insertErr3RequiresViolation, l2_insertErr5RequiresViolation, l2_insertErr0RequiresViolation, l2_insertErr1RequiresViolation, l2_insertErr4RequiresViolation, l2_insertErr2RequiresViolation, mainErr1RequiresViolation, mainErr2EnsuresViolation, mainErr0RequiresViolation, l3_insertErr4RequiresViolation, l3_insertErr0RequiresViolation, l3_insertErr5RequiresViolation, l3_insertErr3RequiresViolation, l3_insertErr1RequiresViolation, l3_insertErr2RequiresViolation, l1_insertErr4RequiresViolation, l1_insertErr0RequiresViolation, l1_insertErr2RequiresViolation, l1_insertErr3RequiresViolation, l1_insertErr1RequiresViolation, l1_insertErr5RequiresViolation, l0_destroyErr5RequiresViolation, l0_destroyErr3RequiresViolation, l0_destroyErr1RequiresViolation, l0_destroyErr0RequiresViolation, l0_destroyErr4RequiresViolation, l0_destroyErr2RequiresViolation, calloc_modelErr0RequiresViolation, calloc_modelErr1RequiresViolation, l4_insertErr5RequiresViolation, l4_insertErr3RequiresViolation, l4_insertErr4RequiresViolation, l4_insertErr6RequiresViolation, l4_insertErr2RequiresViolation, l4_insertErr0RequiresViolation, l4_insertErr1RequiresViolation, l4_insertErr7RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr0RequiresViolation, l1_destroyErr2RequiresViolation, l1_destroyErr4RequiresViolation, l1_destroyErr0RequiresViolation, l1_destroyErr1RequiresViolation, l1_destroyErr5RequiresViolation, l1_destroyErr3RequiresViolation, l2_destroyErr1RequiresViolation, l2_destroyErr0RequiresViolation, l2_destroyErr2RequiresViolation, l2_destroyErr4RequiresViolation, l2_destroyErr5RequiresViolation, l2_destroyErr3RequiresViolation]=== [2018-02-04 20:33:06,757 INFO L82 PathProgramCache]: Analyzing trace with hash 122336553, now seen corresponding path program 24 times No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 38 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 38 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-02-04 20:33:06,759 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 20:33:06,797 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:06,818 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:06,828 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:06,833 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:06,842 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:06,849 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:06,854 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:06,858 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:06,864 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:06,870 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:06,874 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:06,880 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:06,885 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:06,888 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:06,894 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:06,899 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:06,903 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:06,914 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:06,949 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:07,042 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:07,322 INFO L134 CoverageAnalysis]: Checked inductivity of 2601 backedges. 1145 proven. 276 refuted. 0 times theorem prover too weak. 1180 trivial. 0 not checked. [2018-02-04 20:33:07,339 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 20:33:07,339 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [34] total 34 [2018-02-04 20:33:07,339 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 20:33:07,339 INFO L134 CoverageAnalysis]: Checked inductivity of 315 backedges. 45 proven. 0 refuted. 0 times theorem prover too weak. 270 trivial. 0 not checked. [2018-02-04 20:33:07,339 INFO L182 omatonBuilderFactory]: Interpolants [32069#(and (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)), 32202#(or (and (not (= zalloc_or_die_~size 119)) (not (= |zalloc_or_die_#in~size| 119))) (and (= zalloc_or_die_~size 119) (= |zalloc_or_die_#in~size| 119))), 32268#(not (= (mod (* (mod |calloc_model_#in~nmemb| 4294967296) (mod |calloc_model_#in~size| 4294967296)) 4294967296) 119)), 32269#(= 0 |#Ultimate.C_memset_#t~loopctr42|), 32270#(= 1 |#Ultimate.C_memset_#t~loopctr42|), 32271#(<= |#Ultimate.C_memset_#t~loopctr42| 2), 32272#(<= |#Ultimate.C_memset_#t~loopctr42| 3), 32273#(<= |#Ultimate.C_memset_#t~loopctr42| 4), 32274#(<= |#Ultimate.C_memset_#t~loopctr42| 5), 32275#(<= |#Ultimate.C_memset_#t~loopctr42| 6), 32276#(<= |#Ultimate.C_memset_#t~loopctr42| 7), 32277#(<= |#Ultimate.C_memset_#t~loopctr42| 8), 32278#(<= |#Ultimate.C_memset_#t~loopctr42| 9), 32279#(<= |#Ultimate.C_memset_#t~loopctr42| 10), 32280#(<= |#Ultimate.C_memset_#t~loopctr42| 11), 32281#(<= |#Ultimate.C_memset_#t~loopctr42| 12), 32282#(<= |#Ultimate.C_memset_#t~loopctr42| 13), 32283#(<= |#Ultimate.C_memset_#t~loopctr42| 14), 32284#(<= |#Ultimate.C_memset_#t~loopctr42| 15), 32285#(<= |#Ultimate.C_memset_#t~loopctr42| 16), 32286#(<= |#Ultimate.C_memset_#t~loopctr42| 17), 32287#(<= |#Ultimate.C_memset_#t~loopctr42| 18), 32288#(<= |#Ultimate.C_memset_#t~loopctr42| 19), 32289#(<= |#Ultimate.C_memset_#t~loopctr42| 20), 32034#(and (= |~#list~0.base| |old(~#list~0.base)|) (= |#valid| |old(#valid)|) (= |~#list~0.offset| |old(~#list~0.offset)|) (= |#NULL.base| |old(#NULL.base)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |old(#length)| |#length|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)), 32290#(<= |#Ultimate.C_memset_#t~loopctr42| 21), 32035#(and (= |#valid| |old(#valid)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |old(#length)| |#length|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)), 32291#(<= |#Ultimate.C_memset_#t~loopctr42| 22), 32292#(<= |#Ultimate.C_memset_#t~loopctr42| 23), 32293#(not (= 119 |#Ultimate.C_memset_#amount|)), 32238#(not (= 119 |zalloc_or_die_#in~size|)), 32239#(= (mod (* (mod |calloc_model_#in~nmemb| 4294967296) (mod |calloc_model_#in~size| 4294967296)) 4294967296) (mod (* (mod calloc_model_~nmemb 4294967296) (mod calloc_model_~size 4294967296)) 4294967296)), 31856#true, 31857#false] [2018-02-04 20:33:07,339 INFO L134 CoverageAnalysis]: Checked inductivity of 2601 backedges. 1145 proven. 276 refuted. 0 times theorem prover too weak. 1180 trivial. 0 not checked. [2018-02-04 20:33:07,339 INFO L409 AbstractCegarLoop]: Interpolant automaton has 34 states [2018-02-04 20:33:07,340 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 34 interpolants. [2018-02-04 20:33:07,340 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=343, Invalid=779, Unknown=0, NotChecked=0, Total=1122 [2018-02-04 20:33:07,340 INFO L87 Difference]: Start difference. First operand 261 states and 291 transitions. Second operand 34 states. [2018-02-04 20:33:08,935 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 20:33:08,935 INFO L93 Difference]: Finished difference Result 331 states and 367 transitions. [2018-02-04 20:33:08,935 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 53 states. [2018-02-04 20:33:08,935 INFO L78 Accepts]: Start accepts. Automaton has 34 states. Word has length 205 [2018-02-04 20:33:08,935 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 20:33:08,936 INFO L225 Difference]: With dead ends: 331 [2018-02-04 20:33:08,936 INFO L226 Difference]: Without dead ends: 324 [2018-02-04 20:33:08,937 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 95 GetRequests, 39 SyntacticMatches, 0 SemanticMatches, 56 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 355 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=716, Invalid=2590, Unknown=0, NotChecked=0, Total=3306 [2018-02-04 20:33:08,937 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 324 states. [2018-02-04 20:33:08,938 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 324 to 262. [2018-02-04 20:33:08,938 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 262 states. [2018-02-04 20:33:08,939 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 262 states to 262 states and 293 transitions. [2018-02-04 20:33:08,939 INFO L78 Accepts]: Start accepts. Automaton has 262 states and 293 transitions. Word has length 205 [2018-02-04 20:33:08,939 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 20:33:08,939 INFO L432 AbstractCegarLoop]: Abstraction has 262 states and 293 transitions. [2018-02-04 20:33:08,939 INFO L433 AbstractCegarLoop]: Interpolant automaton has 34 states. [2018-02-04 20:33:08,939 INFO L276 IsEmpty]: Start isEmpty. Operand 262 states and 293 transitions. [2018-02-04 20:33:08,940 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 207 [2018-02-04 20:33:08,940 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 20:33:08,940 INFO L351 BasicCegarLoop]: trace histogram [64, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 20:33:08,940 INFO L371 AbstractCegarLoop]: === Iteration 38 === [l3_destroyErr0RequiresViolation, l3_destroyErr3RequiresViolation, l3_destroyErr1RequiresViolation, l3_destroyErr2RequiresViolation, l3_destroyErr4RequiresViolation, l3_destroyErr5RequiresViolation, l0_insertErr3RequiresViolation, l0_insertErr1RequiresViolation, l0_insertErr5RequiresViolation, l0_insertErr2RequiresViolation, l0_insertErr4RequiresViolation, l0_insertErr0RequiresViolation, l4_destroyErr4RequiresViolation, l4_destroyErr6RequiresViolation, l4_destroyErr2RequiresViolation, l4_destroyErr3RequiresViolation, l4_destroyErr1RequiresViolation, l4_destroyErr7RequiresViolation, l4_destroyErr0RequiresViolation, l4_destroyErr5RequiresViolation, l2_insertErr3RequiresViolation, l2_insertErr5RequiresViolation, l2_insertErr0RequiresViolation, l2_insertErr1RequiresViolation, l2_insertErr4RequiresViolation, l2_insertErr2RequiresViolation, mainErr1RequiresViolation, mainErr2EnsuresViolation, mainErr0RequiresViolation, l3_insertErr4RequiresViolation, l3_insertErr0RequiresViolation, l3_insertErr5RequiresViolation, l3_insertErr3RequiresViolation, l3_insertErr1RequiresViolation, l3_insertErr2RequiresViolation, l1_insertErr4RequiresViolation, l1_insertErr0RequiresViolation, l1_insertErr2RequiresViolation, l1_insertErr3RequiresViolation, l1_insertErr1RequiresViolation, l1_insertErr5RequiresViolation, l0_destroyErr5RequiresViolation, l0_destroyErr3RequiresViolation, l0_destroyErr1RequiresViolation, l0_destroyErr0RequiresViolation, l0_destroyErr4RequiresViolation, l0_destroyErr2RequiresViolation, calloc_modelErr0RequiresViolation, calloc_modelErr1RequiresViolation, l4_insertErr5RequiresViolation, l4_insertErr3RequiresViolation, l4_insertErr4RequiresViolation, l4_insertErr6RequiresViolation, l4_insertErr2RequiresViolation, l4_insertErr0RequiresViolation, l4_insertErr1RequiresViolation, l4_insertErr7RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr0RequiresViolation, l1_destroyErr2RequiresViolation, l1_destroyErr4RequiresViolation, l1_destroyErr0RequiresViolation, l1_destroyErr1RequiresViolation, l1_destroyErr5RequiresViolation, l1_destroyErr3RequiresViolation, l2_destroyErr1RequiresViolation, l2_destroyErr0RequiresViolation, l2_destroyErr2RequiresViolation, l2_destroyErr4RequiresViolation, l2_destroyErr5RequiresViolation, l2_destroyErr3RequiresViolation]=== [2018-02-04 20:33:08,940 INFO L82 PathProgramCache]: Analyzing trace with hash -1896589500, now seen corresponding path program 25 times No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 39 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 39 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-02-04 20:33:08,942 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 20:33:08,979 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:09,001 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:09,009 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:09,013 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:09,019 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:09,024 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:09,028 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:09,031 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:09,036 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:09,040 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:09,043 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:09,048 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:09,052 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:09,055 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:09,059 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:09,063 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:09,066 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:09,076 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:09,107 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:09,182 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:09,448 INFO L134 CoverageAnalysis]: Checked inductivity of 2670 backedges. 1190 proven. 300 refuted. 0 times theorem prover too weak. 1180 trivial. 0 not checked. [2018-02-04 20:33:09,464 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 20:33:09,464 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [35] total 35 [2018-02-04 20:33:09,464 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 20:33:09,464 INFO L134 CoverageAnalysis]: Checked inductivity of 315 backedges. 45 proven. 0 refuted. 0 times theorem prover too weak. 270 trivial. 0 not checked. [2018-02-04 20:33:09,464 INFO L182 omatonBuilderFactory]: Interpolants [33282#(or (and (not (= zalloc_or_die_~size 119)) (not (= |zalloc_or_die_#in~size| 119))) (and (= zalloc_or_die_~size 119) (= |zalloc_or_die_#in~size| 119))), 33350#(or (not (= (mod |calloc_model_#in~nmemb| 4294967296) 1)) (not (= |calloc_model_#in~size| 119))), 33351#(= 0 |#Ultimate.C_memset_#t~loopctr42|), 33352#(= 1 |#Ultimate.C_memset_#t~loopctr42|), 33353#(= |#Ultimate.C_memset_#t~loopctr42| 2), 33354#(<= |#Ultimate.C_memset_#t~loopctr42| 3), 33355#(<= |#Ultimate.C_memset_#t~loopctr42| 4), 33356#(<= |#Ultimate.C_memset_#t~loopctr42| 5), 33357#(<= |#Ultimate.C_memset_#t~loopctr42| 6), 33358#(<= |#Ultimate.C_memset_#t~loopctr42| 7), 33359#(<= |#Ultimate.C_memset_#t~loopctr42| 8), 33360#(<= |#Ultimate.C_memset_#t~loopctr42| 9), 33361#(<= |#Ultimate.C_memset_#t~loopctr42| 10), 33362#(<= |#Ultimate.C_memset_#t~loopctr42| 11), 33363#(<= |#Ultimate.C_memset_#t~loopctr42| 12), 33364#(<= |#Ultimate.C_memset_#t~loopctr42| 13), 33365#(<= |#Ultimate.C_memset_#t~loopctr42| 14), 33366#(<= |#Ultimate.C_memset_#t~loopctr42| 15), 33367#(<= |#Ultimate.C_memset_#t~loopctr42| 16), 33368#(<= |#Ultimate.C_memset_#t~loopctr42| 17), 33369#(<= |#Ultimate.C_memset_#t~loopctr42| 18), 33114#(and (= |~#list~0.base| |old(~#list~0.base)|) (= |#valid| |old(#valid)|) (= |~#list~0.offset| |old(~#list~0.offset)|) (= |#NULL.base| |old(#NULL.base)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |old(#length)| |#length|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)), 33370#(<= |#Ultimate.C_memset_#t~loopctr42| 19), 33115#(and (= |#valid| |old(#valid)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |old(#length)| |#length|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)), 33371#(<= |#Ultimate.C_memset_#t~loopctr42| 20), 33372#(<= |#Ultimate.C_memset_#t~loopctr42| 21), 33373#(<= |#Ultimate.C_memset_#t~loopctr42| 22), 33374#(<= |#Ultimate.C_memset_#t~loopctr42| 23), 33375#(<= |#Ultimate.C_memset_#t~loopctr42| 24), 33376#(<= |#Ultimate.C_memset_#amount| 24), 32935#true, 33319#(not (= 119 |zalloc_or_die_#in~size|)), 32936#false, 33320#(and (= calloc_model_~size |calloc_model_#in~size|) (= (mod (* (mod |calloc_model_#in~nmemb| 4294967296) (mod calloc_model_~size 4294967296)) 4294967296) (mod (* (mod calloc_model_~nmemb 4294967296) (mod calloc_model_~size 4294967296)) 4294967296))), 33149#(and (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|))] [2018-02-04 20:33:09,465 INFO L134 CoverageAnalysis]: Checked inductivity of 2670 backedges. 1190 proven. 300 refuted. 0 times theorem prover too weak. 1180 trivial. 0 not checked. [2018-02-04 20:33:09,465 INFO L409 AbstractCegarLoop]: Interpolant automaton has 35 states [2018-02-04 20:33:09,465 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 35 interpolants. [2018-02-04 20:33:09,465 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=367, Invalid=823, Unknown=0, NotChecked=0, Total=1190 [2018-02-04 20:33:09,465 INFO L87 Difference]: Start difference. First operand 262 states and 293 transitions. Second operand 35 states. [2018-02-04 20:33:11,227 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 20:33:11,227 INFO L93 Difference]: Finished difference Result 331 states and 368 transitions. [2018-02-04 20:33:11,227 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 58 states. [2018-02-04 20:33:11,227 INFO L78 Accepts]: Start accepts. Automaton has 35 states. Word has length 206 [2018-02-04 20:33:11,228 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 20:33:11,228 INFO L225 Difference]: With dead ends: 331 [2018-02-04 20:33:11,228 INFO L226 Difference]: Without dead ends: 324 [2018-02-04 20:33:11,229 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 98 GetRequests, 37 SyntacticMatches, 0 SemanticMatches, 61 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 458 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=801, Invalid=3105, Unknown=0, NotChecked=0, Total=3906 [2018-02-04 20:33:11,230 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 324 states. [2018-02-04 20:33:11,232 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 324 to 263. [2018-02-04 20:33:11,232 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 263 states. [2018-02-04 20:33:11,232 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 263 states to 263 states and 295 transitions. [2018-02-04 20:33:11,232 INFO L78 Accepts]: Start accepts. Automaton has 263 states and 295 transitions. Word has length 206 [2018-02-04 20:33:11,232 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 20:33:11,232 INFO L432 AbstractCegarLoop]: Abstraction has 263 states and 295 transitions. [2018-02-04 20:33:11,232 INFO L433 AbstractCegarLoop]: Interpolant automaton has 35 states. [2018-02-04 20:33:11,233 INFO L276 IsEmpty]: Start isEmpty. Operand 263 states and 295 transitions. [2018-02-04 20:33:11,233 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 208 [2018-02-04 20:33:11,233 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 20:33:11,233 INFO L351 BasicCegarLoop]: trace histogram [65, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 20:33:11,233 INFO L371 AbstractCegarLoop]: === Iteration 39 === [l3_destroyErr0RequiresViolation, l3_destroyErr3RequiresViolation, l3_destroyErr1RequiresViolation, l3_destroyErr2RequiresViolation, l3_destroyErr4RequiresViolation, l3_destroyErr5RequiresViolation, l0_insertErr3RequiresViolation, l0_insertErr1RequiresViolation, l0_insertErr5RequiresViolation, l0_insertErr2RequiresViolation, l0_insertErr4RequiresViolation, l0_insertErr0RequiresViolation, l4_destroyErr4RequiresViolation, l4_destroyErr6RequiresViolation, l4_destroyErr2RequiresViolation, l4_destroyErr3RequiresViolation, l4_destroyErr1RequiresViolation, l4_destroyErr7RequiresViolation, l4_destroyErr0RequiresViolation, l4_destroyErr5RequiresViolation, l2_insertErr3RequiresViolation, l2_insertErr5RequiresViolation, l2_insertErr0RequiresViolation, l2_insertErr1RequiresViolation, l2_insertErr4RequiresViolation, l2_insertErr2RequiresViolation, mainErr1RequiresViolation, mainErr2EnsuresViolation, mainErr0RequiresViolation, l3_insertErr4RequiresViolation, l3_insertErr0RequiresViolation, l3_insertErr5RequiresViolation, l3_insertErr3RequiresViolation, l3_insertErr1RequiresViolation, l3_insertErr2RequiresViolation, l1_insertErr4RequiresViolation, l1_insertErr0RequiresViolation, l1_insertErr2RequiresViolation, l1_insertErr3RequiresViolation, l1_insertErr1RequiresViolation, l1_insertErr5RequiresViolation, l0_destroyErr5RequiresViolation, l0_destroyErr3RequiresViolation, l0_destroyErr1RequiresViolation, l0_destroyErr0RequiresViolation, l0_destroyErr4RequiresViolation, l0_destroyErr2RequiresViolation, calloc_modelErr0RequiresViolation, calloc_modelErr1RequiresViolation, l4_insertErr5RequiresViolation, l4_insertErr3RequiresViolation, l4_insertErr4RequiresViolation, l4_insertErr6RequiresViolation, l4_insertErr2RequiresViolation, l4_insertErr0RequiresViolation, l4_insertErr1RequiresViolation, l4_insertErr7RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr0RequiresViolation, l1_destroyErr2RequiresViolation, l1_destroyErr4RequiresViolation, l1_destroyErr0RequiresViolation, l1_destroyErr1RequiresViolation, l1_destroyErr5RequiresViolation, l1_destroyErr3RequiresViolation, l2_destroyErr1RequiresViolation, l2_destroyErr0RequiresViolation, l2_destroyErr2RequiresViolation, l2_destroyErr4RequiresViolation, l2_destroyErr5RequiresViolation, l2_destroyErr3RequiresViolation]=== [2018-02-04 20:33:11,233 INFO L82 PathProgramCache]: Analyzing trace with hash -58787703, now seen corresponding path program 26 times No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 40 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 40 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-02-04 20:33:11,240 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 20:33:11,286 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:11,308 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:11,316 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:11,321 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:11,328 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:11,333 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:11,337 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:11,340 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:11,346 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:11,350 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:11,353 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:11,358 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:11,362 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:11,365 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:11,371 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:11,375 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:11,379 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:11,391 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:11,425 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:11,972 WARN L146 SmtUtils]: Spent 521ms on a formula simplification. DAG size of input: 40 DAG size of output 22 [2018-02-04 20:33:12,530 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:14,944 WARN L1033 $PredicateComparison]: unable to prove that (and (<= (* 47 |c_#Ultimate.C_memset_#t~loopctr42|) (+ (div (+ (- 36507220841) (* 2147483601 |c_#Ultimate.C_memset_#amount|)) 2147483648) 2147484776)) (< 24 |c_#Ultimate.C_memset_#amount|)) is different from true [2018-02-04 20:33:17,701 INFO L134 CoverageAnalysis]: Checked inductivity of 2740 backedges. 1235 proven. 300 refuted. 0 times theorem prover too weak. 1180 trivial. 25 not checked. [2018-02-04 20:33:17,721 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 20:33:17,721 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [36] total 36 [2018-02-04 20:33:17,721 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 20:33:17,721 INFO L134 CoverageAnalysis]: Checked inductivity of 315 backedges. 45 proven. 0 refuted. 0 times theorem prover too weak. 270 trivial. 0 not checked. [2018-02-04 20:33:17,721 INFO L182 omatonBuilderFactory]: Interpolants [34242#(and (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)), 34375#(or (and (not (= zalloc_or_die_~size 119)) (not (= |zalloc_or_die_#in~size| 119))) (and (= zalloc_or_die_~size 119) (= |zalloc_or_die_#in~size| 119))), 34445#(or (not (= |calloc_model_#in~nmemb| 1)) (not (= (mod |calloc_model_#in~size| 4294967296) 119))), 34446#(= 0 |#Ultimate.C_memset_#t~loopctr42|), 34447#(and (<= |#Ultimate.C_memset_#t~loopctr42| 1) (<= 1 |#Ultimate.C_memset_#t~loopctr42|)), 34448#(and (<= 2 |#Ultimate.C_memset_#t~loopctr42|) (<= |#Ultimate.C_memset_#t~loopctr42| 2)), 34449#(and (<= |#Ultimate.C_memset_#t~loopctr42| 3) (<= 3 |#Ultimate.C_memset_#t~loopctr42|)), 34450#(and (<= |#Ultimate.C_memset_#t~loopctr42| 4) (<= 4 |#Ultimate.C_memset_#t~loopctr42|)), 34451#(and (<= |#Ultimate.C_memset_#t~loopctr42| 5) (<= 5 |#Ultimate.C_memset_#t~loopctr42|)), 34452#(and (<= 6 |#Ultimate.C_memset_#t~loopctr42|) (<= |#Ultimate.C_memset_#t~loopctr42| 6)), 34453#(and (<= |#Ultimate.C_memset_#t~loopctr42| 7) (<= 7 |#Ultimate.C_memset_#t~loopctr42|)), 34454#(and (<= |#Ultimate.C_memset_#t~loopctr42| 8) (<= 8 |#Ultimate.C_memset_#t~loopctr42|)), 34455#(and (<= |#Ultimate.C_memset_#t~loopctr42| 9) (<= 9 |#Ultimate.C_memset_#t~loopctr42|)), 34456#(and (<= 10 |#Ultimate.C_memset_#t~loopctr42|) (<= |#Ultimate.C_memset_#t~loopctr42| 10)), 34457#(and (<= |#Ultimate.C_memset_#t~loopctr42| 11) (<= 11 |#Ultimate.C_memset_#t~loopctr42|)), 34458#(and (<= |#Ultimate.C_memset_#t~loopctr42| 12) (<= 12 |#Ultimate.C_memset_#t~loopctr42|)), 34459#(and (<= |#Ultimate.C_memset_#t~loopctr42| 13) (<= 13 |#Ultimate.C_memset_#t~loopctr42|)), 34460#(and (<= |#Ultimate.C_memset_#t~loopctr42| 14) (<= 14 |#Ultimate.C_memset_#t~loopctr42|)), 34461#(and (<= |#Ultimate.C_memset_#t~loopctr42| 15) (<= 15 |#Ultimate.C_memset_#t~loopctr42|)), 34462#(and (<= |#Ultimate.C_memset_#t~loopctr42| 16) (<= 16 |#Ultimate.C_memset_#t~loopctr42|)), 34207#(and (= |~#list~0.base| |old(~#list~0.base)|) (= |#valid| |old(#valid)|) (= |~#list~0.offset| |old(~#list~0.offset)|) (= |#NULL.base| |old(#NULL.base)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |old(#length)| |#length|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)), 34463#(and (<= |#Ultimate.C_memset_#t~loopctr42| 17) (<= 17 |#Ultimate.C_memset_#t~loopctr42|)), 34208#(and (= |#valid| |old(#valid)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |old(#length)| |#length|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)), 34464#(and (<= 18 |#Ultimate.C_memset_#t~loopctr42|) (<= |#Ultimate.C_memset_#t~loopctr42| 18)), 34465#(and (<= 19 |#Ultimate.C_memset_#t~loopctr42|) (<= |#Ultimate.C_memset_#t~loopctr42| 19)), 34466#(and (<= |#Ultimate.C_memset_#t~loopctr42| 20) (<= 20 |#Ultimate.C_memset_#t~loopctr42|)), 34467#(and (<= |#Ultimate.C_memset_#t~loopctr42| 21) (<= 21 |#Ultimate.C_memset_#t~loopctr42|)), 34468#(and (<= |#Ultimate.C_memset_#t~loopctr42| 22) (<= 22 |#Ultimate.C_memset_#t~loopctr42|)), 34469#(and (<= |#Ultimate.C_memset_#t~loopctr42| 23) (<= 23 |#Ultimate.C_memset_#t~loopctr42|)), 34470#(and (<= 24 |#Ultimate.C_memset_#t~loopctr42|) (<= |#Ultimate.C_memset_#t~loopctr42| 24)), 34471#(and (<= (* 47 |#Ultimate.C_memset_#t~loopctr42|) (+ (div (+ (- 36507220841) (* 2147483601 |#Ultimate.C_memset_#amount|)) 2147483648) 2147484776)) (< 24 |#Ultimate.C_memset_#amount|)), 34472#(and (< 24 |#Ultimate.C_memset_#amount|) (<= (* 2147483648 |#Ultimate.C_memset_#amount|) (+ (div (+ (- 36507220841) (* 2147483601 |#Ultimate.C_memset_#amount|)) 2147483648) (* 2147483601 |#Ultimate.C_memset_#t~loopctr42|) 2147484776))), 34027#true, 34028#false, 34413#(not (= 119 |zalloc_or_die_#in~size|)), 34414#(and (= (mod (* (mod |calloc_model_#in~size| 4294967296) (mod calloc_model_~nmemb 4294967296)) 4294967296) (mod (* (mod calloc_model_~nmemb 4294967296) (mod calloc_model_~size 4294967296)) 4294967296)) (or (and (not (= calloc_model_~nmemb 1)) (not (= |calloc_model_#in~nmemb| 1))) (and (= |calloc_model_#in~nmemb| 1) (= calloc_model_~nmemb 1))))] [2018-02-04 20:33:17,721 INFO L134 CoverageAnalysis]: Checked inductivity of 2740 backedges. 1235 proven. 300 refuted. 0 times theorem prover too weak. 1180 trivial. 25 not checked. [2018-02-04 20:33:17,722 INFO L409 AbstractCegarLoop]: Interpolant automaton has 36 states [2018-02-04 20:33:17,722 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2018-02-04 20:33:17,722 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=72, Invalid=1120, Unknown=2, NotChecked=66, Total=1260 [2018-02-04 20:33:17,722 INFO L87 Difference]: Start difference. First operand 263 states and 295 transitions. Second operand 36 states. [2018-02-04 20:33:51,045 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 20:33:51,045 INFO L93 Difference]: Finished difference Result 337 states and 375 transitions. [2018-02-04 20:33:51,045 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 40 states. [2018-02-04 20:33:51,045 INFO L78 Accepts]: Start accepts. Automaton has 36 states. Word has length 207 [2018-02-04 20:33:51,046 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 20:33:51,047 INFO L225 Difference]: With dead ends: 337 [2018-02-04 20:33:51,047 INFO L226 Difference]: Without dead ends: 330 [2018-02-04 20:33:51,047 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 80 GetRequests, 38 SyntacticMatches, 0 SemanticMatches, 42 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 87 ImplicationChecksByTransitivity, 8.0s TimeCoverageRelationStatistics Valid=119, Invalid=1688, Unknown=3, NotChecked=82, Total=1892 [2018-02-04 20:33:51,047 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 330 states. [2018-02-04 20:33:51,049 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 330 to 264. [2018-02-04 20:33:51,049 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 264 states. [2018-02-04 20:33:51,049 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 264 states to 264 states and 297 transitions. [2018-02-04 20:33:51,049 INFO L78 Accepts]: Start accepts. Automaton has 264 states and 297 transitions. Word has length 207 [2018-02-04 20:33:51,050 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 20:33:51,050 INFO L432 AbstractCegarLoop]: Abstraction has 264 states and 297 transitions. [2018-02-04 20:33:51,050 INFO L433 AbstractCegarLoop]: Interpolant automaton has 36 states. [2018-02-04 20:33:51,050 INFO L276 IsEmpty]: Start isEmpty. Operand 264 states and 297 transitions. [2018-02-04 20:33:51,050 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 209 [2018-02-04 20:33:51,050 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 20:33:51,050 INFO L351 BasicCegarLoop]: trace histogram [66, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 20:33:51,050 INFO L371 AbstractCegarLoop]: === Iteration 40 === [l3_destroyErr0RequiresViolation, l3_destroyErr3RequiresViolation, l3_destroyErr1RequiresViolation, l3_destroyErr2RequiresViolation, l3_destroyErr4RequiresViolation, l3_destroyErr5RequiresViolation, l0_insertErr3RequiresViolation, l0_insertErr1RequiresViolation, l0_insertErr5RequiresViolation, l0_insertErr2RequiresViolation, l0_insertErr4RequiresViolation, l0_insertErr0RequiresViolation, l4_destroyErr4RequiresViolation, l4_destroyErr6RequiresViolation, l4_destroyErr2RequiresViolation, l4_destroyErr3RequiresViolation, l4_destroyErr1RequiresViolation, l4_destroyErr7RequiresViolation, l4_destroyErr0RequiresViolation, l4_destroyErr5RequiresViolation, l2_insertErr3RequiresViolation, l2_insertErr5RequiresViolation, l2_insertErr0RequiresViolation, l2_insertErr1RequiresViolation, l2_insertErr4RequiresViolation, l2_insertErr2RequiresViolation, mainErr1RequiresViolation, mainErr2EnsuresViolation, mainErr0RequiresViolation, l3_insertErr4RequiresViolation, l3_insertErr0RequiresViolation, l3_insertErr5RequiresViolation, l3_insertErr3RequiresViolation, l3_insertErr1RequiresViolation, l3_insertErr2RequiresViolation, l1_insertErr4RequiresViolation, l1_insertErr0RequiresViolation, l1_insertErr2RequiresViolation, l1_insertErr3RequiresViolation, l1_insertErr1RequiresViolation, l1_insertErr5RequiresViolation, l0_destroyErr5RequiresViolation, l0_destroyErr3RequiresViolation, l0_destroyErr1RequiresViolation, l0_destroyErr0RequiresViolation, l0_destroyErr4RequiresViolation, l0_destroyErr2RequiresViolation, calloc_modelErr0RequiresViolation, calloc_modelErr1RequiresViolation, l4_insertErr5RequiresViolation, l4_insertErr3RequiresViolation, l4_insertErr4RequiresViolation, l4_insertErr6RequiresViolation, l4_insertErr2RequiresViolation, l4_insertErr0RequiresViolation, l4_insertErr1RequiresViolation, l4_insertErr7RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr0RequiresViolation, l1_destroyErr2RequiresViolation, l1_destroyErr4RequiresViolation, l1_destroyErr0RequiresViolation, l1_destroyErr1RequiresViolation, l1_destroyErr5RequiresViolation, l1_destroyErr3RequiresViolation, l2_destroyErr1RequiresViolation, l2_destroyErr0RequiresViolation, l2_destroyErr2RequiresViolation, l2_destroyErr4RequiresViolation, l2_destroyErr5RequiresViolation, l2_destroyErr3RequiresViolation]=== [2018-02-04 20:33:51,051 INFO L82 PathProgramCache]: Analyzing trace with hash 1078493156, now seen corresponding path program 27 times No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 41 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 41 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-02-04 20:33:51,056 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 20:33:51,095 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:51,119 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:51,128 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:51,131 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:51,138 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:51,144 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:51,148 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:51,150 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:51,155 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:51,158 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:51,161 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:51,165 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:51,169 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:51,172 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:51,177 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:51,181 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:51,184 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:51,196 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:51,231 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:51,327 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:51,639 INFO L134 CoverageAnalysis]: Checked inductivity of 2811 backedges. 1280 proven. 351 refuted. 0 times theorem prover too weak. 1180 trivial. 0 not checked. [2018-02-04 20:33:51,655 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 20:33:51,655 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [37] total 37 [2018-02-04 20:33:51,656 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 20:33:51,656 INFO L134 CoverageAnalysis]: Checked inductivity of 315 backedges. 45 proven. 0 refuted. 0 times theorem prover too weak. 270 trivial. 0 not checked. [2018-02-04 20:33:51,656 INFO L182 omatonBuilderFactory]: Interpolants [35520#(<= |#Ultimate.C_memset_#t~loopctr42| 8), 35521#(<= |#Ultimate.C_memset_#t~loopctr42| 9), 35522#(<= |#Ultimate.C_memset_#t~loopctr42| 10), 35523#(<= |#Ultimate.C_memset_#t~loopctr42| 11), 35524#(<= |#Ultimate.C_memset_#t~loopctr42| 12), 35525#(<= |#Ultimate.C_memset_#t~loopctr42| 13), 35526#(<= |#Ultimate.C_memset_#t~loopctr42| 14), 35271#(and (= |~#list~0.base| |old(~#list~0.base)|) (= |#valid| |old(#valid)|) (= |~#list~0.offset| |old(~#list~0.offset)|) (= |#NULL.base| |old(#NULL.base)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |old(#length)| |#length|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)), 35527#(<= |#Ultimate.C_memset_#t~loopctr42| 15), 35272#(and (= |#valid| |old(#valid)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |old(#length)| |#length|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)), 35528#(<= |#Ultimate.C_memset_#t~loopctr42| 16), 35529#(<= |#Ultimate.C_memset_#t~loopctr42| 17), 35530#(<= |#Ultimate.C_memset_#t~loopctr42| 18), 35531#(<= |#Ultimate.C_memset_#t~loopctr42| 19), 35532#(<= |#Ultimate.C_memset_#t~loopctr42| 20), 35533#(<= |#Ultimate.C_memset_#t~loopctr42| 21), 35534#(<= |#Ultimate.C_memset_#t~loopctr42| 22), 35535#(<= |#Ultimate.C_memset_#t~loopctr42| 23), 35536#(<= |#Ultimate.C_memset_#t~loopctr42| 24), 35537#(<= |#Ultimate.C_memset_#t~loopctr42| 25), 35090#true, 35538#(<= |#Ultimate.C_memset_#t~loopctr42| 26), 35091#false, 35539#(not (= 119 |#Ultimate.C_memset_#amount|)), 35478#(not (= 119 |zalloc_or_die_#in~size|)), 35479#(= (mod (* (mod |calloc_model_#in~nmemb| 4294967296) (mod |calloc_model_#in~size| 4294967296)) 4294967296) (mod (* (mod calloc_model_~nmemb 4294967296) (mod calloc_model_~size 4294967296)) 4294967296)), 35306#(and (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)), 35439#(or (and (not (= zalloc_or_die_~size 119)) (not (= |zalloc_or_die_#in~size| 119))) (and (= zalloc_or_die_~size 119) (= |zalloc_or_die_#in~size| 119))), 35511#(not (= (mod (* (mod |calloc_model_#in~nmemb| 4294967296) (mod |calloc_model_#in~size| 4294967296)) 4294967296) 119)), 35512#(= 0 |#Ultimate.C_memset_#t~loopctr42|), 35513#(<= |#Ultimate.C_memset_#t~loopctr42| 1), 35514#(<= |#Ultimate.C_memset_#t~loopctr42| 2), 35515#(<= |#Ultimate.C_memset_#t~loopctr42| 3), 35516#(<= |#Ultimate.C_memset_#t~loopctr42| 4), 35517#(<= |#Ultimate.C_memset_#t~loopctr42| 5), 35518#(<= |#Ultimate.C_memset_#t~loopctr42| 6), 35519#(<= |#Ultimate.C_memset_#t~loopctr42| 7)] [2018-02-04 20:33:51,656 INFO L134 CoverageAnalysis]: Checked inductivity of 2811 backedges. 1280 proven. 351 refuted. 0 times theorem prover too weak. 1180 trivial. 0 not checked. [2018-02-04 20:33:51,656 INFO L409 AbstractCegarLoop]: Interpolant automaton has 37 states [2018-02-04 20:33:51,656 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 37 interpolants. [2018-02-04 20:33:51,657 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=425, Invalid=907, Unknown=0, NotChecked=0, Total=1332 [2018-02-04 20:33:51,657 INFO L87 Difference]: Start difference. First operand 264 states and 297 transitions. Second operand 37 states. [2018-02-04 20:33:53,210 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 20:33:53,210 INFO L93 Difference]: Finished difference Result 340 states and 379 transitions. [2018-02-04 20:33:53,210 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 59 states. [2018-02-04 20:33:53,210 INFO L78 Accepts]: Start accepts. Automaton has 37 states. Word has length 208 [2018-02-04 20:33:53,210 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 20:33:53,211 INFO L225 Difference]: With dead ends: 340 [2018-02-04 20:33:53,211 INFO L226 Difference]: Without dead ends: 333 [2018-02-04 20:33:53,211 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 101 GetRequests, 39 SyntacticMatches, 0 SemanticMatches, 62 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 440 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=916, Invalid=3116, Unknown=0, NotChecked=0, Total=4032 [2018-02-04 20:33:53,212 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 333 states. [2018-02-04 20:33:53,213 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 333 to 265. [2018-02-04 20:33:53,214 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 265 states. [2018-02-04 20:33:53,214 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 265 states to 265 states and 299 transitions. [2018-02-04 20:33:53,214 INFO L78 Accepts]: Start accepts. Automaton has 265 states and 299 transitions. Word has length 208 [2018-02-04 20:33:53,214 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 20:33:53,214 INFO L432 AbstractCegarLoop]: Abstraction has 265 states and 299 transitions. [2018-02-04 20:33:53,214 INFO L433 AbstractCegarLoop]: Interpolant automaton has 37 states. [2018-02-04 20:33:53,214 INFO L276 IsEmpty]: Start isEmpty. Operand 265 states and 299 transitions. [2018-02-04 20:33:53,215 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 210 [2018-02-04 20:33:53,215 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 20:33:53,215 INFO L351 BasicCegarLoop]: trace histogram [67, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 20:33:53,215 INFO L371 AbstractCegarLoop]: === Iteration 41 === [l3_destroyErr0RequiresViolation, l3_destroyErr3RequiresViolation, l3_destroyErr1RequiresViolation, l3_destroyErr2RequiresViolation, l3_destroyErr4RequiresViolation, l3_destroyErr5RequiresViolation, l0_insertErr3RequiresViolation, l0_insertErr1RequiresViolation, l0_insertErr5RequiresViolation, l0_insertErr2RequiresViolation, l0_insertErr4RequiresViolation, l0_insertErr0RequiresViolation, l4_destroyErr4RequiresViolation, l4_destroyErr6RequiresViolation, l4_destroyErr2RequiresViolation, l4_destroyErr3RequiresViolation, l4_destroyErr1RequiresViolation, l4_destroyErr7RequiresViolation, l4_destroyErr0RequiresViolation, l4_destroyErr5RequiresViolation, l2_insertErr3RequiresViolation, l2_insertErr5RequiresViolation, l2_insertErr0RequiresViolation, l2_insertErr1RequiresViolation, l2_insertErr4RequiresViolation, l2_insertErr2RequiresViolation, mainErr1RequiresViolation, mainErr2EnsuresViolation, mainErr0RequiresViolation, l3_insertErr4RequiresViolation, l3_insertErr0RequiresViolation, l3_insertErr5RequiresViolation, l3_insertErr3RequiresViolation, l3_insertErr1RequiresViolation, l3_insertErr2RequiresViolation, l1_insertErr4RequiresViolation, l1_insertErr0RequiresViolation, l1_insertErr2RequiresViolation, l1_insertErr3RequiresViolation, l1_insertErr1RequiresViolation, l1_insertErr5RequiresViolation, l0_destroyErr5RequiresViolation, l0_destroyErr3RequiresViolation, l0_destroyErr1RequiresViolation, l0_destroyErr0RequiresViolation, l0_destroyErr4RequiresViolation, l0_destroyErr2RequiresViolation, calloc_modelErr0RequiresViolation, calloc_modelErr1RequiresViolation, l4_insertErr5RequiresViolation, l4_insertErr3RequiresViolation, l4_insertErr4RequiresViolation, l4_insertErr6RequiresViolation, l4_insertErr2RequiresViolation, l4_insertErr0RequiresViolation, l4_insertErr1RequiresViolation, l4_insertErr7RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr0RequiresViolation, l1_destroyErr2RequiresViolation, l1_destroyErr4RequiresViolation, l1_destroyErr0RequiresViolation, l1_destroyErr1RequiresViolation, l1_destroyErr5RequiresViolation, l1_destroyErr3RequiresViolation, l2_destroyErr1RequiresViolation, l2_destroyErr0RequiresViolation, l2_destroyErr2RequiresViolation, l2_destroyErr4RequiresViolation, l2_destroyErr5RequiresViolation, l2_destroyErr3RequiresViolation]=== [2018-02-04 20:33:53,215 INFO L82 PathProgramCache]: Analyzing trace with hash 1974461417, now seen corresponding path program 28 times No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 42 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 42 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-02-04 20:33:53,217 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 20:33:53,257 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:53,281 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:53,289 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:53,294 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:53,300 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:53,304 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:53,308 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:53,311 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:53,315 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:53,319 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:53,322 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:53,327 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:53,330 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:53,333 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:53,338 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:53,343 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:53,345 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:53,356 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:53,393 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:53,487 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:53,855 INFO L134 CoverageAnalysis]: Checked inductivity of 2883 backedges. 1325 proven. 378 refuted. 0 times theorem prover too weak. 1180 trivial. 0 not checked. [2018-02-04 20:33:53,872 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 20:33:53,872 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [38] total 38 [2018-02-04 20:33:53,872 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 20:33:53,872 INFO L134 CoverageAnalysis]: Checked inductivity of 315 backedges. 45 proven. 0 refuted. 0 times theorem prover too weak. 270 trivial. 0 not checked. [2018-02-04 20:33:53,872 INFO L182 omatonBuilderFactory]: Interpolants [36416#(and (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)), 36549#(or (and (not (= zalloc_or_die_~size 119)) (not (= |zalloc_or_die_#in~size| 119))) (and (= zalloc_or_die_~size 119) (= |zalloc_or_die_#in~size| 119))), 36623#(not (= (mod (* (mod |calloc_model_#in~nmemb| 4294967296) (mod |calloc_model_#in~size| 4294967296)) 4294967296) 119)), 36624#(= 0 |#Ultimate.C_memset_#t~loopctr42|), 36625#(<= |#Ultimate.C_memset_#t~loopctr42| 1), 36626#(<= |#Ultimate.C_memset_#t~loopctr42| 2), 36627#(<= |#Ultimate.C_memset_#t~loopctr42| 3), 36628#(<= |#Ultimate.C_memset_#t~loopctr42| 4), 36629#(<= |#Ultimate.C_memset_#t~loopctr42| 5), 36630#(<= |#Ultimate.C_memset_#t~loopctr42| 6), 36631#(<= |#Ultimate.C_memset_#t~loopctr42| 7), 36632#(<= |#Ultimate.C_memset_#t~loopctr42| 8), 36633#(<= |#Ultimate.C_memset_#t~loopctr42| 9), 36634#(<= |#Ultimate.C_memset_#t~loopctr42| 10), 36635#(<= |#Ultimate.C_memset_#t~loopctr42| 11), 36636#(<= |#Ultimate.C_memset_#t~loopctr42| 12), 36381#(and (= |~#list~0.base| |old(~#list~0.base)|) (= |#valid| |old(#valid)|) (= |~#list~0.offset| |old(~#list~0.offset)|) (= |#NULL.base| |old(#NULL.base)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |old(#length)| |#length|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)), 36637#(<= |#Ultimate.C_memset_#t~loopctr42| 13), 36382#(and (= |#valid| |old(#valid)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |old(#length)| |#length|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)), 36638#(<= |#Ultimate.C_memset_#t~loopctr42| 14), 36639#(<= |#Ultimate.C_memset_#t~loopctr42| 15), 36640#(<= |#Ultimate.C_memset_#t~loopctr42| 16), 36641#(<= |#Ultimate.C_memset_#t~loopctr42| 17), 36642#(<= |#Ultimate.C_memset_#t~loopctr42| 18), 36643#(<= |#Ultimate.C_memset_#t~loopctr42| 19), 36644#(<= |#Ultimate.C_memset_#t~loopctr42| 20), 36645#(<= |#Ultimate.C_memset_#t~loopctr42| 21), 36646#(<= |#Ultimate.C_memset_#t~loopctr42| 22), 36199#true, 36647#(<= |#Ultimate.C_memset_#t~loopctr42| 23), 36200#false, 36648#(<= |#Ultimate.C_memset_#t~loopctr42| 24), 36649#(<= |#Ultimate.C_memset_#t~loopctr42| 25), 36650#(<= |#Ultimate.C_memset_#t~loopctr42| 26), 36651#(<= |#Ultimate.C_memset_#t~loopctr42| 27), 36652#(not (= 119 |#Ultimate.C_memset_#amount|)), 36589#(not (= 119 |zalloc_or_die_#in~size|)), 36590#(= (mod (* (mod |calloc_model_#in~nmemb| 4294967296) (mod |calloc_model_#in~size| 4294967296)) 4294967296) (mod (* (mod calloc_model_~nmemb 4294967296) (mod calloc_model_~size 4294967296)) 4294967296))] [2018-02-04 20:33:53,873 INFO L134 CoverageAnalysis]: Checked inductivity of 2883 backedges. 1325 proven. 378 refuted. 0 times theorem prover too weak. 1180 trivial. 0 not checked. [2018-02-04 20:33:53,873 INFO L409 AbstractCegarLoop]: Interpolant automaton has 38 states [2018-02-04 20:33:53,873 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2018-02-04 20:33:53,873 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=454, Invalid=952, Unknown=0, NotChecked=0, Total=1406 [2018-02-04 20:33:53,873 INFO L87 Difference]: Start difference. First operand 265 states and 299 transitions. Second operand 38 states. [2018-02-04 20:33:55,553 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 20:33:55,553 INFO L93 Difference]: Finished difference Result 343 states and 383 transitions. [2018-02-04 20:33:55,553 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 61 states. [2018-02-04 20:33:55,553 INFO L78 Accepts]: Start accepts. Automaton has 38 states. Word has length 209 [2018-02-04 20:33:55,553 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 20:33:55,554 INFO L225 Difference]: With dead ends: 343 [2018-02-04 20:33:55,554 INFO L226 Difference]: Without dead ends: 336 [2018-02-04 20:33:55,554 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 103 GetRequests, 39 SyntacticMatches, 0 SemanticMatches, 64 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 470 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=988, Invalid=3302, Unknown=0, NotChecked=0, Total=4290 [2018-02-04 20:33:55,555 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 336 states. [2018-02-04 20:33:55,556 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 336 to 266. [2018-02-04 20:33:55,556 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 266 states. [2018-02-04 20:33:55,557 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 266 states to 266 states and 301 transitions. [2018-02-04 20:33:55,557 INFO L78 Accepts]: Start accepts. Automaton has 266 states and 301 transitions. Word has length 209 [2018-02-04 20:33:55,557 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 20:33:55,557 INFO L432 AbstractCegarLoop]: Abstraction has 266 states and 301 transitions. [2018-02-04 20:33:55,557 INFO L433 AbstractCegarLoop]: Interpolant automaton has 38 states. [2018-02-04 20:33:55,557 INFO L276 IsEmpty]: Start isEmpty. Operand 266 states and 301 transitions. [2018-02-04 20:33:55,557 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 211 [2018-02-04 20:33:55,558 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 20:33:55,558 INFO L351 BasicCegarLoop]: trace histogram [68, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 20:33:55,558 INFO L371 AbstractCegarLoop]: === Iteration 42 === [l3_destroyErr0RequiresViolation, l3_destroyErr3RequiresViolation, l3_destroyErr1RequiresViolation, l3_destroyErr2RequiresViolation, l3_destroyErr4RequiresViolation, l3_destroyErr5RequiresViolation, l0_insertErr3RequiresViolation, l0_insertErr1RequiresViolation, l0_insertErr5RequiresViolation, l0_insertErr2RequiresViolation, l0_insertErr4RequiresViolation, l0_insertErr0RequiresViolation, l4_destroyErr4RequiresViolation, l4_destroyErr6RequiresViolation, l4_destroyErr2RequiresViolation, l4_destroyErr3RequiresViolation, l4_destroyErr1RequiresViolation, l4_destroyErr7RequiresViolation, l4_destroyErr0RequiresViolation, l4_destroyErr5RequiresViolation, l2_insertErr3RequiresViolation, l2_insertErr5RequiresViolation, l2_insertErr0RequiresViolation, l2_insertErr1RequiresViolation, l2_insertErr4RequiresViolation, l2_insertErr2RequiresViolation, mainErr1RequiresViolation, mainErr2EnsuresViolation, mainErr0RequiresViolation, l3_insertErr4RequiresViolation, l3_insertErr0RequiresViolation, l3_insertErr5RequiresViolation, l3_insertErr3RequiresViolation, l3_insertErr1RequiresViolation, l3_insertErr2RequiresViolation, l1_insertErr4RequiresViolation, l1_insertErr0RequiresViolation, l1_insertErr2RequiresViolation, l1_insertErr3RequiresViolation, l1_insertErr1RequiresViolation, l1_insertErr5RequiresViolation, l0_destroyErr5RequiresViolation, l0_destroyErr3RequiresViolation, l0_destroyErr1RequiresViolation, l0_destroyErr0RequiresViolation, l0_destroyErr4RequiresViolation, l0_destroyErr2RequiresViolation, calloc_modelErr0RequiresViolation, calloc_modelErr1RequiresViolation, l4_insertErr5RequiresViolation, l4_insertErr3RequiresViolation, l4_insertErr4RequiresViolation, l4_insertErr6RequiresViolation, l4_insertErr2RequiresViolation, l4_insertErr0RequiresViolation, l4_insertErr1RequiresViolation, l4_insertErr7RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr0RequiresViolation, l1_destroyErr2RequiresViolation, l1_destroyErr4RequiresViolation, l1_destroyErr0RequiresViolation, l1_destroyErr1RequiresViolation, l1_destroyErr5RequiresViolation, l1_destroyErr3RequiresViolation, l2_destroyErr1RequiresViolation, l2_destroyErr0RequiresViolation, l2_destroyErr2RequiresViolation, l2_destroyErr4RequiresViolation, l2_destroyErr5RequiresViolation, l2_destroyErr3RequiresViolation]=== [2018-02-04 20:33:55,558 INFO L82 PathProgramCache]: Analyzing trace with hash -315293564, now seen corresponding path program 29 times No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 43 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 43 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-02-04 20:33:55,560 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 20:33:55,599 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:55,623 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:55,632 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:55,636 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:55,641 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:55,646 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:55,649 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:55,652 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:55,656 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:55,660 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:55,663 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:55,668 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:55,671 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:55,674 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:55,679 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:55,683 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:55,686 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:55,698 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:55,733 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:55,822 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:56,178 INFO L134 CoverageAnalysis]: Checked inductivity of 2956 backedges. 1370 proven. 406 refuted. 0 times theorem prover too weak. 1180 trivial. 0 not checked. [2018-02-04 20:33:56,194 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 20:33:56,194 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [39] total 39 [2018-02-04 20:33:56,195 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 20:33:56,195 INFO L134 CoverageAnalysis]: Checked inductivity of 315 backedges. 45 proven. 0 refuted. 0 times theorem prover too weak. 270 trivial. 0 not checked. [2018-02-04 20:33:56,195 INFO L182 omatonBuilderFactory]: Interpolants [37760#(<= |#Ultimate.C_memset_#t~loopctr42| 14), 37761#(<= |#Ultimate.C_memset_#t~loopctr42| 15), 37762#(<= |#Ultimate.C_memset_#t~loopctr42| 16), 37763#(<= |#Ultimate.C_memset_#t~loopctr42| 17), 37764#(<= |#Ultimate.C_memset_#t~loopctr42| 18), 37765#(<= |#Ultimate.C_memset_#t~loopctr42| 19), 37318#true, 37766#(<= |#Ultimate.C_memset_#t~loopctr42| 20), 37319#false, 37767#(<= |#Ultimate.C_memset_#t~loopctr42| 21), 37768#(<= |#Ultimate.C_memset_#t~loopctr42| 22), 37769#(<= |#Ultimate.C_memset_#t~loopctr42| 23), 37770#(<= |#Ultimate.C_memset_#t~loopctr42| 24), 37771#(<= |#Ultimate.C_memset_#t~loopctr42| 25), 37772#(<= |#Ultimate.C_memset_#t~loopctr42| 26), 37773#(<= |#Ultimate.C_memset_#t~loopctr42| 27), 37774#(<= |#Ultimate.C_memset_#t~loopctr42| 28), 37710#(not (= 119 |zalloc_or_die_#in~size|)), 37711#(= (mod (* (mod |calloc_model_#in~nmemb| 4294967296) (mod |calloc_model_#in~size| 4294967296)) 4294967296) (mod (* (mod calloc_model_~nmemb 4294967296) (mod calloc_model_~size 4294967296)) 4294967296)), 37775#(not (= |#Ultimate.C_memset_#amount| 119)), 37536#(and (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)), 37669#(or (and (not (= zalloc_or_die_~size 119)) (not (= |zalloc_or_die_#in~size| 119))) (and (= zalloc_or_die_~size 119) (= |zalloc_or_die_#in~size| 119))), 37745#(not (= (mod (* (mod |calloc_model_#in~nmemb| 4294967296) (mod |calloc_model_#in~size| 4294967296)) 4294967296) 119)), 37746#(= 0 |#Ultimate.C_memset_#t~loopctr42|), 37747#(= 1 |#Ultimate.C_memset_#t~loopctr42|), 37748#(= |#Ultimate.C_memset_#t~loopctr42| 2), 37749#(<= |#Ultimate.C_memset_#t~loopctr42| 3), 37750#(<= |#Ultimate.C_memset_#t~loopctr42| 4), 37751#(<= |#Ultimate.C_memset_#t~loopctr42| 5), 37752#(<= |#Ultimate.C_memset_#t~loopctr42| 6), 37753#(<= |#Ultimate.C_memset_#t~loopctr42| 7), 37754#(<= |#Ultimate.C_memset_#t~loopctr42| 8), 37755#(<= |#Ultimate.C_memset_#t~loopctr42| 9), 37756#(<= |#Ultimate.C_memset_#t~loopctr42| 10), 37501#(and (= |~#list~0.base| |old(~#list~0.base)|) (= |#valid| |old(#valid)|) (= |~#list~0.offset| |old(~#list~0.offset)|) (= |#NULL.base| |old(#NULL.base)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |old(#length)| |#length|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)), 37757#(<= |#Ultimate.C_memset_#t~loopctr42| 11), 37502#(and (= |#valid| |old(#valid)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |old(#length)| |#length|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)), 37758#(<= |#Ultimate.C_memset_#t~loopctr42| 12), 37759#(<= |#Ultimate.C_memset_#t~loopctr42| 13)] [2018-02-04 20:33:56,195 INFO L134 CoverageAnalysis]: Checked inductivity of 2956 backedges. 1370 proven. 406 refuted. 0 times theorem prover too weak. 1180 trivial. 0 not checked. [2018-02-04 20:33:56,195 INFO L409 AbstractCegarLoop]: Interpolant automaton has 39 states [2018-02-04 20:33:56,195 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 39 interpolants. [2018-02-04 20:33:56,196 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=481, Invalid=1001, Unknown=0, NotChecked=0, Total=1482 [2018-02-04 20:33:56,196 INFO L87 Difference]: Start difference. First operand 266 states and 301 transitions. Second operand 39 states. [2018-02-04 20:33:57,571 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-02-04 20:33:57,571 INFO L93 Difference]: Finished difference Result 346 states and 387 transitions. [2018-02-04 20:33:57,571 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 63 states. [2018-02-04 20:33:57,571 INFO L78 Accepts]: Start accepts. Automaton has 39 states. Word has length 210 [2018-02-04 20:33:57,571 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-02-04 20:33:57,572 INFO L225 Difference]: With dead ends: 346 [2018-02-04 20:33:57,572 INFO L226 Difference]: Without dead ends: 339 [2018-02-04 20:33:57,573 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 105 GetRequests, 39 SyntacticMatches, 0 SemanticMatches, 66 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 499 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=1058, Invalid=3498, Unknown=0, NotChecked=0, Total=4556 [2018-02-04 20:33:57,573 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 339 states. [2018-02-04 20:33:57,575 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 339 to 267. [2018-02-04 20:33:57,575 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 267 states. [2018-02-04 20:33:57,576 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 267 states to 267 states and 303 transitions. [2018-02-04 20:33:57,576 INFO L78 Accepts]: Start accepts. Automaton has 267 states and 303 transitions. Word has length 210 [2018-02-04 20:33:57,576 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-02-04 20:33:57,576 INFO L432 AbstractCegarLoop]: Abstraction has 267 states and 303 transitions. [2018-02-04 20:33:57,576 INFO L433 AbstractCegarLoop]: Interpolant automaton has 39 states. [2018-02-04 20:33:57,576 INFO L276 IsEmpty]: Start isEmpty. Operand 267 states and 303 transitions. [2018-02-04 20:33:57,577 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 212 [2018-02-04 20:33:57,577 INFO L343 BasicCegarLoop]: Found error trace [2018-02-04 20:33:57,577 INFO L351 BasicCegarLoop]: trace histogram [69, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-02-04 20:33:57,577 INFO L371 AbstractCegarLoop]: === Iteration 43 === [l3_destroyErr0RequiresViolation, l3_destroyErr3RequiresViolation, l3_destroyErr1RequiresViolation, l3_destroyErr2RequiresViolation, l3_destroyErr4RequiresViolation, l3_destroyErr5RequiresViolation, l0_insertErr3RequiresViolation, l0_insertErr1RequiresViolation, l0_insertErr5RequiresViolation, l0_insertErr2RequiresViolation, l0_insertErr4RequiresViolation, l0_insertErr0RequiresViolation, l4_destroyErr4RequiresViolation, l4_destroyErr6RequiresViolation, l4_destroyErr2RequiresViolation, l4_destroyErr3RequiresViolation, l4_destroyErr1RequiresViolation, l4_destroyErr7RequiresViolation, l4_destroyErr0RequiresViolation, l4_destroyErr5RequiresViolation, l2_insertErr3RequiresViolation, l2_insertErr5RequiresViolation, l2_insertErr0RequiresViolation, l2_insertErr1RequiresViolation, l2_insertErr4RequiresViolation, l2_insertErr2RequiresViolation, mainErr1RequiresViolation, mainErr2EnsuresViolation, mainErr0RequiresViolation, l3_insertErr4RequiresViolation, l3_insertErr0RequiresViolation, l3_insertErr5RequiresViolation, l3_insertErr3RequiresViolation, l3_insertErr1RequiresViolation, l3_insertErr2RequiresViolation, l1_insertErr4RequiresViolation, l1_insertErr0RequiresViolation, l1_insertErr2RequiresViolation, l1_insertErr3RequiresViolation, l1_insertErr1RequiresViolation, l1_insertErr5RequiresViolation, l0_destroyErr5RequiresViolation, l0_destroyErr3RequiresViolation, l0_destroyErr1RequiresViolation, l0_destroyErr0RequiresViolation, l0_destroyErr4RequiresViolation, l0_destroyErr2RequiresViolation, calloc_modelErr0RequiresViolation, calloc_modelErr1RequiresViolation, l4_insertErr5RequiresViolation, l4_insertErr3RequiresViolation, l4_insertErr4RequiresViolation, l4_insertErr6RequiresViolation, l4_insertErr2RequiresViolation, l4_insertErr0RequiresViolation, l4_insertErr1RequiresViolation, l4_insertErr7RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr0RequiresViolation, l1_destroyErr2RequiresViolation, l1_destroyErr4RequiresViolation, l1_destroyErr0RequiresViolation, l1_destroyErr1RequiresViolation, l1_destroyErr5RequiresViolation, l1_destroyErr3RequiresViolation, l2_destroyErr1RequiresViolation, l2_destroyErr0RequiresViolation, l2_destroyErr2RequiresViolation, l2_destroyErr4RequiresViolation, l2_destroyErr5RequiresViolation, l2_destroyErr3RequiresViolation]=== [2018-02-04 20:33:57,578 INFO L82 PathProgramCache]: Analyzing trace with hash 1716746057, now seen corresponding path program 30 times No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 44 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 44 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-02-04 20:33:57,582 INFO L67 tionRefinementEngine]: Using refinement strategy FixedTraceAbstractionRefinementStrategy [2018-02-04 20:33:57,626 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:57,651 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:57,659 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:57,663 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:57,668 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:57,673 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:57,676 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:57,679 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:57,684 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:57,687 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:57,690 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:57,694 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:57,698 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:57,700 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:57,705 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:57,709 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:57,712 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:57,723 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:57,759 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:57,852 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-02-04 20:33:58,238 INFO L134 CoverageAnalysis]: Checked inductivity of 3030 backedges. 1415 proven. 435 refuted. 0 times theorem prover too weak. 1180 trivial. 0 not checked. [2018-02-04 20:33:58,254 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-02-04 20:33:58,254 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [40] total 40 [2018-02-04 20:33:58,254 INFO L142 lantAutomatonBuilder]: Constructing canonical interpolant automaton, with selfloop in false state [2018-02-04 20:33:58,254 INFO L134 CoverageAnalysis]: Checked inductivity of 315 backedges. 45 proven. 0 refuted. 0 times theorem prover too weak. 270 trivial. 0 not checked. [2018-02-04 20:33:58,255 INFO L182 omatonBuilderFactory]: Interpolants [38666#(and (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)), 38799#(or (and (not (= zalloc_or_die_~size 119)) (not (= |zalloc_or_die_#in~size| 119))) (and (= zalloc_or_die_~size 119) (= |zalloc_or_die_#in~size| 119))), 38877#(not (= (mod (* (mod |calloc_model_#in~nmemb| 4294967296) (mod |calloc_model_#in~size| 4294967296)) 4294967296) 119)), 38878#(= 0 |#Ultimate.C_memset_#t~loopctr42|), 38879#(<= |#Ultimate.C_memset_#t~loopctr42| 1), 38880#(<= |#Ultimate.C_memset_#t~loopctr42| 2), 38881#(<= |#Ultimate.C_memset_#t~loopctr42| 3), 38882#(<= |#Ultimate.C_memset_#t~loopctr42| 4), 38883#(<= |#Ultimate.C_memset_#t~loopctr42| 5), 38884#(<= |#Ultimate.C_memset_#t~loopctr42| 6), 38885#(<= |#Ultimate.C_memset_#t~loopctr42| 7), 38886#(<= |#Ultimate.C_memset_#t~loopctr42| 8), 38631#(and (= |~#list~0.base| |old(~#list~0.base)|) (= |#valid| |old(#valid)|) (= |~#list~0.offset| |old(~#list~0.offset)|) (= |#NULL.base| |old(#NULL.base)|) (= |#NULL.offset| |old(#NULL.offset)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |old(#length)| |#length|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)), 38887#(<= |#Ultimate.C_memset_#t~loopctr42| 9), 38632#(and (= |#valid| |old(#valid)|) (= |#memory_$Pointer$.base| |old(#memory_$Pointer$.base)|) (= |old(#length)| |#length|) (= |#memory_$Pointer$.offset| |old(#memory_$Pointer$.offset)|)), 38888#(<= |#Ultimate.C_memset_#t~loopctr42| 10), 38889#(<= |#Ultimate.C_memset_#t~loopctr42| 11), 38890#(<= |#Ultimate.C_memset_#t~loopctr42| 12), 38891#(<= |#Ultimate.C_memset_#t~loopctr42| 13), 38892#(<= |#Ultimate.C_memset_#t~loopctr42| 14), 38893#(<= |#Ultimate.C_memset_#t~loopctr42| 15), 38894#(<= |#Ultimate.C_memset_#t~loopctr42| 16), 38447#true, 38895#(<= |#Ultimate.C_memset_#t~loopctr42| 17), 38448#false, 38896#(<= |#Ultimate.C_memset_#t~loopctr42| 18), 38897#(<= |#Ultimate.C_memset_#t~loopctr42| 19), 38898#(<= |#Ultimate.C_memset_#t~loopctr42| 20), 38899#(<= |#Ultimate.C_memset_#t~loopctr42| 21), 38900#(<= |#Ultimate.C_memset_#t~loopctr42| 22), 38901#(<= |#Ultimate.C_memset_#t~loopctr42| 23), 38902#(<= |#Ultimate.C_memset_#t~loopctr42| 24), 38903#(<= |#Ultimate.C_memset_#t~loopctr42| 25), 38904#(<= |#Ultimate.C_memset_#t~loopctr42| 26), 38905#(<= |#Ultimate.C_memset_#t~loopctr42| 27), 38841#(not (= 119 |zalloc_or_die_#in~size|)), 38842#(= (mod (* (mod |calloc_model_#in~nmemb| 4294967296) (mod |calloc_model_#in~size| 4294967296)) 4294967296) (mod (* (mod calloc_model_~nmemb 4294967296) (mod calloc_model_~size 4294967296)) 4294967296)), 38906#(<= |#Ultimate.C_memset_#t~loopctr42| 28), 38907#(<= |#Ultimate.C_memset_#t~loopctr42| 29), 38908#(not (= 119 |#Ultimate.C_memset_#amount|))] [2018-02-04 20:33:58,255 INFO L134 CoverageAnalysis]: Checked inductivity of 3030 backedges. 1415 proven. 435 refuted. 0 times theorem prover too weak. 1180 trivial. 0 not checked. [2018-02-04 20:33:58,255 INFO L409 AbstractCegarLoop]: Interpolant automaton has 40 states [2018-02-04 20:33:58,255 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 40 interpolants. [2018-02-04 20:33:58,255 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=515, Invalid=1045, Unknown=0, NotChecked=0, Total=1560 [2018-02-04 20:33:58,255 INFO L87 Difference]: Start difference. First operand 267 states and 303 transitions. Second operand 40 states. Received shutdown request... [2018-02-04 20:33:58,275 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-02-04 20:33:58,275 WARN L491 AbstractCegarLoop]: Verification canceled [2018-02-04 20:33:58,280 WARN L185 ceAbstractionStarter]: Timeout [2018-02-04 20:33:58,280 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 04.02 08:33:58 BoogieIcfgContainer [2018-02-04 20:33:58,280 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-02-04 20:33:58,281 INFO L168 Benchmark]: Toolchain (without parser) took 208707.30 ms. Allocated memory was 399.0 MB in the beginning and 1.3 GB in the end (delta: 879.2 MB). Free memory was 353.0 MB in the beginning and 995.8 MB in the end (delta: -642.8 MB). Peak memory consumption was 236.4 MB. Max. memory is 5.3 GB. [2018-02-04 20:33:58,282 INFO L168 Benchmark]: CDTParser took 0.15 ms. Allocated memory is still 399.0 MB. Free memory is still 358.3 MB. There was no memory consumed. Max. memory is 5.3 GB. [2018-02-04 20:33:58,282 INFO L168 Benchmark]: CACSL2BoogieTranslator took 205.80 ms. Allocated memory is still 399.0 MB. Free memory was 353.0 MB in the beginning and 339.8 MB in the end (delta: 13.2 MB). Peak memory consumption was 13.2 MB. Max. memory is 5.3 GB. [2018-02-04 20:33:58,282 INFO L168 Benchmark]: Boogie Preprocessor took 31.01 ms. Allocated memory is still 399.0 MB. Free memory was 339.8 MB in the beginning and 337.2 MB in the end (delta: 2.6 MB). Peak memory consumption was 2.6 MB. Max. memory is 5.3 GB. [2018-02-04 20:33:58,282 INFO L168 Benchmark]: RCFGBuilder took 497.63 ms. Allocated memory is still 399.0 MB. Free memory was 337.2 MB in the beginning and 285.5 MB in the end (delta: 51.6 MB). Peak memory consumption was 51.6 MB. Max. memory is 5.3 GB. [2018-02-04 20:33:58,283 INFO L168 Benchmark]: TraceAbstraction took 207970.37 ms. Allocated memory was 399.0 MB in the beginning and 1.3 GB in the end (delta: 879.2 MB). Free memory was 285.5 MB in the beginning and 995.8 MB in the end (delta: -710.3 MB). Peak memory consumption was 168.9 MB. Max. memory is 5.3 GB. [2018-02-04 20:33:58,284 INFO L344 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.15 ms. Allocated memory is still 399.0 MB. Free memory is still 358.3 MB. There was no memory consumed. Max. memory is 5.3 GB. * CACSL2BoogieTranslator took 205.80 ms. Allocated memory is still 399.0 MB. Free memory was 353.0 MB in the beginning and 339.8 MB in the end (delta: 13.2 MB). Peak memory consumption was 13.2 MB. Max. memory is 5.3 GB. * Boogie Preprocessor took 31.01 ms. Allocated memory is still 399.0 MB. Free memory was 339.8 MB in the beginning and 337.2 MB in the end (delta: 2.6 MB). Peak memory consumption was 2.6 MB. Max. memory is 5.3 GB. * RCFGBuilder took 497.63 ms. Allocated memory is still 399.0 MB. Free memory was 337.2 MB in the beginning and 285.5 MB in the end (delta: 51.6 MB). Peak memory consumption was 51.6 MB. Max. memory is 5.3 GB. * TraceAbstraction took 207970.37 ms. Allocated memory was 399.0 MB in the beginning and 1.3 GB in the end (delta: 879.2 MB). Free memory was 285.5 MB in the beginning and 995.8 MB in the end (delta: -710.3 MB). Peak memory consumption was 168.9 MB. Max. memory is 5.3 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 828). Cancelled while BasicCegarLoop was constructing difference of abstraction (267states) and interpolant automaton (currently 4 states, 40 states before enhancement), while ReachableStatesComputation was computing reachable states (2 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 829). Cancelled while BasicCegarLoop was constructing difference of abstraction (267states) and interpolant automaton (currently 4 states, 40 states before enhancement), while ReachableStatesComputation was computing reachable states (2 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 828). Cancelled while BasicCegarLoop was constructing difference of abstraction (267states) and interpolant automaton (currently 4 states, 40 states before enhancement), while ReachableStatesComputation was computing reachable states (2 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 829). Cancelled while BasicCegarLoop was constructing difference of abstraction (267states) and interpolant automaton (currently 4 states, 40 states before enhancement), while ReachableStatesComputation was computing reachable states (2 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 830). Cancelled while BasicCegarLoop was constructing difference of abstraction (267states) and interpolant automaton (currently 4 states, 40 states before enhancement), while ReachableStatesComputation was computing reachable states (2 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 830). Cancelled while BasicCegarLoop was constructing difference of abstraction (267states) and interpolant automaton (currently 4 states, 40 states before enhancement), while ReachableStatesComputation was computing reachable states (2 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 812). Cancelled while BasicCegarLoop was constructing difference of abstraction (267states) and interpolant automaton (currently 4 states, 40 states before enhancement), while ReachableStatesComputation was computing reachable states (2 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 812). Cancelled while BasicCegarLoop was constructing difference of abstraction (267states) and interpolant automaton (currently 4 states, 40 states before enhancement), while ReachableStatesComputation was computing reachable states (2 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 813). Cancelled while BasicCegarLoop was constructing difference of abstraction (267states) and interpolant automaton (currently 4 states, 40 states before enhancement), while ReachableStatesComputation was computing reachable states (2 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 812). Cancelled while BasicCegarLoop was constructing difference of abstraction (267states) and interpolant automaton (currently 4 states, 40 states before enhancement), while ReachableStatesComputation was computing reachable states (2 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 813). Cancelled while BasicCegarLoop was constructing difference of abstraction (267states) and interpolant automaton (currently 4 states, 40 states before enhancement), while ReachableStatesComputation was computing reachable states (2 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 812). Cancelled while BasicCegarLoop was constructing difference of abstraction (267states) and interpolant automaton (currently 4 states, 40 states before enhancement), while ReachableStatesComputation was computing reachable states (2 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 819). Cancelled while BasicCegarLoop was constructing difference of abstraction (267states) and interpolant automaton (currently 4 states, 40 states before enhancement), while ReachableStatesComputation was computing reachable states (2 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 820). Cancelled while BasicCegarLoop was constructing difference of abstraction (267states) and interpolant automaton (currently 4 states, 40 states before enhancement), while ReachableStatesComputation was computing reachable states (2 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 818). Cancelled while BasicCegarLoop was constructing difference of abstraction (267states) and interpolant automaton (currently 4 states, 40 states before enhancement), while ReachableStatesComputation was computing reachable states (2 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 818). Cancelled while BasicCegarLoop was constructing difference of abstraction (267states) and interpolant automaton (currently 4 states, 40 states before enhancement), while ReachableStatesComputation was computing reachable states (2 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 818). Cancelled while BasicCegarLoop was constructing difference of abstraction (267states) and interpolant automaton (currently 4 states, 40 states before enhancement), while ReachableStatesComputation was computing reachable states (2 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 820). Cancelled while BasicCegarLoop was constructing difference of abstraction (267states) and interpolant automaton (currently 4 states, 40 states before enhancement), while ReachableStatesComputation was computing reachable states (2 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 818). Cancelled while BasicCegarLoop was constructing difference of abstraction (267states) and interpolant automaton (currently 4 states, 40 states before enhancement), while ReachableStatesComputation was computing reachable states (2 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 819). Cancelled while BasicCegarLoop was constructing difference of abstraction (267states) and interpolant automaton (currently 4 states, 40 states before enhancement), while ReachableStatesComputation was computing reachable states (2 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 794). Cancelled while BasicCegarLoop was constructing difference of abstraction (267states) and interpolant automaton (currently 4 states, 40 states before enhancement), while ReachableStatesComputation was computing reachable states (2 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 795). Cancelled while BasicCegarLoop was constructing difference of abstraction (267states) and interpolant automaton (currently 4 states, 40 states before enhancement), while ReachableStatesComputation was computing reachable states (2 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 794). Cancelled while BasicCegarLoop was constructing difference of abstraction (267states) and interpolant automaton (currently 4 states, 40 states before enhancement), while ReachableStatesComputation was computing reachable states (2 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 794). Cancelled while BasicCegarLoop was constructing difference of abstraction (267states) and interpolant automaton (currently 4 states, 40 states before enhancement), while ReachableStatesComputation was computing reachable states (2 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 795). Cancelled while BasicCegarLoop was constructing difference of abstraction (267states) and interpolant automaton (currently 4 states, 40 states before enhancement), while ReachableStatesComputation was computing reachable states (2 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 794). Cancelled while BasicCegarLoop was constructing difference of abstraction (267states) and interpolant automaton (currently 4 states, 40 states before enhancement), while ReachableStatesComputation was computing reachable states (2 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 871). Cancelled while BasicCegarLoop was constructing difference of abstraction (267states) and interpolant automaton (currently 4 states, 40 states before enhancement), while ReachableStatesComputation was computing reachable states (2 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 865]: Timeout (TraceAbstraction) Unable to prove that all allocated memory was freed (line 865). Cancelled while BasicCegarLoop was constructing difference of abstraction (267states) and interpolant automaton (currently 4 states, 40 states before enhancement), while ReachableStatesComputation was computing reachable states (2 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 871). Cancelled while BasicCegarLoop was constructing difference of abstraction (267states) and interpolant automaton (currently 4 states, 40 states before enhancement), while ReachableStatesComputation was computing reachable states (2 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 786). Cancelled while BasicCegarLoop was constructing difference of abstraction (267states) and interpolant automaton (currently 4 states, 40 states before enhancement), while ReachableStatesComputation was computing reachable states (2 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 785). Cancelled while BasicCegarLoop was constructing difference of abstraction (267states) and interpolant automaton (currently 4 states, 40 states before enhancement), while ReachableStatesComputation was computing reachable states (2 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 786). Cancelled while BasicCegarLoop was constructing difference of abstraction (267states) and interpolant automaton (currently 4 states, 40 states before enhancement), while ReachableStatesComputation was computing reachable states (2 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 785). Cancelled while BasicCegarLoop was constructing difference of abstraction (267states) and interpolant automaton (currently 4 states, 40 states before enhancement), while ReachableStatesComputation was computing reachable states (2 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 785). Cancelled while BasicCegarLoop was constructing difference of abstraction (267states) and interpolant automaton (currently 4 states, 40 states before enhancement), while ReachableStatesComputation was computing reachable states (2 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 785). Cancelled while BasicCegarLoop was constructing difference of abstraction (267states) and interpolant automaton (currently 4 states, 40 states before enhancement), while ReachableStatesComputation was computing reachable states (2 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 804). Cancelled while BasicCegarLoop was constructing difference of abstraction (267states) and interpolant automaton (currently 4 states, 40 states before enhancement), while ReachableStatesComputation was computing reachable states (2 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 803). Cancelled while BasicCegarLoop was constructing difference of abstraction (267states) and interpolant automaton (currently 4 states, 40 states before enhancement), while ReachableStatesComputation was computing reachable states (2 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 803). Cancelled while BasicCegarLoop was constructing difference of abstraction (267states) and interpolant automaton (currently 4 states, 40 states before enhancement), while ReachableStatesComputation was computing reachable states (2 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 803). Cancelled while BasicCegarLoop was constructing difference of abstraction (267states) and interpolant automaton (currently 4 states, 40 states before enhancement), while ReachableStatesComputation was computing reachable states (2 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 803). Cancelled while BasicCegarLoop was constructing difference of abstraction (267states) and interpolant automaton (currently 4 states, 40 states before enhancement), while ReachableStatesComputation was computing reachable states (2 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 804). Cancelled while BasicCegarLoop was constructing difference of abstraction (267states) and interpolant automaton (currently 4 states, 40 states before enhancement), while ReachableStatesComputation was computing reachable states (2 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 860). Cancelled while BasicCegarLoop was constructing difference of abstraction (267states) and interpolant automaton (currently 4 states, 40 states before enhancement), while ReachableStatesComputation was computing reachable states (2 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 859). Cancelled while BasicCegarLoop was constructing difference of abstraction (267states) and interpolant automaton (currently 4 states, 40 states before enhancement), while ReachableStatesComputation was computing reachable states (2 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 858). Cancelled while BasicCegarLoop was constructing difference of abstraction (267states) and interpolant automaton (currently 4 states, 40 states before enhancement), while ReachableStatesComputation was computing reachable states (2 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 858). Cancelled while BasicCegarLoop was constructing difference of abstraction (267states) and interpolant automaton (currently 4 states, 40 states before enhancement), while ReachableStatesComputation was computing reachable states (2 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 860). Cancelled while BasicCegarLoop was constructing difference of abstraction (267states) and interpolant automaton (currently 4 states, 40 states before enhancement), while ReachableStatesComputation was computing reachable states (2 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 859). Cancelled while BasicCegarLoop was constructing difference of abstraction (267states) and interpolant automaton (currently 4 states, 40 states before enhancement), while ReachableStatesComputation was computing reachable states (2 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 742). Cancelled while BasicCegarLoop was constructing difference of abstraction (267states) and interpolant automaton (currently 4 states, 40 states before enhancement), while ReachableStatesComputation was computing reachable states (2 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 742). Cancelled while BasicCegarLoop was constructing difference of abstraction (267states) and interpolant automaton (currently 4 states, 40 states before enhancement), while ReachableStatesComputation was computing reachable states (2 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 776). Cancelled while BasicCegarLoop was constructing difference of abstraction (267states) and interpolant automaton (currently 4 states, 40 states before enhancement), while ReachableStatesComputation was computing reachable states (2 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 776). Cancelled while BasicCegarLoop was constructing difference of abstraction (267states) and interpolant automaton (currently 4 states, 40 states before enhancement), while ReachableStatesComputation was computing reachable states (2 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 776). Cancelled while BasicCegarLoop was constructing difference of abstraction (267states) and interpolant automaton (currently 4 states, 40 states before enhancement), while ReachableStatesComputation was computing reachable states (2 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 777). Cancelled while BasicCegarLoop was constructing difference of abstraction (267states) and interpolant automaton (currently 4 states, 40 states before enhancement), while ReachableStatesComputation was computing reachable states (2 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 776). Cancelled while BasicCegarLoop was constructing difference of abstraction (267states) and interpolant automaton (currently 4 states, 40 states before enhancement), while ReachableStatesComputation was computing reachable states (2 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 775). Cancelled while BasicCegarLoop was constructing difference of abstraction (267states) and interpolant automaton (currently 4 states, 40 states before enhancement), while ReachableStatesComputation was computing reachable states (2 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 775). Cancelled while BasicCegarLoop was constructing difference of abstraction (267states) and interpolant automaton (currently 4 states, 40 states before enhancement), while ReachableStatesComputation was computing reachable states (2 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 777). Cancelled while BasicCegarLoop was constructing difference of abstraction (267states) and interpolant automaton (currently 4 states, 40 states before enhancement), while ReachableStatesComputation was computing reachable states (2 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 867). Cancelled while BasicCegarLoop was constructing difference of abstraction (267states) and interpolant automaton (currently 4 states, 40 states before enhancement), while ReachableStatesComputation was computing reachable states (2 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 867). Cancelled while BasicCegarLoop was constructing difference of abstraction (267states) and interpolant automaton (currently 4 states, 40 states before enhancement), while ReachableStatesComputation was computing reachable states (2 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 849). Cancelled while BasicCegarLoop was constructing difference of abstraction (267states) and interpolant automaton (currently 4 states, 40 states before enhancement), while ReachableStatesComputation was computing reachable states (2 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 850). Cancelled while BasicCegarLoop was constructing difference of abstraction (267states) and interpolant automaton (currently 4 states, 40 states before enhancement), while ReachableStatesComputation was computing reachable states (2 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 848). Cancelled while BasicCegarLoop was constructing difference of abstraction (267states) and interpolant automaton (currently 4 states, 40 states before enhancement), while ReachableStatesComputation was computing reachable states (2 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 848). Cancelled while BasicCegarLoop was constructing difference of abstraction (267states) and interpolant automaton (currently 4 states, 40 states before enhancement), while ReachableStatesComputation was computing reachable states (2 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 850). Cancelled while BasicCegarLoop was constructing difference of abstraction (267states) and interpolant automaton (currently 4 states, 40 states before enhancement), while ReachableStatesComputation was computing reachable states (2 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 849). Cancelled while BasicCegarLoop was constructing difference of abstraction (267states) and interpolant automaton (currently 4 states, 40 states before enhancement), while ReachableStatesComputation was computing reachable states (2 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 838). Cancelled while BasicCegarLoop was constructing difference of abstraction (267states) and interpolant automaton (currently 4 states, 40 states before enhancement), while ReachableStatesComputation was computing reachable states (2 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 838). Cancelled while BasicCegarLoop was constructing difference of abstraction (267states) and interpolant automaton (currently 4 states, 40 states before enhancement), while ReachableStatesComputation was computing reachable states (2 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 839). Cancelled while BasicCegarLoop was constructing difference of abstraction (267states) and interpolant automaton (currently 4 states, 40 states before enhancement), while ReachableStatesComputation was computing reachable states (2 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 840). Cancelled while BasicCegarLoop was constructing difference of abstraction (267states) and interpolant automaton (currently 4 states, 40 states before enhancement), while ReachableStatesComputation was computing reachable states (2 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 840). Cancelled while BasicCegarLoop was constructing difference of abstraction (267states) and interpolant automaton (currently 4 states, 40 states before enhancement), while ReachableStatesComputation was computing reachable states (2 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 839). Cancelled while BasicCegarLoop was constructing difference of abstraction (267states) and interpolant automaton (currently 4 states, 40 states before enhancement), while ReachableStatesComputation was computing reachable states (2 states constructedinput type IntersectNwa). - StatisticsResult: Ultimate Automizer benchmark data CFG has 16 procedures, 231 locations, 71 error locations. TIMEOUT Result, 207.9s OverallTime, 43 OverallIterations, 69 TraceHistogramMax, 163.7s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 8547 SDtfs, 6647 SDslu, 84033 SDs, 0 SdLazy, 93526 SolverSat, 2505 SolverUnsat, 59 SolverUnknown, 0 SolverNotchecked, 141.6s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 2856 GetRequests, 1414 SyntacticMatches, 0 SemanticMatches, 1442 ConstructedPredicates, 5 IntricatePredicates, 0 DeprecatedPredicates, 6975 ImplicationChecksByTransitivity, 46.8s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=267occurred in iteration=42, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 62255/68020 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.2s AutomataMinimizationTime, 42 MinimizatonAttempts, 1784 StatesRemovedByMinimization, 42 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.8s SsaConstructionTime, 0.9s SatisfiabilityAnalysisTime, 40.4s InterpolantComputationTime, 7278 NumberOfCodeBlocks, 7278 NumberOfCodeBlocksAsserted, 43 NumberOfCheckSat, 7235 ConstructedInterpolants, 8 QuantifiedInterpolants, 3981636 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 43 InterpolantComputations, 6 PerfectInterpolantSequences, 62255/68020 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: Timeout Written .csv to /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/test-0234_true-valid-memsafety.i_svcomp-DerefFreeMemtrack-32bit-Automizer_z3.epf_AutomizerC.xml/Csv-Benchmark-0-2018-02-04_20-33-58-291.csv Written .csv to /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/test-0234_true-valid-memsafety.i_svcomp-DerefFreeMemtrack-32bit-Automizer_z3.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-0-2018-02-04_20-33-58-291.csv Completed graceful shutdown