java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv --cacsl2boogietranslator.bitprecise.bitfields false -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/cade18-smtinterpol/svcomp-DerefFreeMemtrack-32bit-Automizer_Camel.epf -i ../../../trunk/examples/svcomp/memsafety-ext2/optional_data_creation_test04_true-valid-memsafety.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-666feb3-m [2018-04-11 11:07:08,130 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-04-11 11:07:08,132 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-04-11 11:07:08,144 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-04-11 11:07:08,144 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-04-11 11:07:08,145 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-04-11 11:07:08,146 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-04-11 11:07:08,148 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-04-11 11:07:08,150 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-04-11 11:07:08,150 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-04-11 11:07:08,151 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-04-11 11:07:08,151 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-04-11 11:07:08,152 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-04-11 11:07:08,153 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-04-11 11:07:08,154 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-04-11 11:07:08,156 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-04-11 11:07:08,157 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-04-11 11:07:08,159 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-04-11 11:07:08,160 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-04-11 11:07:08,161 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-04-11 11:07:08,163 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2018-04-11 11:07:08,168 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-04-11 11:07:08,168 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-04-11 11:07:08,169 INFO L98 SettingsManager]: Beginning loading settings from /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/cade18-smtinterpol/svcomp-DerefFreeMemtrack-32bit-Automizer_Camel.epf [2018-04-11 11:07:08,188 INFO L110 SettingsManager]: Loading preferences was successful [2018-04-11 11:07:08,189 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-04-11 11:07:08,190 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-04-11 11:07:08,190 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-04-11 11:07:08,190 INFO L133 SettingsManager]: * Use SBE=true [2018-04-11 11:07:08,190 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-04-11 11:07:08,190 INFO L133 SettingsManager]: * sizeof long=4 [2018-04-11 11:07:08,190 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-04-11 11:07:08,190 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-04-11 11:07:08,190 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-04-11 11:07:08,190 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-04-11 11:07:08,190 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-04-11 11:07:08,191 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-04-11 11:07:08,191 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-04-11 11:07:08,191 INFO L133 SettingsManager]: * sizeof long double=12 [2018-04-11 11:07:08,191 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-04-11 11:07:08,191 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-04-11 11:07:08,191 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-04-11 11:07:08,191 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-04-11 11:07:08,191 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-04-11 11:07:08,191 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-04-11 11:07:08,191 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-04-11 11:07:08,192 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-04-11 11:07:08,192 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Bitprecise bitfields -> false [2018-04-11 11:07:08,217 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-04-11 11:07:08,225 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully (re)initialized [2018-04-11 11:07:08,227 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-04-11 11:07:08,228 INFO L271 PluginConnector]: Initializing CDTParser... [2018-04-11 11:07:08,228 INFO L276 PluginConnector]: CDTParser initialized [2018-04-11 11:07:08,229 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/memsafety-ext2/optional_data_creation_test04_true-valid-memsafety.i [2018-04-11 11:07:08,504 INFO L225 CDTParser]: Created temporary CDT project at /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/data/FLAGc4012250b [2018-04-11 11:07:08,676 INFO L287 CDTParser]: IsIndexed: true [2018-04-11 11:07:08,677 INFO L288 CDTParser]: Found 1 translation units. [2018-04-11 11:07:08,677 INFO L168 CDTParser]: Scanning optional_data_creation_test04_true-valid-memsafety.i [2018-04-11 11:07:08,684 INFO L210 ultiparseSymbolTable]: Include resolver: [2018-04-11 11:07:08,684 INFO L215 ultiparseSymbolTable]: [2018-04-11 11:07:08,684 INFO L218 ultiparseSymbolTable]: Function table: [2018-04-11 11:07:08,684 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeData ('freeData') in optional_data_creation_test04_true-valid-memsafety.i [2018-04-11 11:07:08,685 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____bswap_64 ('__bswap_64') in optional_data_creation_test04_true-valid-memsafety.i [2018-04-11 11:07:08,685 INFO L221 ultiparseSymbolTable]: Function definition of null ('main') in optional_data_creation_test04_true-valid-memsafety.i [2018-04-11 11:07:08,685 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____bswap_32 ('__bswap_32') in optional_data_creation_test04_true-valid-memsafety.i [2018-04-11 11:07:08,685 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_data ('create_data') in optional_data_creation_test04_true-valid-memsafety.i [2018-04-11 11:07:08,685 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append ('append') in optional_data_creation_test04_true-valid-memsafety.i [2018-04-11 11:07:08,685 INFO L227 ultiparseSymbolTable]: Global variable table: [2018-04-11 11:07:08,685 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____useconds_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-11 11:07:08,685 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____u_int in optional_data_creation_test04_true-valid-memsafety.i [2018-04-11 11:07:08,685 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__pthread_condattr_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-11 11:07:08,686 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__dev_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-11 11:07:08,686 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____uint8_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-11 11:07:08,686 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____key_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-11 11:07:08,686 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__uint in optional_data_creation_test04_true-valid-memsafety.i [2018-04-11 11:07:08,686 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__loff_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-11 11:07:08,686 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__nlink_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-11 11:07:08,686 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__pthread_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-11 11:07:08,686 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__u_int8_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-11 11:07:08,686 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__quad_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-11 11:07:08,686 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____fd_mask in optional_data_creation_test04_true-valid-memsafety.i [2018-04-11 11:07:08,687 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____int64_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-11 11:07:08,687 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____clockid_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-11 11:07:08,687 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__clockid_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-11 11:07:08,687 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____sig_atomic_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-11 11:07:08,687 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__pthread_attr_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-11 11:07:08,687 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__wchar_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-11 11:07:08,687 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__suseconds_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-11 11:07:08,687 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____uint64_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-11 11:07:08,687 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__pthread_once_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-11 11:07:08,687 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____fsword_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-11 11:07:08,688 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____syscall_slong_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-11 11:07:08,688 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__fd_mask in optional_data_creation_test04_true-valid-memsafety.i [2018-04-11 11:07:08,688 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____blkcnt_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-11 11:07:08,688 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____uid_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-11 11:07:08,688 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__ssize_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-11 11:07:08,688 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__u_int16_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-11 11:07:08,688 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__pthread_cond_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-11 11:07:08,688 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__pthread_spinlock_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-11 11:07:08,688 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____ino64_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-11 11:07:08,688 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____sigset_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-11 11:07:08,688 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____ino_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-11 11:07:08,688 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__id_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-11 11:07:08,688 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____blkcnt64_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-11 11:07:08,689 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__pthread_rwlockattr_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-11 11:07:08,689 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____int16_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-11 11:07:08,689 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__u_char in optional_data_creation_test04_true-valid-memsafety.i [2018-04-11 11:07:08,689 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__off_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-11 11:07:08,689 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____off_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-11 11:07:08,689 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__blkcnt_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-11 11:07:08,689 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__fsfilcnt_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-11 11:07:08,689 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____ssize_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-11 11:07:08,689 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__timer_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-11 11:07:08,689 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__pthread_barrier_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-11 11:07:08,689 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____nlink_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-11 11:07:08,689 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__int32_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-11 11:07:08,689 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____socklen_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-11 11:07:08,689 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__pthread_mutexattr_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-11 11:07:08,689 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____pid_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-11 11:07:08,689 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__key_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-11 11:07:08,689 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____u_quad_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-11 11:07:08,689 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____off64_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-11 11:07:08,690 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__u_int32_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-11 11:07:08,690 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____fsblkcnt64_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-11 11:07:08,690 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____u_char in optional_data_creation_test04_true-valid-memsafety.i [2018-04-11 11:07:08,690 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____gid_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-11 11:07:08,690 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____quad_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-11 11:07:08,690 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____syscall_ulong_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-11 11:07:08,690 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____id_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-11 11:07:08,690 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____timer_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-11 11:07:08,690 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__u_int in optional_data_creation_test04_true-valid-memsafety.i [2018-04-11 11:07:08,690 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____rlim64_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-11 11:07:08,690 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____uint32_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-11 11:07:08,690 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__fsblkcnt_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-11 11:07:08,690 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____suseconds_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-11 11:07:08,690 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__pthread_rwlock_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-11 11:07:08,690 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__div_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-11 11:07:08,691 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__time_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-11 11:07:08,691 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____pthread_slist_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-11 11:07:08,691 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____int32_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-11 11:07:08,691 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____dev_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-11 11:07:08,691 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____fsblkcnt_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-11 11:07:08,691 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__mode_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-11 11:07:08,691 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__int16_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-11 11:07:08,691 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__pthread_key_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-11 11:07:08,691 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__Data in optional_data_creation_test04_true-valid-memsafety.i [2018-04-11 11:07:08,691 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____caddr_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-11 11:07:08,692 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__fd_set in optional_data_creation_test04_true-valid-memsafety.i [2018-04-11 11:07:08,692 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__lldiv_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-11 11:07:08,692 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____rlim_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-11 11:07:08,692 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__uid_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-11 11:07:08,692 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____u_short in optional_data_creation_test04_true-valid-memsafety.i [2018-04-11 11:07:08,692 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____intptr_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-11 11:07:08,692 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__size_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-11 11:07:08,692 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____mode_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-11 11:07:08,692 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__blksize_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-11 11:07:08,692 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__caddr_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-11 11:07:08,692 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____u_long in optional_data_creation_test04_true-valid-memsafety.i [2018-04-11 11:07:08,692 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__sigset_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-11 11:07:08,692 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__ldiv_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-11 11:07:08,693 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__u_short in optional_data_creation_test04_true-valid-memsafety.i [2018-04-11 11:07:08,693 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__ino_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-11 11:07:08,693 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__daddr_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-11 11:07:08,693 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__u_int64_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-11 11:07:08,693 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____fsid_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-11 11:07:08,693 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__gid_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-11 11:07:08,693 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__register_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-11 11:07:08,693 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__ulong in optional_data_creation_test04_true-valid-memsafety.i [2018-04-11 11:07:08,693 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__pthread_barrierattr_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-11 11:07:08,693 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____int8_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-11 11:07:08,693 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__u_long in optional_data_creation_test04_true-valid-memsafety.i [2018-04-11 11:07:08,693 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__pid_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-11 11:07:08,693 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____fsfilcnt64_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-11 11:07:08,694 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__clock_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-11 11:07:08,694 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____fsfilcnt_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-11 11:07:08,694 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__pthread_mutex_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-11 11:07:08,694 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____time_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-11 11:07:08,694 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____loff_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-11 11:07:08,694 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__fsid_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-11 11:07:08,694 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__u_quad_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-11 11:07:08,694 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__ushort in optional_data_creation_test04_true-valid-memsafety.i [2018-04-11 11:07:08,694 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____blksize_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-11 11:07:08,694 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____clock_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-11 11:07:08,694 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__int8_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-11 11:07:08,694 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____uint16_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-11 11:07:08,694 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____daddr_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-11 11:07:08,694 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__int64_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-11 11:07:08,694 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____qaddr_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-11 11:07:08,706 INFO L330 CDTParser]: Deleted temporary CDT project at /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/data/FLAGc4012250b [2018-04-11 11:07:08,709 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-04-11 11:07:08,710 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-04-11 11:07:08,710 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-04-11 11:07:08,710 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-04-11 11:07:08,714 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-04-11 11:07:08,714 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 11.04 11:07:08" (1/1) ... [2018-04-11 11:07:08,716 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@15f65382 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 11.04 11:07:08, skipping insertion in model container [2018-04-11 11:07:08,716 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 11.04 11:07:08" (1/1) ... [2018-04-11 11:07:08,726 INFO L167 Dispatcher]: Using SV-COMP mode [2018-04-11 11:07:08,749 INFO L167 Dispatcher]: Using SV-COMP mode [2018-04-11 11:07:08,871 INFO L175 PostProcessor]: Settings: Checked method=main [2018-04-11 11:07:08,909 INFO L175 PostProcessor]: Settings: Checked method=main [2018-04-11 11:07:08,915 INFO L100 SccComputation]: Graph consists of 0 InCaSumBalls and 120 non ball SCCs. Number of states in SCCs 120. [2018-04-11 11:07:08,947 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 11.04 11:07:08 WrapperNode [2018-04-11 11:07:08,947 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-04-11 11:07:08,947 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-04-11 11:07:08,948 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-04-11 11:07:08,948 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-04-11 11:07:08,957 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 11.04 11:07:08" (1/1) ... [2018-04-11 11:07:08,957 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 11.04 11:07:08" (1/1) ... [2018-04-11 11:07:08,968 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 11.04 11:07:08" (1/1) ... [2018-04-11 11:07:08,968 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 11.04 11:07:08" (1/1) ... [2018-04-11 11:07:08,978 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 11.04 11:07:08" (1/1) ... [2018-04-11 11:07:08,983 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 11.04 11:07:08" (1/1) ... [2018-04-11 11:07:08,985 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 11.04 11:07:08" (1/1) ... [2018-04-11 11:07:08,989 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-04-11 11:07:08,989 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-04-11 11:07:08,989 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-04-11 11:07:08,989 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-04-11 11:07:08,990 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 11.04 11:07:08" (1/1) ... No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-04-11 11:07:09,074 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-04-11 11:07:09,074 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-04-11 11:07:09,075 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____bswap_32 [2018-04-11 11:07:09,075 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____bswap_64 [2018-04-11 11:07:09,075 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_data [2018-04-11 11:07:09,075 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeData [2018-04-11 11:07:09,075 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append [2018-04-11 11:07:09,075 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-04-11 11:07:09,075 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_error [2018-04-11 11:07:09,075 INFO L128 BoogieDeclarations]: Found specification of procedure __ctype_get_mb_cur_max [2018-04-11 11:07:09,075 INFO L128 BoogieDeclarations]: Found specification of procedure atof [2018-04-11 11:07:09,075 INFO L128 BoogieDeclarations]: Found specification of procedure atoi [2018-04-11 11:07:09,075 INFO L128 BoogieDeclarations]: Found specification of procedure atol [2018-04-11 11:07:09,075 INFO L128 BoogieDeclarations]: Found specification of procedure atoll [2018-04-11 11:07:09,075 INFO L128 BoogieDeclarations]: Found specification of procedure strtod [2018-04-11 11:07:09,075 INFO L128 BoogieDeclarations]: Found specification of procedure strtof [2018-04-11 11:07:09,075 INFO L128 BoogieDeclarations]: Found specification of procedure strtold [2018-04-11 11:07:09,075 INFO L128 BoogieDeclarations]: Found specification of procedure strtol [2018-04-11 11:07:09,075 INFO L128 BoogieDeclarations]: Found specification of procedure strtoul [2018-04-11 11:07:09,075 INFO L128 BoogieDeclarations]: Found specification of procedure strtoq [2018-04-11 11:07:09,076 INFO L128 BoogieDeclarations]: Found specification of procedure strtouq [2018-04-11 11:07:09,076 INFO L128 BoogieDeclarations]: Found specification of procedure strtoll [2018-04-11 11:07:09,076 INFO L128 BoogieDeclarations]: Found specification of procedure strtoull [2018-04-11 11:07:09,076 INFO L128 BoogieDeclarations]: Found specification of procedure l64a [2018-04-11 11:07:09,076 INFO L128 BoogieDeclarations]: Found specification of procedure a64l [2018-04-11 11:07:09,076 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____bswap_32 [2018-04-11 11:07:09,076 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____bswap_64 [2018-04-11 11:07:09,076 INFO L128 BoogieDeclarations]: Found specification of procedure select [2018-04-11 11:07:09,076 INFO L128 BoogieDeclarations]: Found specification of procedure pselect [2018-04-11 11:07:09,076 INFO L128 BoogieDeclarations]: Found specification of procedure gnu_dev_major [2018-04-11 11:07:09,076 INFO L128 BoogieDeclarations]: Found specification of procedure gnu_dev_minor [2018-04-11 11:07:09,076 INFO L128 BoogieDeclarations]: Found specification of procedure gnu_dev_makedev [2018-04-11 11:07:09,076 INFO L128 BoogieDeclarations]: Found specification of procedure random [2018-04-11 11:07:09,076 INFO L128 BoogieDeclarations]: Found specification of procedure srandom [2018-04-11 11:07:09,076 INFO L128 BoogieDeclarations]: Found specification of procedure initstate [2018-04-11 11:07:09,076 INFO L128 BoogieDeclarations]: Found specification of procedure setstate [2018-04-11 11:07:09,076 INFO L128 BoogieDeclarations]: Found specification of procedure random_r [2018-04-11 11:07:09,076 INFO L128 BoogieDeclarations]: Found specification of procedure srandom_r [2018-04-11 11:07:09,077 INFO L128 BoogieDeclarations]: Found specification of procedure initstate_r [2018-04-11 11:07:09,077 INFO L128 BoogieDeclarations]: Found specification of procedure setstate_r [2018-04-11 11:07:09,077 INFO L128 BoogieDeclarations]: Found specification of procedure rand [2018-04-11 11:07:09,077 INFO L128 BoogieDeclarations]: Found specification of procedure srand [2018-04-11 11:07:09,077 INFO L128 BoogieDeclarations]: Found specification of procedure rand_r [2018-04-11 11:07:09,077 INFO L128 BoogieDeclarations]: Found specification of procedure drand48 [2018-04-11 11:07:09,077 INFO L128 BoogieDeclarations]: Found specification of procedure erand48 [2018-04-11 11:07:09,077 INFO L128 BoogieDeclarations]: Found specification of procedure lrand48 [2018-04-11 11:07:09,077 INFO L128 BoogieDeclarations]: Found specification of procedure nrand48 [2018-04-11 11:07:09,077 INFO L128 BoogieDeclarations]: Found specification of procedure mrand48 [2018-04-11 11:07:09,077 INFO L128 BoogieDeclarations]: Found specification of procedure jrand48 [2018-04-11 11:07:09,077 INFO L128 BoogieDeclarations]: Found specification of procedure srand48 [2018-04-11 11:07:09,077 INFO L128 BoogieDeclarations]: Found specification of procedure seed48 [2018-04-11 11:07:09,077 INFO L128 BoogieDeclarations]: Found specification of procedure lcong48 [2018-04-11 11:07:09,077 INFO L128 BoogieDeclarations]: Found specification of procedure drand48_r [2018-04-11 11:07:09,077 INFO L128 BoogieDeclarations]: Found specification of procedure erand48_r [2018-04-11 11:07:09,077 INFO L128 BoogieDeclarations]: Found specification of procedure lrand48_r [2018-04-11 11:07:09,077 INFO L128 BoogieDeclarations]: Found specification of procedure nrand48_r [2018-04-11 11:07:09,077 INFO L128 BoogieDeclarations]: Found specification of procedure mrand48_r [2018-04-11 11:07:09,078 INFO L128 BoogieDeclarations]: Found specification of procedure jrand48_r [2018-04-11 11:07:09,078 INFO L128 BoogieDeclarations]: Found specification of procedure srand48_r [2018-04-11 11:07:09,078 INFO L128 BoogieDeclarations]: Found specification of procedure seed48_r [2018-04-11 11:07:09,078 INFO L128 BoogieDeclarations]: Found specification of procedure lcong48_r [2018-04-11 11:07:09,078 INFO L128 BoogieDeclarations]: Found specification of procedure malloc [2018-04-11 11:07:09,078 INFO L128 BoogieDeclarations]: Found specification of procedure calloc [2018-04-11 11:07:09,078 INFO L128 BoogieDeclarations]: Found specification of procedure realloc [2018-04-11 11:07:09,078 INFO L128 BoogieDeclarations]: Found specification of procedure free [2018-04-11 11:07:09,078 INFO L128 BoogieDeclarations]: Found specification of procedure cfree [2018-04-11 11:07:09,078 INFO L128 BoogieDeclarations]: Found specification of procedure alloca [2018-04-11 11:07:09,078 INFO L128 BoogieDeclarations]: Found specification of procedure valloc [2018-04-11 11:07:09,078 INFO L128 BoogieDeclarations]: Found specification of procedure posix_memalign [2018-04-11 11:07:09,078 INFO L128 BoogieDeclarations]: Found specification of procedure aligned_alloc [2018-04-11 11:07:09,078 INFO L128 BoogieDeclarations]: Found specification of procedure abort [2018-04-11 11:07:09,078 INFO L128 BoogieDeclarations]: Found specification of procedure atexit [2018-04-11 11:07:09,078 INFO L128 BoogieDeclarations]: Found specification of procedure at_quick_exit [2018-04-11 11:07:09,078 INFO L128 BoogieDeclarations]: Found specification of procedure on_exit [2018-04-11 11:07:09,078 INFO L128 BoogieDeclarations]: Found specification of procedure exit [2018-04-11 11:07:09,079 INFO L128 BoogieDeclarations]: Found specification of procedure quick_exit [2018-04-11 11:07:09,079 INFO L128 BoogieDeclarations]: Found specification of procedure _Exit [2018-04-11 11:07:09,079 INFO L128 BoogieDeclarations]: Found specification of procedure getenv [2018-04-11 11:07:09,079 INFO L128 BoogieDeclarations]: Found specification of procedure putenv [2018-04-11 11:07:09,079 INFO L128 BoogieDeclarations]: Found specification of procedure setenv [2018-04-11 11:07:09,079 INFO L128 BoogieDeclarations]: Found specification of procedure unsetenv [2018-04-11 11:07:09,079 INFO L128 BoogieDeclarations]: Found specification of procedure clearenv [2018-04-11 11:07:09,079 INFO L128 BoogieDeclarations]: Found specification of procedure mktemp [2018-04-11 11:07:09,079 INFO L128 BoogieDeclarations]: Found specification of procedure mkstemp [2018-04-11 11:07:09,079 INFO L128 BoogieDeclarations]: Found specification of procedure mkstemps [2018-04-11 11:07:09,079 INFO L128 BoogieDeclarations]: Found specification of procedure mkdtemp [2018-04-11 11:07:09,079 INFO L128 BoogieDeclarations]: Found specification of procedure system [2018-04-11 11:07:09,079 INFO L128 BoogieDeclarations]: Found specification of procedure realpath [2018-04-11 11:07:09,079 INFO L128 BoogieDeclarations]: Found specification of procedure bsearch [2018-04-11 11:07:09,079 INFO L128 BoogieDeclarations]: Found specification of procedure qsort [2018-04-11 11:07:09,079 INFO L128 BoogieDeclarations]: Found specification of procedure abs [2018-04-11 11:07:09,080 INFO L128 BoogieDeclarations]: Found specification of procedure labs [2018-04-11 11:07:09,080 INFO L128 BoogieDeclarations]: Found specification of procedure llabs [2018-04-11 11:07:09,080 INFO L128 BoogieDeclarations]: Found specification of procedure div [2018-04-11 11:07:09,080 INFO L128 BoogieDeclarations]: Found specification of procedure ldiv [2018-04-11 11:07:09,080 INFO L128 BoogieDeclarations]: Found specification of procedure lldiv [2018-04-11 11:07:09,080 INFO L128 BoogieDeclarations]: Found specification of procedure ecvt [2018-04-11 11:07:09,080 INFO L128 BoogieDeclarations]: Found specification of procedure fcvt [2018-04-11 11:07:09,080 INFO L128 BoogieDeclarations]: Found specification of procedure gcvt [2018-04-11 11:07:09,080 INFO L128 BoogieDeclarations]: Found specification of procedure qecvt [2018-04-11 11:07:09,080 INFO L128 BoogieDeclarations]: Found specification of procedure qfcvt [2018-04-11 11:07:09,080 INFO L128 BoogieDeclarations]: Found specification of procedure qgcvt [2018-04-11 11:07:09,080 INFO L128 BoogieDeclarations]: Found specification of procedure ecvt_r [2018-04-11 11:07:09,080 INFO L128 BoogieDeclarations]: Found specification of procedure fcvt_r [2018-04-11 11:07:09,080 INFO L128 BoogieDeclarations]: Found specification of procedure qecvt_r [2018-04-11 11:07:09,080 INFO L128 BoogieDeclarations]: Found specification of procedure qfcvt_r [2018-04-11 11:07:09,080 INFO L128 BoogieDeclarations]: Found specification of procedure mblen [2018-04-11 11:07:09,080 INFO L128 BoogieDeclarations]: Found specification of procedure mbtowc [2018-04-11 11:07:09,081 INFO L128 BoogieDeclarations]: Found specification of procedure wctomb [2018-04-11 11:07:09,081 INFO L128 BoogieDeclarations]: Found specification of procedure mbstowcs [2018-04-11 11:07:09,081 INFO L128 BoogieDeclarations]: Found specification of procedure wcstombs [2018-04-11 11:07:09,081 INFO L128 BoogieDeclarations]: Found specification of procedure rpmatch [2018-04-11 11:07:09,081 INFO L128 BoogieDeclarations]: Found specification of procedure getsubopt [2018-04-11 11:07:09,081 INFO L128 BoogieDeclarations]: Found specification of procedure getloadavg [2018-04-11 11:07:09,081 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2018-04-11 11:07:09,081 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_data [2018-04-11 11:07:09,081 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-04-11 11:07:09,081 INFO L128 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2018-04-11 11:07:09,081 INFO L128 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2018-04-11 11:07:09,081 INFO L128 BoogieDeclarations]: Found specification of procedure write~int [2018-04-11 11:07:09,081 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeData [2018-04-11 11:07:09,081 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-04-11 11:07:09,081 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append [2018-04-11 11:07:09,081 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-04-11 11:07:09,081 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-04-11 11:07:09,081 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-04-11 11:07:09,081 INFO L128 BoogieDeclarations]: Found specification of procedure write~unchecked~int [2018-04-11 11:07:09,082 INFO L128 BoogieDeclarations]: Found specification of procedure read~int [2018-04-11 11:07:09,437 INFO L259 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-04-11 11:07:09,437 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 11.04 11:07:09 BoogieIcfgContainer [2018-04-11 11:07:09,437 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-04-11 11:07:09,438 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-04-11 11:07:09,438 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-04-11 11:07:09,439 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-04-11 11:07:09,439 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 11.04 11:07:08" (1/3) ... [2018-04-11 11:07:09,440 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2053b9bd and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 11.04 11:07:09, skipping insertion in model container [2018-04-11 11:07:09,440 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 11.04 11:07:08" (2/3) ... [2018-04-11 11:07:09,440 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2053b9bd and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 11.04 11:07:09, skipping insertion in model container [2018-04-11 11:07:09,440 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 11.04 11:07:09" (3/3) ... [2018-04-11 11:07:09,442 INFO L107 eAbstractionObserver]: Analyzing ICFG optional_data_creation_test04_true-valid-memsafety.i [2018-04-11 11:07:09,450 INFO L131 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-04-11 11:07:09,455 INFO L143 ceAbstractionStarter]: Appying trace abstraction to program that has 45 error locations. [2018-04-11 11:07:09,484 INFO L128 ementStrategyFactory]: Using default assertion order modulation [2018-04-11 11:07:09,484 INFO L369 AbstractCegarLoop]: Interprodecural is true [2018-04-11 11:07:09,484 INFO L370 AbstractCegarLoop]: Hoare is false [2018-04-11 11:07:09,484 INFO L371 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-04-11 11:07:09,484 INFO L372 AbstractCegarLoop]: Backedges is TWOTRACK [2018-04-11 11:07:09,484 INFO L373 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-04-11 11:07:09,485 INFO L374 AbstractCegarLoop]: Difference is false [2018-04-11 11:07:09,485 INFO L375 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-04-11 11:07:09,485 INFO L380 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-04-11 11:07:09,485 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-04-11 11:07:09,494 INFO L276 IsEmpty]: Start isEmpty. Operand 127 states. [2018-04-11 11:07:09,502 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 8 [2018-04-11 11:07:09,502 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 11:07:09,503 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1] [2018-04-11 11:07:09,503 INFO L408 AbstractCegarLoop]: === Iteration 1 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-11 11:07:09,506 INFO L82 PathProgramCache]: Analyzing trace with hash -1089139594, now seen corresponding path program 1 times [2018-04-11 11:07:09,508 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-11 11:07:09,508 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-11 11:07:09,546 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 11:07:09,546 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 11:07:09,547 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 11:07:09,575 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 11:07:09,580 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 11:07:09,618 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 11:07:09,620 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-11 11:07:09,621 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-04-11 11:07:09,622 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-04-11 11:07:09,633 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-04-11 11:07:09,633 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-04-11 11:07:09,635 INFO L87 Difference]: Start difference. First operand 127 states. Second operand 3 states. [2018-04-11 11:07:09,748 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 11:07:09,749 INFO L93 Difference]: Finished difference Result 129 states and 136 transitions. [2018-04-11 11:07:09,749 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-04-11 11:07:09,750 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 7 [2018-04-11 11:07:09,750 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 11:07:09,757 INFO L225 Difference]: With dead ends: 129 [2018-04-11 11:07:09,757 INFO L226 Difference]: Without dead ends: 126 [2018-04-11 11:07:09,758 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-04-11 11:07:09,769 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 126 states. [2018-04-11 11:07:09,786 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 126 to 123. [2018-04-11 11:07:09,788 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 123 states. [2018-04-11 11:07:09,789 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 123 states to 123 states and 130 transitions. [2018-04-11 11:07:09,790 INFO L78 Accepts]: Start accepts. Automaton has 123 states and 130 transitions. Word has length 7 [2018-04-11 11:07:09,790 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 11:07:09,791 INFO L459 AbstractCegarLoop]: Abstraction has 123 states and 130 transitions. [2018-04-11 11:07:09,791 INFO L460 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-04-11 11:07:09,791 INFO L276 IsEmpty]: Start isEmpty. Operand 123 states and 130 transitions. [2018-04-11 11:07:09,791 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 8 [2018-04-11 11:07:09,791 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 11:07:09,791 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1] [2018-04-11 11:07:09,791 INFO L408 AbstractCegarLoop]: === Iteration 2 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-11 11:07:09,792 INFO L82 PathProgramCache]: Analyzing trace with hash -1089139593, now seen corresponding path program 1 times [2018-04-11 11:07:09,792 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-11 11:07:09,792 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-11 11:07:09,793 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 11:07:09,793 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 11:07:09,793 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 11:07:09,803 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 11:07:09,804 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 11:07:09,829 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 11:07:09,829 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-11 11:07:09,829 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-04-11 11:07:09,830 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-04-11 11:07:09,831 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-04-11 11:07:09,831 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-04-11 11:07:09,831 INFO L87 Difference]: Start difference. First operand 123 states and 130 transitions. Second operand 3 states. [2018-04-11 11:07:09,913 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 11:07:09,913 INFO L93 Difference]: Finished difference Result 124 states and 132 transitions. [2018-04-11 11:07:09,913 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-04-11 11:07:09,913 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 7 [2018-04-11 11:07:09,914 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 11:07:09,915 INFO L225 Difference]: With dead ends: 124 [2018-04-11 11:07:09,915 INFO L226 Difference]: Without dead ends: 124 [2018-04-11 11:07:09,915 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-04-11 11:07:09,916 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 124 states. [2018-04-11 11:07:09,920 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 124 to 122. [2018-04-11 11:07:09,921 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 122 states. [2018-04-11 11:07:09,922 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 122 states to 122 states and 129 transitions. [2018-04-11 11:07:09,922 INFO L78 Accepts]: Start accepts. Automaton has 122 states and 129 transitions. Word has length 7 [2018-04-11 11:07:09,923 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 11:07:09,923 INFO L459 AbstractCegarLoop]: Abstraction has 122 states and 129 transitions. [2018-04-11 11:07:09,923 INFO L460 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-04-11 11:07:09,923 INFO L276 IsEmpty]: Start isEmpty. Operand 122 states and 129 transitions. [2018-04-11 11:07:09,923 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2018-04-11 11:07:09,923 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 11:07:09,923 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 11:07:09,924 INFO L408 AbstractCegarLoop]: === Iteration 3 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-11 11:07:09,924 INFO L82 PathProgramCache]: Analyzing trace with hash 1575434585, now seen corresponding path program 1 times [2018-04-11 11:07:09,924 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-11 11:07:09,924 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-11 11:07:09,925 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 11:07:09,925 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 11:07:09,925 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 11:07:09,940 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 11:07:09,941 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 11:07:09,990 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 11:07:09,991 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-11 11:07:09,991 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-04-11 11:07:09,991 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-04-11 11:07:09,991 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-04-11 11:07:09,992 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-04-11 11:07:09,992 INFO L87 Difference]: Start difference. First operand 122 states and 129 transitions. Second operand 5 states. [2018-04-11 11:07:10,120 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 11:07:10,121 INFO L93 Difference]: Finished difference Result 135 states and 143 transitions. [2018-04-11 11:07:10,121 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-04-11 11:07:10,121 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 14 [2018-04-11 11:07:10,121 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 11:07:10,122 INFO L225 Difference]: With dead ends: 135 [2018-04-11 11:07:10,122 INFO L226 Difference]: Without dead ends: 135 [2018-04-11 11:07:10,122 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-04-11 11:07:10,122 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 135 states. [2018-04-11 11:07:10,125 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 135 to 128. [2018-04-11 11:07:10,125 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 128 states. [2018-04-11 11:07:10,126 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 128 states to 128 states and 137 transitions. [2018-04-11 11:07:10,127 INFO L78 Accepts]: Start accepts. Automaton has 128 states and 137 transitions. Word has length 14 [2018-04-11 11:07:10,127 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 11:07:10,127 INFO L459 AbstractCegarLoop]: Abstraction has 128 states and 137 transitions. [2018-04-11 11:07:10,127 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-04-11 11:07:10,127 INFO L276 IsEmpty]: Start isEmpty. Operand 128 states and 137 transitions. [2018-04-11 11:07:10,127 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2018-04-11 11:07:10,127 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 11:07:10,127 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 11:07:10,127 INFO L408 AbstractCegarLoop]: === Iteration 4 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-11 11:07:10,127 INFO L82 PathProgramCache]: Analyzing trace with hash 1575434586, now seen corresponding path program 1 times [2018-04-11 11:07:10,127 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-11 11:07:10,127 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-11 11:07:10,128 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 11:07:10,128 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 11:07:10,128 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 11:07:10,138 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 11:07:10,138 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 11:07:10,216 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 11:07:10,217 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-11 11:07:10,217 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-04-11 11:07:10,217 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-04-11 11:07:10,217 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-04-11 11:07:10,217 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-04-11 11:07:10,217 INFO L87 Difference]: Start difference. First operand 128 states and 137 transitions. Second operand 7 states. [2018-04-11 11:07:10,365 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 11:07:10,365 INFO L93 Difference]: Finished difference Result 133 states and 142 transitions. [2018-04-11 11:07:10,365 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-04-11 11:07:10,365 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 14 [2018-04-11 11:07:10,365 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 11:07:10,366 INFO L225 Difference]: With dead ends: 133 [2018-04-11 11:07:10,366 INFO L226 Difference]: Without dead ends: 133 [2018-04-11 11:07:10,366 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=38, Unknown=0, NotChecked=0, Total=56 [2018-04-11 11:07:10,366 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 133 states. [2018-04-11 11:07:10,370 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 133 to 128. [2018-04-11 11:07:10,370 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 128 states. [2018-04-11 11:07:10,371 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 128 states to 128 states and 136 transitions. [2018-04-11 11:07:10,371 INFO L78 Accepts]: Start accepts. Automaton has 128 states and 136 transitions. Word has length 14 [2018-04-11 11:07:10,372 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 11:07:10,372 INFO L459 AbstractCegarLoop]: Abstraction has 128 states and 136 transitions. [2018-04-11 11:07:10,372 INFO L460 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-04-11 11:07:10,372 INFO L276 IsEmpty]: Start isEmpty. Operand 128 states and 136 transitions. [2018-04-11 11:07:10,372 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2018-04-11 11:07:10,372 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 11:07:10,372 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 11:07:10,372 INFO L408 AbstractCegarLoop]: === Iteration 5 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-11 11:07:10,373 INFO L82 PathProgramCache]: Analyzing trace with hash 1593831908, now seen corresponding path program 1 times [2018-04-11 11:07:10,373 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-11 11:07:10,373 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-11 11:07:10,373 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 11:07:10,374 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 11:07:10,374 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 11:07:10,382 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 11:07:10,383 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 11:07:10,398 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 11:07:10,398 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-11 11:07:10,398 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-04-11 11:07:10,398 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-04-11 11:07:10,398 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-04-11 11:07:10,398 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-04-11 11:07:10,398 INFO L87 Difference]: Start difference. First operand 128 states and 136 transitions. Second operand 4 states. [2018-04-11 11:07:10,448 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 11:07:10,449 INFO L93 Difference]: Finished difference Result 127 states and 135 transitions. [2018-04-11 11:07:10,449 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-04-11 11:07:10,449 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 15 [2018-04-11 11:07:10,449 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 11:07:10,450 INFO L225 Difference]: With dead ends: 127 [2018-04-11 11:07:10,450 INFO L226 Difference]: Without dead ends: 127 [2018-04-11 11:07:10,450 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-04-11 11:07:10,450 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 127 states. [2018-04-11 11:07:10,454 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 127 to 127. [2018-04-11 11:07:10,454 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 127 states. [2018-04-11 11:07:10,455 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 127 states to 127 states and 135 transitions. [2018-04-11 11:07:10,455 INFO L78 Accepts]: Start accepts. Automaton has 127 states and 135 transitions. Word has length 15 [2018-04-11 11:07:10,456 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 11:07:10,456 INFO L459 AbstractCegarLoop]: Abstraction has 127 states and 135 transitions. [2018-04-11 11:07:10,456 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-04-11 11:07:10,456 INFO L276 IsEmpty]: Start isEmpty. Operand 127 states and 135 transitions. [2018-04-11 11:07:10,456 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2018-04-11 11:07:10,456 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 11:07:10,456 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 11:07:10,456 INFO L408 AbstractCegarLoop]: === Iteration 6 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-11 11:07:10,457 INFO L82 PathProgramCache]: Analyzing trace with hash 1593831909, now seen corresponding path program 1 times [2018-04-11 11:07:10,457 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-11 11:07:10,457 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-11 11:07:10,457 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 11:07:10,458 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 11:07:10,458 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 11:07:10,467 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 11:07:10,467 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 11:07:10,491 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 11:07:10,491 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-11 11:07:10,491 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-04-11 11:07:10,491 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-04-11 11:07:10,492 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-04-11 11:07:10,492 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-04-11 11:07:10,492 INFO L87 Difference]: Start difference. First operand 127 states and 135 transitions. Second operand 4 states. [2018-04-11 11:07:10,549 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 11:07:10,549 INFO L93 Difference]: Finished difference Result 126 states and 134 transitions. [2018-04-11 11:07:10,549 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-04-11 11:07:10,549 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 15 [2018-04-11 11:07:10,549 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 11:07:10,550 INFO L225 Difference]: With dead ends: 126 [2018-04-11 11:07:10,550 INFO L226 Difference]: Without dead ends: 126 [2018-04-11 11:07:10,550 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-04-11 11:07:10,550 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 126 states. [2018-04-11 11:07:10,552 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 126 to 126. [2018-04-11 11:07:10,552 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 126 states. [2018-04-11 11:07:10,553 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 126 states to 126 states and 134 transitions. [2018-04-11 11:07:10,553 INFO L78 Accepts]: Start accepts. Automaton has 126 states and 134 transitions. Word has length 15 [2018-04-11 11:07:10,553 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 11:07:10,553 INFO L459 AbstractCegarLoop]: Abstraction has 126 states and 134 transitions. [2018-04-11 11:07:10,553 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-04-11 11:07:10,553 INFO L276 IsEmpty]: Start isEmpty. Operand 126 states and 134 transitions. [2018-04-11 11:07:10,553 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2018-04-11 11:07:10,553 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 11:07:10,553 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 11:07:10,553 INFO L408 AbstractCegarLoop]: === Iteration 7 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-11 11:07:10,554 INFO L82 PathProgramCache]: Analyzing trace with hash -1559978866, now seen corresponding path program 1 times [2018-04-11 11:07:10,554 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-11 11:07:10,554 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-11 11:07:10,554 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 11:07:10,554 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 11:07:10,554 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 11:07:10,561 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 11:07:10,561 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 11:07:10,582 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 11:07:10,583 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-11 11:07:10,583 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-04-11 11:07:10,583 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-04-11 11:07:10,583 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-04-11 11:07:10,583 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-04-11 11:07:10,583 INFO L87 Difference]: Start difference. First operand 126 states and 134 transitions. Second operand 5 states. [2018-04-11 11:07:10,683 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 11:07:10,683 INFO L93 Difference]: Finished difference Result 143 states and 152 transitions. [2018-04-11 11:07:10,683 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-04-11 11:07:10,683 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2018-04-11 11:07:10,684 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 11:07:10,684 INFO L225 Difference]: With dead ends: 143 [2018-04-11 11:07:10,685 INFO L226 Difference]: Without dead ends: 143 [2018-04-11 11:07:10,685 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-04-11 11:07:10,685 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 143 states. [2018-04-11 11:07:10,688 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 143 to 129. [2018-04-11 11:07:10,688 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 129 states. [2018-04-11 11:07:10,689 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 129 states to 129 states and 138 transitions. [2018-04-11 11:07:10,689 INFO L78 Accepts]: Start accepts. Automaton has 129 states and 138 transitions. Word has length 22 [2018-04-11 11:07:10,690 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 11:07:10,690 INFO L459 AbstractCegarLoop]: Abstraction has 129 states and 138 transitions. [2018-04-11 11:07:10,690 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-04-11 11:07:10,690 INFO L276 IsEmpty]: Start isEmpty. Operand 129 states and 138 transitions. [2018-04-11 11:07:10,690 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2018-04-11 11:07:10,690 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 11:07:10,690 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 11:07:10,690 INFO L408 AbstractCegarLoop]: === Iteration 8 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-11 11:07:10,691 INFO L82 PathProgramCache]: Analyzing trace with hash -1559978865, now seen corresponding path program 1 times [2018-04-11 11:07:10,691 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-11 11:07:10,691 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-11 11:07:10,692 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 11:07:10,692 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 11:07:10,692 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 11:07:10,701 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 11:07:10,701 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 11:07:10,740 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 11:07:10,740 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-11 11:07:10,740 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-04-11 11:07:10,740 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-04-11 11:07:10,740 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-04-11 11:07:10,740 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-04-11 11:07:10,741 INFO L87 Difference]: Start difference. First operand 129 states and 138 transitions. Second operand 5 states. [2018-04-11 11:07:10,842 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 11:07:10,842 INFO L93 Difference]: Finished difference Result 135 states and 144 transitions. [2018-04-11 11:07:10,843 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-04-11 11:07:10,843 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2018-04-11 11:07:10,843 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 11:07:10,843 INFO L225 Difference]: With dead ends: 135 [2018-04-11 11:07:10,843 INFO L226 Difference]: Without dead ends: 135 [2018-04-11 11:07:10,844 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-04-11 11:07:10,844 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 135 states. [2018-04-11 11:07:10,845 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 135 to 129. [2018-04-11 11:07:10,845 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 129 states. [2018-04-11 11:07:10,845 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 129 states to 129 states and 137 transitions. [2018-04-11 11:07:10,846 INFO L78 Accepts]: Start accepts. Automaton has 129 states and 137 transitions. Word has length 22 [2018-04-11 11:07:10,846 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 11:07:10,846 INFO L459 AbstractCegarLoop]: Abstraction has 129 states and 137 transitions. [2018-04-11 11:07:10,846 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-04-11 11:07:10,846 INFO L276 IsEmpty]: Start isEmpty. Operand 129 states and 137 transitions. [2018-04-11 11:07:10,846 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2018-04-11 11:07:10,846 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 11:07:10,846 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 11:07:10,846 INFO L408 AbstractCegarLoop]: === Iteration 9 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-11 11:07:10,846 INFO L82 PathProgramCache]: Analyzing trace with hash -1115224327, now seen corresponding path program 1 times [2018-04-11 11:07:10,847 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-11 11:07:10,847 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-11 11:07:10,847 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 11:07:10,847 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 11:07:10,847 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 11:07:10,852 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 11:07:10,853 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 11:07:10,866 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 11:07:10,866 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-11 11:07:10,866 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-04-11 11:07:10,866 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-04-11 11:07:10,866 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-04-11 11:07:10,866 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-04-11 11:07:10,867 INFO L87 Difference]: Start difference. First operand 129 states and 137 transitions. Second operand 4 states. [2018-04-11 11:07:10,923 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 11:07:10,924 INFO L93 Difference]: Finished difference Result 125 states and 133 transitions. [2018-04-11 11:07:10,924 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-04-11 11:07:10,924 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 23 [2018-04-11 11:07:10,924 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 11:07:10,924 INFO L225 Difference]: With dead ends: 125 [2018-04-11 11:07:10,925 INFO L226 Difference]: Without dead ends: 125 [2018-04-11 11:07:10,925 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-04-11 11:07:10,925 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 125 states. [2018-04-11 11:07:10,926 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 125 to 125. [2018-04-11 11:07:10,926 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 125 states. [2018-04-11 11:07:10,927 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 125 states to 125 states and 133 transitions. [2018-04-11 11:07:10,927 INFO L78 Accepts]: Start accepts. Automaton has 125 states and 133 transitions. Word has length 23 [2018-04-11 11:07:10,927 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 11:07:10,927 INFO L459 AbstractCegarLoop]: Abstraction has 125 states and 133 transitions. [2018-04-11 11:07:10,927 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-04-11 11:07:10,927 INFO L276 IsEmpty]: Start isEmpty. Operand 125 states and 133 transitions. [2018-04-11 11:07:10,927 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2018-04-11 11:07:10,927 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 11:07:10,927 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 11:07:10,929 INFO L408 AbstractCegarLoop]: === Iteration 10 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-11 11:07:10,929 INFO L82 PathProgramCache]: Analyzing trace with hash -1115224326, now seen corresponding path program 1 times [2018-04-11 11:07:10,929 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-11 11:07:10,929 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-11 11:07:10,929 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 11:07:10,930 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 11:07:10,930 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 11:07:10,935 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 11:07:10,936 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 11:07:10,963 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 11:07:10,964 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-11 11:07:10,964 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-04-11 11:07:10,964 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-04-11 11:07:10,964 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-04-11 11:07:10,964 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-04-11 11:07:10,964 INFO L87 Difference]: Start difference. First operand 125 states and 133 transitions. Second operand 4 states. [2018-04-11 11:07:11,013 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 11:07:11,013 INFO L93 Difference]: Finished difference Result 129 states and 137 transitions. [2018-04-11 11:07:11,014 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-04-11 11:07:11,014 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 23 [2018-04-11 11:07:11,014 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 11:07:11,015 INFO L225 Difference]: With dead ends: 129 [2018-04-11 11:07:11,015 INFO L226 Difference]: Without dead ends: 129 [2018-04-11 11:07:11,015 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-04-11 11:07:11,015 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 129 states. [2018-04-11 11:07:11,017 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 129 to 126. [2018-04-11 11:07:11,017 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 126 states. [2018-04-11 11:07:11,017 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 126 states to 126 states and 134 transitions. [2018-04-11 11:07:11,017 INFO L78 Accepts]: Start accepts. Automaton has 126 states and 134 transitions. Word has length 23 [2018-04-11 11:07:11,017 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 11:07:11,017 INFO L459 AbstractCegarLoop]: Abstraction has 126 states and 134 transitions. [2018-04-11 11:07:11,017 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-04-11 11:07:11,017 INFO L276 IsEmpty]: Start isEmpty. Operand 126 states and 134 transitions. [2018-04-11 11:07:11,018 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2018-04-11 11:07:11,018 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 11:07:11,018 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 11:07:11,018 INFO L408 AbstractCegarLoop]: === Iteration 11 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-11 11:07:11,018 INFO L82 PathProgramCache]: Analyzing trace with hash -196102737, now seen corresponding path program 1 times [2018-04-11 11:07:11,018 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-11 11:07:11,018 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-11 11:07:11,019 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 11:07:11,019 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 11:07:11,019 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 11:07:11,027 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 11:07:11,028 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 11:07:11,044 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 11:07:11,044 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-11 11:07:11,044 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-04-11 11:07:11,044 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-04-11 11:07:11,044 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-04-11 11:07:11,044 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-04-11 11:07:11,044 INFO L87 Difference]: Start difference. First operand 126 states and 134 transitions. Second operand 4 states. [2018-04-11 11:07:11,133 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 11:07:11,133 INFO L93 Difference]: Finished difference Result 136 states and 144 transitions. [2018-04-11 11:07:11,133 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-04-11 11:07:11,133 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 24 [2018-04-11 11:07:11,134 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 11:07:11,134 INFO L225 Difference]: With dead ends: 136 [2018-04-11 11:07:11,134 INFO L226 Difference]: Without dead ends: 136 [2018-04-11 11:07:11,134 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-04-11 11:07:11,135 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 136 states. [2018-04-11 11:07:11,136 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 136 to 128. [2018-04-11 11:07:11,136 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 128 states. [2018-04-11 11:07:11,137 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 128 states to 128 states and 137 transitions. [2018-04-11 11:07:11,137 INFO L78 Accepts]: Start accepts. Automaton has 128 states and 137 transitions. Word has length 24 [2018-04-11 11:07:11,137 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 11:07:11,137 INFO L459 AbstractCegarLoop]: Abstraction has 128 states and 137 transitions. [2018-04-11 11:07:11,138 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-04-11 11:07:11,138 INFO L276 IsEmpty]: Start isEmpty. Operand 128 states and 137 transitions. [2018-04-11 11:07:11,138 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2018-04-11 11:07:11,138 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 11:07:11,138 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 11:07:11,138 INFO L408 AbstractCegarLoop]: === Iteration 12 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-11 11:07:11,138 INFO L82 PathProgramCache]: Analyzing trace with hash -196102736, now seen corresponding path program 1 times [2018-04-11 11:07:11,138 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-11 11:07:11,138 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-11 11:07:11,139 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 11:07:11,139 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 11:07:11,140 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 11:07:11,149 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 11:07:11,150 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 11:07:11,206 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 11:07:11,206 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-11 11:07:11,207 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-04-11 11:07:11,207 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-04-11 11:07:11,207 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-04-11 11:07:11,207 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-04-11 11:07:11,207 INFO L87 Difference]: Start difference. First operand 128 states and 137 transitions. Second operand 7 states. [2018-04-11 11:07:11,375 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 11:07:11,375 INFO L93 Difference]: Finished difference Result 128 states and 136 transitions. [2018-04-11 11:07:11,375 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-04-11 11:07:11,375 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 24 [2018-04-11 11:07:11,375 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 11:07:11,376 INFO L225 Difference]: With dead ends: 128 [2018-04-11 11:07:11,376 INFO L226 Difference]: Without dead ends: 128 [2018-04-11 11:07:11,376 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=32, Invalid=78, Unknown=0, NotChecked=0, Total=110 [2018-04-11 11:07:11,376 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 128 states. [2018-04-11 11:07:11,378 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 128 to 128. [2018-04-11 11:07:11,378 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 128 states. [2018-04-11 11:07:11,378 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 128 states to 128 states and 136 transitions. [2018-04-11 11:07:11,378 INFO L78 Accepts]: Start accepts. Automaton has 128 states and 136 transitions. Word has length 24 [2018-04-11 11:07:11,378 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 11:07:11,378 INFO L459 AbstractCegarLoop]: Abstraction has 128 states and 136 transitions. [2018-04-11 11:07:11,378 INFO L460 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-04-11 11:07:11,379 INFO L276 IsEmpty]: Start isEmpty. Operand 128 states and 136 transitions. [2018-04-11 11:07:11,379 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2018-04-11 11:07:11,379 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 11:07:11,379 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 11:07:11,379 INFO L408 AbstractCegarLoop]: === Iteration 13 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-11 11:07:11,380 INFO L82 PathProgramCache]: Analyzing trace with hash -212244555, now seen corresponding path program 1 times [2018-04-11 11:07:11,380 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-11 11:07:11,380 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-11 11:07:11,380 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 11:07:11,381 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 11:07:11,381 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 11:07:11,389 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 11:07:11,390 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 11:07:11,423 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 11:07:11,423 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-11 11:07:11,424 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-04-11 11:07:11,424 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-04-11 11:07:11,424 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-04-11 11:07:11,424 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2018-04-11 11:07:11,424 INFO L87 Difference]: Start difference. First operand 128 states and 136 transitions. Second operand 5 states. [2018-04-11 11:07:11,537 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 11:07:11,537 INFO L93 Difference]: Finished difference Result 125 states and 133 transitions. [2018-04-11 11:07:11,539 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-04-11 11:07:11,539 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 24 [2018-04-11 11:07:11,539 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 11:07:11,540 INFO L225 Difference]: With dead ends: 125 [2018-04-11 11:07:11,540 INFO L226 Difference]: Without dead ends: 125 [2018-04-11 11:07:11,541 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2018-04-11 11:07:11,541 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 125 states. [2018-04-11 11:07:11,543 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 125 to 123. [2018-04-11 11:07:11,543 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 123 states. [2018-04-11 11:07:11,544 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 123 states to 123 states and 131 transitions. [2018-04-11 11:07:11,544 INFO L78 Accepts]: Start accepts. Automaton has 123 states and 131 transitions. Word has length 24 [2018-04-11 11:07:11,544 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 11:07:11,544 INFO L459 AbstractCegarLoop]: Abstraction has 123 states and 131 transitions. [2018-04-11 11:07:11,544 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-04-11 11:07:11,544 INFO L276 IsEmpty]: Start isEmpty. Operand 123 states and 131 transitions. [2018-04-11 11:07:11,545 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-04-11 11:07:11,545 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 11:07:11,545 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 11:07:11,545 INFO L408 AbstractCegarLoop]: === Iteration 14 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-11 11:07:11,545 INFO L82 PathProgramCache]: Analyzing trace with hash 748060877, now seen corresponding path program 1 times [2018-04-11 11:07:11,545 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-11 11:07:11,546 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-11 11:07:11,546 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 11:07:11,546 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 11:07:11,546 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 11:07:11,554 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 11:07:11,555 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 11:07:11,612 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 11:07:11,612 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-11 11:07:11,612 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-04-11 11:07:11,613 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-04-11 11:07:11,613 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-04-11 11:07:11,613 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2018-04-11 11:07:11,613 INFO L87 Difference]: Start difference. First operand 123 states and 131 transitions. Second operand 7 states. [2018-04-11 11:07:11,833 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 11:07:11,833 INFO L93 Difference]: Finished difference Result 139 states and 148 transitions. [2018-04-11 11:07:11,833 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-04-11 11:07:11,833 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 29 [2018-04-11 11:07:11,834 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 11:07:11,834 INFO L225 Difference]: With dead ends: 139 [2018-04-11 11:07:11,834 INFO L226 Difference]: Without dead ends: 139 [2018-04-11 11:07:11,835 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2018-04-11 11:07:11,835 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 139 states. [2018-04-11 11:07:11,836 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 139 to 129. [2018-04-11 11:07:11,836 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 129 states. [2018-04-11 11:07:11,837 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 129 states to 129 states and 138 transitions. [2018-04-11 11:07:11,837 INFO L78 Accepts]: Start accepts. Automaton has 129 states and 138 transitions. Word has length 29 [2018-04-11 11:07:11,837 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 11:07:11,837 INFO L459 AbstractCegarLoop]: Abstraction has 129 states and 138 transitions. [2018-04-11 11:07:11,837 INFO L460 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-04-11 11:07:11,837 INFO L276 IsEmpty]: Start isEmpty. Operand 129 states and 138 transitions. [2018-04-11 11:07:11,838 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-04-11 11:07:11,838 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 11:07:11,838 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 11:07:11,838 INFO L408 AbstractCegarLoop]: === Iteration 15 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-11 11:07:11,838 INFO L82 PathProgramCache]: Analyzing trace with hash 748060878, now seen corresponding path program 1 times [2018-04-11 11:07:11,838 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-11 11:07:11,838 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-11 11:07:11,839 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 11:07:11,839 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 11:07:11,839 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 11:07:11,848 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 11:07:11,848 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 11:07:11,898 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 11:07:11,898 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-11 11:07:11,898 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-04-11 11:07:11,898 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-04-11 11:07:11,898 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-04-11 11:07:11,898 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-04-11 11:07:11,899 INFO L87 Difference]: Start difference. First operand 129 states and 138 transitions. Second operand 7 states. [2018-04-11 11:07:12,158 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 11:07:12,158 INFO L93 Difference]: Finished difference Result 137 states and 147 transitions. [2018-04-11 11:07:12,158 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-04-11 11:07:12,158 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 29 [2018-04-11 11:07:12,159 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 11:07:12,159 INFO L225 Difference]: With dead ends: 137 [2018-04-11 11:07:12,159 INFO L226 Difference]: Without dead ends: 137 [2018-04-11 11:07:12,160 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=28, Invalid=62, Unknown=0, NotChecked=0, Total=90 [2018-04-11 11:07:12,160 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 137 states. [2018-04-11 11:07:12,162 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 137 to 129. [2018-04-11 11:07:12,162 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 129 states. [2018-04-11 11:07:12,164 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 129 states to 129 states and 137 transitions. [2018-04-11 11:07:12,164 INFO L78 Accepts]: Start accepts. Automaton has 129 states and 137 transitions. Word has length 29 [2018-04-11 11:07:12,164 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 11:07:12,164 INFO L459 AbstractCegarLoop]: Abstraction has 129 states and 137 transitions. [2018-04-11 11:07:12,165 INFO L460 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-04-11 11:07:12,165 INFO L276 IsEmpty]: Start isEmpty. Operand 129 states and 137 transitions. [2018-04-11 11:07:12,165 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2018-04-11 11:07:12,165 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 11:07:12,165 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 11:07:12,166 INFO L408 AbstractCegarLoop]: === Iteration 16 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-11 11:07:12,166 INFO L82 PathProgramCache]: Analyzing trace with hash 2087682397, now seen corresponding path program 1 times [2018-04-11 11:07:12,166 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-11 11:07:12,166 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-11 11:07:12,166 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 11:07:12,167 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 11:07:12,167 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 11:07:12,179 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 11:07:12,180 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 11:07:12,218 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 11:07:12,219 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-11 11:07:12,219 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-04-11 11:07:12,219 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-04-11 11:07:12,219 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-04-11 11:07:12,219 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-04-11 11:07:12,220 INFO L87 Difference]: Start difference. First operand 129 states and 137 transitions. Second operand 5 states. [2018-04-11 11:07:12,312 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 11:07:12,312 INFO L93 Difference]: Finished difference Result 127 states and 135 transitions. [2018-04-11 11:07:12,313 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-04-11 11:07:12,313 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 30 [2018-04-11 11:07:12,313 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 11:07:12,314 INFO L225 Difference]: With dead ends: 127 [2018-04-11 11:07:12,314 INFO L226 Difference]: Without dead ends: 127 [2018-04-11 11:07:12,314 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-04-11 11:07:12,314 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 127 states. [2018-04-11 11:07:12,316 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 127 to 125. [2018-04-11 11:07:12,317 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 125 states. [2018-04-11 11:07:12,317 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 125 states to 125 states and 132 transitions. [2018-04-11 11:07:12,317 INFO L78 Accepts]: Start accepts. Automaton has 125 states and 132 transitions. Word has length 30 [2018-04-11 11:07:12,318 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 11:07:12,318 INFO L459 AbstractCegarLoop]: Abstraction has 125 states and 132 transitions. [2018-04-11 11:07:12,318 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-04-11 11:07:12,318 INFO L276 IsEmpty]: Start isEmpty. Operand 125 states and 132 transitions. [2018-04-11 11:07:12,318 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2018-04-11 11:07:12,318 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 11:07:12,319 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 11:07:12,319 INFO L408 AbstractCegarLoop]: === Iteration 17 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-11 11:07:12,319 INFO L82 PathProgramCache]: Analyzing trace with hash 2087682398, now seen corresponding path program 1 times [2018-04-11 11:07:12,319 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-11 11:07:12,319 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-11 11:07:12,320 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 11:07:12,320 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 11:07:12,320 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 11:07:12,328 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 11:07:12,328 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 11:07:12,399 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 11:07:12,399 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-11 11:07:12,399 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-04-11 11:07:12,400 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-04-11 11:07:12,400 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-04-11 11:07:12,400 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2018-04-11 11:07:12,400 INFO L87 Difference]: Start difference. First operand 125 states and 132 transitions. Second operand 6 states. [2018-04-11 11:07:12,530 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 11:07:12,530 INFO L93 Difference]: Finished difference Result 132 states and 141 transitions. [2018-04-11 11:07:12,530 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-04-11 11:07:12,530 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 30 [2018-04-11 11:07:12,530 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 11:07:12,531 INFO L225 Difference]: With dead ends: 132 [2018-04-11 11:07:12,531 INFO L226 Difference]: Without dead ends: 132 [2018-04-11 11:07:12,532 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2018-04-11 11:07:12,532 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 132 states. [2018-04-11 11:07:12,534 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 132 to 125. [2018-04-11 11:07:12,534 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 125 states. [2018-04-11 11:07:12,535 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 125 states to 125 states and 133 transitions. [2018-04-11 11:07:12,535 INFO L78 Accepts]: Start accepts. Automaton has 125 states and 133 transitions. Word has length 30 [2018-04-11 11:07:12,535 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 11:07:12,535 INFO L459 AbstractCegarLoop]: Abstraction has 125 states and 133 transitions. [2018-04-11 11:07:12,535 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-04-11 11:07:12,535 INFO L276 IsEmpty]: Start isEmpty. Operand 125 states and 133 transitions. [2018-04-11 11:07:12,536 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2018-04-11 11:07:12,536 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 11:07:12,536 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 11:07:12,536 INFO L408 AbstractCegarLoop]: === Iteration 18 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-11 11:07:12,536 INFO L82 PathProgramCache]: Analyzing trace with hash 72869690, now seen corresponding path program 1 times [2018-04-11 11:07:12,536 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-11 11:07:12,536 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-11 11:07:12,537 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 11:07:12,537 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 11:07:12,537 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 11:07:12,544 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 11:07:12,545 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 11:07:12,572 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 11:07:12,572 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-11 11:07:12,572 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-04-11 11:07:12,572 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-04-11 11:07:12,572 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-04-11 11:07:12,572 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-04-11 11:07:12,573 INFO L87 Difference]: Start difference. First operand 125 states and 133 transitions. Second operand 5 states. [2018-04-11 11:07:12,680 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 11:07:12,681 INFO L93 Difference]: Finished difference Result 124 states and 132 transitions. [2018-04-11 11:07:12,681 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-04-11 11:07:12,681 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 30 [2018-04-11 11:07:12,681 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 11:07:12,682 INFO L225 Difference]: With dead ends: 124 [2018-04-11 11:07:12,682 INFO L226 Difference]: Without dead ends: 124 [2018-04-11 11:07:12,682 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2018-04-11 11:07:12,682 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 124 states. [2018-04-11 11:07:12,684 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 124 to 124. [2018-04-11 11:07:12,684 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 124 states. [2018-04-11 11:07:12,685 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 124 states to 124 states and 132 transitions. [2018-04-11 11:07:12,685 INFO L78 Accepts]: Start accepts. Automaton has 124 states and 132 transitions. Word has length 30 [2018-04-11 11:07:12,685 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 11:07:12,685 INFO L459 AbstractCegarLoop]: Abstraction has 124 states and 132 transitions. [2018-04-11 11:07:12,685 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-04-11 11:07:12,686 INFO L276 IsEmpty]: Start isEmpty. Operand 124 states and 132 transitions. [2018-04-11 11:07:12,686 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2018-04-11 11:07:12,686 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 11:07:12,686 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 11:07:12,686 INFO L408 AbstractCegarLoop]: === Iteration 19 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-11 11:07:12,686 INFO L82 PathProgramCache]: Analyzing trace with hash 72869691, now seen corresponding path program 1 times [2018-04-11 11:07:12,687 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-11 11:07:12,687 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-11 11:07:12,687 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 11:07:12,687 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 11:07:12,687 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 11:07:12,695 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 11:07:12,696 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 11:07:12,756 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 11:07:12,756 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-11 11:07:12,756 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-04-11 11:07:12,757 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-04-11 11:07:12,757 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-04-11 11:07:12,757 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2018-04-11 11:07:12,757 INFO L87 Difference]: Start difference. First operand 124 states and 132 transitions. Second operand 6 states. [2018-04-11 11:07:12,888 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 11:07:12,888 INFO L93 Difference]: Finished difference Result 131 states and 139 transitions. [2018-04-11 11:07:12,888 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-04-11 11:07:12,888 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 30 [2018-04-11 11:07:12,888 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 11:07:12,889 INFO L225 Difference]: With dead ends: 131 [2018-04-11 11:07:12,897 INFO L226 Difference]: Without dead ends: 131 [2018-04-11 11:07:12,897 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=28, Invalid=44, Unknown=0, NotChecked=0, Total=72 [2018-04-11 11:07:12,897 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 131 states. [2018-04-11 11:07:12,899 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 131 to 129. [2018-04-11 11:07:12,899 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 129 states. [2018-04-11 11:07:12,900 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 129 states to 129 states and 137 transitions. [2018-04-11 11:07:12,900 INFO L78 Accepts]: Start accepts. Automaton has 129 states and 137 transitions. Word has length 30 [2018-04-11 11:07:12,900 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 11:07:12,900 INFO L459 AbstractCegarLoop]: Abstraction has 129 states and 137 transitions. [2018-04-11 11:07:12,900 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-04-11 11:07:12,901 INFO L276 IsEmpty]: Start isEmpty. Operand 129 states and 137 transitions. [2018-04-11 11:07:12,901 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2018-04-11 11:07:12,901 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 11:07:12,901 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 11:07:12,901 INFO L408 AbstractCegarLoop]: === Iteration 20 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-11 11:07:12,902 INFO L82 PathProgramCache]: Analyzing trace with hash 1626965550, now seen corresponding path program 1 times [2018-04-11 11:07:12,902 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-11 11:07:12,902 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-11 11:07:12,902 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 11:07:12,902 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 11:07:12,903 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 11:07:12,912 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 11:07:12,912 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 11:07:12,960 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 11:07:12,961 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-11 11:07:12,961 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-04-11 11:07:12,961 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-04-11 11:07:12,961 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-04-11 11:07:12,962 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2018-04-11 11:07:12,962 INFO L87 Difference]: Start difference. First operand 129 states and 137 transitions. Second operand 7 states. [2018-04-11 11:07:13,189 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 11:07:13,190 INFO L93 Difference]: Finished difference Result 141 states and 150 transitions. [2018-04-11 11:07:13,190 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-04-11 11:07:13,190 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 31 [2018-04-11 11:07:13,190 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 11:07:13,190 INFO L225 Difference]: With dead ends: 141 [2018-04-11 11:07:13,190 INFO L226 Difference]: Without dead ends: 141 [2018-04-11 11:07:13,191 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2018-04-11 11:07:13,191 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 141 states. [2018-04-11 11:07:13,192 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 141 to 131. [2018-04-11 11:07:13,192 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 131 states. [2018-04-11 11:07:13,193 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 131 states to 131 states and 140 transitions. [2018-04-11 11:07:13,193 INFO L78 Accepts]: Start accepts. Automaton has 131 states and 140 transitions. Word has length 31 [2018-04-11 11:07:13,193 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 11:07:13,193 INFO L459 AbstractCegarLoop]: Abstraction has 131 states and 140 transitions. [2018-04-11 11:07:13,193 INFO L460 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-04-11 11:07:13,193 INFO L276 IsEmpty]: Start isEmpty. Operand 131 states and 140 transitions. [2018-04-11 11:07:13,193 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2018-04-11 11:07:13,193 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 11:07:13,193 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 11:07:13,193 INFO L408 AbstractCegarLoop]: === Iteration 21 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-11 11:07:13,193 INFO L82 PathProgramCache]: Analyzing trace with hash 1626965551, now seen corresponding path program 1 times [2018-04-11 11:07:13,193 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-11 11:07:13,194 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-11 11:07:13,194 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 11:07:13,194 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 11:07:13,194 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 11:07:13,200 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 11:07:13,200 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 11:07:13,274 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 11:07:13,274 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-11 11:07:13,275 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-04-11 11:07:13,275 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-04-11 11:07:13,275 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-04-11 11:07:13,275 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=70, Unknown=0, NotChecked=0, Total=90 [2018-04-11 11:07:13,275 INFO L87 Difference]: Start difference. First operand 131 states and 140 transitions. Second operand 10 states. [2018-04-11 11:07:13,537 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 11:07:13,537 INFO L93 Difference]: Finished difference Result 140 states and 149 transitions. [2018-04-11 11:07:13,537 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-04-11 11:07:13,537 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 31 [2018-04-11 11:07:13,537 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 11:07:13,538 INFO L225 Difference]: With dead ends: 140 [2018-04-11 11:07:13,538 INFO L226 Difference]: Without dead ends: 140 [2018-04-11 11:07:13,538 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 28 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=73, Invalid=233, Unknown=0, NotChecked=0, Total=306 [2018-04-11 11:07:13,539 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 140 states. [2018-04-11 11:07:13,541 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 140 to 126. [2018-04-11 11:07:13,541 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 126 states. [2018-04-11 11:07:13,542 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 126 states to 126 states and 134 transitions. [2018-04-11 11:07:13,542 INFO L78 Accepts]: Start accepts. Automaton has 126 states and 134 transitions. Word has length 31 [2018-04-11 11:07:13,542 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 11:07:13,542 INFO L459 AbstractCegarLoop]: Abstraction has 126 states and 134 transitions. [2018-04-11 11:07:13,542 INFO L460 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-04-11 11:07:13,542 INFO L276 IsEmpty]: Start isEmpty. Operand 126 states and 134 transitions. [2018-04-11 11:07:13,543 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2018-04-11 11:07:13,543 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 11:07:13,543 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 11:07:13,543 INFO L408 AbstractCegarLoop]: === Iteration 22 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-11 11:07:13,543 INFO L82 PathProgramCache]: Analyzing trace with hash -1275051825, now seen corresponding path program 1 times [2018-04-11 11:07:13,543 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-11 11:07:13,543 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-11 11:07:13,544 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 11:07:13,544 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 11:07:13,544 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 11:07:13,552 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 11:07:13,552 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 11:07:13,594 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 11:07:13,594 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-11 11:07:13,594 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-04-11 11:07:13,594 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-04-11 11:07:13,595 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-04-11 11:07:13,595 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2018-04-11 11:07:13,595 INFO L87 Difference]: Start difference. First operand 126 states and 134 transitions. Second operand 7 states. [2018-04-11 11:07:13,739 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 11:07:13,739 INFO L93 Difference]: Finished difference Result 141 states and 151 transitions. [2018-04-11 11:07:13,739 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-04-11 11:07:13,739 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 33 [2018-04-11 11:07:13,739 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 11:07:13,740 INFO L225 Difference]: With dead ends: 141 [2018-04-11 11:07:13,740 INFO L226 Difference]: Without dead ends: 141 [2018-04-11 11:07:13,740 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=26, Invalid=64, Unknown=0, NotChecked=0, Total=90 [2018-04-11 11:07:13,740 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 141 states. [2018-04-11 11:07:13,741 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 141 to 131. [2018-04-11 11:07:13,741 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 131 states. [2018-04-11 11:07:13,742 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 131 states to 131 states and 141 transitions. [2018-04-11 11:07:13,742 INFO L78 Accepts]: Start accepts. Automaton has 131 states and 141 transitions. Word has length 33 [2018-04-11 11:07:13,742 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 11:07:13,742 INFO L459 AbstractCegarLoop]: Abstraction has 131 states and 141 transitions. [2018-04-11 11:07:13,742 INFO L460 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-04-11 11:07:13,742 INFO L276 IsEmpty]: Start isEmpty. Operand 131 states and 141 transitions. [2018-04-11 11:07:13,742 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2018-04-11 11:07:13,742 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 11:07:13,742 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 11:07:13,743 INFO L408 AbstractCegarLoop]: === Iteration 23 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-11 11:07:13,743 INFO L82 PathProgramCache]: Analyzing trace with hash -1275051824, now seen corresponding path program 1 times [2018-04-11 11:07:13,743 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-11 11:07:13,743 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-11 11:07:13,743 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 11:07:13,743 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 11:07:13,743 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 11:07:13,748 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 11:07:13,748 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 11:07:13,821 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 11:07:13,822 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-11 11:07:13,822 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-04-11 11:07:13,822 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-04-11 11:07:13,822 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-04-11 11:07:13,822 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2018-04-11 11:07:13,823 INFO L87 Difference]: Start difference. First operand 131 states and 141 transitions. Second operand 9 states. [2018-04-11 11:07:14,174 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 11:07:14,175 INFO L93 Difference]: Finished difference Result 178 states and 195 transitions. [2018-04-11 11:07:14,175 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-04-11 11:07:14,175 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 33 [2018-04-11 11:07:14,175 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 11:07:14,176 INFO L225 Difference]: With dead ends: 178 [2018-04-11 11:07:14,176 INFO L226 Difference]: Without dead ends: 178 [2018-04-11 11:07:14,177 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 30 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=54, Invalid=186, Unknown=0, NotChecked=0, Total=240 [2018-04-11 11:07:14,177 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 178 states. [2018-04-11 11:07:14,179 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 178 to 149. [2018-04-11 11:07:14,179 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 149 states. [2018-04-11 11:07:14,180 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 149 states to 149 states and 164 transitions. [2018-04-11 11:07:14,180 INFO L78 Accepts]: Start accepts. Automaton has 149 states and 164 transitions. Word has length 33 [2018-04-11 11:07:14,180 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 11:07:14,180 INFO L459 AbstractCegarLoop]: Abstraction has 149 states and 164 transitions. [2018-04-11 11:07:14,181 INFO L460 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-04-11 11:07:14,181 INFO L276 IsEmpty]: Start isEmpty. Operand 149 states and 164 transitions. [2018-04-11 11:07:14,181 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-04-11 11:07:14,181 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 11:07:14,181 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 11:07:14,181 INFO L408 AbstractCegarLoop]: === Iteration 24 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-11 11:07:14,181 INFO L82 PathProgramCache]: Analyzing trace with hash 573717311, now seen corresponding path program 1 times [2018-04-11 11:07:14,182 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-11 11:07:14,182 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-11 11:07:14,182 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 11:07:14,182 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 11:07:14,182 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 11:07:14,190 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 11:07:14,191 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 11:07:14,321 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 11:07:14,322 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-11 11:07:14,322 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-11 11:07:14,332 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 11:07:14,363 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 11:07:14,371 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-11 11:07:14,502 INFO L700 Elim1Store]: detected not equals via solver [2018-04-11 11:07:14,508 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-04-11 11:07:14,508 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-11 11:07:14,516 INFO L700 Elim1Store]: detected not equals via solver [2018-04-11 11:07:14,516 INFO L700 Elim1Store]: detected not equals via solver [2018-04-11 11:07:14,517 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-04-11 11:07:14,517 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-11 11:07:14,532 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-11 11:07:14,532 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:25, output treesize:18 [2018-04-11 11:07:14,560 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 11:07:14,588 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-11 11:07:14,589 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 9] total 14 [2018-04-11 11:07:14,589 INFO L442 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-04-11 11:07:14,589 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-04-11 11:07:14,589 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=175, Unknown=0, NotChecked=0, Total=210 [2018-04-11 11:07:14,589 INFO L87 Difference]: Start difference. First operand 149 states and 164 transitions. Second operand 15 states. [2018-04-11 11:07:14,902 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 11:07:14,902 INFO L93 Difference]: Finished difference Result 156 states and 170 transitions. [2018-04-11 11:07:14,902 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-04-11 11:07:14,902 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 34 [2018-04-11 11:07:14,902 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 11:07:14,903 INFO L225 Difference]: With dead ends: 156 [2018-04-11 11:07:14,903 INFO L226 Difference]: Without dead ends: 156 [2018-04-11 11:07:14,904 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 49 GetRequests, 27 SyntacticMatches, 4 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 69 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=82, Invalid=298, Unknown=0, NotChecked=0, Total=380 [2018-04-11 11:07:14,904 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 156 states. [2018-04-11 11:07:14,906 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 156 to 137. [2018-04-11 11:07:14,906 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 137 states. [2018-04-11 11:07:14,906 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 137 states to 137 states and 147 transitions. [2018-04-11 11:07:14,906 INFO L78 Accepts]: Start accepts. Automaton has 137 states and 147 transitions. Word has length 34 [2018-04-11 11:07:14,906 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 11:07:14,906 INFO L459 AbstractCegarLoop]: Abstraction has 137 states and 147 transitions. [2018-04-11 11:07:14,906 INFO L460 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-04-11 11:07:14,906 INFO L276 IsEmpty]: Start isEmpty. Operand 137 states and 147 transitions. [2018-04-11 11:07:14,907 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-04-11 11:07:14,907 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 11:07:14,907 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 11:07:14,907 INFO L408 AbstractCegarLoop]: === Iteration 25 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-11 11:07:14,907 INFO L82 PathProgramCache]: Analyzing trace with hash -1260047476, now seen corresponding path program 1 times [2018-04-11 11:07:14,907 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-11 11:07:14,907 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-11 11:07:14,908 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 11:07:14,908 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 11:07:14,908 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 11:07:14,915 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 11:07:14,916 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 11:07:14,961 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 11:07:14,961 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-11 11:07:14,961 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-04-11 11:07:14,962 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-04-11 11:07:14,962 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-04-11 11:07:14,962 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-04-11 11:07:14,962 INFO L87 Difference]: Start difference. First operand 137 states and 147 transitions. Second operand 8 states. [2018-04-11 11:07:15,063 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 11:07:15,064 INFO L93 Difference]: Finished difference Result 164 states and 175 transitions. [2018-04-11 11:07:15,064 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-04-11 11:07:15,064 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 35 [2018-04-11 11:07:15,064 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 11:07:15,064 INFO L225 Difference]: With dead ends: 164 [2018-04-11 11:07:15,064 INFO L226 Difference]: Without dead ends: 164 [2018-04-11 11:07:15,065 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=43, Invalid=113, Unknown=0, NotChecked=0, Total=156 [2018-04-11 11:07:15,065 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 164 states. [2018-04-11 11:07:15,066 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 164 to 137. [2018-04-11 11:07:15,067 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 137 states. [2018-04-11 11:07:15,067 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 137 states to 137 states and 145 transitions. [2018-04-11 11:07:15,067 INFO L78 Accepts]: Start accepts. Automaton has 137 states and 145 transitions. Word has length 35 [2018-04-11 11:07:15,067 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 11:07:15,067 INFO L459 AbstractCegarLoop]: Abstraction has 137 states and 145 transitions. [2018-04-11 11:07:15,067 INFO L460 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-04-11 11:07:15,067 INFO L276 IsEmpty]: Start isEmpty. Operand 137 states and 145 transitions. [2018-04-11 11:07:15,068 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-04-11 11:07:15,068 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 11:07:15,068 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 11:07:15,068 INFO L408 AbstractCegarLoop]: === Iteration 26 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-11 11:07:15,068 INFO L82 PathProgramCache]: Analyzing trace with hash -378073276, now seen corresponding path program 1 times [2018-04-11 11:07:15,068 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-11 11:07:15,068 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-11 11:07:15,069 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 11:07:15,069 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 11:07:15,069 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 11:07:15,074 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 11:07:15,075 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 11:07:15,088 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 11:07:15,088 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-11 11:07:15,088 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-04-11 11:07:15,089 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-04-11 11:07:15,089 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-04-11 11:07:15,089 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-04-11 11:07:15,089 INFO L87 Difference]: Start difference. First operand 137 states and 145 transitions. Second operand 5 states. [2018-04-11 11:07:15,182 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 11:07:15,182 INFO L93 Difference]: Finished difference Result 136 states and 144 transitions. [2018-04-11 11:07:15,183 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-04-11 11:07:15,183 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 36 [2018-04-11 11:07:15,183 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 11:07:15,183 INFO L225 Difference]: With dead ends: 136 [2018-04-11 11:07:15,184 INFO L226 Difference]: Without dead ends: 136 [2018-04-11 11:07:15,184 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2018-04-11 11:07:15,184 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 136 states. [2018-04-11 11:07:15,186 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 136 to 136. [2018-04-11 11:07:15,186 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 136 states. [2018-04-11 11:07:15,186 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 136 states to 136 states and 144 transitions. [2018-04-11 11:07:15,186 INFO L78 Accepts]: Start accepts. Automaton has 136 states and 144 transitions. Word has length 36 [2018-04-11 11:07:15,188 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 11:07:15,188 INFO L459 AbstractCegarLoop]: Abstraction has 136 states and 144 transitions. [2018-04-11 11:07:15,188 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-04-11 11:07:15,188 INFO L276 IsEmpty]: Start isEmpty. Operand 136 states and 144 transitions. [2018-04-11 11:07:15,188 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-04-11 11:07:15,188 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 11:07:15,188 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 11:07:15,189 INFO L408 AbstractCegarLoop]: === Iteration 27 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-11 11:07:15,189 INFO L82 PathProgramCache]: Analyzing trace with hash -378073275, now seen corresponding path program 1 times [2018-04-11 11:07:15,189 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-11 11:07:15,189 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-11 11:07:15,189 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 11:07:15,190 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 11:07:15,190 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 11:07:15,199 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 11:07:15,199 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 11:07:15,332 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 11:07:15,332 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-11 11:07:15,332 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-04-11 11:07:15,333 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-04-11 11:07:15,333 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-04-11 11:07:15,333 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=70, Unknown=0, NotChecked=0, Total=90 [2018-04-11 11:07:15,333 INFO L87 Difference]: Start difference. First operand 136 states and 144 transitions. Second operand 10 states. [2018-04-11 11:07:15,623 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 11:07:15,623 INFO L93 Difference]: Finished difference Result 160 states and 172 transitions. [2018-04-11 11:07:15,623 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-04-11 11:07:15,623 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 36 [2018-04-11 11:07:15,623 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 11:07:15,624 INFO L225 Difference]: With dead ends: 160 [2018-04-11 11:07:15,624 INFO L226 Difference]: Without dead ends: 160 [2018-04-11 11:07:15,624 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 42 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=57, Invalid=215, Unknown=0, NotChecked=0, Total=272 [2018-04-11 11:07:15,624 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 160 states. [2018-04-11 11:07:15,625 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 160 to 139. [2018-04-11 11:07:15,625 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 139 states. [2018-04-11 11:07:15,626 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 139 states to 139 states and 147 transitions. [2018-04-11 11:07:15,626 INFO L78 Accepts]: Start accepts. Automaton has 139 states and 147 transitions. Word has length 36 [2018-04-11 11:07:15,626 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 11:07:15,626 INFO L459 AbstractCegarLoop]: Abstraction has 139 states and 147 transitions. [2018-04-11 11:07:15,626 INFO L460 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-04-11 11:07:15,626 INFO L276 IsEmpty]: Start isEmpty. Operand 139 states and 147 transitions. [2018-04-11 11:07:15,626 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2018-04-11 11:07:15,626 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 11:07:15,626 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 11:07:15,626 INFO L408 AbstractCegarLoop]: === Iteration 28 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-11 11:07:15,627 INFO L82 PathProgramCache]: Analyzing trace with hash -1381840613, now seen corresponding path program 1 times [2018-04-11 11:07:15,627 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-11 11:07:15,627 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-11 11:07:15,627 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 11:07:15,627 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 11:07:15,627 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 11:07:15,635 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 11:07:15,636 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 11:07:15,778 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 11:07:15,778 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-11 11:07:15,778 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-11 11:07:15,789 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 11:07:15,813 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 11:07:15,816 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-11 11:07:15,822 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-11 11:07:15,823 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-11 11:07:15,825 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 11:07:15,825 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-04-11 11:07:15,838 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-04-11 11:07:15,840 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-04-11 11:07:15,840 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-11 11:07:15,842 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 11:07:15,848 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-04-11 11:07:15,850 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-04-11 11:07:15,883 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-11 11:07:15,884 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 11:07:15,888 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-11 11:07:15,889 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:35, output treesize:21 [2018-04-11 11:07:16,003 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 17 [2018-04-11 11:07:16,006 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 5 [2018-04-11 11:07:16,006 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-11 11:07:16,008 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 11:07:16,018 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 26 [2018-04-11 11:07:16,020 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 11 [2018-04-11 11:07:16,021 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-11 11:07:16,025 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 11:07:16,030 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-11 11:07:16,030 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:55, output treesize:19 [2018-04-11 11:07:16,050 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 11:07:16,069 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-11 11:07:16,069 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8] total 15 [2018-04-11 11:07:16,069 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-04-11 11:07:16,069 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-04-11 11:07:16,069 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=49, Invalid=191, Unknown=0, NotChecked=0, Total=240 [2018-04-11 11:07:16,069 INFO L87 Difference]: Start difference. First operand 139 states and 147 transitions. Second operand 16 states. [2018-04-11 11:07:16,363 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 11:07:16,364 INFO L93 Difference]: Finished difference Result 149 states and 157 transitions. [2018-04-11 11:07:16,364 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-04-11 11:07:16,364 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 37 [2018-04-11 11:07:16,364 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 11:07:16,364 INFO L225 Difference]: With dead ends: 149 [2018-04-11 11:07:16,364 INFO L226 Difference]: Without dead ends: 149 [2018-04-11 11:07:16,365 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 52 GetRequests, 30 SyntacticMatches, 0 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 81 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=143, Invalid=409, Unknown=0, NotChecked=0, Total=552 [2018-04-11 11:07:16,365 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 149 states. [2018-04-11 11:07:16,366 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 149 to 149. [2018-04-11 11:07:16,366 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 149 states. [2018-04-11 11:07:16,366 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 149 states to 149 states and 157 transitions. [2018-04-11 11:07:16,366 INFO L78 Accepts]: Start accepts. Automaton has 149 states and 157 transitions. Word has length 37 [2018-04-11 11:07:16,367 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 11:07:16,367 INFO L459 AbstractCegarLoop]: Abstraction has 149 states and 157 transitions. [2018-04-11 11:07:16,367 INFO L460 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-04-11 11:07:16,367 INFO L276 IsEmpty]: Start isEmpty. Operand 149 states and 157 transitions. [2018-04-11 11:07:16,367 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2018-04-11 11:07:16,367 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 11:07:16,367 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 11:07:16,367 INFO L408 AbstractCegarLoop]: === Iteration 29 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-11 11:07:16,367 INFO L82 PathProgramCache]: Analyzing trace with hash 760893153, now seen corresponding path program 1 times [2018-04-11 11:07:16,367 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-11 11:07:16,367 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-11 11:07:16,368 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 11:07:16,368 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 11:07:16,368 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 11:07:16,374 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 11:07:16,374 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 11:07:16,675 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 11:07:16,675 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-11 11:07:16,675 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [17] imperfect sequences [] total 17 [2018-04-11 11:07:16,675 INFO L442 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-04-11 11:07:16,675 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-04-11 11:07:16,675 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=237, Unknown=0, NotChecked=0, Total=272 [2018-04-11 11:07:16,676 INFO L87 Difference]: Start difference. First operand 149 states and 157 transitions. Second operand 17 states. [2018-04-11 11:07:17,366 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 11:07:17,366 INFO L93 Difference]: Finished difference Result 188 states and 201 transitions. [2018-04-11 11:07:17,366 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-04-11 11:07:17,366 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 40 [2018-04-11 11:07:17,367 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 11:07:17,367 INFO L225 Difference]: With dead ends: 188 [2018-04-11 11:07:17,368 INFO L226 Difference]: Without dead ends: 188 [2018-04-11 11:07:17,368 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 35 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 201 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=134, Invalid=988, Unknown=0, NotChecked=0, Total=1122 [2018-04-11 11:07:17,368 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 188 states. [2018-04-11 11:07:17,373 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 188 to 166. [2018-04-11 11:07:17,373 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 166 states. [2018-04-11 11:07:17,374 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 166 states to 166 states and 177 transitions. [2018-04-11 11:07:17,374 INFO L78 Accepts]: Start accepts. Automaton has 166 states and 177 transitions. Word has length 40 [2018-04-11 11:07:17,374 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 11:07:17,374 INFO L459 AbstractCegarLoop]: Abstraction has 166 states and 177 transitions. [2018-04-11 11:07:17,374 INFO L460 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-04-11 11:07:17,375 INFO L276 IsEmpty]: Start isEmpty. Operand 166 states and 177 transitions. [2018-04-11 11:07:17,375 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2018-04-11 11:07:17,375 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 11:07:17,375 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 11:07:17,375 INFO L408 AbstractCegarLoop]: === Iteration 30 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-11 11:07:17,376 INFO L82 PathProgramCache]: Analyzing trace with hash 1372557105, now seen corresponding path program 1 times [2018-04-11 11:07:17,376 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-11 11:07:17,376 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-11 11:07:17,376 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 11:07:17,376 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 11:07:17,377 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 11:07:17,388 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 11:07:17,389 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 11:07:17,523 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 11:07:17,523 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-11 11:07:17,523 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-04-11 11:07:17,524 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-04-11 11:07:17,524 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-04-11 11:07:17,524 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=87, Unknown=0, NotChecked=0, Total=110 [2018-04-11 11:07:17,524 INFO L87 Difference]: Start difference. First operand 166 states and 177 transitions. Second operand 11 states. [2018-04-11 11:07:17,964 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 11:07:17,964 INFO L93 Difference]: Finished difference Result 200 states and 218 transitions. [2018-04-11 11:07:17,964 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-04-11 11:07:17,964 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 40 [2018-04-11 11:07:17,964 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 11:07:17,965 INFO L225 Difference]: With dead ends: 200 [2018-04-11 11:07:17,965 INFO L226 Difference]: Without dead ends: 200 [2018-04-11 11:07:17,965 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 58 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=89, Invalid=331, Unknown=0, NotChecked=0, Total=420 [2018-04-11 11:07:17,965 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 200 states. [2018-04-11 11:07:17,967 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 200 to 175. [2018-04-11 11:07:17,967 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 175 states. [2018-04-11 11:07:17,967 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 175 states to 175 states and 188 transitions. [2018-04-11 11:07:17,967 INFO L78 Accepts]: Start accepts. Automaton has 175 states and 188 transitions. Word has length 40 [2018-04-11 11:07:17,968 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 11:07:17,968 INFO L459 AbstractCegarLoop]: Abstraction has 175 states and 188 transitions. [2018-04-11 11:07:17,968 INFO L460 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-04-11 11:07:17,968 INFO L276 IsEmpty]: Start isEmpty. Operand 175 states and 188 transitions. [2018-04-11 11:07:17,968 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-04-11 11:07:17,968 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 11:07:17,968 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 11:07:17,968 INFO L408 AbstractCegarLoop]: === Iteration 31 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-11 11:07:17,968 INFO L82 PathProgramCache]: Analyzing trace with hash 1203361471, now seen corresponding path program 1 times [2018-04-11 11:07:17,969 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-11 11:07:17,969 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-11 11:07:17,969 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 11:07:17,969 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 11:07:17,969 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 11:07:17,974 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 11:07:17,975 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 11:07:18,036 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 11:07:18,036 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-11 11:07:18,036 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-04-11 11:07:18,036 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-04-11 11:07:18,036 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-04-11 11:07:18,036 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-04-11 11:07:18,037 INFO L87 Difference]: Start difference. First operand 175 states and 188 transitions. Second operand 8 states. [2018-04-11 11:07:18,160 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 11:07:18,160 INFO L93 Difference]: Finished difference Result 193 states and 207 transitions. [2018-04-11 11:07:18,160 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-04-11 11:07:18,160 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 44 [2018-04-11 11:07:18,161 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 11:07:18,161 INFO L225 Difference]: With dead ends: 193 [2018-04-11 11:07:18,161 INFO L226 Difference]: Without dead ends: 193 [2018-04-11 11:07:18,161 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=43, Invalid=113, Unknown=0, NotChecked=0, Total=156 [2018-04-11 11:07:18,161 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 193 states. [2018-04-11 11:07:18,163 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 193 to 184. [2018-04-11 11:07:18,163 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 184 states. [2018-04-11 11:07:18,164 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 184 states to 184 states and 201 transitions. [2018-04-11 11:07:18,164 INFO L78 Accepts]: Start accepts. Automaton has 184 states and 201 transitions. Word has length 44 [2018-04-11 11:07:18,164 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 11:07:18,164 INFO L459 AbstractCegarLoop]: Abstraction has 184 states and 201 transitions. [2018-04-11 11:07:18,164 INFO L460 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-04-11 11:07:18,164 INFO L276 IsEmpty]: Start isEmpty. Operand 184 states and 201 transitions. [2018-04-11 11:07:18,164 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-04-11 11:07:18,164 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 11:07:18,164 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 11:07:18,165 INFO L408 AbstractCegarLoop]: === Iteration 32 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-11 11:07:18,165 INFO L82 PathProgramCache]: Analyzing trace with hash 1760106820, now seen corresponding path program 1 times [2018-04-11 11:07:18,165 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-11 11:07:18,165 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-11 11:07:18,165 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 11:07:18,165 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 11:07:18,165 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 11:07:18,171 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 11:07:18,172 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 11:07:18,236 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 11:07:18,236 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-11 11:07:18,236 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-04-11 11:07:18,236 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-04-11 11:07:18,236 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-04-11 11:07:18,236 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=70, Unknown=0, NotChecked=0, Total=90 [2018-04-11 11:07:18,236 INFO L87 Difference]: Start difference. First operand 184 states and 201 transitions. Second operand 10 states. [2018-04-11 11:07:18,384 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 11:07:18,384 INFO L93 Difference]: Finished difference Result 192 states and 206 transitions. [2018-04-11 11:07:18,384 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-04-11 11:07:18,384 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 43 [2018-04-11 11:07:18,384 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 11:07:18,385 INFO L225 Difference]: With dead ends: 192 [2018-04-11 11:07:18,385 INFO L226 Difference]: Without dead ends: 192 [2018-04-11 11:07:18,385 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 39 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=60, Invalid=212, Unknown=0, NotChecked=0, Total=272 [2018-04-11 11:07:18,385 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 192 states. [2018-04-11 11:07:18,387 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 192 to 174. [2018-04-11 11:07:18,387 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 174 states. [2018-04-11 11:07:18,387 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 174 states to 174 states and 189 transitions. [2018-04-11 11:07:18,387 INFO L78 Accepts]: Start accepts. Automaton has 174 states and 189 transitions. Word has length 43 [2018-04-11 11:07:18,387 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 11:07:18,388 INFO L459 AbstractCegarLoop]: Abstraction has 174 states and 189 transitions. [2018-04-11 11:07:18,388 INFO L460 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-04-11 11:07:18,388 INFO L276 IsEmpty]: Start isEmpty. Operand 174 states and 189 transitions. [2018-04-11 11:07:18,388 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2018-04-11 11:07:18,388 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 11:07:18,388 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 11:07:18,388 INFO L408 AbstractCegarLoop]: === Iteration 33 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-11 11:07:18,388 INFO L82 PathProgramCache]: Analyzing trace with hash -1350499908, now seen corresponding path program 1 times [2018-04-11 11:07:18,388 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-11 11:07:18,388 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-11 11:07:18,389 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 11:07:18,389 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 11:07:18,389 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 11:07:18,393 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 11:07:18,393 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 11:07:18,410 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 11:07:18,411 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-11 11:07:18,411 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-04-11 11:07:18,411 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-04-11 11:07:18,411 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-04-11 11:07:18,411 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-04-11 11:07:18,412 INFO L87 Difference]: Start difference. First operand 174 states and 189 transitions. Second operand 6 states. [2018-04-11 11:07:18,536 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 11:07:18,536 INFO L93 Difference]: Finished difference Result 184 states and 199 transitions. [2018-04-11 11:07:18,536 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-04-11 11:07:18,537 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 45 [2018-04-11 11:07:18,537 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 11:07:18,537 INFO L225 Difference]: With dead ends: 184 [2018-04-11 11:07:18,537 INFO L226 Difference]: Without dead ends: 184 [2018-04-11 11:07:18,538 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2018-04-11 11:07:18,538 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 184 states. [2018-04-11 11:07:18,540 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 184 to 177. [2018-04-11 11:07:18,540 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 177 states. [2018-04-11 11:07:18,541 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 177 states to 177 states and 193 transitions. [2018-04-11 11:07:18,541 INFO L78 Accepts]: Start accepts. Automaton has 177 states and 193 transitions. Word has length 45 [2018-04-11 11:07:18,541 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 11:07:18,541 INFO L459 AbstractCegarLoop]: Abstraction has 177 states and 193 transitions. [2018-04-11 11:07:18,541 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-04-11 11:07:18,541 INFO L276 IsEmpty]: Start isEmpty. Operand 177 states and 193 transitions. [2018-04-11 11:07:18,541 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-04-11 11:07:18,541 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 11:07:18,541 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 11:07:18,542 INFO L408 AbstractCegarLoop]: === Iteration 34 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-11 11:07:18,542 INFO L82 PathProgramCache]: Analyzing trace with hash 816398688, now seen corresponding path program 1 times [2018-04-11 11:07:18,542 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-11 11:07:18,542 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-11 11:07:18,542 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 11:07:18,542 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 11:07:18,542 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 11:07:18,550 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 11:07:18,551 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 11:07:18,765 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 11:07:18,765 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-11 11:07:18,765 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [17] imperfect sequences [] total 17 [2018-04-11 11:07:18,766 INFO L442 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-04-11 11:07:18,766 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-04-11 11:07:18,766 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=269, Unknown=0, NotChecked=0, Total=306 [2018-04-11 11:07:18,766 INFO L87 Difference]: Start difference. First operand 177 states and 193 transitions. Second operand 18 states. [2018-04-11 11:07:19,358 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 11:07:19,359 INFO L93 Difference]: Finished difference Result 229 states and 253 transitions. [2018-04-11 11:07:19,359 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-04-11 11:07:19,359 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 47 [2018-04-11 11:07:19,359 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 11:07:19,360 INFO L225 Difference]: With dead ends: 229 [2018-04-11 11:07:19,360 INFO L226 Difference]: Without dead ends: 229 [2018-04-11 11:07:19,360 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 36 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 33 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 207 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=136, Invalid=1054, Unknown=0, NotChecked=0, Total=1190 [2018-04-11 11:07:19,360 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 229 states. [2018-04-11 11:07:19,362 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 229 to 201. [2018-04-11 11:07:19,362 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 201 states. [2018-04-11 11:07:19,363 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 201 states to 201 states and 224 transitions. [2018-04-11 11:07:19,363 INFO L78 Accepts]: Start accepts. Automaton has 201 states and 224 transitions. Word has length 47 [2018-04-11 11:07:19,363 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 11:07:19,363 INFO L459 AbstractCegarLoop]: Abstraction has 201 states and 224 transitions. [2018-04-11 11:07:19,363 INFO L460 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-04-11 11:07:19,363 INFO L276 IsEmpty]: Start isEmpty. Operand 201 states and 224 transitions. [2018-04-11 11:07:19,363 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-04-11 11:07:19,363 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 11:07:19,364 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 11:07:19,364 INFO L408 AbstractCegarLoop]: === Iteration 35 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-11 11:07:19,364 INFO L82 PathProgramCache]: Analyzing trace with hash 816398689, now seen corresponding path program 1 times [2018-04-11 11:07:19,364 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-11 11:07:19,364 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-11 11:07:19,364 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 11:07:19,364 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 11:07:19,364 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 11:07:19,371 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 11:07:19,371 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 11:07:19,611 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 11:07:19,612 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-11 11:07:19,612 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [18] imperfect sequences [] total 18 [2018-04-11 11:07:19,612 INFO L442 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-04-11 11:07:19,612 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-04-11 11:07:19,613 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=39, Invalid=303, Unknown=0, NotChecked=0, Total=342 [2018-04-11 11:07:19,613 INFO L87 Difference]: Start difference. First operand 201 states and 224 transitions. Second operand 19 states. [2018-04-11 11:07:20,411 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 11:07:20,411 INFO L93 Difference]: Finished difference Result 250 states and 277 transitions. [2018-04-11 11:07:20,411 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2018-04-11 11:07:20,411 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 47 [2018-04-11 11:07:20,411 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 11:07:20,412 INFO L225 Difference]: With dead ends: 250 [2018-04-11 11:07:20,412 INFO L226 Difference]: Without dead ends: 250 [2018-04-11 11:07:20,412 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 39 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 246 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=150, Invalid=1256, Unknown=0, NotChecked=0, Total=1406 [2018-04-11 11:07:20,412 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 250 states. [2018-04-11 11:07:20,414 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 250 to 223. [2018-04-11 11:07:20,414 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 223 states. [2018-04-11 11:07:20,415 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 223 states to 223 states and 251 transitions. [2018-04-11 11:07:20,415 INFO L78 Accepts]: Start accepts. Automaton has 223 states and 251 transitions. Word has length 47 [2018-04-11 11:07:20,415 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 11:07:20,415 INFO L459 AbstractCegarLoop]: Abstraction has 223 states and 251 transitions. [2018-04-11 11:07:20,415 INFO L460 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-04-11 11:07:20,415 INFO L276 IsEmpty]: Start isEmpty. Operand 223 states and 251 transitions. [2018-04-11 11:07:20,415 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2018-04-11 11:07:20,415 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 11:07:20,415 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 11:07:20,415 INFO L408 AbstractCegarLoop]: === Iteration 36 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-11 11:07:20,416 INFO L82 PathProgramCache]: Analyzing trace with hash -1783942653, now seen corresponding path program 1 times [2018-04-11 11:07:20,416 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-11 11:07:20,416 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-11 11:07:20,416 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 11:07:20,416 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 11:07:20,416 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 11:07:20,420 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 11:07:20,421 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 11:07:20,491 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 11:07:20,491 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-11 11:07:20,491 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-04-11 11:07:20,492 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-04-11 11:07:20,492 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-04-11 11:07:20,492 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=71, Unknown=0, NotChecked=0, Total=90 [2018-04-11 11:07:20,492 INFO L87 Difference]: Start difference. First operand 223 states and 251 transitions. Second operand 10 states. [2018-04-11 11:07:20,647 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 11:07:20,647 INFO L93 Difference]: Finished difference Result 242 states and 271 transitions. [2018-04-11 11:07:20,647 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-04-11 11:07:20,647 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 48 [2018-04-11 11:07:20,648 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 11:07:20,648 INFO L225 Difference]: With dead ends: 242 [2018-04-11 11:07:20,648 INFO L226 Difference]: Without dead ends: 242 [2018-04-11 11:07:20,648 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=39, Invalid=143, Unknown=0, NotChecked=0, Total=182 [2018-04-11 11:07:20,649 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 242 states. [2018-04-11 11:07:20,650 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 242 to 234. [2018-04-11 11:07:20,651 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 234 states. [2018-04-11 11:07:20,651 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 234 states to 234 states and 264 transitions. [2018-04-11 11:07:20,651 INFO L78 Accepts]: Start accepts. Automaton has 234 states and 264 transitions. Word has length 48 [2018-04-11 11:07:20,651 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 11:07:20,651 INFO L459 AbstractCegarLoop]: Abstraction has 234 states and 264 transitions. [2018-04-11 11:07:20,651 INFO L460 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-04-11 11:07:20,651 INFO L276 IsEmpty]: Start isEmpty. Operand 234 states and 264 transitions. [2018-04-11 11:07:20,652 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2018-04-11 11:07:20,652 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 11:07:20,652 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 11:07:20,652 INFO L408 AbstractCegarLoop]: === Iteration 37 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-11 11:07:20,652 INFO L82 PathProgramCache]: Analyzing trace with hash -1066362853, now seen corresponding path program 1 times [2018-04-11 11:07:20,652 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-11 11:07:20,652 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-11 11:07:20,652 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 11:07:20,653 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 11:07:20,653 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 11:07:20,660 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 11:07:20,660 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 11:07:21,100 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 11:07:21,100 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-11 11:07:21,132 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [22] imperfect sequences [] total 22 [2018-04-11 11:07:21,133 INFO L442 AbstractCegarLoop]: Interpolant automaton has 23 states [2018-04-11 11:07:21,133 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2018-04-11 11:07:21,133 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=51, Invalid=455, Unknown=0, NotChecked=0, Total=506 [2018-04-11 11:07:21,133 INFO L87 Difference]: Start difference. First operand 234 states and 264 transitions. Second operand 23 states. [2018-04-11 11:07:22,129 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 11:07:22,129 INFO L93 Difference]: Finished difference Result 304 states and 340 transitions. [2018-04-11 11:07:22,129 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2018-04-11 11:07:22,129 INFO L78 Accepts]: Start accepts. Automaton has 23 states. Word has length 50 [2018-04-11 11:07:22,129 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 11:07:22,130 INFO L225 Difference]: With dead ends: 304 [2018-04-11 11:07:22,130 INFO L226 Difference]: Without dead ends: 304 [2018-04-11 11:07:22,131 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 53 GetRequests, 3 SyntacticMatches, 3 SemanticMatches, 47 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 531 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=218, Invalid=2134, Unknown=0, NotChecked=0, Total=2352 [2018-04-11 11:07:22,131 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 304 states. [2018-04-11 11:07:22,133 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 304 to 263. [2018-04-11 11:07:22,133 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 263 states. [2018-04-11 11:07:22,133 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 263 states to 263 states and 300 transitions. [2018-04-11 11:07:22,133 INFO L78 Accepts]: Start accepts. Automaton has 263 states and 300 transitions. Word has length 50 [2018-04-11 11:07:22,133 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 11:07:22,134 INFO L459 AbstractCegarLoop]: Abstraction has 263 states and 300 transitions. [2018-04-11 11:07:22,134 INFO L460 AbstractCegarLoop]: Interpolant automaton has 23 states. [2018-04-11 11:07:22,134 INFO L276 IsEmpty]: Start isEmpty. Operand 263 states and 300 transitions. [2018-04-11 11:07:22,134 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2018-04-11 11:07:22,134 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 11:07:22,134 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 11:07:22,134 INFO L408 AbstractCegarLoop]: === Iteration 38 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-11 11:07:22,134 INFO L82 PathProgramCache]: Analyzing trace with hash 1302490113, now seen corresponding path program 1 times [2018-04-11 11:07:22,134 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-11 11:07:22,134 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-11 11:07:22,135 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 11:07:22,135 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 11:07:22,135 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 11:07:22,142 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 11:07:22,142 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 11:07:22,494 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 11:07:22,494 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-11 11:07:22,494 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [22] imperfect sequences [] total 22 [2018-04-11 11:07:22,494 INFO L442 AbstractCegarLoop]: Interpolant automaton has 23 states [2018-04-11 11:07:22,494 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2018-04-11 11:07:22,494 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=51, Invalid=455, Unknown=0, NotChecked=0, Total=506 [2018-04-11 11:07:22,494 INFO L87 Difference]: Start difference. First operand 263 states and 300 transitions. Second operand 23 states. [2018-04-11 11:07:23,489 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 11:07:23,489 INFO L93 Difference]: Finished difference Result 303 states and 338 transitions. [2018-04-11 11:07:23,489 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2018-04-11 11:07:23,489 INFO L78 Accepts]: Start accepts. Automaton has 23 states. Word has length 51 [2018-04-11 11:07:23,489 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 11:07:23,490 INFO L225 Difference]: With dead ends: 303 [2018-04-11 11:07:23,490 INFO L226 Difference]: Without dead ends: 303 [2018-04-11 11:07:23,490 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 52 GetRequests, 3 SyntacticMatches, 3 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 500 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=213, Invalid=2043, Unknown=0, NotChecked=0, Total=2256 [2018-04-11 11:07:23,491 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 303 states. [2018-04-11 11:07:23,493 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 303 to 263. [2018-04-11 11:07:23,493 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 263 states. [2018-04-11 11:07:23,494 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 263 states to 263 states and 298 transitions. [2018-04-11 11:07:23,494 INFO L78 Accepts]: Start accepts. Automaton has 263 states and 298 transitions. Word has length 51 [2018-04-11 11:07:23,494 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 11:07:23,494 INFO L459 AbstractCegarLoop]: Abstraction has 263 states and 298 transitions. [2018-04-11 11:07:23,494 INFO L460 AbstractCegarLoop]: Interpolant automaton has 23 states. [2018-04-11 11:07:23,494 INFO L276 IsEmpty]: Start isEmpty. Operand 263 states and 298 transitions. [2018-04-11 11:07:23,495 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2018-04-11 11:07:23,495 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 11:07:23,495 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 11:07:23,495 INFO L408 AbstractCegarLoop]: === Iteration 39 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-11 11:07:23,496 INFO L82 PathProgramCache]: Analyzing trace with hash -1740139545, now seen corresponding path program 1 times [2018-04-11 11:07:23,496 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-11 11:07:23,496 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-11 11:07:23,496 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 11:07:23,496 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 11:07:23,496 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 11:07:23,505 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 11:07:23,506 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 11:07:23,880 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 2 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 11:07:23,880 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-11 11:07:23,880 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-11 11:07:23,886 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 11:07:23,905 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 11:07:23,909 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-11 11:07:23,932 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-04-11 11:07:23,935 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-11 11:07:23,935 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-11 11:07:23,936 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 11:07:23,940 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-04-11 11:07:23,941 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-11 11:07:23,941 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-11 11:07:23,941 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 11:07:23,944 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-11 11:07:23,944 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:26, output treesize:18 [2018-04-11 11:07:24,085 WARN L1033 $PredicateComparison]: unable to prove that (exists ((__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.base Int) (__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.offset Int) (|__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#t~ret14.base| Int) (|__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#t~ret14.offset| Int)) (let ((.cse1 (+ __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.offset 4))) (and (= (let ((.cse0 (store |c_old(#memory_$Pointer$.base)| __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.base (store (store (select |c_old(#memory_$Pointer$.base)| __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.base) .cse1 (select (select |c_old(#memory_$Pointer$.base)| |c___U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#in~pointerToList.base|) |c___U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#in~pointerToList.offset|)) __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.offset |__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#t~ret14.base|)))) (store .cse0 |c___U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#in~pointerToList.base| (store (select .cse0 |c___U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#in~pointerToList.base|) |c___U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#in~pointerToList.offset| __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.base))) |c_#memory_$Pointer$.base|) (<= 0 __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.offset) (= (let ((.cse2 (store |c_old(#memory_$Pointer$.offset)| __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.base (store (store (select |c_old(#memory_$Pointer$.offset)| __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.base) .cse1 (select (select |c_old(#memory_$Pointer$.offset)| |c___U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#in~pointerToList.base|) |c___U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#in~pointerToList.offset|)) __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.offset |__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#t~ret14.offset|)))) (store .cse2 |c___U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#in~pointerToList.base| (store (select .cse2 |c___U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#in~pointerToList.base|) |c___U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#in~pointerToList.offset| __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.offset))) |c_#memory_$Pointer$.offset|) (<= __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.offset 0)))) is different from true [2018-04-11 11:07:24,171 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 40 [2018-04-11 11:07:24,174 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 20 [2018-04-11 11:07:24,176 INFO L700 Elim1Store]: detected not equals via solver [2018-04-11 11:07:24,178 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 27 [2018-04-11 11:07:24,178 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-11 11:07:24,183 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 11:07:24,197 INFO L682 Elim1Store]: detected equality via solver [2018-04-11 11:07:24,199 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 41 [2018-04-11 11:07:24,201 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 32 [2018-04-11 11:07:24,201 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-04-11 11:07:24,206 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 11:07:24,213 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-11 11:07:24,222 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 43 [2018-04-11 11:07:24,224 INFO L700 Elim1Store]: detected not equals via solver [2018-04-11 11:07:24,225 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 41 [2018-04-11 11:07:24,227 INFO L682 Elim1Store]: detected equality via solver [2018-04-11 11:07:24,230 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 40 [2018-04-11 11:07:24,230 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-04-11 11:07:24,236 INFO L267 ElimStorePlain]: Start of recursive call 8: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 11:07:24,246 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 21 [2018-04-11 11:07:24,248 INFO L700 Elim1Store]: detected not equals via solver [2018-04-11 11:07:24,248 INFO L682 Elim1Store]: detected equality via solver [2018-04-11 11:07:24,250 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 26 [2018-04-11 11:07:24,250 INFO L267 ElimStorePlain]: Start of recursive call 11: End of recursive call: and 1 xjuncts. [2018-04-11 11:07:24,254 INFO L267 ElimStorePlain]: Start of recursive call 10: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 11:07:24,259 INFO L267 ElimStorePlain]: Start of recursive call 7: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-11 11:07:24,292 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 43 [2018-04-11 11:07:24,294 INFO L700 Elim1Store]: detected not equals via solver [2018-04-11 11:07:24,295 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 41 [2018-04-11 11:07:24,297 INFO L682 Elim1Store]: detected equality via solver [2018-04-11 11:07:24,299 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 40 [2018-04-11 11:07:24,299 INFO L267 ElimStorePlain]: Start of recursive call 14: End of recursive call: and 1 xjuncts. [2018-04-11 11:07:24,306 INFO L267 ElimStorePlain]: Start of recursive call 13: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 11:07:24,312 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 21 [2018-04-11 11:07:24,314 INFO L700 Elim1Store]: detected not equals via solver [2018-04-11 11:07:24,314 INFO L682 Elim1Store]: detected equality via solver [2018-04-11 11:07:24,316 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 26 [2018-04-11 11:07:24,316 INFO L267 ElimStorePlain]: Start of recursive call 16: End of recursive call: and 1 xjuncts. [2018-04-11 11:07:24,320 INFO L267 ElimStorePlain]: Start of recursive call 15: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 11:07:24,323 INFO L267 ElimStorePlain]: Start of recursive call 12: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-11 11:07:24,326 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 40 [2018-04-11 11:07:24,328 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 20 [2018-04-11 11:07:24,330 INFO L700 Elim1Store]: detected not equals via solver [2018-04-11 11:07:24,331 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 27 [2018-04-11 11:07:24,332 INFO L267 ElimStorePlain]: Start of recursive call 19: End of recursive call: and 1 xjuncts. [2018-04-11 11:07:24,336 INFO L267 ElimStorePlain]: Start of recursive call 18: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 11:07:24,345 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 36 [2018-04-11 11:07:24,348 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 23 [2018-04-11 11:07:24,349 INFO L267 ElimStorePlain]: Start of recursive call 21: End of recursive call: and 1 xjuncts. [2018-04-11 11:07:24,353 INFO L267 ElimStorePlain]: Start of recursive call 20: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 11:07:24,357 INFO L267 ElimStorePlain]: Start of recursive call 17: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-11 11:07:24,375 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 2 dim-2 vars, End of recursive call: 5 dim-0 vars, and 4 xjuncts. [2018-04-11 11:07:24,375 INFO L202 ElimStorePlain]: Needed 21 recursive calls to eliminate 6 variables, input treesize:114, output treesize:201 [2018-04-11 11:07:24,732 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-04-11 11:07:24,732 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-11 11:07:24,743 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-04-11 11:07:24,743 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:98, output treesize:97 [2018-04-11 11:07:24,787 INFO L700 Elim1Store]: detected not equals via solver [2018-04-11 11:07:24,788 INFO L700 Elim1Store]: detected not equals via solver [2018-04-11 11:07:24,788 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 8 [2018-04-11 11:07:24,788 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-11 11:07:24,804 INFO L700 Elim1Store]: detected not equals via solver [2018-04-11 11:07:24,804 INFO L682 Elim1Store]: detected equality via solver [2018-04-11 11:07:24,808 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 81 treesize of output 77 [2018-04-11 11:07:24,812 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 64 treesize of output 58 [2018-04-11 11:07:24,812 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-11 11:07:24,817 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 11:07:24,829 INFO L682 Elim1Store]: detected equality via solver [2018-04-11 11:07:24,830 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 67 treesize of output 75 [2018-04-11 11:07:24,832 INFO L682 Elim1Store]: detected equality via solver [2018-04-11 11:07:24,832 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 62 treesize of output 90 [2018-04-11 11:07:24,832 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-04-11 11:07:24,837 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 11:07:24,845 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, 2 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-04-11 11:07:24,845 INFO L202 ElimStorePlain]: Needed 6 recursive calls to eliminate 5 variables, input treesize:118, output treesize:82 [2018-04-11 11:07:24,884 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 42 treesize of output 36 [2018-04-11 11:07:24,885 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 21 [2018-04-11 11:07:24,885 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-11 11:07:24,889 INFO L682 Elim1Store]: detected equality via solver [2018-04-11 11:07:24,890 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 17 [2018-04-11 11:07:24,890 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-11 11:07:24,892 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 11:07:24,899 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 42 treesize of output 34 [2018-04-11 11:07:24,900 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2018-04-11 11:07:24,901 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-04-11 11:07:24,904 INFO L682 Elim1Store]: detected equality via solver [2018-04-11 11:07:24,904 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 11 [2018-04-11 11:07:24,905 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-04-11 11:07:24,906 INFO L267 ElimStorePlain]: Start of recursive call 5: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 11:07:24,910 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-11 11:07:24,910 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 5 variables, input treesize:93, output treesize:7 [2018-04-11 11:07:24,940 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 2 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 11:07:24,958 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-11 11:07:24,958 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 22] total 36 [2018-04-11 11:07:24,958 INFO L442 AbstractCegarLoop]: Interpolant automaton has 36 states [2018-04-11 11:07:24,959 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2018-04-11 11:07:24,959 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=141, Invalid=1049, Unknown=4, NotChecked=66, Total=1260 [2018-04-11 11:07:24,959 INFO L87 Difference]: Start difference. First operand 263 states and 298 transitions. Second operand 36 states. [2018-04-11 11:07:26,245 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 11:07:26,246 INFO L93 Difference]: Finished difference Result 283 states and 321 transitions. [2018-04-11 11:07:26,246 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2018-04-11 11:07:26,246 INFO L78 Accepts]: Start accepts. Automaton has 36 states. Word has length 53 [2018-04-11 11:07:26,246 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 11:07:26,247 INFO L225 Difference]: With dead ends: 283 [2018-04-11 11:07:26,247 INFO L226 Difference]: Without dead ends: 283 [2018-04-11 11:07:26,248 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 92 GetRequests, 40 SyntacticMatches, 3 SemanticMatches, 49 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 584 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=279, Invalid=2169, Unknown=6, NotChecked=96, Total=2550 [2018-04-11 11:07:26,248 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 283 states. [2018-04-11 11:07:26,250 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 283 to 273. [2018-04-11 11:07:26,250 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 273 states. [2018-04-11 11:07:26,250 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 273 states to 273 states and 308 transitions. [2018-04-11 11:07:26,250 INFO L78 Accepts]: Start accepts. Automaton has 273 states and 308 transitions. Word has length 53 [2018-04-11 11:07:26,251 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 11:07:26,251 INFO L459 AbstractCegarLoop]: Abstraction has 273 states and 308 transitions. [2018-04-11 11:07:26,251 INFO L460 AbstractCegarLoop]: Interpolant automaton has 36 states. [2018-04-11 11:07:26,251 INFO L276 IsEmpty]: Start isEmpty. Operand 273 states and 308 transitions. [2018-04-11 11:07:26,251 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2018-04-11 11:07:26,252 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 11:07:26,252 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 11:07:26,252 INFO L408 AbstractCegarLoop]: === Iteration 40 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-11 11:07:26,252 INFO L82 PathProgramCache]: Analyzing trace with hash -1532747612, now seen corresponding path program 1 times [2018-04-11 11:07:26,252 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-11 11:07:26,252 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-11 11:07:26,253 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 11:07:26,253 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 11:07:26,253 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 11:07:26,259 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 11:07:26,260 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 11:07:26,468 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 11:07:26,468 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-11 11:07:26,468 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-11 11:07:26,476 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 11:07:26,504 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 11:07:26,508 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-11 11:07:26,577 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-04-11 11:07:26,578 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-11 11:07:26,579 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-11 11:07:26,580 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 11:07:26,585 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-11 11:07:26,585 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:23, output treesize:20 [2018-04-11 11:07:26,633 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 8 [2018-04-11 11:07:26,633 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-11 11:07:26,637 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-11 11:07:26,637 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:21, output treesize:12 [2018-04-11 11:07:32,654 WARN L148 SmtUtils]: Spent 2003ms on a formula simplification that was a NOOP. DAG size: 12 [2018-04-11 11:07:32,672 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 27 [2018-04-11 11:07:32,673 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 18 [2018-04-11 11:07:32,673 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-11 11:07:32,676 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 11:07:32,679 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-11 11:07:32,679 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:38, output treesize:23 [2018-04-11 11:07:32,740 WARN L1033 $PredicateComparison]: unable to prove that (exists ((|main_~#list~0.base| Int) (|main_#t~mem20.base| Int)) (let ((.cse0 (store |c_old(#valid)| |main_~#list~0.base| 1))) (and (= 0 (select |c_old(#valid)| |main_~#list~0.base|)) (= (store (store .cse0 |main_#t~mem20.base| 0) |main_~#list~0.base| 0) |c_#valid|) (= 0 (select .cse0 |main_#t~mem20.base|))))) is different from true [2018-04-11 11:07:32,747 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 11:07:32,765 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-11 11:07:32,766 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 12] total 19 [2018-04-11 11:07:32,766 INFO L442 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-04-11 11:07:32,766 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-04-11 11:07:32,766 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=49, Invalid=291, Unknown=6, NotChecked=34, Total=380 [2018-04-11 11:07:32,766 INFO L87 Difference]: Start difference. First operand 273 states and 308 transitions. Second operand 20 states. [2018-04-11 11:07:52,968 WARN L148 SmtUtils]: Spent 2004ms on a formula simplification that was a NOOP. DAG size: 18 [2018-04-11 11:08:35,783 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 11:08:35,783 INFO L93 Difference]: Finished difference Result 285 states and 321 transitions. [2018-04-11 11:08:35,784 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-04-11 11:08:35,784 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 55 [2018-04-11 11:08:35,784 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 11:08:35,784 INFO L225 Difference]: With dead ends: 285 [2018-04-11 11:08:35,784 INFO L226 Difference]: Without dead ends: 258 [2018-04-11 11:08:35,785 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 81 GetRequests, 48 SyntacticMatches, 6 SemanticMatches, 27 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 167 ImplicationChecksByTransitivity, 12.4s TimeCoverageRelationStatistics Valid=108, Invalid=643, Unknown=9, NotChecked=52, Total=812 [2018-04-11 11:08:35,785 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 258 states. [2018-04-11 11:08:35,787 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 258 to 250. [2018-04-11 11:08:35,788 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 250 states. [2018-04-11 11:08:35,788 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 250 states to 250 states and 284 transitions. [2018-04-11 11:08:35,788 INFO L78 Accepts]: Start accepts. Automaton has 250 states and 284 transitions. Word has length 55 [2018-04-11 11:08:35,789 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 11:08:35,789 INFO L459 AbstractCegarLoop]: Abstraction has 250 states and 284 transitions. [2018-04-11 11:08:35,789 INFO L460 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-04-11 11:08:35,789 INFO L276 IsEmpty]: Start isEmpty. Operand 250 states and 284 transitions. [2018-04-11 11:08:35,789 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2018-04-11 11:08:35,790 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 11:08:35,790 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 11:08:35,790 INFO L408 AbstractCegarLoop]: === Iteration 41 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-11 11:08:35,790 INFO L82 PathProgramCache]: Analyzing trace with hash 787271707, now seen corresponding path program 1 times [2018-04-11 11:08:35,790 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-11 11:08:35,790 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-11 11:08:35,791 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 11:08:35,791 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 11:08:35,791 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 11:08:35,803 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 11:08:35,803 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 11:08:36,030 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 12 proven. 6 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-04-11 11:08:36,030 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-11 11:08:36,030 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-11 11:08:36,035 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 11:08:36,060 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 11:08:36,064 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-11 11:08:36,144 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-04-11 11:08:36,145 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-11 11:08:36,145 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-11 11:08:36,146 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 11:08:36,151 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-11 11:08:36,151 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:28, output treesize:21 [2018-04-11 11:08:36,173 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-04-11 11:08:36,174 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-11 11:08:36,174 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-11 11:08:36,175 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 11:08:36,188 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 21 treesize of output 33 [2018-04-11 11:08:36,200 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 19 treesize of output 35 [2018-04-11 11:08:36,201 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-04-11 11:08:36,216 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 17 [2018-04-11 11:08:36,216 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-04-11 11:08:36,226 INFO L267 ElimStorePlain]: Start of recursive call 4: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-04-11 11:08:36,235 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-04-11 11:08:36,236 INFO L202 ElimStorePlain]: Needed 6 recursive calls to eliminate 4 variables, input treesize:37, output treesize:53 [2018-04-11 11:08:36,266 INFO L700 Elim1Store]: detected not equals via solver [2018-04-11 11:08:36,267 INFO L700 Elim1Store]: detected not equals via solver [2018-04-11 11:08:36,267 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 29 [2018-04-11 11:08:36,267 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-11 11:08:36,277 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 11:08:36,277 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:69, output treesize:29 [2018-04-11 11:08:36,308 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 21 [2018-04-11 11:08:36,315 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2018-04-11 11:08:36,316 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-11 11:08:36,317 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 11:08:36,320 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-11 11:08:36,321 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:40, output treesize:29 [2018-04-11 11:08:36,354 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 24 [2018-04-11 11:08:36,355 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2018-04-11 11:08:36,356 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-11 11:08:36,378 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 5 [2018-04-11 11:08:36,379 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-11 11:08:36,383 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 11:08:36,384 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-11 11:08:36,385 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 3 variables, input treesize:33, output treesize:5 [2018-04-11 11:08:36,427 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 6 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 11:08:36,458 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-11 11:08:36,459 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19] total 27 [2018-04-11 11:08:36,459 INFO L442 AbstractCegarLoop]: Interpolant automaton has 28 states [2018-04-11 11:08:36,459 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2018-04-11 11:08:36,459 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=76, Invalid=680, Unknown=0, NotChecked=0, Total=756 [2018-04-11 11:08:36,460 INFO L87 Difference]: Start difference. First operand 250 states and 284 transitions. Second operand 28 states. [2018-04-11 11:08:37,214 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 11:08:37,215 INFO L93 Difference]: Finished difference Result 290 states and 327 transitions. [2018-04-11 11:08:37,215 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2018-04-11 11:08:37,215 INFO L78 Accepts]: Start accepts. Automaton has 28 states. Word has length 67 [2018-04-11 11:08:37,215 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 11:08:37,216 INFO L225 Difference]: With dead ends: 290 [2018-04-11 11:08:37,216 INFO L226 Difference]: Without dead ends: 290 [2018-04-11 11:08:37,216 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 108 GetRequests, 53 SyntacticMatches, 9 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 490 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=235, Invalid=2021, Unknown=0, NotChecked=0, Total=2256 [2018-04-11 11:08:37,216 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 290 states. [2018-04-11 11:08:37,219 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 290 to 258. [2018-04-11 11:08:37,219 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 258 states. [2018-04-11 11:08:37,220 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 258 states to 258 states and 293 transitions. [2018-04-11 11:08:37,220 INFO L78 Accepts]: Start accepts. Automaton has 258 states and 293 transitions. Word has length 67 [2018-04-11 11:08:37,220 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 11:08:37,220 INFO L459 AbstractCegarLoop]: Abstraction has 258 states and 293 transitions. [2018-04-11 11:08:37,220 INFO L460 AbstractCegarLoop]: Interpolant automaton has 28 states. [2018-04-11 11:08:37,220 INFO L276 IsEmpty]: Start isEmpty. Operand 258 states and 293 transitions. [2018-04-11 11:08:37,221 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2018-04-11 11:08:37,221 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 11:08:37,221 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 11:08:37,221 INFO L408 AbstractCegarLoop]: === Iteration 42 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-11 11:08:37,221 INFO L82 PathProgramCache]: Analyzing trace with hash 787271708, now seen corresponding path program 1 times [2018-04-11 11:08:37,222 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-11 11:08:37,222 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-11 11:08:37,222 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 11:08:37,222 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 11:08:37,222 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 11:08:37,233 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 11:08:37,234 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 11:08:37,615 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 7 proven. 11 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-04-11 11:08:37,615 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-11 11:08:37,615 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-11 11:08:37,625 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 11:08:37,671 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 11:08:37,675 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-11 11:08:37,866 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-04-11 11:08:37,867 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-11 11:08:37,867 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-11 11:08:37,870 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 11:08:37,878 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-04-11 11:08:37,879 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-11 11:08:37,879 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-11 11:08:37,880 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 11:08:37,886 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-11 11:08:37,886 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:39, output treesize:28 [2018-04-11 11:08:37,920 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 21 treesize of output 33 [2018-04-11 11:08:37,922 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 21 [2018-04-11 11:08:37,923 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-11 11:08:37,939 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 19 treesize of output 27 [2018-04-11 11:08:37,940 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-04-11 11:08:37,952 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-04-11 11:08:37,973 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 19 treesize of output 31 [2018-04-11 11:08:37,975 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-04-11 11:08:37,975 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-04-11 11:08:37,991 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 17 treesize of output 22 [2018-04-11 11:08:37,991 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 2 xjuncts. [2018-04-11 11:08:38,000 INFO L267 ElimStorePlain]: Start of recursive call 5: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-11 11:08:38,016 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: 2 dim-0 vars, and 4 xjuncts. [2018-04-11 11:08:38,016 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 4 variables, input treesize:44, output treesize:133 [2018-04-11 11:08:38,083 INFO L700 Elim1Store]: detected not equals via solver [2018-04-11 11:08:38,084 INFO L700 Elim1Store]: detected not equals via solver [2018-04-11 11:08:38,084 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 50 treesize of output 44 [2018-04-11 11:08:38,084 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-11 11:08:38,094 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 11:08:38,094 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:84, output treesize:44 [2018-04-11 11:08:38,160 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 71 treesize of output 58 [2018-04-11 11:08:38,162 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 27 [2018-04-11 11:08:38,163 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-11 11:08:38,171 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 5 [2018-04-11 11:08:38,171 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-11 11:08:38,175 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-11 11:08:38,181 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2018-04-11 11:08:38,183 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2018-04-11 11:08:38,183 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-11 11:08:38,187 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2018-04-11 11:08:38,188 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-04-11 11:08:38,188 INFO L267 ElimStorePlain]: Start of recursive call 5: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 11:08:38,191 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-11 11:08:38,191 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 3 variables, input treesize:71, output treesize:9 [2018-04-11 11:08:38,254 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 6 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 11:08:38,272 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-11 11:08:38,272 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 21] total 35 [2018-04-11 11:08:38,272 INFO L442 AbstractCegarLoop]: Interpolant automaton has 36 states [2018-04-11 11:08:38,272 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2018-04-11 11:08:38,272 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=94, Invalid=1166, Unknown=0, NotChecked=0, Total=1260 [2018-04-11 11:08:38,273 INFO L87 Difference]: Start difference. First operand 258 states and 293 transitions. Second operand 36 states. [2018-04-11 11:08:39,955 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 11:08:39,955 INFO L93 Difference]: Finished difference Result 329 states and 366 transitions. [2018-04-11 11:08:39,955 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 43 states. [2018-04-11 11:08:39,955 INFO L78 Accepts]: Start accepts. Automaton has 36 states. Word has length 67 [2018-04-11 11:08:39,955 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 11:08:39,956 INFO L225 Difference]: With dead ends: 329 [2018-04-11 11:08:39,956 INFO L226 Difference]: Without dead ends: 329 [2018-04-11 11:08:39,957 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 128 GetRequests, 51 SyntacticMatches, 7 SemanticMatches, 70 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1134 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=405, Invalid=4707, Unknown=0, NotChecked=0, Total=5112 [2018-04-11 11:08:39,957 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 329 states. [2018-04-11 11:08:39,959 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 329 to 271. [2018-04-11 11:08:39,959 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 271 states. [2018-04-11 11:08:39,960 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 271 states to 271 states and 306 transitions. [2018-04-11 11:08:39,960 INFO L78 Accepts]: Start accepts. Automaton has 271 states and 306 transitions. Word has length 67 [2018-04-11 11:08:39,960 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 11:08:39,960 INFO L459 AbstractCegarLoop]: Abstraction has 271 states and 306 transitions. [2018-04-11 11:08:39,960 INFO L460 AbstractCegarLoop]: Interpolant automaton has 36 states. [2018-04-11 11:08:39,960 INFO L276 IsEmpty]: Start isEmpty. Operand 271 states and 306 transitions. [2018-04-11 11:08:39,961 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2018-04-11 11:08:39,961 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 11:08:39,961 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 11:08:39,961 INFO L408 AbstractCegarLoop]: === Iteration 43 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-11 11:08:39,961 INFO L82 PathProgramCache]: Analyzing trace with hash 1887046790, now seen corresponding path program 1 times [2018-04-11 11:08:39,961 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-11 11:08:39,962 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-11 11:08:39,962 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 11:08:39,962 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 11:08:39,962 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 11:08:39,971 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 11:08:39,972 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 11:08:40,270 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 7 proven. 11 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-04-11 11:08:40,270 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-11 11:08:40,270 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-11 11:08:40,275 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 11:08:40,300 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 11:08:40,303 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-11 11:08:40,380 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-04-11 11:08:40,382 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-11 11:08:40,382 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-11 11:08:40,383 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 11:08:40,389 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-04-11 11:08:40,390 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-11 11:08:40,390 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-11 11:08:40,391 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 11:08:40,395 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-11 11:08:40,395 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:34, output treesize:26 [2018-04-11 11:08:40,424 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 19 treesize of output 31 [2018-04-11 11:08:40,431 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 17 treesize of output 22 [2018-04-11 11:08:40,431 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 2 xjuncts. [2018-04-11 11:08:40,445 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 15 [2018-04-11 11:08:40,445 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-11 11:08:40,453 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-11 11:08:40,473 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 19 treesize of output 31 [2018-04-11 11:08:40,479 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 17 treesize of output 22 [2018-04-11 11:08:40,479 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 2 xjuncts. [2018-04-11 11:08:40,492 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 15 [2018-04-11 11:08:40,492 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-04-11 11:08:40,501 INFO L267 ElimStorePlain]: Start of recursive call 5: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-11 11:08:40,514 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 4 xjuncts. [2018-04-11 11:08:40,515 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 4 variables, input treesize:42, output treesize:123 [2018-04-11 11:08:40,566 WARN L307 Elim1Store]: Array PQE input equivalent to false [2018-04-11 11:08:40,566 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-11 11:08:40,572 INFO L700 Elim1Store]: detected not equals via solver [2018-04-11 11:08:40,572 INFO L700 Elim1Store]: detected not equals via solver [2018-04-11 11:08:40,573 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 8 [2018-04-11 11:08:40,573 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-11 11:08:40,576 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 11:08:40,577 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:77, output treesize:42 [2018-04-11 11:08:40,624 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 69 treesize of output 56 [2018-04-11 11:08:40,625 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 27 [2018-04-11 11:08:40,626 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-11 11:08:40,632 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 3 [2018-04-11 11:08:40,632 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-11 11:08:40,636 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-11 11:08:40,648 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2018-04-11 11:08:40,649 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 3 [2018-04-11 11:08:40,649 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-04-11 11:08:40,652 INFO L267 ElimStorePlain]: Start of recursive call 5: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 11:08:40,654 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-11 11:08:40,654 INFO L202 ElimStorePlain]: Needed 6 recursive calls to eliminate 3 variables, input treesize:69, output treesize:7 [2018-04-11 11:08:40,669 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 6 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 11:08:40,688 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-11 11:08:40,688 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19] total 27 [2018-04-11 11:08:40,689 INFO L442 AbstractCegarLoop]: Interpolant automaton has 27 states [2018-04-11 11:08:40,689 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2018-04-11 11:08:40,689 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=73, Invalid=626, Unknown=3, NotChecked=0, Total=702 [2018-04-11 11:08:40,689 INFO L87 Difference]: Start difference. First operand 271 states and 306 transitions. Second operand 27 states. [2018-04-11 11:08:41,419 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 11:08:41,419 INFO L93 Difference]: Finished difference Result 295 states and 330 transitions. [2018-04-11 11:08:41,434 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2018-04-11 11:08:41,434 INFO L78 Accepts]: Start accepts. Automaton has 27 states. Word has length 60 [2018-04-11 11:08:41,434 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 11:08:41,435 INFO L225 Difference]: With dead ends: 295 [2018-04-11 11:08:41,435 INFO L226 Difference]: Without dead ends: 295 [2018-04-11 11:08:41,435 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 101 GetRequests, 48 SyntacticMatches, 7 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 498 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=251, Invalid=2002, Unknown=3, NotChecked=0, Total=2256 [2018-04-11 11:08:41,436 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 295 states. [2018-04-11 11:08:41,438 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 295 to 275. [2018-04-11 11:08:41,438 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 275 states. [2018-04-11 11:08:41,439 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 275 states to 275 states and 308 transitions. [2018-04-11 11:08:41,439 INFO L78 Accepts]: Start accepts. Automaton has 275 states and 308 transitions. Word has length 60 [2018-04-11 11:08:41,439 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 11:08:41,439 INFO L459 AbstractCegarLoop]: Abstraction has 275 states and 308 transitions. [2018-04-11 11:08:41,439 INFO L460 AbstractCegarLoop]: Interpolant automaton has 27 states. [2018-04-11 11:08:41,439 INFO L276 IsEmpty]: Start isEmpty. Operand 275 states and 308 transitions. [2018-04-11 11:08:41,440 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2018-04-11 11:08:41,440 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 11:08:41,440 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 11:08:41,440 INFO L408 AbstractCegarLoop]: === Iteration 44 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-11 11:08:41,440 INFO L82 PathProgramCache]: Analyzing trace with hash -660061586, now seen corresponding path program 1 times [2018-04-11 11:08:41,441 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-11 11:08:41,441 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-11 11:08:41,441 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 11:08:41,441 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 11:08:41,441 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 11:08:41,449 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 11:08:41,450 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 11:08:41,783 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 11:08:41,783 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-11 11:08:41,783 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [19] imperfect sequences [] total 19 [2018-04-11 11:08:41,783 INFO L442 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-04-11 11:08:41,783 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-04-11 11:08:41,783 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=50, Invalid=330, Unknown=0, NotChecked=0, Total=380 [2018-04-11 11:08:41,784 INFO L87 Difference]: Start difference. First operand 275 states and 308 transitions. Second operand 20 states. [2018-04-11 11:08:42,287 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 11:08:42,287 INFO L93 Difference]: Finished difference Result 311 states and 347 transitions. [2018-04-11 11:08:42,287 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-04-11 11:08:42,287 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 55 [2018-04-11 11:08:42,287 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 11:08:42,288 INFO L225 Difference]: With dead ends: 311 [2018-04-11 11:08:42,288 INFO L226 Difference]: Without dead ends: 311 [2018-04-11 11:08:42,288 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 38 GetRequests, 4 SyntacticMatches, 2 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 230 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=140, Invalid=982, Unknown=0, NotChecked=0, Total=1122 [2018-04-11 11:08:42,288 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 311 states. [2018-04-11 11:08:42,290 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 311 to 288. [2018-04-11 11:08:42,290 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 288 states. [2018-04-11 11:08:42,291 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 288 states to 288 states and 322 transitions. [2018-04-11 11:08:42,291 INFO L78 Accepts]: Start accepts. Automaton has 288 states and 322 transitions. Word has length 55 [2018-04-11 11:08:42,291 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 11:08:42,291 INFO L459 AbstractCegarLoop]: Abstraction has 288 states and 322 transitions. [2018-04-11 11:08:42,291 INFO L460 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-04-11 11:08:42,291 INFO L276 IsEmpty]: Start isEmpty. Operand 288 states and 322 transitions. [2018-04-11 11:08:42,292 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2018-04-11 11:08:42,292 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 11:08:42,292 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 11:08:42,292 INFO L408 AbstractCegarLoop]: === Iteration 45 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-11 11:08:42,292 INFO L82 PathProgramCache]: Analyzing trace with hash -1628221628, now seen corresponding path program 1 times [2018-04-11 11:08:42,292 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-11 11:08:42,292 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-11 11:08:42,292 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 11:08:42,292 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 11:08:42,292 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 11:08:42,301 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 11:08:42,301 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 11:08:42,832 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 11:08:42,832 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-11 11:08:42,833 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [26] imperfect sequences [] total 26 [2018-04-11 11:08:42,833 INFO L442 AbstractCegarLoop]: Interpolant automaton has 27 states [2018-04-11 11:08:42,833 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2018-04-11 11:08:42,833 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=64, Invalid=638, Unknown=0, NotChecked=0, Total=702 [2018-04-11 11:08:42,833 INFO L87 Difference]: Start difference. First operand 288 states and 322 transitions. Second operand 27 states. [2018-04-11 11:08:43,895 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 11:08:43,895 INFO L93 Difference]: Finished difference Result 326 states and 362 transitions. [2018-04-11 11:08:43,896 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 42 states. [2018-04-11 11:08:43,896 INFO L78 Accepts]: Start accepts. Automaton has 27 states. Word has length 55 [2018-04-11 11:08:43,896 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 11:08:43,897 INFO L225 Difference]: With dead ends: 326 [2018-04-11 11:08:43,897 INFO L226 Difference]: Without dead ends: 326 [2018-04-11 11:08:43,897 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 62 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 58 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 811 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=339, Invalid=3201, Unknown=0, NotChecked=0, Total=3540 [2018-04-11 11:08:43,898 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 326 states. [2018-04-11 11:08:43,900 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 326 to 288. [2018-04-11 11:08:43,900 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 288 states. [2018-04-11 11:08:43,901 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 288 states to 288 states and 320 transitions. [2018-04-11 11:08:43,901 INFO L78 Accepts]: Start accepts. Automaton has 288 states and 320 transitions. Word has length 55 [2018-04-11 11:08:43,901 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 11:08:43,901 INFO L459 AbstractCegarLoop]: Abstraction has 288 states and 320 transitions. [2018-04-11 11:08:43,901 INFO L460 AbstractCegarLoop]: Interpolant automaton has 27 states. [2018-04-11 11:08:43,901 INFO L276 IsEmpty]: Start isEmpty. Operand 288 states and 320 transitions. [2018-04-11 11:08:43,901 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2018-04-11 11:08:43,901 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 11:08:43,902 INFO L355 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 11:08:43,902 INFO L408 AbstractCegarLoop]: === Iteration 46 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-11 11:08:43,902 INFO L82 PathProgramCache]: Analyzing trace with hash 1400615347, now seen corresponding path program 1 times [2018-04-11 11:08:43,902 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-11 11:08:43,902 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-11 11:08:43,902 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 11:08:43,902 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 11:08:43,902 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 11:08:43,908 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 11:08:43,909 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 11:08:43,934 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 0 proven. 27 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 11:08:43,934 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-11 11:08:43,934 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-11 11:08:43,940 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 11:08:43,959 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 11:08:43,961 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-11 11:08:43,972 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 0 proven. 27 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 11:08:43,990 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-11 11:08:43,990 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 7 [2018-04-11 11:08:43,990 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-04-11 11:08:43,990 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-04-11 11:08:43,990 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2018-04-11 11:08:43,990 INFO L87 Difference]: Start difference. First operand 288 states and 320 transitions. Second operand 7 states. [2018-04-11 11:08:44,002 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 11:08:44,002 INFO L93 Difference]: Finished difference Result 300 states and 332 transitions. [2018-04-11 11:08:44,002 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-04-11 11:08:44,002 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 54 [2018-04-11 11:08:44,002 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 11:08:44,003 INFO L225 Difference]: With dead ends: 300 [2018-04-11 11:08:44,003 INFO L226 Difference]: Without dead ends: 300 [2018-04-11 11:08:44,003 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 59 GetRequests, 54 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2018-04-11 11:08:44,003 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 300 states. [2018-04-11 11:08:44,006 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 300 to 295. [2018-04-11 11:08:44,006 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 295 states. [2018-04-11 11:08:44,007 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 295 states to 295 states and 327 transitions. [2018-04-11 11:08:44,007 INFO L78 Accepts]: Start accepts. Automaton has 295 states and 327 transitions. Word has length 54 [2018-04-11 11:08:44,007 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 11:08:44,007 INFO L459 AbstractCegarLoop]: Abstraction has 295 states and 327 transitions. [2018-04-11 11:08:44,007 INFO L460 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-04-11 11:08:44,007 INFO L276 IsEmpty]: Start isEmpty. Operand 295 states and 327 transitions. [2018-04-11 11:08:44,008 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2018-04-11 11:08:44,008 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 11:08:44,008 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 11:08:44,008 INFO L408 AbstractCegarLoop]: === Iteration 47 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-11 11:08:44,008 INFO L82 PathProgramCache]: Analyzing trace with hash 1335978638, now seen corresponding path program 1 times [2018-04-11 11:08:44,008 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-11 11:08:44,009 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-11 11:08:44,009 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 11:08:44,009 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 11:08:44,009 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 11:08:44,017 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 11:08:44,017 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 11:08:44,317 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 11:08:44,317 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-11 11:08:44,317 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [18] imperfect sequences [] total 18 [2018-04-11 11:08:44,317 INFO L442 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-04-11 11:08:44,317 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-04-11 11:08:44,318 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=47, Invalid=295, Unknown=0, NotChecked=0, Total=342 [2018-04-11 11:08:44,318 INFO L87 Difference]: Start difference. First operand 295 states and 327 transitions. Second operand 19 states. [2018-04-11 11:08:44,841 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 11:08:44,842 INFO L93 Difference]: Finished difference Result 317 states and 350 transitions. [2018-04-11 11:08:44,842 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-04-11 11:08:44,842 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 57 [2018-04-11 11:08:44,842 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 11:08:44,843 INFO L225 Difference]: With dead ends: 317 [2018-04-11 11:08:44,843 INFO L226 Difference]: Without dead ends: 317 [2018-04-11 11:08:44,843 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 33 GetRequests, 2 SyntacticMatches, 3 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 140 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=110, Invalid=760, Unknown=0, NotChecked=0, Total=870 [2018-04-11 11:08:44,843 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 317 states. [2018-04-11 11:08:44,846 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 317 to 287. [2018-04-11 11:08:44,846 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 287 states. [2018-04-11 11:08:44,857 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 287 states to 287 states and 319 transitions. [2018-04-11 11:08:44,857 INFO L78 Accepts]: Start accepts. Automaton has 287 states and 319 transitions. Word has length 57 [2018-04-11 11:08:44,857 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 11:08:44,857 INFO L459 AbstractCegarLoop]: Abstraction has 287 states and 319 transitions. [2018-04-11 11:08:44,857 INFO L460 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-04-11 11:08:44,858 INFO L276 IsEmpty]: Start isEmpty. Operand 287 states and 319 transitions. [2018-04-11 11:08:44,858 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2018-04-11 11:08:44,858 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 11:08:44,859 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 11:08:44,859 INFO L408 AbstractCegarLoop]: === Iteration 48 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-11 11:08:44,859 INFO L82 PathProgramCache]: Analyzing trace with hash -1722226744, now seen corresponding path program 1 times [2018-04-11 11:08:44,859 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-11 11:08:44,859 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-11 11:08:44,860 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 11:08:44,860 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 11:08:44,860 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 11:08:44,867 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 11:08:44,867 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 11:08:45,167 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 11:08:45,167 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-11 11:08:45,167 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [21] imperfect sequences [] total 21 [2018-04-11 11:08:45,167 INFO L442 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-04-11 11:08:45,167 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-04-11 11:08:45,167 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=57, Invalid=363, Unknown=0, NotChecked=0, Total=420 [2018-04-11 11:08:45,167 INFO L87 Difference]: Start difference. First operand 287 states and 319 transitions. Second operand 21 states. [2018-04-11 11:08:45,709 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 11:08:45,709 INFO L93 Difference]: Finished difference Result 325 states and 356 transitions. [2018-04-11 11:08:45,709 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2018-04-11 11:08:45,709 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 60 [2018-04-11 11:08:45,709 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 11:08:45,710 INFO L225 Difference]: With dead ends: 325 [2018-04-11 11:08:45,710 INFO L226 Difference]: Without dead ends: 314 [2018-04-11 11:08:45,711 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 40 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 277 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=186, Invalid=1220, Unknown=0, NotChecked=0, Total=1406 [2018-04-11 11:08:45,711 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 314 states. [2018-04-11 11:08:45,714 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 314 to 294. [2018-04-11 11:08:45,714 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 294 states. [2018-04-11 11:08:45,715 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 294 states to 294 states and 324 transitions. [2018-04-11 11:08:45,715 INFO L78 Accepts]: Start accepts. Automaton has 294 states and 324 transitions. Word has length 60 [2018-04-11 11:08:45,715 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 11:08:45,715 INFO L459 AbstractCegarLoop]: Abstraction has 294 states and 324 transitions. [2018-04-11 11:08:45,715 INFO L460 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-04-11 11:08:45,715 INFO L276 IsEmpty]: Start isEmpty. Operand 294 states and 324 transitions. [2018-04-11 11:08:45,716 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2018-04-11 11:08:45,716 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 11:08:45,716 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 11:08:45,716 INFO L408 AbstractCegarLoop]: === Iteration 49 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-11 11:08:45,716 INFO L82 PathProgramCache]: Analyzing trace with hash 252927534, now seen corresponding path program 1 times [2018-04-11 11:08:45,717 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-11 11:08:45,717 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-11 11:08:45,717 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 11:08:45,717 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 11:08:45,717 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 11:08:45,729 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 11:08:45,730 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 11:08:46,505 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 11:08:46,505 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-11 11:08:46,506 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [26] imperfect sequences [] total 26 [2018-04-11 11:08:46,506 INFO L442 AbstractCegarLoop]: Interpolant automaton has 27 states [2018-04-11 11:08:46,506 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2018-04-11 11:08:46,506 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=68, Invalid=634, Unknown=0, NotChecked=0, Total=702 [2018-04-11 11:08:46,506 INFO L87 Difference]: Start difference. First operand 294 states and 324 transitions. Second operand 27 states. [2018-04-11 11:08:47,376 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 11:08:47,376 INFO L93 Difference]: Finished difference Result 324 states and 357 transitions. [2018-04-11 11:08:47,377 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2018-04-11 11:08:47,377 INFO L78 Accepts]: Start accepts. Automaton has 27 states. Word has length 60 [2018-04-11 11:08:47,377 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 11:08:47,378 INFO L225 Difference]: With dead ends: 324 [2018-04-11 11:08:47,378 INFO L226 Difference]: Without dead ends: 324 [2018-04-11 11:08:47,378 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 49 GetRequests, 4 SyntacticMatches, 4 SemanticMatches, 41 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 361 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=181, Invalid=1625, Unknown=0, NotChecked=0, Total=1806 [2018-04-11 11:08:47,378 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 324 states. [2018-04-11 11:08:47,380 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 324 to 298. [2018-04-11 11:08:47,380 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 298 states. [2018-04-11 11:08:47,381 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 298 states to 298 states and 328 transitions. [2018-04-11 11:08:47,381 INFO L78 Accepts]: Start accepts. Automaton has 298 states and 328 transitions. Word has length 60 [2018-04-11 11:08:47,381 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 11:08:47,381 INFO L459 AbstractCegarLoop]: Abstraction has 298 states and 328 transitions. [2018-04-11 11:08:47,381 INFO L460 AbstractCegarLoop]: Interpolant automaton has 27 states. [2018-04-11 11:08:47,381 INFO L276 IsEmpty]: Start isEmpty. Operand 298 states and 328 transitions. [2018-04-11 11:08:47,382 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 63 [2018-04-11 11:08:47,382 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 11:08:47,382 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 11:08:47,382 INFO L408 AbstractCegarLoop]: === Iteration 50 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-11 11:08:47,382 INFO L82 PathProgramCache]: Analyzing trace with hash -1749772722, now seen corresponding path program 1 times [2018-04-11 11:08:47,382 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-11 11:08:47,382 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-11 11:08:47,382 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 11:08:47,383 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 11:08:47,383 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 11:08:47,392 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 11:08:47,393 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 11:08:48,049 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 11:08:48,049 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-11 11:08:48,049 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [24] imperfect sequences [] total 24 [2018-04-11 11:08:48,049 INFO L442 AbstractCegarLoop]: Interpolant automaton has 25 states [2018-04-11 11:08:48,050 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2018-04-11 11:08:48,050 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=59, Invalid=541, Unknown=0, NotChecked=0, Total=600 [2018-04-11 11:08:48,050 INFO L87 Difference]: Start difference. First operand 298 states and 328 transitions. Second operand 25 states. [2018-04-11 11:08:49,153 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 11:08:49,153 INFO L93 Difference]: Finished difference Result 326 states and 358 transitions. [2018-04-11 11:08:49,153 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2018-04-11 11:08:49,153 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 62 [2018-04-11 11:08:49,153 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 11:08:49,154 INFO L225 Difference]: With dead ends: 326 [2018-04-11 11:08:49,154 INFO L226 Difference]: Without dead ends: 326 [2018-04-11 11:08:49,154 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 52 GetRequests, 2 SyntacticMatches, 4 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 519 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=212, Invalid=2044, Unknown=0, NotChecked=0, Total=2256 [2018-04-11 11:08:49,154 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 326 states. [2018-04-11 11:08:49,156 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 326 to 284. [2018-04-11 11:08:49,156 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 284 states. [2018-04-11 11:08:49,157 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 284 states to 284 states and 314 transitions. [2018-04-11 11:08:49,157 INFO L78 Accepts]: Start accepts. Automaton has 284 states and 314 transitions. Word has length 62 [2018-04-11 11:08:49,157 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 11:08:49,157 INFO L459 AbstractCegarLoop]: Abstraction has 284 states and 314 transitions. [2018-04-11 11:08:49,157 INFO L460 AbstractCegarLoop]: Interpolant automaton has 25 states. [2018-04-11 11:08:49,157 INFO L276 IsEmpty]: Start isEmpty. Operand 284 states and 314 transitions. [2018-04-11 11:08:49,157 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 82 [2018-04-11 11:08:49,157 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 11:08:49,158 INFO L355 BasicCegarLoop]: trace histogram [5, 4, 4, 4, 4, 4, 4, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 11:08:49,158 INFO L408 AbstractCegarLoop]: === Iteration 51 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-11 11:08:49,158 INFO L82 PathProgramCache]: Analyzing trace with hash 32546574, now seen corresponding path program 1 times [2018-04-11 11:08:49,158 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-11 11:08:49,158 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-11 11:08:49,158 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 11:08:49,158 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 11:08:49,158 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 11:08:49,165 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 11:08:49,165 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 11:08:49,189 INFO L134 CoverageAnalysis]: Checked inductivity of 64 backedges. 3 proven. 50 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2018-04-11 11:08:49,189 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-11 11:08:49,190 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-11 11:08:49,195 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 11:08:49,223 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 11:08:49,226 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-11 11:08:49,250 INFO L134 CoverageAnalysis]: Checked inductivity of 64 backedges. 3 proven. 50 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2018-04-11 11:08:49,268 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-11 11:08:49,269 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 8 [2018-04-11 11:08:49,269 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-04-11 11:08:49,269 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-04-11 11:08:49,269 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=28, Invalid=28, Unknown=0, NotChecked=0, Total=56 [2018-04-11 11:08:49,269 INFO L87 Difference]: Start difference. First operand 284 states and 314 transitions. Second operand 8 states. [2018-04-11 11:08:49,284 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 11:08:49,284 INFO L93 Difference]: Finished difference Result 296 states and 326 transitions. [2018-04-11 11:08:49,284 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-04-11 11:08:49,285 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 81 [2018-04-11 11:08:49,285 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 11:08:49,285 INFO L225 Difference]: With dead ends: 296 [2018-04-11 11:08:49,285 INFO L226 Difference]: Without dead ends: 296 [2018-04-11 11:08:49,286 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 87 GetRequests, 81 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=28, Invalid=28, Unknown=0, NotChecked=0, Total=56 [2018-04-11 11:08:49,286 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 296 states. [2018-04-11 11:08:49,287 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 296 to 291. [2018-04-11 11:08:49,288 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 291 states. [2018-04-11 11:08:49,288 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 291 states to 291 states and 321 transitions. [2018-04-11 11:08:49,288 INFO L78 Accepts]: Start accepts. Automaton has 291 states and 321 transitions. Word has length 81 [2018-04-11 11:08:49,288 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 11:08:49,288 INFO L459 AbstractCegarLoop]: Abstraction has 291 states and 321 transitions. [2018-04-11 11:08:49,288 INFO L460 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-04-11 11:08:49,288 INFO L276 IsEmpty]: Start isEmpty. Operand 291 states and 321 transitions. [2018-04-11 11:08:49,289 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2018-04-11 11:08:49,289 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 11:08:49,289 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 11:08:49,289 INFO L408 AbstractCegarLoop]: === Iteration 52 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-11 11:08:49,289 INFO L82 PathProgramCache]: Analyzing trace with hash 1608088232, now seen corresponding path program 1 times [2018-04-11 11:08:49,289 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-11 11:08:49,289 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-11 11:08:49,290 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 11:08:49,290 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 11:08:49,290 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 11:08:49,295 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 11:08:49,295 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 11:08:49,367 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 12 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-04-11 11:08:49,368 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-11 11:08:49,368 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-11 11:08:49,373 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 11:08:49,399 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 11:08:49,401 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-11 11:08:49,427 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-04-11 11:08:49,428 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-11 11:08:49,428 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-11 11:08:49,429 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 11:08:49,432 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-11 11:08:49,432 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:17, output treesize:9 [2018-04-11 11:08:49,438 INFO L700 Elim1Store]: detected not equals via solver [2018-04-11 11:08:49,438 INFO L700 Elim1Store]: detected not equals via solver [2018-04-11 11:08:49,438 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 8 [2018-04-11 11:08:49,439 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-11 11:08:49,441 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 11:08:49,441 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:18, output treesize:12 [2018-04-11 11:08:49,483 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1 [2018-04-11 11:08:49,483 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-11 11:08:49,486 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-11 11:08:49,486 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:17, output treesize:12 [2018-04-11 11:08:55,499 WARN L148 SmtUtils]: Spent 2002ms on a formula simplification that was a NOOP. DAG size: 12 [2018-04-11 11:08:55,512 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 12 [2018-04-11 11:08:55,513 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2018-04-11 11:08:55,513 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-11 11:08:55,514 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 11:08:55,515 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-11 11:08:55,515 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:21, output treesize:10 [2018-04-11 11:08:55,517 INFO L700 Elim1Store]: detected not equals via solver [2018-04-11 11:08:55,517 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 21 [2018-04-11 11:08:55,517 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-11 11:08:55,520 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-11 11:08:55,520 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:16, output treesize:11 [2018-04-11 11:08:55,535 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 6 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 11:08:55,553 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-11 11:08:55,554 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 15] total 17 [2018-04-11 11:08:55,554 INFO L442 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-04-11 11:08:55,554 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-04-11 11:08:55,554 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=49, Invalid=255, Unknown=2, NotChecked=0, Total=306 [2018-04-11 11:08:55,554 INFO L87 Difference]: Start difference. First operand 291 states and 321 transitions. Second operand 18 states. [2018-04-11 11:09:23,703 WARN L148 SmtUtils]: Spent 2005ms on a formula simplification that was a NOOP. DAG size: 16 [2018-04-11 11:09:27,720 WARN L148 SmtUtils]: Spent 2006ms on a formula simplification that was a NOOP. DAG size: 21 [2018-04-11 11:10:02,599 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-11 11:10:02,600 INFO L93 Difference]: Finished difference Result 333 states and 360 transitions. [2018-04-11 11:10:02,600 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-04-11 11:10:02,600 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 68 [2018-04-11 11:10:02,600 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-11 11:10:02,601 INFO L225 Difference]: With dead ends: 333 [2018-04-11 11:10:02,601 INFO L226 Difference]: Without dead ends: 322 [2018-04-11 11:10:02,601 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 92 GetRequests, 59 SyntacticMatches, 4 SemanticMatches, 29 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 203 ImplicationChecksByTransitivity, 20.2s TimeCoverageRelationStatistics Valid=150, Invalid=773, Unknown=7, NotChecked=0, Total=930 [2018-04-11 11:10:02,601 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 322 states. [2018-04-11 11:10:02,603 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 322 to 236. [2018-04-11 11:10:02,603 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 236 states. [2018-04-11 11:10:02,604 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 236 states to 236 states and 257 transitions. [2018-04-11 11:10:02,604 INFO L78 Accepts]: Start accepts. Automaton has 236 states and 257 transitions. Word has length 68 [2018-04-11 11:10:02,604 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-11 11:10:02,604 INFO L459 AbstractCegarLoop]: Abstraction has 236 states and 257 transitions. [2018-04-11 11:10:02,604 INFO L460 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-04-11 11:10:02,604 INFO L276 IsEmpty]: Start isEmpty. Operand 236 states and 257 transitions. [2018-04-11 11:10:02,604 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2018-04-11 11:10:02,604 INFO L347 BasicCegarLoop]: Found error trace [2018-04-11 11:10:02,605 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-11 11:10:02,605 INFO L408 AbstractCegarLoop]: === Iteration 53 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-11 11:10:02,605 INFO L82 PathProgramCache]: Analyzing trace with hash -2052912455, now seen corresponding path program 1 times [2018-04-11 11:10:02,605 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-11 11:10:02,605 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-11 11:10:02,605 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 11:10:02,605 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 11:10:02,605 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-11 11:10:02,613 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 11:10:02,614 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-11 11:10:03,118 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 2 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-11 11:10:03,118 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-11 11:10:03,118 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-11 11:10:03,124 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-11 11:10:03,153 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-11 11:10:03,156 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-11 11:10:03,172 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-04-11 11:10:03,173 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-11 11:10:03,174 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-11 11:10:03,175 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 11:10:03,179 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-04-11 11:10:03,181 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-11 11:10:03,181 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-11 11:10:03,182 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 11:10:03,185 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-11 11:10:03,185 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:26, output treesize:18 [2018-04-11 11:10:03,336 WARN L1033 $PredicateComparison]: unable to prove that (exists ((__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_data_~data~0.base Int) (__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_data_~data~0.offset Int)) (let ((.cse0 (+ __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_data_~data~0.offset 4))) (and (= |c_#memory_$Pointer$.base| (store |c_old(#memory_$Pointer$.base)| __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_data_~data~0.base (store (select |c_old(#memory_$Pointer$.base)| __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_data_~data~0.base) .cse0 0))) (= 0 (select |c_old(#valid)| __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_data_~data~0.base)) (= (store |c_old(#memory_$Pointer$.offset)| __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_data_~data~0.base (store (select |c_old(#memory_$Pointer$.offset)| __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_data_~data~0.base) .cse0 0)) |c_#memory_$Pointer$.offset|)))) is different from true [2018-04-11 11:10:03,344 INFO L700 Elim1Store]: detected not equals via solver [2018-04-11 11:10:03,345 INFO L700 Elim1Store]: detected not equals via solver [2018-04-11 11:10:03,345 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-04-11 11:10:03,345 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-11 11:10:03,360 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-04-11 11:10:03,360 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:102, output treesize:96 [2018-04-11 11:10:03,496 WARN L1033 $PredicateComparison]: unable to prove that (exists ((__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_data_~data~0.base Int) (__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_data_~data~0.offset Int) (__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.base Int) (__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.offset Int) (|__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#t~ret14.base| Int) (|__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#t~ret14.offset| Int)) (let ((.cse3 (+ __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_data_~data~0.offset 4)) (.cse4 (+ __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.offset 4))) (and (= (let ((.cse0 (let ((.cse1 (let ((.cse2 (store |c_old(#memory_$Pointer$.offset)| __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.base (store (select |c_old(#memory_$Pointer$.offset)| __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.base) .cse4 (select (select |c_old(#memory_$Pointer$.offset)| |c___U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#in~pointerToList.base|) |c___U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#in~pointerToList.offset|))))) (store .cse2 __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_data_~data~0.base (store (select .cse2 __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_data_~data~0.base) .cse3 0))))) (store .cse1 __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.base (store (select .cse1 __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.base) __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.offset |__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#t~ret14.offset|))))) (store .cse0 |c___U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#in~pointerToList.base| (store (select .cse0 |c___U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#in~pointerToList.base|) |c___U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#in~pointerToList.offset| __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.offset))) |c_#memory_$Pointer$.offset|) (= (let ((.cse5 (let ((.cse6 (let ((.cse7 (store |c_old(#memory_$Pointer$.base)| __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.base (store (select |c_old(#memory_$Pointer$.base)| __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.base) .cse4 (select (select |c_old(#memory_$Pointer$.base)| |c___U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#in~pointerToList.base|) |c___U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#in~pointerToList.offset|))))) (store .cse7 __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_data_~data~0.base (store (select .cse7 __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_data_~data~0.base) .cse3 0))))) (store .cse6 __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.base (store (select .cse6 __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.base) __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.offset |__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#t~ret14.base|))))) (store .cse5 |c___U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#in~pointerToList.base| (store (select .cse5 |c___U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#in~pointerToList.base|) |c___U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#in~pointerToList.offset| __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.base))) |c_#memory_$Pointer$.base|) (<= 0 __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.offset) (not (= __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_data_~data~0.base __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.base)) (<= __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.offset 0)))) is different from true [2018-04-11 11:10:03,551 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 187 treesize of output 102 [2018-04-11 11:10:03,557 INFO L700 Elim1Store]: detected not equals via solver [2018-04-11 11:10:03,558 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 88 treesize of output 97 [2018-04-11 11:10:03,558 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-11 11:10:03,808 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 93 treesize of output 92 [2018-04-11 11:10:03,808 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-11 11:10:04,060 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 91 treesize of output 65 [2018-04-11 11:10:04,063 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-04-11 11:10:04,063 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-04-11 11:10:04,093 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 57 treesize of output 50 [2018-04-11 11:10:04,097 INFO L700 Elim1Store]: detected not equals via solver [2018-04-11 11:10:04,097 INFO L682 Elim1Store]: detected equality via solver [2018-04-11 11:10:04,101 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 35 [2018-04-11 11:10:04,101 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 1 xjuncts. [2018-04-11 11:10:04,124 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 34 [2018-04-11 11:10:04,128 INFO L700 Elim1Store]: detected not equals via solver [2018-04-11 11:10:04,128 INFO L682 Elim1Store]: detected equality via solver [2018-04-11 11:10:04,131 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 26 [2018-04-11 11:10:04,132 INFO L267 ElimStorePlain]: Start of recursive call 10: End of recursive call: and 1 xjuncts. [2018-04-11 11:10:04,141 INFO L267 ElimStorePlain]: Start of recursive call 9: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 11:10:04,148 INFO L267 ElimStorePlain]: Start of recursive call 7: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-11 11:10:04,166 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-11 11:10:04,365 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 4 case distinctions, treesize of input 88 treesize of output 75 [2018-04-11 11:10:04,370 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 65 [2018-04-11 11:10:04,370 INFO L267 ElimStorePlain]: Start of recursive call 12: End of recursive call: and 1 xjuncts. [2018-04-11 11:10:04,584 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 57 treesize of output 62 [2018-04-11 11:10:04,584 INFO L267 ElimStorePlain]: Start of recursive call 13: End of recursive call: and 1 xjuncts. [2018-04-11 11:10:04,821 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 4 case distinctions, treesize of input 60 treesize of output 65 [2018-04-11 11:10:04,828 INFO L700 Elim1Store]: detected not equals via solver [2018-04-11 11:10:04,832 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 58 treesize of output 65 [2018-04-11 11:10:04,832 INFO L267 ElimStorePlain]: Start of recursive call 15: End of recursive call: and 1 xjuncts. [2018-04-11 11:10:04,976 INFO L700 Elim1Store]: detected not equals via solver [2018-04-11 11:10:04,976 INFO L682 Elim1Store]: detected equality via solver [2018-04-11 11:10:04,989 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 2 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 74 [2018-04-11 11:10:04,989 INFO L267 ElimStorePlain]: Start of recursive call 16: End of recursive call: and 1 xjuncts. [2018-04-11 11:10:05,116 INFO L682 Elim1Store]: detected equality via solver [2018-04-11 11:10:05,132 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 6 case distinctions, treesize of input 54 treesize of output 56 [2018-04-11 11:10:05,137 INFO L700 Elim1Store]: detected not equals via solver [2018-04-11 11:10:05,151 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 3 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 46 treesize of output 67 [2018-04-11 11:10:05,151 INFO L267 ElimStorePlain]: Start of recursive call 18: End of recursive call: and 1 xjuncts. [2018-04-11 11:10:05,172 INFO L267 ElimStorePlain]: Start of recursive call 17: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 11:10:05,272 INFO L682 Elim1Store]: detected equality via solver [2018-04-11 11:10:05,305 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 6 case distinctions, treesize of input 51 treesize of output 55 [2018-04-11 11:10:05,312 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 2 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 54 [2018-04-11 11:10:05,312 INFO L267 ElimStorePlain]: Start of recursive call 20: End of recursive call: and 1 xjuncts. [2018-04-11 11:10:05,328 INFO L267 ElimStorePlain]: Start of recursive call 19: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 11:10:05,432 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 6 case distinctions, treesize of input 53 treesize of output 78 [2018-04-11 11:10:05,437 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 62 treesize of output 61 [2018-04-11 11:10:05,437 INFO L267 ElimStorePlain]: Start of recursive call 22: End of recursive call: and 1 xjuncts. [2018-04-11 11:10:05,542 INFO L700 Elim1Store]: detected not equals via solver [2018-04-11 11:10:05,542 INFO L682 Elim1Store]: detected equality via solver [2018-04-11 11:10:05,545 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 54 [2018-04-11 11:10:05,545 INFO L267 ElimStorePlain]: Start of recursive call 23: End of recursive call: and 1 xjuncts. [2018-04-11 11:10:05,669 INFO L267 ElimStorePlain]: Start of recursive call 21: 4 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-11 11:10:05,724 INFO L267 ElimStorePlain]: Start of recursive call 14: 2 dim-1 vars, 3 dim-2 vars, End of recursive call: and 3 xjuncts. [2018-04-11 11:10:06,046 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 4 case distinctions, treesize of input 57 treesize of output 64 [2018-04-11 11:10:06,052 INFO L700 Elim1Store]: detected not equals via solver [2018-04-11 11:10:06,056 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 62 [2018-04-11 11:10:06,056 INFO L267 ElimStorePlain]: Start of recursive call 25: End of recursive call: and 1 xjuncts. [2018-04-11 11:10:06,155 INFO L700 Elim1Store]: detected not equals via solver [2018-04-11 11:10:06,156 INFO L682 Elim1Store]: detected equality via solver [2018-04-11 11:10:06,160 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 46 treesize of output 58 [2018-04-11 11:10:06,161 INFO L267 ElimStorePlain]: Start of recursive call 26: End of recursive call: and 1 xjuncts. [2018-04-11 11:10:06,296 INFO L682 Elim1Store]: detected equality via solver [2018-04-11 11:10:06,313 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 6 case distinctions, treesize of input 51 treesize of output 55 [2018-04-11 11:10:06,317 INFO L700 Elim1Store]: detected not equals via solver [2018-04-11 11:10:06,322 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 2 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 42 [2018-04-11 11:10:06,323 INFO L267 ElimStorePlain]: Start of recursive call 28: End of recursive call: and 1 xjuncts. [2018-04-11 11:10:06,337 INFO L267 ElimStorePlain]: Start of recursive call 27: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 11:10:06,459 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 6 case distinctions, treesize of input 37 treesize of output 66 [2018-04-11 11:10:06,465 INFO L700 Elim1Store]: detected not equals via solver [2018-04-11 11:10:06,466 INFO L682 Elim1Store]: detected equality via solver [2018-04-11 11:10:06,470 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 46 [2018-04-11 11:10:06,470 INFO L267 ElimStorePlain]: Start of recursive call 30: End of recursive call: and 1 xjuncts. [2018-04-11 11:10:06,665 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 33 [2018-04-11 11:10:06,665 INFO L267 ElimStorePlain]: Start of recursive call 31: End of recursive call: and 1 xjuncts. [2018-04-11 11:10:06,698 INFO L267 ElimStorePlain]: Start of recursive call 29: 4 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-11 11:10:06,729 INFO L267 ElimStorePlain]: Start of recursive call 24: 2 dim-1 vars, 3 dim-2 vars, End of recursive call: and 2 xjuncts. [2018-04-11 11:10:06,790 INFO L267 ElimStorePlain]: Start of recursive call 11: 2 dim-1 vars, 3 dim-2 vars, End of recursive call: and 3 xjuncts. [2018-04-11 11:10:06,895 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, 3 dim-2 vars, End of recursive call: and 3 xjuncts. [2018-04-11 11:10:06,972 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 187 treesize of output 102 [2018-04-11 11:10:06,976 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 93 treesize of output 92 [2018-04-11 11:10:06,976 INFO L267 ElimStorePlain]: Start of recursive call 33: End of recursive call: and 1 xjuncts. [2018-04-11 11:10:07,064 INFO L700 Elim1Store]: detected not equals via solver [2018-04-11 11:10:07,064 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 88 treesize of output 97 [2018-04-11 11:10:07,065 INFO L267 ElimStorePlain]: Start of recursive call 34: End of recursive call: and 1 xjuncts. [2018-04-11 11:10:07,184 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 4 case distinctions, treesize of input 91 treesize of output 76 [2018-04-11 11:10:07,189 INFO L700 Elim1Store]: detected not equals via solver [2018-04-11 11:10:07,191 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 2 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 62 treesize of output 77 [2018-04-11 11:10:07,191 INFO L267 ElimStorePlain]: Start of recursive call 36: End of recursive call: and 1 xjuncts. [2018-04-11 11:10:07,269 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 65 treesize of output 64 [2018-04-11 11:10:07,269 INFO L267 ElimStorePlain]: Start of recursive call 37: End of recursive call: and 1 xjuncts. [2018-04-11 11:10:07,345 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 67 treesize of output 57 [2018-04-11 11:10:07,348 INFO L700 Elim1Store]: detected not equals via solver [2018-04-11 11:10:07,349 INFO L682 Elim1Store]: detected equality via solver [2018-04-11 11:10:07,350 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 35 [2018-04-11 11:10:07,351 INFO L267 ElimStorePlain]: Start of recursive call 39: End of recursive call: and 1 xjuncts. [2018-04-11 11:10:07,366 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 41 [2018-04-11 11:10:07,378 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 21 treesize of output 26 [2018-04-11 11:10:07,378 INFO L267 ElimStorePlain]: Start of recursive call 41: End of recursive call: and 2 xjuncts. [2018-04-11 11:10:07,391 INFO L267 ElimStorePlain]: Start of recursive call 40: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-11 11:10:07,407 INFO L267 ElimStorePlain]: Start of recursive call 38: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 2 xjuncts. [2018-04-11 11:10:07,493 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 4 case distinctions, treesize of input 60 treesize of output 65 [2018-04-11 11:10:07,497 INFO L700 Elim1Store]: detected not equals via solver [2018-04-11 11:10:07,497 INFO L682 Elim1Store]: detected equality via solver [2018-04-11 11:10:07,499 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 50 treesize of output 62 [2018-04-11 11:10:07,500 INFO L267 ElimStorePlain]: Start of recursive call 43: End of recursive call: and 1 xjuncts. [2018-04-11 11:10:07,563 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 6 case distinctions, treesize of input 51 treesize of output 74 [2018-04-11 11:10:07,569 INFO L700 Elim1Store]: detected not equals via solver [2018-04-11 11:10:07,569 INFO L682 Elim1Store]: detected equality via solver [2018-04-11 11:10:07,574 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 2 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 52 treesize of output 63 [2018-04-11 11:10:07,574 INFO L267 ElimStorePlain]: Start of recursive call 45: End of recursive call: and 1 xjuncts. [2018-04-11 11:10:07,668 INFO L682 Elim1Store]: detected equality via solver [2018-04-11 11:10:07,668 INFO L700 Elim1Store]: detected not equals via solver [2018-04-11 11:10:07,671 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 44 [2018-04-11 11:10:07,671 INFO L267 ElimStorePlain]: Start of recursive call 46: End of recursive call: and 1 xjuncts. [2018-04-11 11:10:07,731 INFO L700 Elim1Store]: detected not equals via solver [2018-04-11 11:10:07,732 INFO L682 Elim1Store]: detected equality via solver [2018-04-11 11:10:07,750 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 2 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 4 case distinctions, treesize of input 41 treesize of output 75 [2018-04-11 11:10:07,751 INFO L267 ElimStorePlain]: Start of recursive call 47: End of recursive call: and 2 xjuncts. [2018-04-11 11:10:07,819 INFO L267 ElimStorePlain]: Start of recursive call 44: 4 dim-1 vars, End of recursive call: and 4 xjuncts. [2018-04-11 11:10:07,886 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 37 [2018-04-11 11:10:07,888 INFO L700 Elim1Store]: detected not equals via solver [2018-04-11 11:10:07,889 INFO L682 Elim1Store]: detected equality via solver [2018-04-11 11:10:07,891 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 26 [2018-04-11 11:10:07,891 INFO L267 ElimStorePlain]: Start of recursive call 49: End of recursive call: and 1 xjuncts. [2018-04-11 11:10:07,898 INFO L267 ElimStorePlain]: Start of recursive call 48: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 11:10:07,963 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 6 case distinctions, treesize of input 47 treesize of output 72 [2018-04-11 11:10:07,968 INFO L700 Elim1Store]: detected not equals via solver [2018-04-11 11:10:07,970 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 2 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 50 treesize of output 57 [2018-04-11 11:10:07,972 INFO L682 Elim1Store]: detected equality via solver [2018-04-11 11:10:07,975 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 29 [2018-04-11 11:10:07,975 INFO L267 ElimStorePlain]: Start of recursive call 52: End of recursive call: and 1 xjuncts. [2018-04-11 11:10:07,985 INFO L267 ElimStorePlain]: Start of recursive call 51: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-11 11:10:08,083 INFO L700 Elim1Store]: detected not equals via solver [2018-04-11 11:10:08,097 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 2 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 39 treesize of output 66 [2018-04-11 11:10:08,103 INFO L682 Elim1Store]: detected equality via solver [2018-04-11 11:10:08,111 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 60 treesize of output 102 [2018-04-11 11:10:08,112 INFO L267 ElimStorePlain]: Start of recursive call 54: End of recursive call: and 2 xjuncts. [2018-04-11 11:10:08,155 INFO L700 Elim1Store]: detected not equals via solver [2018-04-11 11:10:08,155 INFO L682 Elim1Store]: detected equality via solver [2018-04-11 11:10:08,157 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 56 [2018-04-11 11:10:08,157 INFO L267 ElimStorePlain]: Start of recursive call 55: End of recursive call: and 1 xjuncts. [2018-04-11 11:10:08,180 INFO L267 ElimStorePlain]: Start of recursive call 53: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-11 11:10:08,303 INFO L700 Elim1Store]: detected not equals via solver [2018-04-11 11:10:08,306 FATAL L292 ToolchainWalker]: The Plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction has thrown an exception: java.lang.AssertionError: var is still there: v_prenex_41 term size 30 at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.Elim1Store.elim1(Elim1Store.java:452) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimOneRec(ElimStorePlain.java:221) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimAllRec(ElimStorePlain.java:247) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimOneRec(ElimStorePlain.java:225) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimAllRec(ElimStorePlain.java:247) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimOneRec(ElimStorePlain.java:225) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimAllRec(ElimStorePlain.java:247) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimOneRec(ElimStorePlain.java:225) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimAllRec(ElimStorePlain.java:247) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimOneRec(ElimStorePlain.java:225) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimAllRec(ElimStorePlain.java:247) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.elimAllRec(ElimStorePlain.java:199) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.PartialQuantifierElimination.elim(PartialQuantifierElimination.java:270) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.PartialQuantifierElimination.tryToEliminate(PartialQuantifierElimination.java:101) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.predicates.IterativePredicateTransformer$QuantifierEliminationPostprocessor.postprocess(IterativePredicateTransformer.java:243) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.predicates.IterativePredicateTransformer.applyPostprocessors(IterativePredicateTransformer.java:445) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.predicates.IterativePredicateTransformer.computeStrongestPostconditionSequence(IterativePredicateTransformer.java:198) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.singletracecheck.TraceCheckSpWp.computeInterpolantsUsingUnsatCore(TraceCheckSpWp.java:283) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.singletracecheck.TraceCheckSpWp.computeInterpolants(TraceCheckSpWp.java:173) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.singletracecheck.TraceCheckSpWp.(TraceCheckSpWp.java:160) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceCheckConstructor.constructForwardBackward(TraceCheckConstructor.java:237) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceCheckConstructor.get(TraceCheckConstructor.java:185) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.MultiTrackRefinementStrategy.getTraceCheck(MultiTrackRefinementStrategy.java:222) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.BaseRefinementStrategy.checkFeasibility(BaseRefinementStrategy.java:231) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.BaseRefinementStrategy.executeStrategy(BaseRefinementStrategy.java:205) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceAbstractionRefinementEngine.(TraceAbstractionRefinementEngine.java:69) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.BasicCegarLoop.isCounterexampleFeasible(BasicCegarLoop.java:408) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterateInternal(AbstractCegarLoop.java:417) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterate(AbstractCegarLoop.java:363) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.iterate(TraceAbstractionStarter.java:304) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.runCegarLoops(TraceAbstractionStarter.java:150) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.(TraceAbstractionStarter.java:118) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver.finish(TraceAbstractionObserver.java:119) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runObserver(PluginConnector.java:168) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runTool(PluginConnector.java:151) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.run(PluginConnector.java:128) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.executePluginConnector(ToolchainWalker.java:232) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.processPlugin(ToolchainWalker.java:226) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walkUnprotected(ToolchainWalker.java:142) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walk(ToolchainWalker.java:104) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainManager$Toolchain.processToolchain(ToolchainManager.java:324) at de.uni_freiburg.informatik.ultimate.core.coreplugin.toolchain.DefaultToolchainJob.runToolchainDefault(DefaultToolchainJob.java:221) at de.uni_freiburg.informatik.ultimate.core.coreplugin.toolchain.BasicToolchainJob.run(BasicToolchainJob.java:134) at org.eclipse.core.internal.jobs.Worker.run(Worker.java:55) [2018-04-11 11:10:08,308 INFO L168 Benchmark]: Toolchain (without parser) took 179598.81 ms. Allocated memory was 403.7 MB in the beginning and 966.3 MB in the end (delta: 562.6 MB). Free memory was 335.4 MB in the beginning and 411.2 MB in the end (delta: -75.8 MB). Peak memory consumption was 511.9 MB. Max. memory is 5.3 GB. [2018-04-11 11:10:08,309 INFO L168 Benchmark]: CDTParser took 0.11 ms. Allocated memory is still 403.7 MB. Free memory is still 362.7 MB. There was no memory consumed. Max. memory is 5.3 GB. [2018-04-11 11:10:08,309 INFO L168 Benchmark]: CACSL2BoogieTranslator took 237.08 ms. Allocated memory is still 403.7 MB. Free memory was 335.4 MB in the beginning and 308.9 MB in the end (delta: 26.4 MB). Peak memory consumption was 26.4 MB. Max. memory is 5.3 GB. [2018-04-11 11:10:08,309 INFO L168 Benchmark]: Boogie Preprocessor took 41.54 ms. Allocated memory is still 403.7 MB. Free memory was 308.9 MB in the beginning and 306.3 MB in the end (delta: 2.6 MB). Peak memory consumption was 2.6 MB. Max. memory is 5.3 GB. [2018-04-11 11:10:08,309 INFO L168 Benchmark]: RCFGBuilder took 447.85 ms. Allocated memory was 403.7 MB in the beginning and 588.3 MB in the end (delta: 184.5 MB). Free memory was 306.3 MB in the beginning and 508.0 MB in the end (delta: -201.7 MB). Peak memory consumption was 24.9 MB. Max. memory is 5.3 GB. [2018-04-11 11:10:08,310 INFO L168 Benchmark]: TraceAbstraction took 178870.01 ms. Allocated memory was 588.3 MB in the beginning and 966.3 MB in the end (delta: 378.0 MB). Free memory was 508.0 MB in the beginning and 411.2 MB in the end (delta: 96.9 MB). Peak memory consumption was 500.1 MB. Max. memory is 5.3 GB. [2018-04-11 11:10:08,311 INFO L344 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.11 ms. Allocated memory is still 403.7 MB. Free memory is still 362.7 MB. There was no memory consumed. Max. memory is 5.3 GB. * CACSL2BoogieTranslator took 237.08 ms. Allocated memory is still 403.7 MB. Free memory was 335.4 MB in the beginning and 308.9 MB in the end (delta: 26.4 MB). Peak memory consumption was 26.4 MB. Max. memory is 5.3 GB. * Boogie Preprocessor took 41.54 ms. Allocated memory is still 403.7 MB. Free memory was 308.9 MB in the beginning and 306.3 MB in the end (delta: 2.6 MB). Peak memory consumption was 2.6 MB. Max. memory is 5.3 GB. * RCFGBuilder took 447.85 ms. Allocated memory was 403.7 MB in the beginning and 588.3 MB in the end (delta: 184.5 MB). Free memory was 306.3 MB in the beginning and 508.0 MB in the end (delta: -201.7 MB). Peak memory consumption was 24.9 MB. Max. memory is 5.3 GB. * TraceAbstraction took 178870.01 ms. Allocated memory was 588.3 MB in the beginning and 966.3 MB in the end (delta: 378.0 MB). Free memory was 508.0 MB in the beginning and 411.2 MB in the end (delta: 96.9 MB). Peak memory consumption was 500.1 MB. Max. memory is 5.3 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - ExceptionOrErrorResult: AssertionError: var is still there: v_prenex_41 term size 30 de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: AssertionError: var is still there: v_prenex_41 term size 30: de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.Elim1Store.elim1(Elim1Store.java:452) RESULT: Ultimate could not prove your program: Toolchain returned no result. Written .csv to /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/optional_data_creation_test04_true-valid-memsafety.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Camel.epf_AutomizerC.xml/Csv-Benchmark-0-2018-04-11_11-10-08-315.csv Received shutdown request...