java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/cade18-smtinterpol/svcomp-DerefFreeMemtrack-32bit-Automizer_Camel.epf -i ../../../trunk/examples/svcomp/memsafety-ext2/optional_data_creation_test04_false-valid-memtrack.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-666feb3-m [2018-04-10 13:40:15,122 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-04-10 13:40:15,123 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-04-10 13:40:15,133 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-04-10 13:40:15,133 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-04-10 13:40:15,134 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-04-10 13:40:15,135 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-04-10 13:40:15,136 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-04-10 13:40:15,137 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-04-10 13:40:15,138 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-04-10 13:40:15,139 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-04-10 13:40:15,139 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-04-10 13:40:15,140 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-04-10 13:40:15,141 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-04-10 13:40:15,141 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-04-10 13:40:15,144 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-04-10 13:40:15,145 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-04-10 13:40:15,147 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-04-10 13:40:15,148 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-04-10 13:40:15,149 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-04-10 13:40:15,151 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2018-04-10 13:40:15,156 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-04-10 13:40:15,157 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-04-10 13:40:15,157 INFO L98 SettingsManager]: Beginning loading settings from /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/cade18-smtinterpol/svcomp-DerefFreeMemtrack-32bit-Automizer_Camel.epf [2018-04-10 13:40:15,170 INFO L110 SettingsManager]: Loading preferences was successful [2018-04-10 13:40:15,170 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-04-10 13:40:15,171 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-04-10 13:40:15,171 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-04-10 13:40:15,171 INFO L133 SettingsManager]: * Use SBE=true [2018-04-10 13:40:15,171 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-04-10 13:40:15,171 INFO L133 SettingsManager]: * sizeof long=4 [2018-04-10 13:40:15,171 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-04-10 13:40:15,171 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-04-10 13:40:15,171 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-04-10 13:40:15,172 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-04-10 13:40:15,172 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-04-10 13:40:15,172 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-04-10 13:40:15,172 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-04-10 13:40:15,172 INFO L133 SettingsManager]: * sizeof long double=12 [2018-04-10 13:40:15,172 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-04-10 13:40:15,172 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-04-10 13:40:15,172 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-04-10 13:40:15,172 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-04-10 13:40:15,173 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-04-10 13:40:15,173 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-04-10 13:40:15,173 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-04-10 13:40:15,173 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-04-10 13:40:15,173 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL [2018-04-10 13:40:15,198 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-04-10 13:40:15,206 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully (re)initialized [2018-04-10 13:40:15,209 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-04-10 13:40:15,210 INFO L271 PluginConnector]: Initializing CDTParser... [2018-04-10 13:40:15,210 INFO L276 PluginConnector]: CDTParser initialized [2018-04-10 13:40:15,211 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/memsafety-ext2/optional_data_creation_test04_false-valid-memtrack.i [2018-04-10 13:40:15,488 INFO L225 CDTParser]: Created temporary CDT project at /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/data/FLAG2f9fb3c56 [2018-04-10 13:40:15,653 INFO L287 CDTParser]: IsIndexed: true [2018-04-10 13:40:15,654 INFO L288 CDTParser]: Found 1 translation units. [2018-04-10 13:40:15,654 INFO L168 CDTParser]: Scanning optional_data_creation_test04_false-valid-memtrack.i [2018-04-10 13:40:15,661 INFO L210 ultiparseSymbolTable]: Include resolver: [2018-04-10 13:40:15,662 INFO L215 ultiparseSymbolTable]: [2018-04-10 13:40:15,662 INFO L218 ultiparseSymbolTable]: Function table: [2018-04-10 13:40:15,662 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append ('append') in optional_data_creation_test04_false-valid-memtrack.i [2018-04-10 13:40:15,662 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeData ('freeData') in optional_data_creation_test04_false-valid-memtrack.i [2018-04-10 13:40:15,662 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____bswap_64 ('__bswap_64') in optional_data_creation_test04_false-valid-memtrack.i [2018-04-10 13:40:15,662 INFO L221 ultiparseSymbolTable]: Function definition of null ('main') in optional_data_creation_test04_false-valid-memtrack.i [2018-04-10 13:40:15,662 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____bswap_32 ('__bswap_32') in optional_data_creation_test04_false-valid-memtrack.i [2018-04-10 13:40:15,662 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_data ('create_data') in optional_data_creation_test04_false-valid-memtrack.i [2018-04-10 13:40:15,662 INFO L227 ultiparseSymbolTable]: Global variable table: [2018-04-10 13:40:15,663 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____int8_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-10 13:40:15,663 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__register_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-10 13:40:15,663 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____uint64_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-10 13:40:15,663 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____fsword_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-10 13:40:15,663 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__pthread_once_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-10 13:40:15,663 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__off_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-10 13:40:15,663 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__pthread_attr_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-10 13:40:15,663 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____nlink_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-10 13:40:15,663 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____socklen_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-10 13:40:15,663 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____sig_atomic_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-10 13:40:15,663 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__timer_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-10 13:40:15,663 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____ssize_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-10 13:40:15,664 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__fsfilcnt_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-10 13:40:15,664 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____mode_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-10 13:40:15,664 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__nlink_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-10 13:40:15,664 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__uint in optional_data_creation_test04_false-valid-memtrack.i [2018-04-10 13:40:15,664 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__int32_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-10 13:40:15,664 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____intptr_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-10 13:40:15,664 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__pid_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-10 13:40:15,664 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____blkcnt64_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-10 13:40:15,664 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__gid_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-10 13:40:15,664 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__dev_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-10 13:40:15,664 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__u_short in optional_data_creation_test04_false-valid-memtrack.i [2018-04-10 13:40:15,664 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____uid_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-10 13:40:15,664 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__ssize_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-10 13:40:15,664 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__id_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-10 13:40:15,664 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__mode_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-10 13:40:15,665 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__fsid_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-10 13:40:15,665 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__int64_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-10 13:40:15,665 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____key_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-10 13:40:15,665 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____blkcnt_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-10 13:40:15,665 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__pthread_mutex_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-10 13:40:15,665 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____clock_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-10 13:40:15,665 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____u_int in optional_data_creation_test04_false-valid-memtrack.i [2018-04-10 13:40:15,665 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____useconds_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-10 13:40:15,665 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__time_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-10 13:40:15,665 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____u_short in optional_data_creation_test04_false-valid-memtrack.i [2018-04-10 13:40:15,665 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____loff_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-10 13:40:15,666 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__suseconds_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-10 13:40:15,666 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____syscall_slong_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-10 13:40:15,666 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____blksize_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-10 13:40:15,666 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__int8_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-10 13:40:15,666 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__daddr_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-10 13:40:15,666 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____qaddr_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-10 13:40:15,666 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____uint16_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-10 13:40:15,666 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____fsfilcnt64_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-10 13:40:15,666 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____int64_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-10 13:40:15,666 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__pthread_condattr_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-10 13:40:15,666 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__ldiv_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-10 13:40:15,666 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__ino_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-10 13:40:15,667 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__ushort in optional_data_creation_test04_false-valid-memtrack.i [2018-04-10 13:40:15,667 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____rlim64_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-10 13:40:15,667 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____time_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-10 13:40:15,667 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____uint8_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-10 13:40:15,667 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__u_quad_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-10 13:40:15,667 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__u_int64_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-10 13:40:15,667 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__loff_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-10 13:40:15,667 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____daddr_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-10 13:40:15,667 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____fsfilcnt_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-10 13:40:15,667 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__pthread_barrierattr_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-10 13:40:15,667 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__sigset_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-10 13:40:15,668 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__blkcnt_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-10 13:40:15,668 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__ulong in optional_data_creation_test04_false-valid-memtrack.i [2018-04-10 13:40:15,668 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__u_char in optional_data_creation_test04_false-valid-memtrack.i [2018-04-10 13:40:15,668 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____u_long in optional_data_creation_test04_false-valid-memtrack.i [2018-04-10 13:40:15,668 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____int16_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-10 13:40:15,668 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__u_int32_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-10 13:40:15,668 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____dev_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-10 13:40:15,668 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____fsblkcnt_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-10 13:40:15,668 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__Data in optional_data_creation_test04_false-valid-memtrack.i [2018-04-10 13:40:15,668 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____off_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-10 13:40:15,668 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__pthread_key_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-10 13:40:15,669 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__pthread_rwlock_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-10 13:40:15,669 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__clock_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-10 13:40:15,669 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____fsid_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-10 13:40:15,669 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__blksize_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-10 13:40:15,669 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__u_long in optional_data_creation_test04_false-valid-memtrack.i [2018-04-10 13:40:15,669 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____uint32_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-10 13:40:15,669 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____caddr_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-10 13:40:15,669 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__fd_set in optional_data_creation_test04_false-valid-memtrack.i [2018-04-10 13:40:15,669 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__pthread_rwlockattr_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-10 13:40:15,669 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____ino_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-10 13:40:15,669 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____ino64_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-10 13:40:15,669 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____sigset_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-10 13:40:15,669 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__quad_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-10 13:40:15,670 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__caddr_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-10 13:40:15,670 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____rlim_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-10 13:40:15,670 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__pthread_cond_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-10 13:40:15,670 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__pthread_spinlock_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-10 13:40:15,670 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__u_int in optional_data_creation_test04_false-valid-memtrack.i [2018-04-10 13:40:15,670 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__u_int16_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-10 13:40:15,670 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____int32_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-10 13:40:15,670 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__fd_mask in optional_data_creation_test04_false-valid-memtrack.i [2018-04-10 13:40:15,670 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__div_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-10 13:40:15,670 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__size_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-10 13:40:15,670 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__u_int8_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-10 13:40:15,670 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__uid_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-10 13:40:15,670 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__key_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-10 13:40:15,670 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____pthread_slist_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-10 13:40:15,671 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____clockid_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-10 13:40:15,671 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__clockid_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-10 13:40:15,671 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____fd_mask in optional_data_creation_test04_false-valid-memtrack.i [2018-04-10 13:40:15,671 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__int16_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-10 13:40:15,671 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__lldiv_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-10 13:40:15,671 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____quad_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-10 13:40:15,671 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__pthread_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-10 13:40:15,671 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____gid_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-10 13:40:15,671 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__wchar_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-10 13:40:15,671 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____u_char in optional_data_creation_test04_false-valid-memtrack.i [2018-04-10 13:40:15,671 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____u_quad_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-10 13:40:15,671 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____syscall_ulong_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-10 13:40:15,672 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____id_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-10 13:40:15,672 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__pthread_barrier_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-10 13:40:15,672 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__pthread_mutexattr_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-10 13:40:15,672 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__fsblkcnt_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-10 13:40:15,672 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____timer_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-10 13:40:15,672 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____off64_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-10 13:40:15,672 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____suseconds_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-10 13:40:15,672 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____fsblkcnt64_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-10 13:40:15,672 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____pid_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-10 13:40:15,686 INFO L330 CDTParser]: Deleted temporary CDT project at /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/data/FLAG2f9fb3c56 [2018-04-10 13:40:15,689 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-04-10 13:40:15,690 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-04-10 13:40:15,691 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-04-10 13:40:15,691 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-04-10 13:40:15,694 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-04-10 13:40:15,695 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 10.04 01:40:15" (1/1) ... [2018-04-10 13:40:15,697 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@668d3b0d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.04 01:40:15, skipping insertion in model container [2018-04-10 13:40:15,697 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 10.04 01:40:15" (1/1) ... [2018-04-10 13:40:15,707 INFO L167 Dispatcher]: Using SV-COMP mode [2018-04-10 13:40:15,725 INFO L167 Dispatcher]: Using SV-COMP mode [2018-04-10 13:40:15,850 INFO L175 PostProcessor]: Settings: Checked method=main [2018-04-10 13:40:15,891 INFO L175 PostProcessor]: Settings: Checked method=main [2018-04-10 13:40:15,897 INFO L100 SccComputation]: Graph consists of 0 InCaSumBalls and 120 non ball SCCs. Number of states in SCCs 120. [2018-04-10 13:40:15,930 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.04 01:40:15 WrapperNode [2018-04-10 13:40:15,930 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-04-10 13:40:15,931 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-04-10 13:40:15,931 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-04-10 13:40:15,931 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-04-10 13:40:15,941 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.04 01:40:15" (1/1) ... [2018-04-10 13:40:15,941 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.04 01:40:15" (1/1) ... [2018-04-10 13:40:15,952 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.04 01:40:15" (1/1) ... [2018-04-10 13:40:15,952 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.04 01:40:15" (1/1) ... [2018-04-10 13:40:15,962 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.04 01:40:15" (1/1) ... [2018-04-10 13:40:15,967 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.04 01:40:15" (1/1) ... [2018-04-10 13:40:15,969 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.04 01:40:15" (1/1) ... [2018-04-10 13:40:15,973 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-04-10 13:40:15,973 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-04-10 13:40:15,974 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-04-10 13:40:15,974 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-04-10 13:40:15,974 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.04 01:40:15" (1/1) ... No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-04-10 13:40:16,052 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-04-10 13:40:16,053 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-04-10 13:40:16,053 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____bswap_32 [2018-04-10 13:40:16,053 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____bswap_64 [2018-04-10 13:40:16,053 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_data [2018-04-10 13:40:16,053 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeData [2018-04-10 13:40:16,053 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append [2018-04-10 13:40:16,053 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-04-10 13:40:16,053 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_error [2018-04-10 13:40:16,053 INFO L128 BoogieDeclarations]: Found specification of procedure __ctype_get_mb_cur_max [2018-04-10 13:40:16,053 INFO L128 BoogieDeclarations]: Found specification of procedure atof [2018-04-10 13:40:16,053 INFO L128 BoogieDeclarations]: Found specification of procedure atoi [2018-04-10 13:40:16,053 INFO L128 BoogieDeclarations]: Found specification of procedure atol [2018-04-10 13:40:16,053 INFO L128 BoogieDeclarations]: Found specification of procedure atoll [2018-04-10 13:40:16,054 INFO L128 BoogieDeclarations]: Found specification of procedure strtod [2018-04-10 13:40:16,054 INFO L128 BoogieDeclarations]: Found specification of procedure strtof [2018-04-10 13:40:16,054 INFO L128 BoogieDeclarations]: Found specification of procedure strtold [2018-04-10 13:40:16,054 INFO L128 BoogieDeclarations]: Found specification of procedure strtol [2018-04-10 13:40:16,054 INFO L128 BoogieDeclarations]: Found specification of procedure strtoul [2018-04-10 13:40:16,054 INFO L128 BoogieDeclarations]: Found specification of procedure strtoq [2018-04-10 13:40:16,054 INFO L128 BoogieDeclarations]: Found specification of procedure strtouq [2018-04-10 13:40:16,054 INFO L128 BoogieDeclarations]: Found specification of procedure strtoll [2018-04-10 13:40:16,054 INFO L128 BoogieDeclarations]: Found specification of procedure strtoull [2018-04-10 13:40:16,055 INFO L128 BoogieDeclarations]: Found specification of procedure l64a [2018-04-10 13:40:16,055 INFO L128 BoogieDeclarations]: Found specification of procedure a64l [2018-04-10 13:40:16,055 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____bswap_32 [2018-04-10 13:40:16,055 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____bswap_64 [2018-04-10 13:40:16,055 INFO L128 BoogieDeclarations]: Found specification of procedure select [2018-04-10 13:40:16,055 INFO L128 BoogieDeclarations]: Found specification of procedure pselect [2018-04-10 13:40:16,055 INFO L128 BoogieDeclarations]: Found specification of procedure gnu_dev_major [2018-04-10 13:40:16,055 INFO L128 BoogieDeclarations]: Found specification of procedure gnu_dev_minor [2018-04-10 13:40:16,055 INFO L128 BoogieDeclarations]: Found specification of procedure gnu_dev_makedev [2018-04-10 13:40:16,056 INFO L128 BoogieDeclarations]: Found specification of procedure random [2018-04-10 13:40:16,056 INFO L128 BoogieDeclarations]: Found specification of procedure srandom [2018-04-10 13:40:16,056 INFO L128 BoogieDeclarations]: Found specification of procedure initstate [2018-04-10 13:40:16,056 INFO L128 BoogieDeclarations]: Found specification of procedure setstate [2018-04-10 13:40:16,056 INFO L128 BoogieDeclarations]: Found specification of procedure random_r [2018-04-10 13:40:16,056 INFO L128 BoogieDeclarations]: Found specification of procedure srandom_r [2018-04-10 13:40:16,056 INFO L128 BoogieDeclarations]: Found specification of procedure initstate_r [2018-04-10 13:40:16,056 INFO L128 BoogieDeclarations]: Found specification of procedure setstate_r [2018-04-10 13:40:16,056 INFO L128 BoogieDeclarations]: Found specification of procedure rand [2018-04-10 13:40:16,056 INFO L128 BoogieDeclarations]: Found specification of procedure srand [2018-04-10 13:40:16,057 INFO L128 BoogieDeclarations]: Found specification of procedure rand_r [2018-04-10 13:40:16,057 INFO L128 BoogieDeclarations]: Found specification of procedure drand48 [2018-04-10 13:40:16,057 INFO L128 BoogieDeclarations]: Found specification of procedure erand48 [2018-04-10 13:40:16,057 INFO L128 BoogieDeclarations]: Found specification of procedure lrand48 [2018-04-10 13:40:16,057 INFO L128 BoogieDeclarations]: Found specification of procedure nrand48 [2018-04-10 13:40:16,057 INFO L128 BoogieDeclarations]: Found specification of procedure mrand48 [2018-04-10 13:40:16,057 INFO L128 BoogieDeclarations]: Found specification of procedure jrand48 [2018-04-10 13:40:16,057 INFO L128 BoogieDeclarations]: Found specification of procedure srand48 [2018-04-10 13:40:16,057 INFO L128 BoogieDeclarations]: Found specification of procedure seed48 [2018-04-10 13:40:16,057 INFO L128 BoogieDeclarations]: Found specification of procedure lcong48 [2018-04-10 13:40:16,058 INFO L128 BoogieDeclarations]: Found specification of procedure drand48_r [2018-04-10 13:40:16,058 INFO L128 BoogieDeclarations]: Found specification of procedure erand48_r [2018-04-10 13:40:16,058 INFO L128 BoogieDeclarations]: Found specification of procedure lrand48_r [2018-04-10 13:40:16,058 INFO L128 BoogieDeclarations]: Found specification of procedure nrand48_r [2018-04-10 13:40:16,058 INFO L128 BoogieDeclarations]: Found specification of procedure mrand48_r [2018-04-10 13:40:16,058 INFO L128 BoogieDeclarations]: Found specification of procedure jrand48_r [2018-04-10 13:40:16,058 INFO L128 BoogieDeclarations]: Found specification of procedure srand48_r [2018-04-10 13:40:16,058 INFO L128 BoogieDeclarations]: Found specification of procedure seed48_r [2018-04-10 13:40:16,058 INFO L128 BoogieDeclarations]: Found specification of procedure lcong48_r [2018-04-10 13:40:16,058 INFO L128 BoogieDeclarations]: Found specification of procedure malloc [2018-04-10 13:40:16,059 INFO L128 BoogieDeclarations]: Found specification of procedure calloc [2018-04-10 13:40:16,059 INFO L128 BoogieDeclarations]: Found specification of procedure realloc [2018-04-10 13:40:16,059 INFO L128 BoogieDeclarations]: Found specification of procedure free [2018-04-10 13:40:16,059 INFO L128 BoogieDeclarations]: Found specification of procedure cfree [2018-04-10 13:40:16,059 INFO L128 BoogieDeclarations]: Found specification of procedure alloca [2018-04-10 13:40:16,059 INFO L128 BoogieDeclarations]: Found specification of procedure valloc [2018-04-10 13:40:16,059 INFO L128 BoogieDeclarations]: Found specification of procedure posix_memalign [2018-04-10 13:40:16,059 INFO L128 BoogieDeclarations]: Found specification of procedure aligned_alloc [2018-04-10 13:40:16,059 INFO L128 BoogieDeclarations]: Found specification of procedure abort [2018-04-10 13:40:16,059 INFO L128 BoogieDeclarations]: Found specification of procedure atexit [2018-04-10 13:40:16,060 INFO L128 BoogieDeclarations]: Found specification of procedure at_quick_exit [2018-04-10 13:40:16,060 INFO L128 BoogieDeclarations]: Found specification of procedure on_exit [2018-04-10 13:40:16,060 INFO L128 BoogieDeclarations]: Found specification of procedure exit [2018-04-10 13:40:16,060 INFO L128 BoogieDeclarations]: Found specification of procedure quick_exit [2018-04-10 13:40:16,060 INFO L128 BoogieDeclarations]: Found specification of procedure _Exit [2018-04-10 13:40:16,060 INFO L128 BoogieDeclarations]: Found specification of procedure getenv [2018-04-10 13:40:16,060 INFO L128 BoogieDeclarations]: Found specification of procedure putenv [2018-04-10 13:40:16,060 INFO L128 BoogieDeclarations]: Found specification of procedure setenv [2018-04-10 13:40:16,060 INFO L128 BoogieDeclarations]: Found specification of procedure unsetenv [2018-04-10 13:40:16,060 INFO L128 BoogieDeclarations]: Found specification of procedure clearenv [2018-04-10 13:40:16,061 INFO L128 BoogieDeclarations]: Found specification of procedure mktemp [2018-04-10 13:40:16,061 INFO L128 BoogieDeclarations]: Found specification of procedure mkstemp [2018-04-10 13:40:16,061 INFO L128 BoogieDeclarations]: Found specification of procedure mkstemps [2018-04-10 13:40:16,061 INFO L128 BoogieDeclarations]: Found specification of procedure mkdtemp [2018-04-10 13:40:16,061 INFO L128 BoogieDeclarations]: Found specification of procedure system [2018-04-10 13:40:16,061 INFO L128 BoogieDeclarations]: Found specification of procedure realpath [2018-04-10 13:40:16,061 INFO L128 BoogieDeclarations]: Found specification of procedure bsearch [2018-04-10 13:40:16,061 INFO L128 BoogieDeclarations]: Found specification of procedure qsort [2018-04-10 13:40:16,061 INFO L128 BoogieDeclarations]: Found specification of procedure abs [2018-04-10 13:40:16,061 INFO L128 BoogieDeclarations]: Found specification of procedure labs [2018-04-10 13:40:16,062 INFO L128 BoogieDeclarations]: Found specification of procedure llabs [2018-04-10 13:40:16,062 INFO L128 BoogieDeclarations]: Found specification of procedure div [2018-04-10 13:40:16,062 INFO L128 BoogieDeclarations]: Found specification of procedure ldiv [2018-04-10 13:40:16,062 INFO L128 BoogieDeclarations]: Found specification of procedure lldiv [2018-04-10 13:40:16,062 INFO L128 BoogieDeclarations]: Found specification of procedure ecvt [2018-04-10 13:40:16,062 INFO L128 BoogieDeclarations]: Found specification of procedure fcvt [2018-04-10 13:40:16,062 INFO L128 BoogieDeclarations]: Found specification of procedure gcvt [2018-04-10 13:40:16,062 INFO L128 BoogieDeclarations]: Found specification of procedure qecvt [2018-04-10 13:40:16,062 INFO L128 BoogieDeclarations]: Found specification of procedure qfcvt [2018-04-10 13:40:16,063 INFO L128 BoogieDeclarations]: Found specification of procedure qgcvt [2018-04-10 13:40:16,063 INFO L128 BoogieDeclarations]: Found specification of procedure ecvt_r [2018-04-10 13:40:16,063 INFO L128 BoogieDeclarations]: Found specification of procedure fcvt_r [2018-04-10 13:40:16,063 INFO L128 BoogieDeclarations]: Found specification of procedure qecvt_r [2018-04-10 13:40:16,063 INFO L128 BoogieDeclarations]: Found specification of procedure qfcvt_r [2018-04-10 13:40:16,063 INFO L128 BoogieDeclarations]: Found specification of procedure mblen [2018-04-10 13:40:16,063 INFO L128 BoogieDeclarations]: Found specification of procedure mbtowc [2018-04-10 13:40:16,063 INFO L128 BoogieDeclarations]: Found specification of procedure wctomb [2018-04-10 13:40:16,063 INFO L128 BoogieDeclarations]: Found specification of procedure mbstowcs [2018-04-10 13:40:16,063 INFO L128 BoogieDeclarations]: Found specification of procedure wcstombs [2018-04-10 13:40:16,063 INFO L128 BoogieDeclarations]: Found specification of procedure rpmatch [2018-04-10 13:40:16,064 INFO L128 BoogieDeclarations]: Found specification of procedure getsubopt [2018-04-10 13:40:16,064 INFO L128 BoogieDeclarations]: Found specification of procedure getloadavg [2018-04-10 13:40:16,064 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2018-04-10 13:40:16,064 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_data [2018-04-10 13:40:16,064 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-04-10 13:40:16,064 INFO L128 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2018-04-10 13:40:16,064 INFO L128 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2018-04-10 13:40:16,064 INFO L128 BoogieDeclarations]: Found specification of procedure write~int [2018-04-10 13:40:16,064 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeData [2018-04-10 13:40:16,064 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-04-10 13:40:16,065 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append [2018-04-10 13:40:16,065 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-04-10 13:40:16,065 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-04-10 13:40:16,065 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-04-10 13:40:16,065 INFO L128 BoogieDeclarations]: Found specification of procedure write~unchecked~int [2018-04-10 13:40:16,065 INFO L128 BoogieDeclarations]: Found specification of procedure read~int [2018-04-10 13:40:16,413 INFO L259 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-04-10 13:40:16,413 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 10.04 01:40:16 BoogieIcfgContainer [2018-04-10 13:40:16,414 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-04-10 13:40:16,414 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-04-10 13:40:16,414 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-04-10 13:40:16,417 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-04-10 13:40:16,417 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 10.04 01:40:15" (1/3) ... [2018-04-10 13:40:16,418 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7692edfd and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 10.04 01:40:16, skipping insertion in model container [2018-04-10 13:40:16,418 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.04 01:40:15" (2/3) ... [2018-04-10 13:40:16,418 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7692edfd and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 10.04 01:40:16, skipping insertion in model container [2018-04-10 13:40:16,418 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 10.04 01:40:16" (3/3) ... [2018-04-10 13:40:16,420 INFO L107 eAbstractionObserver]: Analyzing ICFG optional_data_creation_test04_false-valid-memtrack.i [2018-04-10 13:40:16,428 INFO L131 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-04-10 13:40:16,435 INFO L143 ceAbstractionStarter]: Appying trace abstraction to program that has 45 error locations. [2018-04-10 13:40:16,468 INFO L128 ementStrategyFactory]: Using default assertion order modulation [2018-04-10 13:40:16,469 INFO L369 AbstractCegarLoop]: Interprodecural is true [2018-04-10 13:40:16,469 INFO L370 AbstractCegarLoop]: Hoare is false [2018-04-10 13:40:16,469 INFO L371 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-04-10 13:40:16,469 INFO L372 AbstractCegarLoop]: Backedges is TWOTRACK [2018-04-10 13:40:16,469 INFO L373 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-04-10 13:40:16,469 INFO L374 AbstractCegarLoop]: Difference is false [2018-04-10 13:40:16,469 INFO L375 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-04-10 13:40:16,469 INFO L380 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-04-10 13:40:16,470 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-04-10 13:40:16,482 INFO L276 IsEmpty]: Start isEmpty. Operand 127 states. [2018-04-10 13:40:16,488 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 8 [2018-04-10 13:40:16,489 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 13:40:16,489 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1] [2018-04-10 13:40:16,489 INFO L408 AbstractCegarLoop]: === Iteration 1 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-04-10 13:40:16,492 INFO L82 PathProgramCache]: Analyzing trace with hash -1118692906, now seen corresponding path program 1 times [2018-04-10 13:40:16,493 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-10 13:40:16,494 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-10 13:40:16,524 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:40:16,525 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:40:16,525 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:40:16,548 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:40:16,552 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 13:40:16,592 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 13:40:16,594 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-10 13:40:16,594 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-04-10 13:40:16,596 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-04-10 13:40:16,608 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-04-10 13:40:16,608 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-04-10 13:40:16,610 INFO L87 Difference]: Start difference. First operand 127 states. Second operand 3 states. [2018-04-10 13:40:16,715 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 13:40:16,715 INFO L93 Difference]: Finished difference Result 129 states and 136 transitions. [2018-04-10 13:40:16,716 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-04-10 13:40:16,716 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 7 [2018-04-10 13:40:16,717 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 13:40:16,725 INFO L225 Difference]: With dead ends: 129 [2018-04-10 13:40:16,726 INFO L226 Difference]: Without dead ends: 126 [2018-04-10 13:40:16,727 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-04-10 13:40:16,739 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 126 states. [2018-04-10 13:40:16,755 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 126 to 123. [2018-04-10 13:40:16,757 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 123 states. [2018-04-10 13:40:16,758 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 123 states to 123 states and 130 transitions. [2018-04-10 13:40:16,760 INFO L78 Accepts]: Start accepts. Automaton has 123 states and 130 transitions. Word has length 7 [2018-04-10 13:40:16,760 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 13:40:16,760 INFO L459 AbstractCegarLoop]: Abstraction has 123 states and 130 transitions. [2018-04-10 13:40:16,760 INFO L460 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-04-10 13:40:16,760 INFO L276 IsEmpty]: Start isEmpty. Operand 123 states and 130 transitions. [2018-04-10 13:40:16,760 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 8 [2018-04-10 13:40:16,761 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 13:40:16,761 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1] [2018-04-10 13:40:16,761 INFO L408 AbstractCegarLoop]: === Iteration 2 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-04-10 13:40:16,761 INFO L82 PathProgramCache]: Analyzing trace with hash -1118692905, now seen corresponding path program 1 times [2018-04-10 13:40:16,761 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-10 13:40:16,761 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-10 13:40:16,762 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:40:16,762 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:40:16,762 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:40:16,773 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:40:16,773 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 13:40:16,797 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 13:40:16,797 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-10 13:40:16,798 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-04-10 13:40:16,798 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-04-10 13:40:16,799 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-04-10 13:40:16,799 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-04-10 13:40:16,799 INFO L87 Difference]: Start difference. First operand 123 states and 130 transitions. Second operand 3 states. [2018-04-10 13:40:16,873 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 13:40:16,873 INFO L93 Difference]: Finished difference Result 124 states and 132 transitions. [2018-04-10 13:40:16,875 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-04-10 13:40:16,875 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 7 [2018-04-10 13:40:16,875 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 13:40:16,876 INFO L225 Difference]: With dead ends: 124 [2018-04-10 13:40:16,876 INFO L226 Difference]: Without dead ends: 124 [2018-04-10 13:40:16,877 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-04-10 13:40:16,877 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 124 states. [2018-04-10 13:40:16,884 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 124 to 122. [2018-04-10 13:40:16,885 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 122 states. [2018-04-10 13:40:16,886 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 122 states to 122 states and 129 transitions. [2018-04-10 13:40:16,886 INFO L78 Accepts]: Start accepts. Automaton has 122 states and 129 transitions. Word has length 7 [2018-04-10 13:40:16,886 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 13:40:16,889 INFO L459 AbstractCegarLoop]: Abstraction has 122 states and 129 transitions. [2018-04-10 13:40:16,890 INFO L460 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-04-10 13:40:16,890 INFO L276 IsEmpty]: Start isEmpty. Operand 122 states and 129 transitions. [2018-04-10 13:40:16,890 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2018-04-10 13:40:16,890 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 13:40:16,890 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 13:40:16,890 INFO L408 AbstractCegarLoop]: === Iteration 3 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-04-10 13:40:16,891 INFO L82 PathProgramCache]: Analyzing trace with hash 1889111161, now seen corresponding path program 1 times [2018-04-10 13:40:16,891 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-10 13:40:16,891 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-10 13:40:16,892 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:40:16,892 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:40:16,892 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:40:16,909 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:40:16,910 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 13:40:16,964 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 13:40:16,964 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-10 13:40:16,965 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-04-10 13:40:16,965 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-04-10 13:40:16,965 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-04-10 13:40:16,965 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-04-10 13:40:16,965 INFO L87 Difference]: Start difference. First operand 122 states and 129 transitions. Second operand 5 states. [2018-04-10 13:40:17,125 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 13:40:17,125 INFO L93 Difference]: Finished difference Result 135 states and 143 transitions. [2018-04-10 13:40:17,125 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-04-10 13:40:17,125 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 14 [2018-04-10 13:40:17,126 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 13:40:17,126 INFO L225 Difference]: With dead ends: 135 [2018-04-10 13:40:17,126 INFO L226 Difference]: Without dead ends: 135 [2018-04-10 13:40:17,127 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-04-10 13:40:17,127 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 135 states. [2018-04-10 13:40:17,130 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 135 to 128. [2018-04-10 13:40:17,130 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 128 states. [2018-04-10 13:40:17,131 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 128 states to 128 states and 137 transitions. [2018-04-10 13:40:17,131 INFO L78 Accepts]: Start accepts. Automaton has 128 states and 137 transitions. Word has length 14 [2018-04-10 13:40:17,131 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 13:40:17,131 INFO L459 AbstractCegarLoop]: Abstraction has 128 states and 137 transitions. [2018-04-10 13:40:17,131 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-04-10 13:40:17,132 INFO L276 IsEmpty]: Start isEmpty. Operand 128 states and 137 transitions. [2018-04-10 13:40:17,132 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2018-04-10 13:40:17,132 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 13:40:17,132 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 13:40:17,132 INFO L408 AbstractCegarLoop]: === Iteration 4 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-04-10 13:40:17,132 INFO L82 PathProgramCache]: Analyzing trace with hash 1889111162, now seen corresponding path program 1 times [2018-04-10 13:40:17,132 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-10 13:40:17,132 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-10 13:40:17,133 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:40:17,133 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:40:17,133 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:40:17,140 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:40:17,141 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 13:40:17,204 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 13:40:17,204 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-10 13:40:17,204 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-04-10 13:40:17,205 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-04-10 13:40:17,205 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-04-10 13:40:17,205 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-04-10 13:40:17,206 INFO L87 Difference]: Start difference. First operand 128 states and 137 transitions. Second operand 7 states. [2018-04-10 13:40:17,374 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 13:40:17,375 INFO L93 Difference]: Finished difference Result 133 states and 142 transitions. [2018-04-10 13:40:17,375 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-04-10 13:40:17,375 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 14 [2018-04-10 13:40:17,375 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 13:40:17,376 INFO L225 Difference]: With dead ends: 133 [2018-04-10 13:40:17,376 INFO L226 Difference]: Without dead ends: 133 [2018-04-10 13:40:17,376 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=38, Unknown=0, NotChecked=0, Total=56 [2018-04-10 13:40:17,376 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 133 states. [2018-04-10 13:40:17,380 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 133 to 128. [2018-04-10 13:40:17,381 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 128 states. [2018-04-10 13:40:17,382 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 128 states to 128 states and 136 transitions. [2018-04-10 13:40:17,382 INFO L78 Accepts]: Start accepts. Automaton has 128 states and 136 transitions. Word has length 14 [2018-04-10 13:40:17,382 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 13:40:17,382 INFO L459 AbstractCegarLoop]: Abstraction has 128 states and 136 transitions. [2018-04-10 13:40:17,382 INFO L460 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-04-10 13:40:17,382 INFO L276 IsEmpty]: Start isEmpty. Operand 128 states and 136 transitions. [2018-04-10 13:40:17,382 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2018-04-10 13:40:17,382 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 13:40:17,382 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 13:40:17,382 INFO L408 AbstractCegarLoop]: === Iteration 5 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-04-10 13:40:17,382 INFO L82 PathProgramCache]: Analyzing trace with hash -1567096148, now seen corresponding path program 1 times [2018-04-10 13:40:17,383 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-10 13:40:17,383 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-10 13:40:17,383 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:40:17,383 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:40:17,383 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:40:17,393 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:40:17,394 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 13:40:17,419 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 13:40:17,419 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-10 13:40:17,419 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-04-10 13:40:17,419 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-04-10 13:40:17,419 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-04-10 13:40:17,419 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-04-10 13:40:17,419 INFO L87 Difference]: Start difference. First operand 128 states and 136 transitions. Second operand 4 states. [2018-04-10 13:40:17,489 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 13:40:17,490 INFO L93 Difference]: Finished difference Result 127 states and 135 transitions. [2018-04-10 13:40:17,490 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-04-10 13:40:17,490 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 15 [2018-04-10 13:40:17,490 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 13:40:17,491 INFO L225 Difference]: With dead ends: 127 [2018-04-10 13:40:17,491 INFO L226 Difference]: Without dead ends: 127 [2018-04-10 13:40:17,491 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-04-10 13:40:17,491 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 127 states. [2018-04-10 13:40:17,495 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 127 to 127. [2018-04-10 13:40:17,496 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 127 states. [2018-04-10 13:40:17,496 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 127 states to 127 states and 135 transitions. [2018-04-10 13:40:17,497 INFO L78 Accepts]: Start accepts. Automaton has 127 states and 135 transitions. Word has length 15 [2018-04-10 13:40:17,497 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 13:40:17,497 INFO L459 AbstractCegarLoop]: Abstraction has 127 states and 135 transitions. [2018-04-10 13:40:17,497 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-04-10 13:40:17,497 INFO L276 IsEmpty]: Start isEmpty. Operand 127 states and 135 transitions. [2018-04-10 13:40:17,497 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2018-04-10 13:40:17,497 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 13:40:17,497 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 13:40:17,498 INFO L408 AbstractCegarLoop]: === Iteration 6 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-04-10 13:40:17,498 INFO L82 PathProgramCache]: Analyzing trace with hash -1567096147, now seen corresponding path program 1 times [2018-04-10 13:40:17,498 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-10 13:40:17,498 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-10 13:40:17,499 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:40:17,499 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:40:17,499 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:40:17,508 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:40:17,508 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 13:40:17,539 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 13:40:17,539 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-10 13:40:17,539 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-04-10 13:40:17,539 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-04-10 13:40:17,539 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-04-10 13:40:17,539 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-04-10 13:40:17,540 INFO L87 Difference]: Start difference. First operand 127 states and 135 transitions. Second operand 4 states. [2018-04-10 13:40:17,600 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 13:40:17,600 INFO L93 Difference]: Finished difference Result 126 states and 134 transitions. [2018-04-10 13:40:17,601 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-04-10 13:40:17,601 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 15 [2018-04-10 13:40:17,601 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 13:40:17,601 INFO L225 Difference]: With dead ends: 126 [2018-04-10 13:40:17,601 INFO L226 Difference]: Without dead ends: 126 [2018-04-10 13:40:17,601 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-04-10 13:40:17,602 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 126 states. [2018-04-10 13:40:17,605 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 126 to 126. [2018-04-10 13:40:17,605 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 126 states. [2018-04-10 13:40:17,606 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 126 states to 126 states and 134 transitions. [2018-04-10 13:40:17,606 INFO L78 Accepts]: Start accepts. Automaton has 126 states and 134 transitions. Word has length 15 [2018-04-10 13:40:17,606 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 13:40:17,606 INFO L459 AbstractCegarLoop]: Abstraction has 126 states and 134 transitions. [2018-04-10 13:40:17,606 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-04-10 13:40:17,606 INFO L276 IsEmpty]: Start isEmpty. Operand 126 states and 134 transitions. [2018-04-10 13:40:17,607 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2018-04-10 13:40:17,607 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 13:40:17,607 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 13:40:17,607 INFO L408 AbstractCegarLoop]: === Iteration 7 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-04-10 13:40:17,607 INFO L82 PathProgramCache]: Analyzing trace with hash -262877075, now seen corresponding path program 1 times [2018-04-10 13:40:17,607 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-10 13:40:17,607 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-10 13:40:17,608 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:40:17,608 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:40:17,608 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:40:17,618 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:40:17,619 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 13:40:17,642 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 13:40:17,642 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-10 13:40:17,642 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-04-10 13:40:17,642 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-04-10 13:40:17,643 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-04-10 13:40:17,643 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-04-10 13:40:17,643 INFO L87 Difference]: Start difference. First operand 126 states and 134 transitions. Second operand 5 states. [2018-04-10 13:40:17,732 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 13:40:17,732 INFO L93 Difference]: Finished difference Result 143 states and 152 transitions. [2018-04-10 13:40:17,732 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-04-10 13:40:17,732 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2018-04-10 13:40:17,732 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 13:40:17,733 INFO L225 Difference]: With dead ends: 143 [2018-04-10 13:40:17,733 INFO L226 Difference]: Without dead ends: 143 [2018-04-10 13:40:17,733 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-04-10 13:40:17,734 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 143 states. [2018-04-10 13:40:17,737 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 143 to 129. [2018-04-10 13:40:17,737 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 129 states. [2018-04-10 13:40:17,738 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 129 states to 129 states and 138 transitions. [2018-04-10 13:40:17,738 INFO L78 Accepts]: Start accepts. Automaton has 129 states and 138 transitions. Word has length 22 [2018-04-10 13:40:17,742 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 13:40:17,742 INFO L459 AbstractCegarLoop]: Abstraction has 129 states and 138 transitions. [2018-04-10 13:40:17,742 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-04-10 13:40:17,742 INFO L276 IsEmpty]: Start isEmpty. Operand 129 states and 138 transitions. [2018-04-10 13:40:17,743 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2018-04-10 13:40:17,743 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 13:40:17,743 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 13:40:17,743 INFO L408 AbstractCegarLoop]: === Iteration 8 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-04-10 13:40:17,743 INFO L82 PathProgramCache]: Analyzing trace with hash -262877074, now seen corresponding path program 1 times [2018-04-10 13:40:17,743 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-10 13:40:17,744 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-10 13:40:17,744 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:40:17,744 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:40:17,744 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:40:17,754 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:40:17,754 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 13:40:17,783 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 13:40:17,783 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-10 13:40:17,783 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-04-10 13:40:17,784 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-04-10 13:40:17,784 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-04-10 13:40:17,784 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-04-10 13:40:17,784 INFO L87 Difference]: Start difference. First operand 129 states and 138 transitions. Second operand 5 states. [2018-04-10 13:40:17,884 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 13:40:17,884 INFO L93 Difference]: Finished difference Result 135 states and 144 transitions. [2018-04-10 13:40:17,884 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-04-10 13:40:17,885 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2018-04-10 13:40:17,885 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 13:40:17,885 INFO L225 Difference]: With dead ends: 135 [2018-04-10 13:40:17,885 INFO L226 Difference]: Without dead ends: 135 [2018-04-10 13:40:17,886 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-04-10 13:40:17,886 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 135 states. [2018-04-10 13:40:17,887 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 135 to 129. [2018-04-10 13:40:17,887 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 129 states. [2018-04-10 13:40:17,888 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 129 states to 129 states and 137 transitions. [2018-04-10 13:40:17,888 INFO L78 Accepts]: Start accepts. Automaton has 129 states and 137 transitions. Word has length 22 [2018-04-10 13:40:17,888 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 13:40:17,888 INFO L459 AbstractCegarLoop]: Abstraction has 129 states and 137 transitions. [2018-04-10 13:40:17,888 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-04-10 13:40:17,888 INFO L276 IsEmpty]: Start isEmpty. Operand 129 states and 137 transitions. [2018-04-10 13:40:17,888 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2018-04-10 13:40:17,889 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 13:40:17,889 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 13:40:17,889 INFO L408 AbstractCegarLoop]: === Iteration 9 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-04-10 13:40:17,889 INFO L82 PathProgramCache]: Analyzing trace with hash 440344442, now seen corresponding path program 1 times [2018-04-10 13:40:17,889 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-10 13:40:17,889 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-10 13:40:17,889 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:40:17,889 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:40:17,889 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:40:17,896 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:40:17,897 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 13:40:17,922 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 13:40:17,922 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-10 13:40:17,922 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-04-10 13:40:17,923 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-04-10 13:40:17,923 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-04-10 13:40:17,923 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-04-10 13:40:17,923 INFO L87 Difference]: Start difference. First operand 129 states and 137 transitions. Second operand 4 states. [2018-04-10 13:40:17,979 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 13:40:17,979 INFO L93 Difference]: Finished difference Result 134 states and 142 transitions. [2018-04-10 13:40:17,979 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-04-10 13:40:17,980 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 23 [2018-04-10 13:40:17,980 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 13:40:17,980 INFO L225 Difference]: With dead ends: 134 [2018-04-10 13:40:17,980 INFO L226 Difference]: Without dead ends: 134 [2018-04-10 13:40:17,980 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-04-10 13:40:17,981 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 134 states. [2018-04-10 13:40:17,982 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 134 to 130. [2018-04-10 13:40:17,982 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 130 states. [2018-04-10 13:40:17,983 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 130 states to 130 states and 139 transitions. [2018-04-10 13:40:17,983 INFO L78 Accepts]: Start accepts. Automaton has 130 states and 139 transitions. Word has length 23 [2018-04-10 13:40:17,983 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 13:40:17,983 INFO L459 AbstractCegarLoop]: Abstraction has 130 states and 139 transitions. [2018-04-10 13:40:17,983 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-04-10 13:40:17,983 INFO L276 IsEmpty]: Start isEmpty. Operand 130 states and 139 transitions. [2018-04-10 13:40:17,984 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2018-04-10 13:40:17,984 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 13:40:17,984 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 13:40:17,984 INFO L408 AbstractCegarLoop]: === Iteration 10 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-04-10 13:40:17,984 INFO L82 PathProgramCache]: Analyzing trace with hash 440344441, now seen corresponding path program 1 times [2018-04-10 13:40:17,984 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-10 13:40:17,984 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-10 13:40:17,985 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:40:17,985 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:40:17,985 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:40:17,994 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:40:17,994 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 13:40:18,011 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 13:40:18,011 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-10 13:40:18,011 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-04-10 13:40:18,012 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-04-10 13:40:18,012 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-04-10 13:40:18,012 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-04-10 13:40:18,020 INFO L87 Difference]: Start difference. First operand 130 states and 139 transitions. Second operand 4 states. [2018-04-10 13:40:18,088 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 13:40:18,088 INFO L93 Difference]: Finished difference Result 126 states and 134 transitions. [2018-04-10 13:40:18,088 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-04-10 13:40:18,088 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 23 [2018-04-10 13:40:18,088 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 13:40:18,089 INFO L225 Difference]: With dead ends: 126 [2018-04-10 13:40:18,089 INFO L226 Difference]: Without dead ends: 126 [2018-04-10 13:40:18,089 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-04-10 13:40:18,089 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 126 states. [2018-04-10 13:40:18,090 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 126 to 126. [2018-04-10 13:40:18,090 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 126 states. [2018-04-10 13:40:18,091 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 126 states to 126 states and 134 transitions. [2018-04-10 13:40:18,091 INFO L78 Accepts]: Start accepts. Automaton has 126 states and 134 transitions. Word has length 23 [2018-04-10 13:40:18,091 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 13:40:18,091 INFO L459 AbstractCegarLoop]: Abstraction has 126 states and 134 transitions. [2018-04-10 13:40:18,091 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-04-10 13:40:18,092 INFO L276 IsEmpty]: Start isEmpty. Operand 126 states and 134 transitions. [2018-04-10 13:40:18,092 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2018-04-10 13:40:18,092 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 13:40:18,092 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 13:40:18,093 INFO L408 AbstractCegarLoop]: === Iteration 11 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-04-10 13:40:18,093 INFO L82 PathProgramCache]: Analyzing trace with hash 778201806, now seen corresponding path program 1 times [2018-04-10 13:40:18,093 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-10 13:40:18,093 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-10 13:40:18,093 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:40:18,093 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:40:18,093 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:40:18,100 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:40:18,101 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 13:40:18,124 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 13:40:18,124 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-10 13:40:18,125 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-04-10 13:40:18,125 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-04-10 13:40:18,125 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-04-10 13:40:18,125 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-04-10 13:40:18,125 INFO L87 Difference]: Start difference. First operand 126 states and 134 transitions. Second operand 4 states. [2018-04-10 13:40:18,184 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 13:40:18,185 INFO L93 Difference]: Finished difference Result 136 states and 144 transitions. [2018-04-10 13:40:18,185 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-04-10 13:40:18,185 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 24 [2018-04-10 13:40:18,185 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 13:40:18,186 INFO L225 Difference]: With dead ends: 136 [2018-04-10 13:40:18,186 INFO L226 Difference]: Without dead ends: 136 [2018-04-10 13:40:18,186 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-04-10 13:40:18,186 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 136 states. [2018-04-10 13:40:18,187 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 136 to 128. [2018-04-10 13:40:18,188 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 128 states. [2018-04-10 13:40:18,188 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 128 states to 128 states and 137 transitions. [2018-04-10 13:40:18,188 INFO L78 Accepts]: Start accepts. Automaton has 128 states and 137 transitions. Word has length 24 [2018-04-10 13:40:18,188 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 13:40:18,188 INFO L459 AbstractCegarLoop]: Abstraction has 128 states and 137 transitions. [2018-04-10 13:40:18,188 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-04-10 13:40:18,188 INFO L276 IsEmpty]: Start isEmpty. Operand 128 states and 137 transitions. [2018-04-10 13:40:18,188 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2018-04-10 13:40:18,189 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 13:40:18,189 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 13:40:18,189 INFO L408 AbstractCegarLoop]: === Iteration 12 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-04-10 13:40:18,189 INFO L82 PathProgramCache]: Analyzing trace with hash 778201807, now seen corresponding path program 1 times [2018-04-10 13:40:18,189 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-10 13:40:18,189 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-10 13:40:18,189 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:40:18,189 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:40:18,190 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:40:18,198 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:40:18,199 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 13:40:18,249 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 13:40:18,249 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-10 13:40:18,249 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-04-10 13:40:18,250 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-04-10 13:40:18,250 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-04-10 13:40:18,250 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-04-10 13:40:18,250 INFO L87 Difference]: Start difference. First operand 128 states and 137 transitions. Second operand 7 states. [2018-04-10 13:40:18,419 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 13:40:18,419 INFO L93 Difference]: Finished difference Result 128 states and 136 transitions. [2018-04-10 13:40:18,419 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-04-10 13:40:18,419 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 24 [2018-04-10 13:40:18,419 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 13:40:18,420 INFO L225 Difference]: With dead ends: 128 [2018-04-10 13:40:18,420 INFO L226 Difference]: Without dead ends: 128 [2018-04-10 13:40:18,420 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=32, Invalid=78, Unknown=0, NotChecked=0, Total=110 [2018-04-10 13:40:18,420 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 128 states. [2018-04-10 13:40:18,422 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 128 to 128. [2018-04-10 13:40:18,422 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 128 states. [2018-04-10 13:40:18,423 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 128 states to 128 states and 136 transitions. [2018-04-10 13:40:18,423 INFO L78 Accepts]: Start accepts. Automaton has 128 states and 136 transitions. Word has length 24 [2018-04-10 13:40:18,423 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 13:40:18,423 INFO L459 AbstractCegarLoop]: Abstraction has 128 states and 136 transitions. [2018-04-10 13:40:18,424 INFO L460 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-04-10 13:40:18,424 INFO L276 IsEmpty]: Start isEmpty. Operand 128 states and 136 transitions. [2018-04-10 13:40:18,424 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2018-04-10 13:40:18,424 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 13:40:18,424 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 13:40:18,424 INFO L408 AbstractCegarLoop]: === Iteration 13 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-04-10 13:40:18,424 INFO L82 PathProgramCache]: Analyzing trace with hash 765747116, now seen corresponding path program 1 times [2018-04-10 13:40:18,425 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-10 13:40:18,425 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-10 13:40:18,425 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:40:18,425 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:40:18,425 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:40:18,432 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:40:18,433 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 13:40:18,471 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 13:40:18,471 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-10 13:40:18,471 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-04-10 13:40:18,471 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-04-10 13:40:18,471 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-04-10 13:40:18,472 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2018-04-10 13:40:18,472 INFO L87 Difference]: Start difference. First operand 128 states and 136 transitions. Second operand 5 states. [2018-04-10 13:40:18,570 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 13:40:18,570 INFO L93 Difference]: Finished difference Result 125 states and 133 transitions. [2018-04-10 13:40:18,571 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-04-10 13:40:18,571 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 24 [2018-04-10 13:40:18,571 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 13:40:18,571 INFO L225 Difference]: With dead ends: 125 [2018-04-10 13:40:18,572 INFO L226 Difference]: Without dead ends: 125 [2018-04-10 13:40:18,572 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2018-04-10 13:40:18,572 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 125 states. [2018-04-10 13:40:18,574 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 125 to 123. [2018-04-10 13:40:18,574 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 123 states. [2018-04-10 13:40:18,575 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 123 states to 123 states and 131 transitions. [2018-04-10 13:40:18,575 INFO L78 Accepts]: Start accepts. Automaton has 123 states and 131 transitions. Word has length 24 [2018-04-10 13:40:18,575 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 13:40:18,575 INFO L459 AbstractCegarLoop]: Abstraction has 123 states and 131 transitions. [2018-04-10 13:40:18,575 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-04-10 13:40:18,575 INFO L276 IsEmpty]: Start isEmpty. Operand 123 states and 131 transitions. [2018-04-10 13:40:18,576 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-04-10 13:40:18,576 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 13:40:18,576 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 13:40:18,576 INFO L408 AbstractCegarLoop]: === Iteration 14 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-04-10 13:40:18,576 INFO L82 PathProgramCache]: Analyzing trace with hash -103829771, now seen corresponding path program 1 times [2018-04-10 13:40:18,576 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-10 13:40:18,576 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-10 13:40:18,577 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:40:18,577 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:40:18,577 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:40:18,585 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:40:18,586 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 13:40:18,657 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 13:40:18,657 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-10 13:40:18,657 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-04-10 13:40:18,658 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-04-10 13:40:18,658 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-04-10 13:40:18,658 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=38, Unknown=0, NotChecked=0, Total=56 [2018-04-10 13:40:18,658 INFO L87 Difference]: Start difference. First operand 123 states and 131 transitions. Second operand 8 states. [2018-04-10 13:40:18,890 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 13:40:18,890 INFO L93 Difference]: Finished difference Result 139 states and 148 transitions. [2018-04-10 13:40:18,890 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-04-10 13:40:18,890 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 29 [2018-04-10 13:40:18,890 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 13:40:18,891 INFO L225 Difference]: With dead ends: 139 [2018-04-10 13:40:18,891 INFO L226 Difference]: Without dead ends: 139 [2018-04-10 13:40:18,891 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=42, Invalid=90, Unknown=0, NotChecked=0, Total=132 [2018-04-10 13:40:18,892 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 139 states. [2018-04-10 13:40:18,894 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 139 to 129. [2018-04-10 13:40:18,894 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 129 states. [2018-04-10 13:40:18,895 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 129 states to 129 states and 138 transitions. [2018-04-10 13:40:18,895 INFO L78 Accepts]: Start accepts. Automaton has 129 states and 138 transitions. Word has length 29 [2018-04-10 13:40:18,895 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 13:40:18,895 INFO L459 AbstractCegarLoop]: Abstraction has 129 states and 138 transitions. [2018-04-10 13:40:18,895 INFO L460 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-04-10 13:40:18,895 INFO L276 IsEmpty]: Start isEmpty. Operand 129 states and 138 transitions. [2018-04-10 13:40:18,896 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-04-10 13:40:18,896 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 13:40:18,896 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 13:40:18,896 INFO L408 AbstractCegarLoop]: === Iteration 15 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-04-10 13:40:18,897 INFO L82 PathProgramCache]: Analyzing trace with hash -103829770, now seen corresponding path program 1 times [2018-04-10 13:40:18,897 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-10 13:40:18,897 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-10 13:40:18,897 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:40:18,898 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:40:18,898 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:40:18,907 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:40:18,907 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 13:40:19,005 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 13:40:19,005 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-10 13:40:19,005 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-04-10 13:40:19,005 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-04-10 13:40:19,006 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-04-10 13:40:19,006 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-04-10 13:40:19,006 INFO L87 Difference]: Start difference. First operand 129 states and 138 transitions. Second operand 7 states. [2018-04-10 13:40:19,230 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 13:40:19,230 INFO L93 Difference]: Finished difference Result 137 states and 147 transitions. [2018-04-10 13:40:19,230 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-04-10 13:40:19,230 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 29 [2018-04-10 13:40:19,231 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 13:40:19,231 INFO L225 Difference]: With dead ends: 137 [2018-04-10 13:40:19,231 INFO L226 Difference]: Without dead ends: 137 [2018-04-10 13:40:19,232 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=28, Invalid=62, Unknown=0, NotChecked=0, Total=90 [2018-04-10 13:40:19,232 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 137 states. [2018-04-10 13:40:19,234 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 137 to 129. [2018-04-10 13:40:19,234 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 129 states. [2018-04-10 13:40:19,235 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 129 states to 129 states and 137 transitions. [2018-04-10 13:40:19,235 INFO L78 Accepts]: Start accepts. Automaton has 129 states and 137 transitions. Word has length 29 [2018-04-10 13:40:19,235 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 13:40:19,235 INFO L459 AbstractCegarLoop]: Abstraction has 129 states and 137 transitions. [2018-04-10 13:40:19,235 INFO L460 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-04-10 13:40:19,235 INFO L276 IsEmpty]: Start isEmpty. Operand 129 states and 137 transitions. [2018-04-10 13:40:19,236 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2018-04-10 13:40:19,236 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 13:40:19,236 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 13:40:19,236 INFO L408 AbstractCegarLoop]: === Iteration 16 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-04-10 13:40:19,236 INFO L82 PathProgramCache]: Analyzing trace with hash 1741287252, now seen corresponding path program 1 times [2018-04-10 13:40:19,236 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-10 13:40:19,236 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-10 13:40:19,237 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:40:19,237 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:40:19,237 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:40:19,244 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:40:19,245 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 13:40:19,264 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 13:40:19,264 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-10 13:40:19,264 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-04-10 13:40:19,264 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-04-10 13:40:19,265 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-04-10 13:40:19,265 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-04-10 13:40:19,265 INFO L87 Difference]: Start difference. First operand 129 states and 137 transitions. Second operand 5 states. [2018-04-10 13:40:19,352 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 13:40:19,353 INFO L93 Difference]: Finished difference Result 127 states and 135 transitions. [2018-04-10 13:40:19,353 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-04-10 13:40:19,353 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 30 [2018-04-10 13:40:19,353 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 13:40:19,354 INFO L225 Difference]: With dead ends: 127 [2018-04-10 13:40:19,354 INFO L226 Difference]: Without dead ends: 127 [2018-04-10 13:40:19,354 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-04-10 13:40:19,354 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 127 states. [2018-04-10 13:40:19,356 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 127 to 125. [2018-04-10 13:40:19,356 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 125 states. [2018-04-10 13:40:19,357 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 125 states to 125 states and 132 transitions. [2018-04-10 13:40:19,357 INFO L78 Accepts]: Start accepts. Automaton has 125 states and 132 transitions. Word has length 30 [2018-04-10 13:40:19,357 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 13:40:19,357 INFO L459 AbstractCegarLoop]: Abstraction has 125 states and 132 transitions. [2018-04-10 13:40:19,358 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-04-10 13:40:19,358 INFO L276 IsEmpty]: Start isEmpty. Operand 125 states and 132 transitions. [2018-04-10 13:40:19,358 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2018-04-10 13:40:19,358 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 13:40:19,358 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 13:40:19,358 INFO L408 AbstractCegarLoop]: === Iteration 17 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-04-10 13:40:19,359 INFO L82 PathProgramCache]: Analyzing trace with hash 1741287253, now seen corresponding path program 1 times [2018-04-10 13:40:19,359 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-10 13:40:19,359 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-10 13:40:19,359 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:40:19,359 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:40:19,360 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:40:19,366 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:40:19,367 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 13:40:19,439 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 13:40:19,439 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-10 13:40:19,439 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-04-10 13:40:19,439 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-04-10 13:40:19,439 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-04-10 13:40:19,440 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2018-04-10 13:40:19,440 INFO L87 Difference]: Start difference. First operand 125 states and 132 transitions. Second operand 6 states. [2018-04-10 13:40:19,552 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 13:40:19,552 INFO L93 Difference]: Finished difference Result 132 states and 141 transitions. [2018-04-10 13:40:19,552 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-04-10 13:40:19,552 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 30 [2018-04-10 13:40:19,552 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 13:40:19,553 INFO L225 Difference]: With dead ends: 132 [2018-04-10 13:40:19,553 INFO L226 Difference]: Without dead ends: 132 [2018-04-10 13:40:19,554 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2018-04-10 13:40:19,554 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 132 states. [2018-04-10 13:40:19,556 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 132 to 125. [2018-04-10 13:40:19,556 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 125 states. [2018-04-10 13:40:19,557 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 125 states to 125 states and 133 transitions. [2018-04-10 13:40:19,557 INFO L78 Accepts]: Start accepts. Automaton has 125 states and 133 transitions. Word has length 30 [2018-04-10 13:40:19,557 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 13:40:19,557 INFO L459 AbstractCegarLoop]: Abstraction has 125 states and 133 transitions. [2018-04-10 13:40:19,557 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-04-10 13:40:19,557 INFO L276 IsEmpty]: Start isEmpty. Operand 125 states and 133 transitions. [2018-04-10 13:40:19,557 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2018-04-10 13:40:19,558 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 13:40:19,558 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 13:40:19,558 INFO L408 AbstractCegarLoop]: === Iteration 18 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-04-10 13:40:19,558 INFO L82 PathProgramCache]: Analyzing trace with hash -565817711, now seen corresponding path program 1 times [2018-04-10 13:40:19,558 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-10 13:40:19,558 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-10 13:40:19,559 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:40:19,559 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:40:19,559 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:40:19,566 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:40:19,566 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 13:40:19,593 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 13:40:19,593 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-10 13:40:19,593 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-04-10 13:40:19,593 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-04-10 13:40:19,593 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-04-10 13:40:19,594 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-04-10 13:40:19,594 INFO L87 Difference]: Start difference. First operand 125 states and 133 transitions. Second operand 5 states. [2018-04-10 13:40:19,692 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 13:40:19,692 INFO L93 Difference]: Finished difference Result 124 states and 132 transitions. [2018-04-10 13:40:19,692 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-04-10 13:40:19,693 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 30 [2018-04-10 13:40:19,693 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 13:40:19,693 INFO L225 Difference]: With dead ends: 124 [2018-04-10 13:40:19,693 INFO L226 Difference]: Without dead ends: 124 [2018-04-10 13:40:19,694 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2018-04-10 13:40:19,694 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 124 states. [2018-04-10 13:40:19,695 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 124 to 124. [2018-04-10 13:40:19,696 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 124 states. [2018-04-10 13:40:19,696 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 124 states to 124 states and 132 transitions. [2018-04-10 13:40:19,696 INFO L78 Accepts]: Start accepts. Automaton has 124 states and 132 transitions. Word has length 30 [2018-04-10 13:40:19,696 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 13:40:19,696 INFO L459 AbstractCegarLoop]: Abstraction has 124 states and 132 transitions. [2018-04-10 13:40:19,696 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-04-10 13:40:19,697 INFO L276 IsEmpty]: Start isEmpty. Operand 124 states and 132 transitions. [2018-04-10 13:40:19,697 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2018-04-10 13:40:19,697 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 13:40:19,697 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 13:40:19,697 INFO L408 AbstractCegarLoop]: === Iteration 19 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-04-10 13:40:19,697 INFO L82 PathProgramCache]: Analyzing trace with hash -565817710, now seen corresponding path program 1 times [2018-04-10 13:40:19,697 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-10 13:40:19,697 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-10 13:40:19,698 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:40:19,698 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:40:19,698 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:40:19,705 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:40:19,706 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 13:40:19,764 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 13:40:19,764 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-10 13:40:19,764 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-04-10 13:40:19,764 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-04-10 13:40:19,765 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-04-10 13:40:19,765 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2018-04-10 13:40:19,765 INFO L87 Difference]: Start difference. First operand 124 states and 132 transitions. Second operand 6 states. [2018-04-10 13:40:19,898 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 13:40:19,898 INFO L93 Difference]: Finished difference Result 131 states and 139 transitions. [2018-04-10 13:40:19,898 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-04-10 13:40:19,898 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 30 [2018-04-10 13:40:19,899 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 13:40:19,899 INFO L225 Difference]: With dead ends: 131 [2018-04-10 13:40:19,899 INFO L226 Difference]: Without dead ends: 131 [2018-04-10 13:40:19,900 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=28, Invalid=44, Unknown=0, NotChecked=0, Total=72 [2018-04-10 13:40:19,900 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 131 states. [2018-04-10 13:40:19,901 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 131 to 129. [2018-04-10 13:40:19,902 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 129 states. [2018-04-10 13:40:19,902 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 129 states to 129 states and 137 transitions. [2018-04-10 13:40:19,902 INFO L78 Accepts]: Start accepts. Automaton has 129 states and 137 transitions. Word has length 30 [2018-04-10 13:40:19,902 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 13:40:19,902 INFO L459 AbstractCegarLoop]: Abstraction has 129 states and 137 transitions. [2018-04-10 13:40:19,902 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-04-10 13:40:19,903 INFO L276 IsEmpty]: Start isEmpty. Operand 129 states and 137 transitions. [2018-04-10 13:40:19,903 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2018-04-10 13:40:19,903 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 13:40:19,903 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 13:40:19,903 INFO L408 AbstractCegarLoop]: === Iteration 20 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-04-10 13:40:19,903 INFO L82 PathProgramCache]: Analyzing trace with hash -996161706, now seen corresponding path program 1 times [2018-04-10 13:40:19,903 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-10 13:40:19,904 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-10 13:40:19,904 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:40:19,904 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:40:19,904 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:40:19,911 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:40:19,911 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 13:40:20,018 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 13:40:20,018 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-10 13:40:20,018 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-04-10 13:40:20,019 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-04-10 13:40:20,020 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-04-10 13:40:20,020 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=48, Unknown=0, NotChecked=0, Total=72 [2018-04-10 13:40:20,020 INFO L87 Difference]: Start difference. First operand 129 states and 137 transitions. Second operand 9 states. [2018-04-10 13:40:20,255 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 13:40:20,255 INFO L93 Difference]: Finished difference Result 141 states and 150 transitions. [2018-04-10 13:40:20,255 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-04-10 13:40:20,255 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 31 [2018-04-10 13:40:20,256 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 13:40:20,256 INFO L225 Difference]: With dead ends: 141 [2018-04-10 13:40:20,256 INFO L226 Difference]: Without dead ends: 141 [2018-04-10 13:40:20,256 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=50, Invalid=106, Unknown=0, NotChecked=0, Total=156 [2018-04-10 13:40:20,257 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 141 states. [2018-04-10 13:40:20,259 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 141 to 131. [2018-04-10 13:40:20,259 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 131 states. [2018-04-10 13:40:20,260 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 131 states to 131 states and 140 transitions. [2018-04-10 13:40:20,260 INFO L78 Accepts]: Start accepts. Automaton has 131 states and 140 transitions. Word has length 31 [2018-04-10 13:40:20,260 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 13:40:20,260 INFO L459 AbstractCegarLoop]: Abstraction has 131 states and 140 transitions. [2018-04-10 13:40:20,260 INFO L460 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-04-10 13:40:20,260 INFO L276 IsEmpty]: Start isEmpty. Operand 131 states and 140 transitions. [2018-04-10 13:40:20,261 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2018-04-10 13:40:20,261 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 13:40:20,261 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 13:40:20,261 INFO L408 AbstractCegarLoop]: === Iteration 21 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-04-10 13:40:20,261 INFO L82 PathProgramCache]: Analyzing trace with hash -996161705, now seen corresponding path program 1 times [2018-04-10 13:40:20,261 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-10 13:40:20,261 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-10 13:40:20,262 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:40:20,262 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:40:20,262 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:40:20,271 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:40:20,271 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 13:40:20,366 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 13:40:20,366 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-10 13:40:20,366 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-04-10 13:40:20,367 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-04-10 13:40:20,367 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-04-10 13:40:20,367 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=70, Unknown=0, NotChecked=0, Total=90 [2018-04-10 13:40:20,367 INFO L87 Difference]: Start difference. First operand 131 states and 140 transitions. Second operand 10 states. [2018-04-10 13:40:20,653 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 13:40:20,653 INFO L93 Difference]: Finished difference Result 140 states and 149 transitions. [2018-04-10 13:40:20,654 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-04-10 13:40:20,654 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 31 [2018-04-10 13:40:20,654 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 13:40:20,654 INFO L225 Difference]: With dead ends: 140 [2018-04-10 13:40:20,654 INFO L226 Difference]: Without dead ends: 140 [2018-04-10 13:40:20,655 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 28 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=73, Invalid=233, Unknown=0, NotChecked=0, Total=306 [2018-04-10 13:40:20,655 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 140 states. [2018-04-10 13:40:20,657 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 140 to 126. [2018-04-10 13:40:20,657 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 126 states. [2018-04-10 13:40:20,658 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 126 states to 126 states and 134 transitions. [2018-04-10 13:40:20,658 INFO L78 Accepts]: Start accepts. Automaton has 126 states and 134 transitions. Word has length 31 [2018-04-10 13:40:20,658 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 13:40:20,658 INFO L459 AbstractCegarLoop]: Abstraction has 126 states and 134 transitions. [2018-04-10 13:40:20,658 INFO L460 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-04-10 13:40:20,658 INFO L276 IsEmpty]: Start isEmpty. Operand 126 states and 134 transitions. [2018-04-10 13:40:20,663 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2018-04-10 13:40:20,663 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 13:40:20,663 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 13:40:20,663 INFO L408 AbstractCegarLoop]: === Iteration 22 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-04-10 13:40:20,664 INFO L82 PathProgramCache]: Analyzing trace with hash 73575908, now seen corresponding path program 1 times [2018-04-10 13:40:20,664 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-10 13:40:20,664 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-10 13:40:20,664 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:40:20,664 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:40:20,665 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:40:20,674 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:40:20,674 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 13:40:20,714 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 13:40:20,715 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-10 13:40:20,715 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-04-10 13:40:20,715 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-04-10 13:40:20,715 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-04-10 13:40:20,715 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2018-04-10 13:40:20,715 INFO L87 Difference]: Start difference. First operand 126 states and 134 transitions. Second operand 7 states. [2018-04-10 13:40:20,845 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 13:40:20,845 INFO L93 Difference]: Finished difference Result 141 states and 151 transitions. [2018-04-10 13:40:20,845 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-04-10 13:40:20,845 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 33 [2018-04-10 13:40:20,846 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 13:40:20,846 INFO L225 Difference]: With dead ends: 141 [2018-04-10 13:40:20,846 INFO L226 Difference]: Without dead ends: 141 [2018-04-10 13:40:20,846 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=26, Invalid=64, Unknown=0, NotChecked=0, Total=90 [2018-04-10 13:40:20,846 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 141 states. [2018-04-10 13:40:20,849 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 141 to 131. [2018-04-10 13:40:20,849 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 131 states. [2018-04-10 13:40:20,849 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 131 states to 131 states and 141 transitions. [2018-04-10 13:40:20,850 INFO L78 Accepts]: Start accepts. Automaton has 131 states and 141 transitions. Word has length 33 [2018-04-10 13:40:20,850 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 13:40:20,850 INFO L459 AbstractCegarLoop]: Abstraction has 131 states and 141 transitions. [2018-04-10 13:40:20,850 INFO L460 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-04-10 13:40:20,850 INFO L276 IsEmpty]: Start isEmpty. Operand 131 states and 141 transitions. [2018-04-10 13:40:20,850 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2018-04-10 13:40:20,850 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 13:40:20,850 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 13:40:20,851 INFO L408 AbstractCegarLoop]: === Iteration 23 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-04-10 13:40:20,851 INFO L82 PathProgramCache]: Analyzing trace with hash 73575909, now seen corresponding path program 1 times [2018-04-10 13:40:20,851 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-10 13:40:20,851 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-10 13:40:20,851 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:40:20,852 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:40:20,852 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:40:20,858 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:40:20,859 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 13:40:20,947 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 13:40:20,947 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-10 13:40:20,947 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-04-10 13:40:20,948 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-04-10 13:40:20,948 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-04-10 13:40:20,948 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2018-04-10 13:40:20,948 INFO L87 Difference]: Start difference. First operand 131 states and 141 transitions. Second operand 9 states. [2018-04-10 13:40:21,231 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 13:40:21,231 INFO L93 Difference]: Finished difference Result 178 states and 195 transitions. [2018-04-10 13:40:21,231 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-04-10 13:40:21,231 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 33 [2018-04-10 13:40:21,232 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 13:40:21,232 INFO L225 Difference]: With dead ends: 178 [2018-04-10 13:40:21,232 INFO L226 Difference]: Without dead ends: 178 [2018-04-10 13:40:21,232 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 30 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=54, Invalid=186, Unknown=0, NotChecked=0, Total=240 [2018-04-10 13:40:21,232 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 178 states. [2018-04-10 13:40:21,234 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 178 to 149. [2018-04-10 13:40:21,234 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 149 states. [2018-04-10 13:40:21,234 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 149 states to 149 states and 164 transitions. [2018-04-10 13:40:21,235 INFO L78 Accepts]: Start accepts. Automaton has 149 states and 164 transitions. Word has length 33 [2018-04-10 13:40:21,235 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 13:40:21,235 INFO L459 AbstractCegarLoop]: Abstraction has 149 states and 164 transitions. [2018-04-10 13:40:21,235 INFO L460 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-04-10 13:40:21,235 INFO L276 IsEmpty]: Start isEmpty. Operand 149 states and 164 transitions. [2018-04-10 13:40:21,235 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-04-10 13:40:21,235 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 13:40:21,235 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 13:40:21,235 INFO L408 AbstractCegarLoop]: === Iteration 24 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-04-10 13:40:21,235 INFO L82 PathProgramCache]: Analyzing trace with hash -550148662, now seen corresponding path program 1 times [2018-04-10 13:40:21,236 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-10 13:40:21,236 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-10 13:40:21,236 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:40:21,236 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:40:21,236 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:40:21,241 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:40:21,242 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 13:40:21,355 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-04-10 13:40:21,355 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-10 13:40:21,355 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-10 13:40:21,365 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:40:21,394 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:40:21,402 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-10 13:40:21,531 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 13:40:21,535 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-04-10 13:40:21,536 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-10 13:40:21,547 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 13:40:21,547 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 13:40:21,548 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-04-10 13:40:21,548 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-10 13:40:21,553 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-10 13:40:21,553 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:25, output treesize:18 [2018-04-10 13:40:21,595 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 13:40:21,625 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-10 13:40:21,625 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 9] total 19 [2018-04-10 13:40:21,625 INFO L442 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-04-10 13:40:21,626 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-04-10 13:40:21,626 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=53, Invalid=327, Unknown=0, NotChecked=0, Total=380 [2018-04-10 13:40:21,626 INFO L87 Difference]: Start difference. First operand 149 states and 164 transitions. Second operand 20 states. [2018-04-10 13:40:22,218 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 13:40:22,218 INFO L93 Difference]: Finished difference Result 206 states and 229 transitions. [2018-04-10 13:40:22,218 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-04-10 13:40:22,218 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 34 [2018-04-10 13:40:22,218 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 13:40:22,219 INFO L225 Difference]: With dead ends: 206 [2018-04-10 13:40:22,219 INFO L226 Difference]: Without dead ends: 206 [2018-04-10 13:40:22,219 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 54 GetRequests, 29 SyntacticMatches, 0 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 102 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=130, Invalid=572, Unknown=0, NotChecked=0, Total=702 [2018-04-10 13:40:22,219 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 206 states. [2018-04-10 13:40:22,223 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 206 to 137. [2018-04-10 13:40:22,223 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 137 states. [2018-04-10 13:40:22,224 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 137 states to 137 states and 147 transitions. [2018-04-10 13:40:22,224 INFO L78 Accepts]: Start accepts. Automaton has 137 states and 147 transitions. Word has length 34 [2018-04-10 13:40:22,224 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 13:40:22,224 INFO L459 AbstractCegarLoop]: Abstraction has 137 states and 147 transitions. [2018-04-10 13:40:22,224 INFO L460 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-04-10 13:40:22,224 INFO L276 IsEmpty]: Start isEmpty. Operand 137 states and 147 transitions. [2018-04-10 13:40:22,225 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-04-10 13:40:22,225 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 13:40:22,225 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 13:40:22,225 INFO L408 AbstractCegarLoop]: === Iteration 25 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-04-10 13:40:22,225 INFO L82 PathProgramCache]: Analyzing trace with hash 1986047201, now seen corresponding path program 1 times [2018-04-10 13:40:22,225 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-10 13:40:22,225 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-10 13:40:22,226 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:40:22,226 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:40:22,226 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:40:22,233 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:40:22,234 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 13:40:22,291 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 13:40:22,291 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-10 13:40:22,291 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-04-10 13:40:22,292 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-04-10 13:40:22,292 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-04-10 13:40:22,292 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-04-10 13:40:22,292 INFO L87 Difference]: Start difference. First operand 137 states and 147 transitions. Second operand 8 states. [2018-04-10 13:40:22,430 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 13:40:22,430 INFO L93 Difference]: Finished difference Result 164 states and 175 transitions. [2018-04-10 13:40:22,430 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-04-10 13:40:22,431 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 35 [2018-04-10 13:40:22,431 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 13:40:22,431 INFO L225 Difference]: With dead ends: 164 [2018-04-10 13:40:22,431 INFO L226 Difference]: Without dead ends: 164 [2018-04-10 13:40:22,432 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=43, Invalid=113, Unknown=0, NotChecked=0, Total=156 [2018-04-10 13:40:22,432 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 164 states. [2018-04-10 13:40:22,434 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 164 to 137. [2018-04-10 13:40:22,435 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 137 states. [2018-04-10 13:40:22,435 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 137 states to 137 states and 145 transitions. [2018-04-10 13:40:22,435 INFO L78 Accepts]: Start accepts. Automaton has 137 states and 145 transitions. Word has length 35 [2018-04-10 13:40:22,435 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 13:40:22,435 INFO L459 AbstractCegarLoop]: Abstraction has 137 states and 145 transitions. [2018-04-10 13:40:22,436 INFO L460 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-04-10 13:40:22,436 INFO L276 IsEmpty]: Start isEmpty. Operand 137 states and 145 transitions. [2018-04-10 13:40:22,436 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-04-10 13:40:22,436 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 13:40:22,436 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 13:40:22,436 INFO L408 AbstractCegarLoop]: === Iteration 26 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-04-10 13:40:22,436 INFO L82 PathProgramCache]: Analyzing trace with hash 1466613884, now seen corresponding path program 1 times [2018-04-10 13:40:22,436 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-10 13:40:22,437 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-10 13:40:22,437 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:40:22,437 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:40:22,437 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:40:22,453 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:40:22,454 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 13:40:22,564 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 13:40:22,564 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-10 13:40:22,565 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-04-10 13:40:22,565 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-04-10 13:40:22,565 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-04-10 13:40:22,565 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=70, Unknown=0, NotChecked=0, Total=90 [2018-04-10 13:40:22,565 INFO L87 Difference]: Start difference. First operand 137 states and 145 transitions. Second operand 10 states. [2018-04-10 13:40:22,878 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 13:40:22,878 INFO L93 Difference]: Finished difference Result 162 states and 174 transitions. [2018-04-10 13:40:22,879 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-04-10 13:40:22,879 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 36 [2018-04-10 13:40:22,879 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 13:40:22,880 INFO L225 Difference]: With dead ends: 162 [2018-04-10 13:40:22,880 INFO L226 Difference]: Without dead ends: 162 [2018-04-10 13:40:22,880 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 42 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=57, Invalid=215, Unknown=0, NotChecked=0, Total=272 [2018-04-10 13:40:22,880 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 162 states. [2018-04-10 13:40:22,883 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 162 to 140. [2018-04-10 13:40:22,883 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 140 states. [2018-04-10 13:40:22,883 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 140 states to 140 states and 149 transitions. [2018-04-10 13:40:22,883 INFO L78 Accepts]: Start accepts. Automaton has 140 states and 149 transitions. Word has length 36 [2018-04-10 13:40:22,884 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 13:40:22,884 INFO L459 AbstractCegarLoop]: Abstraction has 140 states and 149 transitions. [2018-04-10 13:40:22,884 INFO L460 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-04-10 13:40:22,884 INFO L276 IsEmpty]: Start isEmpty. Operand 140 states and 149 transitions. [2018-04-10 13:40:22,884 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-04-10 13:40:22,884 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 13:40:22,884 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 13:40:22,884 INFO L408 AbstractCegarLoop]: === Iteration 27 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-04-10 13:40:22,885 INFO L82 PathProgramCache]: Analyzing trace with hash 1466613883, now seen corresponding path program 1 times [2018-04-10 13:40:22,885 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-10 13:40:22,885 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-10 13:40:22,885 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:40:22,886 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:40:22,886 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:40:22,892 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:40:22,893 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 13:40:22,914 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 13:40:22,914 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-10 13:40:22,914 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-04-10 13:40:22,914 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-04-10 13:40:22,914 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-04-10 13:40:22,914 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-04-10 13:40:22,915 INFO L87 Difference]: Start difference. First operand 140 states and 149 transitions. Second operand 5 states. [2018-04-10 13:40:23,000 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 13:40:23,000 INFO L93 Difference]: Finished difference Result 139 states and 147 transitions. [2018-04-10 13:40:23,000 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-04-10 13:40:23,001 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 36 [2018-04-10 13:40:23,001 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 13:40:23,001 INFO L225 Difference]: With dead ends: 139 [2018-04-10 13:40:23,001 INFO L226 Difference]: Without dead ends: 139 [2018-04-10 13:40:23,001 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2018-04-10 13:40:23,002 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 139 states. [2018-04-10 13:40:23,003 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 139 to 139. [2018-04-10 13:40:23,004 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 139 states. [2018-04-10 13:40:23,004 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 139 states to 139 states and 147 transitions. [2018-04-10 13:40:23,004 INFO L78 Accepts]: Start accepts. Automaton has 139 states and 147 transitions. Word has length 36 [2018-04-10 13:40:23,004 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 13:40:23,005 INFO L459 AbstractCegarLoop]: Abstraction has 139 states and 147 transitions. [2018-04-10 13:40:23,005 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-04-10 13:40:23,005 INFO L276 IsEmpty]: Start isEmpty. Operand 139 states and 147 transitions. [2018-04-10 13:40:23,005 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2018-04-10 13:40:23,005 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 13:40:23,005 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 13:40:23,005 INFO L408 AbstractCegarLoop]: === Iteration 28 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-04-10 13:40:23,005 INFO L82 PathProgramCache]: Analyzing trace with hash -1151086149, now seen corresponding path program 1 times [2018-04-10 13:40:23,006 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-10 13:40:23,006 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-10 13:40:23,006 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:40:23,006 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:40:23,006 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:40:23,014 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:40:23,014 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 13:40:23,140 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 13:40:23,141 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-10 13:40:23,141 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-10 13:40:23,149 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:40:23,171 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:40:23,174 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-10 13:40:23,179 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-10 13:40:23,179 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-10 13:40:23,182 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:40:23,182 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-04-10 13:40:23,199 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-04-10 13:40:23,201 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-04-10 13:40:23,202 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-10 13:40:23,203 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:40:23,212 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-04-10 13:40:23,214 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-04-10 13:40:23,214 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-10 13:40:23,215 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:40:23,220 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:40:23,220 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:35, output treesize:21 [2018-04-10 13:40:23,316 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 17 [2018-04-10 13:40:23,326 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 5 [2018-04-10 13:40:23,327 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-10 13:40:23,328 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:40:23,333 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 26 [2018-04-10 13:40:23,334 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 11 [2018-04-10 13:40:23,335 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-10 13:40:23,337 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:40:23,340 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:40:23,340 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:55, output treesize:19 [2018-04-10 13:40:23,355 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 13:40:23,372 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-10 13:40:23,372 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8] total 15 [2018-04-10 13:40:23,372 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-04-10 13:40:23,372 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-04-10 13:40:23,372 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=49, Invalid=191, Unknown=0, NotChecked=0, Total=240 [2018-04-10 13:40:23,372 INFO L87 Difference]: Start difference. First operand 139 states and 147 transitions. Second operand 16 states. [2018-04-10 13:40:23,646 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 13:40:23,646 INFO L93 Difference]: Finished difference Result 149 states and 157 transitions. [2018-04-10 13:40:23,646 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-04-10 13:40:23,646 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 37 [2018-04-10 13:40:23,646 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 13:40:23,647 INFO L225 Difference]: With dead ends: 149 [2018-04-10 13:40:23,647 INFO L226 Difference]: Without dead ends: 149 [2018-04-10 13:40:23,647 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 52 GetRequests, 30 SyntacticMatches, 0 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 81 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=143, Invalid=409, Unknown=0, NotChecked=0, Total=552 [2018-04-10 13:40:23,647 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 149 states. [2018-04-10 13:40:23,648 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 149 to 149. [2018-04-10 13:40:23,648 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 149 states. [2018-04-10 13:40:23,649 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 149 states to 149 states and 157 transitions. [2018-04-10 13:40:23,649 INFO L78 Accepts]: Start accepts. Automaton has 149 states and 157 transitions. Word has length 37 [2018-04-10 13:40:23,649 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 13:40:23,649 INFO L459 AbstractCegarLoop]: Abstraction has 149 states and 157 transitions. [2018-04-10 13:40:23,649 INFO L460 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-04-10 13:40:23,649 INFO L276 IsEmpty]: Start isEmpty. Operand 149 states and 157 transitions. [2018-04-10 13:40:23,649 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2018-04-10 13:40:23,649 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 13:40:23,650 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 13:40:23,650 INFO L408 AbstractCegarLoop]: === Iteration 29 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-04-10 13:40:23,650 INFO L82 PathProgramCache]: Analyzing trace with hash 722626987, now seen corresponding path program 1 times [2018-04-10 13:40:23,650 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-10 13:40:23,650 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-10 13:40:23,650 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:40:23,650 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:40:23,651 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:40:23,659 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:40:23,659 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 13:40:23,875 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 13:40:23,875 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-10 13:40:23,875 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [17] imperfect sequences [] total 17 [2018-04-10 13:40:23,876 INFO L442 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-04-10 13:40:23,876 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-04-10 13:40:23,876 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=237, Unknown=0, NotChecked=0, Total=272 [2018-04-10 13:40:23,876 INFO L87 Difference]: Start difference. First operand 149 states and 157 transitions. Second operand 17 states. [2018-04-10 13:40:24,462 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 13:40:24,462 INFO L93 Difference]: Finished difference Result 188 states and 201 transitions. [2018-04-10 13:40:24,462 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-04-10 13:40:24,462 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 40 [2018-04-10 13:40:24,462 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 13:40:24,463 INFO L225 Difference]: With dead ends: 188 [2018-04-10 13:40:24,463 INFO L226 Difference]: Without dead ends: 188 [2018-04-10 13:40:24,463 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 35 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 201 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=134, Invalid=988, Unknown=0, NotChecked=0, Total=1122 [2018-04-10 13:40:24,464 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 188 states. [2018-04-10 13:40:24,466 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 188 to 166. [2018-04-10 13:40:24,466 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 166 states. [2018-04-10 13:40:24,467 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 166 states to 166 states and 177 transitions. [2018-04-10 13:40:24,467 INFO L78 Accepts]: Start accepts. Automaton has 166 states and 177 transitions. Word has length 40 [2018-04-10 13:40:24,467 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 13:40:24,468 INFO L459 AbstractCegarLoop]: Abstraction has 166 states and 177 transitions. [2018-04-10 13:40:24,468 INFO L460 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-04-10 13:40:24,468 INFO L276 IsEmpty]: Start isEmpty. Operand 166 states and 177 transitions. [2018-04-10 13:40:24,468 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2018-04-10 13:40:24,468 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 13:40:24,468 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 13:40:24,469 INFO L408 AbstractCegarLoop]: === Iteration 30 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-04-10 13:40:24,469 INFO L82 PathProgramCache]: Analyzing trace with hash 1316022877, now seen corresponding path program 1 times [2018-04-10 13:40:24,469 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-10 13:40:24,469 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-10 13:40:24,469 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:40:24,470 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:40:24,470 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:40:24,478 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:40:24,479 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 13:40:24,673 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 13:40:24,673 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-10 13:40:24,673 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2018-04-10 13:40:24,673 INFO L442 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-04-10 13:40:24,674 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-04-10 13:40:24,674 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=32, Invalid=124, Unknown=0, NotChecked=0, Total=156 [2018-04-10 13:40:24,674 INFO L87 Difference]: Start difference. First operand 166 states and 177 transitions. Second operand 13 states. [2018-04-10 13:40:25,172 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 13:40:25,172 INFO L93 Difference]: Finished difference Result 205 states and 223 transitions. [2018-04-10 13:40:25,172 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-04-10 13:40:25,172 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 40 [2018-04-10 13:40:25,173 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 13:40:25,173 INFO L225 Difference]: With dead ends: 205 [2018-04-10 13:40:25,173 INFO L226 Difference]: Without dead ends: 205 [2018-04-10 13:40:25,174 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 85 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=117, Invalid=435, Unknown=0, NotChecked=0, Total=552 [2018-04-10 13:40:25,174 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 205 states. [2018-04-10 13:40:25,176 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 205 to 175. [2018-04-10 13:40:25,176 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 175 states. [2018-04-10 13:40:25,176 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 175 states to 175 states and 188 transitions. [2018-04-10 13:40:25,176 INFO L78 Accepts]: Start accepts. Automaton has 175 states and 188 transitions. Word has length 40 [2018-04-10 13:40:25,176 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 13:40:25,176 INFO L459 AbstractCegarLoop]: Abstraction has 175 states and 188 transitions. [2018-04-10 13:40:25,176 INFO L460 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-04-10 13:40:25,176 INFO L276 IsEmpty]: Start isEmpty. Operand 175 states and 188 transitions. [2018-04-10 13:40:25,177 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-04-10 13:40:25,177 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 13:40:25,177 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 13:40:25,177 INFO L408 AbstractCegarLoop]: === Iteration 31 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-04-10 13:40:25,177 INFO L82 PathProgramCache]: Analyzing trace with hash 586362613, now seen corresponding path program 1 times [2018-04-10 13:40:25,177 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-10 13:40:25,177 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-10 13:40:25,177 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:40:25,177 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:40:25,178 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:40:25,182 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:40:25,182 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 13:40:25,223 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 13:40:25,223 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-10 13:40:25,223 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-04-10 13:40:25,223 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-04-10 13:40:25,223 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-04-10 13:40:25,223 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-04-10 13:40:25,224 INFO L87 Difference]: Start difference. First operand 175 states and 188 transitions. Second operand 8 states. [2018-04-10 13:40:25,326 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 13:40:25,326 INFO L93 Difference]: Finished difference Result 193 states and 207 transitions. [2018-04-10 13:40:25,327 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-04-10 13:40:25,327 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 44 [2018-04-10 13:40:25,327 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 13:40:25,328 INFO L225 Difference]: With dead ends: 193 [2018-04-10 13:40:25,328 INFO L226 Difference]: Without dead ends: 193 [2018-04-10 13:40:25,328 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=43, Invalid=113, Unknown=0, NotChecked=0, Total=156 [2018-04-10 13:40:25,329 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 193 states. [2018-04-10 13:40:25,331 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 193 to 184. [2018-04-10 13:40:25,331 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 184 states. [2018-04-10 13:40:25,332 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 184 states to 184 states and 201 transitions. [2018-04-10 13:40:25,332 INFO L78 Accepts]: Start accepts. Automaton has 184 states and 201 transitions. Word has length 44 [2018-04-10 13:40:25,332 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 13:40:25,332 INFO L459 AbstractCegarLoop]: Abstraction has 184 states and 201 transitions. [2018-04-10 13:40:25,332 INFO L460 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-04-10 13:40:25,332 INFO L276 IsEmpty]: Start isEmpty. Operand 184 states and 201 transitions. [2018-04-10 13:40:25,332 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-04-10 13:40:25,332 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 13:40:25,332 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 13:40:25,332 INFO L408 AbstractCegarLoop]: === Iteration 32 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-04-10 13:40:25,333 INFO L82 PathProgramCache]: Analyzing trace with hash 1176080644, now seen corresponding path program 1 times [2018-04-10 13:40:25,333 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-10 13:40:25,333 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-10 13:40:25,333 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:40:25,333 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:40:25,333 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:40:25,345 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:40:25,346 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 13:40:25,419 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 13:40:25,419 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-10 13:40:25,419 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-04-10 13:40:25,420 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-04-10 13:40:25,420 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-04-10 13:40:25,420 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=70, Unknown=0, NotChecked=0, Total=90 [2018-04-10 13:40:25,420 INFO L87 Difference]: Start difference. First operand 184 states and 201 transitions. Second operand 10 states. [2018-04-10 13:40:25,555 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 13:40:25,555 INFO L93 Difference]: Finished difference Result 192 states and 206 transitions. [2018-04-10 13:40:25,555 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-04-10 13:40:25,555 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 43 [2018-04-10 13:40:25,555 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 13:40:25,556 INFO L225 Difference]: With dead ends: 192 [2018-04-10 13:40:25,556 INFO L226 Difference]: Without dead ends: 192 [2018-04-10 13:40:25,556 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 39 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=60, Invalid=212, Unknown=0, NotChecked=0, Total=272 [2018-04-10 13:40:25,556 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 192 states. [2018-04-10 13:40:25,559 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 192 to 174. [2018-04-10 13:40:25,559 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 174 states. [2018-04-10 13:40:25,559 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 174 states to 174 states and 189 transitions. [2018-04-10 13:40:25,560 INFO L78 Accepts]: Start accepts. Automaton has 174 states and 189 transitions. Word has length 43 [2018-04-10 13:40:25,560 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 13:40:25,560 INFO L459 AbstractCegarLoop]: Abstraction has 174 states and 189 transitions. [2018-04-10 13:40:25,560 INFO L460 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-04-10 13:40:25,560 INFO L276 IsEmpty]: Start isEmpty. Operand 174 states and 189 transitions. [2018-04-10 13:40:25,560 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2018-04-10 13:40:25,560 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 13:40:25,560 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 13:40:25,561 INFO L408 AbstractCegarLoop]: === Iteration 33 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-04-10 13:40:25,561 INFO L82 PathProgramCache]: Analyzing trace with hash 997371954, now seen corresponding path program 1 times [2018-04-10 13:40:25,561 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-10 13:40:25,561 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-10 13:40:25,561 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:40:25,561 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:40:25,561 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:40:25,565 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:40:25,566 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 13:40:25,583 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 13:40:25,583 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-10 13:40:25,583 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-04-10 13:40:25,583 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-04-10 13:40:25,584 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-04-10 13:40:25,584 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-04-10 13:40:25,584 INFO L87 Difference]: Start difference. First operand 174 states and 189 transitions. Second operand 6 states. [2018-04-10 13:40:25,660 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 13:40:25,660 INFO L93 Difference]: Finished difference Result 184 states and 199 transitions. [2018-04-10 13:40:25,660 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-04-10 13:40:25,660 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 45 [2018-04-10 13:40:25,660 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 13:40:25,661 INFO L225 Difference]: With dead ends: 184 [2018-04-10 13:40:25,661 INFO L226 Difference]: Without dead ends: 184 [2018-04-10 13:40:25,661 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2018-04-10 13:40:25,661 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 184 states. [2018-04-10 13:40:25,664 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 184 to 177. [2018-04-10 13:40:25,664 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 177 states. [2018-04-10 13:40:25,664 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 177 states to 177 states and 193 transitions. [2018-04-10 13:40:25,665 INFO L78 Accepts]: Start accepts. Automaton has 177 states and 193 transitions. Word has length 45 [2018-04-10 13:40:25,665 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 13:40:25,665 INFO L459 AbstractCegarLoop]: Abstraction has 177 states and 193 transitions. [2018-04-10 13:40:25,665 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-04-10 13:40:25,665 INFO L276 IsEmpty]: Start isEmpty. Operand 177 states and 193 transitions. [2018-04-10 13:40:25,665 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-04-10 13:40:25,666 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 13:40:25,666 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 13:40:25,666 INFO L408 AbstractCegarLoop]: === Iteration 34 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-04-10 13:40:25,666 INFO L82 PathProgramCache]: Analyzing trace with hash -1923762637, now seen corresponding path program 1 times [2018-04-10 13:40:25,666 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-10 13:40:25,666 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-10 13:40:25,667 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:40:25,667 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:40:25,667 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:40:25,675 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:40:25,676 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 13:40:25,963 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 13:40:25,964 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-10 13:40:25,964 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [17] imperfect sequences [] total 17 [2018-04-10 13:40:25,964 INFO L442 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-04-10 13:40:25,964 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-04-10 13:40:25,964 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=269, Unknown=0, NotChecked=0, Total=306 [2018-04-10 13:40:25,964 INFO L87 Difference]: Start difference. First operand 177 states and 193 transitions. Second operand 18 states. [2018-04-10 13:40:26,576 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 13:40:26,577 INFO L93 Difference]: Finished difference Result 229 states and 253 transitions. [2018-04-10 13:40:26,608 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-04-10 13:40:26,609 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 47 [2018-04-10 13:40:26,609 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 13:40:26,609 INFO L225 Difference]: With dead ends: 229 [2018-04-10 13:40:26,609 INFO L226 Difference]: Without dead ends: 229 [2018-04-10 13:40:26,610 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 37 GetRequests, 1 SyntacticMatches, 3 SemanticMatches, 33 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 208 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=136, Invalid=1054, Unknown=0, NotChecked=0, Total=1190 [2018-04-10 13:40:26,610 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 229 states. [2018-04-10 13:40:26,612 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 229 to 201. [2018-04-10 13:40:26,613 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 201 states. [2018-04-10 13:40:26,613 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 201 states to 201 states and 224 transitions. [2018-04-10 13:40:26,613 INFO L78 Accepts]: Start accepts. Automaton has 201 states and 224 transitions. Word has length 47 [2018-04-10 13:40:26,614 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 13:40:26,614 INFO L459 AbstractCegarLoop]: Abstraction has 201 states and 224 transitions. [2018-04-10 13:40:26,614 INFO L460 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-04-10 13:40:26,614 INFO L276 IsEmpty]: Start isEmpty. Operand 201 states and 224 transitions. [2018-04-10 13:40:26,614 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-04-10 13:40:26,614 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 13:40:26,614 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 13:40:26,614 INFO L408 AbstractCegarLoop]: === Iteration 35 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-04-10 13:40:26,614 INFO L82 PathProgramCache]: Analyzing trace with hash -1923762636, now seen corresponding path program 1 times [2018-04-10 13:40:26,614 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-10 13:40:26,615 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-10 13:40:26,615 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:40:26,615 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:40:26,615 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:40:26,621 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:40:26,621 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 13:40:26,844 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 13:40:26,844 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-10 13:40:26,844 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [18] imperfect sequences [] total 18 [2018-04-10 13:40:26,844 INFO L442 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-04-10 13:40:26,844 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-04-10 13:40:26,844 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=39, Invalid=303, Unknown=0, NotChecked=0, Total=342 [2018-04-10 13:40:26,844 INFO L87 Difference]: Start difference. First operand 201 states and 224 transitions. Second operand 19 states. [2018-04-10 13:40:27,600 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 13:40:27,600 INFO L93 Difference]: Finished difference Result 250 states and 277 transitions. [2018-04-10 13:40:27,600 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2018-04-10 13:40:27,601 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 47 [2018-04-10 13:40:27,601 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 13:40:27,601 INFO L225 Difference]: With dead ends: 250 [2018-04-10 13:40:27,601 INFO L226 Difference]: Without dead ends: 250 [2018-04-10 13:40:27,602 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 39 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 246 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=150, Invalid=1256, Unknown=0, NotChecked=0, Total=1406 [2018-04-10 13:40:27,602 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 250 states. [2018-04-10 13:40:27,605 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 250 to 223. [2018-04-10 13:40:27,605 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 223 states. [2018-04-10 13:40:27,606 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 223 states to 223 states and 251 transitions. [2018-04-10 13:40:27,606 INFO L78 Accepts]: Start accepts. Automaton has 223 states and 251 transitions. Word has length 47 [2018-04-10 13:40:27,606 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 13:40:27,606 INFO L459 AbstractCegarLoop]: Abstraction has 223 states and 251 transitions. [2018-04-10 13:40:27,606 INFO L460 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-04-10 13:40:27,606 INFO L276 IsEmpty]: Start isEmpty. Operand 223 states and 251 transitions. [2018-04-10 13:40:27,608 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2018-04-10 13:40:27,608 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 13:40:27,608 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 13:40:27,608 INFO L408 AbstractCegarLoop]: === Iteration 36 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-04-10 13:40:27,608 INFO L82 PathProgramCache]: Analyzing trace with hash 124262969, now seen corresponding path program 1 times [2018-04-10 13:40:27,608 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-10 13:40:27,608 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-10 13:40:27,609 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:40:27,609 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:40:27,609 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:40:27,620 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:40:27,621 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 13:40:27,703 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 13:40:27,703 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-10 13:40:27,703 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-04-10 13:40:27,704 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-04-10 13:40:27,704 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-04-10 13:40:27,704 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=71, Unknown=0, NotChecked=0, Total=90 [2018-04-10 13:40:27,704 INFO L87 Difference]: Start difference. First operand 223 states and 251 transitions. Second operand 10 states. [2018-04-10 13:40:27,859 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 13:40:27,859 INFO L93 Difference]: Finished difference Result 242 states and 271 transitions. [2018-04-10 13:40:27,859 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-04-10 13:40:27,859 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 48 [2018-04-10 13:40:27,859 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 13:40:27,860 INFO L225 Difference]: With dead ends: 242 [2018-04-10 13:40:27,860 INFO L226 Difference]: Without dead ends: 242 [2018-04-10 13:40:27,860 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=39, Invalid=143, Unknown=0, NotChecked=0, Total=182 [2018-04-10 13:40:27,860 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 242 states. [2018-04-10 13:40:27,864 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 242 to 234. [2018-04-10 13:40:27,864 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 234 states. [2018-04-10 13:40:27,865 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 234 states to 234 states and 264 transitions. [2018-04-10 13:40:27,865 INFO L78 Accepts]: Start accepts. Automaton has 234 states and 264 transitions. Word has length 48 [2018-04-10 13:40:27,865 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 13:40:27,865 INFO L459 AbstractCegarLoop]: Abstraction has 234 states and 264 transitions. [2018-04-10 13:40:27,865 INFO L460 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-04-10 13:40:27,865 INFO L276 IsEmpty]: Start isEmpty. Operand 234 states and 264 transitions. [2018-04-10 13:40:27,866 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2018-04-10 13:40:27,866 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 13:40:27,866 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 13:40:27,866 INFO L408 AbstractCegarLoop]: === Iteration 37 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-04-10 13:40:27,866 INFO L82 PathProgramCache]: Analyzing trace with hash 1230859131, now seen corresponding path program 1 times [2018-04-10 13:40:27,866 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-10 13:40:27,866 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-10 13:40:27,867 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:40:27,867 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:40:27,867 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:40:27,873 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:40:27,874 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 13:40:27,934 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 13:40:27,935 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-10 13:40:27,935 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-04-10 13:40:27,935 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-04-10 13:40:27,935 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-04-10 13:40:27,935 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-04-10 13:40:27,935 INFO L87 Difference]: Start difference. First operand 234 states and 264 transitions. Second operand 5 states. [2018-04-10 13:40:28,021 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 13:40:28,022 INFO L93 Difference]: Finished difference Result 240 states and 270 transitions. [2018-04-10 13:40:28,022 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-04-10 13:40:28,022 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 50 [2018-04-10 13:40:28,022 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 13:40:28,023 INFO L225 Difference]: With dead ends: 240 [2018-04-10 13:40:28,023 INFO L226 Difference]: Without dead ends: 240 [2018-04-10 13:40:28,023 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-04-10 13:40:28,024 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 240 states. [2018-04-10 13:40:28,027 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 240 to 233. [2018-04-10 13:40:28,027 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 233 states. [2018-04-10 13:40:28,028 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 233 states to 233 states and 262 transitions. [2018-04-10 13:40:28,028 INFO L78 Accepts]: Start accepts. Automaton has 233 states and 262 transitions. Word has length 50 [2018-04-10 13:40:28,028 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 13:40:28,028 INFO L459 AbstractCegarLoop]: Abstraction has 233 states and 262 transitions. [2018-04-10 13:40:28,028 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-04-10 13:40:28,028 INFO L276 IsEmpty]: Start isEmpty. Operand 233 states and 262 transitions. [2018-04-10 13:40:28,029 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2018-04-10 13:40:28,029 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 13:40:28,029 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 13:40:28,029 INFO L408 AbstractCegarLoop]: === Iteration 38 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-04-10 13:40:28,029 INFO L82 PathProgramCache]: Analyzing trace with hash -498072556, now seen corresponding path program 1 times [2018-04-10 13:40:28,029 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-10 13:40:28,029 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-10 13:40:28,030 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:40:28,030 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:40:28,030 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:40:28,036 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:40:28,037 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 13:40:28,057 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 13:40:28,057 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-10 13:40:28,057 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-04-10 13:40:28,058 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-04-10 13:40:28,058 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-04-10 13:40:28,058 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-04-10 13:40:28,058 INFO L87 Difference]: Start difference. First operand 233 states and 262 transitions. Second operand 5 states. [2018-04-10 13:40:28,114 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 13:40:28,114 INFO L93 Difference]: Finished difference Result 239 states and 268 transitions. [2018-04-10 13:40:28,114 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-04-10 13:40:28,115 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 51 [2018-04-10 13:40:28,115 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 13:40:28,115 INFO L225 Difference]: With dead ends: 239 [2018-04-10 13:40:28,115 INFO L226 Difference]: Without dead ends: 239 [2018-04-10 13:40:28,115 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-04-10 13:40:28,116 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 239 states. [2018-04-10 13:40:28,117 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 239 to 232. [2018-04-10 13:40:28,118 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 232 states. [2018-04-10 13:40:28,118 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 232 states to 232 states and 260 transitions. [2018-04-10 13:40:28,118 INFO L78 Accepts]: Start accepts. Automaton has 232 states and 260 transitions. Word has length 51 [2018-04-10 13:40:28,118 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 13:40:28,118 INFO L459 AbstractCegarLoop]: Abstraction has 232 states and 260 transitions. [2018-04-10 13:40:28,118 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-04-10 13:40:28,119 INFO L276 IsEmpty]: Start isEmpty. Operand 232 states and 260 transitions. [2018-04-10 13:40:28,119 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2018-04-10 13:40:28,119 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 13:40:28,119 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 13:40:28,119 INFO L408 AbstractCegarLoop]: === Iteration 39 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-04-10 13:40:28,119 INFO L82 PathProgramCache]: Analyzing trace with hash 459154013, now seen corresponding path program 1 times [2018-04-10 13:40:28,119 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-10 13:40:28,119 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-10 13:40:28,120 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:40:28,120 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:40:28,120 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:40:28,125 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:40:28,125 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 13:40:28,600 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 2 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 13:40:28,600 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-10 13:40:28,600 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-10 13:40:28,605 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:40:28,624 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:40:28,627 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-10 13:40:28,639 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-04-10 13:40:28,640 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-10 13:40:28,641 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-10 13:40:28,642 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:40:28,646 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-04-10 13:40:28,647 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-10 13:40:28,647 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-10 13:40:28,648 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:40:28,650 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:40:28,650 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:26, output treesize:18 [2018-04-10 13:40:28,815 WARN L1033 $PredicateComparison]: unable to prove that (exists ((__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_~node~0.base Int) (__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_~node~0.offset Int) (|__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_#t~ret14.offset| Int) (|__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_#t~ret14.base| Int)) (let ((.cse1 (+ __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_~node~0.offset 4))) (and (= |c_#memory_$Pointer$.base| (let ((.cse0 (store |c_old(#memory_$Pointer$.base)| __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_~node~0.base (store (store (select |c_old(#memory_$Pointer$.base)| __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_~node~0.base) .cse1 (select (select |c_old(#memory_$Pointer$.base)| |c___U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_#in~pointerToList.base|) |c___U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_#in~pointerToList.offset|)) __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_~node~0.offset |__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_#t~ret14.base|)))) (store .cse0 |c___U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_#in~pointerToList.base| (store (select .cse0 |c___U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_#in~pointerToList.base|) |c___U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_#in~pointerToList.offset| __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_~node~0.base)))) (<= __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_~node~0.offset 0) (= (let ((.cse2 (store |c_old(#memory_$Pointer$.offset)| __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_~node~0.base (store (store (select |c_old(#memory_$Pointer$.offset)| __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_~node~0.base) .cse1 (select (select |c_old(#memory_$Pointer$.offset)| |c___U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_#in~pointerToList.base|) |c___U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_#in~pointerToList.offset|)) __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_~node~0.offset |__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_#t~ret14.offset|)))) (store .cse2 |c___U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_#in~pointerToList.base| (store (select .cse2 |c___U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_#in~pointerToList.base|) |c___U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_#in~pointerToList.offset| __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_~node~0.offset))) |c_#memory_$Pointer$.offset|) (<= 0 __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_~node~0.offset)))) is different from true [2018-04-10 13:40:28,897 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 43 [2018-04-10 13:40:28,901 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 13:40:28,901 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 41 [2018-04-10 13:40:28,904 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 13:40:28,905 INFO L682 Elim1Store]: detected equality via solver [2018-04-10 13:40:28,907 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 46 [2018-04-10 13:40:28,908 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-10 13:40:28,938 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:40:28,950 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 21 [2018-04-10 13:40:28,954 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 13:40:28,955 INFO L682 Elim1Store]: detected equality via solver [2018-04-10 13:40:28,956 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 32 [2018-04-10 13:40:28,957 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-04-10 13:40:28,962 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:40:28,967 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:40:28,977 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 40 [2018-04-10 13:40:28,980 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 20 [2018-04-10 13:40:28,983 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 13:40:28,985 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 27 [2018-04-10 13:40:28,985 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-04-10 13:40:28,990 INFO L267 ElimStorePlain]: Start of recursive call 8: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:40:29,004 INFO L682 Elim1Store]: detected equality via solver [2018-04-10 13:40:29,006 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 41 [2018-04-10 13:40:29,010 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 32 [2018-04-10 13:40:29,010 INFO L267 ElimStorePlain]: Start of recursive call 11: End of recursive call: and 1 xjuncts. [2018-04-10 13:40:29,016 INFO L267 ElimStorePlain]: Start of recursive call 10: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:40:29,023 INFO L267 ElimStorePlain]: Start of recursive call 7: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:40:29,057 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 43 [2018-04-10 13:40:29,060 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 13:40:29,060 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 41 [2018-04-10 13:40:29,063 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 13:40:29,063 INFO L682 Elim1Store]: detected equality via solver [2018-04-10 13:40:29,065 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 46 [2018-04-10 13:40:29,066 INFO L267 ElimStorePlain]: Start of recursive call 14: End of recursive call: and 1 xjuncts. [2018-04-10 13:40:29,079 INFO L267 ElimStorePlain]: Start of recursive call 13: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:40:29,086 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 21 [2018-04-10 13:40:29,088 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 13:40:29,090 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 23 [2018-04-10 13:40:29,090 INFO L267 ElimStorePlain]: Start of recursive call 16: End of recursive call: and 1 xjuncts. [2018-04-10 13:40:29,093 INFO L267 ElimStorePlain]: Start of recursive call 15: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:40:29,096 INFO L267 ElimStorePlain]: Start of recursive call 12: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:40:29,100 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 40 [2018-04-10 13:40:29,102 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 20 [2018-04-10 13:40:29,104 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 13:40:29,105 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 27 [2018-04-10 13:40:29,105 INFO L267 ElimStorePlain]: Start of recursive call 19: End of recursive call: and 1 xjuncts. [2018-04-10 13:40:29,108 INFO L267 ElimStorePlain]: Start of recursive call 18: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:40:29,116 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 36 [2018-04-10 13:40:29,119 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 23 [2018-04-10 13:40:29,119 INFO L267 ElimStorePlain]: Start of recursive call 21: End of recursive call: and 1 xjuncts. [2018-04-10 13:40:29,123 INFO L267 ElimStorePlain]: Start of recursive call 20: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:40:29,127 INFO L267 ElimStorePlain]: Start of recursive call 17: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:40:29,148 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 2 dim-2 vars, End of recursive call: 3 dim-0 vars, and 4 xjuncts. [2018-04-10 13:40:29,148 INFO L202 ElimStorePlain]: Needed 21 recursive calls to eliminate 6 variables, input treesize:114, output treesize:231 [2018-04-10 13:40:29,490 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-04-10 13:40:29,490 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-10 13:40:29,499 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-04-10 13:40:29,500 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:98, output treesize:97 [2018-04-10 13:40:29,541 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 13:40:29,542 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 13:40:29,543 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 8 [2018-04-10 13:40:29,543 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-10 13:40:29,564 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 13:40:29,564 INFO L682 Elim1Store]: detected equality via solver [2018-04-10 13:40:29,569 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 81 treesize of output 77 [2018-04-10 13:40:29,572 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 64 treesize of output 58 [2018-04-10 13:40:29,573 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-10 13:40:29,578 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:40:29,590 INFO L682 Elim1Store]: detected equality via solver [2018-04-10 13:40:29,591 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 67 treesize of output 75 [2018-04-10 13:40:29,592 INFO L682 Elim1Store]: detected equality via solver [2018-04-10 13:40:29,593 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 62 treesize of output 90 [2018-04-10 13:40:29,593 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-04-10 13:40:29,598 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:40:29,607 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, 2 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-04-10 13:40:29,607 INFO L202 ElimStorePlain]: Needed 6 recursive calls to eliminate 5 variables, input treesize:118, output treesize:94 [2018-04-10 13:40:29,648 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 88 treesize of output 72 [2018-04-10 13:40:29,650 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2018-04-10 13:40:29,651 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-10 13:40:29,684 INFO L682 Elim1Store]: detected equality via solver [2018-04-10 13:40:29,684 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 57 treesize of output 33 [2018-04-10 13:40:29,684 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-10 13:40:29,688 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:40:29,696 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 26 [2018-04-10 13:40:29,701 INFO L682 Elim1Store]: detected equality via solver [2018-04-10 13:40:29,701 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2018-04-10 13:40:29,702 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-04-10 13:40:29,706 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 3 [2018-04-10 13:40:29,706 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-04-10 13:40:29,707 INFO L267 ElimStorePlain]: Start of recursive call 5: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:40:29,711 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:40:29,711 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 5 variables, input treesize:105, output treesize:10 [2018-04-10 13:40:29,746 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 2 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 13:40:29,764 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-10 13:40:29,764 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 22] total 36 [2018-04-10 13:40:29,764 INFO L442 AbstractCegarLoop]: Interpolant automaton has 36 states [2018-04-10 13:40:29,764 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2018-04-10 13:40:29,764 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=141, Invalid=1049, Unknown=4, NotChecked=66, Total=1260 [2018-04-10 13:40:29,765 INFO L87 Difference]: Start difference. First operand 232 states and 260 transitions. Second operand 36 states. [2018-04-10 13:40:31,050 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 13:40:31,050 INFO L93 Difference]: Finished difference Result 252 states and 283 transitions. [2018-04-10 13:40:31,051 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2018-04-10 13:40:31,051 INFO L78 Accepts]: Start accepts. Automaton has 36 states. Word has length 53 [2018-04-10 13:40:31,051 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 13:40:31,052 INFO L225 Difference]: With dead ends: 252 [2018-04-10 13:40:31,052 INFO L226 Difference]: Without dead ends: 252 [2018-04-10 13:40:31,052 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 92 GetRequests, 39 SyntacticMatches, 4 SemanticMatches, 49 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 584 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=279, Invalid=2169, Unknown=6, NotChecked=96, Total=2550 [2018-04-10 13:40:31,052 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 252 states. [2018-04-10 13:40:31,055 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 252 to 242. [2018-04-10 13:40:31,055 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 242 states. [2018-04-10 13:40:31,056 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 242 states to 242 states and 270 transitions. [2018-04-10 13:40:31,056 INFO L78 Accepts]: Start accepts. Automaton has 242 states and 270 transitions. Word has length 53 [2018-04-10 13:40:31,056 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 13:40:31,056 INFO L459 AbstractCegarLoop]: Abstraction has 242 states and 270 transitions. [2018-04-10 13:40:31,057 INFO L460 AbstractCegarLoop]: Interpolant automaton has 36 states. [2018-04-10 13:40:31,057 INFO L276 IsEmpty]: Start isEmpty. Operand 242 states and 270 transitions. [2018-04-10 13:40:31,057 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2018-04-10 13:40:31,057 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 13:40:31,057 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 13:40:31,058 INFO L408 AbstractCegarLoop]: === Iteration 40 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-04-10 13:40:31,058 INFO L82 PathProgramCache]: Analyzing trace with hash -1135548646, now seen corresponding path program 1 times [2018-04-10 13:40:31,058 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-10 13:40:31,058 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-10 13:40:31,059 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:40:31,059 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:40:31,059 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:40:31,067 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:40:31,068 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 13:40:31,267 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 13:40:31,267 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-10 13:40:31,267 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-10 13:40:31,272 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:40:31,301 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:40:31,305 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-10 13:40:31,378 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-04-10 13:40:31,380 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-10 13:40:31,380 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-10 13:40:31,382 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:40:31,387 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:40:31,387 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:23, output treesize:20 [2018-04-10 13:40:31,430 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 8 [2018-04-10 13:40:31,430 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-10 13:40:31,432 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-10 13:40:31,432 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:21, output treesize:12 [2018-04-10 13:40:37,447 WARN L148 SmtUtils]: Spent 2002ms on a formula simplification that was a NOOP. DAG size: 12 [2018-04-10 13:40:37,463 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 27 [2018-04-10 13:40:37,464 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 18 [2018-04-10 13:40:37,464 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-10 13:40:37,466 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:40:37,469 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:40:37,469 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:38, output treesize:23 [2018-04-10 13:40:37,515 WARN L1033 $PredicateComparison]: unable to prove that (exists ((|main_~#list~0.base| Int) (|main_#t~mem20.base| Int)) (let ((.cse0 (store |c_old(#valid)| |main_~#list~0.base| 1))) (and (= 0 (select |c_old(#valid)| |main_~#list~0.base|)) (= (store (store .cse0 |main_#t~mem20.base| 0) |main_~#list~0.base| 0) |c_#valid|) (= 0 (select .cse0 |main_#t~mem20.base|))))) is different from true [2018-04-10 13:40:37,522 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 13:40:37,540 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-10 13:40:37,540 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 12] total 19 [2018-04-10 13:40:37,541 INFO L442 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-04-10 13:40:37,541 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-04-10 13:40:37,541 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=49, Invalid=291, Unknown=6, NotChecked=34, Total=380 [2018-04-10 13:40:37,541 INFO L87 Difference]: Start difference. First operand 242 states and 270 transitions. Second operand 20 states. [2018-04-10 13:40:57,853 WARN L148 SmtUtils]: Spent 2005ms on a formula simplification that was a NOOP. DAG size: 18 [2018-04-10 13:41:39,565 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 13:41:39,565 INFO L93 Difference]: Finished difference Result 253 states and 282 transitions. [2018-04-10 13:41:39,565 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-04-10 13:41:39,565 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 55 [2018-04-10 13:41:39,565 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 13:41:39,566 INFO L225 Difference]: With dead ends: 253 [2018-04-10 13:41:39,566 INFO L226 Difference]: Without dead ends: 226 [2018-04-10 13:41:39,566 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 82 GetRequests, 48 SyntacticMatches, 7 SemanticMatches, 27 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 169 ImplicationChecksByTransitivity, 12.4s TimeCoverageRelationStatistics Valid=108, Invalid=643, Unknown=9, NotChecked=52, Total=812 [2018-04-10 13:41:39,566 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 226 states. [2018-04-10 13:41:39,570 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 226 to 219. [2018-04-10 13:41:39,570 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 219 states. [2018-04-10 13:41:39,571 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 219 states to 219 states and 246 transitions. [2018-04-10 13:41:39,571 INFO L78 Accepts]: Start accepts. Automaton has 219 states and 246 transitions. Word has length 55 [2018-04-10 13:41:39,571 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 13:41:39,571 INFO L459 AbstractCegarLoop]: Abstraction has 219 states and 246 transitions. [2018-04-10 13:41:39,571 INFO L460 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-04-10 13:41:39,571 INFO L276 IsEmpty]: Start isEmpty. Operand 219 states and 246 transitions. [2018-04-10 13:41:39,572 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2018-04-10 13:41:39,572 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 13:41:39,572 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 13:41:39,572 INFO L408 AbstractCegarLoop]: === Iteration 41 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-04-10 13:41:39,572 INFO L82 PathProgramCache]: Analyzing trace with hash -1522120989, now seen corresponding path program 1 times [2018-04-10 13:41:39,572 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-10 13:41:39,572 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-10 13:41:39,573 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:41:39,573 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:41:39,573 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:41:39,591 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:41:39,592 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 13:41:39,980 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 12 proven. 6 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-04-10 13:41:39,980 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-10 13:41:39,980 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-10 13:41:39,989 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:41:40,028 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:41:40,032 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-10 13:41:40,157 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-04-10 13:41:40,159 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-10 13:41:40,160 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-10 13:41:40,161 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:41:40,168 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:41:40,168 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:28, output treesize:21 [2018-04-10 13:41:40,195 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-04-10 13:41:40,196 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-10 13:41:40,196 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-10 13:41:40,198 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:41:40,216 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 21 treesize of output 33 [2018-04-10 13:41:40,219 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 21 [2018-04-10 13:41:40,219 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-10 13:41:40,239 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 19 treesize of output 35 [2018-04-10 13:41:40,240 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-04-10 13:41:40,252 INFO L267 ElimStorePlain]: Start of recursive call 4: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-04-10 13:41:40,263 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-04-10 13:41:40,263 INFO L202 ElimStorePlain]: Needed 6 recursive calls to eliminate 4 variables, input treesize:37, output treesize:57 [2018-04-10 13:41:40,307 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 13:41:40,307 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 13:41:40,308 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 29 [2018-04-10 13:41:40,308 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-10 13:41:40,316 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:41:40,316 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:73, output treesize:29 [2018-04-10 13:41:40,336 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 21 [2018-04-10 13:41:40,344 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2018-04-10 13:41:40,344 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-10 13:41:40,345 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:41:40,349 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-10 13:41:40,349 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:40, output treesize:29 [2018-04-10 13:41:40,376 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 24 [2018-04-10 13:41:40,377 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2018-04-10 13:41:40,377 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-10 13:41:40,381 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 5 [2018-04-10 13:41:40,381 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-10 13:41:40,382 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:41:40,383 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:41:40,383 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 3 variables, input treesize:33, output treesize:5 [2018-04-10 13:41:40,407 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 6 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 13:41:40,425 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-10 13:41:40,426 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19] total 27 [2018-04-10 13:41:40,426 INFO L442 AbstractCegarLoop]: Interpolant automaton has 28 states [2018-04-10 13:41:40,426 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2018-04-10 13:41:40,426 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=76, Invalid=680, Unknown=0, NotChecked=0, Total=756 [2018-04-10 13:41:40,426 INFO L87 Difference]: Start difference. First operand 219 states and 246 transitions. Second operand 28 states. [2018-04-10 13:41:41,133 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 13:41:41,133 INFO L93 Difference]: Finished difference Result 263 states and 295 transitions. [2018-04-10 13:41:41,133 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2018-04-10 13:41:41,133 INFO L78 Accepts]: Start accepts. Automaton has 28 states. Word has length 67 [2018-04-10 13:41:41,133 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 13:41:41,134 INFO L225 Difference]: With dead ends: 263 [2018-04-10 13:41:41,134 INFO L226 Difference]: Without dead ends: 263 [2018-04-10 13:41:41,135 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 109 GetRequests, 54 SyntacticMatches, 9 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 497 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=235, Invalid=2021, Unknown=0, NotChecked=0, Total=2256 [2018-04-10 13:41:41,135 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 263 states. [2018-04-10 13:41:41,137 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 263 to 234. [2018-04-10 13:41:41,137 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 234 states. [2018-04-10 13:41:41,138 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 234 states to 234 states and 264 transitions. [2018-04-10 13:41:41,138 INFO L78 Accepts]: Start accepts. Automaton has 234 states and 264 transitions. Word has length 67 [2018-04-10 13:41:41,138 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 13:41:41,138 INFO L459 AbstractCegarLoop]: Abstraction has 234 states and 264 transitions. [2018-04-10 13:41:41,138 INFO L460 AbstractCegarLoop]: Interpolant automaton has 28 states. [2018-04-10 13:41:41,139 INFO L276 IsEmpty]: Start isEmpty. Operand 234 states and 264 transitions. [2018-04-10 13:41:41,139 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2018-04-10 13:41:41,139 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 13:41:41,139 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 13:41:41,139 INFO L408 AbstractCegarLoop]: === Iteration 42 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-04-10 13:41:41,140 INFO L82 PathProgramCache]: Analyzing trace with hash -562675973, now seen corresponding path program 1 times [2018-04-10 13:41:41,140 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-10 13:41:41,140 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-10 13:41:41,140 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:41:41,141 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:41:41,141 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:41:41,151 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:41:41,152 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 13:41:41,421 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 7 proven. 11 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-04-10 13:41:41,421 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-10 13:41:41,421 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-10 13:41:41,426 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:41:41,447 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:41:41,450 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-10 13:41:41,564 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-04-10 13:41:41,565 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-10 13:41:41,565 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-10 13:41:41,567 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:41:41,580 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-04-10 13:41:41,582 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-10 13:41:41,582 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-10 13:41:41,584 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:41:41,589 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:41:41,590 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:34, output treesize:26 [2018-04-10 13:41:41,622 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 19 treesize of output 31 [2018-04-10 13:41:41,625 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-04-10 13:41:41,625 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-10 13:41:41,643 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 17 treesize of output 22 [2018-04-10 13:41:41,644 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 2 xjuncts. [2018-04-10 13:41:41,654 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-10 13:41:41,687 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 19 treesize of output 31 [2018-04-10 13:41:41,693 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-04-10 13:41:41,693 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-04-10 13:41:41,720 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 17 treesize of output 22 [2018-04-10 13:41:41,721 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 2 xjuncts. [2018-04-10 13:41:41,730 INFO L267 ElimStorePlain]: Start of recursive call 5: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-10 13:41:41,748 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 4 xjuncts. [2018-04-10 13:41:41,749 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 4 variables, input treesize:42, output treesize:139 [2018-04-10 13:41:41,793 WARN L307 Elim1Store]: Array PQE input equivalent to false [2018-04-10 13:41:41,793 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-10 13:41:41,800 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 13:41:41,801 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 13:41:41,802 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 8 [2018-04-10 13:41:41,802 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-10 13:41:41,807 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:41:41,807 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:81, output treesize:42 [2018-04-10 13:41:41,865 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 69 treesize of output 56 [2018-04-10 13:41:41,866 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 3 [2018-04-10 13:41:41,867 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-10 13:41:41,874 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 27 [2018-04-10 13:41:41,874 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-10 13:41:41,879 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-10 13:41:41,886 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2018-04-10 13:41:41,887 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2018-04-10 13:41:41,888 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-10 13:41:41,895 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2018-04-10 13:41:41,895 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-04-10 13:41:41,896 INFO L267 ElimStorePlain]: Start of recursive call 5: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:41:41,899 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:41:41,899 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 3 variables, input treesize:69, output treesize:7 [2018-04-10 13:41:41,943 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 6 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 13:41:41,974 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-10 13:41:41,974 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19] total 27 [2018-04-10 13:41:41,974 INFO L442 AbstractCegarLoop]: Interpolant automaton has 27 states [2018-04-10 13:41:41,974 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2018-04-10 13:41:41,975 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=73, Invalid=627, Unknown=2, NotChecked=0, Total=702 [2018-04-10 13:41:41,975 INFO L87 Difference]: Start difference. First operand 234 states and 264 transitions. Second operand 27 states. [2018-04-10 13:41:42,739 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 13:41:42,739 INFO L93 Difference]: Finished difference Result 256 states and 286 transitions. [2018-04-10 13:41:42,739 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2018-04-10 13:41:42,739 INFO L78 Accepts]: Start accepts. Automaton has 27 states. Word has length 60 [2018-04-10 13:41:42,739 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 13:41:42,740 INFO L225 Difference]: With dead ends: 256 [2018-04-10 13:41:42,740 INFO L226 Difference]: Without dead ends: 256 [2018-04-10 13:41:42,741 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 101 GetRequests, 47 SyntacticMatches, 8 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 514 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=251, Invalid=2003, Unknown=2, NotChecked=0, Total=2256 [2018-04-10 13:41:42,741 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 256 states. [2018-04-10 13:41:42,743 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 256 to 238. [2018-04-10 13:41:42,743 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 238 states. [2018-04-10 13:41:42,743 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 238 states to 238 states and 266 transitions. [2018-04-10 13:41:42,743 INFO L78 Accepts]: Start accepts. Automaton has 238 states and 266 transitions. Word has length 60 [2018-04-10 13:41:42,744 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 13:41:42,744 INFO L459 AbstractCegarLoop]: Abstraction has 238 states and 266 transitions. [2018-04-10 13:41:42,744 INFO L460 AbstractCegarLoop]: Interpolant automaton has 27 states. [2018-04-10 13:41:42,744 INFO L276 IsEmpty]: Start isEmpty. Operand 238 states and 266 transitions. [2018-04-10 13:41:42,744 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2018-04-10 13:41:42,744 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 13:41:42,744 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 13:41:42,744 INFO L408 AbstractCegarLoop]: === Iteration 43 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-04-10 13:41:42,745 INFO L82 PathProgramCache]: Analyzing trace with hash -1522120988, now seen corresponding path program 1 times [2018-04-10 13:41:42,745 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-10 13:41:42,745 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-10 13:41:42,745 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:41:42,746 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:41:42,746 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:41:42,759 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:41:42,760 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 13:41:43,071 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 7 proven. 11 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-04-10 13:41:43,071 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-10 13:41:43,071 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-10 13:41:43,077 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:41:43,113 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:41:43,117 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-10 13:41:43,312 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-04-10 13:41:43,314 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-10 13:41:43,314 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-10 13:41:43,316 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:41:43,325 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-04-10 13:41:43,326 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-10 13:41:43,327 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-10 13:41:43,328 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:41:43,334 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:41:43,334 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:39, output treesize:28 [2018-04-10 13:41:43,372 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 21 treesize of output 33 [2018-04-10 13:41:43,374 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 21 [2018-04-10 13:41:43,374 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-10 13:41:43,392 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 19 treesize of output 27 [2018-04-10 13:41:43,393 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-04-10 13:41:43,406 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-04-10 13:41:43,442 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 19 treesize of output 31 [2018-04-10 13:41:43,444 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-04-10 13:41:43,444 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-04-10 13:41:43,465 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 17 treesize of output 22 [2018-04-10 13:41:43,465 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 2 xjuncts. [2018-04-10 13:41:43,477 INFO L267 ElimStorePlain]: Start of recursive call 5: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-10 13:41:43,500 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: 2 dim-0 vars, and 4 xjuncts. [2018-04-10 13:41:43,500 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 4 variables, input treesize:44, output treesize:153 [2018-04-10 13:41:43,574 WARN L307 Elim1Store]: Array PQE input equivalent to false [2018-04-10 13:41:43,574 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-10 13:41:43,585 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 13:41:43,588 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 13:41:43,588 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 8 [2018-04-10 13:41:43,588 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-10 13:41:43,593 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:41:43,593 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:88, output treesize:44 [2018-04-10 13:41:43,668 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 71 treesize of output 58 [2018-04-10 13:41:43,671 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 27 [2018-04-10 13:41:43,671 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-10 13:41:43,678 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 5 [2018-04-10 13:41:43,679 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-10 13:41:43,682 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-10 13:41:43,691 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2018-04-10 13:41:43,692 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 3 [2018-04-10 13:41:43,692 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-04-10 13:41:43,694 INFO L267 ElimStorePlain]: Start of recursive call 5: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:41:43,699 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:41:43,699 INFO L202 ElimStorePlain]: Needed 6 recursive calls to eliminate 3 variables, input treesize:71, output treesize:9 [2018-04-10 13:41:43,812 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 6 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 13:41:43,828 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-10 13:41:43,828 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 21] total 35 [2018-04-10 13:41:43,829 INFO L442 AbstractCegarLoop]: Interpolant automaton has 36 states [2018-04-10 13:41:43,829 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2018-04-10 13:41:43,829 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=94, Invalid=1166, Unknown=0, NotChecked=0, Total=1260 [2018-04-10 13:41:43,829 INFO L87 Difference]: Start difference. First operand 238 states and 266 transitions. Second operand 36 states. [2018-04-10 13:41:45,680 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 13:41:45,681 INFO L93 Difference]: Finished difference Result 326 states and 360 transitions. [2018-04-10 13:41:45,681 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 43 states. [2018-04-10 13:41:45,681 INFO L78 Accepts]: Start accepts. Automaton has 36 states. Word has length 67 [2018-04-10 13:41:45,681 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 13:41:45,682 INFO L225 Difference]: With dead ends: 326 [2018-04-10 13:41:45,682 INFO L226 Difference]: Without dead ends: 326 [2018-04-10 13:41:45,683 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 128 GetRequests, 52 SyntacticMatches, 6 SemanticMatches, 70 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1132 ImplicationChecksByTransitivity, 1.6s TimeCoverageRelationStatistics Valid=405, Invalid=4707, Unknown=0, NotChecked=0, Total=5112 [2018-04-10 13:41:45,683 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 326 states. [2018-04-10 13:41:45,685 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 326 to 273. [2018-04-10 13:41:45,685 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 273 states. [2018-04-10 13:41:45,686 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 273 states to 273 states and 304 transitions. [2018-04-10 13:41:45,686 INFO L78 Accepts]: Start accepts. Automaton has 273 states and 304 transitions. Word has length 67 [2018-04-10 13:41:45,686 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 13:41:45,686 INFO L459 AbstractCegarLoop]: Abstraction has 273 states and 304 transitions. [2018-04-10 13:41:45,686 INFO L460 AbstractCegarLoop]: Interpolant automaton has 36 states. [2018-04-10 13:41:45,686 INFO L276 IsEmpty]: Start isEmpty. Operand 273 states and 304 transitions. [2018-04-10 13:41:45,687 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2018-04-10 13:41:45,687 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 13:41:45,687 INFO L355 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 13:41:45,687 INFO L408 AbstractCegarLoop]: === Iteration 44 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-04-10 13:41:45,687 INFO L82 PathProgramCache]: Analyzing trace with hash -363478814, now seen corresponding path program 1 times [2018-04-10 13:41:45,687 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-10 13:41:45,687 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-10 13:41:45,688 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:41:45,688 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:41:45,688 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:41:45,694 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:41:45,695 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 13:41:45,737 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 3 proven. 27 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2018-04-10 13:41:45,737 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-10 13:41:45,737 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-10 13:41:45,742 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:41:45,769 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:41:45,771 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-10 13:41:45,803 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 3 proven. 27 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2018-04-10 13:41:45,824 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-10 13:41:45,824 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 7 [2018-04-10 13:41:45,825 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-04-10 13:41:45,825 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-04-10 13:41:45,826 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2018-04-10 13:41:45,827 INFO L87 Difference]: Start difference. First operand 273 states and 304 transitions. Second operand 7 states. [2018-04-10 13:41:45,846 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 13:41:45,846 INFO L93 Difference]: Finished difference Result 285 states and 316 transitions. [2018-04-10 13:41:45,847 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-04-10 13:41:45,847 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 74 [2018-04-10 13:41:45,847 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 13:41:45,847 INFO L225 Difference]: With dead ends: 285 [2018-04-10 13:41:45,848 INFO L226 Difference]: Without dead ends: 285 [2018-04-10 13:41:45,848 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 79 GetRequests, 74 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2018-04-10 13:41:45,848 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 285 states. [2018-04-10 13:41:45,850 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 285 to 280. [2018-04-10 13:41:45,850 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 280 states. [2018-04-10 13:41:45,851 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 280 states to 280 states and 311 transitions. [2018-04-10 13:41:45,851 INFO L78 Accepts]: Start accepts. Automaton has 280 states and 311 transitions. Word has length 74 [2018-04-10 13:41:45,851 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 13:41:45,851 INFO L459 AbstractCegarLoop]: Abstraction has 280 states and 311 transitions. [2018-04-10 13:41:45,851 INFO L460 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-04-10 13:41:45,851 INFO L276 IsEmpty]: Start isEmpty. Operand 280 states and 311 transitions. [2018-04-10 13:41:45,851 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2018-04-10 13:41:45,851 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 13:41:45,851 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 13:41:45,851 INFO L408 AbstractCegarLoop]: === Iteration 45 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-04-10 13:41:45,851 INFO L82 PathProgramCache]: Analyzing trace with hash -1382711762, now seen corresponding path program 1 times [2018-04-10 13:41:45,852 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-10 13:41:45,852 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-10 13:41:45,852 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:41:45,852 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:41:45,852 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:41:45,857 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:41:45,858 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 13:41:46,236 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 13:41:46,236 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-10 13:41:46,236 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [19] imperfect sequences [] total 19 [2018-04-10 13:41:46,236 INFO L442 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-04-10 13:41:46,237 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-04-10 13:41:46,237 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=50, Invalid=330, Unknown=0, NotChecked=0, Total=380 [2018-04-10 13:41:46,237 INFO L87 Difference]: Start difference. First operand 280 states and 311 transitions. Second operand 20 states. [2018-04-10 13:41:46,859 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 13:41:46,859 INFO L93 Difference]: Finished difference Result 316 states and 350 transitions. [2018-04-10 13:41:46,859 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-04-10 13:41:46,859 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 55 [2018-04-10 13:41:46,860 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 13:41:46,860 INFO L225 Difference]: With dead ends: 316 [2018-04-10 13:41:46,860 INFO L226 Difference]: Without dead ends: 316 [2018-04-10 13:41:46,861 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 38 GetRequests, 4 SyntacticMatches, 2 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 230 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=140, Invalid=982, Unknown=0, NotChecked=0, Total=1122 [2018-04-10 13:41:46,861 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 316 states. [2018-04-10 13:41:46,863 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 316 to 293. [2018-04-10 13:41:46,863 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 293 states. [2018-04-10 13:41:46,864 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 293 states to 293 states and 325 transitions. [2018-04-10 13:41:46,864 INFO L78 Accepts]: Start accepts. Automaton has 293 states and 325 transitions. Word has length 55 [2018-04-10 13:41:46,864 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 13:41:46,864 INFO L459 AbstractCegarLoop]: Abstraction has 293 states and 325 transitions. [2018-04-10 13:41:46,864 INFO L460 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-04-10 13:41:46,865 INFO L276 IsEmpty]: Start isEmpty. Operand 293 states and 325 transitions. [2018-04-10 13:41:46,865 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2018-04-10 13:41:46,865 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 13:41:46,865 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 13:41:46,865 INFO L408 AbstractCegarLoop]: === Iteration 46 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-04-10 13:41:46,866 INFO L82 PathProgramCache]: Analyzing trace with hash 1943956119, now seen corresponding path program 1 times [2018-04-10 13:41:46,866 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-10 13:41:46,866 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-10 13:41:46,866 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:41:46,866 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:41:46,866 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:41:46,872 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:41:46,872 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 13:41:46,911 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 13:41:46,911 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-10 13:41:46,911 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-04-10 13:41:46,912 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-04-10 13:41:46,912 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-04-10 13:41:46,912 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-04-10 13:41:46,912 INFO L87 Difference]: Start difference. First operand 293 states and 325 transitions. Second operand 6 states. [2018-04-10 13:41:47,038 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 13:41:47,038 INFO L93 Difference]: Finished difference Result 292 states and 321 transitions. [2018-04-10 13:41:47,038 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-04-10 13:41:47,038 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 55 [2018-04-10 13:41:47,038 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 13:41:47,039 INFO L225 Difference]: With dead ends: 292 [2018-04-10 13:41:47,039 INFO L226 Difference]: Without dead ends: 292 [2018-04-10 13:41:47,039 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2018-04-10 13:41:47,040 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 292 states. [2018-04-10 13:41:47,042 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 292 to 290. [2018-04-10 13:41:47,042 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 290 states. [2018-04-10 13:41:47,043 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 290 states to 290 states and 318 transitions. [2018-04-10 13:41:47,043 INFO L78 Accepts]: Start accepts. Automaton has 290 states and 318 transitions. Word has length 55 [2018-04-10 13:41:47,044 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 13:41:47,044 INFO L459 AbstractCegarLoop]: Abstraction has 290 states and 318 transitions. [2018-04-10 13:41:47,044 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-04-10 13:41:47,044 INFO L276 IsEmpty]: Start isEmpty. Operand 290 states and 318 transitions. [2018-04-10 13:41:47,044 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2018-04-10 13:41:47,044 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 13:41:47,045 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 13:41:47,045 INFO L408 AbstractCegarLoop]: === Iteration 47 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-04-10 13:41:47,045 INFO L82 PathProgramCache]: Analyzing trace with hash -1641106482, now seen corresponding path program 1 times [2018-04-10 13:41:47,045 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-10 13:41:47,045 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-10 13:41:47,046 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:41:47,046 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:41:47,046 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:41:47,054 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:41:47,054 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 13:41:47,401 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 13:41:47,401 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-10 13:41:47,401 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [18] imperfect sequences [] total 18 [2018-04-10 13:41:47,401 INFO L442 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-04-10 13:41:47,402 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-04-10 13:41:47,402 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=47, Invalid=295, Unknown=0, NotChecked=0, Total=342 [2018-04-10 13:41:47,402 INFO L87 Difference]: Start difference. First operand 290 states and 318 transitions. Second operand 19 states. [2018-04-10 13:41:47,977 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 13:41:47,978 INFO L93 Difference]: Finished difference Result 314 states and 344 transitions. [2018-04-10 13:41:47,978 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-04-10 13:41:47,978 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 57 [2018-04-10 13:41:47,978 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 13:41:47,979 INFO L225 Difference]: With dead ends: 314 [2018-04-10 13:41:47,979 INFO L226 Difference]: Without dead ends: 314 [2018-04-10 13:41:47,979 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 33 GetRequests, 2 SyntacticMatches, 3 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 140 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=110, Invalid=760, Unknown=0, NotChecked=0, Total=870 [2018-04-10 13:41:47,979 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 314 states. [2018-04-10 13:41:47,981 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 314 to 282. [2018-04-10 13:41:47,981 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 282 states. [2018-04-10 13:41:47,982 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 282 states to 282 states and 310 transitions. [2018-04-10 13:41:47,982 INFO L78 Accepts]: Start accepts. Automaton has 282 states and 310 transitions. Word has length 57 [2018-04-10 13:41:47,982 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 13:41:47,982 INFO L459 AbstractCegarLoop]: Abstraction has 282 states and 310 transitions. [2018-04-10 13:41:47,982 INFO L460 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-04-10 13:41:47,982 INFO L276 IsEmpty]: Start isEmpty. Operand 282 states and 310 transitions. [2018-04-10 13:41:47,983 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2018-04-10 13:41:47,983 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 13:41:47,983 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 13:41:47,983 INFO L408 AbstractCegarLoop]: === Iteration 48 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-04-10 13:41:47,983 INFO L82 PathProgramCache]: Analyzing trace with hash -1817611563, now seen corresponding path program 1 times [2018-04-10 13:41:47,983 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-10 13:41:47,983 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-10 13:41:47,984 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:41:47,984 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:41:47,984 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:41:47,989 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:41:47,989 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 13:41:48,277 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 13:41:48,277 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-10 13:41:48,277 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [21] imperfect sequences [] total 21 [2018-04-10 13:41:48,277 INFO L442 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-04-10 13:41:48,277 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-04-10 13:41:48,277 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=57, Invalid=363, Unknown=0, NotChecked=0, Total=420 [2018-04-10 13:41:48,278 INFO L87 Difference]: Start difference. First operand 282 states and 310 transitions. Second operand 21 states. [2018-04-10 13:41:49,017 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 13:41:49,017 INFO L93 Difference]: Finished difference Result 320 states and 347 transitions. [2018-04-10 13:41:49,023 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2018-04-10 13:41:49,023 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 60 [2018-04-10 13:41:49,023 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 13:41:49,024 INFO L225 Difference]: With dead ends: 320 [2018-04-10 13:41:49,024 INFO L226 Difference]: Without dead ends: 309 [2018-04-10 13:41:49,025 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 41 GetRequests, 2 SyntacticMatches, 3 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 277 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=186, Invalid=1220, Unknown=0, NotChecked=0, Total=1406 [2018-04-10 13:41:49,025 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 309 states. [2018-04-10 13:41:49,028 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 309 to 289. [2018-04-10 13:41:49,028 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 289 states. [2018-04-10 13:41:49,028 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 289 states to 289 states and 315 transitions. [2018-04-10 13:41:49,028 INFO L78 Accepts]: Start accepts. Automaton has 289 states and 315 transitions. Word has length 60 [2018-04-10 13:41:49,029 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 13:41:49,029 INFO L459 AbstractCegarLoop]: Abstraction has 289 states and 315 transitions. [2018-04-10 13:41:49,029 INFO L460 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-04-10 13:41:49,029 INFO L276 IsEmpty]: Start isEmpty. Operand 289 states and 315 transitions. [2018-04-10 13:41:49,029 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2018-04-10 13:41:49,029 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 13:41:49,030 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 13:41:49,030 INFO L408 AbstractCegarLoop]: === Iteration 49 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-04-10 13:41:49,030 INFO L82 PathProgramCache]: Analyzing trace with hash 763384283, now seen corresponding path program 1 times [2018-04-10 13:41:49,030 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-10 13:41:49,030 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-10 13:41:49,030 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:41:49,031 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:41:49,031 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:41:49,038 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:41:49,039 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 13:41:49,542 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 13:41:49,542 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-10 13:41:49,542 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [25] imperfect sequences [] total 25 [2018-04-10 13:41:49,542 INFO L442 AbstractCegarLoop]: Interpolant automaton has 26 states [2018-04-10 13:41:49,542 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2018-04-10 13:41:49,542 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=86, Invalid=564, Unknown=0, NotChecked=0, Total=650 [2018-04-10 13:41:49,542 INFO L87 Difference]: Start difference. First operand 289 states and 315 transitions. Second operand 26 states. [2018-04-10 13:41:50,302 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 13:41:50,302 INFO L93 Difference]: Finished difference Result 308 states and 334 transitions. [2018-04-10 13:41:50,302 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2018-04-10 13:41:50,302 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 60 [2018-04-10 13:41:50,302 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 13:41:50,303 INFO L225 Difference]: With dead ends: 308 [2018-04-10 13:41:50,303 INFO L226 Difference]: Without dead ends: 308 [2018-04-10 13:41:50,304 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 45 GetRequests, 4 SyntacticMatches, 2 SemanticMatches, 39 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 384 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=188, Invalid=1452, Unknown=0, NotChecked=0, Total=1640 [2018-04-10 13:41:50,304 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 308 states. [2018-04-10 13:41:50,306 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 308 to 289. [2018-04-10 13:41:50,306 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 289 states. [2018-04-10 13:41:50,306 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 289 states to 289 states and 313 transitions. [2018-04-10 13:41:50,306 INFO L78 Accepts]: Start accepts. Automaton has 289 states and 313 transitions. Word has length 60 [2018-04-10 13:41:50,307 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 13:41:50,307 INFO L459 AbstractCegarLoop]: Abstraction has 289 states and 313 transitions. [2018-04-10 13:41:50,307 INFO L460 AbstractCegarLoop]: Interpolant automaton has 26 states. [2018-04-10 13:41:50,307 INFO L276 IsEmpty]: Start isEmpty. Operand 289 states and 313 transitions. [2018-04-10 13:41:50,307 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 62 [2018-04-10 13:41:50,307 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 13:41:50,307 INFO L355 BasicCegarLoop]: trace histogram [5, 4, 4, 4, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 13:41:50,307 INFO L408 AbstractCegarLoop]: === Iteration 50 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-04-10 13:41:50,307 INFO L82 PathProgramCache]: Analyzing trace with hash 897208251, now seen corresponding path program 1 times [2018-04-10 13:41:50,307 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-10 13:41:50,308 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-10 13:41:50,308 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:41:50,308 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:41:50,308 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:41:50,313 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:41:50,313 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 13:41:50,371 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 0 proven. 50 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 13:41:50,372 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-10 13:41:50,372 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-10 13:41:50,377 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:41:50,391 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:41:50,393 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-10 13:41:50,399 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 0 proven. 50 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 13:41:50,417 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-10 13:41:50,417 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 8 [2018-04-10 13:41:50,417 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-04-10 13:41:50,417 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-04-10 13:41:50,417 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=28, Invalid=28, Unknown=0, NotChecked=0, Total=56 [2018-04-10 13:41:50,417 INFO L87 Difference]: Start difference. First operand 289 states and 313 transitions. Second operand 8 states. [2018-04-10 13:41:50,430 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 13:41:50,430 INFO L93 Difference]: Finished difference Result 301 states and 325 transitions. [2018-04-10 13:41:50,430 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-04-10 13:41:50,430 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 61 [2018-04-10 13:41:50,430 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 13:41:50,431 INFO L225 Difference]: With dead ends: 301 [2018-04-10 13:41:50,431 INFO L226 Difference]: Without dead ends: 301 [2018-04-10 13:41:50,431 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 67 GetRequests, 61 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=28, Invalid=28, Unknown=0, NotChecked=0, Total=56 [2018-04-10 13:41:50,431 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 301 states. [2018-04-10 13:41:50,433 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 301 to 296. [2018-04-10 13:41:50,433 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 296 states. [2018-04-10 13:41:50,434 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 296 states to 296 states and 320 transitions. [2018-04-10 13:41:50,434 INFO L78 Accepts]: Start accepts. Automaton has 296 states and 320 transitions. Word has length 61 [2018-04-10 13:41:50,434 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 13:41:50,434 INFO L459 AbstractCegarLoop]: Abstraction has 296 states and 320 transitions. [2018-04-10 13:41:50,434 INFO L460 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-04-10 13:41:50,434 INFO L276 IsEmpty]: Start isEmpty. Operand 296 states and 320 transitions. [2018-04-10 13:41:50,434 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 63 [2018-04-10 13:41:50,434 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 13:41:50,434 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 13:41:50,434 INFO L408 AbstractCegarLoop]: === Iteration 51 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-04-10 13:41:50,435 INFO L82 PathProgramCache]: Analyzing trace with hash -827109317, now seen corresponding path program 1 times [2018-04-10 13:41:50,435 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-10 13:41:50,435 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-10 13:41:50,435 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:41:50,435 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:41:50,435 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:41:50,441 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:41:50,442 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 13:41:50,914 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 13:41:50,914 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-10 13:41:50,915 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [24] imperfect sequences [] total 24 [2018-04-10 13:41:50,915 INFO L442 AbstractCegarLoop]: Interpolant automaton has 25 states [2018-04-10 13:41:50,915 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2018-04-10 13:41:50,915 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=522, Unknown=0, NotChecked=0, Total=600 [2018-04-10 13:41:50,915 INFO L87 Difference]: Start difference. First operand 296 states and 320 transitions. Second operand 25 states. [2018-04-10 13:41:51,632 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 13:41:51,632 INFO L93 Difference]: Finished difference Result 314 states and 339 transitions. [2018-04-10 13:41:51,632 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2018-04-10 13:41:51,632 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 62 [2018-04-10 13:41:51,633 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 13:41:51,633 INFO L225 Difference]: With dead ends: 314 [2018-04-10 13:41:51,633 INFO L226 Difference]: Without dead ends: 314 [2018-04-10 13:41:51,633 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 44 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 369 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=197, Invalid=1525, Unknown=0, NotChecked=0, Total=1722 [2018-04-10 13:41:51,634 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 314 states. [2018-04-10 13:41:51,636 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 314 to 274. [2018-04-10 13:41:51,636 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 274 states. [2018-04-10 13:41:51,639 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 274 states to 274 states and 296 transitions. [2018-04-10 13:41:51,639 INFO L78 Accepts]: Start accepts. Automaton has 274 states and 296 transitions. Word has length 62 [2018-04-10 13:41:51,640 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 13:41:51,640 INFO L459 AbstractCegarLoop]: Abstraction has 274 states and 296 transitions. [2018-04-10 13:41:51,640 INFO L460 AbstractCegarLoop]: Interpolant automaton has 25 states. [2018-04-10 13:41:51,640 INFO L276 IsEmpty]: Start isEmpty. Operand 274 states and 296 transitions. [2018-04-10 13:41:51,640 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 76 [2018-04-10 13:41:51,640 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 13:41:51,641 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 13:41:51,641 INFO L408 AbstractCegarLoop]: === Iteration 52 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-04-10 13:41:51,641 INFO L82 PathProgramCache]: Analyzing trace with hash 560414577, now seen corresponding path program 1 times [2018-04-10 13:41:51,641 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-10 13:41:51,641 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-10 13:41:51,642 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:41:51,642 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:41:51,642 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:41:51,656 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:41:51,656 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 13:41:51,762 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 12 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-04-10 13:41:51,762 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-10 13:41:51,762 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-10 13:41:51,771 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:41:51,807 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:41:51,809 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-10 13:41:51,856 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-04-10 13:41:51,858 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-10 13:41:51,858 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-10 13:41:51,859 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:41:51,863 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:41:51,863 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:17, output treesize:9 [2018-04-10 13:41:51,865 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 13:41:51,866 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 13:41:51,871 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 8 [2018-04-10 13:41:51,871 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-10 13:41:51,873 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:41:51,874 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:18, output treesize:12 [2018-04-10 13:41:51,896 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1 [2018-04-10 13:41:51,897 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-10 13:41:51,899 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-10 13:41:51,899 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:17, output treesize:12 [2018-04-10 13:41:57,914 WARN L148 SmtUtils]: Spent 2003ms on a formula simplification that was a NOOP. DAG size: 12 [2018-04-10 13:41:57,935 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 12 [2018-04-10 13:41:57,936 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2018-04-10 13:41:57,936 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-10 13:41:57,937 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:41:57,938 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:41:57,938 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:21, output treesize:10 [2018-04-10 13:41:57,940 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 13:41:57,941 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 21 [2018-04-10 13:41:57,941 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-10 13:41:57,944 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-10 13:41:57,944 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:16, output treesize:11 [2018-04-10 13:41:57,961 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 6 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 13:41:57,980 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-10 13:41:57,980 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 15] total 17 [2018-04-10 13:41:57,981 INFO L442 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-04-10 13:41:57,981 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-04-10 13:41:57,981 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=49, Invalid=255, Unknown=2, NotChecked=0, Total=306 [2018-04-10 13:41:57,981 INFO L87 Difference]: Start difference. First operand 274 states and 296 transitions. Second operand 18 states. [2018-04-10 13:42:26,149 WARN L148 SmtUtils]: Spent 2004ms on a formula simplification that was a NOOP. DAG size: 16 [2018-04-10 13:42:30,169 WARN L148 SmtUtils]: Spent 2005ms on a formula simplification that was a NOOP. DAG size: 21 [2018-04-10 13:43:03,838 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 13:43:03,838 INFO L93 Difference]: Finished difference Result 316 states and 339 transitions. [2018-04-10 13:43:03,838 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-04-10 13:43:03,838 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 75 [2018-04-10 13:43:03,838 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 13:43:03,839 INFO L225 Difference]: With dead ends: 316 [2018-04-10 13:43:03,839 INFO L226 Difference]: Without dead ends: 305 [2018-04-10 13:43:03,839 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 99 GetRequests, 66 SyntacticMatches, 4 SemanticMatches, 29 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 201 ImplicationChecksByTransitivity, 20.2s TimeCoverageRelationStatistics Valid=150, Invalid=773, Unknown=7, NotChecked=0, Total=930 [2018-04-10 13:43:03,839 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 305 states. [2018-04-10 13:43:03,841 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 305 to 204. [2018-04-10 13:43:03,842 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 204 states. [2018-04-10 13:43:03,842 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 204 states to 204 states and 218 transitions. [2018-04-10 13:43:03,842 INFO L78 Accepts]: Start accepts. Automaton has 204 states and 218 transitions. Word has length 75 [2018-04-10 13:43:03,842 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 13:43:03,842 INFO L459 AbstractCegarLoop]: Abstraction has 204 states and 218 transitions. [2018-04-10 13:43:03,843 INFO L460 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-04-10 13:43:03,843 INFO L276 IsEmpty]: Start isEmpty. Operand 204 states and 218 transitions. [2018-04-10 13:43:03,843 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2018-04-10 13:43:03,843 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 13:43:03,843 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 13:43:03,843 INFO L408 AbstractCegarLoop]: === Iteration 53 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-04-10 13:43:03,844 INFO L82 PathProgramCache]: Analyzing trace with hash 689621497, now seen corresponding path program 1 times [2018-04-10 13:43:03,844 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-10 13:43:03,844 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-10 13:43:03,844 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:43:03,844 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:43:03,844 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:43:03,855 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:43:03,856 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 13:43:04,341 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 13:43:04,341 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-10 13:43:04,342 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [24] imperfect sequences [] total 24 [2018-04-10 13:43:04,342 INFO L442 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-04-10 13:43:04,342 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-04-10 13:43:04,342 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=64, Invalid=488, Unknown=0, NotChecked=0, Total=552 [2018-04-10 13:43:04,342 INFO L87 Difference]: Start difference. First operand 204 states and 218 transitions. Second operand 24 states. [2018-04-10 13:43:05,223 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 13:43:05,223 INFO L93 Difference]: Finished difference Result 240 states and 258 transitions. [2018-04-10 13:43:05,223 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2018-04-10 13:43:05,223 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 65 [2018-04-10 13:43:05,223 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 13:43:05,224 INFO L225 Difference]: With dead ends: 240 [2018-04-10 13:43:05,224 INFO L226 Difference]: Without dead ends: 233 [2018-04-10 13:43:05,224 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 51 GetRequests, 3 SyntacticMatches, 4 SemanticMatches, 44 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 473 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=211, Invalid=1859, Unknown=0, NotChecked=0, Total=2070 [2018-04-10 13:43:05,225 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 233 states. [2018-04-10 13:43:05,229 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 233 to 213. [2018-04-10 13:43:05,229 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 213 states. [2018-04-10 13:43:05,229 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 213 states to 213 states and 228 transitions. [2018-04-10 13:43:05,229 INFO L78 Accepts]: Start accepts. Automaton has 213 states and 228 transitions. Word has length 65 [2018-04-10 13:43:05,230 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 13:43:05,230 INFO L459 AbstractCegarLoop]: Abstraction has 213 states and 228 transitions. [2018-04-10 13:43:05,230 INFO L460 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-04-10 13:43:05,230 INFO L276 IsEmpty]: Start isEmpty. Operand 213 states and 228 transitions. [2018-04-10 13:43:05,231 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 74 [2018-04-10 13:43:05,231 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 13:43:05,231 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 13:43:05,231 INFO L408 AbstractCegarLoop]: === Iteration 54 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-04-10 13:43:05,231 INFO L82 PathProgramCache]: Analyzing trace with hash 1592487693, now seen corresponding path program 1 times [2018-04-10 13:43:05,231 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-10 13:43:05,231 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-10 13:43:05,232 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:43:05,232 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:43:05,232 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:43:05,244 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:43:05,245 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 13:43:06,027 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 14 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 13:43:06,027 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-10 13:43:06,027 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-10 13:43:06,033 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:43:06,069 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:43:06,072 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-10 13:43:06,105 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-04-10 13:43:06,107 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-10 13:43:06,107 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-10 13:43:06,109 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:43:06,112 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:43:06,112 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:17, output treesize:9 [2018-04-10 13:43:06,423 WARN L1033 $PredicateComparison]: unable to prove that (exists ((__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_~node~0.base Int) (|__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_#t~ret14.base| Int)) (and (= |c_#memory_$Pointer$.base| (let ((.cse0 (store |c_old(#memory_$Pointer$.base)| __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_~node~0.base (store (store (select |c_old(#memory_$Pointer$.base)| __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_~node~0.base) 4 (select (select |c_old(#memory_$Pointer$.base)| |c___U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_#in~pointerToList.base|) |c___U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_#in~pointerToList.offset|)) 0 |__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_#t~ret14.base|)))) (store .cse0 |c___U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_#in~pointerToList.base| (store (select .cse0 |c___U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_#in~pointerToList.base|) |c___U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_#in~pointerToList.offset| __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_~node~0.base)))) (= (select |c_old(#valid)| __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_~node~0.base) 0) (= |c_#valid| (store |c_old(#valid)| __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_~node~0.base 1)))) is different from true [2018-04-10 13:43:06,451 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 13:43:06,452 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 13:43:06,453 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 33 [2018-04-10 13:43:06,453 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-10 13:43:06,486 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 57 treesize of output 47 [2018-04-10 13:43:06,489 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 13:43:06,489 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 45 [2018-04-10 13:43:06,493 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 42 [2018-04-10 13:43:06,494 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-10 13:43:06,501 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:43:06,514 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 27 [2018-04-10 13:43:06,516 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 13:43:06,518 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 29 [2018-04-10 13:43:06,518 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-04-10 13:43:06,525 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:43:06,530 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:43:06,535 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 48 [2018-04-10 13:43:06,537 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 18 [2018-04-10 13:43:06,540 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 19 [2018-04-10 13:43:06,540 INFO L267 ElimStorePlain]: Start of recursive call 10: End of recursive call: and 1 xjuncts. [2018-04-10 13:43:06,543 INFO L267 ElimStorePlain]: Start of recursive call 9: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:43:06,553 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 13:43:06,554 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 42 [2018-04-10 13:43:06,556 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 25 [2018-04-10 13:43:06,557 INFO L267 ElimStorePlain]: Start of recursive call 12: End of recursive call: and 1 xjuncts. [2018-04-10 13:43:06,562 INFO L267 ElimStorePlain]: Start of recursive call 11: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:43:06,566 INFO L267 ElimStorePlain]: Start of recursive call 8: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:43:06,577 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 2 xjuncts. [2018-04-10 13:43:06,578 INFO L202 ElimStorePlain]: Needed 12 recursive calls to eliminate 4 variables, input treesize:65, output treesize:84 [2018-04-10 13:43:06,710 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 16 [2018-04-10 13:43:06,711 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-10 13:43:06,713 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-10 13:43:06,713 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:42, output treesize:20 [2018-04-10 13:43:06,778 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 21 [2018-04-10 13:43:06,779 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2018-04-10 13:43:06,779 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-10 13:43:06,780 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:43:06,786 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:43:06,787 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:73, output treesize:62 [2018-04-10 13:43:06,863 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 13:43:06,864 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 53 [2018-04-10 13:43:06,864 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-10 13:43:06,869 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:43:06,869 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:63, output treesize:37 [2018-04-10 13:43:06,899 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 13:43:06,900 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 13:43:06,901 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 42 treesize of output 50 [2018-04-10 13:43:06,903 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 38 [2018-04-10 13:43:06,903 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-10 13:43:06,908 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-10 13:43:06,920 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-10 13:43:06,920 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:50, output treesize:34 [2018-04-10 13:43:06,957 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 13:43:06,958 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 24 [2018-04-10 13:43:06,959 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 5 [2018-04-10 13:43:06,960 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-10 13:43:06,963 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 5 [2018-04-10 13:43:06,963 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-10 13:43:06,964 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:43:06,966 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-04-10 13:43:06,966 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 3 variables, input treesize:38, output treesize:16 [2018-04-10 13:43:07,004 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 18 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 2 not checked. [2018-04-10 13:43:07,022 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-10 13:43:07,022 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 25] total 39 [2018-04-10 13:43:07,023 INFO L442 AbstractCegarLoop]: Interpolant automaton has 40 states [2018-04-10 13:43:07,023 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 40 interpolants. [2018-04-10 13:43:07,023 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=142, Invalid=1340, Unknown=4, NotChecked=74, Total=1560 [2018-04-10 13:43:07,023 INFO L87 Difference]: Start difference. First operand 213 states and 228 transitions. Second operand 40 states. [2018-04-10 13:43:10,553 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 13:43:10,553 INFO L93 Difference]: Finished difference Result 256 states and 279 transitions. [2018-04-10 13:43:10,553 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2018-04-10 13:43:10,553 INFO L78 Accepts]: Start accepts. Automaton has 40 states. Word has length 73 [2018-04-10 13:43:10,553 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 13:43:10,554 INFO L225 Difference]: With dead ends: 256 [2018-04-10 13:43:10,554 INFO L226 Difference]: Without dead ends: 256 [2018-04-10 13:43:10,555 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 125 GetRequests, 54 SyntacticMatches, 8 SemanticMatches, 63 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 1071 ImplicationChecksByTransitivity, 1.9s TimeCoverageRelationStatistics Valid=372, Invalid=3654, Unknown=10, NotChecked=124, Total=4160 [2018-04-10 13:43:10,555 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 256 states. [2018-04-10 13:43:10,559 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 256 to 225. [2018-04-10 13:43:10,559 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 225 states. [2018-04-10 13:43:10,560 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 225 states to 225 states and 242 transitions. [2018-04-10 13:43:10,560 INFO L78 Accepts]: Start accepts. Automaton has 225 states and 242 transitions. Word has length 73 [2018-04-10 13:43:10,560 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 13:43:10,560 INFO L459 AbstractCegarLoop]: Abstraction has 225 states and 242 transitions. [2018-04-10 13:43:10,560 INFO L460 AbstractCegarLoop]: Interpolant automaton has 40 states. [2018-04-10 13:43:10,560 INFO L276 IsEmpty]: Start isEmpty. Operand 225 states and 242 transitions. [2018-04-10 13:43:10,561 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 74 [2018-04-10 13:43:10,561 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 13:43:10,561 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 13:43:10,561 INFO L408 AbstractCegarLoop]: === Iteration 55 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-04-10 13:43:10,562 INFO L82 PathProgramCache]: Analyzing trace with hash 1592487694, now seen corresponding path program 1 times [2018-04-10 13:43:10,562 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-10 13:43:10,562 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-10 13:43:10,562 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:43:10,562 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:43:10,562 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:43:10,575 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:43:10,576 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 13:43:11,463 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 8 proven. 17 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 13:43:11,464 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-10 13:43:11,464 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-10 13:43:11,469 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:43:11,499 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:43:11,502 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-10 13:43:11,656 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-04-10 13:43:11,658 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-10 13:43:11,658 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-10 13:43:11,659 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:43:11,668 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-04-10 13:43:11,669 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-10 13:43:11,669 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-10 13:43:11,671 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:43:11,675 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:43:11,676 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:33, output treesize:26 [2018-04-10 13:43:11,969 WARN L1033 $PredicateComparison]: unable to prove that (exists ((__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_~node~0.base Int) (|__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_#t~ret14.offset| Int) (|__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_#t~ret14.base| Int)) (and (= |c_#length| (store |c_old(#length)| __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_~node~0.base 8)) (= |c_#memory_$Pointer$.base| (let ((.cse0 (store |c_old(#memory_$Pointer$.base)| __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_~node~0.base (store (store (select |c_old(#memory_$Pointer$.base)| __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_~node~0.base) 4 (select (select |c_old(#memory_$Pointer$.base)| |c___U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_#in~pointerToList.base|) |c___U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_#in~pointerToList.offset|)) 0 |__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_#t~ret14.base|)))) (store .cse0 |c___U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_#in~pointerToList.base| (store (select .cse0 |c___U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_#in~pointerToList.base|) |c___U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_#in~pointerToList.offset| __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_~node~0.base)))) (= (select |c_old(#valid)| __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_~node~0.base) 0) (= |c_#memory_$Pointer$.offset| (let ((.cse1 (store |c_old(#memory_$Pointer$.offset)| __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_~node~0.base (store (store (select |c_old(#memory_$Pointer$.offset)| __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_~node~0.base) 4 (select (select |c_old(#memory_$Pointer$.offset)| |c___U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_#in~pointerToList.base|) |c___U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_#in~pointerToList.offset|)) 0 |__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_#t~ret14.offset|)))) (store .cse1 |c___U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_#in~pointerToList.base| (store (select .cse1 |c___U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_#in~pointerToList.base|) |c___U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_#in~pointerToList.offset| 0)))))) is different from true [2018-04-10 13:43:12,073 WARN L148 SmtUtils]: Spent 100ms on a formula simplification that was a NOOP. DAG size: 59 [2018-04-10 13:43:12,079 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 13:43:12,082 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 13:43:12,082 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 8 [2018-04-10 13:43:12,083 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-10 13:43:12,174 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 23 [2018-04-10 13:43:12,175 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-10 13:43:12,257 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 57 treesize of output 47 [2018-04-10 13:43:12,261 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 13:43:12,262 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 45 [2018-04-10 13:43:12,266 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 42 [2018-04-10 13:43:12,268 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-04-10 13:43:12,276 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:43:12,294 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 27 [2018-04-10 13:43:12,298 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 13:43:12,299 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 29 [2018-04-10 13:43:12,300 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 1 xjuncts. [2018-04-10 13:43:12,306 INFO L267 ElimStorePlain]: Start of recursive call 7: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:43:12,313 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:43:12,320 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 48 [2018-04-10 13:43:12,326 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 18 [2018-04-10 13:43:12,329 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 19 [2018-04-10 13:43:12,329 INFO L267 ElimStorePlain]: Start of recursive call 11: End of recursive call: and 1 xjuncts. [2018-04-10 13:43:12,336 INFO L267 ElimStorePlain]: Start of recursive call 10: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:43:12,357 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 13:43:12,359 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 42 [2018-04-10 13:43:12,361 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 25 [2018-04-10 13:43:12,361 INFO L267 ElimStorePlain]: Start of recursive call 13: End of recursive call: and 1 xjuncts. [2018-04-10 13:43:12,371 INFO L267 ElimStorePlain]: Start of recursive call 12: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:43:12,380 INFO L267 ElimStorePlain]: Start of recursive call 9: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:43:12,424 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 39 [2018-04-10 13:43:12,426 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 13:43:12,427 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 37 [2018-04-10 13:43:12,432 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 33 [2018-04-10 13:43:12,433 INFO L267 ElimStorePlain]: Start of recursive call 16: End of recursive call: and 1 xjuncts. [2018-04-10 13:43:12,438 INFO L267 ElimStorePlain]: Start of recursive call 15: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:43:12,456 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 19 [2018-04-10 13:43:12,461 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 13:43:12,462 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 19 [2018-04-10 13:43:12,463 INFO L267 ElimStorePlain]: Start of recursive call 18: End of recursive call: and 1 xjuncts. [2018-04-10 13:43:12,500 INFO L267 ElimStorePlain]: Start of recursive call 17: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:43:12,504 INFO L267 ElimStorePlain]: Start of recursive call 14: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:43:12,509 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 38 [2018-04-10 13:43:12,511 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 18 [2018-04-10 13:43:12,513 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 19 [2018-04-10 13:43:12,514 INFO L267 ElimStorePlain]: Start of recursive call 21: End of recursive call: and 1 xjuncts. [2018-04-10 13:43:12,517 INFO L267 ElimStorePlain]: Start of recursive call 20: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:43:12,524 INFO L682 Elim1Store]: detected equality via solver [2018-04-10 13:43:12,525 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 34 [2018-04-10 13:43:12,527 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2018-04-10 13:43:12,527 INFO L267 ElimStorePlain]: Start of recursive call 23: End of recursive call: and 1 xjuncts. [2018-04-10 13:43:12,531 INFO L267 ElimStorePlain]: Start of recursive call 22: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:43:12,536 INFO L267 ElimStorePlain]: Start of recursive call 19: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:43:12,559 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-1 vars, 2 dim-2 vars, End of recursive call: and 4 xjuncts. [2018-04-10 13:43:12,559 INFO L202 ElimStorePlain]: Needed 23 recursive calls to eliminate 7 variables, input treesize:122, output treesize:254 [2018-04-10 13:43:12,941 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-04-10 13:43:12,941 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-10 13:43:12,951 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:43:12,951 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:112, output treesize:111 [2018-04-10 13:43:12,994 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 13:43:12,995 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 13:43:12,995 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 8 [2018-04-10 13:43:12,995 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-10 13:43:13,019 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 13:43:13,021 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 123 treesize of output 117 [2018-04-10 13:43:13,023 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 120 treesize of output 97 [2018-04-10 13:43:13,023 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-10 13:43:13,033 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-10 13:43:13,046 INFO L682 Elim1Store]: detected equality via solver [2018-04-10 13:43:13,047 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 71 treesize of output 77 [2018-04-10 13:43:13,049 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 84 [2018-04-10 13:43:13,049 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-04-10 13:43:13,055 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:43:13,063 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, 2 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-10 13:43:13,064 INFO L202 ElimStorePlain]: Needed 6 recursive calls to eliminate 3 variables, input treesize:132, output treesize:81 [2018-04-10 13:43:13,108 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 42 [2018-04-10 13:43:13,110 INFO L682 Elim1Store]: detected equality via solver [2018-04-10 13:43:13,110 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 23 [2018-04-10 13:43:13,110 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-10 13:43:13,115 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 10 [2018-04-10 13:43:13,116 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-10 13:43:13,118 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:43:13,126 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 28 [2018-04-10 13:43:13,127 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 15 [2018-04-10 13:43:13,127 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-04-10 13:43:13,130 INFO L682 Elim1Store]: detected equality via solver [2018-04-10 13:43:13,130 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 9 [2018-04-10 13:43:13,131 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-04-10 13:43:13,132 INFO L267 ElimStorePlain]: Start of recursive call 5: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:43:13,136 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-10 13:43:13,136 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 4 variables, input treesize:92, output treesize:18 [2018-04-10 13:43:13,185 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 7 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 2 not checked. [2018-04-10 13:43:13,203 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-10 13:43:13,203 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 28] total 47 [2018-04-10 13:43:13,203 INFO L442 AbstractCegarLoop]: Interpolant automaton has 48 states [2018-04-10 13:43:13,203 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 48 interpolants. [2018-04-10 13:43:13,204 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=206, Invalid=1950, Unknown=10, NotChecked=90, Total=2256 [2018-04-10 13:43:13,204 INFO L87 Difference]: Start difference. First operand 225 states and 242 transitions. Second operand 48 states. [2018-04-10 13:43:13,836 WARN L151 SmtUtils]: Spent 158ms on a formula simplification. DAG size of input: 101 DAG size of output 75 [2018-04-10 13:43:15,540 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 13:43:15,540 INFO L93 Difference]: Finished difference Result 296 states and 327 transitions. [2018-04-10 13:43:15,540 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 41 states. [2018-04-10 13:43:15,540 INFO L78 Accepts]: Start accepts. Automaton has 48 states. Word has length 73 [2018-04-10 13:43:15,541 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 13:43:15,541 INFO L225 Difference]: With dead ends: 296 [2018-04-10 13:43:15,541 INFO L226 Difference]: Without dead ends: 296 [2018-04-10 13:43:15,542 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 134 GetRequests, 51 SyntacticMatches, 6 SemanticMatches, 77 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 1933 ImplicationChecksByTransitivity, 2.7s TimeCoverageRelationStatistics Valid=595, Invalid=5394, Unknown=21, NotChecked=152, Total=6162 [2018-04-10 13:43:15,542 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 296 states. [2018-04-10 13:43:15,544 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 296 to 254. [2018-04-10 13:43:15,544 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 254 states. [2018-04-10 13:43:15,544 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 254 states to 254 states and 276 transitions. [2018-04-10 13:43:15,544 INFO L78 Accepts]: Start accepts. Automaton has 254 states and 276 transitions. Word has length 73 [2018-04-10 13:43:15,544 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 13:43:15,544 INFO L459 AbstractCegarLoop]: Abstraction has 254 states and 276 transitions. [2018-04-10 13:43:15,545 INFO L460 AbstractCegarLoop]: Interpolant automaton has 48 states. [2018-04-10 13:43:15,545 INFO L276 IsEmpty]: Start isEmpty. Operand 254 states and 276 transitions. [2018-04-10 13:43:15,545 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2018-04-10 13:43:15,545 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 13:43:15,545 INFO L355 BasicCegarLoop]: trace histogram [6, 5, 5, 5, 5, 5, 5, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 13:43:15,545 INFO L408 AbstractCegarLoop]: === Iteration 56 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-04-10 13:43:15,545 INFO L82 PathProgramCache]: Analyzing trace with hash -1288339126, now seen corresponding path program 1 times [2018-04-10 13:43:15,545 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-10 13:43:15,545 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-10 13:43:15,550 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:43:15,550 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:43:15,550 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:43:15,556 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:43:15,557 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 13:43:15,595 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 6 proven. 80 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2018-04-10 13:43:15,595 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-10 13:43:15,595 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-10 13:43:15,600 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:43:15,624 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:43:15,625 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-10 13:43:15,632 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 6 proven. 80 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2018-04-10 13:43:15,650 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-10 13:43:15,650 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8] total 9 [2018-04-10 13:43:15,650 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-04-10 13:43:15,650 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-04-10 13:43:15,650 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=36, Invalid=36, Unknown=0, NotChecked=0, Total=72 [2018-04-10 13:43:15,650 INFO L87 Difference]: Start difference. First operand 254 states and 276 transitions. Second operand 9 states. [2018-04-10 13:43:15,666 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 13:43:15,666 INFO L93 Difference]: Finished difference Result 266 states and 288 transitions. [2018-04-10 13:43:15,671 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-04-10 13:43:15,671 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 95 [2018-04-10 13:43:15,671 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 13:43:15,672 INFO L225 Difference]: With dead ends: 266 [2018-04-10 13:43:15,672 INFO L226 Difference]: Without dead ends: 266 [2018-04-10 13:43:15,672 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 102 GetRequests, 95 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=36, Invalid=36, Unknown=0, NotChecked=0, Total=72 [2018-04-10 13:43:15,672 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 266 states. [2018-04-10 13:43:15,674 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 266 to 261. [2018-04-10 13:43:15,674 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 261 states. [2018-04-10 13:43:15,674 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 261 states to 261 states and 283 transitions. [2018-04-10 13:43:15,674 INFO L78 Accepts]: Start accepts. Automaton has 261 states and 283 transitions. Word has length 95 [2018-04-10 13:43:15,674 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 13:43:15,675 INFO L459 AbstractCegarLoop]: Abstraction has 261 states and 283 transitions. [2018-04-10 13:43:15,675 INFO L460 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-04-10 13:43:15,675 INFO L276 IsEmpty]: Start isEmpty. Operand 261 states and 283 transitions. [2018-04-10 13:43:15,675 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 76 [2018-04-10 13:43:15,675 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 13:43:15,675 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 13:43:15,675 INFO L408 AbstractCegarLoop]: === Iteration 57 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-04-10 13:43:15,675 INFO L82 PathProgramCache]: Analyzing trace with hash 1371391946, now seen corresponding path program 1 times [2018-04-10 13:43:15,675 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-10 13:43:15,675 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-10 13:43:15,676 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:43:15,676 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:43:15,676 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:43:15,682 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:43:15,683 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 13:43:16,035 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 8 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 13:43:16,035 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-10 13:43:16,035 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-10 13:43:16,040 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:43:16,061 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:43:16,064 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-10 13:43:16,081 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-04-10 13:43:16,082 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-10 13:43:16,082 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-10 13:43:16,084 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:43:16,086 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:43:16,086 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:16, output treesize:8 [2018-04-10 13:43:16,203 WARN L1033 $PredicateComparison]: unable to prove that (exists ((__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_~node~0.base Int) (|__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_#t~ret14.base| Int)) (= |c_#memory_$Pointer$.base| (let ((.cse0 (store |c_old(#memory_$Pointer$.base)| __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_~node~0.base (store (store (select |c_old(#memory_$Pointer$.base)| __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_~node~0.base) 4 (select (select |c_old(#memory_$Pointer$.base)| |c___U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_#in~pointerToList.base|) |c___U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_#in~pointerToList.offset|)) 0 |__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_#t~ret14.base|)))) (store .cse0 |c___U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_#in~pointerToList.base| (store (select .cse0 |c___U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_#in~pointerToList.base|) |c___U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_#in~pointerToList.offset| __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_~node~0.base))))) is different from true [2018-04-10 13:43:16,239 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 40 [2018-04-10 13:43:16,241 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 13:43:16,241 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 38 [2018-04-10 13:43:16,244 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 37 [2018-04-10 13:43:16,244 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-10 13:43:16,248 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:43:16,252 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 20 [2018-04-10 13:43:16,254 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 13:43:16,255 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 20 [2018-04-10 13:43:16,255 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-04-10 13:43:16,257 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:43:16,260 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:43:16,263 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 39 [2018-04-10 13:43:16,264 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 18 [2018-04-10 13:43:16,273 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 19 [2018-04-10 13:43:16,273 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-04-10 13:43:16,276 INFO L267 ElimStorePlain]: Start of recursive call 8: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:43:16,284 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 35 [2018-04-10 13:43:16,286 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 16 [2018-04-10 13:43:16,287 INFO L267 ElimStorePlain]: Start of recursive call 11: End of recursive call: and 1 xjuncts. [2018-04-10 13:43:16,291 INFO L267 ElimStorePlain]: Start of recursive call 10: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:43:16,295 INFO L267 ElimStorePlain]: Start of recursive call 7: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:43:16,305 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 2 xjuncts. [2018-04-10 13:43:16,306 INFO L202 ElimStorePlain]: Needed 11 recursive calls to eliminate 3 variables, input treesize:53, output treesize:36 [2018-04-10 13:43:20,458 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 21 [2018-04-10 13:43:20,459 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2018-04-10 13:43:20,460 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-10 13:43:20,461 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:43:20,465 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:43:20,465 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:47, output treesize:36 [2018-04-10 13:43:20,514 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-04-10 13:43:20,514 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-10 13:43:20,525 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:43:20,525 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:37, output treesize:36 [2018-04-10 13:43:20,548 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 13:43:20,548 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 13:43:20,549 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 8 [2018-04-10 13:43:20,549 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-10 13:43:20,563 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 32 [2018-04-10 13:43:20,565 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 24 [2018-04-10 13:43:20,566 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-10 13:43:20,569 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-10 13:43:20,572 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-10 13:43:20,572 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 2 variables, input treesize:49, output treesize:27 [2018-04-10 13:43:20,598 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 23 [2018-04-10 13:43:20,599 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 5 [2018-04-10 13:43:20,600 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-10 13:43:20,602 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2018-04-10 13:43:20,602 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-10 13:43:20,603 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:43:20,605 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:43:20,605 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 3 variables, input treesize:31, output treesize:4 [2018-04-10 13:43:20,622 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 8 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 2 not checked. [2018-04-10 13:43:20,640 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-10 13:43:20,640 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 26] total 36 [2018-04-10 13:43:20,640 INFO L442 AbstractCegarLoop]: Interpolant automaton has 36 states [2018-04-10 13:43:20,640 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2018-04-10 13:43:20,641 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=123, Invalid=1058, Unknown=13, NotChecked=66, Total=1260 [2018-04-10 13:43:20,641 INFO L87 Difference]: Start difference. First operand 261 states and 283 transitions. Second operand 36 states. Received shutdown request... [2018-04-10 13:43:32,825 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-04-10 13:43:32,825 WARN L519 AbstractCegarLoop]: Verification canceled [2018-04-10 13:43:32,829 WARN L197 ceAbstractionStarter]: Timeout [2018-04-10 13:43:32,830 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 10.04 01:43:32 BoogieIcfgContainer [2018-04-10 13:43:32,830 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-04-10 13:43:32,830 INFO L168 Benchmark]: Toolchain (without parser) took 197140.65 ms. Allocated memory was 405.3 MB in the beginning and 1.5 GB in the end (delta: 1.1 GB). Free memory was 342.2 MB in the beginning and 974.2 MB in the end (delta: -632.0 MB). Peak memory consumption was 420.8 MB. Max. memory is 5.3 GB. [2018-04-10 13:43:32,831 INFO L168 Benchmark]: CDTParser took 0.12 ms. Allocated memory is still 405.3 MB. Free memory is still 368.4 MB. There was no memory consumed. Max. memory is 5.3 GB. [2018-04-10 13:43:32,831 INFO L168 Benchmark]: CACSL2BoogieTranslator took 239.45 ms. Allocated memory is still 405.3 MB. Free memory was 342.2 MB in the beginning and 315.6 MB in the end (delta: 26.6 MB). Peak memory consumption was 26.6 MB. Max. memory is 5.3 GB. [2018-04-10 13:43:32,832 INFO L168 Benchmark]: Boogie Preprocessor took 42.50 ms. Allocated memory is still 405.3 MB. Free memory was 315.6 MB in the beginning and 312.9 MB in the end (delta: 2.6 MB). Peak memory consumption was 2.6 MB. Max. memory is 5.3 GB. [2018-04-10 13:43:32,832 INFO L168 Benchmark]: RCFGBuilder took 440.20 ms. Allocated memory was 405.3 MB in the beginning and 616.6 MB in the end (delta: 211.3 MB). Free memory was 312.9 MB in the beginning and 537.5 MB in the end (delta: -224.6 MB). Peak memory consumption was 23.2 MB. Max. memory is 5.3 GB. [2018-04-10 13:43:32,832 INFO L168 Benchmark]: TraceAbstraction took 196415.39 ms. Allocated memory was 616.6 MB in the beginning and 1.5 GB in the end (delta: 841.5 MB). Free memory was 535.8 MB in the beginning and 974.2 MB in the end (delta: -438.4 MB). Peak memory consumption was 403.1 MB. Max. memory is 5.3 GB. [2018-04-10 13:43:32,833 INFO L344 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.12 ms. Allocated memory is still 405.3 MB. Free memory is still 368.4 MB. There was no memory consumed. Max. memory is 5.3 GB. * CACSL2BoogieTranslator took 239.45 ms. Allocated memory is still 405.3 MB. Free memory was 342.2 MB in the beginning and 315.6 MB in the end (delta: 26.6 MB). Peak memory consumption was 26.6 MB. Max. memory is 5.3 GB. * Boogie Preprocessor took 42.50 ms. Allocated memory is still 405.3 MB. Free memory was 315.6 MB in the beginning and 312.9 MB in the end (delta: 2.6 MB). Peak memory consumption was 2.6 MB. Max. memory is 5.3 GB. * RCFGBuilder took 440.20 ms. Allocated memory was 405.3 MB in the beginning and 616.6 MB in the end (delta: 211.3 MB). Free memory was 312.9 MB in the beginning and 537.5 MB in the end (delta: -224.6 MB). Peak memory consumption was 23.2 MB. Max. memory is 5.3 GB. * TraceAbstraction took 196415.39 ms. Allocated memory was 616.6 MB in the beginning and 1.5 GB in the end (delta: 841.5 MB). Free memory was 535.8 MB in the beginning and 974.2 MB in the end (delta: -438.4 MB). Peak memory consumption was 403.1 MB. Max. memory is 5.3 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - TimeoutResultAtElement [Line: 560]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 560). Cancelled while BasicCegarLoop was constructing difference of abstraction (261states) and interpolant automaton (currently 10 states, 36 states before enhancement), while ReachableStatesComputation was computing reachable states (17 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 560]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 560). Cancelled while BasicCegarLoop was constructing difference of abstraction (261states) and interpolant automaton (currently 10 states, 36 states before enhancement), while ReachableStatesComputation was computing reachable states (17 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 559]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 559). Cancelled while BasicCegarLoop was constructing difference of abstraction (261states) and interpolant automaton (currently 10 states, 36 states before enhancement), while ReachableStatesComputation was computing reachable states (17 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 560]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 560). Cancelled while BasicCegarLoop was constructing difference of abstraction (261states) and interpolant automaton (currently 10 states, 36 states before enhancement), while ReachableStatesComputation was computing reachable states (17 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 562]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 562). Cancelled while BasicCegarLoop was constructing difference of abstraction (261states) and interpolant automaton (currently 10 states, 36 states before enhancement), while ReachableStatesComputation was computing reachable states (17 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 560]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 560). Cancelled while BasicCegarLoop was constructing difference of abstraction (261states) and interpolant automaton (currently 10 states, 36 states before enhancement), while ReachableStatesComputation was computing reachable states (17 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 559]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 559). Cancelled while BasicCegarLoop was constructing difference of abstraction (261states) and interpolant automaton (currently 10 states, 36 states before enhancement), while ReachableStatesComputation was computing reachable states (17 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 562]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 562). Cancelled while BasicCegarLoop was constructing difference of abstraction (261states) and interpolant automaton (currently 10 states, 36 states before enhancement), while ReachableStatesComputation was computing reachable states (17 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 577]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 577). Cancelled while BasicCegarLoop was constructing difference of abstraction (261states) and interpolant automaton (currently 10 states, 36 states before enhancement), while ReachableStatesComputation was computing reachable states (17 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 579]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 579). Cancelled while BasicCegarLoop was constructing difference of abstraction (261states) and interpolant automaton (currently 10 states, 36 states before enhancement), while ReachableStatesComputation was computing reachable states (17 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 571]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 571). Cancelled while BasicCegarLoop was constructing difference of abstraction (261states) and interpolant automaton (currently 10 states, 36 states before enhancement), while ReachableStatesComputation was computing reachable states (17 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 580]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 580). Cancelled while BasicCegarLoop was constructing difference of abstraction (261states) and interpolant automaton (currently 10 states, 36 states before enhancement), while ReachableStatesComputation was computing reachable states (17 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 578]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 578). Cancelled while BasicCegarLoop was constructing difference of abstraction (261states) and interpolant automaton (currently 10 states, 36 states before enhancement), while ReachableStatesComputation was computing reachable states (17 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 579]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 579). Cancelled while BasicCegarLoop was constructing difference of abstraction (261states) and interpolant automaton (currently 10 states, 36 states before enhancement), while ReachableStatesComputation was computing reachable states (17 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 571]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 571). Cancelled while BasicCegarLoop was constructing difference of abstraction (261states) and interpolant automaton (currently 10 states, 36 states before enhancement), while ReachableStatesComputation was computing reachable states (17 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 570]: Timeout (TraceAbstraction) Unable to prove that all allocated memory was freed (line 570). Cancelled while BasicCegarLoop was constructing difference of abstraction (261states) and interpolant automaton (currently 10 states, 36 states before enhancement), while ReachableStatesComputation was computing reachable states (17 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 576]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 576). Cancelled while BasicCegarLoop was constructing difference of abstraction (261states) and interpolant automaton (currently 10 states, 36 states before enhancement), while ReachableStatesComputation was computing reachable states (17 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 577]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 577). Cancelled while BasicCegarLoop was constructing difference of abstraction (261states) and interpolant automaton (currently 10 states, 36 states before enhancement), while ReachableStatesComputation was computing reachable states (17 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 578]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 578). Cancelled while BasicCegarLoop was constructing difference of abstraction (261states) and interpolant automaton (currently 10 states, 36 states before enhancement), while ReachableStatesComputation was computing reachable states (17 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 578]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 578). Cancelled while BasicCegarLoop was constructing difference of abstraction (261states) and interpolant automaton (currently 10 states, 36 states before enhancement), while ReachableStatesComputation was computing reachable states (17 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 578]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 578). Cancelled while BasicCegarLoop was constructing difference of abstraction (261states) and interpolant automaton (currently 10 states, 36 states before enhancement), while ReachableStatesComputation was computing reachable states (17 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 580]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 580). Cancelled while BasicCegarLoop was constructing difference of abstraction (261states) and interpolant automaton (currently 10 states, 36 states before enhancement), while ReachableStatesComputation was computing reachable states (17 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 576]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 576). Cancelled while BasicCegarLoop was constructing difference of abstraction (261states) and interpolant automaton (currently 10 states, 36 states before enhancement), while ReachableStatesComputation was computing reachable states (17 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 577]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 577). Cancelled while BasicCegarLoop was constructing difference of abstraction (261states) and interpolant automaton (currently 10 states, 36 states before enhancement), while ReachableStatesComputation was computing reachable states (17 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 579]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 579). Cancelled while BasicCegarLoop was constructing difference of abstraction (261states) and interpolant automaton (currently 10 states, 36 states before enhancement), while ReachableStatesComputation was computing reachable states (17 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 577]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 577). Cancelled while BasicCegarLoop was constructing difference of abstraction (261states) and interpolant automaton (currently 10 states, 36 states before enhancement), while ReachableStatesComputation was computing reachable states (17 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 579]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 579). Cancelled while BasicCegarLoop was constructing difference of abstraction (261states) and interpolant automaton (currently 10 states, 36 states before enhancement), while ReachableStatesComputation was computing reachable states (17 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 568]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 568). Cancelled while BasicCegarLoop was constructing difference of abstraction (261states) and interpolant automaton (currently 10 states, 36 states before enhancement), while ReachableStatesComputation was computing reachable states (17 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 566]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 566). Cancelled while BasicCegarLoop was constructing difference of abstraction (261states) and interpolant automaton (currently 10 states, 36 states before enhancement), while ReachableStatesComputation was computing reachable states (17 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 566]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 566). Cancelled while BasicCegarLoop was constructing difference of abstraction (261states) and interpolant automaton (currently 10 states, 36 states before enhancement), while ReachableStatesComputation was computing reachable states (17 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 566]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 566). Cancelled while BasicCegarLoop was constructing difference of abstraction (261states) and interpolant automaton (currently 10 states, 36 states before enhancement), while ReachableStatesComputation was computing reachable states (17 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 566]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 566). Cancelled while BasicCegarLoop was constructing difference of abstraction (261states) and interpolant automaton (currently 10 states, 36 states before enhancement), while ReachableStatesComputation was computing reachable states (17 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 568]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 568). Cancelled while BasicCegarLoop was constructing difference of abstraction (261states) and interpolant automaton (currently 10 states, 36 states before enhancement), while ReachableStatesComputation was computing reachable states (17 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 567]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 567). Cancelled while BasicCegarLoop was constructing difference of abstraction (261states) and interpolant automaton (currently 10 states, 36 states before enhancement), while ReachableStatesComputation was computing reachable states (17 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 567]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 567). Cancelled while BasicCegarLoop was constructing difference of abstraction (261states) and interpolant automaton (currently 10 states, 36 states before enhancement), while ReachableStatesComputation was computing reachable states (17 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 544]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 544). Cancelled while BasicCegarLoop was constructing difference of abstraction (261states) and interpolant automaton (currently 10 states, 36 states before enhancement), while ReachableStatesComputation was computing reachable states (17 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 547]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 547). Cancelled while BasicCegarLoop was constructing difference of abstraction (261states) and interpolant automaton (currently 10 states, 36 states before enhancement), while ReachableStatesComputation was computing reachable states (17 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 552]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 552). Cancelled while BasicCegarLoop was constructing difference of abstraction (261states) and interpolant automaton (currently 10 states, 36 states before enhancement), while ReachableStatesComputation was computing reachable states (17 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 550]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 550). Cancelled while BasicCegarLoop was constructing difference of abstraction (261states) and interpolant automaton (currently 10 states, 36 states before enhancement), while ReachableStatesComputation was computing reachable states (17 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 547]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 547). Cancelled while BasicCegarLoop was constructing difference of abstraction (261states) and interpolant automaton (currently 10 states, 36 states before enhancement), while ReachableStatesComputation was computing reachable states (17 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 547]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 547). Cancelled while BasicCegarLoop was constructing difference of abstraction (261states) and interpolant automaton (currently 10 states, 36 states before enhancement), while ReachableStatesComputation was computing reachable states (17 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 544]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 544). Cancelled while BasicCegarLoop was constructing difference of abstraction (261states) and interpolant automaton (currently 10 states, 36 states before enhancement), while ReachableStatesComputation was computing reachable states (17 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 550]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 550). Cancelled while BasicCegarLoop was constructing difference of abstraction (261states) and interpolant automaton (currently 10 states, 36 states before enhancement), while ReachableStatesComputation was computing reachable states (17 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 552]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 552). Cancelled while BasicCegarLoop was constructing difference of abstraction (261states) and interpolant automaton (currently 10 states, 36 states before enhancement), while ReachableStatesComputation was computing reachable states (17 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 547]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 547). Cancelled while BasicCegarLoop was constructing difference of abstraction (261states) and interpolant automaton (currently 10 states, 36 states before enhancement), while ReachableStatesComputation was computing reachable states (17 states constructedinput type IntersectNwa). - StatisticsResult: Ultimate Automizer benchmark data CFG has 8 procedures, 133 locations, 45 error locations. TIMEOUT Result, 196.3s OverallTime, 57 OverallIterations, 6 TraceHistogramMax, 162.7s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 5078 SDtfs, 4865 SDslu, 24022 SDs, 0 SdLazy, 26173 SolverSat, 1043 SolverUnsat, 95 SolverUnknown, 0 SolverNotchecked, 130.1s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 1987 GetRequests, 824 SyntacticMatches, 87 SemanticMatches, 1076 ConstructedPredicates, 5 IntricatePredicates, 0 DeprecatedPredicates, 9559 ImplicationChecksByTransitivity, 57.0s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=296occurred in iteration=50, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.2s AutomataMinimizationTime, 56 MinimizatonAttempts, 886 StatesRemovedByMinimization, 49 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.1s SsaConstructionTime, 0.6s SatisfiabilityAnalysisTime, 31.7s InterpolantComputationTime, 3314 NumberOfCodeBlocks, 3314 NumberOfCodeBlocksAsserted, 71 NumberOfCheckSat, 3243 ConstructedInterpolants, 92 QuantifiedInterpolants, 2070956 SizeOfPredicates, 186 NumberOfNonLiveVariables, 3874 ConjunctsInSsa, 591 ConjunctsInUnsatCore, 71 InterpolantComputations, 43 PerfectInterpolantSequences, 222/736 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: Timeout Written .csv to /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/optional_data_creation_test04_false-valid-memtrack.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Camel.epf_AutomizerC.xml/Csv-Benchmark-0-2018-04-10_13-43-32-839.csv Written .csv to /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/optional_data_creation_test04_false-valid-memtrack.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Camel.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-0-2018-04-10_13-43-32-839.csv Completed graceful shutdown