java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/cade18-smtinterpol/svcomp-DerefFreeMemtrack-32bit-Automizer_Camel.epf -i ../../../trunk/examples/svcomp/memsafety-ext2/optional_data_creation_test04_true-valid-memsafety.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-666feb3-m [2018-04-10 13:45:52,270 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-04-10 13:45:52,271 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-04-10 13:45:52,281 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-04-10 13:45:52,282 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-04-10 13:45:52,282 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-04-10 13:45:52,283 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-04-10 13:45:52,285 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-04-10 13:45:52,286 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-04-10 13:45:52,287 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-04-10 13:45:52,288 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-04-10 13:45:52,288 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-04-10 13:45:52,289 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-04-10 13:45:52,290 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-04-10 13:45:52,290 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-04-10 13:45:52,292 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-04-10 13:45:52,293 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-04-10 13:45:52,295 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-04-10 13:45:52,296 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-04-10 13:45:52,297 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-04-10 13:45:52,298 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2018-04-10 13:45:52,303 INFO L98 SettingsManager]: Beginning loading settings from /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/cade18-smtinterpol/svcomp-DerefFreeMemtrack-32bit-Automizer_Camel.epf [2018-04-10 13:45:52,314 INFO L110 SettingsManager]: Loading preferences was successful [2018-04-10 13:45:52,315 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-04-10 13:45:52,316 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-04-10 13:45:52,316 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-04-10 13:45:52,316 INFO L133 SettingsManager]: * Use SBE=true [2018-04-10 13:45:52,316 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-04-10 13:45:52,316 INFO L133 SettingsManager]: * sizeof long=4 [2018-04-10 13:45:52,316 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-04-10 13:45:52,317 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-04-10 13:45:52,317 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-04-10 13:45:52,317 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-04-10 13:45:52,317 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-04-10 13:45:52,317 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-04-10 13:45:52,317 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-04-10 13:45:52,317 INFO L133 SettingsManager]: * sizeof long double=12 [2018-04-10 13:45:52,318 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-04-10 13:45:52,318 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-04-10 13:45:52,318 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-04-10 13:45:52,318 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-04-10 13:45:52,318 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-04-10 13:45:52,318 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-04-10 13:45:52,319 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-04-10 13:45:52,319 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-04-10 13:45:52,319 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL [2018-04-10 13:45:52,348 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-04-10 13:45:52,359 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully (re)initialized [2018-04-10 13:45:52,363 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-04-10 13:45:52,364 INFO L271 PluginConnector]: Initializing CDTParser... [2018-04-10 13:45:52,365 INFO L276 PluginConnector]: CDTParser initialized [2018-04-10 13:45:52,365 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/memsafety-ext2/optional_data_creation_test04_true-valid-memsafety.i [2018-04-10 13:45:52,680 INFO L225 CDTParser]: Created temporary CDT project at /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/data/FLAGe4cc8267b [2018-04-10 13:45:52,808 INFO L287 CDTParser]: IsIndexed: true [2018-04-10 13:45:52,808 INFO L288 CDTParser]: Found 1 translation units. [2018-04-10 13:45:52,809 INFO L168 CDTParser]: Scanning optional_data_creation_test04_true-valid-memsafety.i [2018-04-10 13:45:52,820 INFO L210 ultiparseSymbolTable]: Include resolver: [2018-04-10 13:45:52,820 INFO L215 ultiparseSymbolTable]: [2018-04-10 13:45:52,821 INFO L218 ultiparseSymbolTable]: Function table: [2018-04-10 13:45:52,821 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeData ('freeData') in optional_data_creation_test04_true-valid-memsafety.i [2018-04-10 13:45:52,821 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____bswap_64 ('__bswap_64') in optional_data_creation_test04_true-valid-memsafety.i [2018-04-10 13:45:52,821 INFO L221 ultiparseSymbolTable]: Function definition of null ('main') in optional_data_creation_test04_true-valid-memsafety.i [2018-04-10 13:45:52,821 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____bswap_32 ('__bswap_32') in optional_data_creation_test04_true-valid-memsafety.i [2018-04-10 13:45:52,821 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_data ('create_data') in optional_data_creation_test04_true-valid-memsafety.i [2018-04-10 13:45:52,821 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append ('append') in optional_data_creation_test04_true-valid-memsafety.i [2018-04-10 13:45:52,821 INFO L227 ultiparseSymbolTable]: Global variable table: [2018-04-10 13:45:52,821 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____useconds_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-10 13:45:52,821 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____u_int in optional_data_creation_test04_true-valid-memsafety.i [2018-04-10 13:45:52,821 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__pthread_condattr_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-10 13:45:52,821 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__dev_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-10 13:45:52,821 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____uint8_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-10 13:45:52,821 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____key_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-10 13:45:52,821 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__uint in optional_data_creation_test04_true-valid-memsafety.i [2018-04-10 13:45:52,821 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__loff_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-10 13:45:52,821 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__nlink_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-10 13:45:52,821 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__pthread_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-10 13:45:52,821 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__u_int8_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-10 13:45:52,821 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__quad_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-10 13:45:52,822 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____fd_mask in optional_data_creation_test04_true-valid-memsafety.i [2018-04-10 13:45:52,822 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____int64_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-10 13:45:52,822 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____clockid_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-10 13:45:52,822 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__clockid_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-10 13:45:52,822 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____sig_atomic_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-10 13:45:52,822 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__pthread_attr_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-10 13:45:52,822 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__wchar_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-10 13:45:52,822 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__suseconds_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-10 13:45:52,822 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____uint64_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-10 13:45:52,822 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__pthread_once_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-10 13:45:52,822 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____fsword_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-10 13:45:52,822 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____syscall_slong_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-10 13:45:52,822 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__fd_mask in optional_data_creation_test04_true-valid-memsafety.i [2018-04-10 13:45:52,822 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____blkcnt_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-10 13:45:52,822 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____uid_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-10 13:45:52,822 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__ssize_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-10 13:45:52,822 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__u_int16_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-10 13:45:52,823 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__pthread_cond_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-10 13:45:52,823 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__pthread_spinlock_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-10 13:45:52,823 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____ino64_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-10 13:45:52,823 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____sigset_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-10 13:45:52,823 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____ino_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-10 13:45:52,823 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__id_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-10 13:45:52,823 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____blkcnt64_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-10 13:45:52,823 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__pthread_rwlockattr_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-10 13:45:52,823 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____int16_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-10 13:45:52,823 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__u_char in optional_data_creation_test04_true-valid-memsafety.i [2018-04-10 13:45:52,823 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__off_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-10 13:45:52,823 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____off_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-10 13:45:52,824 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__blkcnt_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-10 13:45:52,824 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__fsfilcnt_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-10 13:45:52,824 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____ssize_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-10 13:45:52,824 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__timer_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-10 13:45:52,824 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__pthread_barrier_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-10 13:45:52,824 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____nlink_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-10 13:45:52,824 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__int32_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-10 13:45:52,824 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____socklen_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-10 13:45:52,824 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__pthread_mutexattr_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-10 13:45:52,824 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____pid_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-10 13:45:52,824 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__key_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-10 13:45:52,825 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____u_quad_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-10 13:45:52,825 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____off64_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-10 13:45:52,825 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__u_int32_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-10 13:45:52,825 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____fsblkcnt64_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-10 13:45:52,825 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____u_char in optional_data_creation_test04_true-valid-memsafety.i [2018-04-10 13:45:52,825 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____gid_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-10 13:45:52,825 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____quad_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-10 13:45:52,825 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____syscall_ulong_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-10 13:45:52,825 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____id_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-10 13:45:52,825 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____timer_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-10 13:45:52,826 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__u_int in optional_data_creation_test04_true-valid-memsafety.i [2018-04-10 13:45:52,826 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____rlim64_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-10 13:45:52,826 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____uint32_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-10 13:45:52,826 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__fsblkcnt_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-10 13:45:52,826 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____suseconds_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-10 13:45:52,826 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__pthread_rwlock_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-10 13:45:52,826 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__div_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-10 13:45:52,826 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__time_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-10 13:45:52,826 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____pthread_slist_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-10 13:45:52,826 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____int32_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-10 13:45:52,826 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____dev_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-10 13:45:52,826 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____fsblkcnt_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-10 13:45:52,827 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__mode_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-10 13:45:52,827 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__int16_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-10 13:45:52,827 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__pthread_key_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-10 13:45:52,827 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__Data in optional_data_creation_test04_true-valid-memsafety.i [2018-04-10 13:45:52,827 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____caddr_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-10 13:45:52,827 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__fd_set in optional_data_creation_test04_true-valid-memsafety.i [2018-04-10 13:45:52,827 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__lldiv_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-10 13:45:52,827 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____rlim_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-10 13:45:52,827 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__uid_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-10 13:45:52,827 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____u_short in optional_data_creation_test04_true-valid-memsafety.i [2018-04-10 13:45:52,827 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____intptr_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-10 13:45:52,828 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__size_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-10 13:45:52,828 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____mode_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-10 13:45:52,828 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__blksize_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-10 13:45:52,828 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__caddr_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-10 13:45:52,828 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____u_long in optional_data_creation_test04_true-valid-memsafety.i [2018-04-10 13:45:52,828 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__sigset_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-10 13:45:52,828 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__ldiv_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-10 13:45:52,828 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__u_short in optional_data_creation_test04_true-valid-memsafety.i [2018-04-10 13:45:52,828 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__ino_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-10 13:45:52,828 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__daddr_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-10 13:45:52,828 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__u_int64_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-10 13:45:52,828 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____fsid_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-10 13:45:52,828 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__gid_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-10 13:45:52,828 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__register_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-10 13:45:52,828 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__ulong in optional_data_creation_test04_true-valid-memsafety.i [2018-04-10 13:45:52,828 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__pthread_barrierattr_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-10 13:45:52,828 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____int8_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-10 13:45:52,828 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__u_long in optional_data_creation_test04_true-valid-memsafety.i [2018-04-10 13:45:52,828 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__pid_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-10 13:45:52,828 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____fsfilcnt64_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-10 13:45:52,829 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__clock_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-10 13:45:52,829 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____fsfilcnt_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-10 13:45:52,829 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__pthread_mutex_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-10 13:45:52,829 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____time_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-10 13:45:52,829 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____loff_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-10 13:45:52,829 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__fsid_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-10 13:45:52,829 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__u_quad_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-10 13:45:52,829 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__ushort in optional_data_creation_test04_true-valid-memsafety.i [2018-04-10 13:45:52,829 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____blksize_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-10 13:45:52,829 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____clock_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-10 13:45:52,829 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__int8_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-10 13:45:52,829 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____uint16_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-10 13:45:52,829 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____daddr_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-10 13:45:52,829 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__int64_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-10 13:45:52,829 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____qaddr_t in optional_data_creation_test04_true-valid-memsafety.i [2018-04-10 13:45:52,854 INFO L330 CDTParser]: Deleted temporary CDT project at /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/data/FLAGe4cc8267b [2018-04-10 13:45:52,858 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-04-10 13:45:52,859 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-04-10 13:45:52,859 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-04-10 13:45:52,859 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-04-10 13:45:52,863 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-04-10 13:45:52,863 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 10.04 01:45:52" (1/1) ... [2018-04-10 13:45:52,865 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@7aff9c5f and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.04 01:45:52, skipping insertion in model container [2018-04-10 13:45:52,865 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 10.04 01:45:52" (1/1) ... [2018-04-10 13:45:52,876 INFO L167 Dispatcher]: Using SV-COMP mode [2018-04-10 13:45:52,897 INFO L167 Dispatcher]: Using SV-COMP mode [2018-04-10 13:45:53,020 INFO L175 PostProcessor]: Settings: Checked method=main [2018-04-10 13:45:53,057 INFO L175 PostProcessor]: Settings: Checked method=main [2018-04-10 13:45:53,063 INFO L100 SccComputation]: Graph consists of 0 InCaSumBalls and 120 non ball SCCs. Number of states in SCCs 120. [2018-04-10 13:45:53,098 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.04 01:45:53 WrapperNode [2018-04-10 13:45:53,098 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-04-10 13:45:53,099 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-04-10 13:45:53,099 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-04-10 13:45:53,099 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-04-10 13:45:53,107 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.04 01:45:53" (1/1) ... [2018-04-10 13:45:53,107 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.04 01:45:53" (1/1) ... [2018-04-10 13:45:53,118 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.04 01:45:53" (1/1) ... [2018-04-10 13:45:53,118 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.04 01:45:53" (1/1) ... [2018-04-10 13:45:53,127 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.04 01:45:53" (1/1) ... [2018-04-10 13:45:53,131 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.04 01:45:53" (1/1) ... [2018-04-10 13:45:53,133 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.04 01:45:53" (1/1) ... [2018-04-10 13:45:53,137 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-04-10 13:45:53,137 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-04-10 13:45:53,137 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-04-10 13:45:53,138 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-04-10 13:45:53,138 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.04 01:45:53" (1/1) ... No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-04-10 13:45:53,229 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-04-10 13:45:53,229 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-04-10 13:45:53,229 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____bswap_32 [2018-04-10 13:45:53,229 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____bswap_64 [2018-04-10 13:45:53,229 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_data [2018-04-10 13:45:53,229 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeData [2018-04-10 13:45:53,229 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append [2018-04-10 13:45:53,229 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-04-10 13:45:53,230 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_error [2018-04-10 13:45:53,230 INFO L128 BoogieDeclarations]: Found specification of procedure __ctype_get_mb_cur_max [2018-04-10 13:45:53,230 INFO L128 BoogieDeclarations]: Found specification of procedure atof [2018-04-10 13:45:53,230 INFO L128 BoogieDeclarations]: Found specification of procedure atoi [2018-04-10 13:45:53,230 INFO L128 BoogieDeclarations]: Found specification of procedure atol [2018-04-10 13:45:53,230 INFO L128 BoogieDeclarations]: Found specification of procedure atoll [2018-04-10 13:45:53,230 INFO L128 BoogieDeclarations]: Found specification of procedure strtod [2018-04-10 13:45:53,230 INFO L128 BoogieDeclarations]: Found specification of procedure strtof [2018-04-10 13:45:53,230 INFO L128 BoogieDeclarations]: Found specification of procedure strtold [2018-04-10 13:45:53,230 INFO L128 BoogieDeclarations]: Found specification of procedure strtol [2018-04-10 13:45:53,231 INFO L128 BoogieDeclarations]: Found specification of procedure strtoul [2018-04-10 13:45:53,231 INFO L128 BoogieDeclarations]: Found specification of procedure strtoq [2018-04-10 13:45:53,231 INFO L128 BoogieDeclarations]: Found specification of procedure strtouq [2018-04-10 13:45:53,231 INFO L128 BoogieDeclarations]: Found specification of procedure strtoll [2018-04-10 13:45:53,231 INFO L128 BoogieDeclarations]: Found specification of procedure strtoull [2018-04-10 13:45:53,231 INFO L128 BoogieDeclarations]: Found specification of procedure l64a [2018-04-10 13:45:53,231 INFO L128 BoogieDeclarations]: Found specification of procedure a64l [2018-04-10 13:45:53,231 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____bswap_32 [2018-04-10 13:45:53,232 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____bswap_64 [2018-04-10 13:45:53,232 INFO L128 BoogieDeclarations]: Found specification of procedure select [2018-04-10 13:45:53,232 INFO L128 BoogieDeclarations]: Found specification of procedure pselect [2018-04-10 13:45:53,232 INFO L128 BoogieDeclarations]: Found specification of procedure gnu_dev_major [2018-04-10 13:45:53,232 INFO L128 BoogieDeclarations]: Found specification of procedure gnu_dev_minor [2018-04-10 13:45:53,232 INFO L128 BoogieDeclarations]: Found specification of procedure gnu_dev_makedev [2018-04-10 13:45:53,232 INFO L128 BoogieDeclarations]: Found specification of procedure random [2018-04-10 13:45:53,232 INFO L128 BoogieDeclarations]: Found specification of procedure srandom [2018-04-10 13:45:53,233 INFO L128 BoogieDeclarations]: Found specification of procedure initstate [2018-04-10 13:45:53,233 INFO L128 BoogieDeclarations]: Found specification of procedure setstate [2018-04-10 13:45:53,233 INFO L128 BoogieDeclarations]: Found specification of procedure random_r [2018-04-10 13:45:53,233 INFO L128 BoogieDeclarations]: Found specification of procedure srandom_r [2018-04-10 13:45:53,233 INFO L128 BoogieDeclarations]: Found specification of procedure initstate_r [2018-04-10 13:45:53,233 INFO L128 BoogieDeclarations]: Found specification of procedure setstate_r [2018-04-10 13:45:53,233 INFO L128 BoogieDeclarations]: Found specification of procedure rand [2018-04-10 13:45:53,233 INFO L128 BoogieDeclarations]: Found specification of procedure srand [2018-04-10 13:45:53,233 INFO L128 BoogieDeclarations]: Found specification of procedure rand_r [2018-04-10 13:45:53,233 INFO L128 BoogieDeclarations]: Found specification of procedure drand48 [2018-04-10 13:45:53,234 INFO L128 BoogieDeclarations]: Found specification of procedure erand48 [2018-04-10 13:45:53,234 INFO L128 BoogieDeclarations]: Found specification of procedure lrand48 [2018-04-10 13:45:53,234 INFO L128 BoogieDeclarations]: Found specification of procedure nrand48 [2018-04-10 13:45:53,234 INFO L128 BoogieDeclarations]: Found specification of procedure mrand48 [2018-04-10 13:45:53,234 INFO L128 BoogieDeclarations]: Found specification of procedure jrand48 [2018-04-10 13:45:53,234 INFO L128 BoogieDeclarations]: Found specification of procedure srand48 [2018-04-10 13:45:53,234 INFO L128 BoogieDeclarations]: Found specification of procedure seed48 [2018-04-10 13:45:53,234 INFO L128 BoogieDeclarations]: Found specification of procedure lcong48 [2018-04-10 13:45:53,234 INFO L128 BoogieDeclarations]: Found specification of procedure drand48_r [2018-04-10 13:45:53,235 INFO L128 BoogieDeclarations]: Found specification of procedure erand48_r [2018-04-10 13:45:53,235 INFO L128 BoogieDeclarations]: Found specification of procedure lrand48_r [2018-04-10 13:45:53,235 INFO L128 BoogieDeclarations]: Found specification of procedure nrand48_r [2018-04-10 13:45:53,235 INFO L128 BoogieDeclarations]: Found specification of procedure mrand48_r [2018-04-10 13:45:53,235 INFO L128 BoogieDeclarations]: Found specification of procedure jrand48_r [2018-04-10 13:45:53,235 INFO L128 BoogieDeclarations]: Found specification of procedure srand48_r [2018-04-10 13:45:53,235 INFO L128 BoogieDeclarations]: Found specification of procedure seed48_r [2018-04-10 13:45:53,235 INFO L128 BoogieDeclarations]: Found specification of procedure lcong48_r [2018-04-10 13:45:53,235 INFO L128 BoogieDeclarations]: Found specification of procedure malloc [2018-04-10 13:45:53,236 INFO L128 BoogieDeclarations]: Found specification of procedure calloc [2018-04-10 13:45:53,236 INFO L128 BoogieDeclarations]: Found specification of procedure realloc [2018-04-10 13:45:53,236 INFO L128 BoogieDeclarations]: Found specification of procedure free [2018-04-10 13:45:53,236 INFO L128 BoogieDeclarations]: Found specification of procedure cfree [2018-04-10 13:45:53,236 INFO L128 BoogieDeclarations]: Found specification of procedure alloca [2018-04-10 13:45:53,236 INFO L128 BoogieDeclarations]: Found specification of procedure valloc [2018-04-10 13:45:53,236 INFO L128 BoogieDeclarations]: Found specification of procedure posix_memalign [2018-04-10 13:45:53,236 INFO L128 BoogieDeclarations]: Found specification of procedure aligned_alloc [2018-04-10 13:45:53,236 INFO L128 BoogieDeclarations]: Found specification of procedure abort [2018-04-10 13:45:53,237 INFO L128 BoogieDeclarations]: Found specification of procedure atexit [2018-04-10 13:45:53,237 INFO L128 BoogieDeclarations]: Found specification of procedure at_quick_exit [2018-04-10 13:45:53,237 INFO L128 BoogieDeclarations]: Found specification of procedure on_exit [2018-04-10 13:45:53,237 INFO L128 BoogieDeclarations]: Found specification of procedure exit [2018-04-10 13:45:53,237 INFO L128 BoogieDeclarations]: Found specification of procedure quick_exit [2018-04-10 13:45:53,237 INFO L128 BoogieDeclarations]: Found specification of procedure _Exit [2018-04-10 13:45:53,237 INFO L128 BoogieDeclarations]: Found specification of procedure getenv [2018-04-10 13:45:53,237 INFO L128 BoogieDeclarations]: Found specification of procedure putenv [2018-04-10 13:45:53,237 INFO L128 BoogieDeclarations]: Found specification of procedure setenv [2018-04-10 13:45:53,237 INFO L128 BoogieDeclarations]: Found specification of procedure unsetenv [2018-04-10 13:45:53,238 INFO L128 BoogieDeclarations]: Found specification of procedure clearenv [2018-04-10 13:45:53,238 INFO L128 BoogieDeclarations]: Found specification of procedure mktemp [2018-04-10 13:45:53,238 INFO L128 BoogieDeclarations]: Found specification of procedure mkstemp [2018-04-10 13:45:53,238 INFO L128 BoogieDeclarations]: Found specification of procedure mkstemps [2018-04-10 13:45:53,238 INFO L128 BoogieDeclarations]: Found specification of procedure mkdtemp [2018-04-10 13:45:53,238 INFO L128 BoogieDeclarations]: Found specification of procedure system [2018-04-10 13:45:53,238 INFO L128 BoogieDeclarations]: Found specification of procedure realpath [2018-04-10 13:45:53,238 INFO L128 BoogieDeclarations]: Found specification of procedure bsearch [2018-04-10 13:45:53,238 INFO L128 BoogieDeclarations]: Found specification of procedure qsort [2018-04-10 13:45:53,238 INFO L128 BoogieDeclarations]: Found specification of procedure abs [2018-04-10 13:45:53,239 INFO L128 BoogieDeclarations]: Found specification of procedure labs [2018-04-10 13:45:53,239 INFO L128 BoogieDeclarations]: Found specification of procedure llabs [2018-04-10 13:45:53,239 INFO L128 BoogieDeclarations]: Found specification of procedure div [2018-04-10 13:45:53,239 INFO L128 BoogieDeclarations]: Found specification of procedure ldiv [2018-04-10 13:45:53,239 INFO L128 BoogieDeclarations]: Found specification of procedure lldiv [2018-04-10 13:45:53,239 INFO L128 BoogieDeclarations]: Found specification of procedure ecvt [2018-04-10 13:45:53,239 INFO L128 BoogieDeclarations]: Found specification of procedure fcvt [2018-04-10 13:45:53,239 INFO L128 BoogieDeclarations]: Found specification of procedure gcvt [2018-04-10 13:45:53,239 INFO L128 BoogieDeclarations]: Found specification of procedure qecvt [2018-04-10 13:45:53,240 INFO L128 BoogieDeclarations]: Found specification of procedure qfcvt [2018-04-10 13:45:53,240 INFO L128 BoogieDeclarations]: Found specification of procedure qgcvt [2018-04-10 13:45:53,240 INFO L128 BoogieDeclarations]: Found specification of procedure ecvt_r [2018-04-10 13:45:53,240 INFO L128 BoogieDeclarations]: Found specification of procedure fcvt_r [2018-04-10 13:45:53,240 INFO L128 BoogieDeclarations]: Found specification of procedure qecvt_r [2018-04-10 13:45:53,240 INFO L128 BoogieDeclarations]: Found specification of procedure qfcvt_r [2018-04-10 13:45:53,240 INFO L128 BoogieDeclarations]: Found specification of procedure mblen [2018-04-10 13:45:53,240 INFO L128 BoogieDeclarations]: Found specification of procedure mbtowc [2018-04-10 13:45:53,240 INFO L128 BoogieDeclarations]: Found specification of procedure wctomb [2018-04-10 13:45:53,240 INFO L128 BoogieDeclarations]: Found specification of procedure mbstowcs [2018-04-10 13:45:53,241 INFO L128 BoogieDeclarations]: Found specification of procedure wcstombs [2018-04-10 13:45:53,241 INFO L128 BoogieDeclarations]: Found specification of procedure rpmatch [2018-04-10 13:45:53,241 INFO L128 BoogieDeclarations]: Found specification of procedure getsubopt [2018-04-10 13:45:53,241 INFO L128 BoogieDeclarations]: Found specification of procedure getloadavg [2018-04-10 13:45:53,241 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2018-04-10 13:45:53,241 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_data [2018-04-10 13:45:53,241 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-04-10 13:45:53,241 INFO L128 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2018-04-10 13:45:53,241 INFO L128 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2018-04-10 13:45:53,241 INFO L128 BoogieDeclarations]: Found specification of procedure write~int [2018-04-10 13:45:53,242 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeData [2018-04-10 13:45:53,242 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-04-10 13:45:53,242 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append [2018-04-10 13:45:53,242 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-04-10 13:45:53,242 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-04-10 13:45:53,242 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-04-10 13:45:53,242 INFO L128 BoogieDeclarations]: Found specification of procedure write~unchecked~int [2018-04-10 13:45:53,242 INFO L128 BoogieDeclarations]: Found specification of procedure read~int [2018-04-10 13:45:53,597 INFO L259 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-04-10 13:45:53,597 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 10.04 01:45:53 BoogieIcfgContainer [2018-04-10 13:45:53,597 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-04-10 13:45:53,598 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-04-10 13:45:53,598 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-04-10 13:45:53,600 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-04-10 13:45:53,600 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 10.04 01:45:52" (1/3) ... [2018-04-10 13:45:53,601 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2254d370 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 10.04 01:45:53, skipping insertion in model container [2018-04-10 13:45:53,601 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.04 01:45:53" (2/3) ... [2018-04-10 13:45:53,601 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2254d370 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 10.04 01:45:53, skipping insertion in model container [2018-04-10 13:45:53,601 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 10.04 01:45:53" (3/3) ... [2018-04-10 13:45:53,603 INFO L107 eAbstractionObserver]: Analyzing ICFG optional_data_creation_test04_true-valid-memsafety.i [2018-04-10 13:45:53,609 INFO L131 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-04-10 13:45:53,614 INFO L143 ceAbstractionStarter]: Appying trace abstraction to program that has 45 error locations. [2018-04-10 13:45:53,640 INFO L128 ementStrategyFactory]: Using default assertion order modulation [2018-04-10 13:45:53,640 INFO L369 AbstractCegarLoop]: Interprodecural is true [2018-04-10 13:45:53,640 INFO L370 AbstractCegarLoop]: Hoare is false [2018-04-10 13:45:53,640 INFO L371 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-04-10 13:45:53,640 INFO L372 AbstractCegarLoop]: Backedges is TWOTRACK [2018-04-10 13:45:53,640 INFO L373 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-04-10 13:45:53,641 INFO L374 AbstractCegarLoop]: Difference is false [2018-04-10 13:45:53,641 INFO L375 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-04-10 13:45:53,641 INFO L380 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-04-10 13:45:53,641 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-04-10 13:45:53,652 INFO L276 IsEmpty]: Start isEmpty. Operand 127 states. [2018-04-10 13:45:53,658 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 8 [2018-04-10 13:45:53,658 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 13:45:53,659 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1] [2018-04-10 13:45:53,660 INFO L408 AbstractCegarLoop]: === Iteration 1 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-10 13:45:53,663 INFO L82 PathProgramCache]: Analyzing trace with hash -1089139594, now seen corresponding path program 1 times [2018-04-10 13:45:53,665 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-10 13:45:53,666 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-10 13:45:53,696 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:45:53,696 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:45:53,696 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:45:53,722 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:45:53,727 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 13:45:53,758 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 13:45:53,760 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-10 13:45:53,760 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-04-10 13:45:53,761 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-04-10 13:45:53,769 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-04-10 13:45:53,769 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-04-10 13:45:53,771 INFO L87 Difference]: Start difference. First operand 127 states. Second operand 3 states. [2018-04-10 13:45:53,889 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 13:45:53,889 INFO L93 Difference]: Finished difference Result 129 states and 136 transitions. [2018-04-10 13:45:53,889 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-04-10 13:45:53,890 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 7 [2018-04-10 13:45:53,890 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 13:45:53,897 INFO L225 Difference]: With dead ends: 129 [2018-04-10 13:45:53,897 INFO L226 Difference]: Without dead ends: 126 [2018-04-10 13:45:53,899 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-04-10 13:45:53,913 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 126 states. [2018-04-10 13:45:53,933 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 126 to 123. [2018-04-10 13:45:53,934 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 123 states. [2018-04-10 13:45:53,936 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 123 states to 123 states and 130 transitions. [2018-04-10 13:45:53,938 INFO L78 Accepts]: Start accepts. Automaton has 123 states and 130 transitions. Word has length 7 [2018-04-10 13:45:53,938 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 13:45:53,938 INFO L459 AbstractCegarLoop]: Abstraction has 123 states and 130 transitions. [2018-04-10 13:45:53,938 INFO L460 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-04-10 13:45:53,938 INFO L276 IsEmpty]: Start isEmpty. Operand 123 states and 130 transitions. [2018-04-10 13:45:53,939 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 8 [2018-04-10 13:45:53,939 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 13:45:53,939 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1] [2018-04-10 13:45:53,939 INFO L408 AbstractCegarLoop]: === Iteration 2 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-10 13:45:53,939 INFO L82 PathProgramCache]: Analyzing trace with hash -1089139593, now seen corresponding path program 1 times [2018-04-10 13:45:53,939 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-10 13:45:53,939 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-10 13:45:53,940 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:45:53,940 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:45:53,940 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:45:53,952 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:45:53,953 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 13:45:53,979 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 13:45:53,979 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-10 13:45:53,979 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-04-10 13:45:53,981 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-04-10 13:45:53,981 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-04-10 13:45:53,981 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-04-10 13:45:53,981 INFO L87 Difference]: Start difference. First operand 123 states and 130 transitions. Second operand 3 states. [2018-04-10 13:45:54,063 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 13:45:54,064 INFO L93 Difference]: Finished difference Result 124 states and 132 transitions. [2018-04-10 13:45:54,064 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-04-10 13:45:54,064 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 7 [2018-04-10 13:45:54,064 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 13:45:54,065 INFO L225 Difference]: With dead ends: 124 [2018-04-10 13:45:54,066 INFO L226 Difference]: Without dead ends: 124 [2018-04-10 13:45:54,066 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-04-10 13:45:54,067 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 124 states. [2018-04-10 13:45:54,074 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 124 to 122. [2018-04-10 13:45:54,074 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 122 states. [2018-04-10 13:45:54,075 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 122 states to 122 states and 129 transitions. [2018-04-10 13:45:54,075 INFO L78 Accepts]: Start accepts. Automaton has 122 states and 129 transitions. Word has length 7 [2018-04-10 13:45:54,076 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 13:45:54,076 INFO L459 AbstractCegarLoop]: Abstraction has 122 states and 129 transitions. [2018-04-10 13:45:54,076 INFO L460 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-04-10 13:45:54,076 INFO L276 IsEmpty]: Start isEmpty. Operand 122 states and 129 transitions. [2018-04-10 13:45:54,076 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2018-04-10 13:45:54,076 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 13:45:54,076 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 13:45:54,076 INFO L408 AbstractCegarLoop]: === Iteration 3 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-10 13:45:54,077 INFO L82 PathProgramCache]: Analyzing trace with hash 1575434585, now seen corresponding path program 1 times [2018-04-10 13:45:54,077 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-10 13:45:54,077 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-10 13:45:54,077 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:45:54,077 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:45:54,077 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:45:54,092 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:45:54,092 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 13:45:54,145 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 13:45:54,146 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-10 13:45:54,146 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-04-10 13:45:54,146 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-04-10 13:45:54,146 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-04-10 13:45:54,146 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-04-10 13:45:54,147 INFO L87 Difference]: Start difference. First operand 122 states and 129 transitions. Second operand 5 states. [2018-04-10 13:45:54,275 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 13:45:54,275 INFO L93 Difference]: Finished difference Result 135 states and 143 transitions. [2018-04-10 13:45:54,275 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-04-10 13:45:54,275 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 14 [2018-04-10 13:45:54,276 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 13:45:54,277 INFO L225 Difference]: With dead ends: 135 [2018-04-10 13:45:54,277 INFO L226 Difference]: Without dead ends: 135 [2018-04-10 13:45:54,277 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-04-10 13:45:54,277 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 135 states. [2018-04-10 13:45:54,282 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 135 to 128. [2018-04-10 13:45:54,282 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 128 states. [2018-04-10 13:45:54,283 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 128 states to 128 states and 137 transitions. [2018-04-10 13:45:54,283 INFO L78 Accepts]: Start accepts. Automaton has 128 states and 137 transitions. Word has length 14 [2018-04-10 13:45:54,283 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 13:45:54,283 INFO L459 AbstractCegarLoop]: Abstraction has 128 states and 137 transitions. [2018-04-10 13:45:54,283 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-04-10 13:45:54,283 INFO L276 IsEmpty]: Start isEmpty. Operand 128 states and 137 transitions. [2018-04-10 13:45:54,283 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2018-04-10 13:45:54,283 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 13:45:54,283 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 13:45:54,284 INFO L408 AbstractCegarLoop]: === Iteration 4 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-10 13:45:54,284 INFO L82 PathProgramCache]: Analyzing trace with hash 1575434586, now seen corresponding path program 1 times [2018-04-10 13:45:54,284 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-10 13:45:54,284 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-10 13:45:54,284 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:45:54,284 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:45:54,285 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:45:54,296 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:45:54,297 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 13:45:54,393 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 13:45:54,393 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-10 13:45:54,393 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-04-10 13:45:54,394 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-04-10 13:45:54,394 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-04-10 13:45:54,394 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-04-10 13:45:54,394 INFO L87 Difference]: Start difference. First operand 128 states and 137 transitions. Second operand 7 states. [2018-04-10 13:45:54,549 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 13:45:54,549 INFO L93 Difference]: Finished difference Result 133 states and 142 transitions. [2018-04-10 13:45:54,549 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-04-10 13:45:54,549 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 14 [2018-04-10 13:45:54,549 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 13:45:54,550 INFO L225 Difference]: With dead ends: 133 [2018-04-10 13:45:54,550 INFO L226 Difference]: Without dead ends: 133 [2018-04-10 13:45:54,550 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=38, Unknown=0, NotChecked=0, Total=56 [2018-04-10 13:45:54,551 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 133 states. [2018-04-10 13:45:54,554 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 133 to 128. [2018-04-10 13:45:54,555 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 128 states. [2018-04-10 13:45:54,556 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 128 states to 128 states and 136 transitions. [2018-04-10 13:45:54,556 INFO L78 Accepts]: Start accepts. Automaton has 128 states and 136 transitions. Word has length 14 [2018-04-10 13:45:54,556 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 13:45:54,556 INFO L459 AbstractCegarLoop]: Abstraction has 128 states and 136 transitions. [2018-04-10 13:45:54,556 INFO L460 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-04-10 13:45:54,556 INFO L276 IsEmpty]: Start isEmpty. Operand 128 states and 136 transitions. [2018-04-10 13:45:54,557 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2018-04-10 13:45:54,557 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 13:45:54,557 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 13:45:54,557 INFO L408 AbstractCegarLoop]: === Iteration 5 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-10 13:45:54,557 INFO L82 PathProgramCache]: Analyzing trace with hash 1593831908, now seen corresponding path program 1 times [2018-04-10 13:45:54,557 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-10 13:45:54,557 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-10 13:45:54,558 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:45:54,558 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:45:54,558 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:45:54,567 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:45:54,567 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 13:45:54,582 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 13:45:54,582 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-10 13:45:54,582 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-04-10 13:45:54,583 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-04-10 13:45:54,583 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-04-10 13:45:54,583 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-04-10 13:45:54,583 INFO L87 Difference]: Start difference. First operand 128 states and 136 transitions. Second operand 4 states. [2018-04-10 13:45:54,666 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 13:45:54,666 INFO L93 Difference]: Finished difference Result 127 states and 135 transitions. [2018-04-10 13:45:54,666 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-04-10 13:45:54,666 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 15 [2018-04-10 13:45:54,667 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 13:45:54,667 INFO L225 Difference]: With dead ends: 127 [2018-04-10 13:45:54,667 INFO L226 Difference]: Without dead ends: 127 [2018-04-10 13:45:54,668 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-04-10 13:45:54,668 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 127 states. [2018-04-10 13:45:54,672 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 127 to 127. [2018-04-10 13:45:54,672 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 127 states. [2018-04-10 13:45:54,673 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 127 states to 127 states and 135 transitions. [2018-04-10 13:45:54,673 INFO L78 Accepts]: Start accepts. Automaton has 127 states and 135 transitions. Word has length 15 [2018-04-10 13:45:54,673 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 13:45:54,674 INFO L459 AbstractCegarLoop]: Abstraction has 127 states and 135 transitions. [2018-04-10 13:45:54,674 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-04-10 13:45:54,674 INFO L276 IsEmpty]: Start isEmpty. Operand 127 states and 135 transitions. [2018-04-10 13:45:54,674 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2018-04-10 13:45:54,674 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 13:45:54,674 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 13:45:54,674 INFO L408 AbstractCegarLoop]: === Iteration 6 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-10 13:45:54,675 INFO L82 PathProgramCache]: Analyzing trace with hash 1593831909, now seen corresponding path program 1 times [2018-04-10 13:45:54,675 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-10 13:45:54,675 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-10 13:45:54,676 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:45:54,676 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:45:54,676 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:45:54,684 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:45:54,684 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 13:45:54,708 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 13:45:54,708 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-10 13:45:54,709 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-04-10 13:45:54,709 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-04-10 13:45:54,709 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-04-10 13:45:54,709 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-04-10 13:45:54,709 INFO L87 Difference]: Start difference. First operand 127 states and 135 transitions. Second operand 4 states. [2018-04-10 13:45:54,757 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 13:45:54,758 INFO L93 Difference]: Finished difference Result 126 states and 134 transitions. [2018-04-10 13:45:54,758 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-04-10 13:45:54,758 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 15 [2018-04-10 13:45:54,758 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 13:45:54,758 INFO L225 Difference]: With dead ends: 126 [2018-04-10 13:45:54,758 INFO L226 Difference]: Without dead ends: 126 [2018-04-10 13:45:54,759 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-04-10 13:45:54,759 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 126 states. [2018-04-10 13:45:54,762 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 126 to 126. [2018-04-10 13:45:54,762 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 126 states. [2018-04-10 13:45:54,763 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 126 states to 126 states and 134 transitions. [2018-04-10 13:45:54,763 INFO L78 Accepts]: Start accepts. Automaton has 126 states and 134 transitions. Word has length 15 [2018-04-10 13:45:54,763 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 13:45:54,763 INFO L459 AbstractCegarLoop]: Abstraction has 126 states and 134 transitions. [2018-04-10 13:45:54,763 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-04-10 13:45:54,764 INFO L276 IsEmpty]: Start isEmpty. Operand 126 states and 134 transitions. [2018-04-10 13:45:54,764 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2018-04-10 13:45:54,764 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 13:45:54,764 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 13:45:54,764 INFO L408 AbstractCegarLoop]: === Iteration 7 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-10 13:45:54,764 INFO L82 PathProgramCache]: Analyzing trace with hash -1559978866, now seen corresponding path program 1 times [2018-04-10 13:45:54,765 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-10 13:45:54,765 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-10 13:45:54,765 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:45:54,765 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:45:54,765 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:45:54,774 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:45:54,774 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 13:45:54,798 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 13:45:54,798 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-10 13:45:54,798 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-04-10 13:45:54,798 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-04-10 13:45:54,799 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-04-10 13:45:54,799 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-04-10 13:45:54,799 INFO L87 Difference]: Start difference. First operand 126 states and 134 transitions. Second operand 5 states. [2018-04-10 13:45:54,891 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 13:45:54,891 INFO L93 Difference]: Finished difference Result 143 states and 152 transitions. [2018-04-10 13:45:54,891 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-04-10 13:45:54,891 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2018-04-10 13:45:54,891 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 13:45:54,892 INFO L225 Difference]: With dead ends: 143 [2018-04-10 13:45:54,892 INFO L226 Difference]: Without dead ends: 143 [2018-04-10 13:45:54,892 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-04-10 13:45:54,892 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 143 states. [2018-04-10 13:45:54,894 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 143 to 129. [2018-04-10 13:45:54,894 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 129 states. [2018-04-10 13:45:54,895 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 129 states to 129 states and 138 transitions. [2018-04-10 13:45:54,895 INFO L78 Accepts]: Start accepts. Automaton has 129 states and 138 transitions. Word has length 22 [2018-04-10 13:45:54,895 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 13:45:54,895 INFO L459 AbstractCegarLoop]: Abstraction has 129 states and 138 transitions. [2018-04-10 13:45:54,896 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-04-10 13:45:54,896 INFO L276 IsEmpty]: Start isEmpty. Operand 129 states and 138 transitions. [2018-04-10 13:45:54,896 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2018-04-10 13:45:54,896 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 13:45:54,896 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 13:45:54,896 INFO L408 AbstractCegarLoop]: === Iteration 8 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-10 13:45:54,897 INFO L82 PathProgramCache]: Analyzing trace with hash -1559978865, now seen corresponding path program 1 times [2018-04-10 13:45:54,897 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-10 13:45:54,897 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-10 13:45:54,897 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:45:54,898 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:45:54,898 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:45:54,907 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:45:54,908 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 13:45:54,944 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 13:45:54,944 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-10 13:45:54,944 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-04-10 13:45:54,944 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-04-10 13:45:54,944 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-04-10 13:45:54,945 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-04-10 13:45:54,945 INFO L87 Difference]: Start difference. First operand 129 states and 138 transitions. Second operand 5 states. [2018-04-10 13:45:55,050 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 13:45:55,050 INFO L93 Difference]: Finished difference Result 135 states and 144 transitions. [2018-04-10 13:45:55,050 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-04-10 13:45:55,050 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2018-04-10 13:45:55,051 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 13:45:55,051 INFO L225 Difference]: With dead ends: 135 [2018-04-10 13:45:55,051 INFO L226 Difference]: Without dead ends: 135 [2018-04-10 13:45:55,051 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-04-10 13:45:55,051 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 135 states. [2018-04-10 13:45:55,056 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 135 to 129. [2018-04-10 13:45:55,056 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 129 states. [2018-04-10 13:45:55,057 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 129 states to 129 states and 137 transitions. [2018-04-10 13:45:55,057 INFO L78 Accepts]: Start accepts. Automaton has 129 states and 137 transitions. Word has length 22 [2018-04-10 13:45:55,057 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 13:45:55,057 INFO L459 AbstractCegarLoop]: Abstraction has 129 states and 137 transitions. [2018-04-10 13:45:55,057 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-04-10 13:45:55,057 INFO L276 IsEmpty]: Start isEmpty. Operand 129 states and 137 transitions. [2018-04-10 13:45:55,057 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2018-04-10 13:45:55,057 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 13:45:55,057 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 13:45:55,057 INFO L408 AbstractCegarLoop]: === Iteration 9 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-10 13:45:55,058 INFO L82 PathProgramCache]: Analyzing trace with hash -1115224327, now seen corresponding path program 1 times [2018-04-10 13:45:55,058 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-10 13:45:55,058 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-10 13:45:55,058 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:45:55,058 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:45:55,058 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:45:55,064 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:45:55,065 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 13:45:55,082 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 13:45:55,083 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-10 13:45:55,083 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-04-10 13:45:55,083 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-04-10 13:45:55,083 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-04-10 13:45:55,083 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-04-10 13:45:55,083 INFO L87 Difference]: Start difference. First operand 129 states and 137 transitions. Second operand 4 states. [2018-04-10 13:45:55,142 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 13:45:55,142 INFO L93 Difference]: Finished difference Result 125 states and 133 transitions. [2018-04-10 13:45:55,142 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-04-10 13:45:55,142 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 23 [2018-04-10 13:45:55,143 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 13:45:55,143 INFO L225 Difference]: With dead ends: 125 [2018-04-10 13:45:55,143 INFO L226 Difference]: Without dead ends: 125 [2018-04-10 13:45:55,143 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-04-10 13:45:55,143 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 125 states. [2018-04-10 13:45:55,145 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 125 to 125. [2018-04-10 13:45:55,145 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 125 states. [2018-04-10 13:45:55,146 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 125 states to 125 states and 133 transitions. [2018-04-10 13:45:55,146 INFO L78 Accepts]: Start accepts. Automaton has 125 states and 133 transitions. Word has length 23 [2018-04-10 13:45:55,146 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 13:45:55,146 INFO L459 AbstractCegarLoop]: Abstraction has 125 states and 133 transitions. [2018-04-10 13:45:55,147 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-04-10 13:45:55,147 INFO L276 IsEmpty]: Start isEmpty. Operand 125 states and 133 transitions. [2018-04-10 13:45:55,147 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2018-04-10 13:45:55,147 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 13:45:55,147 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 13:45:55,147 INFO L408 AbstractCegarLoop]: === Iteration 10 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-10 13:45:55,147 INFO L82 PathProgramCache]: Analyzing trace with hash -1115224326, now seen corresponding path program 1 times [2018-04-10 13:45:55,148 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-10 13:45:55,148 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-10 13:45:55,148 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:45:55,149 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:45:55,149 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:45:55,157 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:45:55,158 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 13:45:55,197 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 13:45:55,197 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-10 13:45:55,197 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-04-10 13:45:55,197 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-04-10 13:45:55,197 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-04-10 13:45:55,197 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-04-10 13:45:55,197 INFO L87 Difference]: Start difference. First operand 125 states and 133 transitions. Second operand 4 states. [2018-04-10 13:45:55,249 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 13:45:55,249 INFO L93 Difference]: Finished difference Result 129 states and 137 transitions. [2018-04-10 13:45:55,249 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-04-10 13:45:55,249 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 23 [2018-04-10 13:45:55,250 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 13:45:55,250 INFO L225 Difference]: With dead ends: 129 [2018-04-10 13:45:55,250 INFO L226 Difference]: Without dead ends: 129 [2018-04-10 13:45:55,250 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-04-10 13:45:55,251 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 129 states. [2018-04-10 13:45:55,252 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 129 to 126. [2018-04-10 13:45:55,252 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 126 states. [2018-04-10 13:45:55,253 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 126 states to 126 states and 134 transitions. [2018-04-10 13:45:55,253 INFO L78 Accepts]: Start accepts. Automaton has 126 states and 134 transitions. Word has length 23 [2018-04-10 13:45:55,253 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 13:45:55,253 INFO L459 AbstractCegarLoop]: Abstraction has 126 states and 134 transitions. [2018-04-10 13:45:55,253 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-04-10 13:45:55,253 INFO L276 IsEmpty]: Start isEmpty. Operand 126 states and 134 transitions. [2018-04-10 13:45:55,253 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2018-04-10 13:45:55,253 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 13:45:55,254 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 13:45:55,255 INFO L408 AbstractCegarLoop]: === Iteration 11 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-10 13:45:55,255 INFO L82 PathProgramCache]: Analyzing trace with hash -196102737, now seen corresponding path program 1 times [2018-04-10 13:45:55,255 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-10 13:45:55,255 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-10 13:45:55,256 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:45:55,256 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:45:55,256 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:45:55,263 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:45:55,263 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 13:45:55,279 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 13:45:55,279 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-10 13:45:55,279 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-04-10 13:45:55,279 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-04-10 13:45:55,279 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-04-10 13:45:55,279 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-04-10 13:45:55,279 INFO L87 Difference]: Start difference. First operand 126 states and 134 transitions. Second operand 4 states. [2018-04-10 13:45:55,368 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 13:45:55,369 INFO L93 Difference]: Finished difference Result 136 states and 144 transitions. [2018-04-10 13:45:55,369 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-04-10 13:45:55,369 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 24 [2018-04-10 13:45:55,369 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 13:45:55,370 INFO L225 Difference]: With dead ends: 136 [2018-04-10 13:45:55,370 INFO L226 Difference]: Without dead ends: 136 [2018-04-10 13:45:55,370 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-04-10 13:45:55,370 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 136 states. [2018-04-10 13:45:55,372 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 136 to 128. [2018-04-10 13:45:55,372 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 128 states. [2018-04-10 13:45:55,372 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 128 states to 128 states and 137 transitions. [2018-04-10 13:45:55,372 INFO L78 Accepts]: Start accepts. Automaton has 128 states and 137 transitions. Word has length 24 [2018-04-10 13:45:55,372 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 13:45:55,372 INFO L459 AbstractCegarLoop]: Abstraction has 128 states and 137 transitions. [2018-04-10 13:45:55,372 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-04-10 13:45:55,372 INFO L276 IsEmpty]: Start isEmpty. Operand 128 states and 137 transitions. [2018-04-10 13:45:55,373 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2018-04-10 13:45:55,373 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 13:45:55,373 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 13:45:55,373 INFO L408 AbstractCegarLoop]: === Iteration 12 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-10 13:45:55,373 INFO L82 PathProgramCache]: Analyzing trace with hash -196102736, now seen corresponding path program 1 times [2018-04-10 13:45:55,373 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-10 13:45:55,373 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-10 13:45:55,374 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:45:55,374 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:45:55,374 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:45:55,379 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:45:55,380 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 13:45:55,426 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 13:45:55,426 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-10 13:45:55,426 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-04-10 13:45:55,426 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-04-10 13:45:55,426 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-04-10 13:45:55,426 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-04-10 13:45:55,426 INFO L87 Difference]: Start difference. First operand 128 states and 137 transitions. Second operand 7 states. [2018-04-10 13:45:55,544 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 13:45:55,544 INFO L93 Difference]: Finished difference Result 128 states and 136 transitions. [2018-04-10 13:45:55,544 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-04-10 13:45:55,544 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 24 [2018-04-10 13:45:55,544 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 13:45:55,545 INFO L225 Difference]: With dead ends: 128 [2018-04-10 13:45:55,545 INFO L226 Difference]: Without dead ends: 128 [2018-04-10 13:45:55,545 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=32, Invalid=78, Unknown=0, NotChecked=0, Total=110 [2018-04-10 13:45:55,545 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 128 states. [2018-04-10 13:45:55,547 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 128 to 128. [2018-04-10 13:45:55,547 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 128 states. [2018-04-10 13:45:55,547 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 128 states to 128 states and 136 transitions. [2018-04-10 13:45:55,547 INFO L78 Accepts]: Start accepts. Automaton has 128 states and 136 transitions. Word has length 24 [2018-04-10 13:45:55,548 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 13:45:55,548 INFO L459 AbstractCegarLoop]: Abstraction has 128 states and 136 transitions. [2018-04-10 13:45:55,548 INFO L460 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-04-10 13:45:55,548 INFO L276 IsEmpty]: Start isEmpty. Operand 128 states and 136 transitions. [2018-04-10 13:45:55,548 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2018-04-10 13:45:55,548 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 13:45:55,548 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 13:45:55,548 INFO L408 AbstractCegarLoop]: === Iteration 13 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-10 13:45:55,549 INFO L82 PathProgramCache]: Analyzing trace with hash -212244555, now seen corresponding path program 1 times [2018-04-10 13:45:55,549 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-10 13:45:55,549 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-10 13:45:55,549 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:45:55,549 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:45:55,550 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:45:55,558 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:45:55,558 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 13:45:55,597 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 13:45:55,598 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-10 13:45:55,598 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-04-10 13:45:55,598 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-04-10 13:45:55,598 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-04-10 13:45:55,598 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2018-04-10 13:45:55,598 INFO L87 Difference]: Start difference. First operand 128 states and 136 transitions. Second operand 5 states. [2018-04-10 13:45:55,719 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 13:45:55,720 INFO L93 Difference]: Finished difference Result 125 states and 133 transitions. [2018-04-10 13:45:55,720 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-04-10 13:45:55,720 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 24 [2018-04-10 13:45:55,720 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 13:45:55,721 INFO L225 Difference]: With dead ends: 125 [2018-04-10 13:45:55,721 INFO L226 Difference]: Without dead ends: 125 [2018-04-10 13:45:55,721 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2018-04-10 13:45:55,721 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 125 states. [2018-04-10 13:45:55,724 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 125 to 123. [2018-04-10 13:45:55,724 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 123 states. [2018-04-10 13:45:55,724 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 123 states to 123 states and 131 transitions. [2018-04-10 13:45:55,725 INFO L78 Accepts]: Start accepts. Automaton has 123 states and 131 transitions. Word has length 24 [2018-04-10 13:45:55,725 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 13:45:55,725 INFO L459 AbstractCegarLoop]: Abstraction has 123 states and 131 transitions. [2018-04-10 13:45:55,725 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-04-10 13:45:55,725 INFO L276 IsEmpty]: Start isEmpty. Operand 123 states and 131 transitions. [2018-04-10 13:45:55,726 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-04-10 13:45:55,726 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 13:45:55,726 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 13:45:55,726 INFO L408 AbstractCegarLoop]: === Iteration 14 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-10 13:45:55,726 INFO L82 PathProgramCache]: Analyzing trace with hash 748060877, now seen corresponding path program 1 times [2018-04-10 13:45:55,726 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-10 13:45:55,727 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-10 13:45:55,727 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:45:55,727 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:45:55,727 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:45:55,737 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:45:55,738 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 13:45:55,801 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 13:45:55,801 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-10 13:45:55,801 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-04-10 13:45:55,802 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-04-10 13:45:55,802 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-04-10 13:45:55,802 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2018-04-10 13:45:55,802 INFO L87 Difference]: Start difference. First operand 123 states and 131 transitions. Second operand 7 states. [2018-04-10 13:45:56,046 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 13:45:56,047 INFO L93 Difference]: Finished difference Result 139 states and 148 transitions. [2018-04-10 13:45:56,047 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-04-10 13:45:56,047 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 29 [2018-04-10 13:45:56,047 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 13:45:56,048 INFO L225 Difference]: With dead ends: 139 [2018-04-10 13:45:56,048 INFO L226 Difference]: Without dead ends: 139 [2018-04-10 13:45:56,048 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2018-04-10 13:45:56,049 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 139 states. [2018-04-10 13:45:56,051 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 139 to 129. [2018-04-10 13:45:56,051 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 129 states. [2018-04-10 13:45:56,051 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 129 states to 129 states and 138 transitions. [2018-04-10 13:45:56,051 INFO L78 Accepts]: Start accepts. Automaton has 129 states and 138 transitions. Word has length 29 [2018-04-10 13:45:56,052 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 13:45:56,052 INFO L459 AbstractCegarLoop]: Abstraction has 129 states and 138 transitions. [2018-04-10 13:45:56,052 INFO L460 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-04-10 13:45:56,052 INFO L276 IsEmpty]: Start isEmpty. Operand 129 states and 138 transitions. [2018-04-10 13:45:56,052 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-04-10 13:45:56,052 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 13:45:56,052 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 13:45:56,053 INFO L408 AbstractCegarLoop]: === Iteration 15 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-10 13:45:56,053 INFO L82 PathProgramCache]: Analyzing trace with hash 748060878, now seen corresponding path program 1 times [2018-04-10 13:45:56,053 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-10 13:45:56,053 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-10 13:45:56,054 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:45:56,054 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:45:56,054 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:45:56,063 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:45:56,064 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 13:45:56,124 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 13:45:56,125 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-10 13:45:56,125 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-04-10 13:45:56,125 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-04-10 13:45:56,125 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-04-10 13:45:56,126 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-04-10 13:45:56,126 INFO L87 Difference]: Start difference. First operand 129 states and 138 transitions. Second operand 7 states. [2018-04-10 13:45:56,366 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 13:45:56,366 INFO L93 Difference]: Finished difference Result 137 states and 147 transitions. [2018-04-10 13:45:56,366 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-04-10 13:45:56,367 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 29 [2018-04-10 13:45:56,367 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 13:45:56,367 INFO L225 Difference]: With dead ends: 137 [2018-04-10 13:45:56,367 INFO L226 Difference]: Without dead ends: 137 [2018-04-10 13:45:56,368 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=28, Invalid=62, Unknown=0, NotChecked=0, Total=90 [2018-04-10 13:45:56,368 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 137 states. [2018-04-10 13:45:56,370 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 137 to 129. [2018-04-10 13:45:56,370 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 129 states. [2018-04-10 13:45:56,371 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 129 states to 129 states and 137 transitions. [2018-04-10 13:45:56,371 INFO L78 Accepts]: Start accepts. Automaton has 129 states and 137 transitions. Word has length 29 [2018-04-10 13:45:56,371 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 13:45:56,371 INFO L459 AbstractCegarLoop]: Abstraction has 129 states and 137 transitions. [2018-04-10 13:45:56,371 INFO L460 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-04-10 13:45:56,371 INFO L276 IsEmpty]: Start isEmpty. Operand 129 states and 137 transitions. [2018-04-10 13:45:56,372 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2018-04-10 13:45:56,372 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 13:45:56,372 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 13:45:56,372 INFO L408 AbstractCegarLoop]: === Iteration 16 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-10 13:45:56,372 INFO L82 PathProgramCache]: Analyzing trace with hash 2087682397, now seen corresponding path program 1 times [2018-04-10 13:45:56,373 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-10 13:45:56,373 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-10 13:45:56,373 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:45:56,373 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:45:56,373 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:45:56,381 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:45:56,381 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 13:45:56,413 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 13:45:56,413 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-10 13:45:56,414 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-04-10 13:45:56,414 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-04-10 13:45:56,414 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-04-10 13:45:56,414 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-04-10 13:45:56,414 INFO L87 Difference]: Start difference. First operand 129 states and 137 transitions. Second operand 5 states. [2018-04-10 13:45:56,503 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 13:45:56,503 INFO L93 Difference]: Finished difference Result 127 states and 135 transitions. [2018-04-10 13:45:56,503 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-04-10 13:45:56,503 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 30 [2018-04-10 13:45:56,504 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 13:45:56,504 INFO L225 Difference]: With dead ends: 127 [2018-04-10 13:45:56,504 INFO L226 Difference]: Without dead ends: 127 [2018-04-10 13:45:56,504 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-04-10 13:45:56,505 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 127 states. [2018-04-10 13:45:56,507 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 127 to 125. [2018-04-10 13:45:56,507 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 125 states. [2018-04-10 13:45:56,507 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 125 states to 125 states and 132 transitions. [2018-04-10 13:45:56,507 INFO L78 Accepts]: Start accepts. Automaton has 125 states and 132 transitions. Word has length 30 [2018-04-10 13:45:56,508 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 13:45:56,508 INFO L459 AbstractCegarLoop]: Abstraction has 125 states and 132 transitions. [2018-04-10 13:45:56,508 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-04-10 13:45:56,508 INFO L276 IsEmpty]: Start isEmpty. Operand 125 states and 132 transitions. [2018-04-10 13:45:56,508 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2018-04-10 13:45:56,509 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 13:45:56,509 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 13:45:56,509 INFO L408 AbstractCegarLoop]: === Iteration 17 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-10 13:45:56,509 INFO L82 PathProgramCache]: Analyzing trace with hash 2087682398, now seen corresponding path program 1 times [2018-04-10 13:45:56,509 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-10 13:45:56,509 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-10 13:45:56,510 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:45:56,510 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:45:56,510 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:45:56,517 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:45:56,517 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 13:45:56,586 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 13:45:56,586 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-10 13:45:56,587 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-04-10 13:45:56,587 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-04-10 13:45:56,587 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-04-10 13:45:56,587 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2018-04-10 13:45:56,587 INFO L87 Difference]: Start difference. First operand 125 states and 132 transitions. Second operand 6 states. [2018-04-10 13:45:56,707 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 13:45:56,707 INFO L93 Difference]: Finished difference Result 132 states and 141 transitions. [2018-04-10 13:45:56,707 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-04-10 13:45:56,707 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 30 [2018-04-10 13:45:56,707 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 13:45:56,708 INFO L225 Difference]: With dead ends: 132 [2018-04-10 13:45:56,708 INFO L226 Difference]: Without dead ends: 132 [2018-04-10 13:45:56,709 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2018-04-10 13:45:56,709 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 132 states. [2018-04-10 13:45:56,711 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 132 to 125. [2018-04-10 13:45:56,711 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 125 states. [2018-04-10 13:45:56,711 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 125 states to 125 states and 133 transitions. [2018-04-10 13:45:56,712 INFO L78 Accepts]: Start accepts. Automaton has 125 states and 133 transitions. Word has length 30 [2018-04-10 13:45:56,712 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 13:45:56,712 INFO L459 AbstractCegarLoop]: Abstraction has 125 states and 133 transitions. [2018-04-10 13:45:56,712 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-04-10 13:45:56,712 INFO L276 IsEmpty]: Start isEmpty. Operand 125 states and 133 transitions. [2018-04-10 13:45:56,712 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2018-04-10 13:45:56,712 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 13:45:56,713 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 13:45:56,713 INFO L408 AbstractCegarLoop]: === Iteration 18 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-10 13:45:56,713 INFO L82 PathProgramCache]: Analyzing trace with hash 72869690, now seen corresponding path program 1 times [2018-04-10 13:45:56,713 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-10 13:45:56,713 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-10 13:45:56,714 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:45:56,714 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:45:56,714 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:45:56,720 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:45:56,721 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 13:45:56,758 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 13:45:56,758 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-10 13:45:56,758 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-04-10 13:45:56,758 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-04-10 13:45:56,759 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-04-10 13:45:56,759 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-04-10 13:45:56,759 INFO L87 Difference]: Start difference. First operand 125 states and 133 transitions. Second operand 5 states. [2018-04-10 13:45:56,855 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 13:45:56,856 INFO L93 Difference]: Finished difference Result 124 states and 132 transitions. [2018-04-10 13:45:56,856 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-04-10 13:45:56,856 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 30 [2018-04-10 13:45:56,856 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 13:45:56,856 INFO L225 Difference]: With dead ends: 124 [2018-04-10 13:45:56,857 INFO L226 Difference]: Without dead ends: 124 [2018-04-10 13:45:56,857 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2018-04-10 13:45:56,857 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 124 states. [2018-04-10 13:45:56,859 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 124 to 124. [2018-04-10 13:45:56,859 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 124 states. [2018-04-10 13:45:56,859 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 124 states to 124 states and 132 transitions. [2018-04-10 13:45:56,859 INFO L78 Accepts]: Start accepts. Automaton has 124 states and 132 transitions. Word has length 30 [2018-04-10 13:45:56,859 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 13:45:56,860 INFO L459 AbstractCegarLoop]: Abstraction has 124 states and 132 transitions. [2018-04-10 13:45:56,860 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-04-10 13:45:56,860 INFO L276 IsEmpty]: Start isEmpty. Operand 124 states and 132 transitions. [2018-04-10 13:45:56,860 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2018-04-10 13:45:56,860 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 13:45:56,860 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 13:45:56,860 INFO L408 AbstractCegarLoop]: === Iteration 19 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-10 13:45:56,861 INFO L82 PathProgramCache]: Analyzing trace with hash 72869691, now seen corresponding path program 1 times [2018-04-10 13:45:56,861 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-10 13:45:56,861 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-10 13:45:56,861 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:45:56,861 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:45:56,861 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:45:56,868 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:45:56,869 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 13:45:56,926 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 13:45:56,926 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-10 13:45:56,926 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-04-10 13:45:56,926 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-04-10 13:45:56,926 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-04-10 13:45:56,926 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2018-04-10 13:45:56,927 INFO L87 Difference]: Start difference. First operand 124 states and 132 transitions. Second operand 6 states. [2018-04-10 13:45:57,025 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 13:45:57,025 INFO L93 Difference]: Finished difference Result 131 states and 139 transitions. [2018-04-10 13:45:57,025 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-04-10 13:45:57,025 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 30 [2018-04-10 13:45:57,025 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 13:45:57,026 INFO L225 Difference]: With dead ends: 131 [2018-04-10 13:45:57,026 INFO L226 Difference]: Without dead ends: 131 [2018-04-10 13:45:57,026 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=28, Invalid=44, Unknown=0, NotChecked=0, Total=72 [2018-04-10 13:45:57,027 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 131 states. [2018-04-10 13:45:57,028 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 131 to 129. [2018-04-10 13:45:57,028 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 129 states. [2018-04-10 13:45:57,028 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 129 states to 129 states and 137 transitions. [2018-04-10 13:45:57,029 INFO L78 Accepts]: Start accepts. Automaton has 129 states and 137 transitions. Word has length 30 [2018-04-10 13:45:57,029 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 13:45:57,029 INFO L459 AbstractCegarLoop]: Abstraction has 129 states and 137 transitions. [2018-04-10 13:45:57,029 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-04-10 13:45:57,029 INFO L276 IsEmpty]: Start isEmpty. Operand 129 states and 137 transitions. [2018-04-10 13:45:57,029 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2018-04-10 13:45:57,029 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 13:45:57,029 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 13:45:57,029 INFO L408 AbstractCegarLoop]: === Iteration 20 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-10 13:45:57,029 INFO L82 PathProgramCache]: Analyzing trace with hash 1626965550, now seen corresponding path program 1 times [2018-04-10 13:45:57,029 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-10 13:45:57,029 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-10 13:45:57,030 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:45:57,030 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:45:57,030 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:45:57,035 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:45:57,036 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 13:45:57,074 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 13:45:57,074 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-10 13:45:57,074 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-04-10 13:45:57,075 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-04-10 13:45:57,075 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-04-10 13:45:57,075 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2018-04-10 13:45:57,075 INFO L87 Difference]: Start difference. First operand 129 states and 137 transitions. Second operand 7 states. [2018-04-10 13:45:57,310 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 13:45:57,311 INFO L93 Difference]: Finished difference Result 141 states and 150 transitions. [2018-04-10 13:45:57,311 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-04-10 13:45:57,311 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 31 [2018-04-10 13:45:57,311 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 13:45:57,311 INFO L225 Difference]: With dead ends: 141 [2018-04-10 13:45:57,311 INFO L226 Difference]: Without dead ends: 141 [2018-04-10 13:45:57,312 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2018-04-10 13:45:57,312 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 141 states. [2018-04-10 13:45:57,313 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 141 to 131. [2018-04-10 13:45:57,313 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 131 states. [2018-04-10 13:45:57,314 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 131 states to 131 states and 140 transitions. [2018-04-10 13:45:57,314 INFO L78 Accepts]: Start accepts. Automaton has 131 states and 140 transitions. Word has length 31 [2018-04-10 13:45:57,314 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 13:45:57,314 INFO L459 AbstractCegarLoop]: Abstraction has 131 states and 140 transitions. [2018-04-10 13:45:57,315 INFO L460 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-04-10 13:45:57,315 INFO L276 IsEmpty]: Start isEmpty. Operand 131 states and 140 transitions. [2018-04-10 13:45:57,315 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2018-04-10 13:45:57,315 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 13:45:57,315 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 13:45:57,315 INFO L408 AbstractCegarLoop]: === Iteration 21 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-10 13:45:57,316 INFO L82 PathProgramCache]: Analyzing trace with hash 1626965551, now seen corresponding path program 1 times [2018-04-10 13:45:57,316 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-10 13:45:57,316 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-10 13:45:57,316 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:45:57,316 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:45:57,317 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:45:57,326 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:45:57,327 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 13:45:57,423 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 13:45:57,423 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-10 13:45:57,423 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-04-10 13:45:57,423 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-04-10 13:45:57,423 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-04-10 13:45:57,424 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=70, Unknown=0, NotChecked=0, Total=90 [2018-04-10 13:45:57,424 INFO L87 Difference]: Start difference. First operand 131 states and 140 transitions. Second operand 10 states. [2018-04-10 13:45:57,707 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 13:45:57,707 INFO L93 Difference]: Finished difference Result 140 states and 149 transitions. [2018-04-10 13:45:57,707 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-04-10 13:45:57,708 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 31 [2018-04-10 13:45:57,708 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 13:45:57,708 INFO L225 Difference]: With dead ends: 140 [2018-04-10 13:45:57,708 INFO L226 Difference]: Without dead ends: 140 [2018-04-10 13:45:57,708 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 28 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=73, Invalid=233, Unknown=0, NotChecked=0, Total=306 [2018-04-10 13:45:57,709 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 140 states. [2018-04-10 13:45:57,711 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 140 to 126. [2018-04-10 13:45:57,711 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 126 states. [2018-04-10 13:45:57,711 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 126 states to 126 states and 134 transitions. [2018-04-10 13:45:57,711 INFO L78 Accepts]: Start accepts. Automaton has 126 states and 134 transitions. Word has length 31 [2018-04-10 13:45:57,712 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 13:45:57,712 INFO L459 AbstractCegarLoop]: Abstraction has 126 states and 134 transitions. [2018-04-10 13:45:57,712 INFO L460 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-04-10 13:45:57,712 INFO L276 IsEmpty]: Start isEmpty. Operand 126 states and 134 transitions. [2018-04-10 13:45:57,712 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2018-04-10 13:45:57,712 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 13:45:57,712 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 13:45:57,712 INFO L408 AbstractCegarLoop]: === Iteration 22 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-10 13:45:57,712 INFO L82 PathProgramCache]: Analyzing trace with hash -1275051825, now seen corresponding path program 1 times [2018-04-10 13:45:57,713 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-10 13:45:57,713 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-10 13:45:57,713 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:45:57,713 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:45:57,713 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:45:57,718 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:45:57,718 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 13:45:57,748 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 13:45:57,748 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-10 13:45:57,748 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-04-10 13:45:57,748 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-04-10 13:45:57,748 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-04-10 13:45:57,749 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2018-04-10 13:45:57,749 INFO L87 Difference]: Start difference. First operand 126 states and 134 transitions. Second operand 7 states. [2018-04-10 13:45:57,885 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 13:45:57,885 INFO L93 Difference]: Finished difference Result 141 states and 151 transitions. [2018-04-10 13:45:57,885 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-04-10 13:45:57,885 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 33 [2018-04-10 13:45:57,885 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 13:45:57,886 INFO L225 Difference]: With dead ends: 141 [2018-04-10 13:45:57,886 INFO L226 Difference]: Without dead ends: 141 [2018-04-10 13:45:57,886 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=26, Invalid=64, Unknown=0, NotChecked=0, Total=90 [2018-04-10 13:45:57,886 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 141 states. [2018-04-10 13:45:57,887 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 141 to 131. [2018-04-10 13:45:57,887 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 131 states. [2018-04-10 13:45:57,888 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 131 states to 131 states and 141 transitions. [2018-04-10 13:45:57,888 INFO L78 Accepts]: Start accepts. Automaton has 131 states and 141 transitions. Word has length 33 [2018-04-10 13:45:57,888 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 13:45:57,888 INFO L459 AbstractCegarLoop]: Abstraction has 131 states and 141 transitions. [2018-04-10 13:45:57,888 INFO L460 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-04-10 13:45:57,888 INFO L276 IsEmpty]: Start isEmpty. Operand 131 states and 141 transitions. [2018-04-10 13:45:57,888 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2018-04-10 13:45:57,888 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 13:45:57,888 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 13:45:57,888 INFO L408 AbstractCegarLoop]: === Iteration 23 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-10 13:45:57,888 INFO L82 PathProgramCache]: Analyzing trace with hash -1275051824, now seen corresponding path program 1 times [2018-04-10 13:45:57,888 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-10 13:45:57,888 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-10 13:45:57,889 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:45:57,889 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:45:57,889 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:45:57,893 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:45:57,893 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 13:45:57,959 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 13:45:57,959 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-10 13:45:57,960 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-04-10 13:45:57,960 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-04-10 13:45:57,960 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-04-10 13:45:57,960 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2018-04-10 13:45:57,960 INFO L87 Difference]: Start difference. First operand 131 states and 141 transitions. Second operand 9 states. [2018-04-10 13:45:58,306 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 13:45:58,307 INFO L93 Difference]: Finished difference Result 178 states and 195 transitions. [2018-04-10 13:45:58,307 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-04-10 13:45:58,307 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 33 [2018-04-10 13:45:58,307 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 13:45:58,307 INFO L225 Difference]: With dead ends: 178 [2018-04-10 13:45:58,307 INFO L226 Difference]: Without dead ends: 178 [2018-04-10 13:45:58,308 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 30 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=54, Invalid=186, Unknown=0, NotChecked=0, Total=240 [2018-04-10 13:45:58,308 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 178 states. [2018-04-10 13:45:58,310 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 178 to 149. [2018-04-10 13:45:58,311 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 149 states. [2018-04-10 13:45:58,311 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 149 states to 149 states and 164 transitions. [2018-04-10 13:45:58,311 INFO L78 Accepts]: Start accepts. Automaton has 149 states and 164 transitions. Word has length 33 [2018-04-10 13:45:58,312 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 13:45:58,312 INFO L459 AbstractCegarLoop]: Abstraction has 149 states and 164 transitions. [2018-04-10 13:45:58,312 INFO L460 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-04-10 13:45:58,312 INFO L276 IsEmpty]: Start isEmpty. Operand 149 states and 164 transitions. [2018-04-10 13:45:58,312 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-04-10 13:45:58,312 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 13:45:58,312 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 13:45:58,313 INFO L408 AbstractCegarLoop]: === Iteration 24 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-10 13:45:58,313 INFO L82 PathProgramCache]: Analyzing trace with hash 573717311, now seen corresponding path program 1 times [2018-04-10 13:45:58,313 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-10 13:45:58,313 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-10 13:45:58,314 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:45:58,314 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:45:58,314 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:45:58,322 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:45:58,323 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 13:45:58,432 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 13:45:58,432 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-10 13:45:58,432 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-10 13:45:58,439 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:45:58,466 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:45:58,474 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-10 13:45:58,627 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 13:45:58,632 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-04-10 13:45:58,632 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-10 13:45:58,642 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 13:45:58,642 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 13:45:58,643 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-04-10 13:45:58,643 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-10 13:45:58,649 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-10 13:45:58,649 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:25, output treesize:18 [2018-04-10 13:45:58,677 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 13:45:58,699 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-10 13:45:58,699 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 9] total 14 [2018-04-10 13:45:58,699 INFO L442 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-04-10 13:45:58,700 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-04-10 13:45:58,700 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=175, Unknown=0, NotChecked=0, Total=210 [2018-04-10 13:45:58,700 INFO L87 Difference]: Start difference. First operand 149 states and 164 transitions. Second operand 15 states. [2018-04-10 13:45:59,123 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 13:45:59,123 INFO L93 Difference]: Finished difference Result 156 states and 170 transitions. [2018-04-10 13:45:59,124 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-04-10 13:45:59,124 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 34 [2018-04-10 13:45:59,124 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 13:45:59,125 INFO L225 Difference]: With dead ends: 156 [2018-04-10 13:45:59,125 INFO L226 Difference]: Without dead ends: 156 [2018-04-10 13:45:59,126 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 49 GetRequests, 27 SyntacticMatches, 4 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 69 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=82, Invalid=298, Unknown=0, NotChecked=0, Total=380 [2018-04-10 13:45:59,126 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 156 states. [2018-04-10 13:45:59,129 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 156 to 137. [2018-04-10 13:45:59,129 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 137 states. [2018-04-10 13:45:59,130 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 137 states to 137 states and 147 transitions. [2018-04-10 13:45:59,130 INFO L78 Accepts]: Start accepts. Automaton has 137 states and 147 transitions. Word has length 34 [2018-04-10 13:45:59,130 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 13:45:59,130 INFO L459 AbstractCegarLoop]: Abstraction has 137 states and 147 transitions. [2018-04-10 13:45:59,130 INFO L460 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-04-10 13:45:59,130 INFO L276 IsEmpty]: Start isEmpty. Operand 137 states and 147 transitions. [2018-04-10 13:45:59,131 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-04-10 13:45:59,131 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 13:45:59,131 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 13:45:59,131 INFO L408 AbstractCegarLoop]: === Iteration 25 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-10 13:45:59,131 INFO L82 PathProgramCache]: Analyzing trace with hash -1260047476, now seen corresponding path program 1 times [2018-04-10 13:45:59,131 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-10 13:45:59,131 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-10 13:45:59,132 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:45:59,132 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:45:59,132 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:45:59,138 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:45:59,139 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 13:45:59,181 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 13:45:59,181 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-10 13:45:59,181 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-04-10 13:45:59,181 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-04-10 13:45:59,181 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-04-10 13:45:59,181 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-04-10 13:45:59,182 INFO L87 Difference]: Start difference. First operand 137 states and 147 transitions. Second operand 8 states. [2018-04-10 13:45:59,328 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 13:45:59,328 INFO L93 Difference]: Finished difference Result 164 states and 175 transitions. [2018-04-10 13:45:59,328 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-04-10 13:45:59,328 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 35 [2018-04-10 13:45:59,329 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 13:45:59,329 INFO L225 Difference]: With dead ends: 164 [2018-04-10 13:45:59,330 INFO L226 Difference]: Without dead ends: 164 [2018-04-10 13:45:59,330 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=43, Invalid=113, Unknown=0, NotChecked=0, Total=156 [2018-04-10 13:45:59,330 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 164 states. [2018-04-10 13:45:59,333 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 164 to 137. [2018-04-10 13:45:59,333 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 137 states. [2018-04-10 13:45:59,333 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 137 states to 137 states and 145 transitions. [2018-04-10 13:45:59,334 INFO L78 Accepts]: Start accepts. Automaton has 137 states and 145 transitions. Word has length 35 [2018-04-10 13:45:59,334 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 13:45:59,334 INFO L459 AbstractCegarLoop]: Abstraction has 137 states and 145 transitions. [2018-04-10 13:45:59,334 INFO L460 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-04-10 13:45:59,334 INFO L276 IsEmpty]: Start isEmpty. Operand 137 states and 145 transitions. [2018-04-10 13:45:59,334 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-04-10 13:45:59,334 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 13:45:59,334 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 13:45:59,335 INFO L408 AbstractCegarLoop]: === Iteration 26 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-10 13:45:59,335 INFO L82 PathProgramCache]: Analyzing trace with hash -378073276, now seen corresponding path program 1 times [2018-04-10 13:45:59,335 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-10 13:45:59,335 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-10 13:45:59,335 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:45:59,336 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:45:59,336 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:45:59,341 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:45:59,342 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 13:45:59,361 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 13:45:59,361 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-10 13:45:59,362 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-04-10 13:45:59,362 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-04-10 13:45:59,362 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-04-10 13:45:59,362 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-04-10 13:45:59,362 INFO L87 Difference]: Start difference. First operand 137 states and 145 transitions. Second operand 5 states. [2018-04-10 13:45:59,499 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 13:45:59,500 INFO L93 Difference]: Finished difference Result 136 states and 144 transitions. [2018-04-10 13:45:59,500 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-04-10 13:45:59,500 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 36 [2018-04-10 13:45:59,500 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 13:45:59,501 INFO L225 Difference]: With dead ends: 136 [2018-04-10 13:45:59,501 INFO L226 Difference]: Without dead ends: 136 [2018-04-10 13:45:59,501 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2018-04-10 13:45:59,501 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 136 states. [2018-04-10 13:45:59,503 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 136 to 136. [2018-04-10 13:45:59,503 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 136 states. [2018-04-10 13:45:59,503 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 136 states to 136 states and 144 transitions. [2018-04-10 13:45:59,503 INFO L78 Accepts]: Start accepts. Automaton has 136 states and 144 transitions. Word has length 36 [2018-04-10 13:45:59,503 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 13:45:59,503 INFO L459 AbstractCegarLoop]: Abstraction has 136 states and 144 transitions. [2018-04-10 13:45:59,504 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-04-10 13:45:59,504 INFO L276 IsEmpty]: Start isEmpty. Operand 136 states and 144 transitions. [2018-04-10 13:45:59,504 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-04-10 13:45:59,504 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 13:45:59,504 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 13:45:59,504 INFO L408 AbstractCegarLoop]: === Iteration 27 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-10 13:45:59,504 INFO L82 PathProgramCache]: Analyzing trace with hash -378073275, now seen corresponding path program 1 times [2018-04-10 13:45:59,504 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-10 13:45:59,505 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-10 13:45:59,505 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:45:59,505 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:45:59,505 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:45:59,513 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:45:59,513 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 13:45:59,649 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 13:45:59,649 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-10 13:45:59,649 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-04-10 13:45:59,650 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-04-10 13:45:59,650 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-04-10 13:45:59,650 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=70, Unknown=0, NotChecked=0, Total=90 [2018-04-10 13:45:59,650 INFO L87 Difference]: Start difference. First operand 136 states and 144 transitions. Second operand 10 states. [2018-04-10 13:45:59,883 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 13:45:59,883 INFO L93 Difference]: Finished difference Result 160 states and 172 transitions. [2018-04-10 13:45:59,906 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-04-10 13:45:59,906 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 36 [2018-04-10 13:45:59,906 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 13:45:59,906 INFO L225 Difference]: With dead ends: 160 [2018-04-10 13:45:59,907 INFO L226 Difference]: Without dead ends: 160 [2018-04-10 13:45:59,907 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 42 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=57, Invalid=215, Unknown=0, NotChecked=0, Total=272 [2018-04-10 13:45:59,907 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 160 states. [2018-04-10 13:45:59,908 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 160 to 139. [2018-04-10 13:45:59,909 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 139 states. [2018-04-10 13:45:59,909 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 139 states to 139 states and 147 transitions. [2018-04-10 13:45:59,909 INFO L78 Accepts]: Start accepts. Automaton has 139 states and 147 transitions. Word has length 36 [2018-04-10 13:45:59,909 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 13:45:59,909 INFO L459 AbstractCegarLoop]: Abstraction has 139 states and 147 transitions. [2018-04-10 13:45:59,909 INFO L460 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-04-10 13:45:59,909 INFO L276 IsEmpty]: Start isEmpty. Operand 139 states and 147 transitions. [2018-04-10 13:45:59,909 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2018-04-10 13:45:59,909 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 13:45:59,910 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 13:45:59,910 INFO L408 AbstractCegarLoop]: === Iteration 28 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-10 13:45:59,910 INFO L82 PathProgramCache]: Analyzing trace with hash -1381840613, now seen corresponding path program 1 times [2018-04-10 13:45:59,910 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-10 13:45:59,910 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-10 13:45:59,910 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:45:59,910 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:45:59,910 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:45:59,916 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:45:59,916 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 13:46:00,009 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 13:46:00,009 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-10 13:46:00,009 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-10 13:46:00,014 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:46:00,029 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:46:00,031 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-10 13:46:00,034 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-10 13:46:00,034 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-10 13:46:00,036 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:46:00,037 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-04-10 13:46:00,047 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-04-10 13:46:00,048 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-04-10 13:46:00,048 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-10 13:46:00,049 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:46:00,054 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-04-10 13:46:00,056 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-04-10 13:46:00,056 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-10 13:46:00,057 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:46:00,060 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:46:00,061 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:35, output treesize:21 [2018-04-10 13:46:00,143 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 17 [2018-04-10 13:46:00,145 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 5 [2018-04-10 13:46:00,145 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-10 13:46:00,146 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:46:00,152 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 26 [2018-04-10 13:46:00,154 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 11 [2018-04-10 13:46:00,154 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-10 13:46:00,156 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:46:00,159 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:46:00,159 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:55, output treesize:19 [2018-04-10 13:46:00,171 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 13:46:00,189 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-10 13:46:00,189 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8] total 15 [2018-04-10 13:46:00,189 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-04-10 13:46:00,189 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-04-10 13:46:00,189 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=49, Invalid=191, Unknown=0, NotChecked=0, Total=240 [2018-04-10 13:46:00,189 INFO L87 Difference]: Start difference. First operand 139 states and 147 transitions. Second operand 16 states. [2018-04-10 13:46:00,458 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 13:46:00,458 INFO L93 Difference]: Finished difference Result 149 states and 157 transitions. [2018-04-10 13:46:00,458 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-04-10 13:46:00,458 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 37 [2018-04-10 13:46:00,458 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 13:46:00,459 INFO L225 Difference]: With dead ends: 149 [2018-04-10 13:46:00,459 INFO L226 Difference]: Without dead ends: 149 [2018-04-10 13:46:00,459 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 52 GetRequests, 30 SyntacticMatches, 0 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 81 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=143, Invalid=409, Unknown=0, NotChecked=0, Total=552 [2018-04-10 13:46:00,459 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 149 states. [2018-04-10 13:46:00,460 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 149 to 149. [2018-04-10 13:46:00,460 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 149 states. [2018-04-10 13:46:00,461 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 149 states to 149 states and 157 transitions. [2018-04-10 13:46:00,461 INFO L78 Accepts]: Start accepts. Automaton has 149 states and 157 transitions. Word has length 37 [2018-04-10 13:46:00,461 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 13:46:00,461 INFO L459 AbstractCegarLoop]: Abstraction has 149 states and 157 transitions. [2018-04-10 13:46:00,461 INFO L460 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-04-10 13:46:00,461 INFO L276 IsEmpty]: Start isEmpty. Operand 149 states and 157 transitions. [2018-04-10 13:46:00,461 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2018-04-10 13:46:00,461 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 13:46:00,461 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 13:46:00,461 INFO L408 AbstractCegarLoop]: === Iteration 29 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-10 13:46:00,461 INFO L82 PathProgramCache]: Analyzing trace with hash 760893153, now seen corresponding path program 1 times [2018-04-10 13:46:00,461 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-10 13:46:00,462 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-10 13:46:00,462 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:46:00,462 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:46:00,462 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:46:00,468 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:46:00,469 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 13:46:00,747 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 13:46:00,747 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-10 13:46:00,747 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [17] imperfect sequences [] total 17 [2018-04-10 13:46:00,748 INFO L442 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-04-10 13:46:00,748 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-04-10 13:46:00,748 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=237, Unknown=0, NotChecked=0, Total=272 [2018-04-10 13:46:00,748 INFO L87 Difference]: Start difference. First operand 149 states and 157 transitions. Second operand 17 states. [2018-04-10 13:46:01,492 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 13:46:01,492 INFO L93 Difference]: Finished difference Result 188 states and 201 transitions. [2018-04-10 13:46:01,492 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-04-10 13:46:01,492 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 40 [2018-04-10 13:46:01,492 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 13:46:01,493 INFO L225 Difference]: With dead ends: 188 [2018-04-10 13:46:01,493 INFO L226 Difference]: Without dead ends: 188 [2018-04-10 13:46:01,494 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 35 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 201 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=134, Invalid=988, Unknown=0, NotChecked=0, Total=1122 [2018-04-10 13:46:01,494 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 188 states. [2018-04-10 13:46:01,496 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 188 to 166. [2018-04-10 13:46:01,496 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 166 states. [2018-04-10 13:46:01,497 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 166 states to 166 states and 177 transitions. [2018-04-10 13:46:01,497 INFO L78 Accepts]: Start accepts. Automaton has 166 states and 177 transitions. Word has length 40 [2018-04-10 13:46:01,497 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 13:46:01,498 INFO L459 AbstractCegarLoop]: Abstraction has 166 states and 177 transitions. [2018-04-10 13:46:01,498 INFO L460 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-04-10 13:46:01,498 INFO L276 IsEmpty]: Start isEmpty. Operand 166 states and 177 transitions. [2018-04-10 13:46:01,498 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2018-04-10 13:46:01,498 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 13:46:01,499 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 13:46:01,499 INFO L408 AbstractCegarLoop]: === Iteration 30 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-10 13:46:01,499 INFO L82 PathProgramCache]: Analyzing trace with hash 1372557105, now seen corresponding path program 1 times [2018-04-10 13:46:01,499 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-10 13:46:01,499 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-10 13:46:01,500 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:46:01,500 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:46:01,500 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:46:01,510 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:46:01,511 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 13:46:01,621 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 13:46:01,621 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-10 13:46:01,621 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-04-10 13:46:01,622 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-04-10 13:46:01,622 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-04-10 13:46:01,622 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=87, Unknown=0, NotChecked=0, Total=110 [2018-04-10 13:46:01,622 INFO L87 Difference]: Start difference. First operand 166 states and 177 transitions. Second operand 11 states. [2018-04-10 13:46:02,286 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 13:46:02,286 INFO L93 Difference]: Finished difference Result 200 states and 218 transitions. [2018-04-10 13:46:02,286 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-04-10 13:46:02,286 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 40 [2018-04-10 13:46:02,286 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 13:46:02,287 INFO L225 Difference]: With dead ends: 200 [2018-04-10 13:46:02,287 INFO L226 Difference]: Without dead ends: 200 [2018-04-10 13:46:02,287 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 58 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=89, Invalid=331, Unknown=0, NotChecked=0, Total=420 [2018-04-10 13:46:02,288 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 200 states. [2018-04-10 13:46:02,289 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 200 to 175. [2018-04-10 13:46:02,290 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 175 states. [2018-04-10 13:46:02,290 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 175 states to 175 states and 188 transitions. [2018-04-10 13:46:02,290 INFO L78 Accepts]: Start accepts. Automaton has 175 states and 188 transitions. Word has length 40 [2018-04-10 13:46:02,290 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 13:46:02,290 INFO L459 AbstractCegarLoop]: Abstraction has 175 states and 188 transitions. [2018-04-10 13:46:02,290 INFO L460 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-04-10 13:46:02,290 INFO L276 IsEmpty]: Start isEmpty. Operand 175 states and 188 transitions. [2018-04-10 13:46:02,291 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-04-10 13:46:02,291 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 13:46:02,291 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 13:46:02,291 INFO L408 AbstractCegarLoop]: === Iteration 31 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-10 13:46:02,291 INFO L82 PathProgramCache]: Analyzing trace with hash 1203361471, now seen corresponding path program 1 times [2018-04-10 13:46:02,291 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-10 13:46:02,291 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-10 13:46:02,292 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:46:02,292 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:46:02,292 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:46:02,296 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:46:02,297 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 13:46:02,356 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 13:46:02,356 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-10 13:46:02,356 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-04-10 13:46:02,356 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-04-10 13:46:02,357 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-04-10 13:46:02,357 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-04-10 13:46:02,357 INFO L87 Difference]: Start difference. First operand 175 states and 188 transitions. Second operand 8 states. [2018-04-10 13:46:02,453 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 13:46:02,453 INFO L93 Difference]: Finished difference Result 193 states and 207 transitions. [2018-04-10 13:46:02,453 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-04-10 13:46:02,453 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 44 [2018-04-10 13:46:02,454 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 13:46:02,454 INFO L225 Difference]: With dead ends: 193 [2018-04-10 13:46:02,455 INFO L226 Difference]: Without dead ends: 193 [2018-04-10 13:46:02,455 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=43, Invalid=113, Unknown=0, NotChecked=0, Total=156 [2018-04-10 13:46:02,455 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 193 states. [2018-04-10 13:46:02,458 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 193 to 184. [2018-04-10 13:46:02,458 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 184 states. [2018-04-10 13:46:02,459 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 184 states to 184 states and 201 transitions. [2018-04-10 13:46:02,459 INFO L78 Accepts]: Start accepts. Automaton has 184 states and 201 transitions. Word has length 44 [2018-04-10 13:46:02,459 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 13:46:02,459 INFO L459 AbstractCegarLoop]: Abstraction has 184 states and 201 transitions. [2018-04-10 13:46:02,459 INFO L460 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-04-10 13:46:02,459 INFO L276 IsEmpty]: Start isEmpty. Operand 184 states and 201 transitions. [2018-04-10 13:46:02,460 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-04-10 13:46:02,460 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 13:46:02,460 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 13:46:02,460 INFO L408 AbstractCegarLoop]: === Iteration 32 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-10 13:46:02,460 INFO L82 PathProgramCache]: Analyzing trace with hash 1760106820, now seen corresponding path program 1 times [2018-04-10 13:46:02,460 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-10 13:46:02,461 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-10 13:46:02,461 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:46:02,461 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:46:02,461 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:46:02,471 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:46:02,472 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 13:46:02,557 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 13:46:02,557 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-10 13:46:02,557 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-04-10 13:46:02,557 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-04-10 13:46:02,557 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-04-10 13:46:02,558 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=70, Unknown=0, NotChecked=0, Total=90 [2018-04-10 13:46:02,558 INFO L87 Difference]: Start difference. First operand 184 states and 201 transitions. Second operand 10 states. [2018-04-10 13:46:02,680 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 13:46:02,680 INFO L93 Difference]: Finished difference Result 192 states and 206 transitions. [2018-04-10 13:46:02,680 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-04-10 13:46:02,680 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 43 [2018-04-10 13:46:02,680 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 13:46:02,681 INFO L225 Difference]: With dead ends: 192 [2018-04-10 13:46:02,681 INFO L226 Difference]: Without dead ends: 192 [2018-04-10 13:46:02,681 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 39 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=60, Invalid=212, Unknown=0, NotChecked=0, Total=272 [2018-04-10 13:46:02,681 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 192 states. [2018-04-10 13:46:02,682 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 192 to 174. [2018-04-10 13:46:02,691 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 174 states. [2018-04-10 13:46:02,691 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 174 states to 174 states and 189 transitions. [2018-04-10 13:46:02,691 INFO L78 Accepts]: Start accepts. Automaton has 174 states and 189 transitions. Word has length 43 [2018-04-10 13:46:02,691 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 13:46:02,691 INFO L459 AbstractCegarLoop]: Abstraction has 174 states and 189 transitions. [2018-04-10 13:46:02,692 INFO L460 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-04-10 13:46:02,692 INFO L276 IsEmpty]: Start isEmpty. Operand 174 states and 189 transitions. [2018-04-10 13:46:02,692 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2018-04-10 13:46:02,692 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 13:46:02,692 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 13:46:02,692 INFO L408 AbstractCegarLoop]: === Iteration 33 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-10 13:46:02,692 INFO L82 PathProgramCache]: Analyzing trace with hash -1350499908, now seen corresponding path program 1 times [2018-04-10 13:46:02,692 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-10 13:46:02,692 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-10 13:46:02,693 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:46:02,693 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:46:02,693 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:46:02,699 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:46:02,699 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 13:46:02,728 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 13:46:02,728 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-10 13:46:02,728 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-04-10 13:46:02,728 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-04-10 13:46:02,728 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-04-10 13:46:02,729 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-04-10 13:46:02,729 INFO L87 Difference]: Start difference. First operand 174 states and 189 transitions. Second operand 6 states. [2018-04-10 13:46:02,844 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 13:46:02,844 INFO L93 Difference]: Finished difference Result 184 states and 199 transitions. [2018-04-10 13:46:02,845 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-04-10 13:46:02,845 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 45 [2018-04-10 13:46:02,845 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 13:46:02,845 INFO L225 Difference]: With dead ends: 184 [2018-04-10 13:46:02,845 INFO L226 Difference]: Without dead ends: 184 [2018-04-10 13:46:02,846 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2018-04-10 13:46:02,846 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 184 states. [2018-04-10 13:46:02,848 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 184 to 177. [2018-04-10 13:46:02,848 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 177 states. [2018-04-10 13:46:02,848 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 177 states to 177 states and 193 transitions. [2018-04-10 13:46:02,848 INFO L78 Accepts]: Start accepts. Automaton has 177 states and 193 transitions. Word has length 45 [2018-04-10 13:46:02,848 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 13:46:02,848 INFO L459 AbstractCegarLoop]: Abstraction has 177 states and 193 transitions. [2018-04-10 13:46:02,848 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-04-10 13:46:02,848 INFO L276 IsEmpty]: Start isEmpty. Operand 177 states and 193 transitions. [2018-04-10 13:46:02,849 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-04-10 13:46:02,849 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 13:46:02,849 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 13:46:02,849 INFO L408 AbstractCegarLoop]: === Iteration 34 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-10 13:46:02,849 INFO L82 PathProgramCache]: Analyzing trace with hash 816398688, now seen corresponding path program 1 times [2018-04-10 13:46:02,849 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-10 13:46:02,849 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-10 13:46:02,850 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:46:02,850 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:46:02,850 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:46:02,856 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:46:02,857 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 13:46:03,058 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 13:46:03,059 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-10 13:46:03,059 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [17] imperfect sequences [] total 17 [2018-04-10 13:46:03,059 INFO L442 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-04-10 13:46:03,059 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-04-10 13:46:03,059 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=269, Unknown=0, NotChecked=0, Total=306 [2018-04-10 13:46:03,059 INFO L87 Difference]: Start difference. First operand 177 states and 193 transitions. Second operand 18 states. [2018-04-10 13:46:03,672 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 13:46:03,672 INFO L93 Difference]: Finished difference Result 229 states and 253 transitions. [2018-04-10 13:46:03,672 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-04-10 13:46:03,672 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 47 [2018-04-10 13:46:03,673 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 13:46:03,673 INFO L225 Difference]: With dead ends: 229 [2018-04-10 13:46:03,673 INFO L226 Difference]: Without dead ends: 229 [2018-04-10 13:46:03,673 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 36 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 33 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 207 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=136, Invalid=1054, Unknown=0, NotChecked=0, Total=1190 [2018-04-10 13:46:03,674 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 229 states. [2018-04-10 13:46:03,675 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 229 to 201. [2018-04-10 13:46:03,675 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 201 states. [2018-04-10 13:46:03,676 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 201 states to 201 states and 224 transitions. [2018-04-10 13:46:03,676 INFO L78 Accepts]: Start accepts. Automaton has 201 states and 224 transitions. Word has length 47 [2018-04-10 13:46:03,676 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 13:46:03,676 INFO L459 AbstractCegarLoop]: Abstraction has 201 states and 224 transitions. [2018-04-10 13:46:03,676 INFO L460 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-04-10 13:46:03,676 INFO L276 IsEmpty]: Start isEmpty. Operand 201 states and 224 transitions. [2018-04-10 13:46:03,677 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-04-10 13:46:03,677 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 13:46:03,677 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 13:46:03,677 INFO L408 AbstractCegarLoop]: === Iteration 35 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-10 13:46:03,677 INFO L82 PathProgramCache]: Analyzing trace with hash 816398689, now seen corresponding path program 1 times [2018-04-10 13:46:03,677 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-10 13:46:03,677 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-10 13:46:03,677 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:46:03,677 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:46:03,677 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:46:03,683 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:46:03,683 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 13:46:03,909 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 13:46:03,910 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-10 13:46:03,910 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [18] imperfect sequences [] total 18 [2018-04-10 13:46:03,910 INFO L442 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-04-10 13:46:03,910 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-04-10 13:46:03,910 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=39, Invalid=303, Unknown=0, NotChecked=0, Total=342 [2018-04-10 13:46:03,910 INFO L87 Difference]: Start difference. First operand 201 states and 224 transitions. Second operand 19 states. [2018-04-10 13:46:04,652 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 13:46:04,652 INFO L93 Difference]: Finished difference Result 250 states and 277 transitions. [2018-04-10 13:46:04,652 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2018-04-10 13:46:04,652 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 47 [2018-04-10 13:46:04,653 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 13:46:04,653 INFO L225 Difference]: With dead ends: 250 [2018-04-10 13:46:04,653 INFO L226 Difference]: Without dead ends: 250 [2018-04-10 13:46:04,654 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 39 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 246 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=150, Invalid=1256, Unknown=0, NotChecked=0, Total=1406 [2018-04-10 13:46:04,654 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 250 states. [2018-04-10 13:46:04,657 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 250 to 223. [2018-04-10 13:46:04,658 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 223 states. [2018-04-10 13:46:04,658 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 223 states to 223 states and 251 transitions. [2018-04-10 13:46:04,658 INFO L78 Accepts]: Start accepts. Automaton has 223 states and 251 transitions. Word has length 47 [2018-04-10 13:46:04,659 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 13:46:04,659 INFO L459 AbstractCegarLoop]: Abstraction has 223 states and 251 transitions. [2018-04-10 13:46:04,659 INFO L460 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-04-10 13:46:04,659 INFO L276 IsEmpty]: Start isEmpty. Operand 223 states and 251 transitions. [2018-04-10 13:46:04,659 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2018-04-10 13:46:04,660 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 13:46:04,660 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 13:46:04,660 INFO L408 AbstractCegarLoop]: === Iteration 36 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-10 13:46:04,660 INFO L82 PathProgramCache]: Analyzing trace with hash -1783942653, now seen corresponding path program 1 times [2018-04-10 13:46:04,660 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-10 13:46:04,660 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-10 13:46:04,661 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:46:04,661 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:46:04,661 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:46:04,667 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:46:04,668 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 13:46:04,763 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 13:46:04,763 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-10 13:46:04,763 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-04-10 13:46:04,763 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-04-10 13:46:04,764 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-04-10 13:46:04,764 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=71, Unknown=0, NotChecked=0, Total=90 [2018-04-10 13:46:04,764 INFO L87 Difference]: Start difference. First operand 223 states and 251 transitions. Second operand 10 states. [2018-04-10 13:46:04,915 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 13:46:04,915 INFO L93 Difference]: Finished difference Result 242 states and 271 transitions. [2018-04-10 13:46:04,915 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-04-10 13:46:04,915 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 48 [2018-04-10 13:46:04,915 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 13:46:04,916 INFO L225 Difference]: With dead ends: 242 [2018-04-10 13:46:04,916 INFO L226 Difference]: Without dead ends: 242 [2018-04-10 13:46:04,916 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=39, Invalid=143, Unknown=0, NotChecked=0, Total=182 [2018-04-10 13:46:04,916 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 242 states. [2018-04-10 13:46:04,919 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 242 to 234. [2018-04-10 13:46:04,920 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 234 states. [2018-04-10 13:46:04,920 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 234 states to 234 states and 264 transitions. [2018-04-10 13:46:04,921 INFO L78 Accepts]: Start accepts. Automaton has 234 states and 264 transitions. Word has length 48 [2018-04-10 13:46:04,921 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 13:46:04,921 INFO L459 AbstractCegarLoop]: Abstraction has 234 states and 264 transitions. [2018-04-10 13:46:04,921 INFO L460 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-04-10 13:46:04,921 INFO L276 IsEmpty]: Start isEmpty. Operand 234 states and 264 transitions. [2018-04-10 13:46:04,922 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2018-04-10 13:46:04,922 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 13:46:04,922 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 13:46:04,922 INFO L408 AbstractCegarLoop]: === Iteration 37 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-10 13:46:04,922 INFO L82 PathProgramCache]: Analyzing trace with hash -1066362853, now seen corresponding path program 1 times [2018-04-10 13:46:04,922 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-10 13:46:04,922 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-10 13:46:04,923 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:46:04,923 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:46:04,923 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:46:04,935 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:46:04,935 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 13:46:05,335 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 13:46:05,335 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-10 13:46:05,336 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [22] imperfect sequences [] total 22 [2018-04-10 13:46:05,336 INFO L442 AbstractCegarLoop]: Interpolant automaton has 23 states [2018-04-10 13:46:05,336 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2018-04-10 13:46:05,336 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=51, Invalid=455, Unknown=0, NotChecked=0, Total=506 [2018-04-10 13:46:05,336 INFO L87 Difference]: Start difference. First operand 234 states and 264 transitions. Second operand 23 states. [2018-04-10 13:46:06,312 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 13:46:06,313 INFO L93 Difference]: Finished difference Result 304 states and 340 transitions. [2018-04-10 13:46:06,319 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2018-04-10 13:46:06,319 INFO L78 Accepts]: Start accepts. Automaton has 23 states. Word has length 50 [2018-04-10 13:46:06,319 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 13:46:06,320 INFO L225 Difference]: With dead ends: 304 [2018-04-10 13:46:06,320 INFO L226 Difference]: Without dead ends: 304 [2018-04-10 13:46:06,321 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 53 GetRequests, 3 SyntacticMatches, 3 SemanticMatches, 47 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 531 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=218, Invalid=2134, Unknown=0, NotChecked=0, Total=2352 [2018-04-10 13:46:06,321 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 304 states. [2018-04-10 13:46:06,325 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 304 to 263. [2018-04-10 13:46:06,325 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 263 states. [2018-04-10 13:46:06,326 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 263 states to 263 states and 300 transitions. [2018-04-10 13:46:06,326 INFO L78 Accepts]: Start accepts. Automaton has 263 states and 300 transitions. Word has length 50 [2018-04-10 13:46:06,326 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 13:46:06,326 INFO L459 AbstractCegarLoop]: Abstraction has 263 states and 300 transitions. [2018-04-10 13:46:06,326 INFO L460 AbstractCegarLoop]: Interpolant automaton has 23 states. [2018-04-10 13:46:06,326 INFO L276 IsEmpty]: Start isEmpty. Operand 263 states and 300 transitions. [2018-04-10 13:46:06,327 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2018-04-10 13:46:06,327 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 13:46:06,327 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 13:46:06,327 INFO L408 AbstractCegarLoop]: === Iteration 38 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-10 13:46:06,328 INFO L82 PathProgramCache]: Analyzing trace with hash 1302490113, now seen corresponding path program 1 times [2018-04-10 13:46:06,328 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-10 13:46:06,328 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-10 13:46:06,328 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:46:06,328 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:46:06,329 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:46:06,340 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:46:06,341 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 13:46:06,721 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 13:46:06,722 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-10 13:46:06,722 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [22] imperfect sequences [] total 22 [2018-04-10 13:46:06,722 INFO L442 AbstractCegarLoop]: Interpolant automaton has 23 states [2018-04-10 13:46:06,722 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2018-04-10 13:46:06,722 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=51, Invalid=455, Unknown=0, NotChecked=0, Total=506 [2018-04-10 13:46:06,722 INFO L87 Difference]: Start difference. First operand 263 states and 300 transitions. Second operand 23 states. [2018-04-10 13:46:07,721 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 13:46:07,721 INFO L93 Difference]: Finished difference Result 303 states and 338 transitions. [2018-04-10 13:46:07,721 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2018-04-10 13:46:07,721 INFO L78 Accepts]: Start accepts. Automaton has 23 states. Word has length 51 [2018-04-10 13:46:07,721 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 13:46:07,722 INFO L225 Difference]: With dead ends: 303 [2018-04-10 13:46:07,722 INFO L226 Difference]: Without dead ends: 303 [2018-04-10 13:46:07,722 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 52 GetRequests, 3 SyntacticMatches, 3 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 500 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=213, Invalid=2043, Unknown=0, NotChecked=0, Total=2256 [2018-04-10 13:46:07,723 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 303 states. [2018-04-10 13:46:07,725 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 303 to 263. [2018-04-10 13:46:07,725 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 263 states. [2018-04-10 13:46:07,725 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 263 states to 263 states and 298 transitions. [2018-04-10 13:46:07,726 INFO L78 Accepts]: Start accepts. Automaton has 263 states and 298 transitions. Word has length 51 [2018-04-10 13:46:07,726 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 13:46:07,726 INFO L459 AbstractCegarLoop]: Abstraction has 263 states and 298 transitions. [2018-04-10 13:46:07,726 INFO L460 AbstractCegarLoop]: Interpolant automaton has 23 states. [2018-04-10 13:46:07,726 INFO L276 IsEmpty]: Start isEmpty. Operand 263 states and 298 transitions. [2018-04-10 13:46:07,726 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2018-04-10 13:46:07,726 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 13:46:07,726 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 13:46:07,726 INFO L408 AbstractCegarLoop]: === Iteration 39 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-10 13:46:07,727 INFO L82 PathProgramCache]: Analyzing trace with hash -1740139545, now seen corresponding path program 1 times [2018-04-10 13:46:07,727 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-10 13:46:07,727 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-10 13:46:07,727 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:46:07,727 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:46:07,727 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:46:07,733 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:46:07,733 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 13:46:08,158 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 2 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 13:46:08,158 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-10 13:46:08,158 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-10 13:46:08,164 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:46:08,186 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:46:08,190 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-10 13:46:08,207 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-04-10 13:46:08,209 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-10 13:46:08,209 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-10 13:46:08,210 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:46:08,227 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-04-10 13:46:08,228 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-10 13:46:08,229 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-10 13:46:08,229 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:46:08,233 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:46:08,233 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:26, output treesize:18 [2018-04-10 13:46:08,382 WARN L1033 $PredicateComparison]: unable to prove that (exists ((__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.base Int) (__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.offset Int) (|__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#t~ret14.base| Int) (|__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#t~ret14.offset| Int)) (let ((.cse1 (+ __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.offset 4))) (and (= (let ((.cse0 (store |c_old(#memory_$Pointer$.base)| __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.base (store (store (select |c_old(#memory_$Pointer$.base)| __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.base) .cse1 (select (select |c_old(#memory_$Pointer$.base)| |c___U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#in~pointerToList.base|) |c___U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#in~pointerToList.offset|)) __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.offset |__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#t~ret14.base|)))) (store .cse0 |c___U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#in~pointerToList.base| (store (select .cse0 |c___U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#in~pointerToList.base|) |c___U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#in~pointerToList.offset| __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.base))) |c_#memory_$Pointer$.base|) (<= 0 __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.offset) (= (let ((.cse2 (store |c_old(#memory_$Pointer$.offset)| __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.base (store (store (select |c_old(#memory_$Pointer$.offset)| __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.base) .cse1 (select (select |c_old(#memory_$Pointer$.offset)| |c___U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#in~pointerToList.base|) |c___U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#in~pointerToList.offset|)) __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.offset |__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#t~ret14.offset|)))) (store .cse2 |c___U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#in~pointerToList.base| (store (select .cse2 |c___U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#in~pointerToList.base|) |c___U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#in~pointerToList.offset| __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.offset))) |c_#memory_$Pointer$.offset|) (<= __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.offset 0)))) is different from true [2018-04-10 13:46:08,471 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 40 [2018-04-10 13:46:08,473 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 20 [2018-04-10 13:46:08,476 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 13:46:08,477 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 27 [2018-04-10 13:46:08,478 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-10 13:46:08,483 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:46:08,497 INFO L682 Elim1Store]: detected equality via solver [2018-04-10 13:46:08,499 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 41 [2018-04-10 13:46:08,502 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 32 [2018-04-10 13:46:08,502 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-04-10 13:46:08,508 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:46:08,514 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:46:08,519 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 43 [2018-04-10 13:46:08,522 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 13:46:08,522 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 41 [2018-04-10 13:46:08,525 INFO L682 Elim1Store]: detected equality via solver [2018-04-10 13:46:08,527 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 40 [2018-04-10 13:46:08,527 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-04-10 13:46:08,534 INFO L267 ElimStorePlain]: Start of recursive call 8: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:46:08,544 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 21 [2018-04-10 13:46:08,546 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 13:46:08,547 INFO L682 Elim1Store]: detected equality via solver [2018-04-10 13:46:08,549 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 26 [2018-04-10 13:46:08,549 INFO L267 ElimStorePlain]: Start of recursive call 11: End of recursive call: and 1 xjuncts. [2018-04-10 13:46:08,553 INFO L267 ElimStorePlain]: Start of recursive call 10: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:46:08,558 INFO L267 ElimStorePlain]: Start of recursive call 7: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:46:08,588 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 43 [2018-04-10 13:46:08,590 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 13:46:08,591 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 41 [2018-04-10 13:46:08,593 INFO L682 Elim1Store]: detected equality via solver [2018-04-10 13:46:08,595 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 40 [2018-04-10 13:46:08,596 INFO L267 ElimStorePlain]: Start of recursive call 14: End of recursive call: and 1 xjuncts. [2018-04-10 13:46:08,604 INFO L267 ElimStorePlain]: Start of recursive call 13: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:46:08,612 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 21 [2018-04-10 13:46:08,614 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 13:46:08,614 INFO L682 Elim1Store]: detected equality via solver [2018-04-10 13:46:08,616 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 26 [2018-04-10 13:46:08,616 INFO L267 ElimStorePlain]: Start of recursive call 16: End of recursive call: and 1 xjuncts. [2018-04-10 13:46:08,621 INFO L267 ElimStorePlain]: Start of recursive call 15: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:46:08,624 INFO L267 ElimStorePlain]: Start of recursive call 12: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:46:08,629 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 40 [2018-04-10 13:46:08,631 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 20 [2018-04-10 13:46:08,633 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 13:46:08,634 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 27 [2018-04-10 13:46:08,635 INFO L267 ElimStorePlain]: Start of recursive call 19: End of recursive call: and 1 xjuncts. [2018-04-10 13:46:08,638 INFO L267 ElimStorePlain]: Start of recursive call 18: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:46:08,648 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 36 [2018-04-10 13:46:08,651 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 23 [2018-04-10 13:46:08,651 INFO L267 ElimStorePlain]: Start of recursive call 21: End of recursive call: and 1 xjuncts. [2018-04-10 13:46:08,655 INFO L267 ElimStorePlain]: Start of recursive call 20: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:46:08,659 INFO L267 ElimStorePlain]: Start of recursive call 17: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:46:08,679 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 2 dim-2 vars, End of recursive call: 5 dim-0 vars, and 4 xjuncts. [2018-04-10 13:46:08,679 INFO L202 ElimStorePlain]: Needed 21 recursive calls to eliminate 6 variables, input treesize:114, output treesize:201 [2018-04-10 13:46:09,044 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-04-10 13:46:09,044 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-10 13:46:09,054 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-04-10 13:46:09,054 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:98, output treesize:97 [2018-04-10 13:46:09,098 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 13:46:09,099 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 13:46:09,100 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 8 [2018-04-10 13:46:09,100 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-10 13:46:09,118 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 13:46:09,119 INFO L682 Elim1Store]: detected equality via solver [2018-04-10 13:46:09,123 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 81 treesize of output 77 [2018-04-10 13:46:09,126 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 64 treesize of output 58 [2018-04-10 13:46:09,127 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-10 13:46:09,133 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:46:09,145 INFO L682 Elim1Store]: detected equality via solver [2018-04-10 13:46:09,146 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 67 treesize of output 75 [2018-04-10 13:46:09,148 INFO L682 Elim1Store]: detected equality via solver [2018-04-10 13:46:09,148 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 62 treesize of output 90 [2018-04-10 13:46:09,148 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-04-10 13:46:09,154 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:46:09,162 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, 2 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-04-10 13:46:09,162 INFO L202 ElimStorePlain]: Needed 6 recursive calls to eliminate 5 variables, input treesize:118, output treesize:82 [2018-04-10 13:46:09,200 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 42 treesize of output 36 [2018-04-10 13:46:09,202 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 21 [2018-04-10 13:46:09,202 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-10 13:46:09,206 INFO L682 Elim1Store]: detected equality via solver [2018-04-10 13:46:09,206 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 17 [2018-04-10 13:46:09,207 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-10 13:46:09,208 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:46:09,215 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 42 treesize of output 34 [2018-04-10 13:46:09,217 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2018-04-10 13:46:09,217 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-04-10 13:46:09,220 INFO L682 Elim1Store]: detected equality via solver [2018-04-10 13:46:09,221 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 11 [2018-04-10 13:46:09,221 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-04-10 13:46:09,223 INFO L267 ElimStorePlain]: Start of recursive call 5: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:46:09,226 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:46:09,226 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 5 variables, input treesize:93, output treesize:7 [2018-04-10 13:46:09,257 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 2 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 13:46:09,274 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-10 13:46:09,274 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 22] total 36 [2018-04-10 13:46:09,274 INFO L442 AbstractCegarLoop]: Interpolant automaton has 36 states [2018-04-10 13:46:09,275 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2018-04-10 13:46:09,275 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=141, Invalid=1049, Unknown=4, NotChecked=66, Total=1260 [2018-04-10 13:46:09,275 INFO L87 Difference]: Start difference. First operand 263 states and 298 transitions. Second operand 36 states. [2018-04-10 13:46:10,583 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 13:46:10,583 INFO L93 Difference]: Finished difference Result 283 states and 321 transitions. [2018-04-10 13:46:10,583 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2018-04-10 13:46:10,583 INFO L78 Accepts]: Start accepts. Automaton has 36 states. Word has length 53 [2018-04-10 13:46:10,584 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 13:46:10,584 INFO L225 Difference]: With dead ends: 283 [2018-04-10 13:46:10,584 INFO L226 Difference]: Without dead ends: 283 [2018-04-10 13:46:10,585 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 92 GetRequests, 40 SyntacticMatches, 3 SemanticMatches, 49 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 584 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=279, Invalid=2169, Unknown=6, NotChecked=96, Total=2550 [2018-04-10 13:46:10,585 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 283 states. [2018-04-10 13:46:10,588 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 283 to 273. [2018-04-10 13:46:10,588 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 273 states. [2018-04-10 13:46:10,589 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 273 states to 273 states and 308 transitions. [2018-04-10 13:46:10,589 INFO L78 Accepts]: Start accepts. Automaton has 273 states and 308 transitions. Word has length 53 [2018-04-10 13:46:10,589 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 13:46:10,589 INFO L459 AbstractCegarLoop]: Abstraction has 273 states and 308 transitions. [2018-04-10 13:46:10,589 INFO L460 AbstractCegarLoop]: Interpolant automaton has 36 states. [2018-04-10 13:46:10,589 INFO L276 IsEmpty]: Start isEmpty. Operand 273 states and 308 transitions. [2018-04-10 13:46:10,590 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2018-04-10 13:46:10,590 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 13:46:10,590 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 13:46:10,590 INFO L408 AbstractCegarLoop]: === Iteration 40 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-10 13:46:10,590 INFO L82 PathProgramCache]: Analyzing trace with hash -1532747612, now seen corresponding path program 1 times [2018-04-10 13:46:10,590 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-10 13:46:10,590 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-10 13:46:10,591 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:46:10,591 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:46:10,591 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:46:10,599 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:46:10,600 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 13:46:10,796 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 13:46:10,796 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-10 13:46:10,796 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-10 13:46:10,801 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:46:10,822 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:46:10,824 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-10 13:46:10,887 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-04-10 13:46:10,889 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-10 13:46:10,889 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-10 13:46:10,891 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:46:10,895 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:46:10,895 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:23, output treesize:20 [2018-04-10 13:46:10,925 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 8 [2018-04-10 13:46:10,925 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-10 13:46:10,928 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-10 13:46:10,928 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:21, output treesize:12 [2018-04-10 13:46:16,942 WARN L148 SmtUtils]: Spent 2002ms on a formula simplification that was a NOOP. DAG size: 12 [2018-04-10 13:46:16,957 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 27 [2018-04-10 13:46:16,958 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 18 [2018-04-10 13:46:16,959 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-10 13:46:16,961 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:46:16,963 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:46:16,963 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:38, output treesize:23 [2018-04-10 13:46:17,011 WARN L1033 $PredicateComparison]: unable to prove that (exists ((|main_~#list~0.base| Int) (|main_#t~mem20.base| Int)) (let ((.cse0 (store |c_old(#valid)| |main_~#list~0.base| 1))) (and (= 0 (select |c_old(#valid)| |main_~#list~0.base|)) (= (store (store .cse0 |main_#t~mem20.base| 0) |main_~#list~0.base| 0) |c_#valid|) (= 0 (select .cse0 |main_#t~mem20.base|))))) is different from true [2018-04-10 13:46:17,024 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 13:46:17,046 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-10 13:46:17,046 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 12] total 19 [2018-04-10 13:46:17,046 INFO L442 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-04-10 13:46:17,046 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-04-10 13:46:17,046 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=49, Invalid=291, Unknown=6, NotChecked=34, Total=380 [2018-04-10 13:46:17,046 INFO L87 Difference]: Start difference. First operand 273 states and 308 transitions. Second operand 20 states. [2018-04-10 13:46:37,212 WARN L148 SmtUtils]: Spent 2003ms on a formula simplification that was a NOOP. DAG size: 18 [2018-04-10 13:47:19,968 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 13:47:19,984 INFO L93 Difference]: Finished difference Result 285 states and 321 transitions. [2018-04-10 13:47:19,984 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-04-10 13:47:19,984 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 55 [2018-04-10 13:47:19,985 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 13:47:19,985 INFO L225 Difference]: With dead ends: 285 [2018-04-10 13:47:19,985 INFO L226 Difference]: Without dead ends: 258 [2018-04-10 13:47:19,986 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 81 GetRequests, 48 SyntacticMatches, 6 SemanticMatches, 27 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 167 ImplicationChecksByTransitivity, 12.4s TimeCoverageRelationStatistics Valid=108, Invalid=643, Unknown=9, NotChecked=52, Total=812 [2018-04-10 13:47:19,986 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 258 states. [2018-04-10 13:47:19,990 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 258 to 250. [2018-04-10 13:47:19,990 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 250 states. [2018-04-10 13:47:19,990 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 250 states to 250 states and 284 transitions. [2018-04-10 13:47:19,990 INFO L78 Accepts]: Start accepts. Automaton has 250 states and 284 transitions. Word has length 55 [2018-04-10 13:47:19,991 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 13:47:19,991 INFO L459 AbstractCegarLoop]: Abstraction has 250 states and 284 transitions. [2018-04-10 13:47:19,991 INFO L460 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-04-10 13:47:19,991 INFO L276 IsEmpty]: Start isEmpty. Operand 250 states and 284 transitions. [2018-04-10 13:47:19,991 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2018-04-10 13:47:19,991 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 13:47:19,992 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 13:47:19,992 INFO L408 AbstractCegarLoop]: === Iteration 41 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-10 13:47:19,992 INFO L82 PathProgramCache]: Analyzing trace with hash 1887046790, now seen corresponding path program 1 times [2018-04-10 13:47:19,992 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-10 13:47:19,992 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-10 13:47:19,992 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:47:19,993 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:47:19,993 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:47:20,000 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:47:20,001 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 13:47:20,298 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 7 proven. 11 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-04-10 13:47:20,298 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-10 13:47:20,298 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-10 13:47:20,307 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:47:20,337 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:47:20,340 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-10 13:47:20,418 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-04-10 13:47:20,420 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-10 13:47:20,420 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-10 13:47:20,421 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:47:20,428 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-04-10 13:47:20,429 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-10 13:47:20,429 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-10 13:47:20,430 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:47:20,434 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:47:20,434 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:34, output treesize:26 [2018-04-10 13:47:20,469 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 19 treesize of output 31 [2018-04-10 13:47:20,472 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-04-10 13:47:20,473 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-10 13:47:20,491 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 17 treesize of output 22 [2018-04-10 13:47:20,492 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 2 xjuncts. [2018-04-10 13:47:20,499 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-10 13:47:20,522 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 19 treesize of output 31 [2018-04-10 13:47:20,528 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 17 treesize of output 22 [2018-04-10 13:47:20,529 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 2 xjuncts. [2018-04-10 13:47:20,542 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 15 [2018-04-10 13:47:20,542 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-04-10 13:47:20,550 INFO L267 ElimStorePlain]: Start of recursive call 5: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-10 13:47:20,564 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 4 xjuncts. [2018-04-10 13:47:20,565 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 4 variables, input treesize:42, output treesize:123 [2018-04-10 13:47:20,603 WARN L307 Elim1Store]: Array PQE input equivalent to false [2018-04-10 13:47:20,604 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-10 13:47:20,614 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 13:47:20,614 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 13:47:20,615 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 8 [2018-04-10 13:47:20,615 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-10 13:47:20,622 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:47:20,622 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:77, output treesize:42 [2018-04-10 13:47:20,697 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 69 treesize of output 56 [2018-04-10 13:47:20,699 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 27 [2018-04-10 13:47:20,700 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-10 13:47:20,708 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 3 [2018-04-10 13:47:20,709 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-10 13:47:20,714 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-10 13:47:20,722 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2018-04-10 13:47:20,724 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 3 [2018-04-10 13:47:20,724 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-04-10 13:47:20,728 INFO L267 ElimStorePlain]: Start of recursive call 5: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:47:20,732 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:47:20,732 INFO L202 ElimStorePlain]: Needed 6 recursive calls to eliminate 3 variables, input treesize:69, output treesize:7 [2018-04-10 13:47:20,754 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 6 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 13:47:20,785 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-10 13:47:20,785 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19] total 27 [2018-04-10 13:47:20,785 INFO L442 AbstractCegarLoop]: Interpolant automaton has 27 states [2018-04-10 13:47:20,785 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2018-04-10 13:47:20,786 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=73, Invalid=626, Unknown=3, NotChecked=0, Total=702 [2018-04-10 13:47:20,786 INFO L87 Difference]: Start difference. First operand 250 states and 284 transitions. Second operand 27 states. [2018-04-10 13:47:21,506 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 13:47:21,506 INFO L93 Difference]: Finished difference Result 277 states and 313 transitions. [2018-04-10 13:47:21,507 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2018-04-10 13:47:21,507 INFO L78 Accepts]: Start accepts. Automaton has 27 states. Word has length 60 [2018-04-10 13:47:21,507 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 13:47:21,507 INFO L225 Difference]: With dead ends: 277 [2018-04-10 13:47:21,508 INFO L226 Difference]: Without dead ends: 277 [2018-04-10 13:47:21,508 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 101 GetRequests, 48 SyntacticMatches, 7 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 498 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=251, Invalid=2002, Unknown=3, NotChecked=0, Total=2256 [2018-04-10 13:47:21,508 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 277 states. [2018-04-10 13:47:21,511 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 277 to 258. [2018-04-10 13:47:21,511 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 258 states. [2018-04-10 13:47:21,511 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 258 states to 258 states and 292 transitions. [2018-04-10 13:47:21,511 INFO L78 Accepts]: Start accepts. Automaton has 258 states and 292 transitions. Word has length 60 [2018-04-10 13:47:21,511 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 13:47:21,512 INFO L459 AbstractCegarLoop]: Abstraction has 258 states and 292 transitions. [2018-04-10 13:47:21,512 INFO L460 AbstractCegarLoop]: Interpolant automaton has 27 states. [2018-04-10 13:47:21,512 INFO L276 IsEmpty]: Start isEmpty. Operand 258 states and 292 transitions. [2018-04-10 13:47:21,512 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2018-04-10 13:47:21,512 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 13:47:21,512 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 13:47:21,512 INFO L408 AbstractCegarLoop]: === Iteration 42 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-10 13:47:21,512 INFO L82 PathProgramCache]: Analyzing trace with hash 787271707, now seen corresponding path program 1 times [2018-04-10 13:47:21,512 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-10 13:47:21,512 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-10 13:47:21,513 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:47:21,513 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:47:21,513 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:47:21,522 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:47:21,523 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 13:47:21,806 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 12 proven. 6 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-04-10 13:47:21,806 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-10 13:47:21,806 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-10 13:47:21,812 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:47:21,837 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:47:21,841 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-10 13:47:21,955 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-04-10 13:47:21,956 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-10 13:47:21,956 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-10 13:47:21,958 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:47:21,963 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:47:21,963 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:28, output treesize:21 [2018-04-10 13:47:21,997 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 21 treesize of output 33 [2018-04-10 13:47:21,999 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 21 [2018-04-10 13:47:21,999 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-10 13:47:22,021 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 19 treesize of output 27 [2018-04-10 13:47:22,022 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-04-10 13:47:22,035 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-04-10 13:47:22,049 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-04-10 13:47:22,050 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-10 13:47:22,051 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-04-10 13:47:22,052 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:47:22,063 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-04-10 13:47:22,064 INFO L202 ElimStorePlain]: Needed 6 recursive calls to eliminate 4 variables, input treesize:37, output treesize:53 [2018-04-10 13:47:22,096 WARN L307 Elim1Store]: Array PQE input equivalent to false [2018-04-10 13:47:22,097 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-10 13:47:22,102 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 13:47:22,103 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 13:47:22,103 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 8 [2018-04-10 13:47:22,104 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-10 13:47:22,106 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:47:22,106 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:69, output treesize:29 [2018-04-10 13:47:22,125 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 21 [2018-04-10 13:47:22,127 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2018-04-10 13:47:22,127 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-10 13:47:22,128 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:47:22,132 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-10 13:47:22,132 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:40, output treesize:29 [2018-04-10 13:47:22,160 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 24 [2018-04-10 13:47:22,161 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2018-04-10 13:47:22,161 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-10 13:47:22,164 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 5 [2018-04-10 13:47:22,164 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-10 13:47:22,165 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:47:22,165 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:47:22,166 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 3 variables, input treesize:33, output treesize:5 [2018-04-10 13:47:22,180 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 6 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 13:47:22,198 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-10 13:47:22,199 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19] total 27 [2018-04-10 13:47:22,199 INFO L442 AbstractCegarLoop]: Interpolant automaton has 28 states [2018-04-10 13:47:22,199 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2018-04-10 13:47:22,199 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=76, Invalid=680, Unknown=0, NotChecked=0, Total=756 [2018-04-10 13:47:22,199 INFO L87 Difference]: Start difference. First operand 258 states and 292 transitions. Second operand 28 states. [2018-04-10 13:47:22,941 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 13:47:22,941 INFO L93 Difference]: Finished difference Result 294 states and 329 transitions. [2018-04-10 13:47:22,941 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2018-04-10 13:47:22,941 INFO L78 Accepts]: Start accepts. Automaton has 28 states. Word has length 67 [2018-04-10 13:47:22,942 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 13:47:22,942 INFO L225 Difference]: With dead ends: 294 [2018-04-10 13:47:22,942 INFO L226 Difference]: Without dead ends: 294 [2018-04-10 13:47:22,943 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 108 GetRequests, 53 SyntacticMatches, 9 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 490 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=235, Invalid=2021, Unknown=0, NotChecked=0, Total=2256 [2018-04-10 13:47:22,943 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 294 states. [2018-04-10 13:47:22,945 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 294 to 262. [2018-04-10 13:47:22,945 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 262 states. [2018-04-10 13:47:22,946 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 262 states to 262 states and 295 transitions. [2018-04-10 13:47:22,946 INFO L78 Accepts]: Start accepts. Automaton has 262 states and 295 transitions. Word has length 67 [2018-04-10 13:47:22,946 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 13:47:22,946 INFO L459 AbstractCegarLoop]: Abstraction has 262 states and 295 transitions. [2018-04-10 13:47:22,946 INFO L460 AbstractCegarLoop]: Interpolant automaton has 28 states. [2018-04-10 13:47:22,946 INFO L276 IsEmpty]: Start isEmpty. Operand 262 states and 295 transitions. [2018-04-10 13:47:22,946 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2018-04-10 13:47:22,947 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 13:47:22,947 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 13:47:22,947 INFO L408 AbstractCegarLoop]: === Iteration 43 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-10 13:47:22,947 INFO L82 PathProgramCache]: Analyzing trace with hash 787271708, now seen corresponding path program 1 times [2018-04-10 13:47:22,947 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-10 13:47:22,947 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-10 13:47:22,947 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:47:22,948 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:47:22,948 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:47:22,955 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:47:22,956 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 13:47:23,315 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 7 proven. 11 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-04-10 13:47:23,315 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-10 13:47:23,315 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-10 13:47:23,322 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:47:23,361 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:47:23,366 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-10 13:47:23,605 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-04-10 13:47:23,608 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-10 13:47:23,608 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-10 13:47:23,610 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:47:23,621 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-04-10 13:47:23,622 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-10 13:47:23,623 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-10 13:47:23,624 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:47:23,630 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:47:23,631 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:39, output treesize:28 [2018-04-10 13:47:23,674 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 21 treesize of output 33 [2018-04-10 13:47:23,677 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 21 [2018-04-10 13:47:23,677 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-10 13:47:23,697 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 19 treesize of output 27 [2018-04-10 13:47:23,698 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-04-10 13:47:23,710 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-04-10 13:47:23,731 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 19 treesize of output 31 [2018-04-10 13:47:23,733 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-04-10 13:47:23,733 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-04-10 13:47:23,754 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 17 treesize of output 22 [2018-04-10 13:47:23,754 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 2 xjuncts. [2018-04-10 13:47:23,762 INFO L267 ElimStorePlain]: Start of recursive call 5: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-10 13:47:23,780 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: 2 dim-0 vars, and 4 xjuncts. [2018-04-10 13:47:23,781 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 4 variables, input treesize:44, output treesize:133 [2018-04-10 13:47:23,833 WARN L307 Elim1Store]: Array PQE input equivalent to false [2018-04-10 13:47:23,833 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-10 13:47:23,840 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 13:47:23,840 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 13:47:23,841 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 8 [2018-04-10 13:47:23,841 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-10 13:47:23,845 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:47:23,845 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:84, output treesize:44 [2018-04-10 13:47:23,898 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 71 treesize of output 58 [2018-04-10 13:47:23,899 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 5 [2018-04-10 13:47:23,900 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-10 13:47:23,904 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 27 [2018-04-10 13:47:23,905 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-10 13:47:23,908 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-10 13:47:23,913 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2018-04-10 13:47:23,914 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2018-04-10 13:47:23,914 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-10 13:47:23,918 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2018-04-10 13:47:23,918 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-04-10 13:47:23,919 INFO L267 ElimStorePlain]: Start of recursive call 5: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:47:23,921 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:47:23,921 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 3 variables, input treesize:71, output treesize:9 [2018-04-10 13:47:23,984 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 6 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 13:47:24,002 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-10 13:47:24,002 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 21] total 35 [2018-04-10 13:47:24,002 INFO L442 AbstractCegarLoop]: Interpolant automaton has 36 states [2018-04-10 13:47:24,003 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2018-04-10 13:47:24,003 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=94, Invalid=1166, Unknown=0, NotChecked=0, Total=1260 [2018-04-10 13:47:24,003 INFO L87 Difference]: Start difference. First operand 262 states and 295 transitions. Second operand 36 states. [2018-04-10 13:47:25,744 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 13:47:25,744 INFO L93 Difference]: Finished difference Result 330 states and 364 transitions. [2018-04-10 13:47:25,744 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 43 states. [2018-04-10 13:47:25,744 INFO L78 Accepts]: Start accepts. Automaton has 36 states. Word has length 67 [2018-04-10 13:47:25,744 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 13:47:25,745 INFO L225 Difference]: With dead ends: 330 [2018-04-10 13:47:25,745 INFO L226 Difference]: Without dead ends: 330 [2018-04-10 13:47:25,746 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 128 GetRequests, 51 SyntacticMatches, 7 SemanticMatches, 70 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1134 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=405, Invalid=4707, Unknown=0, NotChecked=0, Total=5112 [2018-04-10 13:47:25,746 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 330 states. [2018-04-10 13:47:25,749 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 330 to 275. [2018-04-10 13:47:25,749 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 275 states. [2018-04-10 13:47:25,750 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 275 states to 275 states and 308 transitions. [2018-04-10 13:47:25,750 INFO L78 Accepts]: Start accepts. Automaton has 275 states and 308 transitions. Word has length 67 [2018-04-10 13:47:25,750 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 13:47:25,751 INFO L459 AbstractCegarLoop]: Abstraction has 275 states and 308 transitions. [2018-04-10 13:47:25,751 INFO L460 AbstractCegarLoop]: Interpolant automaton has 36 states. [2018-04-10 13:47:25,751 INFO L276 IsEmpty]: Start isEmpty. Operand 275 states and 308 transitions. [2018-04-10 13:47:25,751 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2018-04-10 13:47:25,751 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 13:47:25,751 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 13:47:25,752 INFO L408 AbstractCegarLoop]: === Iteration 44 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-10 13:47:25,752 INFO L82 PathProgramCache]: Analyzing trace with hash -660061586, now seen corresponding path program 1 times [2018-04-10 13:47:25,752 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-10 13:47:25,752 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-10 13:47:25,752 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:47:25,753 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:47:25,753 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:47:25,761 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:47:25,762 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 13:47:26,061 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 13:47:26,062 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-10 13:47:26,062 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [19] imperfect sequences [] total 19 [2018-04-10 13:47:26,062 INFO L442 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-04-10 13:47:26,062 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-04-10 13:47:26,062 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=50, Invalid=330, Unknown=0, NotChecked=0, Total=380 [2018-04-10 13:47:26,062 INFO L87 Difference]: Start difference. First operand 275 states and 308 transitions. Second operand 20 states. [2018-04-10 13:47:26,666 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 13:47:26,667 INFO L93 Difference]: Finished difference Result 311 states and 347 transitions. [2018-04-10 13:47:26,667 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-04-10 13:47:26,667 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 55 [2018-04-10 13:47:26,667 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 13:47:26,668 INFO L225 Difference]: With dead ends: 311 [2018-04-10 13:47:26,668 INFO L226 Difference]: Without dead ends: 311 [2018-04-10 13:47:26,668 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 38 GetRequests, 4 SyntacticMatches, 2 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 230 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=140, Invalid=982, Unknown=0, NotChecked=0, Total=1122 [2018-04-10 13:47:26,668 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 311 states. [2018-04-10 13:47:26,670 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 311 to 288. [2018-04-10 13:47:26,670 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 288 states. [2018-04-10 13:47:26,671 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 288 states to 288 states and 322 transitions. [2018-04-10 13:47:26,671 INFO L78 Accepts]: Start accepts. Automaton has 288 states and 322 transitions. Word has length 55 [2018-04-10 13:47:26,671 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 13:47:26,671 INFO L459 AbstractCegarLoop]: Abstraction has 288 states and 322 transitions. [2018-04-10 13:47:26,671 INFO L460 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-04-10 13:47:26,671 INFO L276 IsEmpty]: Start isEmpty. Operand 288 states and 322 transitions. [2018-04-10 13:47:26,671 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2018-04-10 13:47:26,671 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 13:47:26,672 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 13:47:26,672 INFO L408 AbstractCegarLoop]: === Iteration 45 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-10 13:47:26,672 INFO L82 PathProgramCache]: Analyzing trace with hash -1628221628, now seen corresponding path program 1 times [2018-04-10 13:47:26,672 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-10 13:47:26,672 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-10 13:47:26,672 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:47:26,672 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:47:26,672 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:47:26,680 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:47:26,680 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 13:47:27,324 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 13:47:27,324 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-10 13:47:27,324 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [26] imperfect sequences [] total 26 [2018-04-10 13:47:27,325 INFO L442 AbstractCegarLoop]: Interpolant automaton has 27 states [2018-04-10 13:47:27,325 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2018-04-10 13:47:27,325 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=64, Invalid=638, Unknown=0, NotChecked=0, Total=702 [2018-04-10 13:47:27,325 INFO L87 Difference]: Start difference. First operand 288 states and 322 transitions. Second operand 27 states. [2018-04-10 13:47:28,497 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 13:47:28,497 INFO L93 Difference]: Finished difference Result 326 states and 362 transitions. [2018-04-10 13:47:28,497 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 42 states. [2018-04-10 13:47:28,497 INFO L78 Accepts]: Start accepts. Automaton has 27 states. Word has length 55 [2018-04-10 13:47:28,497 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 13:47:28,498 INFO L225 Difference]: With dead ends: 326 [2018-04-10 13:47:28,498 INFO L226 Difference]: Without dead ends: 326 [2018-04-10 13:47:28,499 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 62 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 58 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 811 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=339, Invalid=3201, Unknown=0, NotChecked=0, Total=3540 [2018-04-10 13:47:28,499 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 326 states. [2018-04-10 13:47:28,501 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 326 to 288. [2018-04-10 13:47:28,501 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 288 states. [2018-04-10 13:47:28,501 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 288 states to 288 states and 320 transitions. [2018-04-10 13:47:28,501 INFO L78 Accepts]: Start accepts. Automaton has 288 states and 320 transitions. Word has length 55 [2018-04-10 13:47:28,501 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 13:47:28,501 INFO L459 AbstractCegarLoop]: Abstraction has 288 states and 320 transitions. [2018-04-10 13:47:28,502 INFO L460 AbstractCegarLoop]: Interpolant automaton has 27 states. [2018-04-10 13:47:28,502 INFO L276 IsEmpty]: Start isEmpty. Operand 288 states and 320 transitions. [2018-04-10 13:47:28,502 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2018-04-10 13:47:28,502 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 13:47:28,502 INFO L355 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 13:47:28,502 INFO L408 AbstractCegarLoop]: === Iteration 46 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-10 13:47:28,502 INFO L82 PathProgramCache]: Analyzing trace with hash 473442968, now seen corresponding path program 1 times [2018-04-10 13:47:28,502 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-10 13:47:28,502 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-10 13:47:28,503 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:47:28,503 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:47:28,503 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:47:28,509 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:47:28,509 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 13:47:28,531 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 3 proven. 27 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2018-04-10 13:47:28,531 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-10 13:47:28,531 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-10 13:47:28,536 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:47:28,563 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:47:28,566 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-10 13:47:28,577 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 3 proven. 27 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2018-04-10 13:47:28,600 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-10 13:47:28,600 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 7 [2018-04-10 13:47:28,600 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-04-10 13:47:28,601 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-04-10 13:47:28,601 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2018-04-10 13:47:28,601 INFO L87 Difference]: Start difference. First operand 288 states and 320 transitions. Second operand 7 states. [2018-04-10 13:47:28,613 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 13:47:28,613 INFO L93 Difference]: Finished difference Result 300 states and 332 transitions. [2018-04-10 13:47:28,613 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-04-10 13:47:28,613 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 74 [2018-04-10 13:47:28,614 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 13:47:28,614 INFO L225 Difference]: With dead ends: 300 [2018-04-10 13:47:28,614 INFO L226 Difference]: Without dead ends: 300 [2018-04-10 13:47:28,614 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 79 GetRequests, 74 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2018-04-10 13:47:28,615 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 300 states. [2018-04-10 13:47:28,617 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 300 to 295. [2018-04-10 13:47:28,617 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 295 states. [2018-04-10 13:47:28,618 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 295 states to 295 states and 327 transitions. [2018-04-10 13:47:28,618 INFO L78 Accepts]: Start accepts. Automaton has 295 states and 327 transitions. Word has length 74 [2018-04-10 13:47:28,618 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 13:47:28,618 INFO L459 AbstractCegarLoop]: Abstraction has 295 states and 327 transitions. [2018-04-10 13:47:28,618 INFO L460 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-04-10 13:47:28,618 INFO L276 IsEmpty]: Start isEmpty. Operand 295 states and 327 transitions. [2018-04-10 13:47:28,619 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2018-04-10 13:47:28,619 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 13:47:28,619 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 13:47:28,619 INFO L408 AbstractCegarLoop]: === Iteration 47 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-10 13:47:28,620 INFO L82 PathProgramCache]: Analyzing trace with hash 1335978638, now seen corresponding path program 1 times [2018-04-10 13:47:28,620 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-10 13:47:28,620 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-10 13:47:28,620 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:47:28,620 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:47:28,620 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:47:28,628 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:47:28,629 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 13:47:28,975 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 13:47:28,976 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-10 13:47:28,976 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [18] imperfect sequences [] total 18 [2018-04-10 13:47:28,976 INFO L442 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-04-10 13:47:28,976 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-04-10 13:47:28,976 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=47, Invalid=295, Unknown=0, NotChecked=0, Total=342 [2018-04-10 13:47:28,976 INFO L87 Difference]: Start difference. First operand 295 states and 327 transitions. Second operand 19 states. [2018-04-10 13:47:29,374 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 13:47:29,374 INFO L93 Difference]: Finished difference Result 317 states and 350 transitions. [2018-04-10 13:47:29,375 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-04-10 13:47:29,375 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 57 [2018-04-10 13:47:29,375 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 13:47:29,375 INFO L225 Difference]: With dead ends: 317 [2018-04-10 13:47:29,375 INFO L226 Difference]: Without dead ends: 317 [2018-04-10 13:47:29,376 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 33 GetRequests, 2 SyntacticMatches, 3 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 140 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=110, Invalid=760, Unknown=0, NotChecked=0, Total=870 [2018-04-10 13:47:29,376 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 317 states. [2018-04-10 13:47:29,378 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 317 to 287. [2018-04-10 13:47:29,378 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 287 states. [2018-04-10 13:47:29,378 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 287 states to 287 states and 319 transitions. [2018-04-10 13:47:29,378 INFO L78 Accepts]: Start accepts. Automaton has 287 states and 319 transitions. Word has length 57 [2018-04-10 13:47:29,379 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 13:47:29,379 INFO L459 AbstractCegarLoop]: Abstraction has 287 states and 319 transitions. [2018-04-10 13:47:29,379 INFO L460 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-04-10 13:47:29,379 INFO L276 IsEmpty]: Start isEmpty. Operand 287 states and 319 transitions. [2018-04-10 13:47:29,379 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2018-04-10 13:47:29,379 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 13:47:29,379 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 13:47:29,379 INFO L408 AbstractCegarLoop]: === Iteration 48 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-10 13:47:29,379 INFO L82 PathProgramCache]: Analyzing trace with hash -1722226744, now seen corresponding path program 1 times [2018-04-10 13:47:29,379 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-10 13:47:29,379 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-10 13:47:29,380 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:47:29,380 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:47:29,380 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:47:29,386 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:47:29,387 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 13:47:29,648 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 13:47:29,648 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-10 13:47:29,648 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [21] imperfect sequences [] total 21 [2018-04-10 13:47:29,648 INFO L442 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-04-10 13:47:29,648 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-04-10 13:47:29,649 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=57, Invalid=363, Unknown=0, NotChecked=0, Total=420 [2018-04-10 13:47:29,649 INFO L87 Difference]: Start difference. First operand 287 states and 319 transitions. Second operand 21 states. [2018-04-10 13:47:30,136 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 13:47:30,137 INFO L93 Difference]: Finished difference Result 325 states and 356 transitions. [2018-04-10 13:47:30,142 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2018-04-10 13:47:30,142 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 60 [2018-04-10 13:47:30,143 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 13:47:30,143 INFO L225 Difference]: With dead ends: 325 [2018-04-10 13:47:30,143 INFO L226 Difference]: Without dead ends: 314 [2018-04-10 13:47:30,144 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 40 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 277 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=186, Invalid=1220, Unknown=0, NotChecked=0, Total=1406 [2018-04-10 13:47:30,144 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 314 states. [2018-04-10 13:47:30,147 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 314 to 294. [2018-04-10 13:47:30,147 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 294 states. [2018-04-10 13:47:30,148 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 294 states to 294 states and 324 transitions. [2018-04-10 13:47:30,148 INFO L78 Accepts]: Start accepts. Automaton has 294 states and 324 transitions. Word has length 60 [2018-04-10 13:47:30,148 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 13:47:30,148 INFO L459 AbstractCegarLoop]: Abstraction has 294 states and 324 transitions. [2018-04-10 13:47:30,148 INFO L460 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-04-10 13:47:30,148 INFO L276 IsEmpty]: Start isEmpty. Operand 294 states and 324 transitions. [2018-04-10 13:47:30,149 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2018-04-10 13:47:30,149 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 13:47:30,149 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 13:47:30,149 INFO L408 AbstractCegarLoop]: === Iteration 49 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-10 13:47:30,149 INFO L82 PathProgramCache]: Analyzing trace with hash 252927534, now seen corresponding path program 1 times [2018-04-10 13:47:30,150 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-10 13:47:30,150 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-10 13:47:30,150 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:47:30,150 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:47:30,150 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:47:30,162 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:47:30,162 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 13:47:30,823 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 13:47:30,823 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-10 13:47:30,823 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [26] imperfect sequences [] total 26 [2018-04-10 13:47:30,824 INFO L442 AbstractCegarLoop]: Interpolant automaton has 27 states [2018-04-10 13:47:30,824 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2018-04-10 13:47:30,824 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=68, Invalid=634, Unknown=0, NotChecked=0, Total=702 [2018-04-10 13:47:30,824 INFO L87 Difference]: Start difference. First operand 294 states and 324 transitions. Second operand 27 states. [2018-04-10 13:47:31,712 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 13:47:31,713 INFO L93 Difference]: Finished difference Result 324 states and 357 transitions. [2018-04-10 13:47:31,713 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2018-04-10 13:47:31,713 INFO L78 Accepts]: Start accepts. Automaton has 27 states. Word has length 60 [2018-04-10 13:47:31,713 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 13:47:31,714 INFO L225 Difference]: With dead ends: 324 [2018-04-10 13:47:31,714 INFO L226 Difference]: Without dead ends: 324 [2018-04-10 13:47:31,714 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 49 GetRequests, 4 SyntacticMatches, 4 SemanticMatches, 41 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 361 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=181, Invalid=1625, Unknown=0, NotChecked=0, Total=1806 [2018-04-10 13:47:31,715 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 324 states. [2018-04-10 13:47:31,716 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 324 to 298. [2018-04-10 13:47:31,717 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 298 states. [2018-04-10 13:47:31,717 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 298 states to 298 states and 328 transitions. [2018-04-10 13:47:31,717 INFO L78 Accepts]: Start accepts. Automaton has 298 states and 328 transitions. Word has length 60 [2018-04-10 13:47:31,717 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 13:47:31,717 INFO L459 AbstractCegarLoop]: Abstraction has 298 states and 328 transitions. [2018-04-10 13:47:31,717 INFO L460 AbstractCegarLoop]: Interpolant automaton has 27 states. [2018-04-10 13:47:31,717 INFO L276 IsEmpty]: Start isEmpty. Operand 298 states and 328 transitions. [2018-04-10 13:47:31,718 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 63 [2018-04-10 13:47:31,718 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 13:47:31,718 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 13:47:31,718 INFO L408 AbstractCegarLoop]: === Iteration 50 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-10 13:47:31,718 INFO L82 PathProgramCache]: Analyzing trace with hash -1749772722, now seen corresponding path program 1 times [2018-04-10 13:47:31,718 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-10 13:47:31,718 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-10 13:47:31,719 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:47:31,719 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:47:31,719 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:47:31,726 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:47:31,726 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 13:47:32,395 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 13:47:32,395 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-10 13:47:32,395 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [24] imperfect sequences [] total 24 [2018-04-10 13:47:32,395 INFO L442 AbstractCegarLoop]: Interpolant automaton has 25 states [2018-04-10 13:47:32,395 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2018-04-10 13:47:32,395 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=59, Invalid=541, Unknown=0, NotChecked=0, Total=600 [2018-04-10 13:47:32,395 INFO L87 Difference]: Start difference. First operand 298 states and 328 transitions. Second operand 25 states. [2018-04-10 13:47:33,394 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 13:47:33,394 INFO L93 Difference]: Finished difference Result 326 states and 358 transitions. [2018-04-10 13:47:33,394 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2018-04-10 13:47:33,394 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 62 [2018-04-10 13:47:33,394 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 13:47:33,395 INFO L225 Difference]: With dead ends: 326 [2018-04-10 13:47:33,395 INFO L226 Difference]: Without dead ends: 326 [2018-04-10 13:47:33,396 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 52 GetRequests, 2 SyntacticMatches, 4 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 519 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=212, Invalid=2044, Unknown=0, NotChecked=0, Total=2256 [2018-04-10 13:47:33,396 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 326 states. [2018-04-10 13:47:33,398 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 326 to 284. [2018-04-10 13:47:33,398 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 284 states. [2018-04-10 13:47:33,399 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 284 states to 284 states and 314 transitions. [2018-04-10 13:47:33,399 INFO L78 Accepts]: Start accepts. Automaton has 284 states and 314 transitions. Word has length 62 [2018-04-10 13:47:33,399 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 13:47:33,399 INFO L459 AbstractCegarLoop]: Abstraction has 284 states and 314 transitions. [2018-04-10 13:47:33,399 INFO L460 AbstractCegarLoop]: Interpolant automaton has 25 states. [2018-04-10 13:47:33,399 INFO L276 IsEmpty]: Start isEmpty. Operand 284 states and 314 transitions. [2018-04-10 13:47:33,399 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 62 [2018-04-10 13:47:33,399 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 13:47:33,400 INFO L355 BasicCegarLoop]: trace histogram [5, 4, 4, 4, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 13:47:33,400 INFO L408 AbstractCegarLoop]: === Iteration 51 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-10 13:47:33,400 INFO L82 PathProgramCache]: Analyzing trace with hash 1555493779, now seen corresponding path program 1 times [2018-04-10 13:47:33,400 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-10 13:47:33,400 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-10 13:47:33,400 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:47:33,400 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:47:33,401 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:47:33,406 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:47:33,407 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 13:47:33,443 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 0 proven. 50 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 13:47:33,443 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-10 13:47:33,443 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-10 13:47:33,451 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:47:33,475 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:47:33,477 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-10 13:47:33,483 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 0 proven. 50 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 13:47:33,501 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-10 13:47:33,501 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 8 [2018-04-10 13:47:33,525 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-04-10 13:47:33,525 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-04-10 13:47:33,525 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=28, Invalid=28, Unknown=0, NotChecked=0, Total=56 [2018-04-10 13:47:33,525 INFO L87 Difference]: Start difference. First operand 284 states and 314 transitions. Second operand 8 states. [2018-04-10 13:47:33,541 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 13:47:33,541 INFO L93 Difference]: Finished difference Result 296 states and 326 transitions. [2018-04-10 13:47:33,541 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-04-10 13:47:33,541 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 61 [2018-04-10 13:47:33,541 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 13:47:33,542 INFO L225 Difference]: With dead ends: 296 [2018-04-10 13:47:33,542 INFO L226 Difference]: Without dead ends: 296 [2018-04-10 13:47:33,543 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 67 GetRequests, 61 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=28, Invalid=28, Unknown=0, NotChecked=0, Total=56 [2018-04-10 13:47:33,543 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 296 states. [2018-04-10 13:47:33,546 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 296 to 291. [2018-04-10 13:47:33,546 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 291 states. [2018-04-10 13:47:33,547 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 291 states to 291 states and 321 transitions. [2018-04-10 13:47:33,547 INFO L78 Accepts]: Start accepts. Automaton has 291 states and 321 transitions. Word has length 61 [2018-04-10 13:47:33,547 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 13:47:33,547 INFO L459 AbstractCegarLoop]: Abstraction has 291 states and 321 transitions. [2018-04-10 13:47:33,547 INFO L460 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-04-10 13:47:33,547 INFO L276 IsEmpty]: Start isEmpty. Operand 291 states and 321 transitions. [2018-04-10 13:47:33,548 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2018-04-10 13:47:33,548 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 13:47:33,548 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 13:47:33,548 INFO L408 AbstractCegarLoop]: === Iteration 52 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-10 13:47:33,548 INFO L82 PathProgramCache]: Analyzing trace with hash 1608088232, now seen corresponding path program 1 times [2018-04-10 13:47:33,549 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-10 13:47:33,549 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-10 13:47:33,549 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:47:33,549 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:47:33,549 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:47:33,555 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:47:33,556 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 13:47:33,662 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 12 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-04-10 13:47:33,662 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-10 13:47:33,662 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-10 13:47:33,673 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:47:33,710 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:47:33,713 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-10 13:47:33,753 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-04-10 13:47:33,755 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-10 13:47:33,755 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-10 13:47:33,756 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:47:33,761 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:47:33,761 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:17, output treesize:9 [2018-04-10 13:47:33,771 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 13:47:33,771 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 13:47:33,772 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 8 [2018-04-10 13:47:33,772 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-10 13:47:33,775 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:47:33,775 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:18, output treesize:12 [2018-04-10 13:47:33,804 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1 [2018-04-10 13:47:33,804 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-10 13:47:33,807 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-10 13:47:33,808 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:17, output treesize:12 [2018-04-10 13:47:39,823 WARN L148 SmtUtils]: Spent 2003ms on a formula simplification that was a NOOP. DAG size: 12 [2018-04-10 13:47:39,836 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 12 [2018-04-10 13:47:39,837 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2018-04-10 13:47:39,837 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-10 13:47:39,838 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:47:39,840 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:47:39,840 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:21, output treesize:10 [2018-04-10 13:47:39,845 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 13:47:39,845 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 21 [2018-04-10 13:47:39,845 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-10 13:47:39,849 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-10 13:47:39,849 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:16, output treesize:11 [2018-04-10 13:47:39,864 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 6 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 13:47:39,883 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-10 13:47:39,884 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 15] total 17 [2018-04-10 13:47:39,884 INFO L442 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-04-10 13:47:39,884 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-04-10 13:47:39,884 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=49, Invalid=255, Unknown=2, NotChecked=0, Total=306 [2018-04-10 13:47:39,884 INFO L87 Difference]: Start difference. First operand 291 states and 321 transitions. Second operand 18 states. [2018-04-10 13:48:06,287 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 13:48:06,288 INFO L93 Difference]: Finished difference Result 323 states and 351 transitions. [2018-04-10 13:48:06,288 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-04-10 13:48:06,288 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 68 [2018-04-10 13:48:06,288 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 13:48:06,289 INFO L225 Difference]: With dead ends: 323 [2018-04-10 13:48:06,289 INFO L226 Difference]: Without dead ends: 312 [2018-04-10 13:48:06,289 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 90 GetRequests, 59 SyntacticMatches, 4 SemanticMatches, 27 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 171 ImplicationChecksByTransitivity, 10.2s TimeCoverageRelationStatistics Valid=134, Invalid=674, Unknown=4, NotChecked=0, Total=812 [2018-04-10 13:48:06,289 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 312 states. [2018-04-10 13:48:06,291 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 312 to 236. [2018-04-10 13:48:06,291 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 236 states. [2018-04-10 13:48:06,291 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 236 states to 236 states and 257 transitions. [2018-04-10 13:48:06,291 INFO L78 Accepts]: Start accepts. Automaton has 236 states and 257 transitions. Word has length 68 [2018-04-10 13:48:06,291 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 13:48:06,291 INFO L459 AbstractCegarLoop]: Abstraction has 236 states and 257 transitions. [2018-04-10 13:48:06,291 INFO L460 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-04-10 13:48:06,292 INFO L276 IsEmpty]: Start isEmpty. Operand 236 states and 257 transitions. [2018-04-10 13:48:06,292 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2018-04-10 13:48:06,292 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 13:48:06,292 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 13:48:06,292 INFO L408 AbstractCegarLoop]: === Iteration 53 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-04-10 13:48:06,292 INFO L82 PathProgramCache]: Analyzing trace with hash -2052912455, now seen corresponding path program 1 times [2018-04-10 13:48:06,292 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-10 13:48:06,292 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-10 13:48:06,293 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:48:06,293 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:48:06,293 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 13:48:06,302 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:48:06,303 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 13:48:06,819 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 2 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 13:48:06,819 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-10 13:48:06,819 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-10 13:48:06,825 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 13:48:06,846 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 13:48:06,849 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-10 13:48:06,865 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-04-10 13:48:06,866 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-10 13:48:06,866 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-10 13:48:06,867 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:48:06,871 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-04-10 13:48:06,872 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-10 13:48:06,872 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-10 13:48:06,873 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:48:06,875 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:48:06,875 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:26, output treesize:18 [2018-04-10 13:48:07,106 WARN L1033 $PredicateComparison]: unable to prove that (exists ((__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_data_~data~0.base Int) (__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_data_~data~0.offset Int)) (let ((.cse0 (+ __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_data_~data~0.offset 4))) (and (= |c_#memory_$Pointer$.base| (store |c_old(#memory_$Pointer$.base)| __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_data_~data~0.base (store (select |c_old(#memory_$Pointer$.base)| __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_data_~data~0.base) .cse0 0))) (= 0 (select |c_old(#valid)| __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_data_~data~0.base)) (= (store |c_old(#memory_$Pointer$.offset)| __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_data_~data~0.base (store (select |c_old(#memory_$Pointer$.offset)| __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_data_~data~0.base) .cse0 0)) |c_#memory_$Pointer$.offset|)))) is different from true [2018-04-10 13:48:07,113 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 13:48:07,114 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 13:48:07,114 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-04-10 13:48:07,114 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-10 13:48:07,130 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-04-10 13:48:07,130 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:102, output treesize:96 [2018-04-10 13:48:07,293 WARN L1033 $PredicateComparison]: unable to prove that (exists ((__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_data_~data~0.base Int) (__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_data_~data~0.offset Int) (__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.base Int) (__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.offset Int) (|__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#t~ret14.base| Int) (|__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#t~ret14.offset| Int)) (let ((.cse3 (+ __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_data_~data~0.offset 4)) (.cse4 (+ __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.offset 4))) (and (= (let ((.cse0 (let ((.cse1 (let ((.cse2 (store |c_old(#memory_$Pointer$.offset)| __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.base (store (select |c_old(#memory_$Pointer$.offset)| __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.base) .cse4 (select (select |c_old(#memory_$Pointer$.offset)| |c___U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#in~pointerToList.base|) |c___U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#in~pointerToList.offset|))))) (store .cse2 __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_data_~data~0.base (store (select .cse2 __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_data_~data~0.base) .cse3 0))))) (store .cse1 __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.base (store (select .cse1 __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.base) __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.offset |__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#t~ret14.offset|))))) (store .cse0 |c___U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#in~pointerToList.base| (store (select .cse0 |c___U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#in~pointerToList.base|) |c___U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#in~pointerToList.offset| __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.offset))) |c_#memory_$Pointer$.offset|) (= (let ((.cse5 (let ((.cse6 (let ((.cse7 (store |c_old(#memory_$Pointer$.base)| __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.base (store (select |c_old(#memory_$Pointer$.base)| __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.base) .cse4 (select (select |c_old(#memory_$Pointer$.base)| |c___U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#in~pointerToList.base|) |c___U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#in~pointerToList.offset|))))) (store .cse7 __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_data_~data~0.base (store (select .cse7 __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_data_~data~0.base) .cse3 0))))) (store .cse6 __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.base (store (select .cse6 __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.base) __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.offset |__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#t~ret14.base|))))) (store .cse5 |c___U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#in~pointerToList.base| (store (select .cse5 |c___U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#in~pointerToList.base|) |c___U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#in~pointerToList.offset| __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.base))) |c_#memory_$Pointer$.base|) (<= 0 __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.offset) (not (= __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_data_~data~0.base __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.base)) (<= __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.offset 0)))) is different from true [2018-04-10 13:48:07,344 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 187 treesize of output 102 [2018-04-10 13:48:07,350 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 13:48:07,351 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 88 treesize of output 97 [2018-04-10 13:48:07,351 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-10 13:48:07,615 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 93 treesize of output 92 [2018-04-10 13:48:07,615 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-10 13:48:07,944 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 4 case distinctions, treesize of input 91 treesize of output 76 [2018-04-10 13:48:07,952 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 13:48:07,963 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 2 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 62 treesize of output 77 [2018-04-10 13:48:07,964 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-04-10 13:48:08,239 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 65 treesize of output 64 [2018-04-10 13:48:08,239 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-04-10 13:48:08,491 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 64 treesize of output 69 [2018-04-10 13:48:08,496 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 13:48:08,497 INFO L682 Elim1Store]: detected equality via solver [2018-04-10 13:48:08,502 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 54 treesize of output 66 [2018-04-10 13:48:08,502 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-04-10 13:48:08,645 INFO L682 Elim1Store]: detected equality via solver [2018-04-10 13:48:08,659 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 55 treesize of output 56 [2018-04-10 13:48:08,663 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 13:48:08,670 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 2 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 42 [2018-04-10 13:48:08,671 INFO L267 ElimStorePlain]: Start of recursive call 11: End of recursive call: and 1 xjuncts. [2018-04-10 13:48:08,691 INFO L267 ElimStorePlain]: Start of recursive call 10: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:48:08,752 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 37 [2018-04-10 13:48:08,764 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 13:48:08,765 INFO L682 Elim1Store]: detected equality via solver [2018-04-10 13:48:08,768 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 26 [2018-04-10 13:48:08,768 INFO L267 ElimStorePlain]: Start of recursive call 13: End of recursive call: and 1 xjuncts. [2018-04-10 13:48:08,786 INFO L267 ElimStorePlain]: Start of recursive call 12: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:48:08,849 INFO L267 ElimStorePlain]: Start of recursive call 8: 1 dim-1 vars, 3 dim-2 vars, End of recursive call: and 2 xjuncts. [2018-04-10 13:48:09,023 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 64 treesize of output 54 [2018-04-10 13:48:09,028 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 13:48:09,028 INFO L682 Elim1Store]: detected equality via solver [2018-04-10 13:48:09,035 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 35 [2018-04-10 13:48:09,035 INFO L267 ElimStorePlain]: Start of recursive call 15: End of recursive call: and 1 xjuncts. [2018-04-10 13:48:09,100 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 6 case distinctions, treesize of input 44 treesize of output 71 [2018-04-10 13:48:09,106 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 53 treesize of output 52 [2018-04-10 13:48:09,106 INFO L267 ElimStorePlain]: Start of recursive call 17: End of recursive call: and 1 xjuncts. [2018-04-10 13:48:09,253 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 13:48:09,253 INFO L682 Elim1Store]: detected equality via solver [2018-04-10 13:48:09,256 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 45 [2018-04-10 13:48:09,257 INFO L267 ElimStorePlain]: Start of recursive call 18: End of recursive call: and 1 xjuncts. [2018-04-10 13:48:09,324 INFO L267 ElimStorePlain]: Start of recursive call 16: 4 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-10 13:48:09,359 INFO L267 ElimStorePlain]: Start of recursive call 14: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 2 xjuncts. [2018-04-10 13:48:09,451 INFO L267 ElimStorePlain]: Start of recursive call 5: 2 dim-1 vars, 3 dim-2 vars, End of recursive call: and 2 xjuncts. [2018-04-10 13:48:09,590 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, 3 dim-2 vars, End of recursive call: and 2 xjuncts. [2018-04-10 13:48:09,663 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 187 treesize of output 102 [2018-04-10 13:48:09,667 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 13:48:09,667 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 88 treesize of output 97 [2018-04-10 13:48:09,667 INFO L267 ElimStorePlain]: Start of recursive call 20: End of recursive call: and 1 xjuncts. [2018-04-10 13:48:09,757 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 93 treesize of output 92 [2018-04-10 13:48:09,757 INFO L267 ElimStorePlain]: Start of recursive call 21: End of recursive call: and 1 xjuncts. [2018-04-10 13:48:09,879 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 4 case distinctions, treesize of input 91 treesize of output 76 [2018-04-10 13:48:09,884 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 69 treesize of output 68 [2018-04-10 13:48:09,884 INFO L267 ElimStorePlain]: Start of recursive call 23: End of recursive call: and 1 xjuncts. [2018-04-10 13:48:09,978 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 13:48:09,980 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 2 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 58 treesize of output 73 [2018-04-10 13:48:09,980 INFO L267 ElimStorePlain]: Start of recursive call 24: End of recursive call: and 1 xjuncts. [2018-04-10 13:48:10,077 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 67 treesize of output 57 [2018-04-10 13:48:10,081 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 13:48:10,082 INFO L682 Elim1Store]: detected equality via solver [2018-04-10 13:48:10,084 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 35 [2018-04-10 13:48:10,084 INFO L267 ElimStorePlain]: Start of recursive call 26: End of recursive call: and 1 xjuncts. [2018-04-10 13:48:10,108 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 41 [2018-04-10 13:48:10,116 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 21 treesize of output 26 [2018-04-10 13:48:10,117 INFO L267 ElimStorePlain]: Start of recursive call 28: End of recursive call: and 2 xjuncts. [2018-04-10 13:48:10,127 INFO L267 ElimStorePlain]: Start of recursive call 27: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-10 13:48:10,140 INFO L267 ElimStorePlain]: Start of recursive call 25: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 2 xjuncts. [2018-04-10 13:48:10,226 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 4 case distinctions, treesize of input 60 treesize of output 65 [2018-04-10 13:48:10,230 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 13:48:10,230 INFO L682 Elim1Store]: detected equality via solver [2018-04-10 13:48:10,232 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 50 treesize of output 62 [2018-04-10 13:48:10,233 INFO L267 ElimStorePlain]: Start of recursive call 30: End of recursive call: and 1 xjuncts. [2018-04-10 13:48:10,283 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 37 [2018-04-10 13:48:10,286 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 13:48:10,287 INFO L682 Elim1Store]: detected equality via solver [2018-04-10 13:48:10,289 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 26 [2018-04-10 13:48:10,289 INFO L267 ElimStorePlain]: Start of recursive call 32: End of recursive call: and 1 xjuncts. [2018-04-10 13:48:10,298 INFO L267 ElimStorePlain]: Start of recursive call 31: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:48:10,350 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 6 case distinctions, treesize of input 51 treesize of output 74 [2018-04-10 13:48:10,359 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 13:48:10,359 INFO L682 Elim1Store]: detected equality via solver [2018-04-10 13:48:10,382 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 2 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 4 case distinctions, treesize of input 49 treesize of output 83 [2018-04-10 13:48:10,383 INFO L267 ElimStorePlain]: Start of recursive call 34: End of recursive call: and 2 xjuncts. [2018-04-10 13:48:10,507 INFO L682 Elim1Store]: detected equality via solver [2018-04-10 13:48:10,508 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 13:48:10,511 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 44 [2018-04-10 13:48:10,511 INFO L267 ElimStorePlain]: Start of recursive call 35: End of recursive call: and 1 xjuncts. [2018-04-10 13:48:10,639 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 13:48:10,639 INFO L682 Elim1Store]: detected equality via solver [2018-04-10 13:48:10,643 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 2 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 55 [2018-04-10 13:48:10,643 INFO L267 ElimStorePlain]: Start of recursive call 36: End of recursive call: and 1 xjuncts. [2018-04-10 13:48:10,678 INFO L267 ElimStorePlain]: Start of recursive call 33: 4 dim-1 vars, End of recursive call: and 3 xjuncts. [2018-04-10 13:48:10,762 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 6 case distinctions, treesize of input 47 treesize of output 72 [2018-04-10 13:48:10,767 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 13:48:10,769 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 2 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 50 treesize of output 57 [2018-04-10 13:48:10,773 INFO L682 Elim1Store]: detected equality via solver [2018-04-10 13:48:10,775 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 29 [2018-04-10 13:48:10,775 INFO L267 ElimStorePlain]: Start of recursive call 39: End of recursive call: and 1 xjuncts. [2018-04-10 13:48:10,785 INFO L267 ElimStorePlain]: Start of recursive call 38: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 13:48:10,877 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 13:48:10,884 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 2 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 39 treesize of output 66 [2018-04-10 13:48:10,888 INFO L682 Elim1Store]: detected equality via solver [2018-04-10 13:48:10,890 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 56 treesize of output 66 [2018-04-10 13:48:10,891 INFO L267 ElimStorePlain]: Start of recursive call 41: End of recursive call: and 1 xjuncts. [2018-04-10 13:48:10,928 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 13:48:10,928 INFO L682 Elim1Store]: detected equality via solver [2018-04-10 13:48:10,937 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 51 treesize of output 99 [2018-04-10 13:48:10,938 INFO L267 ElimStorePlain]: Start of recursive call 42: End of recursive call: and 2 xjuncts. [2018-04-10 13:48:10,974 INFO L267 ElimStorePlain]: Start of recursive call 40: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-10 13:48:11,092 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 13:48:11,095 FATAL L292 ToolchainWalker]: The Plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction has thrown an exception: java.lang.AssertionError: var is still there: v_prenex_31 term size 30 at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.Elim1Store.elim1(Elim1Store.java:452) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimOneRec(ElimStorePlain.java:221) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimAllRec(ElimStorePlain.java:247) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimOneRec(ElimStorePlain.java:225) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimAllRec(ElimStorePlain.java:247) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimOneRec(ElimStorePlain.java:225) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimAllRec(ElimStorePlain.java:247) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimOneRec(ElimStorePlain.java:225) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimAllRec(ElimStorePlain.java:247) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimOneRec(ElimStorePlain.java:225) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimAllRec(ElimStorePlain.java:247) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.elimAllRec(ElimStorePlain.java:199) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.PartialQuantifierElimination.elim(PartialQuantifierElimination.java:270) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.PartialQuantifierElimination.tryToEliminate(PartialQuantifierElimination.java:101) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.predicates.IterativePredicateTransformer$QuantifierEliminationPostprocessor.postprocess(IterativePredicateTransformer.java:243) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.predicates.IterativePredicateTransformer.applyPostprocessors(IterativePredicateTransformer.java:445) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.predicates.IterativePredicateTransformer.computeStrongestPostconditionSequence(IterativePredicateTransformer.java:198) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.singletracecheck.TraceCheckSpWp.computeInterpolantsUsingUnsatCore(TraceCheckSpWp.java:283) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.singletracecheck.TraceCheckSpWp.computeInterpolants(TraceCheckSpWp.java:173) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.singletracecheck.TraceCheckSpWp.(TraceCheckSpWp.java:160) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceCheckConstructor.constructForwardBackward(TraceCheckConstructor.java:237) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceCheckConstructor.get(TraceCheckConstructor.java:185) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.MultiTrackRefinementStrategy.getTraceCheck(MultiTrackRefinementStrategy.java:222) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.BaseRefinementStrategy.checkFeasibility(BaseRefinementStrategy.java:231) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.BaseRefinementStrategy.executeStrategy(BaseRefinementStrategy.java:205) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceAbstractionRefinementEngine.(TraceAbstractionRefinementEngine.java:69) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.BasicCegarLoop.isCounterexampleFeasible(BasicCegarLoop.java:408) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterateInternal(AbstractCegarLoop.java:417) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterate(AbstractCegarLoop.java:363) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.iterate(TraceAbstractionStarter.java:304) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.runCegarLoops(TraceAbstractionStarter.java:150) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.(TraceAbstractionStarter.java:118) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver.finish(TraceAbstractionObserver.java:119) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runObserver(PluginConnector.java:168) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runTool(PluginConnector.java:151) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.run(PluginConnector.java:128) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.executePluginConnector(ToolchainWalker.java:232) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.processPlugin(ToolchainWalker.java:226) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walkUnprotected(ToolchainWalker.java:142) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walk(ToolchainWalker.java:104) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainManager$Toolchain.processToolchain(ToolchainManager.java:324) at de.uni_freiburg.informatik.ultimate.core.coreplugin.toolchain.DefaultToolchainJob.runToolchainDefault(DefaultToolchainJob.java:221) at de.uni_freiburg.informatik.ultimate.core.coreplugin.toolchain.BasicToolchainJob.run(BasicToolchainJob.java:134) at org.eclipse.core.internal.jobs.Worker.run(Worker.java:55) [2018-04-10 13:48:11,097 INFO L168 Benchmark]: Toolchain (without parser) took 138238.95 ms. Allocated memory was 405.3 MB in the beginning and 1.1 GB in the end (delta: 677.9 MB). Free memory was 338.4 MB in the beginning and 937.4 MB in the end (delta: -599.0 MB). Peak memory consumption was 639.5 MB. Max. memory is 5.3 GB. [2018-04-10 13:48:11,098 INFO L168 Benchmark]: CDTParser took 0.16 ms. Allocated memory is still 405.3 MB. Free memory is still 363.0 MB. There was no memory consumed. Max. memory is 5.3 GB. [2018-04-10 13:48:11,098 INFO L168 Benchmark]: CACSL2BoogieTranslator took 239.25 ms. Allocated memory is still 405.3 MB. Free memory was 337.0 MB in the beginning and 310.5 MB in the end (delta: 26.5 MB). Peak memory consumption was 26.5 MB. Max. memory is 5.3 GB. [2018-04-10 13:48:11,099 INFO L168 Benchmark]: Boogie Preprocessor took 38.36 ms. Allocated memory is still 405.3 MB. Free memory was 310.5 MB in the beginning and 307.9 MB in the end (delta: 2.6 MB). Peak memory consumption was 2.6 MB. Max. memory is 5.3 GB. [2018-04-10 13:48:11,099 INFO L168 Benchmark]: RCFGBuilder took 460.20 ms. Allocated memory was 405.3 MB in the beginning and 611.3 MB in the end (delta: 206.0 MB). Free memory was 307.9 MB in the beginning and 532.3 MB in the end (delta: -224.4 MB). Peak memory consumption was 23.8 MB. Max. memory is 5.3 GB. [2018-04-10 13:48:11,099 INFO L168 Benchmark]: TraceAbstraction took 137498.66 ms. Allocated memory was 611.3 MB in the beginning and 1.1 GB in the end (delta: 471.9 MB). Free memory was 532.3 MB in the beginning and 937.4 MB in the end (delta: -405.1 MB). Peak memory consumption was 627.4 MB. Max. memory is 5.3 GB. [2018-04-10 13:48:11,100 INFO L344 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.16 ms. Allocated memory is still 405.3 MB. Free memory is still 363.0 MB. There was no memory consumed. Max. memory is 5.3 GB. * CACSL2BoogieTranslator took 239.25 ms. Allocated memory is still 405.3 MB. Free memory was 337.0 MB in the beginning and 310.5 MB in the end (delta: 26.5 MB). Peak memory consumption was 26.5 MB. Max. memory is 5.3 GB. * Boogie Preprocessor took 38.36 ms. Allocated memory is still 405.3 MB. Free memory was 310.5 MB in the beginning and 307.9 MB in the end (delta: 2.6 MB). Peak memory consumption was 2.6 MB. Max. memory is 5.3 GB. * RCFGBuilder took 460.20 ms. Allocated memory was 405.3 MB in the beginning and 611.3 MB in the end (delta: 206.0 MB). Free memory was 307.9 MB in the beginning and 532.3 MB in the end (delta: -224.4 MB). Peak memory consumption was 23.8 MB. Max. memory is 5.3 GB. * TraceAbstraction took 137498.66 ms. Allocated memory was 611.3 MB in the beginning and 1.1 GB in the end (delta: 471.9 MB). Free memory was 532.3 MB in the beginning and 937.4 MB in the end (delta: -405.1 MB). Peak memory consumption was 627.4 MB. Max. memory is 5.3 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - ExceptionOrErrorResult: AssertionError: var is still there: v_prenex_31 term size 30 de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: AssertionError: var is still there: v_prenex_31 term size 30: de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.Elim1Store.elim1(Elim1Store.java:452) RESULT: Ultimate could not prove your program: Toolchain returned no result. Written .csv to /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/optional_data_creation_test04_true-valid-memsafety.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Camel.epf_AutomizerC.xml/Csv-Benchmark-0-2018-04-10_13-48-11-105.csv Received shutdown request...