java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/cade18-smtinterpol/svcomp-DerefFreeMemtrack-32bit-Automizer_Camel.epf -i ../../../trunk/examples/svcomp/forester-heap/sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i
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This is Ultimate 0.1.23-666feb3-m
[2018-04-10 13:59:38,750 INFO L170 SettingsManager]: Resetting all preferences to default values...
[2018-04-10 13:59:38,752 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values
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[2018-04-10 13:59:38,761 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values
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[2018-04-10 13:59:38,762 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values
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[2018-04-10 13:59:38,766 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring...
[2018-04-10 13:59:38,766 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values
[2018-04-10 13:59:38,767 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values
[2018-04-10 13:59:38,767 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values
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[2018-04-10 13:59:38,769 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values
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[2018-04-10 13:59:38,772 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values
[2018-04-10 13:59:38,772 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values
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[2018-04-10 13:59:38,776 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values
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[2018-04-10 13:59:38,777 INFO L181 SettingsManager]: Finished resetting all preferences to default values...
[2018-04-10 13:59:38,777 INFO L98 SettingsManager]: Beginning loading settings from /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/cade18-smtinterpol/svcomp-DerefFreeMemtrack-32bit-Automizer_Camel.epf
[2018-04-10 13:59:38,786 INFO L110 SettingsManager]: Loading preferences was successful
[2018-04-10 13:59:38,786 INFO L112 SettingsManager]: Preferences different from defaults after loading the file:
[2018-04-10 13:59:38,787 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults:
[2018-04-10 13:59:38,787 INFO L133 SettingsManager]: * Create parallel compositions if possible=false
[2018-04-10 13:59:38,787 INFO L133 SettingsManager]: * Use SBE=true
[2018-04-10 13:59:38,787 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults:
[2018-04-10 13:59:38,787 INFO L133 SettingsManager]: * sizeof long=4
[2018-04-10 13:59:38,787 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false
[2018-04-10 13:59:38,788 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true
[2018-04-10 13:59:38,788 INFO L133 SettingsManager]: * sizeof POINTER=4
[2018-04-10 13:59:38,788 INFO L133 SettingsManager]: * Check division by zero=IGNORE
[2018-04-10 13:59:38,788 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true
[2018-04-10 13:59:38,788 INFO L133 SettingsManager]: * Bitprecise bitfields=true
[2018-04-10 13:59:38,788 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE
[2018-04-10 13:59:38,788 INFO L133 SettingsManager]: * sizeof long double=12
[2018-04-10 13:59:38,788 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults:
[2018-04-10 13:59:38,789 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements
[2018-04-10 13:59:38,789 INFO L133 SettingsManager]: * To the following directory=./dump/
[2018-04-10 13:59:38,789 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode
[2018-04-10 13:59:38,789 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000
[2018-04-10 13:59:38,789 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults:
[2018-04-10 13:59:38,789 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK
[2018-04-10 13:59:38,789 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP
[2018-04-10 13:59:38,789 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL
[2018-04-10 13:59:38,809 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp
[2018-04-10 13:59:38,818 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully (re)initialized
[2018-04-10 13:59:38,820 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected.
[2018-04-10 13:59:38,822 INFO L271 PluginConnector]: Initializing CDTParser...
[2018-04-10 13:59:38,822 INFO L276 PluginConnector]: CDTParser initialized
[2018-04-10 13:59:38,823 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/forester-heap/sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i
[2018-04-10 13:59:39,111 INFO L225 CDTParser]: Created temporary CDT project at /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/data/FLAGca0729930
[2018-04-10 13:59:39,249 INFO L287 CDTParser]: IsIndexed: true
[2018-04-10 13:59:39,249 INFO L288 CDTParser]: Found 1 translation units.
[2018-04-10 13:59:39,250 INFO L168 CDTParser]: Scanning sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i
[2018-04-10 13:59:39,259 INFO L210 ultiparseSymbolTable]: Include resolver:
[2018-04-10 13:59:39,259 INFO L215 ultiparseSymbolTable]: <empty include resolver>
[2018-04-10 13:59:39,259 INFO L218 ultiparseSymbolTable]: Function table:
[2018-04-10 13:59:39,259 INFO L221 ultiparseSymbolTable]: Function definition of null ('main') in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i
[2018-04-10 13:59:39,259 INFO L227 ultiparseSymbolTable]: Global variable table:
[2018-04-10 13:59:39,259 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__pthread_rwlockattr_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i
[2018-04-10 13:59:39,259 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____gid_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i
[2018-04-10 13:59:39,260 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____uint16_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i
[2018-04-10 13:59:39,260 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__clock_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i
[2018-04-10 13:59:39,260 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__u_char in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i
[2018-04-10 13:59:39,260 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____int16_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i
[2018-04-10 13:59:39,260 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____u_long in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i
[2018-04-10 13:59:39,260 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__blkcnt_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i
[2018-04-10 13:59:39,260 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__daddr_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i
[2018-04-10 13:59:39,260 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____loff_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i
[2018-04-10 13:59:39,260 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__suseconds_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i
[2018-04-10 13:59:39,261 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__u_int32_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i
[2018-04-10 13:59:39,261 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____sigset_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i
[2018-04-10 13:59:39,261 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__fd_mask in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i
[2018-04-10 13:59:39,261 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__sigset_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i
[2018-04-10 13:59:39,261 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____ino_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i
[2018-04-10 13:59:39,261 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__pthread_spinlock_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i
[2018-04-10 13:59:39,261 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__SLL in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i
[2018-04-10 13:59:39,261 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____caddr_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i
[2018-04-10 13:59:39,261 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____off_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i
[2018-04-10 13:59:39,261 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____ino64_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i
[2018-04-10 13:59:39,262 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__u_long in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i
[2018-04-10 13:59:39,262 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____fsid_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i
[2018-04-10 13:59:39,262 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__ulong in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i
[2018-04-10 13:59:39,262 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____uint32_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i
[2018-04-10 13:59:39,262 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__uid_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i
[2018-04-10 13:59:39,262 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__fsblkcnt_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i
[2018-04-10 13:59:39,262 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__lldiv_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i
[2018-04-10 13:59:39,262 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__wchar_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i
[2018-04-10 13:59:39,262 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__int16_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i
[2018-04-10 13:59:39,263 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__blksize_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i
[2018-04-10 13:59:39,263 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____clockid_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i
[2018-04-10 13:59:39,263 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__clockid_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i
[2018-04-10 13:59:39,263 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____pthread_slist_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i
[2018-04-10 13:59:39,263 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____int32_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i
[2018-04-10 13:59:39,263 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____syscall_ulong_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i
[2018-04-10 13:59:39,263 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____sig_atomic_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i
[2018-04-10 13:59:39,263 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__div_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i
[2018-04-10 13:59:39,263 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__pthread_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i
[2018-04-10 13:59:39,263 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____id_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i
[2018-04-10 13:59:39,264 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____fd_mask in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i
[2018-04-10 13:59:39,264 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__quad_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i
[2018-04-10 13:59:39,264 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__u_int8_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i
[2018-04-10 13:59:39,264 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__u_int16_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i
[2018-04-10 13:59:39,264 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__pthread_cond_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i
[2018-04-10 13:59:39,264 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____fsblkcnt64_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i
[2018-04-10 13:59:39,264 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____pid_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i
[2018-04-10 13:59:39,264 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____rlim_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i
[2018-04-10 13:59:39,264 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____timer_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i
[2018-04-10 13:59:39,264 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__pthread_mutexattr_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i
[2018-04-10 13:59:39,264 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__pthread_attr_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i
[2018-04-10 13:59:39,264 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__u_int in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i
[2018-04-10 13:59:39,264 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____u_char in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i
[2018-04-10 13:59:39,264 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____u_quad_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i
[2018-04-10 13:59:39,264 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__pthread_barrier_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i
[2018-04-10 13:59:39,264 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____quad_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i
[2018-04-10 13:59:39,264 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____off64_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i
[2018-04-10 13:59:39,265 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____suseconds_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i
[2018-04-10 13:59:39,265 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____fsfilcnt64_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i
[2018-04-10 13:59:39,265 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__u_int64_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i
[2018-04-10 13:59:39,265 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____blkcnt64_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i
[2018-04-10 13:59:39,265 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__pid_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i
[2018-04-10 13:59:39,265 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__ldiv_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i
[2018-04-10 13:59:39,265 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__ino_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i
[2018-04-10 13:59:39,265 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__fsfilcnt_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i
[2018-04-10 13:59:39,265 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____ssize_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i
[2018-04-10 13:59:39,265 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____socklen_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i
[2018-04-10 13:59:39,265 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____mode_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i
[2018-04-10 13:59:39,265 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__int32_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i
[2018-04-10 13:59:39,265 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__idtype_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i
[2018-04-10 13:59:39,265 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____int8_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i
[2018-04-10 13:59:39,265 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____nlink_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i
[2018-04-10 13:59:39,265 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____intptr_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i
[2018-04-10 13:59:39,265 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__timer_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i
[2018-04-10 13:59:39,265 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__size_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i
[2018-04-10 13:59:39,265 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__off_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i
[2018-04-10 13:59:39,266 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__key_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i
[2018-04-10 13:59:39,266 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____uint64_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i
[2018-04-10 13:59:39,266 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__pthread_once_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i
[2018-04-10 13:59:39,266 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____fsword_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i
[2018-04-10 13:59:39,266 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__caddr_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i
[2018-04-10 13:59:39,266 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__mode_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i
[2018-04-10 13:59:39,266 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____u_short in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i
[2018-04-10 13:59:39,266 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__nlink_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i
[2018-04-10 13:59:39,266 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__u_short in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i
[2018-04-10 13:59:39,266 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____uid_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i
[2018-04-10 13:59:39,266 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__gid_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i
[2018-04-10 13:59:39,266 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__ssize_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i
[2018-04-10 13:59:39,266 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__uint in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i
[2018-04-10 13:59:39,267 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__loff_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i
[2018-04-10 13:59:39,267 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____useconds_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i
[2018-04-10 13:59:39,267 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__fd_set in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i
[2018-04-10 13:59:39,267 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__pthread_condattr_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i
[2018-04-10 13:59:39,267 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__dev_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i
[2018-04-10 13:59:39,267 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____rlim64_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i
[2018-04-10 13:59:39,267 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____blksize_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i
[2018-04-10 13:59:39,267 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__id_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i
[2018-04-10 13:59:39,267 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____qaddr_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i
[2018-04-10 13:59:39,267 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____clock_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i
[2018-04-10 13:59:39,267 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__pthread_key_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i
[2018-04-10 13:59:39,268 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____dev_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i
[2018-04-10 13:59:39,268 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____fsblkcnt_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i
[2018-04-10 13:59:39,268 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__fsid_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i
[2018-04-10 13:59:39,268 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____u_int in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i
[2018-04-10 13:59:39,268 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____blkcnt_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i
[2018-04-10 13:59:39,268 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__time_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i
[2018-04-10 13:59:39,268 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__pthread_rwlock_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i
[2018-04-10 13:59:39,268 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__pthread_mutex_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i
[2018-04-10 13:59:39,268 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____fsfilcnt_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i
[2018-04-10 13:59:39,268 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____syscall_slong_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i
[2018-04-10 13:59:39,268 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__pthread_barrierattr_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i
[2018-04-10 13:59:39,269 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__register_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i
[2018-04-10 13:59:39,269 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__int64_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i
[2018-04-10 13:59:39,269 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____daddr_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i
[2018-04-10 13:59:39,269 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____int64_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i
[2018-04-10 13:59:39,269 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__int8_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i
[2018-04-10 13:59:39,269 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____time_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i
[2018-04-10 13:59:39,269 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____uint8_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i
[2018-04-10 13:59:39,269 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____key_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i
[2018-04-10 13:59:39,269 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__u_quad_t in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i
[2018-04-10 13:59:39,269 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__ushort in sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i
[2018-04-10 13:59:39,282 INFO L330 CDTParser]: Deleted temporary CDT project at /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/data/FLAGca0729930
[2018-04-10 13:59:39,285 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] #######################
[2018-04-10 13:59:39,286 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements.
[2018-04-10 13:59:39,287 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator----------------------------
[2018-04-10 13:59:39,287 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator...
[2018-04-10 13:59:39,290 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized
[2018-04-10 13:59:39,291 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 10.04 01:59:39" (1/1) ...
[2018-04-10 13:59:39,292 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@682be9a4 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.04 01:59:39, skipping insertion in model container
[2018-04-10 13:59:39,292 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 10.04 01:59:39" (1/1) ...
[2018-04-10 13:59:39,304 INFO L167 Dispatcher]: Using SV-COMP mode
[2018-04-10 13:59:39,331 INFO L167 Dispatcher]: Using SV-COMP mode
[2018-04-10 13:59:39,483 INFO L175 PostProcessor]: Settings: Checked method=main
[2018-04-10 13:59:39,530 INFO L175 PostProcessor]: Settings: Checked method=main
[2018-04-10 13:59:39,536 INFO L100 SccComputation]: Graph consists of 0 InCaSumBalls and 115 non ball SCCs. Number of states in SCCs 115.
[2018-04-10 13:59:39,567 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.04 01:59:39 WrapperNode
[2018-04-10 13:59:39,567 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator----------------------------
[2018-04-10 13:59:39,568 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor----------------------------
[2018-04-10 13:59:39,568 INFO L271 PluginConnector]: Initializing Boogie Preprocessor...
[2018-04-10 13:59:39,568 INFO L276 PluginConnector]: Boogie Preprocessor initialized
[2018-04-10 13:59:39,577 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.04 01:59:39" (1/1) ...
[2018-04-10 13:59:39,577 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.04 01:59:39" (1/1) ...
[2018-04-10 13:59:39,588 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.04 01:59:39" (1/1) ...
[2018-04-10 13:59:39,589 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.04 01:59:39" (1/1) ...
[2018-04-10 13:59:39,597 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.04 01:59:39" (1/1) ...
[2018-04-10 13:59:39,603 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.04 01:59:39" (1/1) ...
[2018-04-10 13:59:39,605 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.04 01:59:39" (1/1) ...
[2018-04-10 13:59:39,609 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor----------------------------
[2018-04-10 13:59:39,610 INFO L113 PluginConnector]: ------------------------RCFGBuilder----------------------------
[2018-04-10 13:59:39,610 INFO L271 PluginConnector]: Initializing RCFGBuilder...
[2018-04-10 13:59:39,610 INFO L276 PluginConnector]: RCFGBuilder initialized
[2018-04-10 13:59:39,611 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.04 01:59:39" (1/1) ...
No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3
Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null)
Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000
[2018-04-10 13:59:39,726 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init
[2018-04-10 13:59:39,726 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start
[2018-04-10 13:59:39,726 INFO L136 BoogieDeclarations]: Found implementation of procedure main
[2018-04-10 13:59:39,727 INFO L128 BoogieDeclarations]: Found specification of procedure __ctype_get_mb_cur_max
[2018-04-10 13:59:39,727 INFO L128 BoogieDeclarations]: Found specification of procedure atof
[2018-04-10 13:59:39,727 INFO L128 BoogieDeclarations]: Found specification of procedure atoi
[2018-04-10 13:59:39,727 INFO L128 BoogieDeclarations]: Found specification of procedure atol
[2018-04-10 13:59:39,727 INFO L128 BoogieDeclarations]: Found specification of procedure atoll
[2018-04-10 13:59:39,727 INFO L128 BoogieDeclarations]: Found specification of procedure strtod
[2018-04-10 13:59:39,727 INFO L128 BoogieDeclarations]: Found specification of procedure strtof
[2018-04-10 13:59:39,727 INFO L128 BoogieDeclarations]: Found specification of procedure strtold
[2018-04-10 13:59:39,727 INFO L128 BoogieDeclarations]: Found specification of procedure strtol
[2018-04-10 13:59:39,728 INFO L128 BoogieDeclarations]: Found specification of procedure strtoul
[2018-04-10 13:59:39,728 INFO L128 BoogieDeclarations]: Found specification of procedure strtoq
[2018-04-10 13:59:39,728 INFO L128 BoogieDeclarations]: Found specification of procedure strtouq
[2018-04-10 13:59:39,728 INFO L128 BoogieDeclarations]: Found specification of procedure strtoll
[2018-04-10 13:59:39,728 INFO L128 BoogieDeclarations]: Found specification of procedure strtoull
[2018-04-10 13:59:39,728 INFO L128 BoogieDeclarations]: Found specification of procedure l64a
[2018-04-10 13:59:39,728 INFO L128 BoogieDeclarations]: Found specification of procedure a64l
[2018-04-10 13:59:39,728 INFO L128 BoogieDeclarations]: Found specification of procedure select
[2018-04-10 13:59:39,728 INFO L128 BoogieDeclarations]: Found specification of procedure pselect
[2018-04-10 13:59:39,728 INFO L128 BoogieDeclarations]: Found specification of procedure gnu_dev_major
[2018-04-10 13:59:39,729 INFO L128 BoogieDeclarations]: Found specification of procedure gnu_dev_minor
[2018-04-10 13:59:39,729 INFO L128 BoogieDeclarations]: Found specification of procedure gnu_dev_makedev
[2018-04-10 13:59:39,729 INFO L128 BoogieDeclarations]: Found specification of procedure random
[2018-04-10 13:59:39,729 INFO L128 BoogieDeclarations]: Found specification of procedure srandom
[2018-04-10 13:59:39,729 INFO L128 BoogieDeclarations]: Found specification of procedure initstate
[2018-04-10 13:59:39,729 INFO L128 BoogieDeclarations]: Found specification of procedure setstate
[2018-04-10 13:59:39,729 INFO L128 BoogieDeclarations]: Found specification of procedure random_r
[2018-04-10 13:59:39,729 INFO L128 BoogieDeclarations]: Found specification of procedure srandom_r
[2018-04-10 13:59:39,729 INFO L128 BoogieDeclarations]: Found specification of procedure initstate_r
[2018-04-10 13:59:39,729 INFO L128 BoogieDeclarations]: Found specification of procedure setstate_r
[2018-04-10 13:59:39,730 INFO L128 BoogieDeclarations]: Found specification of procedure rand
[2018-04-10 13:59:39,730 INFO L128 BoogieDeclarations]: Found specification of procedure srand
[2018-04-10 13:59:39,730 INFO L128 BoogieDeclarations]: Found specification of procedure rand_r
[2018-04-10 13:59:39,730 INFO L128 BoogieDeclarations]: Found specification of procedure drand48
[2018-04-10 13:59:39,730 INFO L128 BoogieDeclarations]: Found specification of procedure erand48
[2018-04-10 13:59:39,730 INFO L128 BoogieDeclarations]: Found specification of procedure lrand48
[2018-04-10 13:59:39,730 INFO L128 BoogieDeclarations]: Found specification of procedure nrand48
[2018-04-10 13:59:39,730 INFO L128 BoogieDeclarations]: Found specification of procedure mrand48
[2018-04-10 13:59:39,730 INFO L128 BoogieDeclarations]: Found specification of procedure jrand48
[2018-04-10 13:59:39,731 INFO L128 BoogieDeclarations]: Found specification of procedure srand48
[2018-04-10 13:59:39,731 INFO L128 BoogieDeclarations]: Found specification of procedure seed48
[2018-04-10 13:59:39,731 INFO L128 BoogieDeclarations]: Found specification of procedure lcong48
[2018-04-10 13:59:39,731 INFO L128 BoogieDeclarations]: Found specification of procedure drand48_r
[2018-04-10 13:59:39,731 INFO L128 BoogieDeclarations]: Found specification of procedure erand48_r
[2018-04-10 13:59:39,731 INFO L128 BoogieDeclarations]: Found specification of procedure lrand48_r
[2018-04-10 13:59:39,731 INFO L128 BoogieDeclarations]: Found specification of procedure nrand48_r
[2018-04-10 13:59:39,731 INFO L128 BoogieDeclarations]: Found specification of procedure mrand48_r
[2018-04-10 13:59:39,731 INFO L128 BoogieDeclarations]: Found specification of procedure jrand48_r
[2018-04-10 13:59:39,731 INFO L128 BoogieDeclarations]: Found specification of procedure srand48_r
[2018-04-10 13:59:39,731 INFO L128 BoogieDeclarations]: Found specification of procedure seed48_r
[2018-04-10 13:59:39,732 INFO L128 BoogieDeclarations]: Found specification of procedure lcong48_r
[2018-04-10 13:59:39,732 INFO L128 BoogieDeclarations]: Found specification of procedure malloc
[2018-04-10 13:59:39,732 INFO L128 BoogieDeclarations]: Found specification of procedure calloc
[2018-04-10 13:59:39,732 INFO L128 BoogieDeclarations]: Found specification of procedure realloc
[2018-04-10 13:59:39,732 INFO L128 BoogieDeclarations]: Found specification of procedure free
[2018-04-10 13:59:39,732 INFO L128 BoogieDeclarations]: Found specification of procedure cfree
[2018-04-10 13:59:39,732 INFO L128 BoogieDeclarations]: Found specification of procedure alloca
[2018-04-10 13:59:39,732 INFO L128 BoogieDeclarations]: Found specification of procedure valloc
[2018-04-10 13:59:39,732 INFO L128 BoogieDeclarations]: Found specification of procedure posix_memalign
[2018-04-10 13:59:39,732 INFO L128 BoogieDeclarations]: Found specification of procedure aligned_alloc
[2018-04-10 13:59:39,733 INFO L128 BoogieDeclarations]: Found specification of procedure abort
[2018-04-10 13:59:39,733 INFO L128 BoogieDeclarations]: Found specification of procedure atexit
[2018-04-10 13:59:39,733 INFO L128 BoogieDeclarations]: Found specification of procedure at_quick_exit
[2018-04-10 13:59:39,733 INFO L128 BoogieDeclarations]: Found specification of procedure on_exit
[2018-04-10 13:59:39,733 INFO L128 BoogieDeclarations]: Found specification of procedure exit
[2018-04-10 13:59:39,733 INFO L128 BoogieDeclarations]: Found specification of procedure quick_exit
[2018-04-10 13:59:39,733 INFO L128 BoogieDeclarations]: Found specification of procedure _Exit
[2018-04-10 13:59:39,733 INFO L128 BoogieDeclarations]: Found specification of procedure getenv
[2018-04-10 13:59:39,733 INFO L128 BoogieDeclarations]: Found specification of procedure putenv
[2018-04-10 13:59:39,733 INFO L128 BoogieDeclarations]: Found specification of procedure setenv
[2018-04-10 13:59:39,733 INFO L128 BoogieDeclarations]: Found specification of procedure unsetenv
[2018-04-10 13:59:39,734 INFO L128 BoogieDeclarations]: Found specification of procedure clearenv
[2018-04-10 13:59:39,734 INFO L128 BoogieDeclarations]: Found specification of procedure mktemp
[2018-04-10 13:59:39,734 INFO L128 BoogieDeclarations]: Found specification of procedure mkstemp
[2018-04-10 13:59:39,734 INFO L128 BoogieDeclarations]: Found specification of procedure mkstemps
[2018-04-10 13:59:39,734 INFO L128 BoogieDeclarations]: Found specification of procedure mkdtemp
[2018-04-10 13:59:39,734 INFO L128 BoogieDeclarations]: Found specification of procedure system
[2018-04-10 13:59:39,734 INFO L128 BoogieDeclarations]: Found specification of procedure realpath
[2018-04-10 13:59:39,734 INFO L128 BoogieDeclarations]: Found specification of procedure bsearch
[2018-04-10 13:59:39,734 INFO L128 BoogieDeclarations]: Found specification of procedure qsort
[2018-04-10 13:59:39,734 INFO L128 BoogieDeclarations]: Found specification of procedure abs
[2018-04-10 13:59:39,734 INFO L128 BoogieDeclarations]: Found specification of procedure labs
[2018-04-10 13:59:39,734 INFO L128 BoogieDeclarations]: Found specification of procedure llabs
[2018-04-10 13:59:39,734 INFO L128 BoogieDeclarations]: Found specification of procedure div
[2018-04-10 13:59:39,734 INFO L128 BoogieDeclarations]: Found specification of procedure ldiv
[2018-04-10 13:59:39,734 INFO L128 BoogieDeclarations]: Found specification of procedure lldiv
[2018-04-10 13:59:39,735 INFO L128 BoogieDeclarations]: Found specification of procedure ecvt
[2018-04-10 13:59:39,735 INFO L128 BoogieDeclarations]: Found specification of procedure fcvt
[2018-04-10 13:59:39,735 INFO L128 BoogieDeclarations]: Found specification of procedure gcvt
[2018-04-10 13:59:39,735 INFO L128 BoogieDeclarations]: Found specification of procedure qecvt
[2018-04-10 13:59:39,735 INFO L128 BoogieDeclarations]: Found specification of procedure qfcvt
[2018-04-10 13:59:39,735 INFO L128 BoogieDeclarations]: Found specification of procedure qgcvt
[2018-04-10 13:59:39,735 INFO L128 BoogieDeclarations]: Found specification of procedure ecvt_r
[2018-04-10 13:59:39,735 INFO L128 BoogieDeclarations]: Found specification of procedure fcvt_r
[2018-04-10 13:59:39,735 INFO L128 BoogieDeclarations]: Found specification of procedure qecvt_r
[2018-04-10 13:59:39,735 INFO L128 BoogieDeclarations]: Found specification of procedure qfcvt_r
[2018-04-10 13:59:39,735 INFO L128 BoogieDeclarations]: Found specification of procedure mblen
[2018-04-10 13:59:39,735 INFO L128 BoogieDeclarations]: Found specification of procedure mbtowc
[2018-04-10 13:59:39,736 INFO L128 BoogieDeclarations]: Found specification of procedure wctomb
[2018-04-10 13:59:39,736 INFO L128 BoogieDeclarations]: Found specification of procedure mbstowcs
[2018-04-10 13:59:39,736 INFO L128 BoogieDeclarations]: Found specification of procedure wcstombs
[2018-04-10 13:59:39,736 INFO L128 BoogieDeclarations]: Found specification of procedure rpmatch
[2018-04-10 13:59:39,736 INFO L128 BoogieDeclarations]: Found specification of procedure getsubopt
[2018-04-10 13:59:39,736 INFO L128 BoogieDeclarations]: Found specification of procedure getloadavg
[2018-04-10 13:59:39,736 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int
[2018-04-10 13:59:39,736 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_error
[2018-04-10 13:59:39,736 INFO L128 BoogieDeclarations]: Found specification of procedure main
[2018-04-10 13:59:39,736 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc
[2018-04-10 13:59:39,737 INFO L128 BoogieDeclarations]: Found specification of procedure write~$Pointer$
[2018-04-10 13:59:39,737 INFO L128 BoogieDeclarations]: Found specification of procedure write~int
[2018-04-10 13:59:39,737 INFO L128 BoogieDeclarations]: Found specification of procedure read~$Pointer$
[2018-04-10 13:59:39,737 INFO L128 BoogieDeclarations]: Found specification of procedure read~int
[2018-04-10 13:59:39,737 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc
[2018-04-10 13:59:39,737 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init
[2018-04-10 13:59:39,737 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start
[2018-04-10 13:59:39,737 INFO L128 BoogieDeclarations]: Found specification of procedure write~unchecked~int
[2018-04-10 13:59:40,105 INFO L259 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start)
[2018-04-10 13:59:40,106 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 10.04 01:59:40 BoogieIcfgContainer
[2018-04-10 13:59:40,106 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder----------------------------
[2018-04-10 13:59:40,106 INFO L113 PluginConnector]: ------------------------TraceAbstraction----------------------------
[2018-04-10 13:59:40,106 INFO L271 PluginConnector]: Initializing TraceAbstraction...
[2018-04-10 13:59:40,109 INFO L276 PluginConnector]: TraceAbstraction initialized
[2018-04-10 13:59:40,109 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 10.04 01:59:39" (1/3) ...
[2018-04-10 13:59:40,109 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@455a28d0 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 10.04 01:59:40, skipping insertion in model container
[2018-04-10 13:59:40,109 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.04 01:59:39" (2/3) ...
[2018-04-10 13:59:40,110 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@455a28d0 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 10.04 01:59:40, skipping insertion in model container
[2018-04-10 13:59:40,110 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 10.04 01:59:40" (3/3) ...
[2018-04-10 13:59:40,111 INFO L107 eAbstractionObserver]: Analyzing ICFG sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i
[2018-04-10 13:59:40,117 INFO L131 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION
[2018-04-10 13:59:40,123 INFO L143 ceAbstractionStarter]: Appying trace abstraction to program that has 43 error locations.
[2018-04-10 13:59:40,149 INFO L128 ementStrategyFactory]: Using default assertion order modulation
[2018-04-10 13:59:40,150 INFO L369 AbstractCegarLoop]: Interprodecural is true
[2018-04-10 13:59:40,150 INFO L370 AbstractCegarLoop]: Hoare is false
[2018-04-10 13:59:40,150 INFO L371 AbstractCegarLoop]: Compute interpolants for FPandBP
[2018-04-10 13:59:40,150 INFO L372 AbstractCegarLoop]: Backedges is TWOTRACK
[2018-04-10 13:59:40,150 INFO L373 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION
[2018-04-10 13:59:40,150 INFO L374 AbstractCegarLoop]: Difference is false
[2018-04-10 13:59:40,150 INFO L375 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA
[2018-04-10 13:59:40,150 INFO L380 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce========
[2018-04-10 13:59:40,151 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure
[2018-04-10 13:59:40,161 INFO L276 IsEmpty]: Start isEmpty. Operand 111 states.
[2018-04-10 13:59:40,169 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 9
[2018-04-10 13:59:40,169 INFO L347 BasicCegarLoop]: Found error trace
[2018-04-10 13:59:40,169 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1]
[2018-04-10 13:59:40,170 INFO L408 AbstractCegarLoop]: === Iteration 1 === [mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr42EnsuresViolationMEMORY_LEAK, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr31RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr39RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr40AssertViolationMEMORY_FREE, mainErr41AssertViolationMEMORY_FREE, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr30RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr34RequiresViolation, mainErr4RequiresViolation, mainErr14RequiresViolation, mainErr37RequiresViolation]===
[2018-04-10 13:59:40,172 INFO L82 PathProgramCache]: Analyzing trace with hash -1982669053, now seen corresponding path program 1 times
[2018-04-10 13:59:40,173 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS
[2018-04-10 13:59:40,174 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy
[2018-04-10 13:59:40,220 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-04-10 13:59:40,220 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-04-10 13:59:40,220 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-04-10 13:59:40,248 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-04-10 13:59:40,254 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-04-10 13:59:40,310 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-04-10 13:59:40,312 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2018-04-10 13:59:40,312 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3
[2018-04-10 13:59:40,314 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states
[2018-04-10 13:59:40,322 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants.
[2018-04-10 13:59:40,323 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12
[2018-04-10 13:59:40,324 INFO L87 Difference]: Start difference. First operand 111 states. Second operand 4 states.
[2018-04-10 13:59:40,497 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-04-10 13:59:40,497 INFO L93 Difference]: Finished difference Result 156 states and 166 transitions.
[2018-04-10 13:59:40,498 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states.
[2018-04-10 13:59:40,499 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 8
[2018-04-10 13:59:40,499 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-04-10 13:59:40,509 INFO L225 Difference]: With dead ends: 156
[2018-04-10 13:59:40,513 INFO L226 Difference]: Without dead ends: 147
[2018-04-10 13:59:40,515 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20
[2018-04-10 13:59:40,531 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 147 states.
[2018-04-10 13:59:40,551 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 147 to 103.
[2018-04-10 13:59:40,552 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 103 states.
[2018-04-10 13:59:40,554 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 103 states to 103 states and 109 transitions.
[2018-04-10 13:59:40,555 INFO L78 Accepts]: Start accepts. Automaton has 103 states and 109 transitions. Word has length 8
[2018-04-10 13:59:40,555 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-04-10 13:59:40,556 INFO L459 AbstractCegarLoop]: Abstraction has 103 states and 109 transitions.
[2018-04-10 13:59:40,556 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states.
[2018-04-10 13:59:40,556 INFO L276 IsEmpty]: Start isEmpty. Operand 103 states and 109 transitions.
[2018-04-10 13:59:40,556 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 9
[2018-04-10 13:59:40,556 INFO L347 BasicCegarLoop]: Found error trace
[2018-04-10 13:59:40,557 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1]
[2018-04-10 13:59:40,557 INFO L408 AbstractCegarLoop]: === Iteration 2 === [mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr42EnsuresViolationMEMORY_LEAK, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr31RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr39RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr40AssertViolationMEMORY_FREE, mainErr41AssertViolationMEMORY_FREE, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr30RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr34RequiresViolation, mainErr4RequiresViolation, mainErr14RequiresViolation, mainErr37RequiresViolation]===
[2018-04-10 13:59:40,557 INFO L82 PathProgramCache]: Analyzing trace with hash -1982669052, now seen corresponding path program 1 times
[2018-04-10 13:59:40,557 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS
[2018-04-10 13:59:40,557 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy
[2018-04-10 13:59:40,559 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-04-10 13:59:40,559 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-04-10 13:59:40,559 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-04-10 13:59:40,574 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-04-10 13:59:40,576 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-04-10 13:59:40,627 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-04-10 13:59:40,627 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2018-04-10 13:59:40,627 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3
[2018-04-10 13:59:40,629 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states
[2018-04-10 13:59:40,629 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants.
[2018-04-10 13:59:40,629 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12
[2018-04-10 13:59:40,630 INFO L87 Difference]: Start difference. First operand 103 states and 109 transitions. Second operand 4 states.
[2018-04-10 13:59:40,759 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-04-10 13:59:40,759 INFO L93 Difference]: Finished difference Result 131 states and 139 transitions.
[2018-04-10 13:59:40,759 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states.
[2018-04-10 13:59:40,760 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 8
[2018-04-10 13:59:40,760 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-04-10 13:59:40,761 INFO L225 Difference]: With dead ends: 131
[2018-04-10 13:59:40,761 INFO L226 Difference]: Without dead ends: 131
[2018-04-10 13:59:40,762 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20
[2018-04-10 13:59:40,762 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 131 states.
[2018-04-10 13:59:40,767 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 131 to 101.
[2018-04-10 13:59:40,767 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 101 states.
[2018-04-10 13:59:40,771 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 101 states to 101 states and 107 transitions.
[2018-04-10 13:59:40,771 INFO L78 Accepts]: Start accepts. Automaton has 101 states and 107 transitions. Word has length 8
[2018-04-10 13:59:40,771 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-04-10 13:59:40,771 INFO L459 AbstractCegarLoop]: Abstraction has 101 states and 107 transitions.
[2018-04-10 13:59:40,772 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states.
[2018-04-10 13:59:40,772 INFO L276 IsEmpty]: Start isEmpty. Operand 101 states and 107 transitions.
[2018-04-10 13:59:40,772 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16
[2018-04-10 13:59:40,772 INFO L347 BasicCegarLoop]: Found error trace
[2018-04-10 13:59:40,772 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-04-10 13:59:40,772 INFO L408 AbstractCegarLoop]: === Iteration 3 === [mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr42EnsuresViolationMEMORY_LEAK, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr31RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr39RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr40AssertViolationMEMORY_FREE, mainErr41AssertViolationMEMORY_FREE, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr30RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr34RequiresViolation, mainErr4RequiresViolation, mainErr14RequiresViolation, mainErr37RequiresViolation]===
[2018-04-10 13:59:40,772 INFO L82 PathProgramCache]: Analyzing trace with hash -1611689904, now seen corresponding path program 1 times
[2018-04-10 13:59:40,773 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS
[2018-04-10 13:59:40,773 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy
[2018-04-10 13:59:40,774 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-04-10 13:59:40,774 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-04-10 13:59:40,774 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-04-10 13:59:40,791 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-04-10 13:59:40,794 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-04-10 13:59:40,839 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-04-10 13:59:40,840 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2018-04-10 13:59:40,840 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3
[2018-04-10 13:59:40,840 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states
[2018-04-10 13:59:40,841 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants.
[2018-04-10 13:59:40,841 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12
[2018-04-10 13:59:40,841 INFO L87 Difference]: Start difference. First operand 101 states and 107 transitions. Second operand 4 states.
[2018-04-10 13:59:40,948 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-04-10 13:59:40,949 INFO L93 Difference]: Finished difference Result 107 states and 113 transitions.
[2018-04-10 13:59:40,949 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states.
[2018-04-10 13:59:40,949 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 15
[2018-04-10 13:59:40,949 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-04-10 13:59:40,950 INFO L225 Difference]: With dead ends: 107
[2018-04-10 13:59:40,950 INFO L226 Difference]: Without dead ends: 107
[2018-04-10 13:59:40,950 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20
[2018-04-10 13:59:40,950 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 107 states.
[2018-04-10 13:59:40,953 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 107 to 99.
[2018-04-10 13:59:40,953 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 99 states.
[2018-04-10 13:59:40,954 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 99 states to 99 states and 110 transitions.
[2018-04-10 13:59:40,954 INFO L78 Accepts]: Start accepts. Automaton has 99 states and 110 transitions. Word has length 15
[2018-04-10 13:59:40,954 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-04-10 13:59:40,954 INFO L459 AbstractCegarLoop]: Abstraction has 99 states and 110 transitions.
[2018-04-10 13:59:40,954 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states.
[2018-04-10 13:59:40,954 INFO L276 IsEmpty]: Start isEmpty. Operand 99 states and 110 transitions.
[2018-04-10 13:59:40,954 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16
[2018-04-10 13:59:40,954 INFO L347 BasicCegarLoop]: Found error trace
[2018-04-10 13:59:40,955 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-04-10 13:59:40,955 INFO L408 AbstractCegarLoop]: === Iteration 4 === [mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr42EnsuresViolationMEMORY_LEAK, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr31RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr39RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr40AssertViolationMEMORY_FREE, mainErr41AssertViolationMEMORY_FREE, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr30RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr34RequiresViolation, mainErr4RequiresViolation, mainErr14RequiresViolation, mainErr37RequiresViolation]===
[2018-04-10 13:59:40,955 INFO L82 PathProgramCache]: Analyzing trace with hash -1611689903, now seen corresponding path program 1 times
[2018-04-10 13:59:40,955 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS
[2018-04-10 13:59:40,955 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy
[2018-04-10 13:59:40,956 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-04-10 13:59:40,957 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-04-10 13:59:40,957 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-04-10 13:59:40,966 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-04-10 13:59:40,967 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-04-10 13:59:41,021 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-04-10 13:59:41,022 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2018-04-10 13:59:41,022 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4
[2018-04-10 13:59:41,022 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states
[2018-04-10 13:59:41,023 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants.
[2018-04-10 13:59:41,023 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20
[2018-04-10 13:59:41,023 INFO L87 Difference]: Start difference. First operand 99 states and 110 transitions. Second operand 5 states.
[2018-04-10 13:59:41,229 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-04-10 13:59:41,229 INFO L93 Difference]: Finished difference Result 165 states and 182 transitions.
[2018-04-10 13:59:41,229 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states.
[2018-04-10 13:59:41,229 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 15
[2018-04-10 13:59:41,230 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-04-10 13:59:41,230 INFO L225 Difference]: With dead ends: 165
[2018-04-10 13:59:41,230 INFO L226 Difference]: Without dead ends: 165
[2018-04-10 13:59:41,231 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42
[2018-04-10 13:59:41,231 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 165 states.
[2018-04-10 13:59:41,238 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 165 to 139.
[2018-04-10 13:59:41,238 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 139 states.
[2018-04-10 13:59:41,239 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 139 states to 139 states and 163 transitions.
[2018-04-10 13:59:41,239 INFO L78 Accepts]: Start accepts. Automaton has 139 states and 163 transitions. Word has length 15
[2018-04-10 13:59:41,239 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-04-10 13:59:41,240 INFO L459 AbstractCegarLoop]: Abstraction has 139 states and 163 transitions.
[2018-04-10 13:59:41,240 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states.
[2018-04-10 13:59:41,240 INFO L276 IsEmpty]: Start isEmpty. Operand 139 states and 163 transitions.
[2018-04-10 13:59:41,240 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19
[2018-04-10 13:59:41,240 INFO L347 BasicCegarLoop]: Found error trace
[2018-04-10 13:59:41,240 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-04-10 13:59:41,241 INFO L408 AbstractCegarLoop]: === Iteration 5 === [mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr42EnsuresViolationMEMORY_LEAK, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr31RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr39RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr40AssertViolationMEMORY_FREE, mainErr41AssertViolationMEMORY_FREE, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr30RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr34RequiresViolation, mainErr4RequiresViolation, mainErr14RequiresViolation, mainErr37RequiresViolation]===
[2018-04-10 13:59:41,241 INFO L82 PathProgramCache]: Analyzing trace with hash -455507554, now seen corresponding path program 1 times
[2018-04-10 13:59:41,241 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS
[2018-04-10 13:59:41,241 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy
[2018-04-10 13:59:41,243 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-04-10 13:59:41,243 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-04-10 13:59:41,243 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-04-10 13:59:41,252 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-04-10 13:59:41,253 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-04-10 13:59:41,273 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-04-10 13:59:41,273 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2018-04-10 13:59:41,273 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3
[2018-04-10 13:59:41,273 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states
[2018-04-10 13:59:41,274 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants.
[2018-04-10 13:59:41,274 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12
[2018-04-10 13:59:41,274 INFO L87 Difference]: Start difference. First operand 139 states and 163 transitions. Second operand 4 states.
[2018-04-10 13:59:41,370 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-04-10 13:59:41,370 INFO L93 Difference]: Finished difference Result 156 states and 171 transitions.
[2018-04-10 13:59:41,371 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states.
[2018-04-10 13:59:41,371 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 18
[2018-04-10 13:59:41,371 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-04-10 13:59:41,372 INFO L225 Difference]: With dead ends: 156
[2018-04-10 13:59:41,372 INFO L226 Difference]: Without dead ends: 156
[2018-04-10 13:59:41,372 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20
[2018-04-10 13:59:41,372 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 156 states.
[2018-04-10 13:59:41,377 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 156 to 138.
[2018-04-10 13:59:41,377 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 138 states.
[2018-04-10 13:59:41,378 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 138 states to 138 states and 162 transitions.
[2018-04-10 13:59:41,378 INFO L78 Accepts]: Start accepts. Automaton has 138 states and 162 transitions. Word has length 18
[2018-04-10 13:59:41,378 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-04-10 13:59:41,379 INFO L459 AbstractCegarLoop]: Abstraction has 138 states and 162 transitions.
[2018-04-10 13:59:41,379 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states.
[2018-04-10 13:59:41,379 INFO L276 IsEmpty]: Start isEmpty. Operand 138 states and 162 transitions.
[2018-04-10 13:59:41,379 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19
[2018-04-10 13:59:41,379 INFO L347 BasicCegarLoop]: Found error trace
[2018-04-10 13:59:41,379 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-04-10 13:59:41,379 INFO L408 AbstractCegarLoop]: === Iteration 6 === [mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr42EnsuresViolationMEMORY_LEAK, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr31RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr39RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr40AssertViolationMEMORY_FREE, mainErr41AssertViolationMEMORY_FREE, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr30RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr34RequiresViolation, mainErr4RequiresViolation, mainErr14RequiresViolation, mainErr37RequiresViolation]===
[2018-04-10 13:59:41,380 INFO L82 PathProgramCache]: Analyzing trace with hash -455507553, now seen corresponding path program 1 times
[2018-04-10 13:59:41,380 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS
[2018-04-10 13:59:41,380 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy
[2018-04-10 13:59:41,381 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-04-10 13:59:41,381 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-04-10 13:59:41,381 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-04-10 13:59:41,389 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-04-10 13:59:41,390 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-04-10 13:59:41,414 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-04-10 13:59:41,414 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2018-04-10 13:59:41,414 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3
[2018-04-10 13:59:41,415 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states
[2018-04-10 13:59:41,415 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants.
[2018-04-10 13:59:41,415 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12
[2018-04-10 13:59:41,415 INFO L87 Difference]: Start difference. First operand 138 states and 162 transitions. Second operand 4 states.
[2018-04-10 13:59:41,485 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-04-10 13:59:41,485 INFO L93 Difference]: Finished difference Result 158 states and 175 transitions.
[2018-04-10 13:59:41,485 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states.
[2018-04-10 13:59:41,485 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 18
[2018-04-10 13:59:41,485 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-04-10 13:59:41,486 INFO L225 Difference]: With dead ends: 158
[2018-04-10 13:59:41,486 INFO L226 Difference]: Without dead ends: 158
[2018-04-10 13:59:41,486 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20
[2018-04-10 13:59:41,486 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 158 states.
[2018-04-10 13:59:41,488 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 158 to 136.
[2018-04-10 13:59:41,488 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 136 states.
[2018-04-10 13:59:41,489 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 136 states to 136 states and 160 transitions.
[2018-04-10 13:59:41,489 INFO L78 Accepts]: Start accepts. Automaton has 136 states and 160 transitions. Word has length 18
[2018-04-10 13:59:41,489 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-04-10 13:59:41,489 INFO L459 AbstractCegarLoop]: Abstraction has 136 states and 160 transitions.
[2018-04-10 13:59:41,489 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states.
[2018-04-10 13:59:41,489 INFO L276 IsEmpty]: Start isEmpty. Operand 136 states and 160 transitions.
[2018-04-10 13:59:41,490 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19
[2018-04-10 13:59:41,490 INFO L347 BasicCegarLoop]: Found error trace
[2018-04-10 13:59:41,490 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-04-10 13:59:41,490 INFO L408 AbstractCegarLoop]: === Iteration 7 === [mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr42EnsuresViolationMEMORY_LEAK, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr31RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr39RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr40AssertViolationMEMORY_FREE, mainErr41AssertViolationMEMORY_FREE, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr30RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr34RequiresViolation, mainErr4RequiresViolation, mainErr14RequiresViolation, mainErr37RequiresViolation]===
[2018-04-10 13:59:41,490 INFO L82 PathProgramCache]: Analyzing trace with hash -414531954, now seen corresponding path program 1 times
[2018-04-10 13:59:41,490 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS
[2018-04-10 13:59:41,490 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy
[2018-04-10 13:59:41,491 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-04-10 13:59:41,491 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-04-10 13:59:41,491 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-04-10 13:59:41,501 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-04-10 13:59:41,502 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-04-10 13:59:41,544 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-04-10 13:59:41,544 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2018-04-10 13:59:41,544 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5
[2018-04-10 13:59:41,544 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states
[2018-04-10 13:59:41,545 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants.
[2018-04-10 13:59:41,545 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30
[2018-04-10 13:59:41,545 INFO L87 Difference]: Start difference. First operand 136 states and 160 transitions. Second operand 6 states.
[2018-04-10 13:59:41,756 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-04-10 13:59:41,756 INFO L93 Difference]: Finished difference Result 239 states and 285 transitions.
[2018-04-10 13:59:41,756 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states.
[2018-04-10 13:59:41,756 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 18
[2018-04-10 13:59:41,756 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-04-10 13:59:41,757 INFO L225 Difference]: With dead ends: 239
[2018-04-10 13:59:41,757 INFO L226 Difference]: Without dead ends: 239
[2018-04-10 13:59:41,757 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=40, Invalid=70, Unknown=0, NotChecked=0, Total=110
[2018-04-10 13:59:41,757 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 239 states.
[2018-04-10 13:59:41,760 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 239 to 126.
[2018-04-10 13:59:41,760 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 126 states.
[2018-04-10 13:59:41,760 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 126 states to 126 states and 149 transitions.
[2018-04-10 13:59:41,760 INFO L78 Accepts]: Start accepts. Automaton has 126 states and 149 transitions. Word has length 18
[2018-04-10 13:59:41,760 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-04-10 13:59:41,761 INFO L459 AbstractCegarLoop]: Abstraction has 126 states and 149 transitions.
[2018-04-10 13:59:41,761 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states.
[2018-04-10 13:59:41,761 INFO L276 IsEmpty]: Start isEmpty. Operand 126 states and 149 transitions.
[2018-04-10 13:59:41,761 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19
[2018-04-10 13:59:41,761 INFO L347 BasicCegarLoop]: Found error trace
[2018-04-10 13:59:41,761 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-04-10 13:59:41,761 INFO L408 AbstractCegarLoop]: === Iteration 8 === [mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr42EnsuresViolationMEMORY_LEAK, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr31RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr39RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr40AssertViolationMEMORY_FREE, mainErr41AssertViolationMEMORY_FREE, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr30RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr34RequiresViolation, mainErr4RequiresViolation, mainErr14RequiresViolation, mainErr37RequiresViolation]===
[2018-04-10 13:59:41,761 INFO L82 PathProgramCache]: Analyzing trace with hash -414531955, now seen corresponding path program 1 times
[2018-04-10 13:59:41,761 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS
[2018-04-10 13:59:41,761 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy
[2018-04-10 13:59:41,762 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-04-10 13:59:41,762 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-04-10 13:59:41,762 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-04-10 13:59:41,768 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-04-10 13:59:41,769 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-04-10 13:59:41,792 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-04-10 13:59:41,792 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2018-04-10 13:59:41,792 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5
[2018-04-10 13:59:41,792 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states
[2018-04-10 13:59:41,793 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants.
[2018-04-10 13:59:41,793 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30
[2018-04-10 13:59:41,793 INFO L87 Difference]: Start difference. First operand 126 states and 149 transitions. Second operand 6 states.
[2018-04-10 13:59:41,977 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-04-10 13:59:41,977 INFO L93 Difference]: Finished difference Result 228 states and 271 transitions.
[2018-04-10 13:59:41,977 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states.
[2018-04-10 13:59:41,977 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 18
[2018-04-10 13:59:41,978 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-04-10 13:59:41,979 INFO L225 Difference]: With dead ends: 228
[2018-04-10 13:59:41,979 INFO L226 Difference]: Without dead ends: 228
[2018-04-10 13:59:41,979 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72
[2018-04-10 13:59:41,979 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 228 states.
[2018-04-10 13:59:41,983 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 228 to 125.
[2018-04-10 13:59:41,983 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 125 states.
[2018-04-10 13:59:41,983 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 125 states to 125 states and 148 transitions.
[2018-04-10 13:59:41,984 INFO L78 Accepts]: Start accepts. Automaton has 125 states and 148 transitions. Word has length 18
[2018-04-10 13:59:41,984 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-04-10 13:59:41,984 INFO L459 AbstractCegarLoop]: Abstraction has 125 states and 148 transitions.
[2018-04-10 13:59:41,984 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states.
[2018-04-10 13:59:41,984 INFO L276 IsEmpty]: Start isEmpty. Operand 125 states and 148 transitions.
[2018-04-10 13:59:41,984 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24
[2018-04-10 13:59:41,984 INFO L347 BasicCegarLoop]: Found error trace
[2018-04-10 13:59:41,984 INFO L355 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-04-10 13:59:41,984 INFO L408 AbstractCegarLoop]: === Iteration 9 === [mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr42EnsuresViolationMEMORY_LEAK, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr31RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr39RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr40AssertViolationMEMORY_FREE, mainErr41AssertViolationMEMORY_FREE, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr30RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr34RequiresViolation, mainErr4RequiresViolation, mainErr14RequiresViolation, mainErr37RequiresViolation]===
[2018-04-10 13:59:41,985 INFO L82 PathProgramCache]: Analyzing trace with hash -1233727545, now seen corresponding path program 1 times
[2018-04-10 13:59:41,985 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS
[2018-04-10 13:59:41,985 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy
[2018-04-10 13:59:41,986 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-04-10 13:59:41,986 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-04-10 13:59:41,986 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-04-10 13:59:41,994 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-04-10 13:59:41,995 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-04-10 13:59:42,050 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-04-10 13:59:42,050 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2018-04-10 13:59:42,050 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5
[2018-04-10 13:59:42,051 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states
[2018-04-10 13:59:42,051 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants.
[2018-04-10 13:59:42,051 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20
[2018-04-10 13:59:42,051 INFO L87 Difference]: Start difference. First operand 125 states and 148 transitions. Second operand 5 states.
[2018-04-10 13:59:42,148 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-04-10 13:59:42,148 INFO L93 Difference]: Finished difference Result 143 states and 168 transitions.
[2018-04-10 13:59:42,148 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states.
[2018-04-10 13:59:42,149 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 23
[2018-04-10 13:59:42,149 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-04-10 13:59:42,149 INFO L225 Difference]: With dead ends: 143
[2018-04-10 13:59:42,149 INFO L226 Difference]: Without dead ends: 143
[2018-04-10 13:59:42,150 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42
[2018-04-10 13:59:42,150 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 143 states.
[2018-04-10 13:59:42,152 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 143 to 133.
[2018-04-10 13:59:42,152 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 133 states.
[2018-04-10 13:59:42,153 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 133 states to 133 states and 158 transitions.
[2018-04-10 13:59:42,153 INFO L78 Accepts]: Start accepts. Automaton has 133 states and 158 transitions. Word has length 23
[2018-04-10 13:59:42,153 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-04-10 13:59:42,153 INFO L459 AbstractCegarLoop]: Abstraction has 133 states and 158 transitions.
[2018-04-10 13:59:42,153 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states.
[2018-04-10 13:59:42,153 INFO L276 IsEmpty]: Start isEmpty. Operand 133 states and 158 transitions.
[2018-04-10 13:59:42,156 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24
[2018-04-10 13:59:42,156 INFO L347 BasicCegarLoop]: Found error trace
[2018-04-10 13:59:42,156 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-04-10 13:59:42,156 INFO L408 AbstractCegarLoop]: === Iteration 10 === [mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr42EnsuresViolationMEMORY_LEAK, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr31RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr39RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr40AssertViolationMEMORY_FREE, mainErr41AssertViolationMEMORY_FREE, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr30RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr34RequiresViolation, mainErr4RequiresViolation, mainErr14RequiresViolation, mainErr37RequiresViolation]===
[2018-04-10 13:59:42,156 INFO L82 PathProgramCache]: Analyzing trace with hash 1788148930, now seen corresponding path program 1 times
[2018-04-10 13:59:42,157 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS
[2018-04-10 13:59:42,157 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy
[2018-04-10 13:59:42,158 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-04-10 13:59:42,158 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-04-10 13:59:42,158 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-04-10 13:59:42,166 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-04-10 13:59:42,167 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-04-10 13:59:42,233 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-04-10 13:59:42,233 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2018-04-10 13:59:42,234 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4
[2018-04-10 13:59:42,234 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states
[2018-04-10 13:59:42,234 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants.
[2018-04-10 13:59:42,234 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20
[2018-04-10 13:59:42,234 INFO L87 Difference]: Start difference. First operand 133 states and 158 transitions. Second operand 5 states.
[2018-04-10 13:59:42,344 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-04-10 13:59:42,344 INFO L93 Difference]: Finished difference Result 169 states and 184 transitions.
[2018-04-10 13:59:42,345 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states.
[2018-04-10 13:59:42,345 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 23
[2018-04-10 13:59:42,345 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-04-10 13:59:42,346 INFO L225 Difference]: With dead ends: 169
[2018-04-10 13:59:42,346 INFO L226 Difference]: Without dead ends: 169
[2018-04-10 13:59:42,346 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56
[2018-04-10 13:59:42,346 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 169 states.
[2018-04-10 13:59:42,348 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 169 to 111.
[2018-04-10 13:59:42,349 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 111 states.
[2018-04-10 13:59:42,349 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 111 states to 111 states and 123 transitions.
[2018-04-10 13:59:42,349 INFO L78 Accepts]: Start accepts. Automaton has 111 states and 123 transitions. Word has length 23
[2018-04-10 13:59:42,349 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-04-10 13:59:42,349 INFO L459 AbstractCegarLoop]: Abstraction has 111 states and 123 transitions.
[2018-04-10 13:59:42,350 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states.
[2018-04-10 13:59:42,350 INFO L276 IsEmpty]: Start isEmpty. Operand 111 states and 123 transitions.
[2018-04-10 13:59:42,350 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29
[2018-04-10 13:59:42,350 INFO L347 BasicCegarLoop]: Found error trace
[2018-04-10 13:59:42,350 INFO L355 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-04-10 13:59:42,352 INFO L408 AbstractCegarLoop]: === Iteration 11 === [mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr42EnsuresViolationMEMORY_LEAK, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr31RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr39RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr40AssertViolationMEMORY_FREE, mainErr41AssertViolationMEMORY_FREE, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr30RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr34RequiresViolation, mainErr4RequiresViolation, mainErr14RequiresViolation, mainErr37RequiresViolation]===
[2018-04-10 13:59:42,352 INFO L82 PathProgramCache]: Analyzing trace with hash 1692504881, now seen corresponding path program 1 times
[2018-04-10 13:59:42,352 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS
[2018-04-10 13:59:42,352 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy
[2018-04-10 13:59:42,353 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-04-10 13:59:42,353 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-04-10 13:59:42,354 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-04-10 13:59:42,361 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-04-10 13:59:42,362 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-04-10 13:59:42,444 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-04-10 13:59:42,444 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more.
[2018-04-10 13:59:42,444 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP
No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3
Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null)
Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000
[2018-04-10 13:59:42,453 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-04-10 13:59:42,472 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-04-10 13:59:42,479 INFO L270 TraceCheckSpWp]: Computing forward predicates...
[2018-04-10 13:59:42,519 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11
[2018-04-10 13:59:42,519 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:42,528 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:42,528 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:12, output treesize:11
[2018-04-10 13:59:42,544 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8
[2018-04-10 13:59:42,546 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7
[2018-04-10 13:59:42,546 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:42,552 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:42,555 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:42,555 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:22, output treesize:15
[2018-04-10 13:59:42,575 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13
[2018-04-10 13:59:42,577 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 5
[2018-04-10 13:59:42,577 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:42,579 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:42,582 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts.
[2018-04-10 13:59:42,582 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:22, output treesize:11
[2018-04-10 13:59:42,593 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-04-10 13:59:42,612 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences.
[2018-04-10 13:59:42,612 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 8] total 12
[2018-04-10 13:59:42,612 INFO L442 AbstractCegarLoop]: Interpolant automaton has 13 states
[2018-04-10 13:59:42,613 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants.
[2018-04-10 13:59:42,613 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=38, Invalid=118, Unknown=0, NotChecked=0, Total=156
[2018-04-10 13:59:42,613 INFO L87 Difference]: Start difference. First operand 111 states and 123 transitions. Second operand 13 states.
[2018-04-10 13:59:42,878 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-04-10 13:59:42,878 INFO L93 Difference]: Finished difference Result 155 states and 169 transitions.
[2018-04-10 13:59:42,878 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states.
[2018-04-10 13:59:42,878 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 28
[2018-04-10 13:59:42,879 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-04-10 13:59:42,879 INFO L225 Difference]: With dead ends: 155
[2018-04-10 13:59:42,879 INFO L226 Difference]: Without dead ends: 155
[2018-04-10 13:59:42,880 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 43 GetRequests, 25 SyntacticMatches, 1 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 59 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=111, Invalid=231, Unknown=0, NotChecked=0, Total=342
[2018-04-10 13:59:42,880 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 155 states.
[2018-04-10 13:59:42,882 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 155 to 117.
[2018-04-10 13:59:42,882 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 117 states.
[2018-04-10 13:59:42,883 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 117 states to 117 states and 131 transitions.
[2018-04-10 13:59:42,883 INFO L78 Accepts]: Start accepts. Automaton has 117 states and 131 transitions. Word has length 28
[2018-04-10 13:59:42,883 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-04-10 13:59:42,883 INFO L459 AbstractCegarLoop]: Abstraction has 117 states and 131 transitions.
[2018-04-10 13:59:42,883 INFO L460 AbstractCegarLoop]: Interpolant automaton has 13 states.
[2018-04-10 13:59:42,883 INFO L276 IsEmpty]: Start isEmpty. Operand 117 states and 131 transitions.
[2018-04-10 13:59:42,884 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29
[2018-04-10 13:59:42,884 INFO L347 BasicCegarLoop]: Found error trace
[2018-04-10 13:59:42,884 INFO L355 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-04-10 13:59:42,884 INFO L408 AbstractCegarLoop]: === Iteration 12 === [mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr42EnsuresViolationMEMORY_LEAK, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr31RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr39RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr40AssertViolationMEMORY_FREE, mainErr41AssertViolationMEMORY_FREE, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr30RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr34RequiresViolation, mainErr4RequiresViolation, mainErr14RequiresViolation, mainErr37RequiresViolation]===
[2018-04-10 13:59:42,884 INFO L82 PathProgramCache]: Analyzing trace with hash 1692504882, now seen corresponding path program 1 times
[2018-04-10 13:59:42,884 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS
[2018-04-10 13:59:42,885 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy
[2018-04-10 13:59:42,886 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-04-10 13:59:42,886 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-04-10 13:59:42,886 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-04-10 13:59:42,895 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-04-10 13:59:42,896 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-04-10 13:59:42,981 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-04-10 13:59:42,982 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more.
[2018-04-10 13:59:42,982 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP
No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3
Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null)
Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000
[2018-04-10 13:59:42,989 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-04-10 13:59:43,007 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-04-10 13:59:43,009 INFO L270 TraceCheckSpWp]: Computing forward predicates...
[2018-04-10 13:59:43,024 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5
[2018-04-10 13:59:43,025 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:43,026 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:43,027 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5
[2018-04-10 13:59:43,067 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 14
[2018-04-10 13:59:43,067 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:43,073 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:43,074 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:24, output treesize:19
[2018-04-10 13:59:43,113 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8
[2018-04-10 13:59:43,115 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7
[2018-04-10 13:59:43,115 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:43,117 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:43,125 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8
[2018-04-10 13:59:43,127 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7
[2018-04-10 13:59:43,127 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:43,129 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:43,138 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:43,139 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:41, output treesize:31
[2018-04-10 13:59:43,183 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13
[2018-04-10 13:59:43,185 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 5
[2018-04-10 13:59:43,185 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:43,186 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:43,191 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 18
[2018-04-10 13:59:43,193 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 9
[2018-04-10 13:59:43,194 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:43,196 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:43,200 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts.
[2018-04-10 13:59:43,200 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:45, output treesize:19
[2018-04-10 13:59:43,227 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-04-10 13:59:43,251 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences.
[2018-04-10 13:59:43,251 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 10] total 17
[2018-04-10 13:59:43,252 INFO L442 AbstractCegarLoop]: Interpolant automaton has 18 states
[2018-04-10 13:59:43,252 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants.
[2018-04-10 13:59:43,252 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=47, Invalid=259, Unknown=0, NotChecked=0, Total=306
[2018-04-10 13:59:43,252 INFO L87 Difference]: Start difference. First operand 117 states and 131 transitions. Second operand 18 states.
[2018-04-10 13:59:43,952 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-04-10 13:59:43,952 INFO L93 Difference]: Finished difference Result 180 states and 195 transitions.
[2018-04-10 13:59:43,952 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states.
[2018-04-10 13:59:43,953 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 28
[2018-04-10 13:59:43,953 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-04-10 13:59:43,955 INFO L225 Difference]: With dead ends: 180
[2018-04-10 13:59:43,955 INFO L226 Difference]: Without dead ends: 180
[2018-04-10 13:59:43,956 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 51 GetRequests, 21 SyntacticMatches, 1 SemanticMatches, 29 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 110 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=236, Invalid=694, Unknown=0, NotChecked=0, Total=930
[2018-04-10 13:59:43,956 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 180 states.
[2018-04-10 13:59:43,959 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 180 to 115.
[2018-04-10 13:59:43,959 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 115 states.
[2018-04-10 13:59:43,960 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 115 states to 115 states and 128 transitions.
[2018-04-10 13:59:43,960 INFO L78 Accepts]: Start accepts. Automaton has 115 states and 128 transitions. Word has length 28
[2018-04-10 13:59:43,960 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-04-10 13:59:43,961 INFO L459 AbstractCegarLoop]: Abstraction has 115 states and 128 transitions.
[2018-04-10 13:59:43,961 INFO L460 AbstractCegarLoop]: Interpolant automaton has 18 states.
[2018-04-10 13:59:43,961 INFO L276 IsEmpty]: Start isEmpty. Operand 115 states and 128 transitions.
[2018-04-10 13:59:43,961 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30
[2018-04-10 13:59:43,961 INFO L347 BasicCegarLoop]: Found error trace
[2018-04-10 13:59:43,962 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-04-10 13:59:43,962 INFO L408 AbstractCegarLoop]: === Iteration 13 === [mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr42EnsuresViolationMEMORY_LEAK, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr31RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr39RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr40AssertViolationMEMORY_FREE, mainErr41AssertViolationMEMORY_FREE, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr30RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr34RequiresViolation, mainErr4RequiresViolation, mainErr14RequiresViolation, mainErr37RequiresViolation]===
[2018-04-10 13:59:43,962 INFO L82 PathProgramCache]: Analyzing trace with hash 877482672, now seen corresponding path program 1 times
[2018-04-10 13:59:43,962 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS
[2018-04-10 13:59:43,962 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy
[2018-04-10 13:59:43,963 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-04-10 13:59:43,963 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-04-10 13:59:43,963 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-04-10 13:59:43,971 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-04-10 13:59:43,972 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-04-10 13:59:44,048 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-04-10 13:59:44,049 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2018-04-10 13:59:44,049 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9
[2018-04-10 13:59:44,049 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states
[2018-04-10 13:59:44,049 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants.
[2018-04-10 13:59:44,050 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=67, Unknown=0, NotChecked=0, Total=90
[2018-04-10 13:59:44,050 INFO L87 Difference]: Start difference. First operand 115 states and 128 transitions. Second operand 10 states.
[2018-04-10 13:59:44,214 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-04-10 13:59:44,214 INFO L93 Difference]: Finished difference Result 161 states and 177 transitions.
[2018-04-10 13:59:44,215 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states.
[2018-04-10 13:59:44,215 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 29
[2018-04-10 13:59:44,215 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-04-10 13:59:44,215 INFO L225 Difference]: With dead ends: 161
[2018-04-10 13:59:44,215 INFO L226 Difference]: Without dead ends: 161
[2018-04-10 13:59:44,216 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 25 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=72, Invalid=138, Unknown=0, NotChecked=0, Total=210
[2018-04-10 13:59:44,216 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 161 states.
[2018-04-10 13:59:44,217 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 161 to 120.
[2018-04-10 13:59:44,217 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 120 states.
[2018-04-10 13:59:44,217 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 120 states to 120 states and 135 transitions.
[2018-04-10 13:59:44,218 INFO L78 Accepts]: Start accepts. Automaton has 120 states and 135 transitions. Word has length 29
[2018-04-10 13:59:44,218 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-04-10 13:59:44,218 INFO L459 AbstractCegarLoop]: Abstraction has 120 states and 135 transitions.
[2018-04-10 13:59:44,218 INFO L460 AbstractCegarLoop]: Interpolant automaton has 10 states.
[2018-04-10 13:59:44,218 INFO L276 IsEmpty]: Start isEmpty. Operand 120 states and 135 transitions.
[2018-04-10 13:59:44,218 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30
[2018-04-10 13:59:44,218 INFO L347 BasicCegarLoop]: Found error trace
[2018-04-10 13:59:44,218 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-04-10 13:59:44,219 INFO L408 AbstractCegarLoop]: === Iteration 14 === [mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr42EnsuresViolationMEMORY_LEAK, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr31RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr39RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr40AssertViolationMEMORY_FREE, mainErr41AssertViolationMEMORY_FREE, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr30RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr34RequiresViolation, mainErr4RequiresViolation, mainErr14RequiresViolation, mainErr37RequiresViolation]===
[2018-04-10 13:59:44,219 INFO L82 PathProgramCache]: Analyzing trace with hash 877482673, now seen corresponding path program 1 times
[2018-04-10 13:59:44,219 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS
[2018-04-10 13:59:44,219 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy
[2018-04-10 13:59:44,220 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-04-10 13:59:44,220 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-04-10 13:59:44,220 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-04-10 13:59:44,227 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-04-10 13:59:44,228 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-04-10 13:59:44,333 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-04-10 13:59:44,333 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2018-04-10 13:59:44,333 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8
[2018-04-10 13:59:44,333 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states
[2018-04-10 13:59:44,334 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants.
[2018-04-10 13:59:44,334 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=56, Unknown=0, NotChecked=0, Total=72
[2018-04-10 13:59:44,334 INFO L87 Difference]: Start difference. First operand 120 states and 135 transitions. Second operand 9 states.
[2018-04-10 13:59:44,632 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-04-10 13:59:44,632 INFO L93 Difference]: Finished difference Result 185 states and 201 transitions.
[2018-04-10 13:59:44,632 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states.
[2018-04-10 13:59:44,633 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 29
[2018-04-10 13:59:44,633 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-04-10 13:59:44,633 INFO L225 Difference]: With dead ends: 185
[2018-04-10 13:59:44,633 INFO L226 Difference]: Without dead ends: 185
[2018-04-10 13:59:44,633 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 39 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=73, Invalid=233, Unknown=0, NotChecked=0, Total=306
[2018-04-10 13:59:44,634 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 185 states.
[2018-04-10 13:59:44,635 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 185 to 122.
[2018-04-10 13:59:44,635 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 122 states.
[2018-04-10 13:59:44,635 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 122 states to 122 states and 136 transitions.
[2018-04-10 13:59:44,636 INFO L78 Accepts]: Start accepts. Automaton has 122 states and 136 transitions. Word has length 29
[2018-04-10 13:59:44,636 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-04-10 13:59:44,636 INFO L459 AbstractCegarLoop]: Abstraction has 122 states and 136 transitions.
[2018-04-10 13:59:44,636 INFO L460 AbstractCegarLoop]: Interpolant automaton has 9 states.
[2018-04-10 13:59:44,636 INFO L276 IsEmpty]: Start isEmpty. Operand 122 states and 136 transitions.
[2018-04-10 13:59:44,636 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33
[2018-04-10 13:59:44,636 INFO L347 BasicCegarLoop]: Found error trace
[2018-04-10 13:59:44,636 INFO L355 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-04-10 13:59:44,636 INFO L408 AbstractCegarLoop]: === Iteration 15 === [mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr42EnsuresViolationMEMORY_LEAK, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr31RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr39RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr40AssertViolationMEMORY_FREE, mainErr41AssertViolationMEMORY_FREE, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr30RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr34RequiresViolation, mainErr4RequiresViolation, mainErr14RequiresViolation, mainErr37RequiresViolation]===
[2018-04-10 13:59:44,637 INFO L82 PathProgramCache]: Analyzing trace with hash 221581916, now seen corresponding path program 1 times
[2018-04-10 13:59:44,637 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS
[2018-04-10 13:59:44,637 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy
[2018-04-10 13:59:44,638 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-04-10 13:59:44,638 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-04-10 13:59:44,638 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-04-10 13:59:44,645 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-04-10 13:59:44,646 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-04-10 13:59:44,729 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-04-10 13:59:44,730 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2018-04-10 13:59:44,730 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9
[2018-04-10 13:59:44,730 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states
[2018-04-10 13:59:44,730 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants.
[2018-04-10 13:59:44,731 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=53, Unknown=0, NotChecked=0, Total=72
[2018-04-10 13:59:44,731 INFO L87 Difference]: Start difference. First operand 122 states and 136 transitions. Second operand 9 states.
[2018-04-10 13:59:44,920 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-04-10 13:59:44,920 INFO L93 Difference]: Finished difference Result 199 states and 216 transitions.
[2018-04-10 13:59:44,920 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states.
[2018-04-10 13:59:44,920 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 32
[2018-04-10 13:59:44,920 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-04-10 13:59:44,921 INFO L225 Difference]: With dead ends: 199
[2018-04-10 13:59:44,921 INFO L226 Difference]: Without dead ends: 199
[2018-04-10 13:59:44,921 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 29 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=84, Invalid=188, Unknown=0, NotChecked=0, Total=272
[2018-04-10 13:59:44,922 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 199 states.
[2018-04-10 13:59:44,924 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 199 to 126.
[2018-04-10 13:59:44,924 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 126 states.
[2018-04-10 13:59:44,924 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 126 states to 126 states and 140 transitions.
[2018-04-10 13:59:44,925 INFO L78 Accepts]: Start accepts. Automaton has 126 states and 140 transitions. Word has length 32
[2018-04-10 13:59:44,925 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-04-10 13:59:44,925 INFO L459 AbstractCegarLoop]: Abstraction has 126 states and 140 transitions.
[2018-04-10 13:59:44,925 INFO L460 AbstractCegarLoop]: Interpolant automaton has 9 states.
[2018-04-10 13:59:44,925 INFO L276 IsEmpty]: Start isEmpty. Operand 126 states and 140 transitions.
[2018-04-10 13:59:44,926 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33
[2018-04-10 13:59:44,926 INFO L347 BasicCegarLoop]: Found error trace
[2018-04-10 13:59:44,926 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-04-10 13:59:44,926 INFO L408 AbstractCegarLoop]: === Iteration 16 === [mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr42EnsuresViolationMEMORY_LEAK, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr31RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr39RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr40AssertViolationMEMORY_FREE, mainErr41AssertViolationMEMORY_FREE, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr30RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr34RequiresViolation, mainErr4RequiresViolation, mainErr14RequiresViolation, mainErr37RequiresViolation]===
[2018-04-10 13:59:44,926 INFO L82 PathProgramCache]: Analyzing trace with hash -1146002921, now seen corresponding path program 1 times
[2018-04-10 13:59:44,926 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS
[2018-04-10 13:59:44,926 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy
[2018-04-10 13:59:44,929 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-04-10 13:59:44,929 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-04-10 13:59:44,929 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-04-10 13:59:44,938 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-04-10 13:59:44,941 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-04-10 13:59:45,082 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-04-10 13:59:45,083 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more.
[2018-04-10 13:59:45,083 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP
No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3
Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null)
Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000
[2018-04-10 13:59:45,091 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-04-10 13:59:45,106 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-04-10 13:59:45,109 INFO L270 TraceCheckSpWp]: Computing forward predicates...
[2018-04-10 13:59:45,124 INFO L700 Elim1Store]: detected not equals via solver
[2018-04-10 13:59:45,125 INFO L700 Elim1Store]: detected not equals via solver
[2018-04-10 13:59:45,126 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21
[2018-04-10 13:59:45,126 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:45,132 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:45,132 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:23, output treesize:21
[2018-04-10 13:59:45,148 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8
[2018-04-10 13:59:45,149 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7
[2018-04-10 13:59:45,149 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:45,150 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:45,158 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:45,158 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:32, output treesize:29
[2018-04-10 13:59:45,201 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 33
[2018-04-10 13:59:45,203 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11
[2018-04-10 13:59:45,204 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:45,210 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:45,216 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts.
[2018-04-10 13:59:45,216 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:42, output treesize:34
[2018-04-10 13:59:45,259 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 24
[2018-04-10 13:59:45,261 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 10
[2018-04-10 13:59:45,261 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:45,264 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1
[2018-04-10 13:59:45,265 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:45,266 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:45,271 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts.
[2018-04-10 13:59:45,271 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 4 variables, input treesize:41, output treesize:15
[2018-04-10 13:59:45,323 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-04-10 13:59:45,342 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences.
[2018-04-10 13:59:45,342 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 11] total 20
[2018-04-10 13:59:45,342 INFO L442 AbstractCegarLoop]: Interpolant automaton has 21 states
[2018-04-10 13:59:45,343 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants.
[2018-04-10 13:59:45,343 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=72, Invalid=348, Unknown=0, NotChecked=0, Total=420
[2018-04-10 13:59:45,343 INFO L87 Difference]: Start difference. First operand 126 states and 140 transitions. Second operand 21 states.
[2018-04-10 13:59:46,163 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-04-10 13:59:46,163 INFO L93 Difference]: Finished difference Result 230 states and 253 transitions.
[2018-04-10 13:59:46,163 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states.
[2018-04-10 13:59:46,163 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 32
[2018-04-10 13:59:46,164 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-04-10 13:59:46,164 INFO L225 Difference]: With dead ends: 230
[2018-04-10 13:59:46,164 INFO L226 Difference]: Without dead ends: 230
[2018-04-10 13:59:46,164 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 59 GetRequests, 23 SyntacticMatches, 2 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 271 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=283, Invalid=977, Unknown=0, NotChecked=0, Total=1260
[2018-04-10 13:59:46,165 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 230 states.
[2018-04-10 13:59:46,166 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 230 to 145.
[2018-04-10 13:59:46,166 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 145 states.
[2018-04-10 13:59:46,166 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 145 states to 145 states and 164 transitions.
[2018-04-10 13:59:46,167 INFO L78 Accepts]: Start accepts. Automaton has 145 states and 164 transitions. Word has length 32
[2018-04-10 13:59:46,167 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-04-10 13:59:46,167 INFO L459 AbstractCegarLoop]: Abstraction has 145 states and 164 transitions.
[2018-04-10 13:59:46,167 INFO L460 AbstractCegarLoop]: Interpolant automaton has 21 states.
[2018-04-10 13:59:46,167 INFO L276 IsEmpty]: Start isEmpty. Operand 145 states and 164 transitions.
[2018-04-10 13:59:46,167 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33
[2018-04-10 13:59:46,167 INFO L347 BasicCegarLoop]: Found error trace
[2018-04-10 13:59:46,167 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-04-10 13:59:46,167 INFO L408 AbstractCegarLoop]: === Iteration 17 === [mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr42EnsuresViolationMEMORY_LEAK, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr31RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr39RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr40AssertViolationMEMORY_FREE, mainErr41AssertViolationMEMORY_FREE, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr30RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr34RequiresViolation, mainErr4RequiresViolation, mainErr14RequiresViolation, mainErr37RequiresViolation]===
[2018-04-10 13:59:46,168 INFO L82 PathProgramCache]: Analyzing trace with hash -1146002920, now seen corresponding path program 1 times
[2018-04-10 13:59:46,168 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS
[2018-04-10 13:59:46,168 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy
[2018-04-10 13:59:46,169 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-04-10 13:59:46,169 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-04-10 13:59:46,169 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-04-10 13:59:46,174 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-04-10 13:59:46,175 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-04-10 13:59:46,285 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-04-10 13:59:46,285 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more.
[2018-04-10 13:59:46,285 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP
No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3
Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null)
Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000
[2018-04-10 13:59:46,290 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-04-10 13:59:46,304 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-04-10 13:59:46,306 INFO L270 TraceCheckSpWp]: Computing forward predicates...
[2018-04-10 13:59:46,311 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5
[2018-04-10 13:59:46,312 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:46,320 INFO L700 Elim1Store]: detected not equals via solver
[2018-04-10 13:59:46,320 INFO L700 Elim1Store]: detected not equals via solver
[2018-04-10 13:59:46,321 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4
[2018-04-10 13:59:46,321 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:46,327 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:46,327 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:26, output treesize:19
[2018-04-10 13:59:46,334 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8
[2018-04-10 13:59:46,336 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7
[2018-04-10 13:59:46,336 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:46,338 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:46,347 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8
[2018-04-10 13:59:46,349 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7
[2018-04-10 13:59:46,349 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:46,350 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:46,358 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:46,358 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:38, output treesize:31
[2018-04-10 13:59:46,401 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 28
[2018-04-10 13:59:46,403 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11
[2018-04-10 13:59:46,403 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:46,406 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:46,414 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 44
[2018-04-10 13:59:46,416 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11
[2018-04-10 13:59:46,416 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:46,420 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:46,425 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts.
[2018-04-10 13:59:46,425 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:63, output treesize:47
[2018-04-10 13:59:46,492 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 33
[2018-04-10 13:59:46,494 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 17
[2018-04-10 13:59:46,495 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:46,500 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1
[2018-04-10 13:59:46,500 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:46,504 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:46,511 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 20
[2018-04-10 13:59:46,512 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3
[2018-04-10 13:59:46,512 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:46,516 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1
[2018-04-10 13:59:46,516 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:46,517 INFO L267 ElimStorePlain]: Start of recursive call 5: 2 dim-1 vars, End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:46,521 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:46,521 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 5 variables, input treesize:61, output treesize:9
[2018-04-10 13:59:46,537 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-04-10 13:59:46,555 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences.
[2018-04-10 13:59:46,555 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11] total 16
[2018-04-10 13:59:46,555 INFO L442 AbstractCegarLoop]: Interpolant automaton has 17 states
[2018-04-10 13:59:46,555 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants.
[2018-04-10 13:59:46,555 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=44, Invalid=228, Unknown=0, NotChecked=0, Total=272
[2018-04-10 13:59:46,556 INFO L87 Difference]: Start difference. First operand 145 states and 164 transitions. Second operand 17 states.
[2018-04-10 13:59:47,072 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-04-10 13:59:47,072 INFO L93 Difference]: Finished difference Result 226 states and 251 transitions.
[2018-04-10 13:59:47,072 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states.
[2018-04-10 13:59:47,072 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 32
[2018-04-10 13:59:47,073 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-04-10 13:59:47,073 INFO L225 Difference]: With dead ends: 226
[2018-04-10 13:59:47,073 INFO L226 Difference]: Without dead ends: 226
[2018-04-10 13:59:47,074 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 55 GetRequests, 23 SyntacticMatches, 5 SemanticMatches, 27 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 148 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=149, Invalid=663, Unknown=0, NotChecked=0, Total=812
[2018-04-10 13:59:47,074 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 226 states.
[2018-04-10 13:59:47,076 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 226 to 153.
[2018-04-10 13:59:47,076 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 153 states.
[2018-04-10 13:59:47,076 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 153 states to 153 states and 173 transitions.
[2018-04-10 13:59:47,076 INFO L78 Accepts]: Start accepts. Automaton has 153 states and 173 transitions. Word has length 32
[2018-04-10 13:59:47,077 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-04-10 13:59:47,077 INFO L459 AbstractCegarLoop]: Abstraction has 153 states and 173 transitions.
[2018-04-10 13:59:47,077 INFO L460 AbstractCegarLoop]: Interpolant automaton has 17 states.
[2018-04-10 13:59:47,077 INFO L276 IsEmpty]: Start isEmpty. Operand 153 states and 173 transitions.
[2018-04-10 13:59:47,077 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34
[2018-04-10 13:59:47,077 INFO L347 BasicCegarLoop]: Found error trace
[2018-04-10 13:59:47,077 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-04-10 13:59:47,077 INFO L408 AbstractCegarLoop]: === Iteration 18 === [mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr42EnsuresViolationMEMORY_LEAK, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr31RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr39RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr40AssertViolationMEMORY_FREE, mainErr41AssertViolationMEMORY_FREE, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr30RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr34RequiresViolation, mainErr4RequiresViolation, mainErr14RequiresViolation, mainErr37RequiresViolation]===
[2018-04-10 13:59:47,078 INFO L82 PathProgramCache]: Analyzing trace with hash -1771456283, now seen corresponding path program 1 times
[2018-04-10 13:59:47,078 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS
[2018-04-10 13:59:47,078 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy
[2018-04-10 13:59:47,080 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-04-10 13:59:47,081 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-04-10 13:59:47,081 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-04-10 13:59:47,087 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-04-10 13:59:47,088 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-04-10 13:59:47,173 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-04-10 13:59:47,173 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2018-04-10 13:59:47,174 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11
[2018-04-10 13:59:47,174 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states
[2018-04-10 13:59:47,174 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants.
[2018-04-10 13:59:47,174 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=85, Unknown=0, NotChecked=0, Total=110
[2018-04-10 13:59:47,174 INFO L87 Difference]: Start difference. First operand 153 states and 173 transitions. Second operand 11 states.
[2018-04-10 13:59:47,400 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-04-10 13:59:47,401 INFO L93 Difference]: Finished difference Result 199 states and 219 transitions.
[2018-04-10 13:59:47,401 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states.
[2018-04-10 13:59:47,401 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 33
[2018-04-10 13:59:47,401 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-04-10 13:59:47,402 INFO L225 Difference]: With dead ends: 199
[2018-04-10 13:59:47,402 INFO L226 Difference]: Without dead ends: 199
[2018-04-10 13:59:47,402 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 42 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=72, Invalid=234, Unknown=0, NotChecked=0, Total=306
[2018-04-10 13:59:47,402 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 199 states.
[2018-04-10 13:59:47,404 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 199 to 167.
[2018-04-10 13:59:47,404 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 167 states.
[2018-04-10 13:59:47,405 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 167 states to 167 states and 187 transitions.
[2018-04-10 13:59:47,405 INFO L78 Accepts]: Start accepts. Automaton has 167 states and 187 transitions. Word has length 33
[2018-04-10 13:59:47,405 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-04-10 13:59:47,405 INFO L459 AbstractCegarLoop]: Abstraction has 167 states and 187 transitions.
[2018-04-10 13:59:47,405 INFO L460 AbstractCegarLoop]: Interpolant automaton has 11 states.
[2018-04-10 13:59:47,405 INFO L276 IsEmpty]: Start isEmpty. Operand 167 states and 187 transitions.
[2018-04-10 13:59:47,406 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34
[2018-04-10 13:59:47,406 INFO L347 BasicCegarLoop]: Found error trace
[2018-04-10 13:59:47,406 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-04-10 13:59:47,406 INFO L408 AbstractCegarLoop]: === Iteration 19 === [mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr42EnsuresViolationMEMORY_LEAK, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr31RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr39RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr40AssertViolationMEMORY_FREE, mainErr41AssertViolationMEMORY_FREE, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr30RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr34RequiresViolation, mainErr4RequiresViolation, mainErr14RequiresViolation, mainErr37RequiresViolation]===
[2018-04-10 13:59:47,406 INFO L82 PathProgramCache]: Analyzing trace with hash -776317895, now seen corresponding path program 1 times
[2018-04-10 13:59:47,406 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS
[2018-04-10 13:59:47,407 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy
[2018-04-10 13:59:47,407 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-04-10 13:59:47,407 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-04-10 13:59:47,408 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-04-10 13:59:47,413 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-04-10 13:59:47,414 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-04-10 13:59:47,461 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-04-10 13:59:47,461 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2018-04-10 13:59:47,461 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8
[2018-04-10 13:59:47,462 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states
[2018-04-10 13:59:47,462 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants.
[2018-04-10 13:59:47,462 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56
[2018-04-10 13:59:47,462 INFO L87 Difference]: Start difference. First operand 167 states and 187 transitions. Second operand 8 states.
[2018-04-10 13:59:47,619 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-04-10 13:59:47,619 INFO L93 Difference]: Finished difference Result 222 states and 243 transitions.
[2018-04-10 13:59:47,619 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states.
[2018-04-10 13:59:47,619 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 33
[2018-04-10 13:59:47,620 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-04-10 13:59:47,620 INFO L225 Difference]: With dead ends: 222
[2018-04-10 13:59:47,620 INFO L226 Difference]: Without dead ends: 222
[2018-04-10 13:59:47,621 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 19 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=53, Invalid=157, Unknown=0, NotChecked=0, Total=210
[2018-04-10 13:59:47,621 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 222 states.
[2018-04-10 13:59:47,624 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 222 to 188.
[2018-04-10 13:59:47,624 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 188 states.
[2018-04-10 13:59:47,624 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 188 states to 188 states and 217 transitions.
[2018-04-10 13:59:47,625 INFO L78 Accepts]: Start accepts. Automaton has 188 states and 217 transitions. Word has length 33
[2018-04-10 13:59:47,625 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-04-10 13:59:47,625 INFO L459 AbstractCegarLoop]: Abstraction has 188 states and 217 transitions.
[2018-04-10 13:59:47,625 INFO L460 AbstractCegarLoop]: Interpolant automaton has 8 states.
[2018-04-10 13:59:47,625 INFO L276 IsEmpty]: Start isEmpty. Operand 188 states and 217 transitions.
[2018-04-10 13:59:47,625 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34
[2018-04-10 13:59:47,626 INFO L347 BasicCegarLoop]: Found error trace
[2018-04-10 13:59:47,626 INFO L355 BasicCegarLoop]: trace histogram [3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-04-10 13:59:47,626 INFO L408 AbstractCegarLoop]: === Iteration 20 === [mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr42EnsuresViolationMEMORY_LEAK, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr31RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr39RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr40AssertViolationMEMORY_FREE, mainErr41AssertViolationMEMORY_FREE, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr30RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr34RequiresViolation, mainErr4RequiresViolation, mainErr14RequiresViolation, mainErr37RequiresViolation]===
[2018-04-10 13:59:47,626 INFO L82 PathProgramCache]: Analyzing trace with hash -1339981119, now seen corresponding path program 2 times
[2018-04-10 13:59:47,626 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS
[2018-04-10 13:59:47,626 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy
[2018-04-10 13:59:47,627 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-04-10 13:59:47,627 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-04-10 13:59:47,627 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-04-10 13:59:47,635 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-04-10 13:59:47,635 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-04-10 13:59:47,738 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked.
[2018-04-10 13:59:47,738 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2018-04-10 13:59:47,738 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10
[2018-04-10 13:59:47,738 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states
[2018-04-10 13:59:47,738 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants.
[2018-04-10 13:59:47,738 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=66, Unknown=0, NotChecked=0, Total=90
[2018-04-10 13:59:47,738 INFO L87 Difference]: Start difference. First operand 188 states and 217 transitions. Second operand 10 states.
[2018-04-10 13:59:47,973 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-04-10 13:59:47,974 INFO L93 Difference]: Finished difference Result 196 states and 214 transitions.
[2018-04-10 13:59:47,974 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states.
[2018-04-10 13:59:47,974 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 33
[2018-04-10 13:59:47,976 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-04-10 13:59:47,976 INFO L225 Difference]: With dead ends: 196
[2018-04-10 13:59:47,976 INFO L226 Difference]: Without dead ends: 196
[2018-04-10 13:59:47,977 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 50 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=127, Invalid=253, Unknown=0, NotChecked=0, Total=380
[2018-04-10 13:59:47,977 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 196 states.
[2018-04-10 13:59:47,978 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 196 to 174.
[2018-04-10 13:59:47,979 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 174 states.
[2018-04-10 13:59:47,979 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 174 states to 174 states and 196 transitions.
[2018-04-10 13:59:47,979 INFO L78 Accepts]: Start accepts. Automaton has 174 states and 196 transitions. Word has length 33
[2018-04-10 13:59:47,979 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-04-10 13:59:47,979 INFO L459 AbstractCegarLoop]: Abstraction has 174 states and 196 transitions.
[2018-04-10 13:59:47,979 INFO L460 AbstractCegarLoop]: Interpolant automaton has 10 states.
[2018-04-10 13:59:47,980 INFO L276 IsEmpty]: Start isEmpty. Operand 174 states and 196 transitions.
[2018-04-10 13:59:47,981 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36
[2018-04-10 13:59:47,981 INFO L347 BasicCegarLoop]: Found error trace
[2018-04-10 13:59:47,981 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-04-10 13:59:47,982 INFO L408 AbstractCegarLoop]: === Iteration 21 === [mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr42EnsuresViolationMEMORY_LEAK, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr31RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr39RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr40AssertViolationMEMORY_FREE, mainErr41AssertViolationMEMORY_FREE, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr30RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr34RequiresViolation, mainErr4RequiresViolation, mainErr14RequiresViolation, mainErr37RequiresViolation]===
[2018-04-10 13:59:47,982 INFO L82 PathProgramCache]: Analyzing trace with hash -23783762, now seen corresponding path program 1 times
[2018-04-10 13:59:47,982 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS
[2018-04-10 13:59:47,982 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy
[2018-04-10 13:59:47,983 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-04-10 13:59:47,983 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY
[2018-04-10 13:59:47,983 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-04-10 13:59:47,990 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-04-10 13:59:47,990 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-04-10 13:59:48,145 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 1 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-04-10 13:59:48,145 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more.
[2018-04-10 13:59:48,145 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP
No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3
Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null)
Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000
[2018-04-10 13:59:48,153 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-04-10 13:59:48,165 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-04-10 13:59:48,167 INFO L270 TraceCheckSpWp]: Computing forward predicates...
[2018-04-10 13:59:48,171 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8
[2018-04-10 13:59:48,173 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7
[2018-04-10 13:59:48,174 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:48,175 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:48,182 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8
[2018-04-10 13:59:48,185 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7
[2018-04-10 13:59:48,185 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:48,186 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:48,191 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:48,192 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:28, output treesize:20
[2018-04-10 13:59:48,198 INFO L700 Elim1Store]: detected not equals via solver
[2018-04-10 13:59:48,199 INFO L700 Elim1Store]: detected not equals via solver
[2018-04-10 13:59:48,199 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4
[2018-04-10 13:59:48,199 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:48,204 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:48,204 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:25, output treesize:19
[2018-04-10 13:59:48,215 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 20
[2018-04-10 13:59:48,217 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7
[2018-04-10 13:59:48,217 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:48,222 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:48,232 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 24
[2018-04-10 13:59:48,234 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7
[2018-04-10 13:59:48,234 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:48,239 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:48,244 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:48,244 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:41, output treesize:39
[2018-04-10 13:59:48,318 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 69 treesize of output 56
[2018-04-10 13:59:48,321 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 3
[2018-04-10 13:59:48,321 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:48,330 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 27
[2018-04-10 13:59:48,330 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts.
[2018-04-10 13:59:48,337 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts.
[2018-04-10 13:59:48,346 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19
[2018-04-10 13:59:48,349 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 3
[2018-04-10 13:59:48,350 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:48,353 INFO L267 ElimStorePlain]: Start of recursive call 5: 2 dim-1 vars, End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:48,357 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:48,358 INFO L202 ElimStorePlain]: Needed 6 recursive calls to eliminate 4 variables, input treesize:69, output treesize:7
[2018-04-10 13:59:48,382 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 1 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-04-10 13:59:48,407 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences.
[2018-04-10 13:59:48,407 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11] total 15
[2018-04-10 13:59:48,408 INFO L442 AbstractCegarLoop]: Interpolant automaton has 15 states
[2018-04-10 13:59:48,408 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants.
[2018-04-10 13:59:48,408 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=31, Invalid=170, Unknown=9, NotChecked=0, Total=210
[2018-04-10 13:59:48,408 INFO L87 Difference]: Start difference. First operand 174 states and 196 transitions. Second operand 15 states.
[2018-04-10 13:59:48,811 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-04-10 13:59:48,812 INFO L93 Difference]: Finished difference Result 213 states and 235 transitions.
[2018-04-10 13:59:48,812 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states.
[2018-04-10 13:59:48,812 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 35
[2018-04-10 13:59:48,812 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-04-10 13:59:48,812 INFO L225 Difference]: With dead ends: 213
[2018-04-10 13:59:48,813 INFO L226 Difference]: Without dead ends: 213
[2018-04-10 13:59:48,813 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 57 GetRequests, 29 SyntacticMatches, 5 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 79 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=97, Invalid=492, Unknown=11, NotChecked=0, Total=600
[2018-04-10 13:59:48,813 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 213 states.
[2018-04-10 13:59:48,815 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 213 to 193.
[2018-04-10 13:59:48,815 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 193 states.
[2018-04-10 13:59:48,816 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 193 states to 193 states and 215 transitions.
[2018-04-10 13:59:48,816 INFO L78 Accepts]: Start accepts. Automaton has 193 states and 215 transitions. Word has length 35
[2018-04-10 13:59:48,816 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-04-10 13:59:48,816 INFO L459 AbstractCegarLoop]: Abstraction has 193 states and 215 transitions.
[2018-04-10 13:59:48,816 INFO L460 AbstractCegarLoop]: Interpolant automaton has 15 states.
[2018-04-10 13:59:48,817 INFO L276 IsEmpty]: Start isEmpty. Operand 193 states and 215 transitions.
[2018-04-10 13:59:48,817 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39
[2018-04-10 13:59:48,817 INFO L347 BasicCegarLoop]: Found error trace
[2018-04-10 13:59:48,817 INFO L355 BasicCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-04-10 13:59:48,817 INFO L408 AbstractCegarLoop]: === Iteration 22 === [mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr42EnsuresViolationMEMORY_LEAK, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr31RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr39RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr40AssertViolationMEMORY_FREE, mainErr41AssertViolationMEMORY_FREE, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr30RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr34RequiresViolation, mainErr4RequiresViolation, mainErr14RequiresViolation, mainErr37RequiresViolation]===
[2018-04-10 13:59:48,817 INFO L82 PathProgramCache]: Analyzing trace with hash -1777126719, now seen corresponding path program 2 times
[2018-04-10 13:59:48,818 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS
[2018-04-10 13:59:48,818 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy
[2018-04-10 13:59:48,819 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-04-10 13:59:48,819 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-04-10 13:59:48,819 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-04-10 13:59:48,827 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-04-10 13:59:48,828 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-04-10 13:59:48,989 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 7 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-04-10 13:59:48,989 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more.
[2018-04-10 13:59:48,989 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP
No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3
Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null)
Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000
[2018-04-10 13:59:49,001 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1
[2018-04-10 13:59:49,025 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s)
[2018-04-10 13:59:49,025 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat
[2018-04-10 13:59:49,028 INFO L270 TraceCheckSpWp]: Computing forward predicates...
[2018-04-10 13:59:49,082 INFO L700 Elim1Store]: detected not equals via solver
[2018-04-10 13:59:49,083 INFO L700 Elim1Store]: detected not equals via solver
[2018-04-10 13:59:49,083 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4
[2018-04-10 13:59:49,083 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:49,087 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:49,087 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:23, output treesize:17
[2018-04-10 13:59:49,104 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8
[2018-04-10 13:59:49,106 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7
[2018-04-10 13:59:49,106 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:49,108 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:49,116 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8
[2018-04-10 13:59:49,117 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7
[2018-04-10 13:59:49,118 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:49,119 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:49,125 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:49,125 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:36, output treesize:25
[2018-04-10 13:59:49,182 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 51
[2018-04-10 13:59:49,184 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 15
[2018-04-10 13:59:49,184 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:49,188 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:49,196 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 46 treesize of output 47
[2018-04-10 13:59:49,197 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 15
[2018-04-10 13:59:49,197 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:49,201 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:49,211 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:49,211 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:65, output treesize:49
[2018-04-10 13:59:49,310 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 69 treesize of output 56
[2018-04-10 13:59:49,332 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 27
[2018-04-10 13:59:49,333 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts.
[2018-04-10 13:59:49,353 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 15
[2018-04-10 13:59:49,353 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:49,359 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts.
[2018-04-10 13:59:49,366 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 29
[2018-04-10 13:59:49,367 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 14
[2018-04-10 13:59:49,367 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:49,371 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7
[2018-04-10 13:59:49,371 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:49,373 INFO L267 ElimStorePlain]: Start of recursive call 5: 2 dim-1 vars, End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:49,375 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:49,376 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 3 variables, input treesize:76, output treesize:7
[2018-04-10 13:59:49,386 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 7 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-04-10 13:59:49,402 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences.
[2018-04-10 13:59:49,402 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 15] total 25
[2018-04-10 13:59:49,403 INFO L442 AbstractCegarLoop]: Interpolant automaton has 25 states
[2018-04-10 13:59:49,403 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants.
[2018-04-10 13:59:49,403 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=67, Invalid=530, Unknown=3, NotChecked=0, Total=600
[2018-04-10 13:59:49,403 INFO L87 Difference]: Start difference. First operand 193 states and 215 transitions. Second operand 25 states.
[2018-04-10 13:59:50,044 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-04-10 13:59:50,045 INFO L93 Difference]: Finished difference Result 222 states and 238 transitions.
[2018-04-10 13:59:50,045 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states.
[2018-04-10 13:59:50,045 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 38
[2018-04-10 13:59:50,045 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-04-10 13:59:50,046 INFO L225 Difference]: With dead ends: 222
[2018-04-10 13:59:50,046 INFO L226 Difference]: Without dead ends: 222
[2018-04-10 13:59:50,046 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 67 GetRequests, 27 SyntacticMatches, 3 SemanticMatches, 37 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 225 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=252, Invalid=1226, Unknown=4, NotChecked=0, Total=1482
[2018-04-10 13:59:50,046 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 222 states.
[2018-04-10 13:59:50,048 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 222 to 192.
[2018-04-10 13:59:50,048 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 192 states.
[2018-04-10 13:59:50,049 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 192 states to 192 states and 212 transitions.
[2018-04-10 13:59:50,049 INFO L78 Accepts]: Start accepts. Automaton has 192 states and 212 transitions. Word has length 38
[2018-04-10 13:59:50,049 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-04-10 13:59:50,050 INFO L459 AbstractCegarLoop]: Abstraction has 192 states and 212 transitions.
[2018-04-10 13:59:50,050 INFO L460 AbstractCegarLoop]: Interpolant automaton has 25 states.
[2018-04-10 13:59:50,050 INFO L276 IsEmpty]: Start isEmpty. Operand 192 states and 212 transitions.
[2018-04-10 13:59:50,050 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40
[2018-04-10 13:59:50,050 INFO L347 BasicCegarLoop]: Found error trace
[2018-04-10 13:59:50,050 INFO L355 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-04-10 13:59:50,051 INFO L408 AbstractCegarLoop]: === Iteration 23 === [mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr42EnsuresViolationMEMORY_LEAK, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr31RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr39RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr40AssertViolationMEMORY_FREE, mainErr41AssertViolationMEMORY_FREE, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr30RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr34RequiresViolation, mainErr4RequiresViolation, mainErr14RequiresViolation, mainErr37RequiresViolation]===
[2018-04-10 13:59:50,051 INFO L82 PathProgramCache]: Analyzing trace with hash -362550985, now seen corresponding path program 1 times
[2018-04-10 13:59:50,051 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS
[2018-04-10 13:59:50,051 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy
[2018-04-10 13:59:50,052 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-04-10 13:59:50,052 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY
[2018-04-10 13:59:50,052 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-04-10 13:59:50,057 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-04-10 13:59:50,057 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-04-10 13:59:50,077 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked.
[2018-04-10 13:59:50,077 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2018-04-10 13:59:50,078 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5
[2018-04-10 13:59:50,078 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states
[2018-04-10 13:59:50,078 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants.
[2018-04-10 13:59:50,078 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20
[2018-04-10 13:59:50,078 INFO L87 Difference]: Start difference. First operand 192 states and 212 transitions. Second operand 5 states.
[2018-04-10 13:59:50,128 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-04-10 13:59:50,128 INFO L93 Difference]: Finished difference Result 218 states and 234 transitions.
[2018-04-10 13:59:50,128 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states.
[2018-04-10 13:59:50,128 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 39
[2018-04-10 13:59:50,128 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-04-10 13:59:50,129 INFO L225 Difference]: With dead ends: 218
[2018-04-10 13:59:50,129 INFO L226 Difference]: Without dead ends: 218
[2018-04-10 13:59:50,129 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56
[2018-04-10 13:59:50,129 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 218 states.
[2018-04-10 13:59:50,131 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 218 to 181.
[2018-04-10 13:59:50,131 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 181 states.
[2018-04-10 13:59:50,131 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 181 states to 181 states and 196 transitions.
[2018-04-10 13:59:50,131 INFO L78 Accepts]: Start accepts. Automaton has 181 states and 196 transitions. Word has length 39
[2018-04-10 13:59:50,132 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-04-10 13:59:50,132 INFO L459 AbstractCegarLoop]: Abstraction has 181 states and 196 transitions.
[2018-04-10 13:59:50,132 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states.
[2018-04-10 13:59:50,132 INFO L276 IsEmpty]: Start isEmpty. Operand 181 states and 196 transitions.
[2018-04-10 13:59:50,132 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42
[2018-04-10 13:59:50,132 INFO L347 BasicCegarLoop]: Found error trace
[2018-04-10 13:59:50,132 INFO L355 BasicCegarLoop]: trace histogram [3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-04-10 13:59:50,132 INFO L408 AbstractCegarLoop]: === Iteration 24 === [mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr42EnsuresViolationMEMORY_LEAK, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr31RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr39RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr40AssertViolationMEMORY_FREE, mainErr41AssertViolationMEMORY_FREE, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr30RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr34RequiresViolation, mainErr4RequiresViolation, mainErr14RequiresViolation, mainErr37RequiresViolation]===
[2018-04-10 13:59:50,132 INFO L82 PathProgramCache]: Analyzing trace with hash 825125319, now seen corresponding path program 3 times
[2018-04-10 13:59:50,132 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS
[2018-04-10 13:59:50,132 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy
[2018-04-10 13:59:50,133 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-04-10 13:59:50,133 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-04-10 13:59:50,133 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-04-10 13:59:50,140 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-04-10 13:59:50,140 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-04-10 13:59:50,256 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 0 proven. 17 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-04-10 13:59:50,256 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more.
[2018-04-10 13:59:50,256 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP
No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3
Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null)
Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000
[2018-04-10 13:59:50,261 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2
[2018-04-10 13:59:50,281 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s)
[2018-04-10 13:59:50,281 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat
[2018-04-10 13:59:50,283 INFO L270 TraceCheckSpWp]: Computing forward predicates...
[2018-04-10 13:59:50,286 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5
[2018-04-10 13:59:50,286 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:50,288 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:50,288 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9
[2018-04-10 13:59:50,321 INFO L700 Elim1Store]: detected not equals via solver
[2018-04-10 13:59:50,321 INFO L700 Elim1Store]: detected not equals via solver
[2018-04-10 13:59:50,321 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4
[2018-04-10 13:59:50,322 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:50,324 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:50,325 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:20, output treesize:14
[2018-04-10 13:59:50,338 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8
[2018-04-10 13:59:50,339 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7
[2018-04-10 13:59:50,339 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:50,340 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:50,345 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:50,346 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:30, output treesize:23
[2018-04-10 13:59:50,392 INFO L700 Elim1Store]: detected not equals via solver
[2018-04-10 13:59:50,395 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 28
[2018-04-10 13:59:50,396 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7
[2018-04-10 13:59:50,396 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:50,400 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:50,405 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:50,405 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:35, output treesize:27
[2018-04-10 13:59:50,424 INFO L700 Elim1Store]: detected not equals via solver
[2018-04-10 13:59:50,425 INFO L700 Elim1Store]: detected not equals via solver
[2018-04-10 13:59:50,425 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4
[2018-04-10 13:59:50,426 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:50,429 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:50,430 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:32, output treesize:26
[2018-04-10 13:59:50,448 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 25
[2018-04-10 13:59:50,450 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 7
[2018-04-10 13:59:50,451 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:50,454 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:50,459 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:50,459 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:42, output treesize:28
[2018-04-10 13:59:50,535 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 4 new quantified variables, introduced 3 case distinctions, treesize of input 57 treesize of output 61
[2018-04-10 13:59:50,538 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 62 treesize of output 61
[2018-04-10 13:59:50,539 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:50,557 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 37 treesize of output 45
[2018-04-10 13:59:50,558 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 2 xjuncts.
[2018-04-10 13:59:50,568 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 2 xjuncts.
[2018-04-10 13:59:50,578 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 3 dim-0 vars, and 2 xjuncts.
[2018-04-10 13:59:50,578 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 3 variables, input treesize:60, output treesize:81
[2018-04-10 13:59:50,652 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 24
[2018-04-10 13:59:50,653 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 10
[2018-04-10 13:59:50,653 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:50,656 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1
[2018-04-10 13:59:50,657 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:50,658 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:50,671 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 4 new quantified variables, introduced 1 case distinctions, treesize of input 52 treesize of output 43
[2018-04-10 13:59:50,673 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 21
[2018-04-10 13:59:50,674 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:50,686 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 21 treesize of output 22
[2018-04-10 13:59:50,687 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 2 xjuncts.
[2018-04-10 13:59:50,699 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 27
[2018-04-10 13:59:50,700 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:50,712 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 22
[2018-04-10 13:59:50,712 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:50,723 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 18
[2018-04-10 13:59:50,723 INFO L267 ElimStorePlain]: Start of recursive call 10: End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:50,728 INFO L267 ElimStorePlain]: Start of recursive call 5: 5 dim-1 vars, End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:50,733 INFO L267 ElimStorePlain]: Start of recursive call 1: 5 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:50,733 INFO L202 ElimStorePlain]: Needed 10 recursive calls to eliminate 7 variables, input treesize:89, output treesize:5
[2018-04-10 13:59:50,738 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 0 proven. 17 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-04-10 13:59:50,757 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences.
[2018-04-10 13:59:50,757 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 17] total 29
[2018-04-10 13:59:50,757 INFO L442 AbstractCegarLoop]: Interpolant automaton has 30 states
[2018-04-10 13:59:50,757 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants.
[2018-04-10 13:59:50,758 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=100, Invalid=770, Unknown=0, NotChecked=0, Total=870
[2018-04-10 13:59:50,758 INFO L87 Difference]: Start difference. First operand 181 states and 196 transitions. Second operand 30 states.
[2018-04-10 13:59:52,129 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-04-10 13:59:52,129 INFO L93 Difference]: Finished difference Result 285 states and 307 transitions.
[2018-04-10 13:59:52,129 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states.
[2018-04-10 13:59:52,129 INFO L78 Accepts]: Start accepts. Automaton has 30 states. Word has length 41
[2018-04-10 13:59:52,130 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-04-10 13:59:52,131 INFO L225 Difference]: With dead ends: 285
[2018-04-10 13:59:52,131 INFO L226 Difference]: Without dead ends: 285
[2018-04-10 13:59:52,132 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 88 GetRequests, 29 SyntacticMatches, 1 SemanticMatches, 58 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 856 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=575, Invalid=2964, Unknown=1, NotChecked=0, Total=3540
[2018-04-10 13:59:52,132 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 285 states.
[2018-04-10 13:59:52,134 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 285 to 200.
[2018-04-10 13:59:52,134 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 200 states.
[2018-04-10 13:59:52,135 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 200 states to 200 states and 220 transitions.
[2018-04-10 13:59:52,135 INFO L78 Accepts]: Start accepts. Automaton has 200 states and 220 transitions. Word has length 41
[2018-04-10 13:59:52,135 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-04-10 13:59:52,135 INFO L459 AbstractCegarLoop]: Abstraction has 200 states and 220 transitions.
[2018-04-10 13:59:52,135 INFO L460 AbstractCegarLoop]: Interpolant automaton has 30 states.
[2018-04-10 13:59:52,135 INFO L276 IsEmpty]: Start isEmpty. Operand 200 states and 220 transitions.
[2018-04-10 13:59:52,136 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42
[2018-04-10 13:59:52,136 INFO L347 BasicCegarLoop]: Found error trace
[2018-04-10 13:59:52,136 INFO L355 BasicCegarLoop]: trace histogram [3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-04-10 13:59:52,136 INFO L408 AbstractCegarLoop]: === Iteration 25 === [mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr42EnsuresViolationMEMORY_LEAK, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr31RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr39RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr40AssertViolationMEMORY_FREE, mainErr41AssertViolationMEMORY_FREE, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr30RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr34RequiresViolation, mainErr4RequiresViolation, mainErr14RequiresViolation, mainErr37RequiresViolation]===
[2018-04-10 13:59:52,136 INFO L82 PathProgramCache]: Analyzing trace with hash 825125320, now seen corresponding path program 2 times
[2018-04-10 13:59:52,136 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS
[2018-04-10 13:59:52,136 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy
[2018-04-10 13:59:52,137 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-04-10 13:59:52,137 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY
[2018-04-10 13:59:52,137 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-04-10 13:59:52,145 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-04-10 13:59:52,146 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-04-10 13:59:52,288 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 0 proven. 17 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-04-10 13:59:52,288 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more.
[2018-04-10 13:59:52,288 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP
No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3
Starting monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null)
Waiting until toolchain timeout for monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000
[2018-04-10 13:59:52,294 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1
[2018-04-10 13:59:52,308 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s)
[2018-04-10 13:59:52,309 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat
[2018-04-10 13:59:52,311 INFO L270 TraceCheckSpWp]: Computing forward predicates...
[2018-04-10 13:59:52,313 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5
[2018-04-10 13:59:52,313 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:52,315 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:52,315 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9
[2018-04-10 13:59:52,349 INFO L700 Elim1Store]: detected not equals via solver
[2018-04-10 13:59:52,350 INFO L700 Elim1Store]: detected not equals via solver
[2018-04-10 13:59:52,350 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4
[2018-04-10 13:59:52,350 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:52,353 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:52,354 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:23, output treesize:17
[2018-04-10 13:59:52,391 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8
[2018-04-10 13:59:52,392 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7
[2018-04-10 13:59:52,392 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:52,394 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:52,402 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8
[2018-04-10 13:59:52,435 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7
[2018-04-10 13:59:52,435 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:52,439 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:52,446 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:52,446 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:41, output treesize:30
[2018-04-10 13:59:52,501 INFO L700 Elim1Store]: detected not equals via solver
[2018-04-10 13:59:52,503 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 24
[2018-04-10 13:59:52,505 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11
[2018-04-10 13:59:52,505 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:52,508 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:52,517 INFO L700 Elim1Store]: detected not equals via solver
[2018-04-10 13:59:52,520 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 39
[2018-04-10 13:59:52,521 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7
[2018-04-10 13:59:52,521 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:52,525 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:52,532 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:52,533 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:56, output treesize:48
[2018-04-10 13:59:52,558 INFO L700 Elim1Store]: detected not equals via solver
[2018-04-10 13:59:52,558 INFO L700 Elim1Store]: detected not equals via solver
[2018-04-10 13:59:52,559 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4
[2018-04-10 13:59:52,559 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:52,566 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:52,566 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:53, output treesize:47
[2018-04-10 13:59:52,594 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 36
[2018-04-10 13:59:52,597 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 11
[2018-04-10 13:59:52,597 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:52,601 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:52,625 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 36
[2018-04-10 13:59:52,630 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 7
[2018-04-10 13:59:52,630 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:52,635 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:52,644 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:52,644 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:76, output treesize:40
[2018-04-10 13:59:52,728 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 36
[2018-04-10 13:59:52,730 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 15
[2018-04-10 13:59:52,730 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:52,734 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:52,756 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 4 new quantified variables, introduced 3 case distinctions, treesize of input 74 treesize of output 72
[2018-04-10 13:59:52,764 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 54 treesize of output 58
[2018-04-10 13:59:52,764 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 2 xjuncts.
[2018-04-10 13:59:52,791 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 63 treesize of output 62
[2018-04-10 13:59:52,791 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:52,830 INFO L267 ElimStorePlain]: Start of recursive call 4: 2 dim-1 vars, End of recursive call: and 2 xjuncts.
[2018-04-10 13:59:52,851 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: 3 dim-0 vars, and 2 xjuncts.
[2018-04-10 13:59:52,851 INFO L202 ElimStorePlain]: Needed 6 recursive calls to eliminate 4 variables, input treesize:99, output treesize:131
[2018-04-10 13:59:52,973 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 4 new quantified variables, introduced 1 case distinctions, treesize of input 86 treesize of output 71
[2018-04-10 13:59:52,976 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 64 treesize of output 59
[2018-04-10 13:59:52,976 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:52,997 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 50
[2018-04-10 13:59:52,997 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:53,017 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 50 treesize of output 44
[2018-04-10 13:59:53,018 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts.
[2018-04-10 13:59:53,040 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 58 treesize of output 57
[2018-04-10 13:59:53,041 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts.
[2018-04-10 13:59:53,071 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 40
[2018-04-10 13:59:53,071 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:53,073 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 53 treesize of output 44
[2018-04-10 13:59:53,073 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:53,096 INFO L267 ElimStorePlain]: Start of recursive call 2: 5 dim-1 vars, End of recursive call: 2 dim-0 vars, and 3 xjuncts.
[2018-04-10 13:59:53,131 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 38
[2018-04-10 13:59:53,133 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1
[2018-04-10 13:59:53,133 INFO L267 ElimStorePlain]: Start of recursive call 10: End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:53,140 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3
[2018-04-10 13:59:53,140 INFO L267 ElimStorePlain]: Start of recursive call 11: End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:53,144 INFO L267 ElimStorePlain]: Start of recursive call 9: 2 dim-1 vars, End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:53,146 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 38
[2018-04-10 13:59:53,148 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1
[2018-04-10 13:59:53,148 INFO L267 ElimStorePlain]: Start of recursive call 13: End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:53,155 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3
[2018-04-10 13:59:53,155 INFO L267 ElimStorePlain]: Start of recursive call 14: End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:53,160 INFO L267 ElimStorePlain]: Start of recursive call 12: 2 dim-1 vars, End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:53,161 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 34
[2018-04-10 13:59:53,163 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3
[2018-04-10 13:59:53,163 INFO L267 ElimStorePlain]: Start of recursive call 16: End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:53,169 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1
[2018-04-10 13:59:53,169 INFO L267 ElimStorePlain]: Start of recursive call 17: End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:53,173 INFO L267 ElimStorePlain]: Start of recursive call 15: 2 dim-1 vars, End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:53,212 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 56
[2018-04-10 13:59:53,214 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3
[2018-04-10 13:59:53,214 INFO L267 ElimStorePlain]: Start of recursive call 19: End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:53,221 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1
[2018-04-10 13:59:53,221 INFO L267 ElimStorePlain]: Start of recursive call 20: End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:53,227 INFO L267 ElimStorePlain]: Start of recursive call 18: 2 dim-1 vars, End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:53,252 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 32
[2018-04-10 13:59:53,279 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1
[2018-04-10 13:59:53,279 INFO L267 ElimStorePlain]: Start of recursive call 22: End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:53,285 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 12
[2018-04-10 13:59:53,286 INFO L267 ElimStorePlain]: Start of recursive call 23: End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:53,289 INFO L267 ElimStorePlain]: Start of recursive call 21: 2 dim-1 vars, End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:53,311 INFO L267 ElimStorePlain]: Start of recursive call 1: 5 dim-0 vars, 4 dim-2 vars, End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:53,311 INFO L202 ElimStorePlain]: Needed 23 recursive calls to eliminate 9 variables, input treesize:153, output treesize:9
[2018-04-10 13:59:53,366 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 0 proven. 17 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-04-10 13:59:53,385 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences.
[2018-04-10 13:59:53,385 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 17] total 31
[2018-04-10 13:59:53,385 INFO L442 AbstractCegarLoop]: Interpolant automaton has 32 states
[2018-04-10 13:59:53,385 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants.
[2018-04-10 13:59:53,385 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=94, Invalid=897, Unknown=1, NotChecked=0, Total=992
[2018-04-10 13:59:53,386 INFO L87 Difference]: Start difference. First operand 200 states and 220 transitions. Second operand 32 states.
[2018-04-10 13:59:55,299 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-04-10 13:59:55,299 INFO L93 Difference]: Finished difference Result 270 states and 294 transitions.
[2018-04-10 13:59:55,299 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states.
[2018-04-10 13:59:55,299 INFO L78 Accepts]: Start accepts. Automaton has 32 states. Word has length 41
[2018-04-10 13:59:55,300 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-04-10 13:59:55,300 INFO L225 Difference]: With dead ends: 270
[2018-04-10 13:59:55,300 INFO L226 Difference]: Without dead ends: 270
[2018-04-10 13:59:55,301 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 79 GetRequests, 28 SyntacticMatches, 1 SemanticMatches, 50 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 427 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=366, Invalid=2283, Unknown=3, NotChecked=0, Total=2652
[2018-04-10 13:59:55,301 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 270 states.
[2018-04-10 13:59:55,302 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 270 to 202.
[2018-04-10 13:59:55,302 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 202 states.
[2018-04-10 13:59:55,302 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 202 states to 202 states and 223 transitions.
[2018-04-10 13:59:55,303 INFO L78 Accepts]: Start accepts. Automaton has 202 states and 223 transitions. Word has length 41
[2018-04-10 13:59:55,303 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-04-10 13:59:55,303 INFO L459 AbstractCegarLoop]: Abstraction has 202 states and 223 transitions.
[2018-04-10 13:59:55,303 INFO L460 AbstractCegarLoop]: Interpolant automaton has 32 states.
[2018-04-10 13:59:55,303 INFO L276 IsEmpty]: Start isEmpty. Operand 202 states and 223 transitions.
[2018-04-10 13:59:55,303 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44
[2018-04-10 13:59:55,303 INFO L347 BasicCegarLoop]: Found error trace
[2018-04-10 13:59:55,303 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-04-10 13:59:55,303 INFO L408 AbstractCegarLoop]: === Iteration 26 === [mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr42EnsuresViolationMEMORY_LEAK, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr31RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr39RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr40AssertViolationMEMORY_FREE, mainErr41AssertViolationMEMORY_FREE, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr30RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr34RequiresViolation, mainErr4RequiresViolation, mainErr14RequiresViolation, mainErr37RequiresViolation]===
[2018-04-10 13:59:55,303 INFO L82 PathProgramCache]: Analyzing trace with hash 309460647, now seen corresponding path program 1 times
[2018-04-10 13:59:55,303 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS
[2018-04-10 13:59:55,304 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy
[2018-04-10 13:59:55,304 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-04-10 13:59:55,304 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY
[2018-04-10 13:59:55,304 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-04-10 13:59:55,310 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-04-10 13:59:55,310 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-04-10 13:59:55,356 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 1 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-04-10 13:59:55,357 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more.
[2018-04-10 13:59:55,357 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP
No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3
Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null)
Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000
[2018-04-10 13:59:55,363 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-04-10 13:59:55,374 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-04-10 13:59:55,376 INFO L270 TraceCheckSpWp]: Computing forward predicates...
[2018-04-10 13:59:55,425 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11
[2018-04-10 13:59:55,426 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3
[2018-04-10 13:59:55,426 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:55,427 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:55,432 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11
[2018-04-10 13:59:55,433 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3
[2018-04-10 13:59:55,433 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:55,434 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:55,436 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:55,437 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:35, output treesize:13
[2018-04-10 13:59:55,460 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8
[2018-04-10 13:59:55,461 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7
[2018-04-10 13:59:55,461 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:55,462 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:55,465 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8
[2018-04-10 13:59:55,466 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7
[2018-04-10 13:59:55,466 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:55,467 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:55,469 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:55,469 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:23, output treesize:15
[2018-04-10 13:59:55,508 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11
[2018-04-10 13:59:55,512 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 1 case distinctions, treesize of input 11 treesize of output 8
[2018-04-10 13:59:55,512 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 2 xjuncts.
[2018-04-10 13:59:55,515 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 2 xjuncts.
[2018-04-10 13:59:55,522 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11
[2018-04-10 13:59:55,526 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 1 case distinctions, treesize of input 11 treesize of output 8
[2018-04-10 13:59:55,526 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 2 xjuncts.
[2018-04-10 13:59:55,528 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 2 xjuncts.
[2018-04-10 13:59:55,536 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 2 xjuncts.
[2018-04-10 13:59:55,536 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:35, output treesize:18
[2018-04-10 13:59:55,584 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 1 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-04-10 13:59:55,615 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences.
[2018-04-10 13:59:55,616 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 15] total 21
[2018-04-10 13:59:55,616 INFO L442 AbstractCegarLoop]: Interpolant automaton has 21 states
[2018-04-10 13:59:55,616 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants.
[2018-04-10 13:59:55,616 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=47, Invalid=373, Unknown=0, NotChecked=0, Total=420
[2018-04-10 13:59:55,616 INFO L87 Difference]: Start difference. First operand 202 states and 223 transitions. Second operand 21 states.
[2018-04-10 13:59:56,253 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-04-10 13:59:56,253 INFO L93 Difference]: Finished difference Result 246 states and 268 transitions.
[2018-04-10 13:59:56,253 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states.
[2018-04-10 13:59:56,253 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 43
[2018-04-10 13:59:56,253 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-04-10 13:59:56,254 INFO L225 Difference]: With dead ends: 246
[2018-04-10 13:59:56,254 INFO L226 Difference]: Without dead ends: 246
[2018-04-10 13:59:56,254 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 77 GetRequests, 37 SyntacticMatches, 1 SemanticMatches, 39 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 247 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=271, Invalid=1369, Unknown=0, NotChecked=0, Total=1640
[2018-04-10 13:59:56,255 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 246 states.
[2018-04-10 13:59:56,257 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 246 to 217.
[2018-04-10 13:59:56,257 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 217 states.
[2018-04-10 13:59:56,258 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 217 states to 217 states and 239 transitions.
[2018-04-10 13:59:56,258 INFO L78 Accepts]: Start accepts. Automaton has 217 states and 239 transitions. Word has length 43
[2018-04-10 13:59:56,258 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-04-10 13:59:56,258 INFO L459 AbstractCegarLoop]: Abstraction has 217 states and 239 transitions.
[2018-04-10 13:59:56,258 INFO L460 AbstractCegarLoop]: Interpolant automaton has 21 states.
[2018-04-10 13:59:56,258 INFO L276 IsEmpty]: Start isEmpty. Operand 217 states and 239 transitions.
[2018-04-10 13:59:56,259 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44
[2018-04-10 13:59:56,259 INFO L347 BasicCegarLoop]: Found error trace
[2018-04-10 13:59:56,259 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-04-10 13:59:56,259 INFO L408 AbstractCegarLoop]: === Iteration 27 === [mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr42EnsuresViolationMEMORY_LEAK, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr31RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr39RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr40AssertViolationMEMORY_FREE, mainErr41AssertViolationMEMORY_FREE, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr30RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr34RequiresViolation, mainErr4RequiresViolation, mainErr14RequiresViolation, mainErr37RequiresViolation]===
[2018-04-10 13:59:56,259 INFO L82 PathProgramCache]: Analyzing trace with hash 1398575738, now seen corresponding path program 1 times
[2018-04-10 13:59:56,259 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS
[2018-04-10 13:59:56,260 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy
[2018-04-10 13:59:56,260 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-04-10 13:59:56,260 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-04-10 13:59:56,261 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-04-10 13:59:56,268 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-04-10 13:59:56,269 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-04-10 13:59:56,382 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-04-10 13:59:56,382 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more.
[2018-04-10 13:59:56,382 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP
No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3
Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null)
Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000
[2018-04-10 13:59:56,390 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-04-10 13:59:56,403 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-04-10 13:59:56,405 INFO L270 TraceCheckSpWp]: Computing forward predicates...
[2018-04-10 13:59:56,409 INFO L700 Elim1Store]: detected not equals via solver
[2018-04-10 13:59:56,409 INFO L700 Elim1Store]: detected not equals via solver
[2018-04-10 13:59:56,410 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21
[2018-04-10 13:59:56,410 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:56,414 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:56,414 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:23, output treesize:21
[2018-04-10 13:59:56,427 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8
[2018-04-10 13:59:56,428 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7
[2018-04-10 13:59:56,429 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:56,429 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:56,434 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:56,434 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:32, output treesize:29
[2018-04-10 13:59:56,472 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 33
[2018-04-10 13:59:56,474 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11
[2018-04-10 13:59:56,474 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:56,477 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:56,480 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts.
[2018-04-10 13:59:56,480 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:42, output treesize:34
[2018-04-10 13:59:56,531 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 38
[2018-04-10 13:59:56,533 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 17
[2018-04-10 13:59:56,533 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:56,544 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1
[2018-04-10 13:59:56,544 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:56,546 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:56,550 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:56,550 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 2 variables, input treesize:47, output treesize:21
[2018-04-10 13:59:56,579 INFO L700 Elim1Store]: detected not equals via solver
[2018-04-10 13:59:56,580 INFO L700 Elim1Store]: detected not equals via solver
[2018-04-10 13:59:56,580 INFO L700 Elim1Store]: detected not equals via solver
[2018-04-10 13:59:56,581 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 34
[2018-04-10 13:59:56,581 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:56,588 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts.
[2018-04-10 13:59:56,588 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:32, output treesize:34
[2018-04-10 13:59:56,611 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8
[2018-04-10 13:59:56,612 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7
[2018-04-10 13:59:56,612 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:56,613 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:56,619 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts.
[2018-04-10 13:59:56,619 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:39, output treesize:40
[2018-04-10 13:59:56,665 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 25
[2018-04-10 13:59:56,666 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 14
[2018-04-10 13:59:56,666 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:56,669 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:56,674 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts.
[2018-04-10 13:59:56,674 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:47, output treesize:28
[2018-04-10 13:59:56,722 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-04-10 13:59:56,739 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences.
[2018-04-10 13:59:56,740 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 16] total 27
[2018-04-10 13:59:56,740 INFO L442 AbstractCegarLoop]: Interpolant automaton has 28 states
[2018-04-10 13:59:56,740 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants.
[2018-04-10 13:59:56,740 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=112, Invalid=644, Unknown=0, NotChecked=0, Total=756
[2018-04-10 13:59:56,741 INFO L87 Difference]: Start difference. First operand 217 states and 239 transitions. Second operand 28 states.
[2018-04-10 13:59:58,274 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-04-10 13:59:58,274 INFO L93 Difference]: Finished difference Result 360 states and 386 transitions.
[2018-04-10 13:59:58,275 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 41 states.
[2018-04-10 13:59:58,275 INFO L78 Accepts]: Start accepts. Automaton has 28 states. Word has length 43
[2018-04-10 13:59:58,275 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-04-10 13:59:58,275 INFO L225 Difference]: With dead ends: 360
[2018-04-10 13:59:58,276 INFO L226 Difference]: Without dead ends: 360
[2018-04-10 13:59:58,276 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 90 GetRequests, 33 SyntacticMatches, 2 SemanticMatches, 55 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 811 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=569, Invalid=2623, Unknown=0, NotChecked=0, Total=3192
[2018-04-10 13:59:58,276 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 360 states.
[2018-04-10 13:59:58,279 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 360 to 232.
[2018-04-10 13:59:58,279 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 232 states.
[2018-04-10 13:59:58,280 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 232 states to 232 states and 256 transitions.
[2018-04-10 13:59:58,280 INFO L78 Accepts]: Start accepts. Automaton has 232 states and 256 transitions. Word has length 43
[2018-04-10 13:59:58,280 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-04-10 13:59:58,280 INFO L459 AbstractCegarLoop]: Abstraction has 232 states and 256 transitions.
[2018-04-10 13:59:58,280 INFO L460 AbstractCegarLoop]: Interpolant automaton has 28 states.
[2018-04-10 13:59:58,280 INFO L276 IsEmpty]: Start isEmpty. Operand 232 states and 256 transitions.
[2018-04-10 13:59:58,281 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44
[2018-04-10 13:59:58,281 INFO L347 BasicCegarLoop]: Found error trace
[2018-04-10 13:59:58,281 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-04-10 13:59:58,281 INFO L408 AbstractCegarLoop]: === Iteration 28 === [mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr42EnsuresViolationMEMORY_LEAK, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr31RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr39RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr40AssertViolationMEMORY_FREE, mainErr41AssertViolationMEMORY_FREE, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr30RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr34RequiresViolation, mainErr4RequiresViolation, mainErr14RequiresViolation, mainErr37RequiresViolation]===
[2018-04-10 13:59:58,281 INFO L82 PathProgramCache]: Analyzing trace with hash 1398575739, now seen corresponding path program 1 times
[2018-04-10 13:59:58,281 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS
[2018-04-10 13:59:58,282 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy
[2018-04-10 13:59:58,282 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-04-10 13:59:58,283 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-04-10 13:59:58,283 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-04-10 13:59:58,291 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-04-10 13:59:58,292 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-04-10 13:59:58,550 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-04-10 13:59:58,551 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more.
[2018-04-10 13:59:58,551 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP
No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3
Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null)
Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000
[2018-04-10 13:59:58,559 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-04-10 13:59:58,580 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-04-10 13:59:58,583 INFO L270 TraceCheckSpWp]: Computing forward predicates...
[2018-04-10 13:59:58,595 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5
[2018-04-10 13:59:58,595 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:58,605 INFO L700 Elim1Store]: detected not equals via solver
[2018-04-10 13:59:58,606 INFO L700 Elim1Store]: detected not equals via solver
[2018-04-10 13:59:58,607 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21
[2018-04-10 13:59:58,607 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:58,616 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:58,616 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:32, output treesize:29
[2018-04-10 13:59:58,641 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8
[2018-04-10 13:59:58,643 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7
[2018-04-10 13:59:58,643 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:58,645 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:58,658 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8
[2018-04-10 13:59:58,660 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7
[2018-04-10 13:59:58,661 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:58,663 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:58,673 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:58,673 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:48, output treesize:45
[2018-04-10 13:59:58,760 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 65 treesize of output 61
[2018-04-10 13:59:58,763 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11
[2018-04-10 13:59:58,763 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:58,770 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:58,793 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 28
[2018-04-10 13:59:58,795 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11
[2018-04-10 13:59:58,796 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:58,800 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:58,809 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts.
[2018-04-10 13:59:58,809 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:77, output treesize:61
[2018-04-10 13:59:58,894 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 56 treesize of output 54
[2018-04-10 13:59:58,897 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1
[2018-04-10 13:59:58,898 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:58,908 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 25
[2018-04-10 13:59:58,909 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:58,915 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:58,929 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 23
[2018-04-10 13:59:58,931 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 7
[2018-04-10 13:59:58,932 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:58,938 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1
[2018-04-10 13:59:58,938 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:58,940 INFO L267 ElimStorePlain]: Start of recursive call 5: 2 dim-1 vars, End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:58,948 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:58,948 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 3 variables, input treesize:81, output treesize:29
[2018-04-10 13:59:59,012 INFO L700 Elim1Store]: detected not equals via solver
[2018-04-10 13:59:59,013 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15
[2018-04-10 13:59:59,013 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:59,035 INFO L700 Elim1Store]: detected not equals via solver
[2018-04-10 13:59:59,036 INFO L700 Elim1Store]: detected not equals via solver
[2018-04-10 13:59:59,037 INFO L700 Elim1Store]: detected not equals via solver
[2018-04-10 13:59:59,038 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 13
[2018-04-10 13:59:59,038 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:59,048 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts.
[2018-04-10 13:59:59,048 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:40, output treesize:32
[2018-04-10 13:59:59,076 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8
[2018-04-10 13:59:59,078 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7
[2018-04-10 13:59:59,078 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:59,092 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:59,102 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8
[2018-04-10 13:59:59,104 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7
[2018-04-10 13:59:59,104 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:59,105 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:59,116 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts.
[2018-04-10 13:59:59,117 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:45, output treesize:42
[2018-04-10 13:59:59,180 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 25
[2018-04-10 13:59:59,192 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 14
[2018-04-10 13:59:59,193 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:59,196 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:59,203 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11
[2018-04-10 13:59:59,204 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3
[2018-04-10 13:59:59,204 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:59,205 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts.
[2018-04-10 13:59:59,210 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts.
[2018-04-10 13:59:59,211 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 5 variables, input treesize:56, output treesize:18
[2018-04-10 13:59:59,257 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-04-10 13:59:59,274 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences.
[2018-04-10 13:59:59,274 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 16] total 28
[2018-04-10 13:59:59,274 INFO L442 AbstractCegarLoop]: Interpolant automaton has 29 states
[2018-04-10 13:59:59,274 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants.
[2018-04-10 13:59:59,275 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=99, Invalid=713, Unknown=0, NotChecked=0, Total=812
[2018-04-10 13:59:59,275 INFO L87 Difference]: Start difference. First operand 232 states and 256 transitions. Second operand 29 states.
[2018-04-10 14:00:00,417 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-04-10 14:00:00,417 INFO L93 Difference]: Finished difference Result 309 states and 334 transitions.
[2018-04-10 14:00:00,417 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states.
[2018-04-10 14:00:00,417 INFO L78 Accepts]: Start accepts. Automaton has 29 states. Word has length 43
[2018-04-10 14:00:00,418 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-04-10 14:00:00,418 INFO L225 Difference]: With dead ends: 309
[2018-04-10 14:00:00,418 INFO L226 Difference]: Without dead ends: 309
[2018-04-10 14:00:00,419 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 78 GetRequests, 32 SyntacticMatches, 3 SemanticMatches, 43 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 429 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=287, Invalid=1693, Unknown=0, NotChecked=0, Total=1980
[2018-04-10 14:00:00,419 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 309 states.
[2018-04-10 14:00:00,420 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 309 to 231.
[2018-04-10 14:00:00,421 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 231 states.
[2018-04-10 14:00:00,421 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 231 states to 231 states and 254 transitions.
[2018-04-10 14:00:00,421 INFO L78 Accepts]: Start accepts. Automaton has 231 states and 254 transitions. Word has length 43
[2018-04-10 14:00:00,421 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-04-10 14:00:00,421 INFO L459 AbstractCegarLoop]: Abstraction has 231 states and 254 transitions.
[2018-04-10 14:00:00,421 INFO L460 AbstractCegarLoop]: Interpolant automaton has 29 states.
[2018-04-10 14:00:00,421 INFO L276 IsEmpty]: Start isEmpty. Operand 231 states and 254 transitions.
[2018-04-10 14:00:00,421 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45
[2018-04-10 14:00:00,422 INFO L347 BasicCegarLoop]: Found error trace
[2018-04-10 14:00:00,422 INFO L355 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-04-10 14:00:00,422 INFO L408 AbstractCegarLoop]: === Iteration 29 === [mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr42EnsuresViolationMEMORY_LEAK, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr31RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr39RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr40AssertViolationMEMORY_FREE, mainErr41AssertViolationMEMORY_FREE, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr30RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr34RequiresViolation, mainErr4RequiresViolation, mainErr14RequiresViolation, mainErr37RequiresViolation]===
[2018-04-10 14:00:00,422 INFO L82 PathProgramCache]: Analyzing trace with hash 1003344041, now seen corresponding path program 1 times
[2018-04-10 14:00:00,422 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS
[2018-04-10 14:00:00,422 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy
[2018-04-10 14:00:00,423 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-04-10 14:00:00,423 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-04-10 14:00:00,423 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-04-10 14:00:00,432 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat
[2018-04-10 14:00:00,438 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat
[2018-04-10 14:00:00,450 INFO L421 BasicCegarLoop]: Counterexample might be feasible
[2018-04-10 14:00:00,464 WARN L343 cessorBacktranslator]: Generated EnsuresSpecification ensures #valid == old(#valid); is not ensure(true)
[2018-04-10 14:00:00,479 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 10.04 02:00:00 BoogieIcfgContainer
[2018-04-10 14:00:00,479 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction----------------------------
[2018-04-10 14:00:00,480 INFO L168 Benchmark]: Toolchain (without parser) took 21194.44 ms. Allocated memory was 398.5 MB in the beginning and 1.1 GB in the end (delta: 693.1 MB). Free memory was 335.7 MB in the beginning and 1.0 GB in the end (delta: -684.0 MB). Peak memory consumption was 9.1 MB. Max. memory is 5.3 GB.
[2018-04-10 14:00:00,481 INFO L168 Benchmark]: CDTParser took 0.15 ms. Allocated memory is still 398.5 MB. Free memory is still 361.6 MB. There was no memory consumed. Max. memory is 5.3 GB.
[2018-04-10 14:00:00,481 INFO L168 Benchmark]: CACSL2BoogieTranslator took 280.67 ms. Allocated memory is still 398.5 MB. Free memory was 334.3 MB in the beginning and 307.9 MB in the end (delta: 26.4 MB). Peak memory consumption was 26.4 MB. Max. memory is 5.3 GB.
[2018-04-10 14:00:00,481 INFO L168 Benchmark]: Boogie Preprocessor took 41.52 ms. Allocated memory is still 398.5 MB. Free memory was 307.9 MB in the beginning and 303.9 MB in the end (delta: 4.0 MB). Peak memory consumption was 4.0 MB. Max. memory is 5.3 GB.
[2018-04-10 14:00:00,482 INFO L168 Benchmark]: RCFGBuilder took 496.14 ms. Allocated memory was 398.5 MB in the beginning and 598.2 MB in the end (delta: 199.8 MB). Free memory was 303.9 MB in the beginning and 522.9 MB in the end (delta: -219.0 MB). Peak memory consumption was 23.4 MB. Max. memory is 5.3 GB.
[2018-04-10 14:00:00,482 INFO L168 Benchmark]: TraceAbstraction took 20373.09 ms. Allocated memory was 598.2 MB in the beginning and 1.1 GB in the end (delta: 493.4 MB). Free memory was 520.9 MB in the beginning and 1.0 GB in the end (delta: -498.7 MB). There was no memory consumed. Max. memory is 5.3 GB.
[2018-04-10 14:00:00,483 INFO L344 ainManager$Toolchain]: ####################### End [Toolchain 1] #######################
--- Results ---
* Results from de.uni_freiburg.informatik.ultimate.core:
- StatisticsResult: Toolchain Benchmarks
Benchmark results are:
* CDTParser took 0.15 ms. Allocated memory is still 398.5 MB. Free memory is still 361.6 MB. There was no memory consumed. Max. memory is 5.3 GB.
* CACSL2BoogieTranslator took 280.67 ms. Allocated memory is still 398.5 MB. Free memory was 334.3 MB in the beginning and 307.9 MB in the end (delta: 26.4 MB). Peak memory consumption was 26.4 MB. Max. memory is 5.3 GB.
* Boogie Preprocessor took 41.52 ms. Allocated memory is still 398.5 MB. Free memory was 307.9 MB in the beginning and 303.9 MB in the end (delta: 4.0 MB). Peak memory consumption was 4.0 MB. Max. memory is 5.3 GB.
* RCFGBuilder took 496.14 ms. Allocated memory was 398.5 MB in the beginning and 598.2 MB in the end (delta: 199.8 MB). Free memory was 303.9 MB in the beginning and 522.9 MB in the end (delta: -219.0 MB). Peak memory consumption was 23.4 MB. Max. memory is 5.3 GB.
* TraceAbstraction took 20373.09 ms. Allocated memory was 598.2 MB in the beginning and 1.1 GB in the end (delta: 493.4 MB). Free memory was 520.9 MB in the beginning and 1.0 GB in the end (delta: -498.7 MB). There was no memory consumed. Max. memory is 5.3 GB.
* Results from de.uni_freiburg.informatik.ultimate.boogie.preprocessor:
- GenericResult: Unfinished Backtranslation
Generated EnsuresSpecification ensures #valid == old(#valid); is not ensure(true)
* Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction:
- CounterExampleResult [Line: 985]: not all allocated memory was freed
not all allocated memory was freed
We found a FailurePath:
[L988] EXPR, FCALL malloc(sizeof(SLL))
VAL [malloc(sizeof(SLL))={11:0}]
[L988] SLL* head = malloc(sizeof(SLL));
VAL [head={11:0}, malloc(sizeof(SLL))={11:0}]
[L989] FCALL head->next = ((void*)0)
VAL [head={11:0}, malloc(sizeof(SLL))={11:0}]
[L990] FCALL head->data = 0
VAL [head={11:0}, malloc(sizeof(SLL))={11:0}]
[L992] SLL* x = head;
VAL [head={11:0}, malloc(sizeof(SLL))={11:0}, x={11:0}]
[L995] COND FALSE !(__VERIFIER_nondet_int())
[L1005] COND FALSE !(__VERIFIER_nondet_int())
[L1014] x = head
VAL [head={11:0}, malloc(sizeof(SLL))={11:0}, x={11:0}]
[L1015] FCALL x->next
VAL [head={11:0}, malloc(sizeof(SLL))={11:0}, x={11:0}, x->next={0:0}]
[L1015] COND FALSE !(x->next)
[L1022] EXPR, FCALL x->next
VAL [head={11:0}, malloc(sizeof(SLL))={11:0}, x={11:0}, x->next={0:0}]
[L1022] SLL* y = x->next;
[L1023] EXPR, FCALL malloc(sizeof(SLL))
VAL [head={11:0}, malloc(sizeof(SLL))={11:0}, malloc(sizeof(SLL))={10:0}, x={11:0}, y={0:0}]
[L1023] FCALL x->next = malloc(sizeof(SLL))
VAL [head={11:0}, malloc(sizeof(SLL))={11:0}, malloc(sizeof(SLL))={10:0}, x={11:0}, y={0:0}]
[L1024] FCALL x->data = 1
VAL [head={11:0}, malloc(sizeof(SLL))={11:0}, malloc(sizeof(SLL))={10:0}, x={11:0}, y={0:0}]
[L1025] FCALL x->next = y
VAL [head={11:0}, malloc(sizeof(SLL))={11:0}, malloc(sizeof(SLL))={10:0}, x={11:0}, y={0:0}]
[L1029] x = head
VAL [head={11:0}, malloc(sizeof(SLL))={11:0}, malloc(sizeof(SLL))={10:0}, x={11:0}, y={0:0}]
[L1032] EXPR, FCALL x->data
VAL [head={11:0}, malloc(sizeof(SLL))={11:0}, malloc(sizeof(SLL))={10:0}, x={11:0}, x->data=1, y={0:0}]
[L1032] COND FALSE !(x->data != 1)
[L1038] EXPR, FCALL x->next
VAL [head={11:0}, malloc(sizeof(SLL))={11:0}, malloc(sizeof(SLL))={10:0}, x={11:0}, x->next={0:0}, y={0:0}]
[L1038] x = x->next
[L1039] COND FALSE !(\read(*x))
VAL [head={11:0}, malloc(sizeof(SLL))={11:0}, malloc(sizeof(SLL))={10:0}, x={0:0}, y={0:0}]
[L1047] x = head
VAL [head={11:0}, malloc(sizeof(SLL))={11:0}, malloc(sizeof(SLL))={10:0}, x={11:0}, y={0:0}]
[L1048] COND TRUE x != ((void*)0)
[L1050] head = x
VAL [head={11:0}, malloc(sizeof(SLL))={11:0}, malloc(sizeof(SLL))={10:0}, x={11:0}, y={0:0}]
[L1051] EXPR, FCALL x->next
VAL [head={11:0}, malloc(sizeof(SLL))={11:0}, malloc(sizeof(SLL))={10:0}, x={11:0}, x->next={0:0}, y={0:0}]
[L1051] x = x->next
[L1052] free(head)
VAL [head={11:0}, malloc(sizeof(SLL))={11:0}, malloc(sizeof(SLL))={10:0}, x={0:0}, y={0:0}]
[L1052] free(head)
VAL [head={11:0}, malloc(sizeof(SLL))={11:0}, malloc(sizeof(SLL))={10:0}, x={0:0}, y={0:0}]
[L1052] FCALL free(head)
VAL [head={11:0}, malloc(sizeof(SLL))={11:0}, malloc(sizeof(SLL))={10:0}, x={0:0}, y={0:0}]
[L1048] COND FALSE !(x != ((void*)0))
VAL [head={11:0}, malloc(sizeof(SLL))={11:0}, malloc(sizeof(SLL))={10:0}, x={0:0}, y={0:0}]
[L1055] return 0;
VAL [\result=0, head={11:0}, malloc(sizeof(SLL))={11:0}, malloc(sizeof(SLL))={10:0}, x={0:0}, y={0:0}]
- StatisticsResult: Ultimate Automizer benchmark data
CFG has 3 procedures, 111 locations, 43 error locations. UNSAFE Result, 20.3s OverallTime, 29 OverallIterations, 3 TraceHistogramMax, 12.7s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 1999 SDtfs, 8274 SDslu, 9087 SDs, 0 SdLazy, 15551 SolverSat, 1564 SolverUnsat, 25 SolverUnknown, 0 SolverNotchecked, 6.3s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 927 GetRequests, 339 SyntacticMatches, 32 SemanticMatches, 556 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3876 ImplicationChecksByTransitivity, 8.2s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=232occurred in iteration=27, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.1s AutomataMinimizationTime, 28 MinimizatonAttempts, 1433 StatesRemovedByMinimization, 28 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.0s SsaConstructionTime, 0.3s SatisfiabilityAnalysisTime, 6.4s InterpolantComputationTime, 1244 NumberOfCodeBlocks, 1244 NumberOfCodeBlocksAsserted, 44 NumberOfCheckSat, 1161 ConstructedInterpolants, 102 QuantifiedInterpolants, 583343 SizeOfPredicates, 163 NumberOfNonLiveVariables, 1726 ConjunctsInSsa, 412 ConjunctsInUnsatCore, 39 InterpolantComputations, 17 PerfectInterpolantSequences, 33/161 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available
RESULT: Ultimate proved your program to be incorrect!
Written .csv to /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Camel.epf_AutomizerC.xml/Csv-Benchmark-0-2018-04-10_14-00-00-489.csv
Written .csv to /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/sll-simple-white-blue_true-unreach-call_false-valid-memtrack.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Camel.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-0-2018-04-10_14-00-00-489.csv
Received shutdown request...