java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/cade18-smtinterpol/svcomp-DerefFreeMemtrack-32bit-Automizer_SmtInterpol_NoArray.epf -i ../../../trunk/examples/svcomp/forester-heap/dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-666feb3-m [2018-04-10 16:17:35,254 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-04-10 16:17:35,256 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-04-10 16:17:35,269 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-04-10 16:17:35,269 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-04-10 16:17:35,270 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-04-10 16:17:35,271 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-04-10 16:17:35,272 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-04-10 16:17:35,274 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-04-10 16:17:35,274 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-04-10 16:17:35,275 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-04-10 16:17:35,275 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-04-10 16:17:35,276 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-04-10 16:17:35,277 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-04-10 16:17:35,277 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-04-10 16:17:35,279 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-04-10 16:17:35,280 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-04-10 16:17:35,282 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-04-10 16:17:35,283 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-04-10 16:17:35,284 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-04-10 16:17:35,285 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2018-04-10 16:17:35,290 INFO L98 SettingsManager]: Beginning loading settings from /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/cade18-smtinterpol/svcomp-DerefFreeMemtrack-32bit-Automizer_SmtInterpol_NoArray.epf [2018-04-10 16:17:35,306 INFO L110 SettingsManager]: Loading preferences was successful [2018-04-10 16:17:35,306 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-04-10 16:17:35,308 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-04-10 16:17:35,308 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-04-10 16:17:35,308 INFO L133 SettingsManager]: * Use SBE=true [2018-04-10 16:17:35,308 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-04-10 16:17:35,308 INFO L133 SettingsManager]: * sizeof long=4 [2018-04-10 16:17:35,308 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-04-10 16:17:35,308 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-04-10 16:17:35,309 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-04-10 16:17:35,309 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-04-10 16:17:35,309 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-04-10 16:17:35,309 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-04-10 16:17:35,309 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-04-10 16:17:35,309 INFO L133 SettingsManager]: * sizeof long double=12 [2018-04-10 16:17:35,309 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-04-10 16:17:35,310 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-04-10 16:17:35,310 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-04-10 16:17:35,310 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-04-10 16:17:35,310 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-04-10 16:17:35,310 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-04-10 16:17:35,310 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-04-10 16:17:35,310 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-04-10 16:17:35,310 INFO L133 SettingsManager]: * Trace refinement strategy=SMTINTERPOL [2018-04-10 16:17:35,337 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-04-10 16:17:35,346 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully (re)initialized [2018-04-10 16:17:35,350 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-04-10 16:17:35,351 INFO L271 PluginConnector]: Initializing CDTParser... [2018-04-10 16:17:35,351 INFO L276 PluginConnector]: CDTParser initialized [2018-04-10 16:17:35,352 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/forester-heap/dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-04-10 16:17:35,632 INFO L225 CDTParser]: Created temporary CDT project at /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/data/FLAG3ddcaa559 [2018-04-10 16:17:35,772 INFO L287 CDTParser]: IsIndexed: true [2018-04-10 16:17:35,772 INFO L288 CDTParser]: Found 1 translation units. [2018-04-10 16:17:35,772 INFO L168 CDTParser]: Scanning dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-04-10 16:17:35,779 INFO L210 ultiparseSymbolTable]: Include resolver: [2018-04-10 16:17:35,779 INFO L215 ultiparseSymbolTable]: [2018-04-10 16:17:35,779 INFO L218 ultiparseSymbolTable]: Function table: [2018-04-10 16:17:35,780 INFO L221 ultiparseSymbolTable]: Function definition of null ('main') in dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-04-10 16:17:35,780 INFO L227 ultiparseSymbolTable]: Global variable table: [2018-04-10 16:17:35,780 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_rb_sentinel_false_unreach_call_false_valid_memtrack_i__pthread_spinlock_t in dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-04-10 16:17:35,780 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_rb_sentinel_false_unreach_call_false_valid_memtrack_i____clock_t in dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-04-10 16:17:35,780 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_rb_sentinel_false_unreach_call_false_valid_memtrack_i__quad_t in dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-04-10 16:17:35,780 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_rb_sentinel_false_unreach_call_false_valid_memtrack_i____clockid_t in dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-04-10 16:17:35,780 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_rb_sentinel_false_unreach_call_false_valid_memtrack_i__clockid_t in dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-04-10 16:17:35,780 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_rb_sentinel_false_unreach_call_false_valid_memtrack_i____uint8_t in dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-04-10 16:17:35,781 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_rb_sentinel_false_unreach_call_false_valid_memtrack_i____blkcnt_t in dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-04-10 16:17:35,781 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_rb_sentinel_false_unreach_call_false_valid_memtrack_i____key_t in dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-04-10 16:17:35,781 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_rb_sentinel_false_unreach_call_false_valid_memtrack_i____loff_t in dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-04-10 16:17:35,781 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_rb_sentinel_false_unreach_call_false_valid_memtrack_i__fsid_t in dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-04-10 16:17:35,781 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_rb_sentinel_false_unreach_call_false_valid_memtrack_i__u_int16_t in dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-04-10 16:17:35,781 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_rb_sentinel_false_unreach_call_false_valid_memtrack_i__pthread_cond_t in dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-04-10 16:17:35,781 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_rb_sentinel_false_unreach_call_false_valid_memtrack_i____u_int in dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-04-10 16:17:35,781 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_rb_sentinel_false_unreach_call_false_valid_memtrack_i____useconds_t in dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-04-10 16:17:35,781 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_rb_sentinel_false_unreach_call_false_valid_memtrack_i____syscall_slong_t in dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-04-10 16:17:35,781 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_rb_sentinel_false_unreach_call_false_valid_memtrack_i__fd_mask in dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-04-10 16:17:35,782 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_rb_sentinel_false_unreach_call_false_valid_memtrack_i__wchar_t in dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-04-10 16:17:35,782 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_rb_sentinel_false_unreach_call_false_valid_memtrack_i__suseconds_t in dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-04-10 16:17:35,782 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_rb_sentinel_false_unreach_call_false_valid_memtrack_i____gid_t in dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-04-10 16:17:35,782 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_rb_sentinel_false_unreach_call_false_valid_memtrack_i____quad_t in dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-04-10 16:17:35,782 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_rb_sentinel_false_unreach_call_false_valid_memtrack_i____int64_t in dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-04-10 16:17:35,782 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_rb_sentinel_false_unreach_call_false_valid_memtrack_i__pthread_barrier_t in dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-04-10 16:17:35,782 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_rb_sentinel_false_unreach_call_false_valid_memtrack_i____u_quad_t in dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-04-10 16:17:35,782 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_rb_sentinel_false_unreach_call_false_valid_memtrack_i__daddr_t in dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-04-10 16:17:35,782 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_rb_sentinel_false_unreach_call_false_valid_memtrack_i__loff_t in dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-04-10 16:17:35,782 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_rb_sentinel_false_unreach_call_false_valid_memtrack_i__pthread_t in dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-04-10 16:17:35,782 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_rb_sentinel_false_unreach_call_false_valid_memtrack_i____fd_mask in dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-04-10 16:17:35,783 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_rb_sentinel_false_unreach_call_false_valid_memtrack_i__ushort in dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-04-10 16:17:35,783 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_rb_sentinel_false_unreach_call_false_valid_memtrack_i__u_int8_t in dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-04-10 16:17:35,783 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_rb_sentinel_false_unreach_call_false_valid_memtrack_i____pid_t in dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-04-10 16:17:35,783 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_rb_sentinel_false_unreach_call_false_valid_memtrack_i__pthread_condattr_t in dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-04-10 16:17:35,783 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_rb_sentinel_false_unreach_call_false_valid_memtrack_i____daddr_t in dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-04-10 16:17:35,783 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_rb_sentinel_false_unreach_call_false_valid_memtrack_i____uint16_t in dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-04-10 16:17:35,783 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_rb_sentinel_false_unreach_call_false_valid_memtrack_i__int64_t in dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-04-10 16:17:35,783 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_rb_sentinel_false_unreach_call_false_valid_memtrack_i__ulong in dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-04-10 16:17:35,783 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_rb_sentinel_false_unreach_call_false_valid_memtrack_i____int8_t in dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-04-10 16:17:35,783 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_rb_sentinel_false_unreach_call_false_valid_memtrack_i__blkcnt_t in dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-04-10 16:17:35,784 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_rb_sentinel_false_unreach_call_false_valid_memtrack_i____u_long in dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-04-10 16:17:35,784 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_rb_sentinel_false_unreach_call_false_valid_memtrack_i____fsblkcnt64_t in dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-04-10 16:17:35,784 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_rb_sentinel_false_unreach_call_false_valid_memtrack_i__u_short in dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-04-10 16:17:35,784 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_rb_sentinel_false_unreach_call_false_valid_memtrack_i__u_char in dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-04-10 16:17:35,784 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_rb_sentinel_false_unreach_call_false_valid_memtrack_i__gid_t in dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-04-10 16:17:35,784 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_rb_sentinel_false_unreach_call_false_valid_memtrack_i__off_t in dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-04-10 16:17:35,784 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_rb_sentinel_false_unreach_call_false_valid_memtrack_i____caddr_t in dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-04-10 16:17:35,784 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_rb_sentinel_false_unreach_call_false_valid_memtrack_i__pid_t in dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-04-10 16:17:35,784 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_rb_sentinel_false_unreach_call_false_valid_memtrack_i__pthread_attr_t in dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-04-10 16:17:35,784 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_rb_sentinel_false_unreach_call_false_valid_memtrack_i____socklen_t in dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-04-10 16:17:35,785 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_rb_sentinel_false_unreach_call_false_valid_memtrack_i__clock_t in dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-04-10 16:17:35,785 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_rb_sentinel_false_unreach_call_false_valid_memtrack_i____mode_t in dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-04-10 16:17:35,785 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_rb_sentinel_false_unreach_call_false_valid_memtrack_i__blksize_t in dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-04-10 16:17:35,785 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_rb_sentinel_false_unreach_call_false_valid_memtrack_i__int16_t in dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-04-10 16:17:35,785 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_rb_sentinel_false_unreach_call_false_valid_memtrack_i__u_long in dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-04-10 16:17:35,785 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_rb_sentinel_false_unreach_call_false_valid_memtrack_i____intptr_t in dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-04-10 16:17:35,785 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_rb_sentinel_false_unreach_call_false_valid_memtrack_i____fsid_t in dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-04-10 16:17:35,785 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_rb_sentinel_false_unreach_call_false_valid_memtrack_i__size_t in dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-04-10 16:17:35,785 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_rb_sentinel_false_unreach_call_false_valid_memtrack_i__pthread_once_t in dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-04-10 16:17:35,786 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_rb_sentinel_false_unreach_call_false_valid_memtrack_i____uint32_t in dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-04-10 16:17:35,786 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_rb_sentinel_false_unreach_call_false_valid_memtrack_i____int16_t in dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-04-10 16:17:35,786 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_rb_sentinel_false_unreach_call_false_valid_memtrack_i____sigset_t in dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-04-10 16:17:35,786 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_rb_sentinel_false_unreach_call_false_valid_memtrack_i____ino_t in dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-04-10 16:17:35,786 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_rb_sentinel_false_unreach_call_false_valid_memtrack_i__mode_t in dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-04-10 16:17:35,786 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_rb_sentinel_false_unreach_call_false_valid_memtrack_i____int32_t in dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-04-10 16:17:35,786 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_rb_sentinel_false_unreach_call_false_valid_memtrack_i__caddr_t in dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-04-10 16:17:35,786 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_rb_sentinel_false_unreach_call_false_valid_memtrack_i__div_t in dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-04-10 16:17:35,786 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_rb_sentinel_false_unreach_call_false_valid_memtrack_i____suseconds_t in dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-04-10 16:17:35,786 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_rb_sentinel_false_unreach_call_false_valid_memtrack_i__time_t in dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-04-10 16:17:35,787 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_rb_sentinel_false_unreach_call_false_valid_memtrack_i____pthread_slist_t in dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-04-10 16:17:35,787 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_rb_sentinel_false_unreach_call_false_valid_memtrack_i__key_t in dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-04-10 16:17:35,787 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_rb_sentinel_false_unreach_call_false_valid_memtrack_i__pthread_mutex_t in dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-04-10 16:17:35,787 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_rb_sentinel_false_unreach_call_false_valid_memtrack_i__fd_set in dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-04-10 16:17:35,787 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_rb_sentinel_false_unreach_call_false_valid_memtrack_i__lldiv_t in dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-04-10 16:17:35,787 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_rb_sentinel_false_unreach_call_false_valid_memtrack_i__uid_t in dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-04-10 16:17:35,787 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_rb_sentinel_false_unreach_call_false_valid_memtrack_i____rlim_t in dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-04-10 16:17:35,787 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_rb_sentinel_false_unreach_call_false_valid_memtrack_i__idtype_t in dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-04-10 16:17:35,787 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_rb_sentinel_false_unreach_call_false_valid_memtrack_i____u_short in dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-04-10 16:17:35,787 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_rb_sentinel_false_unreach_call_false_valid_memtrack_i____dev_t in dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-04-10 16:17:35,788 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_rb_sentinel_false_unreach_call_false_valid_memtrack_i____syscall_ulong_t in dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-04-10 16:17:35,788 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_rb_sentinel_false_unreach_call_false_valid_memtrack_i____blksize_t in dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-04-10 16:17:35,788 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_rb_sentinel_false_unreach_call_false_valid_memtrack_i__int8_t in dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-04-10 16:17:35,788 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_rb_sentinel_false_unreach_call_false_valid_memtrack_i____id_t in dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-04-10 16:17:35,788 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_rb_sentinel_false_unreach_call_false_valid_memtrack_i____ssize_t in dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-04-10 16:17:35,788 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_rb_sentinel_false_unreach_call_false_valid_memtrack_i____off64_t in dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-04-10 16:17:35,788 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_rb_sentinel_false_unreach_call_false_valid_memtrack_i____time_t in dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-04-10 16:17:35,788 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_rb_sentinel_false_unreach_call_false_valid_memtrack_i__u_int64_t in dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-04-10 16:17:35,788 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_rb_sentinel_false_unreach_call_false_valid_memtrack_i____u_char in dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-04-10 16:17:35,788 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_rb_sentinel_false_unreach_call_false_valid_memtrack_i__u_quad_t in dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-04-10 16:17:35,788 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_rb_sentinel_false_unreach_call_false_valid_memtrack_i____rlim64_t in dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-04-10 16:17:35,789 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_rb_sentinel_false_unreach_call_false_valid_memtrack_i____fsfilcnt_t in dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-04-10 16:17:35,789 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_rb_sentinel_false_unreach_call_false_valid_memtrack_i__pthread_mutexattr_t in dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-04-10 16:17:35,789 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_rb_sentinel_false_unreach_call_false_valid_memtrack_i__fsblkcnt_t in dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-04-10 16:17:35,789 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_rb_sentinel_false_unreach_call_false_valid_memtrack_i____timer_t in dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-04-10 16:17:35,789 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_rb_sentinel_false_unreach_call_false_valid_memtrack_i____qaddr_t in dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-04-10 16:17:35,789 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_rb_sentinel_false_unreach_call_false_valid_memtrack_i__u_int in dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-04-10 16:17:35,789 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_rb_sentinel_false_unreach_call_false_valid_memtrack_i__register_t in dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-04-10 16:17:35,789 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_rb_sentinel_false_unreach_call_false_valid_memtrack_i__pthread_barrierattr_t in dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-04-10 16:17:35,789 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_rb_sentinel_false_unreach_call_false_valid_memtrack_i__timer_t in dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-04-10 16:17:35,789 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_rb_sentinel_false_unreach_call_false_valid_memtrack_i__u_int32_t in dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-04-10 16:17:35,789 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_rb_sentinel_false_unreach_call_false_valid_memtrack_i__Colour in dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-04-10 16:17:35,789 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_rb_sentinel_false_unreach_call_false_valid_memtrack_i__ssize_t in dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-04-10 16:17:35,789 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_rb_sentinel_false_unreach_call_false_valid_memtrack_i____blkcnt64_t in dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-04-10 16:17:35,790 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_rb_sentinel_false_unreach_call_false_valid_memtrack_i__pthread_rwlockattr_t in dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-04-10 16:17:35,790 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_rb_sentinel_false_unreach_call_false_valid_memtrack_i__ldiv_t in dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-04-10 16:17:35,790 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_rb_sentinel_false_unreach_call_false_valid_memtrack_i____uint64_t in dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-04-10 16:17:35,790 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_rb_sentinel_false_unreach_call_false_valid_memtrack_i____fsword_t in dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-04-10 16:17:35,790 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_rb_sentinel_false_unreach_call_false_valid_memtrack_i__ino_t in dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-04-10 16:17:35,790 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_rb_sentinel_false_unreach_call_false_valid_memtrack_i__int32_t in dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-04-10 16:17:35,790 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_rb_sentinel_false_unreach_call_false_valid_memtrack_i____sig_atomic_t in dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-04-10 16:17:35,790 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_rb_sentinel_false_unreach_call_false_valid_memtrack_i____nlink_t in dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-04-10 16:17:35,790 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_rb_sentinel_false_unreach_call_false_valid_memtrack_i____fsfilcnt64_t in dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-04-10 16:17:35,790 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_rb_sentinel_false_unreach_call_false_valid_memtrack_i____fsblkcnt_t in dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-04-10 16:17:35,790 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_rb_sentinel_false_unreach_call_false_valid_memtrack_i____off_t in dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-04-10 16:17:35,790 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_rb_sentinel_false_unreach_call_false_valid_memtrack_i__pthread_key_t in dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-04-10 16:17:35,790 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_rb_sentinel_false_unreach_call_false_valid_memtrack_i__fsfilcnt_t in dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-04-10 16:17:35,790 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_rb_sentinel_false_unreach_call_false_valid_memtrack_i____ino64_t in dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-04-10 16:17:35,790 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_rb_sentinel_false_unreach_call_false_valid_memtrack_i__pthread_rwlock_t in dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-04-10 16:17:35,790 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_rb_sentinel_false_unreach_call_false_valid_memtrack_i__nlink_t in dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-04-10 16:17:35,790 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_rb_sentinel_false_unreach_call_false_valid_memtrack_i____uid_t in dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-04-10 16:17:35,790 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_rb_sentinel_false_unreach_call_false_valid_memtrack_i__uint in dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-04-10 16:17:35,790 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_rb_sentinel_false_unreach_call_false_valid_memtrack_i__dev_t in dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-04-10 16:17:35,790 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_rb_sentinel_false_unreach_call_false_valid_memtrack_i__sigset_t in dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-04-10 16:17:35,790 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_rb_sentinel_false_unreach_call_false_valid_memtrack_i__id_t in dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-04-10 16:17:35,825 INFO L330 CDTParser]: Deleted temporary CDT project at /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/data/FLAG3ddcaa559 [2018-04-10 16:17:35,829 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-04-10 16:17:35,830 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-04-10 16:17:35,831 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-04-10 16:17:35,831 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-04-10 16:17:35,836 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-04-10 16:17:35,837 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 10.04 04:17:35" (1/1) ... [2018-04-10 16:17:35,838 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@6d9424d3 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.04 04:17:35, skipping insertion in model container [2018-04-10 16:17:35,839 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 10.04 04:17:35" (1/1) ... [2018-04-10 16:17:35,849 INFO L167 Dispatcher]: Using SV-COMP mode [2018-04-10 16:17:35,877 INFO L167 Dispatcher]: Using SV-COMP mode [2018-04-10 16:17:36,017 INFO L175 PostProcessor]: Settings: Checked method=main [2018-04-10 16:17:36,055 INFO L175 PostProcessor]: Settings: Checked method=main [2018-04-10 16:17:36,062 INFO L100 SccComputation]: Graph consists of 0 InCaSumBalls and 115 non ball SCCs. Number of states in SCCs 115. [2018-04-10 16:17:36,101 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.04 04:17:36 WrapperNode [2018-04-10 16:17:36,101 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-04-10 16:17:36,101 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-04-10 16:17:36,101 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-04-10 16:17:36,101 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-04-10 16:17:36,112 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.04 04:17:36" (1/1) ... [2018-04-10 16:17:36,113 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.04 04:17:36" (1/1) ... [2018-04-10 16:17:36,125 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.04 04:17:36" (1/1) ... [2018-04-10 16:17:36,125 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.04 04:17:36" (1/1) ... [2018-04-10 16:17:36,135 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.04 04:17:36" (1/1) ... [2018-04-10 16:17:36,142 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.04 04:17:36" (1/1) ... [2018-04-10 16:17:36,145 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.04 04:17:36" (1/1) ... [2018-04-10 16:17:36,149 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-04-10 16:17:36,149 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-04-10 16:17:36,149 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-04-10 16:17:36,149 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-04-10 16:17:36,150 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.04 04:17:36" (1/1) ... No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-04-10 16:17:36,232 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-04-10 16:17:36,233 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-04-10 16:17:36,233 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-04-10 16:17:36,233 INFO L128 BoogieDeclarations]: Found specification of procedure __ctype_get_mb_cur_max [2018-04-10 16:17:36,233 INFO L128 BoogieDeclarations]: Found specification of procedure atof [2018-04-10 16:17:36,233 INFO L128 BoogieDeclarations]: Found specification of procedure atoi [2018-04-10 16:17:36,233 INFO L128 BoogieDeclarations]: Found specification of procedure atol [2018-04-10 16:17:36,233 INFO L128 BoogieDeclarations]: Found specification of procedure atoll [2018-04-10 16:17:36,233 INFO L128 BoogieDeclarations]: Found specification of procedure strtod [2018-04-10 16:17:36,233 INFO L128 BoogieDeclarations]: Found specification of procedure strtof [2018-04-10 16:17:36,233 INFO L128 BoogieDeclarations]: Found specification of procedure strtold [2018-04-10 16:17:36,233 INFO L128 BoogieDeclarations]: Found specification of procedure strtol [2018-04-10 16:17:36,233 INFO L128 BoogieDeclarations]: Found specification of procedure strtoul [2018-04-10 16:17:36,234 INFO L128 BoogieDeclarations]: Found specification of procedure strtoq [2018-04-10 16:17:36,234 INFO L128 BoogieDeclarations]: Found specification of procedure strtouq [2018-04-10 16:17:36,234 INFO L128 BoogieDeclarations]: Found specification of procedure strtoll [2018-04-10 16:17:36,234 INFO L128 BoogieDeclarations]: Found specification of procedure strtoull [2018-04-10 16:17:36,234 INFO L128 BoogieDeclarations]: Found specification of procedure l64a [2018-04-10 16:17:36,234 INFO L128 BoogieDeclarations]: Found specification of procedure a64l [2018-04-10 16:17:36,234 INFO L128 BoogieDeclarations]: Found specification of procedure select [2018-04-10 16:17:36,234 INFO L128 BoogieDeclarations]: Found specification of procedure pselect [2018-04-10 16:17:36,234 INFO L128 BoogieDeclarations]: Found specification of procedure gnu_dev_major [2018-04-10 16:17:36,235 INFO L128 BoogieDeclarations]: Found specification of procedure gnu_dev_minor [2018-04-10 16:17:36,235 INFO L128 BoogieDeclarations]: Found specification of procedure gnu_dev_makedev [2018-04-10 16:17:36,235 INFO L128 BoogieDeclarations]: Found specification of procedure random [2018-04-10 16:17:36,235 INFO L128 BoogieDeclarations]: Found specification of procedure srandom [2018-04-10 16:17:36,235 INFO L128 BoogieDeclarations]: Found specification of procedure initstate [2018-04-10 16:17:36,235 INFO L128 BoogieDeclarations]: Found specification of procedure setstate [2018-04-10 16:17:36,235 INFO L128 BoogieDeclarations]: Found specification of procedure random_r [2018-04-10 16:17:36,235 INFO L128 BoogieDeclarations]: Found specification of procedure srandom_r [2018-04-10 16:17:36,235 INFO L128 BoogieDeclarations]: Found specification of procedure initstate_r [2018-04-10 16:17:36,235 INFO L128 BoogieDeclarations]: Found specification of procedure setstate_r [2018-04-10 16:17:36,235 INFO L128 BoogieDeclarations]: Found specification of procedure rand [2018-04-10 16:17:36,236 INFO L128 BoogieDeclarations]: Found specification of procedure srand [2018-04-10 16:17:36,236 INFO L128 BoogieDeclarations]: Found specification of procedure rand_r [2018-04-10 16:17:36,236 INFO L128 BoogieDeclarations]: Found specification of procedure drand48 [2018-04-10 16:17:36,236 INFO L128 BoogieDeclarations]: Found specification of procedure erand48 [2018-04-10 16:17:36,236 INFO L128 BoogieDeclarations]: Found specification of procedure lrand48 [2018-04-10 16:17:36,236 INFO L128 BoogieDeclarations]: Found specification of procedure nrand48 [2018-04-10 16:17:36,236 INFO L128 BoogieDeclarations]: Found specification of procedure mrand48 [2018-04-10 16:17:36,236 INFO L128 BoogieDeclarations]: Found specification of procedure jrand48 [2018-04-10 16:17:36,236 INFO L128 BoogieDeclarations]: Found specification of procedure srand48 [2018-04-10 16:17:36,236 INFO L128 BoogieDeclarations]: Found specification of procedure seed48 [2018-04-10 16:17:36,237 INFO L128 BoogieDeclarations]: Found specification of procedure lcong48 [2018-04-10 16:17:36,237 INFO L128 BoogieDeclarations]: Found specification of procedure drand48_r [2018-04-10 16:17:36,237 INFO L128 BoogieDeclarations]: Found specification of procedure erand48_r [2018-04-10 16:17:36,237 INFO L128 BoogieDeclarations]: Found specification of procedure lrand48_r [2018-04-10 16:17:36,237 INFO L128 BoogieDeclarations]: Found specification of procedure nrand48_r [2018-04-10 16:17:36,237 INFO L128 BoogieDeclarations]: Found specification of procedure mrand48_r [2018-04-10 16:17:36,237 INFO L128 BoogieDeclarations]: Found specification of procedure jrand48_r [2018-04-10 16:17:36,237 INFO L128 BoogieDeclarations]: Found specification of procedure srand48_r [2018-04-10 16:17:36,237 INFO L128 BoogieDeclarations]: Found specification of procedure seed48_r [2018-04-10 16:17:36,238 INFO L128 BoogieDeclarations]: Found specification of procedure lcong48_r [2018-04-10 16:17:36,238 INFO L128 BoogieDeclarations]: Found specification of procedure malloc [2018-04-10 16:17:36,238 INFO L128 BoogieDeclarations]: Found specification of procedure calloc [2018-04-10 16:17:36,238 INFO L128 BoogieDeclarations]: Found specification of procedure realloc [2018-04-10 16:17:36,238 INFO L128 BoogieDeclarations]: Found specification of procedure free [2018-04-10 16:17:36,238 INFO L128 BoogieDeclarations]: Found specification of procedure cfree [2018-04-10 16:17:36,238 INFO L128 BoogieDeclarations]: Found specification of procedure alloca [2018-04-10 16:17:36,238 INFO L128 BoogieDeclarations]: Found specification of procedure valloc [2018-04-10 16:17:36,238 INFO L128 BoogieDeclarations]: Found specification of procedure posix_memalign [2018-04-10 16:17:36,238 INFO L128 BoogieDeclarations]: Found specification of procedure aligned_alloc [2018-04-10 16:17:36,238 INFO L128 BoogieDeclarations]: Found specification of procedure abort [2018-04-10 16:17:36,238 INFO L128 BoogieDeclarations]: Found specification of procedure atexit [2018-04-10 16:17:36,238 INFO L128 BoogieDeclarations]: Found specification of procedure at_quick_exit [2018-04-10 16:17:36,238 INFO L128 BoogieDeclarations]: Found specification of procedure on_exit [2018-04-10 16:17:36,238 INFO L128 BoogieDeclarations]: Found specification of procedure exit [2018-04-10 16:17:36,238 INFO L128 BoogieDeclarations]: Found specification of procedure quick_exit [2018-04-10 16:17:36,238 INFO L128 BoogieDeclarations]: Found specification of procedure _Exit [2018-04-10 16:17:36,239 INFO L128 BoogieDeclarations]: Found specification of procedure getenv [2018-04-10 16:17:36,239 INFO L128 BoogieDeclarations]: Found specification of procedure putenv [2018-04-10 16:17:36,239 INFO L128 BoogieDeclarations]: Found specification of procedure setenv [2018-04-10 16:17:36,239 INFO L128 BoogieDeclarations]: Found specification of procedure unsetenv [2018-04-10 16:17:36,239 INFO L128 BoogieDeclarations]: Found specification of procedure clearenv [2018-04-10 16:17:36,239 INFO L128 BoogieDeclarations]: Found specification of procedure mktemp [2018-04-10 16:17:36,239 INFO L128 BoogieDeclarations]: Found specification of procedure mkstemp [2018-04-10 16:17:36,239 INFO L128 BoogieDeclarations]: Found specification of procedure mkstemps [2018-04-10 16:17:36,239 INFO L128 BoogieDeclarations]: Found specification of procedure mkdtemp [2018-04-10 16:17:36,239 INFO L128 BoogieDeclarations]: Found specification of procedure system [2018-04-10 16:17:36,239 INFO L128 BoogieDeclarations]: Found specification of procedure realpath [2018-04-10 16:17:36,239 INFO L128 BoogieDeclarations]: Found specification of procedure bsearch [2018-04-10 16:17:36,239 INFO L128 BoogieDeclarations]: Found specification of procedure qsort [2018-04-10 16:17:36,240 INFO L128 BoogieDeclarations]: Found specification of procedure abs [2018-04-10 16:17:36,240 INFO L128 BoogieDeclarations]: Found specification of procedure labs [2018-04-10 16:17:36,240 INFO L128 BoogieDeclarations]: Found specification of procedure llabs [2018-04-10 16:17:36,240 INFO L128 BoogieDeclarations]: Found specification of procedure div [2018-04-10 16:17:36,240 INFO L128 BoogieDeclarations]: Found specification of procedure ldiv [2018-04-10 16:17:36,240 INFO L128 BoogieDeclarations]: Found specification of procedure lldiv [2018-04-10 16:17:36,240 INFO L128 BoogieDeclarations]: Found specification of procedure ecvt [2018-04-10 16:17:36,240 INFO L128 BoogieDeclarations]: Found specification of procedure fcvt [2018-04-10 16:17:36,240 INFO L128 BoogieDeclarations]: Found specification of procedure gcvt [2018-04-10 16:17:36,240 INFO L128 BoogieDeclarations]: Found specification of procedure qecvt [2018-04-10 16:17:36,240 INFO L128 BoogieDeclarations]: Found specification of procedure qfcvt [2018-04-10 16:17:36,240 INFO L128 BoogieDeclarations]: Found specification of procedure qgcvt [2018-04-10 16:17:36,240 INFO L128 BoogieDeclarations]: Found specification of procedure ecvt_r [2018-04-10 16:17:36,240 INFO L128 BoogieDeclarations]: Found specification of procedure fcvt_r [2018-04-10 16:17:36,240 INFO L128 BoogieDeclarations]: Found specification of procedure qecvt_r [2018-04-10 16:17:36,240 INFO L128 BoogieDeclarations]: Found specification of procedure qfcvt_r [2018-04-10 16:17:36,240 INFO L128 BoogieDeclarations]: Found specification of procedure mblen [2018-04-10 16:17:36,241 INFO L128 BoogieDeclarations]: Found specification of procedure mbtowc [2018-04-10 16:17:36,241 INFO L128 BoogieDeclarations]: Found specification of procedure wctomb [2018-04-10 16:17:36,241 INFO L128 BoogieDeclarations]: Found specification of procedure mbstowcs [2018-04-10 16:17:36,241 INFO L128 BoogieDeclarations]: Found specification of procedure wcstombs [2018-04-10 16:17:36,241 INFO L128 BoogieDeclarations]: Found specification of procedure rpmatch [2018-04-10 16:17:36,241 INFO L128 BoogieDeclarations]: Found specification of procedure getsubopt [2018-04-10 16:17:36,241 INFO L128 BoogieDeclarations]: Found specification of procedure getloadavg [2018-04-10 16:17:36,241 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2018-04-10 16:17:36,241 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_error [2018-04-10 16:17:36,241 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-04-10 16:17:36,241 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-04-10 16:17:36,242 INFO L128 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2018-04-10 16:17:36,242 INFO L128 BoogieDeclarations]: Found specification of procedure write~int [2018-04-10 16:17:36,242 INFO L128 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2018-04-10 16:17:36,242 INFO L128 BoogieDeclarations]: Found specification of procedure read~int [2018-04-10 16:17:36,242 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-04-10 16:17:36,242 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-04-10 16:17:36,242 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-04-10 16:17:36,242 INFO L128 BoogieDeclarations]: Found specification of procedure write~unchecked~int [2018-04-10 16:17:36,679 INFO L259 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-04-10 16:17:36,685 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 10.04 04:17:36 BoogieIcfgContainer [2018-04-10 16:17:36,685 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-04-10 16:17:36,686 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-04-10 16:17:36,686 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-04-10 16:17:36,688 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-04-10 16:17:36,688 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 10.04 04:17:35" (1/3) ... [2018-04-10 16:17:36,688 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2f635938 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 10.04 04:17:36, skipping insertion in model container [2018-04-10 16:17:36,688 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.04 04:17:36" (2/3) ... [2018-04-10 16:17:36,688 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2f635938 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 10.04 04:17:36, skipping insertion in model container [2018-04-10 16:17:36,689 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 10.04 04:17:36" (3/3) ... [2018-04-10 16:17:36,690 INFO L107 eAbstractionObserver]: Analyzing ICFG dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i [2018-04-10 16:17:36,697 INFO L131 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-04-10 16:17:36,702 INFO L143 ceAbstractionStarter]: Appying trace abstraction to program that has 67 error locations. [2018-04-10 16:17:36,726 INFO L128 ementStrategyFactory]: Using default assertion order modulation [2018-04-10 16:17:36,726 INFO L369 AbstractCegarLoop]: Interprodecural is true [2018-04-10 16:17:36,726 INFO L370 AbstractCegarLoop]: Hoare is false [2018-04-10 16:17:36,726 INFO L371 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-04-10 16:17:36,727 INFO L372 AbstractCegarLoop]: Backedges is TWOTRACK [2018-04-10 16:17:36,727 INFO L373 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-04-10 16:17:36,727 INFO L374 AbstractCegarLoop]: Difference is false [2018-04-10 16:17:36,727 INFO L375 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-04-10 16:17:36,727 INFO L380 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-04-10 16:17:36,727 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-04-10 16:17:36,738 INFO L276 IsEmpty]: Start isEmpty. Operand 166 states. [2018-04-10 16:17:36,744 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 9 [2018-04-10 16:17:36,745 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 16:17:36,745 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 16:17:36,745 INFO L408 AbstractCegarLoop]: === Iteration 1 === [mainErr51RequiresViolation, mainErr26RequiresViolation, mainErr54RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr66EnsuresViolationMEMORY_LEAK, mainErr31RequiresViolation, mainErr46RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr58RequiresViolation, mainErr62RequiresViolation, mainErr15RequiresViolation, mainErr49RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr55RequiresViolation, mainErr17RequiresViolation, mainErr42RequiresViolation, mainErr30RequiresViolation, mainErr56AssertViolationMEMORY_FREE, mainErr11RequiresViolation, mainErr63RequiresViolation, mainErr61AssertViolationMEMORY_FREE, mainErr24RequiresViolation, mainErr44RequiresViolation, mainErr10RequiresViolation, mainErr43RequiresViolation, mainErr4RequiresViolation, mainErr50RequiresViolation, mainErr37RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr59RequiresViolation, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr21RequiresViolation, mainErr41RequiresViolation, mainErr48RequiresViolation, mainErr39RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr52RequiresViolation, mainErr45RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr64AssertViolationMEMORY_FREE, mainErr32RequiresViolation, mainErr57AssertViolationMEMORY_FREE, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr60AssertViolationMEMORY_FREE, mainErr9RequiresViolation, mainErr65AssertViolationMEMORY_FREE, mainErr53RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr8RequiresViolation, mainErr34RequiresViolation, mainErr47RequiresViolation, mainErr14RequiresViolation, mainErr40RequiresViolation]=== [2018-04-10 16:17:36,748 INFO L82 PathProgramCache]: Analyzing trace with hash 174214734, now seen corresponding path program 1 times [2018-04-10 16:17:36,749 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-10 16:17:36,749 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-10 16:17:36,781 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 16:17:36,782 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 16:17:36,782 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 16:17:36,803 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 16:17:36,808 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 16:17:36,851 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 16:17:36,853 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-10 16:17:36,854 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-04-10 16:17:36,855 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-04-10 16:17:36,867 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-04-10 16:17:36,867 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-04-10 16:17:36,869 INFO L87 Difference]: Start difference. First operand 166 states. Second operand 4 states. [2018-04-10 16:17:37,045 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 16:17:37,045 INFO L93 Difference]: Finished difference Result 191 states and 198 transitions. [2018-04-10 16:17:37,046 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-04-10 16:17:37,046 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 8 [2018-04-10 16:17:37,047 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 16:17:37,054 INFO L225 Difference]: With dead ends: 191 [2018-04-10 16:17:37,055 INFO L226 Difference]: Without dead ends: 187 [2018-04-10 16:17:37,056 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-04-10 16:17:37,071 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 187 states. [2018-04-10 16:17:37,094 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 187 to 160. [2018-04-10 16:17:37,095 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 160 states. [2018-04-10 16:17:37,097 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 160 states to 160 states and 165 transitions. [2018-04-10 16:17:37,099 INFO L78 Accepts]: Start accepts. Automaton has 160 states and 165 transitions. Word has length 8 [2018-04-10 16:17:37,099 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 16:17:37,099 INFO L459 AbstractCegarLoop]: Abstraction has 160 states and 165 transitions. [2018-04-10 16:17:37,099 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-04-10 16:17:37,099 INFO L276 IsEmpty]: Start isEmpty. Operand 160 states and 165 transitions. [2018-04-10 16:17:37,099 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 9 [2018-04-10 16:17:37,099 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 16:17:37,099 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 16:17:37,100 INFO L408 AbstractCegarLoop]: === Iteration 2 === [mainErr51RequiresViolation, mainErr26RequiresViolation, mainErr54RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr66EnsuresViolationMEMORY_LEAK, mainErr31RequiresViolation, mainErr46RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr58RequiresViolation, mainErr62RequiresViolation, mainErr15RequiresViolation, mainErr49RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr55RequiresViolation, mainErr17RequiresViolation, mainErr42RequiresViolation, mainErr30RequiresViolation, mainErr56AssertViolationMEMORY_FREE, mainErr11RequiresViolation, mainErr63RequiresViolation, mainErr61AssertViolationMEMORY_FREE, mainErr24RequiresViolation, mainErr44RequiresViolation, mainErr10RequiresViolation, mainErr43RequiresViolation, mainErr4RequiresViolation, mainErr50RequiresViolation, mainErr37RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr59RequiresViolation, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr21RequiresViolation, mainErr41RequiresViolation, mainErr48RequiresViolation, mainErr39RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr52RequiresViolation, mainErr45RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr64AssertViolationMEMORY_FREE, mainErr32RequiresViolation, mainErr57AssertViolationMEMORY_FREE, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr60AssertViolationMEMORY_FREE, mainErr9RequiresViolation, mainErr65AssertViolationMEMORY_FREE, mainErr53RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr8RequiresViolation, mainErr34RequiresViolation, mainErr47RequiresViolation, mainErr14RequiresViolation, mainErr40RequiresViolation]=== [2018-04-10 16:17:37,100 INFO L82 PathProgramCache]: Analyzing trace with hash 174214735, now seen corresponding path program 1 times [2018-04-10 16:17:37,100 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-10 16:17:37,100 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-10 16:17:37,102 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 16:17:37,102 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 16:17:37,102 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 16:17:37,113 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 16:17:37,114 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 16:17:37,151 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 16:17:37,151 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-10 16:17:37,151 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-04-10 16:17:37,153 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-04-10 16:17:37,153 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-04-10 16:17:37,153 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-04-10 16:17:37,153 INFO L87 Difference]: Start difference. First operand 160 states and 165 transitions. Second operand 4 states. [2018-04-10 16:17:37,235 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 16:17:37,235 INFO L93 Difference]: Finished difference Result 157 states and 162 transitions. [2018-04-10 16:17:37,235 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-04-10 16:17:37,236 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 8 [2018-04-10 16:17:37,236 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 16:17:37,237 INFO L225 Difference]: With dead ends: 157 [2018-04-10 16:17:37,237 INFO L226 Difference]: Without dead ends: 157 [2018-04-10 16:17:37,238 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-04-10 16:17:37,238 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 157 states. [2018-04-10 16:17:37,244 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 157 to 157. [2018-04-10 16:17:37,244 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 157 states. [2018-04-10 16:17:37,246 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 157 states to 157 states and 162 transitions. [2018-04-10 16:17:37,247 INFO L78 Accepts]: Start accepts. Automaton has 157 states and 162 transitions. Word has length 8 [2018-04-10 16:17:37,247 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 16:17:37,247 INFO L459 AbstractCegarLoop]: Abstraction has 157 states and 162 transitions. [2018-04-10 16:17:37,247 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-04-10 16:17:37,247 INFO L276 IsEmpty]: Start isEmpty. Operand 157 states and 162 transitions. [2018-04-10 16:17:37,247 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2018-04-10 16:17:37,248 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 16:17:37,248 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 16:17:37,248 INFO L408 AbstractCegarLoop]: === Iteration 3 === [mainErr51RequiresViolation, mainErr26RequiresViolation, mainErr54RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr66EnsuresViolationMEMORY_LEAK, mainErr31RequiresViolation, mainErr46RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr58RequiresViolation, mainErr62RequiresViolation, mainErr15RequiresViolation, mainErr49RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr55RequiresViolation, mainErr17RequiresViolation, mainErr42RequiresViolation, mainErr30RequiresViolation, mainErr56AssertViolationMEMORY_FREE, mainErr11RequiresViolation, mainErr63RequiresViolation, mainErr61AssertViolationMEMORY_FREE, mainErr24RequiresViolation, mainErr44RequiresViolation, mainErr10RequiresViolation, mainErr43RequiresViolation, mainErr4RequiresViolation, mainErr50RequiresViolation, mainErr37RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr59RequiresViolation, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr21RequiresViolation, mainErr41RequiresViolation, mainErr48RequiresViolation, mainErr39RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr52RequiresViolation, mainErr45RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr64AssertViolationMEMORY_FREE, mainErr32RequiresViolation, mainErr57AssertViolationMEMORY_FREE, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr60AssertViolationMEMORY_FREE, mainErr9RequiresViolation, mainErr65AssertViolationMEMORY_FREE, mainErr53RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr8RequiresViolation, mainErr34RequiresViolation, mainErr47RequiresViolation, mainErr14RequiresViolation, mainErr40RequiresViolation]=== [2018-04-10 16:17:37,248 INFO L82 PathProgramCache]: Analyzing trace with hash -1062536033, now seen corresponding path program 1 times [2018-04-10 16:17:37,248 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-10 16:17:37,248 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-10 16:17:37,250 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 16:17:37,250 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 16:17:37,250 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 16:17:37,261 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 16:17:37,262 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 16:17:37,285 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 16:17:37,286 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-10 16:17:37,286 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-04-10 16:17:37,286 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-04-10 16:17:37,286 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-04-10 16:17:37,286 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-04-10 16:17:37,287 INFO L87 Difference]: Start difference. First operand 157 states and 162 transitions. Second operand 4 states. [2018-04-10 16:17:37,432 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 16:17:37,433 INFO L93 Difference]: Finished difference Result 172 states and 178 transitions. [2018-04-10 16:17:37,433 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-04-10 16:17:37,433 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2018-04-10 16:17:37,433 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 16:17:37,434 INFO L225 Difference]: With dead ends: 172 [2018-04-10 16:17:37,434 INFO L226 Difference]: Without dead ends: 172 [2018-04-10 16:17:37,434 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-04-10 16:17:37,435 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 172 states. [2018-04-10 16:17:37,440 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 172 to 153. [2018-04-10 16:17:37,440 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 153 states. [2018-04-10 16:17:37,441 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 153 states to 153 states and 160 transitions. [2018-04-10 16:17:37,441 INFO L78 Accepts]: Start accepts. Automaton has 153 states and 160 transitions. Word has length 13 [2018-04-10 16:17:37,442 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 16:17:37,442 INFO L459 AbstractCegarLoop]: Abstraction has 153 states and 160 transitions. [2018-04-10 16:17:37,442 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-04-10 16:17:37,442 INFO L276 IsEmpty]: Start isEmpty. Operand 153 states and 160 transitions. [2018-04-10 16:17:37,442 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2018-04-10 16:17:37,442 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 16:17:37,443 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 16:17:37,443 INFO L408 AbstractCegarLoop]: === Iteration 4 === [mainErr51RequiresViolation, mainErr26RequiresViolation, mainErr54RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr66EnsuresViolationMEMORY_LEAK, mainErr31RequiresViolation, mainErr46RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr58RequiresViolation, mainErr62RequiresViolation, mainErr15RequiresViolation, mainErr49RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr55RequiresViolation, mainErr17RequiresViolation, mainErr42RequiresViolation, mainErr30RequiresViolation, mainErr56AssertViolationMEMORY_FREE, mainErr11RequiresViolation, mainErr63RequiresViolation, mainErr61AssertViolationMEMORY_FREE, mainErr24RequiresViolation, mainErr44RequiresViolation, mainErr10RequiresViolation, mainErr43RequiresViolation, mainErr4RequiresViolation, mainErr50RequiresViolation, mainErr37RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr59RequiresViolation, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr21RequiresViolation, mainErr41RequiresViolation, mainErr48RequiresViolation, mainErr39RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr52RequiresViolation, mainErr45RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr64AssertViolationMEMORY_FREE, mainErr32RequiresViolation, mainErr57AssertViolationMEMORY_FREE, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr60AssertViolationMEMORY_FREE, mainErr9RequiresViolation, mainErr65AssertViolationMEMORY_FREE, mainErr53RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr8RequiresViolation, mainErr34RequiresViolation, mainErr47RequiresViolation, mainErr14RequiresViolation, mainErr40RequiresViolation]=== [2018-04-10 16:17:37,443 INFO L82 PathProgramCache]: Analyzing trace with hash -1062536032, now seen corresponding path program 1 times [2018-04-10 16:17:37,443 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-10 16:17:37,443 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-10 16:17:37,445 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 16:17:37,445 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 16:17:37,445 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 16:17:37,455 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 16:17:37,456 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 16:17:37,485 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 16:17:37,485 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-10 16:17:37,485 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-04-10 16:17:37,485 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-04-10 16:17:37,485 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-04-10 16:17:37,485 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-04-10 16:17:37,486 INFO L87 Difference]: Start difference. First operand 153 states and 160 transitions. Second operand 4 states. [2018-04-10 16:17:37,599 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 16:17:37,599 INFO L93 Difference]: Finished difference Result 169 states and 175 transitions. [2018-04-10 16:17:37,600 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-04-10 16:17:37,600 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2018-04-10 16:17:37,600 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 16:17:37,601 INFO L225 Difference]: With dead ends: 169 [2018-04-10 16:17:37,601 INFO L226 Difference]: Without dead ends: 169 [2018-04-10 16:17:37,601 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-04-10 16:17:37,601 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 169 states. [2018-04-10 16:17:37,604 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 169 to 157. [2018-04-10 16:17:37,605 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 157 states. [2018-04-10 16:17:37,605 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 157 states to 157 states and 164 transitions. [2018-04-10 16:17:37,605 INFO L78 Accepts]: Start accepts. Automaton has 157 states and 164 transitions. Word has length 13 [2018-04-10 16:17:37,605 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 16:17:37,606 INFO L459 AbstractCegarLoop]: Abstraction has 157 states and 164 transitions. [2018-04-10 16:17:37,606 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-04-10 16:17:37,606 INFO L276 IsEmpty]: Start isEmpty. Operand 157 states and 164 transitions. [2018-04-10 16:17:37,606 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-04-10 16:17:37,606 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 16:17:37,606 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 16:17:37,606 INFO L408 AbstractCegarLoop]: === Iteration 5 === [mainErr51RequiresViolation, mainErr26RequiresViolation, mainErr54RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr66EnsuresViolationMEMORY_LEAK, mainErr31RequiresViolation, mainErr46RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr58RequiresViolation, mainErr62RequiresViolation, mainErr15RequiresViolation, mainErr49RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr55RequiresViolation, mainErr17RequiresViolation, mainErr42RequiresViolation, mainErr30RequiresViolation, mainErr56AssertViolationMEMORY_FREE, mainErr11RequiresViolation, mainErr63RequiresViolation, mainErr61AssertViolationMEMORY_FREE, mainErr24RequiresViolation, mainErr44RequiresViolation, mainErr10RequiresViolation, mainErr43RequiresViolation, mainErr4RequiresViolation, mainErr50RequiresViolation, mainErr37RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr59RequiresViolation, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr21RequiresViolation, mainErr41RequiresViolation, mainErr48RequiresViolation, mainErr39RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr52RequiresViolation, mainErr45RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr64AssertViolationMEMORY_FREE, mainErr32RequiresViolation, mainErr57AssertViolationMEMORY_FREE, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr60AssertViolationMEMORY_FREE, mainErr9RequiresViolation, mainErr65AssertViolationMEMORY_FREE, mainErr53RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr8RequiresViolation, mainErr34RequiresViolation, mainErr47RequiresViolation, mainErr14RequiresViolation, mainErr40RequiresViolation]=== [2018-04-10 16:17:37,606 INFO L82 PathProgramCache]: Analyzing trace with hash 628133548, now seen corresponding path program 1 times [2018-04-10 16:17:37,606 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-10 16:17:37,606 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-10 16:17:37,608 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 16:17:37,608 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 16:17:37,608 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 16:17:37,623 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 16:17:37,625 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 16:17:37,630 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-10 16:17:37,631 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-10 16:17:37,631 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-10 16:17:37,632 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 16:17:37,662 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 16:17:37,671 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-10 16:17:37,695 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-10 16:17:37,696 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-10 16:17:37,698 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 16:17:37,698 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-04-10 16:17:37,710 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-10 16:17:37,710 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-10 16:17:37,713 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-10 16:17:37,714 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:12, output treesize:11 [2018-04-10 16:17:37,723 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 16:17:37,723 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-10 16:17:37,723 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-04-10 16:17:37,724 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-04-10 16:17:37,724 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-04-10 16:17:37,724 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-04-10 16:17:37,724 INFO L87 Difference]: Start difference. First operand 157 states and 164 transitions. Second operand 5 states. [2018-04-10 16:17:37,881 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 16:17:37,881 INFO L93 Difference]: Finished difference Result 164 states and 172 transitions. [2018-04-10 16:17:37,881 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-04-10 16:17:37,881 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 21 [2018-04-10 16:17:37,881 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 16:17:37,882 INFO L225 Difference]: With dead ends: 164 [2018-04-10 16:17:37,882 INFO L226 Difference]: Without dead ends: 164 [2018-04-10 16:17:37,882 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 16 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2018-04-10 16:17:37,882 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 164 states. [2018-04-10 16:17:37,884 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 164 to 145. [2018-04-10 16:17:37,885 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 145 states. [2018-04-10 16:17:37,885 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 145 states to 145 states and 154 transitions. [2018-04-10 16:17:37,885 INFO L78 Accepts]: Start accepts. Automaton has 145 states and 154 transitions. Word has length 21 [2018-04-10 16:17:37,885 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 16:17:37,885 INFO L459 AbstractCegarLoop]: Abstraction has 145 states and 154 transitions. [2018-04-10 16:17:37,885 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-04-10 16:17:37,885 INFO L276 IsEmpty]: Start isEmpty. Operand 145 states and 154 transitions. [2018-04-10 16:17:37,886 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-04-10 16:17:37,886 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 16:17:37,886 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 16:17:37,886 INFO L408 AbstractCegarLoop]: === Iteration 6 === [mainErr51RequiresViolation, mainErr26RequiresViolation, mainErr54RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr66EnsuresViolationMEMORY_LEAK, mainErr31RequiresViolation, mainErr46RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr58RequiresViolation, mainErr62RequiresViolation, mainErr15RequiresViolation, mainErr49RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr55RequiresViolation, mainErr17RequiresViolation, mainErr42RequiresViolation, mainErr30RequiresViolation, mainErr56AssertViolationMEMORY_FREE, mainErr11RequiresViolation, mainErr63RequiresViolation, mainErr61AssertViolationMEMORY_FREE, mainErr24RequiresViolation, mainErr44RequiresViolation, mainErr10RequiresViolation, mainErr43RequiresViolation, mainErr4RequiresViolation, mainErr50RequiresViolation, mainErr37RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr59RequiresViolation, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr21RequiresViolation, mainErr41RequiresViolation, mainErr48RequiresViolation, mainErr39RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr52RequiresViolation, mainErr45RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr64AssertViolationMEMORY_FREE, mainErr32RequiresViolation, mainErr57AssertViolationMEMORY_FREE, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr60AssertViolationMEMORY_FREE, mainErr9RequiresViolation, mainErr65AssertViolationMEMORY_FREE, mainErr53RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr8RequiresViolation, mainErr34RequiresViolation, mainErr47RequiresViolation, mainErr14RequiresViolation, mainErr40RequiresViolation]=== [2018-04-10 16:17:37,886 INFO L82 PathProgramCache]: Analyzing trace with hash 628133549, now seen corresponding path program 1 times [2018-04-10 16:17:37,886 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-10 16:17:37,886 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-10 16:17:37,887 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 16:17:37,887 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 16:17:37,887 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 16:17:37,896 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 16:17:37,897 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 16:17:37,902 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-10 16:17:37,902 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-10 16:17:37,902 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-10 16:17:37,903 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 16:17:37,927 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 16:17:37,931 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-10 16:17:37,934 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-10 16:17:37,935 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-10 16:17:37,940 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-10 16:17:37,940 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-10 16:17:37,944 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 16:17:37,944 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:16, output treesize:14 [2018-04-10 16:17:37,976 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 16:17:37,977 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 16:17:37,978 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-04-10 16:17:37,978 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-10 16:17:37,985 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-04-10 16:17:37,986 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-10 16:17:37,991 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-10 16:17:37,991 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:28, output treesize:21 [2018-04-10 16:17:38,007 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 16:17:38,007 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-10 16:17:38,007 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-04-10 16:17:38,008 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-04-10 16:17:38,008 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-04-10 16:17:38,008 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2018-04-10 16:17:38,008 INFO L87 Difference]: Start difference. First operand 145 states and 154 transitions. Second operand 7 states. [2018-04-10 16:17:38,294 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 16:17:38,294 INFO L93 Difference]: Finished difference Result 180 states and 190 transitions. [2018-04-10 16:17:38,295 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-04-10 16:17:38,295 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 21 [2018-04-10 16:17:38,295 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 16:17:38,296 INFO L225 Difference]: With dead ends: 180 [2018-04-10 16:17:38,296 INFO L226 Difference]: Without dead ends: 180 [2018-04-10 16:17:38,296 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 24 GetRequests, 15 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=40, Invalid=70, Unknown=0, NotChecked=0, Total=110 [2018-04-10 16:17:38,296 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 180 states. [2018-04-10 16:17:38,300 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 180 to 156. [2018-04-10 16:17:38,301 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 156 states. [2018-04-10 16:17:38,301 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 156 states to 156 states and 168 transitions. [2018-04-10 16:17:38,301 INFO L78 Accepts]: Start accepts. Automaton has 156 states and 168 transitions. Word has length 21 [2018-04-10 16:17:38,301 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 16:17:38,302 INFO L459 AbstractCegarLoop]: Abstraction has 156 states and 168 transitions. [2018-04-10 16:17:38,302 INFO L460 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-04-10 16:17:38,302 INFO L276 IsEmpty]: Start isEmpty. Operand 156 states and 168 transitions. [2018-04-10 16:17:38,302 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2018-04-10 16:17:38,302 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 16:17:38,302 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 16:17:38,302 INFO L408 AbstractCegarLoop]: === Iteration 7 === [mainErr51RequiresViolation, mainErr26RequiresViolation, mainErr54RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr66EnsuresViolationMEMORY_LEAK, mainErr31RequiresViolation, mainErr46RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr58RequiresViolation, mainErr62RequiresViolation, mainErr15RequiresViolation, mainErr49RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr55RequiresViolation, mainErr17RequiresViolation, mainErr42RequiresViolation, mainErr30RequiresViolation, mainErr56AssertViolationMEMORY_FREE, mainErr11RequiresViolation, mainErr63RequiresViolation, mainErr61AssertViolationMEMORY_FREE, mainErr24RequiresViolation, mainErr44RequiresViolation, mainErr10RequiresViolation, mainErr43RequiresViolation, mainErr4RequiresViolation, mainErr50RequiresViolation, mainErr37RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr59RequiresViolation, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr21RequiresViolation, mainErr41RequiresViolation, mainErr48RequiresViolation, mainErr39RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr52RequiresViolation, mainErr45RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr64AssertViolationMEMORY_FREE, mainErr32RequiresViolation, mainErr57AssertViolationMEMORY_FREE, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr60AssertViolationMEMORY_FREE, mainErr9RequiresViolation, mainErr65AssertViolationMEMORY_FREE, mainErr53RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr8RequiresViolation, mainErr34RequiresViolation, mainErr47RequiresViolation, mainErr14RequiresViolation, mainErr40RequiresViolation]=== [2018-04-10 16:17:38,302 INFO L82 PathProgramCache]: Analyzing trace with hash -1954048785, now seen corresponding path program 1 times [2018-04-10 16:17:38,303 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-10 16:17:38,303 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-10 16:17:38,303 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 16:17:38,304 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 16:17:38,304 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 16:17:38,314 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 16:17:38,315 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 16:17:38,349 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 16:17:38,349 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-10 16:17:38,349 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-04-10 16:17:38,350 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-04-10 16:17:38,350 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-04-10 16:17:38,350 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-04-10 16:17:38,350 INFO L87 Difference]: Start difference. First operand 156 states and 168 transitions. Second operand 5 states. [2018-04-10 16:17:38,492 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 16:17:38,492 INFO L93 Difference]: Finished difference Result 207 states and 223 transitions. [2018-04-10 16:17:38,493 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-04-10 16:17:38,493 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 23 [2018-04-10 16:17:38,493 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 16:17:38,494 INFO L225 Difference]: With dead ends: 207 [2018-04-10 16:17:38,494 INFO L226 Difference]: Without dead ends: 207 [2018-04-10 16:17:38,494 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2018-04-10 16:17:38,495 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 207 states. [2018-04-10 16:17:38,497 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 207 to 155. [2018-04-10 16:17:38,498 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 155 states. [2018-04-10 16:17:38,498 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 155 states to 155 states and 166 transitions. [2018-04-10 16:17:38,499 INFO L78 Accepts]: Start accepts. Automaton has 155 states and 166 transitions. Word has length 23 [2018-04-10 16:17:38,499 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 16:17:38,499 INFO L459 AbstractCegarLoop]: Abstraction has 155 states and 166 transitions. [2018-04-10 16:17:38,499 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-04-10 16:17:38,499 INFO L276 IsEmpty]: Start isEmpty. Operand 155 states and 166 transitions. [2018-04-10 16:17:38,500 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2018-04-10 16:17:38,500 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 16:17:38,500 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 16:17:38,500 INFO L408 AbstractCegarLoop]: === Iteration 8 === [mainErr51RequiresViolation, mainErr26RequiresViolation, mainErr54RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr66EnsuresViolationMEMORY_LEAK, mainErr31RequiresViolation, mainErr46RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr58RequiresViolation, mainErr62RequiresViolation, mainErr15RequiresViolation, mainErr49RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr55RequiresViolation, mainErr17RequiresViolation, mainErr42RequiresViolation, mainErr30RequiresViolation, mainErr56AssertViolationMEMORY_FREE, mainErr11RequiresViolation, mainErr63RequiresViolation, mainErr61AssertViolationMEMORY_FREE, mainErr24RequiresViolation, mainErr44RequiresViolation, mainErr10RequiresViolation, mainErr43RequiresViolation, mainErr4RequiresViolation, mainErr50RequiresViolation, mainErr37RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr59RequiresViolation, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr21RequiresViolation, mainErr41RequiresViolation, mainErr48RequiresViolation, mainErr39RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr52RequiresViolation, mainErr45RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr64AssertViolationMEMORY_FREE, mainErr32RequiresViolation, mainErr57AssertViolationMEMORY_FREE, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr60AssertViolationMEMORY_FREE, mainErr9RequiresViolation, mainErr65AssertViolationMEMORY_FREE, mainErr53RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr8RequiresViolation, mainErr34RequiresViolation, mainErr47RequiresViolation, mainErr14RequiresViolation, mainErr40RequiresViolation]=== [2018-04-10 16:17:38,500 INFO L82 PathProgramCache]: Analyzing trace with hash -1954048784, now seen corresponding path program 1 times [2018-04-10 16:17:38,500 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-10 16:17:38,500 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-10 16:17:38,502 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 16:17:38,502 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 16:17:38,502 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 16:17:38,510 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 16:17:38,511 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 16:17:38,566 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 16:17:38,566 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-10 16:17:38,567 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-04-10 16:17:38,567 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-04-10 16:17:38,567 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-04-10 16:17:38,567 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-04-10 16:17:38,567 INFO L87 Difference]: Start difference. First operand 155 states and 166 transitions. Second operand 5 states. [2018-04-10 16:17:38,740 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 16:17:38,740 INFO L93 Difference]: Finished difference Result 231 states and 248 transitions. [2018-04-10 16:17:38,740 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-04-10 16:17:38,740 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 23 [2018-04-10 16:17:38,740 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 16:17:38,741 INFO L225 Difference]: With dead ends: 231 [2018-04-10 16:17:38,741 INFO L226 Difference]: Without dead ends: 231 [2018-04-10 16:17:38,741 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-04-10 16:17:38,742 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 231 states. [2018-04-10 16:17:38,743 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 231 to 154. [2018-04-10 16:17:38,743 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 154 states. [2018-04-10 16:17:38,744 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 154 states to 154 states and 164 transitions. [2018-04-10 16:17:38,744 INFO L78 Accepts]: Start accepts. Automaton has 154 states and 164 transitions. Word has length 23 [2018-04-10 16:17:38,744 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 16:17:38,744 INFO L459 AbstractCegarLoop]: Abstraction has 154 states and 164 transitions. [2018-04-10 16:17:38,744 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-04-10 16:17:38,744 INFO L276 IsEmpty]: Start isEmpty. Operand 154 states and 164 transitions. [2018-04-10 16:17:38,745 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-04-10 16:17:38,745 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 16:17:38,745 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 16:17:38,745 INFO L408 AbstractCegarLoop]: === Iteration 9 === [mainErr51RequiresViolation, mainErr26RequiresViolation, mainErr54RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr66EnsuresViolationMEMORY_LEAK, mainErr31RequiresViolation, mainErr46RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr58RequiresViolation, mainErr62RequiresViolation, mainErr15RequiresViolation, mainErr49RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr55RequiresViolation, mainErr17RequiresViolation, mainErr42RequiresViolation, mainErr30RequiresViolation, mainErr56AssertViolationMEMORY_FREE, mainErr11RequiresViolation, mainErr63RequiresViolation, mainErr61AssertViolationMEMORY_FREE, mainErr24RequiresViolation, mainErr44RequiresViolation, mainErr10RequiresViolation, mainErr43RequiresViolation, mainErr4RequiresViolation, mainErr50RequiresViolation, mainErr37RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr59RequiresViolation, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr21RequiresViolation, mainErr41RequiresViolation, mainErr48RequiresViolation, mainErr39RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr52RequiresViolation, mainErr45RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr64AssertViolationMEMORY_FREE, mainErr32RequiresViolation, mainErr57AssertViolationMEMORY_FREE, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr60AssertViolationMEMORY_FREE, mainErr9RequiresViolation, mainErr65AssertViolationMEMORY_FREE, mainErr53RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr8RequiresViolation, mainErr34RequiresViolation, mainErr47RequiresViolation, mainErr14RequiresViolation, mainErr40RequiresViolation]=== [2018-04-10 16:17:38,745 INFO L82 PathProgramCache]: Analyzing trace with hash -1563619919, now seen corresponding path program 1 times [2018-04-10 16:17:38,745 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-10 16:17:38,745 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-10 16:17:38,746 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 16:17:38,746 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 16:17:38,746 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 16:17:38,755 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 16:17:38,756 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 16:17:38,759 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-10 16:17:38,760 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-10 16:17:38,760 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-10 16:17:38,761 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 16:17:38,799 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 16:17:38,803 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-10 16:17:38,837 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-10 16:17:38,838 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-10 16:17:38,840 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 16:17:38,841 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:13, output treesize:12 [2018-04-10 16:17:38,851 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-04-10 16:17:38,853 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-10 16:17:38,853 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-10 16:17:38,855 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 16:17:38,861 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-04-10 16:17:38,862 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-10 16:17:38,863 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-10 16:17:38,863 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 16:17:38,867 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-10 16:17:38,867 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:31, output treesize:20 [2018-04-10 16:17:38,875 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2018-04-10 16:17:38,877 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2018-04-10 16:17:38,877 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-10 16:17:38,878 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 16:17:38,881 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-10 16:17:38,881 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:27, output treesize:16 [2018-04-10 16:17:38,898 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 23 treesize of output 35 [2018-04-10 16:17:38,901 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 23 [2018-04-10 16:17:38,902 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-10 16:17:38,914 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 16:17:38,918 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-04-10 16:17:38,918 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:29, output treesize:25 [2018-04-10 16:17:38,936 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 29 treesize of output 28 [2018-04-10 16:17:38,940 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 5 [2018-04-10 16:17:38,940 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-10 16:17:38,945 INFO L267 ElimStorePlain]: Start of recursive call 2: 3 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 16:17:38,948 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-10 16:17:38,948 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:35, output treesize:5 [2018-04-10 16:17:38,958 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 16:17:38,958 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-10 16:17:38,958 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-04-10 16:17:38,958 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-04-10 16:17:38,958 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-04-10 16:17:38,959 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=87, Unknown=0, NotChecked=0, Total=110 [2018-04-10 16:17:38,959 INFO L87 Difference]: Start difference. First operand 154 states and 164 transitions. Second operand 11 states. [2018-04-10 16:17:39,550 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 16:17:39,550 INFO L93 Difference]: Finished difference Result 189 states and 200 transitions. [2018-04-10 16:17:39,551 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-04-10 16:17:39,551 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 27 [2018-04-10 16:17:39,551 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 16:17:39,552 INFO L225 Difference]: With dead ends: 189 [2018-04-10 16:17:39,552 INFO L226 Difference]: Without dead ends: 189 [2018-04-10 16:17:39,552 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 39 GetRequests, 17 SyntacticMatches, 0 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 92 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=170, Invalid=382, Unknown=0, NotChecked=0, Total=552 [2018-04-10 16:17:39,553 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 189 states. [2018-04-10 16:17:39,555 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 189 to 156. [2018-04-10 16:17:39,555 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 156 states. [2018-04-10 16:17:39,555 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 156 states to 156 states and 167 transitions. [2018-04-10 16:17:39,556 INFO L78 Accepts]: Start accepts. Automaton has 156 states and 167 transitions. Word has length 27 [2018-04-10 16:17:39,556 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 16:17:39,556 INFO L459 AbstractCegarLoop]: Abstraction has 156 states and 167 transitions. [2018-04-10 16:17:39,556 INFO L460 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-04-10 16:17:39,556 INFO L276 IsEmpty]: Start isEmpty. Operand 156 states and 167 transitions. [2018-04-10 16:17:39,557 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-04-10 16:17:39,557 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 16:17:39,557 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 16:17:39,557 INFO L408 AbstractCegarLoop]: === Iteration 10 === [mainErr51RequiresViolation, mainErr26RequiresViolation, mainErr54RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr66EnsuresViolationMEMORY_LEAK, mainErr31RequiresViolation, mainErr46RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr58RequiresViolation, mainErr62RequiresViolation, mainErr15RequiresViolation, mainErr49RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr55RequiresViolation, mainErr17RequiresViolation, mainErr42RequiresViolation, mainErr30RequiresViolation, mainErr56AssertViolationMEMORY_FREE, mainErr11RequiresViolation, mainErr63RequiresViolation, mainErr61AssertViolationMEMORY_FREE, mainErr24RequiresViolation, mainErr44RequiresViolation, mainErr10RequiresViolation, mainErr43RequiresViolation, mainErr4RequiresViolation, mainErr50RequiresViolation, mainErr37RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr59RequiresViolation, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr21RequiresViolation, mainErr41RequiresViolation, mainErr48RequiresViolation, mainErr39RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr52RequiresViolation, mainErr45RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr64AssertViolationMEMORY_FREE, mainErr32RequiresViolation, mainErr57AssertViolationMEMORY_FREE, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr60AssertViolationMEMORY_FREE, mainErr9RequiresViolation, mainErr65AssertViolationMEMORY_FREE, mainErr53RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr8RequiresViolation, mainErr34RequiresViolation, mainErr47RequiresViolation, mainErr14RequiresViolation, mainErr40RequiresViolation]=== [2018-04-10 16:17:39,557 INFO L82 PathProgramCache]: Analyzing trace with hash -1563619918, now seen corresponding path program 1 times [2018-04-10 16:17:39,557 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-10 16:17:39,557 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-10 16:17:39,558 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 16:17:39,559 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 16:17:39,559 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 16:17:39,568 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 16:17:39,569 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 16:17:39,572 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-10 16:17:39,573 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-10 16:17:39,573 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-10 16:17:39,574 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 16:17:39,605 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 16:17:39,608 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-10 16:17:39,611 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-10 16:17:39,611 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-10 16:17:39,612 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 16:17:39,613 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-04-10 16:17:39,624 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-10 16:17:39,625 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-10 16:17:39,631 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 16:17:39,631 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 16:17:39,632 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-04-10 16:17:39,632 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-10 16:17:39,638 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 16:17:39,638 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:20, output treesize:13 [2018-04-10 16:17:39,650 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-04-10 16:17:39,652 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-10 16:17:39,653 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-10 16:17:39,655 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 16:17:39,663 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-04-10 16:17:39,665 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-10 16:17:39,665 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-10 16:17:39,667 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 16:17:39,672 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-10 16:17:39,672 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:32, output treesize:25 [2018-04-10 16:17:39,703 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 30 [2018-04-10 16:17:39,709 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 13 [2018-04-10 16:17:39,709 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-10 16:17:39,714 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 16:17:39,728 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 52 treesize of output 48 [2018-04-10 16:17:39,731 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 13 [2018-04-10 16:17:39,731 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-10 16:17:39,738 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 16:17:39,744 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-10 16:17:39,745 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:67, output treesize:51 [2018-04-10 16:17:39,766 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 37 [2018-04-10 16:17:39,768 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 19 [2018-04-10 16:17:39,768 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-10 16:17:39,774 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 1 [2018-04-10 16:17:39,774 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-10 16:17:39,778 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 16:17:39,785 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 22 [2018-04-10 16:17:39,786 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 1 [2018-04-10 16:17:39,786 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-04-10 16:17:39,791 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2018-04-10 16:17:39,791 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-04-10 16:17:39,819 INFO L267 ElimStorePlain]: Start of recursive call 5: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 16:17:39,824 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-10 16:17:39,824 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 5 variables, input treesize:65, output treesize:9 [2018-04-10 16:17:39,841 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 16:17:39,841 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-10 16:17:39,841 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-04-10 16:17:39,841 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-04-10 16:17:39,841 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-04-10 16:17:39,842 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2018-04-10 16:17:39,842 INFO L87 Difference]: Start difference. First operand 156 states and 167 transitions. Second operand 11 states. [2018-04-10 16:17:40,522 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 16:17:40,522 INFO L93 Difference]: Finished difference Result 190 states and 201 transitions. [2018-04-10 16:17:40,522 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-04-10 16:17:40,522 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 27 [2018-04-10 16:17:40,523 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 16:17:40,523 INFO L225 Difference]: With dead ends: 190 [2018-04-10 16:17:40,523 INFO L226 Difference]: Without dead ends: 190 [2018-04-10 16:17:40,524 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 42 GetRequests, 17 SyntacticMatches, 0 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 56 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=224, Invalid=478, Unknown=0, NotChecked=0, Total=702 [2018-04-10 16:17:40,524 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 190 states. [2018-04-10 16:17:40,526 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 190 to 170. [2018-04-10 16:17:40,527 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 170 states. [2018-04-10 16:17:40,527 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 170 states to 170 states and 181 transitions. [2018-04-10 16:17:40,527 INFO L78 Accepts]: Start accepts. Automaton has 170 states and 181 transitions. Word has length 27 [2018-04-10 16:17:40,528 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 16:17:40,528 INFO L459 AbstractCegarLoop]: Abstraction has 170 states and 181 transitions. [2018-04-10 16:17:40,528 INFO L460 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-04-10 16:17:40,528 INFO L276 IsEmpty]: Start isEmpty. Operand 170 states and 181 transitions. [2018-04-10 16:17:40,529 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2018-04-10 16:17:40,529 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 16:17:40,529 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 16:17:40,529 INFO L408 AbstractCegarLoop]: === Iteration 11 === [mainErr51RequiresViolation, mainErr26RequiresViolation, mainErr54RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr66EnsuresViolationMEMORY_LEAK, mainErr31RequiresViolation, mainErr46RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr58RequiresViolation, mainErr62RequiresViolation, mainErr15RequiresViolation, mainErr49RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr55RequiresViolation, mainErr17RequiresViolation, mainErr42RequiresViolation, mainErr30RequiresViolation, mainErr56AssertViolationMEMORY_FREE, mainErr11RequiresViolation, mainErr63RequiresViolation, mainErr61AssertViolationMEMORY_FREE, mainErr24RequiresViolation, mainErr44RequiresViolation, mainErr10RequiresViolation, mainErr43RequiresViolation, mainErr4RequiresViolation, mainErr50RequiresViolation, mainErr37RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr59RequiresViolation, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr21RequiresViolation, mainErr41RequiresViolation, mainErr48RequiresViolation, mainErr39RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr52RequiresViolation, mainErr45RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr64AssertViolationMEMORY_FREE, mainErr32RequiresViolation, mainErr57AssertViolationMEMORY_FREE, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr60AssertViolationMEMORY_FREE, mainErr9RequiresViolation, mainErr65AssertViolationMEMORY_FREE, mainErr53RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr8RequiresViolation, mainErr34RequiresViolation, mainErr47RequiresViolation, mainErr14RequiresViolation, mainErr40RequiresViolation]=== [2018-04-10 16:17:40,529 INFO L82 PathProgramCache]: Analyzing trace with hash 1535529887, now seen corresponding path program 1 times [2018-04-10 16:17:40,529 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-10 16:17:40,529 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-10 16:17:40,530 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 16:17:40,530 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 16:17:40,530 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 16:17:40,536 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 16:17:40,537 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 16:17:40,588 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 16:17:40,589 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-10 16:17:40,589 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-04-10 16:17:40,589 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-04-10 16:17:40,589 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-04-10 16:17:40,589 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2018-04-10 16:17:40,589 INFO L87 Difference]: Start difference. First operand 170 states and 181 transitions. Second operand 8 states. [2018-04-10 16:17:40,760 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 16:17:40,760 INFO L93 Difference]: Finished difference Result 188 states and 199 transitions. [2018-04-10 16:17:40,760 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-04-10 16:17:40,760 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 33 [2018-04-10 16:17:40,761 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 16:17:40,761 INFO L225 Difference]: With dead ends: 188 [2018-04-10 16:17:40,761 INFO L226 Difference]: Without dead ends: 188 [2018-04-10 16:17:40,762 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=63, Invalid=119, Unknown=0, NotChecked=0, Total=182 [2018-04-10 16:17:40,762 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 188 states. [2018-04-10 16:17:40,764 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 188 to 170. [2018-04-10 16:17:40,764 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 170 states. [2018-04-10 16:17:40,765 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 170 states to 170 states and 180 transitions. [2018-04-10 16:17:40,765 INFO L78 Accepts]: Start accepts. Automaton has 170 states and 180 transitions. Word has length 33 [2018-04-10 16:17:40,765 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 16:17:40,766 INFO L459 AbstractCegarLoop]: Abstraction has 170 states and 180 transitions. [2018-04-10 16:17:40,766 INFO L460 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-04-10 16:17:40,766 INFO L276 IsEmpty]: Start isEmpty. Operand 170 states and 180 transitions. [2018-04-10 16:17:40,766 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-04-10 16:17:40,766 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 16:17:40,768 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 16:17:40,768 INFO L408 AbstractCegarLoop]: === Iteration 12 === [mainErr51RequiresViolation, mainErr26RequiresViolation, mainErr54RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr66EnsuresViolationMEMORY_LEAK, mainErr31RequiresViolation, mainErr46RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr58RequiresViolation, mainErr62RequiresViolation, mainErr15RequiresViolation, mainErr49RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr55RequiresViolation, mainErr17RequiresViolation, mainErr42RequiresViolation, mainErr30RequiresViolation, mainErr56AssertViolationMEMORY_FREE, mainErr11RequiresViolation, mainErr63RequiresViolation, mainErr61AssertViolationMEMORY_FREE, mainErr24RequiresViolation, mainErr44RequiresViolation, mainErr10RequiresViolation, mainErr43RequiresViolation, mainErr4RequiresViolation, mainErr50RequiresViolation, mainErr37RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr59RequiresViolation, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr21RequiresViolation, mainErr41RequiresViolation, mainErr48RequiresViolation, mainErr39RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr52RequiresViolation, mainErr45RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr64AssertViolationMEMORY_FREE, mainErr32RequiresViolation, mainErr57AssertViolationMEMORY_FREE, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr60AssertViolationMEMORY_FREE, mainErr9RequiresViolation, mainErr65AssertViolationMEMORY_FREE, mainErr53RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr8RequiresViolation, mainErr34RequiresViolation, mainErr47RequiresViolation, mainErr14RequiresViolation, mainErr40RequiresViolation]=== [2018-04-10 16:17:40,769 INFO L82 PathProgramCache]: Analyzing trace with hash 2090659852, now seen corresponding path program 1 times [2018-04-10 16:17:40,769 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-10 16:17:40,769 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-10 16:17:40,770 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 16:17:40,770 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 16:17:40,770 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 16:17:40,782 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 16:17:40,782 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 16:17:40,819 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 16:17:40,820 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-10 16:17:40,820 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-04-10 16:17:40,820 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-04-10 16:17:40,820 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-04-10 16:17:40,820 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-04-10 16:17:40,820 INFO L87 Difference]: Start difference. First operand 170 states and 180 transitions. Second operand 5 states. [2018-04-10 16:17:41,002 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 16:17:41,003 INFO L93 Difference]: Finished difference Result 249 states and 265 transitions. [2018-04-10 16:17:41,003 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-04-10 16:17:41,003 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 34 [2018-04-10 16:17:41,003 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 16:17:41,004 INFO L225 Difference]: With dead ends: 249 [2018-04-10 16:17:41,004 INFO L226 Difference]: Without dead ends: 249 [2018-04-10 16:17:41,005 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2018-04-10 16:17:41,005 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 249 states. [2018-04-10 16:17:41,008 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 249 to 169. [2018-04-10 16:17:41,008 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 169 states. [2018-04-10 16:17:41,009 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 169 states to 169 states and 179 transitions. [2018-04-10 16:17:41,009 INFO L78 Accepts]: Start accepts. Automaton has 169 states and 179 transitions. Word has length 34 [2018-04-10 16:17:41,009 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 16:17:41,010 INFO L459 AbstractCegarLoop]: Abstraction has 169 states and 179 transitions. [2018-04-10 16:17:41,010 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-04-10 16:17:41,010 INFO L276 IsEmpty]: Start isEmpty. Operand 169 states and 179 transitions. [2018-04-10 16:17:41,010 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-04-10 16:17:41,010 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 16:17:41,010 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 16:17:41,013 INFO L408 AbstractCegarLoop]: === Iteration 13 === [mainErr51RequiresViolation, mainErr26RequiresViolation, mainErr54RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr66EnsuresViolationMEMORY_LEAK, mainErr31RequiresViolation, mainErr46RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr58RequiresViolation, mainErr62RequiresViolation, mainErr15RequiresViolation, mainErr49RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr55RequiresViolation, mainErr17RequiresViolation, mainErr42RequiresViolation, mainErr30RequiresViolation, mainErr56AssertViolationMEMORY_FREE, mainErr11RequiresViolation, mainErr63RequiresViolation, mainErr61AssertViolationMEMORY_FREE, mainErr24RequiresViolation, mainErr44RequiresViolation, mainErr10RequiresViolation, mainErr43RequiresViolation, mainErr4RequiresViolation, mainErr50RequiresViolation, mainErr37RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr59RequiresViolation, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr21RequiresViolation, mainErr41RequiresViolation, mainErr48RequiresViolation, mainErr39RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr52RequiresViolation, mainErr45RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr64AssertViolationMEMORY_FREE, mainErr32RequiresViolation, mainErr57AssertViolationMEMORY_FREE, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr60AssertViolationMEMORY_FREE, mainErr9RequiresViolation, mainErr65AssertViolationMEMORY_FREE, mainErr53RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr8RequiresViolation, mainErr34RequiresViolation, mainErr47RequiresViolation, mainErr14RequiresViolation, mainErr40RequiresViolation]=== [2018-04-10 16:17:41,013 INFO L82 PathProgramCache]: Analyzing trace with hash 2090659853, now seen corresponding path program 1 times [2018-04-10 16:17:41,013 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-10 16:17:41,013 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-10 16:17:41,014 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 16:17:41,014 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 16:17:41,014 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 16:17:41,024 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 16:17:41,024 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 16:17:41,068 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 16:17:41,068 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-10 16:17:41,069 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-04-10 16:17:41,069 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-04-10 16:17:41,069 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-04-10 16:17:41,069 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-04-10 16:17:41,069 INFO L87 Difference]: Start difference. First operand 169 states and 179 transitions. Second operand 5 states. [2018-04-10 16:17:41,246 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 16:17:41,246 INFO L93 Difference]: Finished difference Result 273 states and 291 transitions. [2018-04-10 16:17:41,246 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-04-10 16:17:41,247 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 34 [2018-04-10 16:17:41,247 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 16:17:41,247 INFO L225 Difference]: With dead ends: 273 [2018-04-10 16:17:41,247 INFO L226 Difference]: Without dead ends: 273 [2018-04-10 16:17:41,248 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-04-10 16:17:41,248 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 273 states. [2018-04-10 16:17:41,249 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 273 to 168. [2018-04-10 16:17:41,249 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 168 states. [2018-04-10 16:17:41,250 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 168 states to 168 states and 178 transitions. [2018-04-10 16:17:41,250 INFO L78 Accepts]: Start accepts. Automaton has 168 states and 178 transitions. Word has length 34 [2018-04-10 16:17:41,250 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 16:17:41,250 INFO L459 AbstractCegarLoop]: Abstraction has 168 states and 178 transitions. [2018-04-10 16:17:41,250 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-04-10 16:17:41,250 INFO L276 IsEmpty]: Start isEmpty. Operand 168 states and 178 transitions. [2018-04-10 16:17:41,250 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-04-10 16:17:41,250 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 16:17:41,251 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 16:17:41,251 INFO L408 AbstractCegarLoop]: === Iteration 14 === [mainErr51RequiresViolation, mainErr26RequiresViolation, mainErr54RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr66EnsuresViolationMEMORY_LEAK, mainErr31RequiresViolation, mainErr46RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr58RequiresViolation, mainErr62RequiresViolation, mainErr15RequiresViolation, mainErr49RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr55RequiresViolation, mainErr17RequiresViolation, mainErr42RequiresViolation, mainErr30RequiresViolation, mainErr56AssertViolationMEMORY_FREE, mainErr11RequiresViolation, mainErr63RequiresViolation, mainErr61AssertViolationMEMORY_FREE, mainErr24RequiresViolation, mainErr44RequiresViolation, mainErr10RequiresViolation, mainErr43RequiresViolation, mainErr4RequiresViolation, mainErr50RequiresViolation, mainErr37RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr59RequiresViolation, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr21RequiresViolation, mainErr41RequiresViolation, mainErr48RequiresViolation, mainErr39RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr52RequiresViolation, mainErr45RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr64AssertViolationMEMORY_FREE, mainErr32RequiresViolation, mainErr57AssertViolationMEMORY_FREE, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr60AssertViolationMEMORY_FREE, mainErr9RequiresViolation, mainErr65AssertViolationMEMORY_FREE, mainErr53RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr8RequiresViolation, mainErr34RequiresViolation, mainErr47RequiresViolation, mainErr14RequiresViolation, mainErr40RequiresViolation]=== [2018-04-10 16:17:41,251 INFO L82 PathProgramCache]: Analyzing trace with hash 566596208, now seen corresponding path program 1 times [2018-04-10 16:17:41,251 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-10 16:17:41,251 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-10 16:17:41,252 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 16:17:41,252 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 16:17:41,252 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 16:17:41,258 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 16:17:41,259 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 16:17:41,260 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-10 16:17:41,261 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-10 16:17:41,261 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-10 16:17:41,261 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 16:17:41,279 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 16:17:41,282 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-10 16:17:41,292 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-04-10 16:17:41,294 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-10 16:17:41,294 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-10 16:17:41,296 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 16:17:41,302 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-04-10 16:17:41,304 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-10 16:17:41,304 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-10 16:17:41,305 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 16:17:41,309 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-10 16:17:41,309 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:29, output treesize:21 [2018-04-10 16:17:41,319 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 16 [2018-04-10 16:17:41,321 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 16:17:41,321 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 23 [2018-04-10 16:17:41,322 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-10 16:17:41,330 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 16:17:41,339 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 16 [2018-04-10 16:17:41,341 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 16:17:41,342 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 23 [2018-04-10 16:17:41,342 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-10 16:17:41,345 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 16:17:41,351 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-10 16:17:41,351 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:47, output treesize:39 [2018-04-10 16:17:41,388 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 18 [2018-04-10 16:17:41,391 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 16:17:41,391 INFO L682 Elim1Store]: detected equality via solver [2018-04-10 16:17:41,393 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 13 [2018-04-10 16:17:41,393 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-10 16:17:41,396 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 16:17:41,405 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 18 [2018-04-10 16:17:41,407 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 16:17:41,408 INFO L682 Elim1Store]: detected equality via solver [2018-04-10 16:17:41,408 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 13 [2018-04-10 16:17:41,408 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-10 16:17:41,411 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 16:17:41,417 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-10 16:17:41,417 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 5 variables, input treesize:59, output treesize:7 [2018-04-10 16:17:41,463 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 1 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 16:17:41,464 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-10 16:17:41,464 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9] total 9 [2018-04-10 16:17:41,464 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-04-10 16:17:41,464 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-04-10 16:17:41,464 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=54, Unknown=0, NotChecked=0, Total=72 [2018-04-10 16:17:41,465 INFO L87 Difference]: Start difference. First operand 168 states and 178 transitions. Second operand 9 states. [2018-04-10 16:17:41,840 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 16:17:41,840 INFO L93 Difference]: Finished difference Result 232 states and 245 transitions. [2018-04-10 16:17:41,840 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-04-10 16:17:41,841 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 36 [2018-04-10 16:17:41,841 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 16:17:41,841 INFO L225 Difference]: With dead ends: 232 [2018-04-10 16:17:41,841 INFO L226 Difference]: Without dead ends: 232 [2018-04-10 16:17:41,841 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 43 GetRequests, 28 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 18 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=89, Invalid=183, Unknown=0, NotChecked=0, Total=272 [2018-04-10 16:17:41,842 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 232 states. [2018-04-10 16:17:41,843 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 232 to 184. [2018-04-10 16:17:41,843 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 184 states. [2018-04-10 16:17:41,844 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 184 states to 184 states and 195 transitions. [2018-04-10 16:17:41,844 INFO L78 Accepts]: Start accepts. Automaton has 184 states and 195 transitions. Word has length 36 [2018-04-10 16:17:41,844 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 16:17:41,844 INFO L459 AbstractCegarLoop]: Abstraction has 184 states and 195 transitions. [2018-04-10 16:17:41,844 INFO L460 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-04-10 16:17:41,844 INFO L276 IsEmpty]: Start isEmpty. Operand 184 states and 195 transitions. [2018-04-10 16:17:41,845 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-04-10 16:17:41,845 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 16:17:41,845 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 16:17:41,845 INFO L408 AbstractCegarLoop]: === Iteration 15 === [mainErr51RequiresViolation, mainErr26RequiresViolation, mainErr54RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr66EnsuresViolationMEMORY_LEAK, mainErr31RequiresViolation, mainErr46RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr58RequiresViolation, mainErr62RequiresViolation, mainErr15RequiresViolation, mainErr49RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr55RequiresViolation, mainErr17RequiresViolation, mainErr42RequiresViolation, mainErr30RequiresViolation, mainErr56AssertViolationMEMORY_FREE, mainErr11RequiresViolation, mainErr63RequiresViolation, mainErr61AssertViolationMEMORY_FREE, mainErr24RequiresViolation, mainErr44RequiresViolation, mainErr10RequiresViolation, mainErr43RequiresViolation, mainErr4RequiresViolation, mainErr50RequiresViolation, mainErr37RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr59RequiresViolation, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr21RequiresViolation, mainErr41RequiresViolation, mainErr48RequiresViolation, mainErr39RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr52RequiresViolation, mainErr45RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr64AssertViolationMEMORY_FREE, mainErr32RequiresViolation, mainErr57AssertViolationMEMORY_FREE, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr60AssertViolationMEMORY_FREE, mainErr9RequiresViolation, mainErr65AssertViolationMEMORY_FREE, mainErr53RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr8RequiresViolation, mainErr34RequiresViolation, mainErr47RequiresViolation, mainErr14RequiresViolation, mainErr40RequiresViolation]=== [2018-04-10 16:17:41,845 INFO L82 PathProgramCache]: Analyzing trace with hash 1406625268, now seen corresponding path program 1 times [2018-04-10 16:17:41,845 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-10 16:17:41,845 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-10 16:17:41,846 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 16:17:41,846 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 16:17:41,846 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 16:17:41,850 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 16:17:41,850 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 16:17:41,910 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 16:17:41,910 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-10 16:17:41,910 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-04-10 16:17:41,910 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-04-10 16:17:41,910 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-04-10 16:17:41,910 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-04-10 16:17:41,910 INFO L87 Difference]: Start difference. First operand 184 states and 195 transitions. Second operand 5 states. [2018-04-10 16:17:41,977 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 16:17:41,977 INFO L93 Difference]: Finished difference Result 184 states and 193 transitions. [2018-04-10 16:17:41,977 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-04-10 16:17:41,977 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 38 [2018-04-10 16:17:41,977 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 16:17:41,978 INFO L225 Difference]: With dead ends: 184 [2018-04-10 16:17:41,978 INFO L226 Difference]: Without dead ends: 184 [2018-04-10 16:17:41,978 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-04-10 16:17:41,979 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 184 states. [2018-04-10 16:17:41,981 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 184 to 183. [2018-04-10 16:17:41,981 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 183 states. [2018-04-10 16:17:41,982 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 183 states to 183 states and 192 transitions. [2018-04-10 16:17:41,982 INFO L78 Accepts]: Start accepts. Automaton has 183 states and 192 transitions. Word has length 38 [2018-04-10 16:17:41,982 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 16:17:41,982 INFO L459 AbstractCegarLoop]: Abstraction has 183 states and 192 transitions. [2018-04-10 16:17:41,982 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-04-10 16:17:41,983 INFO L276 IsEmpty]: Start isEmpty. Operand 183 states and 192 transitions. [2018-04-10 16:17:41,983 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-04-10 16:17:41,983 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 16:17:41,983 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 16:17:41,984 INFO L408 AbstractCegarLoop]: === Iteration 16 === [mainErr51RequiresViolation, mainErr26RequiresViolation, mainErr54RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr66EnsuresViolationMEMORY_LEAK, mainErr31RequiresViolation, mainErr46RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr58RequiresViolation, mainErr62RequiresViolation, mainErr15RequiresViolation, mainErr49RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr55RequiresViolation, mainErr17RequiresViolation, mainErr42RequiresViolation, mainErr30RequiresViolation, mainErr56AssertViolationMEMORY_FREE, mainErr11RequiresViolation, mainErr63RequiresViolation, mainErr61AssertViolationMEMORY_FREE, mainErr24RequiresViolation, mainErr44RequiresViolation, mainErr10RequiresViolation, mainErr43RequiresViolation, mainErr4RequiresViolation, mainErr50RequiresViolation, mainErr37RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr59RequiresViolation, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr21RequiresViolation, mainErr41RequiresViolation, mainErr48RequiresViolation, mainErr39RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr52RequiresViolation, mainErr45RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr64AssertViolationMEMORY_FREE, mainErr32RequiresViolation, mainErr57AssertViolationMEMORY_FREE, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr60AssertViolationMEMORY_FREE, mainErr9RequiresViolation, mainErr65AssertViolationMEMORY_FREE, mainErr53RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr8RequiresViolation, mainErr34RequiresViolation, mainErr47RequiresViolation, mainErr14RequiresViolation, mainErr40RequiresViolation]=== [2018-04-10 16:17:41,984 INFO L82 PathProgramCache]: Analyzing trace with hash 90417614, now seen corresponding path program 1 times [2018-04-10 16:17:41,984 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-10 16:17:41,984 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-10 16:17:41,985 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 16:17:41,985 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 16:17:41,985 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 16:17:41,994 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 16:17:41,995 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 16:17:41,998 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-10 16:17:41,998 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-10 16:17:41,998 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-10 16:17:41,999 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 16:17:42,034 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 16:17:42,036 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-10 16:17:42,071 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 16:17:42,072 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 16:17:42,073 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 24 [2018-04-10 16:17:42,073 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-10 16:17:42,077 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 16:17:42,077 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:17, output treesize:15 [2018-04-10 16:17:42,086 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-04-10 16:17:42,088 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-10 16:17:42,088 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-10 16:17:42,090 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 16:17:42,095 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-10 16:17:42,095 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:26, output treesize:23 [2018-04-10 16:17:42,117 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 35 [2018-04-10 16:17:42,120 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 13 [2018-04-10 16:17:42,120 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-10 16:17:42,126 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 16:17:42,132 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-10 16:17:42,133 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:44, output treesize:36 [2018-04-10 16:17:42,156 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 26 [2018-04-10 16:17:42,158 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 1 [2018-04-10 16:17:42,159 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-10 16:17:42,164 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 10 [2018-04-10 16:17:42,165 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-10 16:17:42,169 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 16:17:42,173 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-10 16:17:42,174 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 4 variables, input treesize:43, output treesize:15 [2018-04-10 16:17:42,196 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 16:17:42,196 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-10 16:17:42,196 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-04-10 16:17:42,197 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-04-10 16:17:42,197 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-04-10 16:17:42,197 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=26, Invalid=46, Unknown=0, NotChecked=0, Total=72 [2018-04-10 16:17:42,197 INFO L87 Difference]: Start difference. First operand 183 states and 192 transitions. Second operand 9 states. [2018-04-10 16:17:42,527 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 16:17:42,527 INFO L93 Difference]: Finished difference Result 183 states and 192 transitions. [2018-04-10 16:17:42,527 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-04-10 16:17:42,527 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 38 [2018-04-10 16:17:42,527 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 16:17:42,528 INFO L225 Difference]: With dead ends: 183 [2018-04-10 16:17:42,528 INFO L226 Difference]: Without dead ends: 183 [2018-04-10 16:17:42,528 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 42 GetRequests, 30 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=69, Invalid=113, Unknown=0, NotChecked=0, Total=182 [2018-04-10 16:17:42,528 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 183 states. [2018-04-10 16:17:42,530 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 183 to 182. [2018-04-10 16:17:42,531 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 182 states. [2018-04-10 16:17:42,531 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 182 states to 182 states and 191 transitions. [2018-04-10 16:17:42,531 INFO L78 Accepts]: Start accepts. Automaton has 182 states and 191 transitions. Word has length 38 [2018-04-10 16:17:42,531 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 16:17:42,531 INFO L459 AbstractCegarLoop]: Abstraction has 182 states and 191 transitions. [2018-04-10 16:17:42,532 INFO L460 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-04-10 16:17:42,532 INFO L276 IsEmpty]: Start isEmpty. Operand 182 states and 191 transitions. [2018-04-10 16:17:42,532 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-04-10 16:17:42,532 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 16:17:42,532 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 16:17:42,532 INFO L408 AbstractCegarLoop]: === Iteration 17 === [mainErr51RequiresViolation, mainErr26RequiresViolation, mainErr54RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr66EnsuresViolationMEMORY_LEAK, mainErr31RequiresViolation, mainErr46RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr58RequiresViolation, mainErr62RequiresViolation, mainErr15RequiresViolation, mainErr49RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr55RequiresViolation, mainErr17RequiresViolation, mainErr42RequiresViolation, mainErr30RequiresViolation, mainErr56AssertViolationMEMORY_FREE, mainErr11RequiresViolation, mainErr63RequiresViolation, mainErr61AssertViolationMEMORY_FREE, mainErr24RequiresViolation, mainErr44RequiresViolation, mainErr10RequiresViolation, mainErr43RequiresViolation, mainErr4RequiresViolation, mainErr50RequiresViolation, mainErr37RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr59RequiresViolation, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr21RequiresViolation, mainErr41RequiresViolation, mainErr48RequiresViolation, mainErr39RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr52RequiresViolation, mainErr45RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr64AssertViolationMEMORY_FREE, mainErr32RequiresViolation, mainErr57AssertViolationMEMORY_FREE, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr60AssertViolationMEMORY_FREE, mainErr9RequiresViolation, mainErr65AssertViolationMEMORY_FREE, mainErr53RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr8RequiresViolation, mainErr34RequiresViolation, mainErr47RequiresViolation, mainErr14RequiresViolation, mainErr40RequiresViolation]=== [2018-04-10 16:17:42,532 INFO L82 PathProgramCache]: Analyzing trace with hash 90417615, now seen corresponding path program 1 times [2018-04-10 16:17:42,532 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-10 16:17:42,533 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-10 16:17:42,533 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 16:17:42,533 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 16:17:42,533 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 16:17:42,542 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 16:17:42,543 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 16:17:42,548 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-10 16:17:42,548 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-10 16:17:42,548 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-10 16:17:42,549 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 16:17:42,592 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 16:17:42,595 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-10 16:17:42,605 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-10 16:17:42,605 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-10 16:17:42,613 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 16:17:42,615 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 16:17:42,615 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21 [2018-04-10 16:17:42,616 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-10 16:17:42,625 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 16:17:42,625 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:26, output treesize:23 [2018-04-10 16:17:42,636 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-04-10 16:17:42,637 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-10 16:17:42,646 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-04-10 16:17:42,649 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-10 16:17:42,649 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-10 16:17:42,651 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 16:17:42,657 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-04-10 16:17:42,659 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-10 16:17:42,659 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-04-10 16:17:42,660 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 16:17:42,668 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-10 16:17:42,668 INFO L202 ElimStorePlain]: Needed 6 recursive calls to eliminate 4 variables, input treesize:42, output treesize:25 [2018-04-10 16:17:42,685 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 60 treesize of output 56 [2018-04-10 16:17:42,687 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 13 [2018-04-10 16:17:42,688 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-10 16:17:42,693 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 16:17:42,702 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 30 [2018-04-10 16:17:42,709 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 13 [2018-04-10 16:17:42,709 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-10 16:17:42,713 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 16:17:42,719 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-10 16:17:42,719 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:67, output treesize:51 [2018-04-10 16:17:42,732 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 37 [2018-04-10 16:17:42,735 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 19 [2018-04-10 16:17:42,735 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-10 16:17:42,741 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 1 [2018-04-10 16:17:42,741 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-10 16:17:42,744 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 16:17:42,751 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 22 [2018-04-10 16:17:42,753 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2018-04-10 16:17:42,753 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-04-10 16:17:42,757 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 1 [2018-04-10 16:17:42,757 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-04-10 16:17:42,758 INFO L267 ElimStorePlain]: Start of recursive call 5: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 16:17:42,761 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-10 16:17:42,761 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 5 variables, input treesize:65, output treesize:9 [2018-04-10 16:17:42,774 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 16:17:42,775 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-10 16:17:42,775 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-04-10 16:17:42,775 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-04-10 16:17:42,775 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-04-10 16:17:42,775 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=54, Unknown=0, NotChecked=0, Total=72 [2018-04-10 16:17:42,775 INFO L87 Difference]: Start difference. First operand 182 states and 191 transitions. Second operand 9 states. [2018-04-10 16:17:43,123 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 16:17:43,123 INFO L93 Difference]: Finished difference Result 177 states and 186 transitions. [2018-04-10 16:17:43,123 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-04-10 16:17:43,123 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 38 [2018-04-10 16:17:43,124 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 16:17:43,124 INFO L225 Difference]: With dead ends: 177 [2018-04-10 16:17:43,124 INFO L226 Difference]: Without dead ends: 177 [2018-04-10 16:17:43,124 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 44 GetRequests, 31 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=60, Invalid=150, Unknown=0, NotChecked=0, Total=210 [2018-04-10 16:17:43,124 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 177 states. [2018-04-10 16:17:43,126 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 177 to 155. [2018-04-10 16:17:43,126 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 155 states. [2018-04-10 16:17:43,126 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 155 states to 155 states and 163 transitions. [2018-04-10 16:17:43,126 INFO L78 Accepts]: Start accepts. Automaton has 155 states and 163 transitions. Word has length 38 [2018-04-10 16:17:43,126 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 16:17:43,126 INFO L459 AbstractCegarLoop]: Abstraction has 155 states and 163 transitions. [2018-04-10 16:17:43,126 INFO L460 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-04-10 16:17:43,126 INFO L276 IsEmpty]: Start isEmpty. Operand 155 states and 163 transitions. [2018-04-10 16:17:43,127 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2018-04-10 16:17:43,127 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 16:17:43,127 INFO L355 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 16:17:43,127 INFO L408 AbstractCegarLoop]: === Iteration 18 === [mainErr51RequiresViolation, mainErr26RequiresViolation, mainErr54RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr66EnsuresViolationMEMORY_LEAK, mainErr31RequiresViolation, mainErr46RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr58RequiresViolation, mainErr62RequiresViolation, mainErr15RequiresViolation, mainErr49RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr55RequiresViolation, mainErr17RequiresViolation, mainErr42RequiresViolation, mainErr30RequiresViolation, mainErr56AssertViolationMEMORY_FREE, mainErr11RequiresViolation, mainErr63RequiresViolation, mainErr61AssertViolationMEMORY_FREE, mainErr24RequiresViolation, mainErr44RequiresViolation, mainErr10RequiresViolation, mainErr43RequiresViolation, mainErr4RequiresViolation, mainErr50RequiresViolation, mainErr37RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr59RequiresViolation, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr21RequiresViolation, mainErr41RequiresViolation, mainErr48RequiresViolation, mainErr39RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr52RequiresViolation, mainErr45RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr64AssertViolationMEMORY_FREE, mainErr32RequiresViolation, mainErr57AssertViolationMEMORY_FREE, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr60AssertViolationMEMORY_FREE, mainErr9RequiresViolation, mainErr65AssertViolationMEMORY_FREE, mainErr53RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr8RequiresViolation, mainErr34RequiresViolation, mainErr47RequiresViolation, mainErr14RequiresViolation, mainErr40RequiresViolation]=== [2018-04-10 16:17:43,127 INFO L82 PathProgramCache]: Analyzing trace with hash 246329433, now seen corresponding path program 1 times [2018-04-10 16:17:43,127 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-10 16:17:43,127 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-10 16:17:43,128 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 16:17:43,128 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 16:17:43,128 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 16:17:43,132 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 16:17:43,133 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 16:17:43,165 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-04-10 16:17:43,165 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-10 16:17:43,165 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-04-10 16:17:43,165 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-04-10 16:17:43,166 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-04-10 16:17:43,166 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2018-04-10 16:17:43,166 INFO L87 Difference]: Start difference. First operand 155 states and 163 transitions. Second operand 8 states. [2018-04-10 16:17:43,337 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 16:17:43,337 INFO L93 Difference]: Finished difference Result 165 states and 172 transitions. [2018-04-10 16:17:43,337 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-04-10 16:17:43,337 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 39 [2018-04-10 16:17:43,337 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 16:17:43,338 INFO L225 Difference]: With dead ends: 165 [2018-04-10 16:17:43,338 INFO L226 Difference]: Without dead ends: 165 [2018-04-10 16:17:43,338 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=64, Invalid=118, Unknown=0, NotChecked=0, Total=182 [2018-04-10 16:17:43,338 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 165 states. [2018-04-10 16:17:43,339 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 165 to 155. [2018-04-10 16:17:43,339 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 155 states. [2018-04-10 16:17:43,340 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 155 states to 155 states and 162 transitions. [2018-04-10 16:17:43,340 INFO L78 Accepts]: Start accepts. Automaton has 155 states and 162 transitions. Word has length 39 [2018-04-10 16:17:43,340 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 16:17:43,340 INFO L459 AbstractCegarLoop]: Abstraction has 155 states and 162 transitions. [2018-04-10 16:17:43,340 INFO L460 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-04-10 16:17:43,340 INFO L276 IsEmpty]: Start isEmpty. Operand 155 states and 162 transitions. [2018-04-10 16:17:43,340 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2018-04-10 16:17:43,340 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 16:17:43,341 INFO L355 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 16:17:43,341 INFO L408 AbstractCegarLoop]: === Iteration 19 === [mainErr51RequiresViolation, mainErr26RequiresViolation, mainErr54RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr66EnsuresViolationMEMORY_LEAK, mainErr31RequiresViolation, mainErr46RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr58RequiresViolation, mainErr62RequiresViolation, mainErr15RequiresViolation, mainErr49RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr55RequiresViolation, mainErr17RequiresViolation, mainErr42RequiresViolation, mainErr30RequiresViolation, mainErr56AssertViolationMEMORY_FREE, mainErr11RequiresViolation, mainErr63RequiresViolation, mainErr61AssertViolationMEMORY_FREE, mainErr24RequiresViolation, mainErr44RequiresViolation, mainErr10RequiresViolation, mainErr43RequiresViolation, mainErr4RequiresViolation, mainErr50RequiresViolation, mainErr37RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr59RequiresViolation, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr21RequiresViolation, mainErr41RequiresViolation, mainErr48RequiresViolation, mainErr39RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr52RequiresViolation, mainErr45RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr64AssertViolationMEMORY_FREE, mainErr32RequiresViolation, mainErr57AssertViolationMEMORY_FREE, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr60AssertViolationMEMORY_FREE, mainErr9RequiresViolation, mainErr65AssertViolationMEMORY_FREE, mainErr53RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr8RequiresViolation, mainErr34RequiresViolation, mainErr47RequiresViolation, mainErr14RequiresViolation, mainErr40RequiresViolation]=== [2018-04-10 16:17:43,341 INFO L82 PathProgramCache]: Analyzing trace with hash -1551243035, now seen corresponding path program 1 times [2018-04-10 16:17:43,341 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-10 16:17:43,341 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-10 16:17:43,341 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 16:17:43,342 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 16:17:43,342 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 16:17:43,345 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 16:17:43,346 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 16:17:43,396 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 16:17:43,397 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-10 16:17:43,397 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-10 16:17:43,398 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 16:17:43,410 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 16:17:43,414 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-10 16:17:43,425 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-04-10 16:17:43,427 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-04-10 16:17:43,427 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-10 16:17:43,428 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 16:17:43,430 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-10 16:17:43,430 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:13, output treesize:9 [2018-04-10 16:17:43,436 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 15 [2018-04-10 16:17:43,438 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 3 [2018-04-10 16:17:43,438 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-10 16:17:43,443 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 16:17:43,444 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-10 16:17:43,444 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:19, output treesize:3 [2018-04-10 16:17:43,454 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-04-10 16:17:43,455 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-04-10 16:17:43,455 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [8] total 9 [2018-04-10 16:17:43,455 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-04-10 16:17:43,455 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-04-10 16:17:43,456 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=53, Unknown=0, NotChecked=0, Total=72 [2018-04-10 16:17:43,456 INFO L87 Difference]: Start difference. First operand 155 states and 162 transitions. Second operand 9 states. [2018-04-10 16:17:43,703 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 16:17:43,703 INFO L93 Difference]: Finished difference Result 243 states and 254 transitions. [2018-04-10 16:17:43,703 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-04-10 16:17:43,703 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 45 [2018-04-10 16:17:43,703 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 16:17:43,704 INFO L225 Difference]: With dead ends: 243 [2018-04-10 16:17:43,704 INFO L226 Difference]: Without dead ends: 243 [2018-04-10 16:17:43,705 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 59 GetRequests, 43 SyntacticMatches, 2 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 39 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=61, Invalid=179, Unknown=0, NotChecked=0, Total=240 [2018-04-10 16:17:43,705 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 243 states. [2018-04-10 16:17:43,707 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 243 to 152. [2018-04-10 16:17:43,707 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 152 states. [2018-04-10 16:17:43,708 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 152 states to 152 states and 158 transitions. [2018-04-10 16:17:43,708 INFO L78 Accepts]: Start accepts. Automaton has 152 states and 158 transitions. Word has length 45 [2018-04-10 16:17:43,708 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 16:17:43,708 INFO L459 AbstractCegarLoop]: Abstraction has 152 states and 158 transitions. [2018-04-10 16:17:43,708 INFO L460 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-04-10 16:17:43,708 INFO L276 IsEmpty]: Start isEmpty. Operand 152 states and 158 transitions. [2018-04-10 16:17:43,709 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2018-04-10 16:17:43,709 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 16:17:43,709 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 16:17:43,709 INFO L408 AbstractCegarLoop]: === Iteration 20 === [mainErr51RequiresViolation, mainErr26RequiresViolation, mainErr54RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr66EnsuresViolationMEMORY_LEAK, mainErr31RequiresViolation, mainErr46RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr58RequiresViolation, mainErr62RequiresViolation, mainErr15RequiresViolation, mainErr49RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr55RequiresViolation, mainErr17RequiresViolation, mainErr42RequiresViolation, mainErr30RequiresViolation, mainErr56AssertViolationMEMORY_FREE, mainErr11RequiresViolation, mainErr63RequiresViolation, mainErr61AssertViolationMEMORY_FREE, mainErr24RequiresViolation, mainErr44RequiresViolation, mainErr10RequiresViolation, mainErr43RequiresViolation, mainErr4RequiresViolation, mainErr50RequiresViolation, mainErr37RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr59RequiresViolation, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr21RequiresViolation, mainErr41RequiresViolation, mainErr48RequiresViolation, mainErr39RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr52RequiresViolation, mainErr45RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr64AssertViolationMEMORY_FREE, mainErr32RequiresViolation, mainErr57AssertViolationMEMORY_FREE, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr60AssertViolationMEMORY_FREE, mainErr9RequiresViolation, mainErr65AssertViolationMEMORY_FREE, mainErr53RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr8RequiresViolation, mainErr34RequiresViolation, mainErr47RequiresViolation, mainErr14RequiresViolation, mainErr40RequiresViolation]=== [2018-04-10 16:17:43,709 INFO L82 PathProgramCache]: Analyzing trace with hash 1000742218, now seen corresponding path program 1 times [2018-04-10 16:17:43,709 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-10 16:17:43,709 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-10 16:17:43,710 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 16:17:43,710 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 16:17:43,710 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 16:17:43,717 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 16:17:43,718 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-10 16:17:43,791 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 1 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 16:17:43,791 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-10 16:17:43,791 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-10 16:17:43,792 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 16:17:43,799 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 16:17:43,800 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-10 16:17:43,815 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-04-10 16:17:43,818 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-10 16:17:43,818 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-10 16:17:43,820 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 16:17:43,826 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-04-10 16:17:43,828 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-10 16:17:43,828 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-10 16:17:43,830 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 16:17:43,833 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-10 16:17:43,834 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:23, output treesize:15 [2018-04-10 16:17:43,844 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 16 [2018-04-10 16:17:43,847 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 16:17:43,848 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 23 [2018-04-10 16:17:43,848 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-10 16:17:43,854 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 16:17:43,861 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 16 [2018-04-10 16:17:43,863 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 16:17:43,864 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 23 [2018-04-10 16:17:43,864 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-10 16:17:43,867 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 16:17:43,871 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-10 16:17:43,872 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:41, output treesize:33 [2018-04-10 16:17:43,886 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 18 [2018-04-10 16:17:43,888 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 16:17:43,889 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 10 [2018-04-10 16:17:43,889 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-10 16:17:43,891 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 16:17:43,897 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 18 [2018-04-10 16:17:43,898 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 16:17:43,899 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 10 [2018-04-10 16:17:43,899 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-10 16:17:43,901 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 16:17:43,903 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-10 16:17:43,904 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:47, output treesize:7 [2018-04-10 16:17:43,946 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 1 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-04-10 16:17:43,946 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-10 16:17:43,946 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 7] total 10 [2018-04-10 16:17:43,947 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-04-10 16:17:43,947 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-04-10 16:17:43,947 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=72, Unknown=0, NotChecked=0, Total=90 [2018-04-10 16:17:43,947 INFO L87 Difference]: Start difference. First operand 152 states and 158 transitions. Second operand 10 states. [2018-04-10 16:17:44,353 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 16:17:44,353 INFO L93 Difference]: Finished difference Result 202 states and 211 transitions. [2018-04-10 16:17:44,353 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-04-10 16:17:44,353 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 48 [2018-04-10 16:17:44,353 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 16:17:44,354 INFO L225 Difference]: With dead ends: 202 [2018-04-10 16:17:44,354 INFO L226 Difference]: Without dead ends: 202 [2018-04-10 16:17:44,354 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 65 GetRequests, 45 SyntacticMatches, 4 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 31 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=69, Invalid=237, Unknown=0, NotChecked=0, Total=306 [2018-04-10 16:17:44,354 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 202 states. [2018-04-10 16:17:44,355 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 202 to 167. [2018-04-10 16:17:44,355 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 167 states. [2018-04-10 16:17:44,356 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 167 states to 167 states and 174 transitions. [2018-04-10 16:17:44,356 INFO L78 Accepts]: Start accepts. Automaton has 167 states and 174 transitions. Word has length 48 [2018-04-10 16:17:44,356 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 16:17:44,356 INFO L459 AbstractCegarLoop]: Abstraction has 167 states and 174 transitions. [2018-04-10 16:17:44,356 INFO L460 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-04-10 16:17:44,356 INFO L276 IsEmpty]: Start isEmpty. Operand 167 states and 174 transitions. [2018-04-10 16:17:44,356 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2018-04-10 16:17:44,356 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 16:17:44,356 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 16:17:44,356 INFO L408 AbstractCegarLoop]: === Iteration 21 === [mainErr51RequiresViolation, mainErr26RequiresViolation, mainErr54RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr66EnsuresViolationMEMORY_LEAK, mainErr31RequiresViolation, mainErr46RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr58RequiresViolation, mainErr62RequiresViolation, mainErr15RequiresViolation, mainErr49RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr55RequiresViolation, mainErr17RequiresViolation, mainErr42RequiresViolation, mainErr30RequiresViolation, mainErr56AssertViolationMEMORY_FREE, mainErr11RequiresViolation, mainErr63RequiresViolation, mainErr61AssertViolationMEMORY_FREE, mainErr24RequiresViolation, mainErr44RequiresViolation, mainErr10RequiresViolation, mainErr43RequiresViolation, mainErr4RequiresViolation, mainErr50RequiresViolation, mainErr37RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr59RequiresViolation, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr21RequiresViolation, mainErr41RequiresViolation, mainErr48RequiresViolation, mainErr39RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr52RequiresViolation, mainErr45RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr64AssertViolationMEMORY_FREE, mainErr32RequiresViolation, mainErr57AssertViolationMEMORY_FREE, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr60AssertViolationMEMORY_FREE, mainErr9RequiresViolation, mainErr65AssertViolationMEMORY_FREE, mainErr53RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr8RequiresViolation, mainErr34RequiresViolation, mainErr47RequiresViolation, mainErr14RequiresViolation, mainErr40RequiresViolation]=== [2018-04-10 16:17:44,357 INFO L82 PathProgramCache]: Analyzing trace with hash 958237278, now seen corresponding path program 1 times [2018-04-10 16:17:44,357 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-10 16:17:44,357 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-10 16:17:44,357 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 16:17:44,357 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-10 16:17:44,357 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-10 16:17:44,361 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-04-10 16:17:44,366 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-04-10 16:17:44,378 INFO L421 BasicCegarLoop]: Counterexample might be feasible [2018-04-10 16:17:44,390 WARN L343 cessorBacktranslator]: Generated EnsuresSpecification ensures #valid == old(#valid); is not ensure(true) [2018-04-10 16:17:44,405 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 10.04 04:17:44 BoogieIcfgContainer [2018-04-10 16:17:44,405 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-04-10 16:17:44,406 INFO L168 Benchmark]: Toolchain (without parser) took 8576.66 ms. Allocated memory was 405.3 MB in the beginning and 786.4 MB in the end (delta: 381.2 MB). Free memory was 339.2 MB in the beginning and 722.0 MB in the end (delta: -382.8 MB). There was no memory consumed. Max. memory is 5.3 GB. [2018-04-10 16:17:44,407 INFO L168 Benchmark]: CDTParser took 0.13 ms. Allocated memory is still 405.3 MB. Free memory is still 365.7 MB. There was no memory consumed. Max. memory is 5.3 GB. [2018-04-10 16:17:44,407 INFO L168 Benchmark]: CACSL2BoogieTranslator took 270.21 ms. Allocated memory is still 405.3 MB. Free memory was 339.2 MB in the beginning and 311.4 MB in the end (delta: 27.8 MB). Peak memory consumption was 27.8 MB. Max. memory is 5.3 GB. [2018-04-10 16:17:44,407 INFO L168 Benchmark]: Boogie Preprocessor took 47.50 ms. Allocated memory is still 405.3 MB. Free memory was 311.4 MB in the beginning and 308.7 MB in the end (delta: 2.6 MB). Peak memory consumption was 2.6 MB. Max. memory is 5.3 GB. [2018-04-10 16:17:44,407 INFO L168 Benchmark]: RCFGBuilder took 536.24 ms. Allocated memory was 405.3 MB in the beginning and 616.0 MB in the end (delta: 210.8 MB). Free memory was 308.7 MB in the beginning and 528.5 MB in the end (delta: -219.7 MB). Peak memory consumption was 24.4 MB. Max. memory is 5.3 GB. [2018-04-10 16:17:44,408 INFO L168 Benchmark]: TraceAbstraction took 7719.72 ms. Allocated memory was 616.0 MB in the beginning and 786.4 MB in the end (delta: 170.4 MB). Free memory was 528.5 MB in the beginning and 722.0 MB in the end (delta: -193.5 MB). There was no memory consumed. Max. memory is 5.3 GB. [2018-04-10 16:17:44,409 INFO L344 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.13 ms. Allocated memory is still 405.3 MB. Free memory is still 365.7 MB. There was no memory consumed. Max. memory is 5.3 GB. * CACSL2BoogieTranslator took 270.21 ms. Allocated memory is still 405.3 MB. Free memory was 339.2 MB in the beginning and 311.4 MB in the end (delta: 27.8 MB). Peak memory consumption was 27.8 MB. Max. memory is 5.3 GB. * Boogie Preprocessor took 47.50 ms. Allocated memory is still 405.3 MB. Free memory was 311.4 MB in the beginning and 308.7 MB in the end (delta: 2.6 MB). Peak memory consumption was 2.6 MB. Max. memory is 5.3 GB. * RCFGBuilder took 536.24 ms. Allocated memory was 405.3 MB in the beginning and 616.0 MB in the end (delta: 210.8 MB). Free memory was 308.7 MB in the beginning and 528.5 MB in the end (delta: -219.7 MB). Peak memory consumption was 24.4 MB. Max. memory is 5.3 GB. * TraceAbstraction took 7719.72 ms. Allocated memory was 616.0 MB in the beginning and 786.4 MB in the end (delta: 170.4 MB). Free memory was 528.5 MB in the beginning and 722.0 MB in the end (delta: -193.5 MB). There was no memory consumed. Max. memory is 5.3 GB. * Results from de.uni_freiburg.informatik.ultimate.boogie.preprocessor: - GenericResult: Unfinished Backtranslation Generated EnsuresSpecification ensures #valid == old(#valid); is not ensure(true) * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 985]: not all allocated memory was freed not all allocated memory was freed We found a FailurePath: [L987] EXPR, FCALL malloc(sizeof(struct TSLL)) VAL [malloc(sizeof(struct TSLL))={14:0}] [L987] struct TSLL* null = malloc(sizeof(struct TSLL)); VAL [malloc(sizeof(struct TSLL))={14:0}, null={14:0}] [L988] FCALL null->next = ((void*)0) VAL [malloc(sizeof(struct TSLL))={14:0}, null={14:0}] [L989] FCALL null->prev = ((void*)0) VAL [malloc(sizeof(struct TSLL))={14:0}, null={14:0}] [L990] FCALL null->colour = BLACK VAL [malloc(sizeof(struct TSLL))={14:0}, null={14:0}] [L992] EXPR, FCALL malloc(sizeof(struct TSLL)) VAL [malloc(sizeof(struct TSLL))={14:0}, malloc(sizeof(struct TSLL))={15:0}, null={14:0}] [L992] struct TSLL* list = malloc(sizeof(struct TSLL)); VAL [list={15:0}, malloc(sizeof(struct TSLL))={14:0}, malloc(sizeof(struct TSLL))={15:0}, null={14:0}] [L993] FCALL list->next = null VAL [list={15:0}, malloc(sizeof(struct TSLL))={15:0}, malloc(sizeof(struct TSLL))={14:0}, null={14:0}] [L994] FCALL list->prev = null VAL [list={15:0}, malloc(sizeof(struct TSLL))={15:0}, malloc(sizeof(struct TSLL))={14:0}, null={14:0}] [L995] FCALL list->colour = BLACK VAL [list={15:0}, malloc(sizeof(struct TSLL))={15:0}, malloc(sizeof(struct TSLL))={14:0}, null={14:0}] [L997] struct TSLL* end = list; VAL [end={15:0}, list={15:0}, malloc(sizeof(struct TSLL))={14:0}, malloc(sizeof(struct TSLL))={15:0}, null={14:0}] [L1000] COND FALSE !(__VERIFIER_nondet_int()) [L1026] end = null [L1027] end = list VAL [end={15:0}, list={15:0}, malloc(sizeof(struct TSLL))={14:0}, malloc(sizeof(struct TSLL))={15:0}, null={14:0}] [L1030] COND FALSE !(!(null != end)) VAL [end={15:0}, list={15:0}, malloc(sizeof(struct TSLL))={15:0}, malloc(sizeof(struct TSLL))={14:0}, null={14:0}] [L1030] COND FALSE !(0) VAL [end={15:0}, list={15:0}, malloc(sizeof(struct TSLL))={14:0}, malloc(sizeof(struct TSLL))={15:0}, null={14:0}] [L1031] EXPR, FCALL end->colour VAL [end={15:0}, end->colour=1, list={15:0}, malloc(sizeof(struct TSLL))={15:0}, malloc(sizeof(struct TSLL))={14:0}, null={14:0}] [L1031] COND FALSE !(!(BLACK == end->colour)) [L1031] COND FALSE !(0) VAL [end={15:0}, list={15:0}, malloc(sizeof(struct TSLL))={14:0}, malloc(sizeof(struct TSLL))={15:0}, null={14:0}] [L1032] COND TRUE null != end VAL [end={15:0}, list={15:0}, malloc(sizeof(struct TSLL))={14:0}, malloc(sizeof(struct TSLL))={15:0}, null={14:0}] [L1034] EXPR, FCALL end->colour VAL [end={15:0}, end->colour=1, list={15:0}, malloc(sizeof(struct TSLL))={14:0}, malloc(sizeof(struct TSLL))={15:0}, null={14:0}] [L1034] COND FALSE !(RED == end->colour) [L1041] EXPR, FCALL end->next VAL [end={15:0}, end->next={14:0}, list={15:0}, malloc(sizeof(struct TSLL))={15:0}, malloc(sizeof(struct TSLL))={14:0}, null={14:0}] [L1041] end = end->next [L1032] COND FALSE !(null != end) VAL [end={14:0}, list={15:0}, malloc(sizeof(struct TSLL))={14:0}, malloc(sizeof(struct TSLL))={15:0}, null={14:0}] [L1045] COND TRUE null != list VAL [end={14:0}, list={15:0}, malloc(sizeof(struct TSLL))={15:0}, malloc(sizeof(struct TSLL))={14:0}, null={14:0}] [L1047] EXPR, FCALL list->colour VAL [end={14:0}, list={15:0}, list->colour=1, malloc(sizeof(struct TSLL))={15:0}, malloc(sizeof(struct TSLL))={14:0}, null={14:0}] [L1047] COND FALSE !(RED == list->colour) [L1056] EXPR, FCALL list->next VAL [end={14:0}, list={15:0}, list->next={14:0}, malloc(sizeof(struct TSLL))={15:0}, malloc(sizeof(struct TSLL))={14:0}, null={14:0}] [L1056] end = list->next [L1057] free(list) VAL [end={14:0}, list={15:0}, malloc(sizeof(struct TSLL))={15:0}, malloc(sizeof(struct TSLL))={14:0}, null={14:0}] [L1057] free(list) VAL [end={14:0}, list={15:0}, malloc(sizeof(struct TSLL))={15:0}, malloc(sizeof(struct TSLL))={14:0}, null={14:0}] [L1057] FCALL free(list) VAL [end={14:0}, list={15:0}, malloc(sizeof(struct TSLL))={15:0}, malloc(sizeof(struct TSLL))={14:0}, null={14:0}] [L1058] list = end VAL [end={14:0}, list={14:0}, malloc(sizeof(struct TSLL))={14:0}, malloc(sizeof(struct TSLL))={15:0}, null={14:0}] [L1045] COND FALSE !(null != list) VAL [end={14:0}, list={14:0}, malloc(sizeof(struct TSLL))={15:0}, malloc(sizeof(struct TSLL))={14:0}, null={14:0}] [L1062] return 0; VAL [\result=0, end={14:0}, list={14:0}, malloc(sizeof(struct TSLL))={14:0}, malloc(sizeof(struct TSLL))={15:0}, null={14:0}] - StatisticsResult: Ultimate Automizer benchmark data CFG has 3 procedures, 166 locations, 67 error locations. UNSAFE Result, 7.6s OverallTime, 21 OverallIterations, 2 TraceHistogramMax, 5.0s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 2123 SDtfs, 5386 SDslu, 4430 SDs, 0 SdLazy, 5361 SolverSat, 282 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 3.0s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 456 GetRequests, 254 SyntacticMatches, 9 SemanticMatches, 193 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 280 ImplicationChecksByTransitivity, 1.9s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=184occurred in iteration=14, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.0s AutomataMinimizationTime, 20 MinimizatonAttempts, 694 StatesRemovedByMinimization, 19 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.0s SsaConstructionTime, 0.3s SatisfiabilityAnalysisTime, 1.8s InterpolantComputationTime, 917 NumberOfCodeBlocks, 917 NumberOfCodeBlocksAsserted, 30 NumberOfCheckSat, 638 ConstructedInterpolants, 23 QuantifiedInterpolants, 156736 SizeOfPredicates, 68 NumberOfNonLiveVariables, 1334 ConjunctsInSsa, 144 ConjunctsInUnsatCore, 22 InterpolantComputations, 18 PerfectInterpolantSequences, 9/19 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Written .csv to /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i_svcomp-DerefFreeMemtrack-32bit-Automizer_SmtInterpol_NoArray.epf_AutomizerC.xml/Csv-Benchmark-0-2018-04-10_16-17-44-414.csv Written .csv to /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/dll-rb-sentinel_false-unreach-call_false-valid-memtrack.i_svcomp-DerefFreeMemtrack-32bit-Automizer_SmtInterpol_NoArray.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-0-2018-04-10_16-17-44-414.csv Received shutdown request...