java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv --cacsl2boogietranslator.bitprecise.bitfields false -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/cade18-smtinterpol/svcomp-DerefFreeMemtrack-32bit-Automizer_SmtInterpol_NoArray.epf -i ../../../trunk/examples/svcomp/array-memsafety/diff-alloca_true-valid-memsafety_true-termination.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-666feb3-m [2018-04-12 06:12:59,224 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-04-12 06:12:59,225 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-04-12 06:12:59,239 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... 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[2018-04-12 06:12:59,245 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-04-12 06:12:59,245 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-04-12 06:12:59,247 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-04-12 06:12:59,247 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-04-12 06:12:59,249 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-04-12 06:12:59,251 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-04-12 06:12:59,252 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-04-12 06:12:59,253 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-04-12 06:12:59,254 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-04-12 06:12:59,256 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2018-04-12 06:12:59,261 INFO L98 SettingsManager]: Beginning loading settings from /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/cade18-smtinterpol/svcomp-DerefFreeMemtrack-32bit-Automizer_SmtInterpol_NoArray.epf [2018-04-12 06:12:59,283 INFO L110 SettingsManager]: Loading preferences was successful [2018-04-12 06:12:59,283 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-04-12 06:12:59,285 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-04-12 06:12:59,285 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-04-12 06:12:59,285 INFO L133 SettingsManager]: * Use SBE=true [2018-04-12 06:12:59,285 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-04-12 06:12:59,285 INFO L133 SettingsManager]: * sizeof long=4 [2018-04-12 06:12:59,285 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-04-12 06:12:59,285 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-04-12 06:12:59,285 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-04-12 06:12:59,285 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-04-12 06:12:59,286 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-04-12 06:12:59,286 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-04-12 06:12:59,286 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-04-12 06:12:59,286 INFO L133 SettingsManager]: * sizeof long double=12 [2018-04-12 06:12:59,286 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-04-12 06:12:59,286 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-04-12 06:12:59,286 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-04-12 06:12:59,286 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-04-12 06:12:59,287 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-04-12 06:12:59,287 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-04-12 06:12:59,287 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-04-12 06:12:59,287 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-04-12 06:12:59,287 INFO L133 SettingsManager]: * Trace refinement strategy=SMTINTERPOL Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Bitprecise bitfields -> false [2018-04-12 06:12:59,314 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-04-12 06:12:59,324 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully (re)initialized [2018-04-12 06:12:59,328 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-04-12 06:12:59,329 INFO L271 PluginConnector]: Initializing CDTParser... [2018-04-12 06:12:59,329 INFO L276 PluginConnector]: CDTParser initialized [2018-04-12 06:12:59,330 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/array-memsafety/diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 06:12:59,613 INFO L225 CDTParser]: Created temporary CDT project at /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/data/FLAG4ddd6eda4 [2018-04-12 06:12:59,762 INFO L287 CDTParser]: IsIndexed: true [2018-04-12 06:12:59,763 INFO L288 CDTParser]: Found 1 translation units. [2018-04-12 06:12:59,763 INFO L168 CDTParser]: Scanning diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 06:12:59,770 INFO L210 ultiparseSymbolTable]: Include resolver: [2018-04-12 06:12:59,770 INFO L215 ultiparseSymbolTable]: [2018-04-12 06:12:59,770 INFO L218 ultiparseSymbolTable]: Function table: [2018-04-12 06:12:59,771 INFO L221 ultiparseSymbolTable]: Function definition of null ('main') in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 06:12:59,771 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i____bswap_32 ('__bswap_32') in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 06:12:59,771 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i____bswap_64 ('__bswap_64') in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 06:12:59,771 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diff ('diff') in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 06:12:59,771 INFO L227 ultiparseSymbolTable]: Global variable table: [2018-04-12 06:12:59,771 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i____fsfilcnt64_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 06:12:59,771 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__ino_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 06:12:59,771 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__int32_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 06:12:59,771 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__pid_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 06:12:59,771 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__u_int64_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 06:12:59,772 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i____ssize_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 06:12:59,772 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i____mode_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 06:12:59,772 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i____socklen_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 06:12:59,772 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i____nlink_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 06:12:59,772 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i____int8_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 06:12:59,772 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i____timer_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 06:12:59,772 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__size_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 06:12:59,772 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__off_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 06:12:59,772 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i____intptr_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 06:12:59,772 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__key_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 06:12:59,772 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i____fsword_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 06:12:59,772 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i____u_short in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 06:12:59,772 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i____uint64_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 06:12:59,772 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__caddr_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 06:12:59,773 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__timer_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 06:12:59,773 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__mode_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 06:12:59,773 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i____sig_atomic_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 06:12:59,773 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__u_short in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 06:12:59,773 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__nlink_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 06:12:59,773 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__gid_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 06:12:59,773 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__fsfilcnt_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 06:12:59,773 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i____blkcnt64_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 06:12:59,773 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i____uid_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 06:12:59,773 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__ssize_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 06:12:59,773 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__loff_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 06:12:59,773 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__id_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 06:12:59,773 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__uint in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 06:12:59,773 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__pthread_rwlock_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 06:12:59,773 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__pthread_condattr_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 06:12:59,774 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i____u_int in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 06:12:59,774 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i____useconds_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 06:12:59,774 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__fd_set in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 06:12:59,774 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i____qaddr_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 06:12:59,774 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i____dev_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 06:12:59,774 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i____rlim64_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 06:12:59,774 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i____fsblkcnt_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 06:12:59,774 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i____blksize_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 06:12:59,774 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__time_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 06:12:59,774 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__pthread_key_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 06:12:59,775 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__fsid_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 06:12:59,775 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__dev_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 06:12:59,775 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i____blkcnt_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 06:12:59,775 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i____clock_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 06:12:59,775 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__pthread_mutex_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 06:12:59,775 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__int64_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 06:12:59,775 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i____WAIT_STATUS in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 06:12:59,775 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i____syscall_slong_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 06:12:59,775 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__register_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 06:12:59,775 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i____daddr_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 06:12:59,776 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i____fsfilcnt_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 06:12:59,776 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__pthread_barrierattr_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 06:12:59,776 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i____uint8_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 06:12:59,776 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i____time_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 06:12:59,776 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__int8_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 06:12:59,776 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__ushort in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 06:12:59,776 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__u_quad_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 06:12:59,776 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i____key_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 06:12:59,776 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__ldiv_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 06:12:59,776 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i____int64_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 06:12:59,776 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__clock_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 06:12:59,777 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__daddr_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 06:12:59,777 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i____uint16_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 06:12:59,777 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__u_char in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 06:12:59,777 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i____u_long in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 06:12:59,777 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i____gid_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 06:12:59,777 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__blkcnt_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 06:12:59,777 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i____int16_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 06:12:59,777 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i____loff_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 06:12:59,777 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__suseconds_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 06:12:59,777 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i____sigset_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 06:12:59,777 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__fd_mask in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 06:12:59,778 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__u_int32_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 06:12:59,778 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__sigset_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 06:12:59,778 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i____ino_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 06:12:59,778 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__u_long in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 06:12:59,778 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i____ino64_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 06:12:59,778 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i____caddr_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 06:12:59,778 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i____off_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 06:12:59,778 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i____fsid_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 06:12:59,778 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__ulong in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 06:12:59,778 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__pthread_rwlockattr_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 06:12:59,778 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i____uint32_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 06:12:59,778 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__u_int8_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 06:12:59,779 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__wchar_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 06:12:59,779 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__lldiv_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 06:12:59,779 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__uid_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 06:12:59,779 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__int16_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 06:12:59,779 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i____clockid_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 06:12:59,779 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__div_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 06:12:59,779 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__blksize_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 06:12:59,779 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__pthread_spinlock_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 06:12:59,779 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__clockid_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 06:12:59,779 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__fsblkcnt_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 06:12:59,779 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__quad_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 06:12:59,779 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__pthread_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 06:12:59,779 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i____fd_mask in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 06:12:59,779 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i____id_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 06:12:59,779 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__u_int16_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 06:12:59,779 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i____syscall_ulong_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 06:12:59,779 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__pthread_cond_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 06:12:59,779 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__pthread_once_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 06:12:59,779 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i____int32_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 06:12:59,779 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i____rlim_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 06:12:59,780 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i____fsblkcnt64_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 06:12:59,780 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i____pid_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 06:12:59,780 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__u_int in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 06:12:59,780 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i____pthread_list_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 06:12:59,780 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__pthread_mutexattr_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 06:12:59,780 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i____u_char in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 06:12:59,780 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__pthread_barrier_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 06:12:59,780 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__pthread_attr_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 06:12:59,780 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i____off64_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 06:12:59,780 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i____suseconds_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 06:12:59,780 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i____quad_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 06:12:59,780 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i____u_quad_t in diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 06:12:59,792 INFO L330 CDTParser]: Deleted temporary CDT project at /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/data/FLAG4ddd6eda4 [2018-04-12 06:12:59,796 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-04-12 06:12:59,797 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-04-12 06:12:59,797 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-04-12 06:12:59,798 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-04-12 06:12:59,802 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-04-12 06:12:59,803 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 12.04 06:12:59" (1/1) ... [2018-04-12 06:12:59,806 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@6bf8d156 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 06:12:59, skipping insertion in model container [2018-04-12 06:12:59,806 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 12.04 06:12:59" (1/1) ... [2018-04-12 06:12:59,817 INFO L167 Dispatcher]: Using SV-COMP mode [2018-04-12 06:12:59,844 INFO L167 Dispatcher]: Using SV-COMP mode [2018-04-12 06:12:59,983 INFO L175 PostProcessor]: Settings: Checked method=main [2018-04-12 06:13:00,026 INFO L175 PostProcessor]: Settings: Checked method=main [2018-04-12 06:13:00,030 INFO L100 SccComputation]: Graph consists of 0 InCaSumBalls and 112 non ball SCCs. Number of states in SCCs 112. [2018-04-12 06:13:00,060 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 06:13:00 WrapperNode [2018-04-12 06:13:00,060 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-04-12 06:13:00,061 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-04-12 06:13:00,061 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-04-12 06:13:00,061 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-04-12 06:13:00,070 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 06:13:00" (1/1) ... [2018-04-12 06:13:00,070 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 06:13:00" (1/1) ... [2018-04-12 06:13:00,081 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 06:13:00" (1/1) ... [2018-04-12 06:13:00,081 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 06:13:00" (1/1) ... [2018-04-12 06:13:00,087 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 06:13:00" (1/1) ... [2018-04-12 06:13:00,091 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 06:13:00" (1/1) ... [2018-04-12 06:13:00,093 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 06:13:00" (1/1) ... [2018-04-12 06:13:00,096 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-04-12 06:13:00,097 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-04-12 06:13:00,097 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-04-12 06:13:00,097 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-04-12 06:13:00,097 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 06:13:00" (1/1) ... No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-04-12 06:13:00,182 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-04-12 06:13:00,182 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-04-12 06:13:00,182 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i____bswap_32 [2018-04-12 06:13:00,182 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i____bswap_64 [2018-04-12 06:13:00,182 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diff [2018-04-12 06:13:00,182 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-04-12 06:13:00,182 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i____bswap_32 [2018-04-12 06:13:00,183 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i____bswap_64 [2018-04-12 06:13:00,183 INFO L128 BoogieDeclarations]: Found specification of procedure __ctype_get_mb_cur_max [2018-04-12 06:13:00,183 INFO L128 BoogieDeclarations]: Found specification of procedure atof [2018-04-12 06:13:00,183 INFO L128 BoogieDeclarations]: Found specification of procedure atoi [2018-04-12 06:13:00,183 INFO L128 BoogieDeclarations]: Found specification of procedure atol [2018-04-12 06:13:00,183 INFO L128 BoogieDeclarations]: Found specification of procedure atoll [2018-04-12 06:13:00,183 INFO L128 BoogieDeclarations]: Found specification of procedure strtod [2018-04-12 06:13:00,183 INFO L128 BoogieDeclarations]: Found specification of procedure strtof [2018-04-12 06:13:00,183 INFO L128 BoogieDeclarations]: Found specification of procedure strtold [2018-04-12 06:13:00,183 INFO L128 BoogieDeclarations]: Found specification of procedure strtol [2018-04-12 06:13:00,184 INFO L128 BoogieDeclarations]: Found specification of procedure strtoul [2018-04-12 06:13:00,184 INFO L128 BoogieDeclarations]: Found specification of procedure strtoq [2018-04-12 06:13:00,184 INFO L128 BoogieDeclarations]: Found specification of procedure strtouq [2018-04-12 06:13:00,184 INFO L128 BoogieDeclarations]: Found specification of procedure strtoll [2018-04-12 06:13:00,184 INFO L128 BoogieDeclarations]: Found specification of procedure strtoull [2018-04-12 06:13:00,184 INFO L128 BoogieDeclarations]: Found specification of procedure l64a [2018-04-12 06:13:00,184 INFO L128 BoogieDeclarations]: Found specification of procedure a64l [2018-04-12 06:13:00,184 INFO L128 BoogieDeclarations]: Found specification of procedure select [2018-04-12 06:13:00,184 INFO L128 BoogieDeclarations]: Found specification of procedure pselect [2018-04-12 06:13:00,185 INFO L128 BoogieDeclarations]: Found specification of procedure gnu_dev_major [2018-04-12 06:13:00,185 INFO L128 BoogieDeclarations]: Found specification of procedure gnu_dev_minor [2018-04-12 06:13:00,185 INFO L128 BoogieDeclarations]: Found specification of procedure gnu_dev_makedev [2018-04-12 06:13:00,185 INFO L128 BoogieDeclarations]: Found specification of procedure random [2018-04-12 06:13:00,185 INFO L128 BoogieDeclarations]: Found specification of procedure srandom [2018-04-12 06:13:00,185 INFO L128 BoogieDeclarations]: Found specification of procedure initstate [2018-04-12 06:13:00,185 INFO L128 BoogieDeclarations]: Found specification of procedure setstate [2018-04-12 06:13:00,185 INFO L128 BoogieDeclarations]: Found specification of procedure random_r [2018-04-12 06:13:00,185 INFO L128 BoogieDeclarations]: Found specification of procedure srandom_r [2018-04-12 06:13:00,186 INFO L128 BoogieDeclarations]: Found specification of procedure initstate_r [2018-04-12 06:13:00,186 INFO L128 BoogieDeclarations]: Found specification of procedure setstate_r [2018-04-12 06:13:00,186 INFO L128 BoogieDeclarations]: Found specification of procedure rand [2018-04-12 06:13:00,186 INFO L128 BoogieDeclarations]: Found specification of procedure srand [2018-04-12 06:13:00,186 INFO L128 BoogieDeclarations]: Found specification of procedure rand_r [2018-04-12 06:13:00,186 INFO L128 BoogieDeclarations]: Found specification of procedure drand48 [2018-04-12 06:13:00,186 INFO L128 BoogieDeclarations]: Found specification of procedure erand48 [2018-04-12 06:13:00,186 INFO L128 BoogieDeclarations]: Found specification of procedure lrand48 [2018-04-12 06:13:00,186 INFO L128 BoogieDeclarations]: Found specification of procedure nrand48 [2018-04-12 06:13:00,186 INFO L128 BoogieDeclarations]: Found specification of procedure mrand48 [2018-04-12 06:13:00,187 INFO L128 BoogieDeclarations]: Found specification of procedure jrand48 [2018-04-12 06:13:00,187 INFO L128 BoogieDeclarations]: Found specification of procedure srand48 [2018-04-12 06:13:00,187 INFO L128 BoogieDeclarations]: Found specification of procedure seed48 [2018-04-12 06:13:00,187 INFO L128 BoogieDeclarations]: Found specification of procedure lcong48 [2018-04-12 06:13:00,187 INFO L128 BoogieDeclarations]: Found specification of procedure drand48_r [2018-04-12 06:13:00,187 INFO L128 BoogieDeclarations]: Found specification of procedure erand48_r [2018-04-12 06:13:00,187 INFO L128 BoogieDeclarations]: Found specification of procedure lrand48_r [2018-04-12 06:13:00,187 INFO L128 BoogieDeclarations]: Found specification of procedure nrand48_r [2018-04-12 06:13:00,187 INFO L128 BoogieDeclarations]: Found specification of procedure mrand48_r [2018-04-12 06:13:00,187 INFO L128 BoogieDeclarations]: Found specification of procedure jrand48_r [2018-04-12 06:13:00,188 INFO L128 BoogieDeclarations]: Found specification of procedure srand48_r [2018-04-12 06:13:00,188 INFO L128 BoogieDeclarations]: Found specification of procedure seed48_r [2018-04-12 06:13:00,188 INFO L128 BoogieDeclarations]: Found specification of procedure lcong48_r [2018-04-12 06:13:00,188 INFO L128 BoogieDeclarations]: Found specification of procedure malloc [2018-04-12 06:13:00,188 INFO L128 BoogieDeclarations]: Found specification of procedure calloc [2018-04-12 06:13:00,188 INFO L128 BoogieDeclarations]: Found specification of procedure realloc [2018-04-12 06:13:00,188 INFO L128 BoogieDeclarations]: Found specification of procedure free [2018-04-12 06:13:00,188 INFO L128 BoogieDeclarations]: Found specification of procedure cfree [2018-04-12 06:13:00,188 INFO L128 BoogieDeclarations]: Found specification of procedure alloca [2018-04-12 06:13:00,188 INFO L128 BoogieDeclarations]: Found specification of procedure valloc [2018-04-12 06:13:00,189 INFO L128 BoogieDeclarations]: Found specification of procedure posix_memalign [2018-04-12 06:13:00,189 INFO L128 BoogieDeclarations]: Found specification of procedure abort [2018-04-12 06:13:00,189 INFO L128 BoogieDeclarations]: Found specification of procedure atexit [2018-04-12 06:13:00,189 INFO L128 BoogieDeclarations]: Found specification of procedure on_exit [2018-04-12 06:13:00,189 INFO L128 BoogieDeclarations]: Found specification of procedure exit [2018-04-12 06:13:00,189 INFO L128 BoogieDeclarations]: Found specification of procedure _Exit [2018-04-12 06:13:00,189 INFO L128 BoogieDeclarations]: Found specification of procedure getenv [2018-04-12 06:13:00,189 INFO L128 BoogieDeclarations]: Found specification of procedure putenv [2018-04-12 06:13:00,189 INFO L128 BoogieDeclarations]: Found specification of procedure setenv [2018-04-12 06:13:00,189 INFO L128 BoogieDeclarations]: Found specification of procedure unsetenv [2018-04-12 06:13:00,189 INFO L128 BoogieDeclarations]: Found specification of procedure clearenv [2018-04-12 06:13:00,190 INFO L128 BoogieDeclarations]: Found specification of procedure mktemp [2018-04-12 06:13:00,190 INFO L128 BoogieDeclarations]: Found specification of procedure mkstemp [2018-04-12 06:13:00,190 INFO L128 BoogieDeclarations]: Found specification of procedure mkstemps [2018-04-12 06:13:00,190 INFO L128 BoogieDeclarations]: Found specification of procedure mkdtemp [2018-04-12 06:13:00,190 INFO L128 BoogieDeclarations]: Found specification of procedure system [2018-04-12 06:13:00,190 INFO L128 BoogieDeclarations]: Found specification of procedure realpath [2018-04-12 06:13:00,190 INFO L128 BoogieDeclarations]: Found specification of procedure bsearch [2018-04-12 06:13:00,190 INFO L128 BoogieDeclarations]: Found specification of procedure qsort [2018-04-12 06:13:00,190 INFO L128 BoogieDeclarations]: Found specification of procedure abs [2018-04-12 06:13:00,190 INFO L128 BoogieDeclarations]: Found specification of procedure labs [2018-04-12 06:13:00,190 INFO L128 BoogieDeclarations]: Found specification of procedure llabs [2018-04-12 06:13:00,191 INFO L128 BoogieDeclarations]: Found specification of procedure div [2018-04-12 06:13:00,191 INFO L128 BoogieDeclarations]: Found specification of procedure ldiv [2018-04-12 06:13:00,191 INFO L128 BoogieDeclarations]: Found specification of procedure lldiv [2018-04-12 06:13:00,191 INFO L128 BoogieDeclarations]: Found specification of procedure ecvt [2018-04-12 06:13:00,191 INFO L128 BoogieDeclarations]: Found specification of procedure fcvt [2018-04-12 06:13:00,191 INFO L128 BoogieDeclarations]: Found specification of procedure gcvt [2018-04-12 06:13:00,191 INFO L128 BoogieDeclarations]: Found specification of procedure qecvt [2018-04-12 06:13:00,191 INFO L128 BoogieDeclarations]: Found specification of procedure qfcvt [2018-04-12 06:13:00,191 INFO L128 BoogieDeclarations]: Found specification of procedure qgcvt [2018-04-12 06:13:00,191 INFO L128 BoogieDeclarations]: Found specification of procedure ecvt_r [2018-04-12 06:13:00,192 INFO L128 BoogieDeclarations]: Found specification of procedure fcvt_r [2018-04-12 06:13:00,192 INFO L128 BoogieDeclarations]: Found specification of procedure qecvt_r [2018-04-12 06:13:00,192 INFO L128 BoogieDeclarations]: Found specification of procedure qfcvt_r [2018-04-12 06:13:00,192 INFO L128 BoogieDeclarations]: Found specification of procedure mblen [2018-04-12 06:13:00,192 INFO L128 BoogieDeclarations]: Found specification of procedure mbtowc [2018-04-12 06:13:00,192 INFO L128 BoogieDeclarations]: Found specification of procedure wctomb [2018-04-12 06:13:00,192 INFO L128 BoogieDeclarations]: Found specification of procedure mbstowcs [2018-04-12 06:13:00,192 INFO L128 BoogieDeclarations]: Found specification of procedure wcstombs [2018-04-12 06:13:00,192 INFO L128 BoogieDeclarations]: Found specification of procedure rpmatch [2018-04-12 06:13:00,192 INFO L128 BoogieDeclarations]: Found specification of procedure getsubopt [2018-04-12 06:13:00,193 INFO L128 BoogieDeclarations]: Found specification of procedure getloadavg [2018-04-12 06:13:00,193 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2018-04-12 06:13:00,193 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diff [2018-04-12 06:13:00,193 INFO L128 BoogieDeclarations]: Found specification of procedure read~int [2018-04-12 06:13:00,193 INFO L128 BoogieDeclarations]: Found specification of procedure write~int [2018-04-12 06:13:00,193 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-04-12 06:13:00,193 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-04-12 06:13:00,193 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-04-12 06:13:00,193 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-04-12 06:13:00,193 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-04-12 06:13:00,194 INFO L128 BoogieDeclarations]: Found specification of procedure write~unchecked~int [2018-04-12 06:13:00,481 INFO L259 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-04-12 06:13:00,482 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 12.04 06:13:00 BoogieIcfgContainer [2018-04-12 06:13:00,482 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-04-12 06:13:00,482 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-04-12 06:13:00,482 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-04-12 06:13:00,484 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-04-12 06:13:00,484 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 12.04 06:12:59" (1/3) ... [2018-04-12 06:13:00,485 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@78e30a9d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 12.04 06:13:00, skipping insertion in model container [2018-04-12 06:13:00,485 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 06:13:00" (2/3) ... [2018-04-12 06:13:00,485 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@78e30a9d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 12.04 06:13:00, skipping insertion in model container [2018-04-12 06:13:00,485 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 12.04 06:13:00" (3/3) ... [2018-04-12 06:13:00,486 INFO L107 eAbstractionObserver]: Analyzing ICFG diff-alloca_true-valid-memsafety_true-termination.i [2018-04-12 06:13:00,492 INFO L131 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-04-12 06:13:00,498 INFO L143 ceAbstractionStarter]: Appying trace abstraction to program that has 9 error locations. [2018-04-12 06:13:00,522 INFO L128 ementStrategyFactory]: Using default assertion order modulation [2018-04-12 06:13:00,523 INFO L369 AbstractCegarLoop]: Interprodecural is true [2018-04-12 06:13:00,523 INFO L370 AbstractCegarLoop]: Hoare is false [2018-04-12 06:13:00,523 INFO L371 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-04-12 06:13:00,523 INFO L372 AbstractCegarLoop]: Backedges is TWOTRACK [2018-04-12 06:13:00,523 INFO L373 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-04-12 06:13:00,523 INFO L374 AbstractCegarLoop]: Difference is false [2018-04-12 06:13:00,523 INFO L375 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-04-12 06:13:00,523 INFO L380 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-04-12 06:13:00,524 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-04-12 06:13:00,532 INFO L276 IsEmpty]: Start isEmpty. Operand 50 states. [2018-04-12 06:13:00,539 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-04-12 06:13:00,539 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 06:13:00,539 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 06:13:00,540 INFO L408 AbstractCegarLoop]: === Iteration 1 === [mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr4RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr5RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr3RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr0RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr2RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr6RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr1RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr7RequiresViolation]=== [2018-04-12 06:13:00,542 INFO L82 PathProgramCache]: Analyzing trace with hash 1884904866, now seen corresponding path program 1 times [2018-04-12 06:13:00,543 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-12 06:13:00,543 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-12 06:13:00,572 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 06:13:00,572 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 06:13:00,572 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 06:13:00,614 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 06:13:00,619 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 06:13:00,635 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-12 06:13:00,635 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-12 06:13:00,636 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-12 06:13:00,636 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 06:13:00,685 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 06:13:00,695 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 06:13:00,729 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-12 06:13:00,731 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 06:13:00,736 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 06:13:00,736 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-04-12 06:13:00,753 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:13:00,754 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:13:00,755 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21 [2018-04-12 06:13:00,755 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 06:13:00,762 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-12 06:13:00,762 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:17, output treesize:15 [2018-04-12 06:13:00,782 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 20 [2018-04-12 06:13:00,783 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 06:13:00,791 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-04-12 06:13:00,791 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:21, output treesize:20 [2018-04-12 06:13:00,848 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 06:13:00,850 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 06:13:00,850 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-04-12 06:13:00,852 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-04-12 06:13:00,863 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-04-12 06:13:00,864 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2018-04-12 06:13:00,866 INFO L87 Difference]: Start difference. First operand 50 states. Second operand 7 states. [2018-04-12 06:13:00,988 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 06:13:00,988 INFO L93 Difference]: Finished difference Result 48 states and 53 transitions. [2018-04-12 06:13:00,989 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-04-12 06:13:00,990 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 21 [2018-04-12 06:13:00,990 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 06:13:00,999 INFO L225 Difference]: With dead ends: 48 [2018-04-12 06:13:00,999 INFO L226 Difference]: Without dead ends: 45 [2018-04-12 06:13:01,001 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 14 SyntacticMatches, 1 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=26, Invalid=64, Unknown=0, NotChecked=0, Total=90 [2018-04-12 06:13:01,015 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 45 states. [2018-04-12 06:13:01,027 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 45 to 45. [2018-04-12 06:13:01,028 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 45 states. [2018-04-12 06:13:01,029 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45 states to 45 states and 50 transitions. [2018-04-12 06:13:01,030 INFO L78 Accepts]: Start accepts. Automaton has 45 states and 50 transitions. Word has length 21 [2018-04-12 06:13:01,031 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 06:13:01,031 INFO L459 AbstractCegarLoop]: Abstraction has 45 states and 50 transitions. [2018-04-12 06:13:01,031 INFO L460 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-04-12 06:13:01,031 INFO L276 IsEmpty]: Start isEmpty. Operand 45 states and 50 transitions. [2018-04-12 06:13:01,032 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-04-12 06:13:01,032 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 06:13:01,032 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 06:13:01,032 INFO L408 AbstractCegarLoop]: === Iteration 2 === [mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr4RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr5RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr3RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr0RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr2RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr6RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr1RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr7RequiresViolation]=== [2018-04-12 06:13:01,032 INFO L82 PathProgramCache]: Analyzing trace with hash 1884904867, now seen corresponding path program 1 times [2018-04-12 06:13:01,032 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-12 06:13:01,032 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-12 06:13:01,033 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 06:13:01,033 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 06:13:01,033 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 06:13:01,052 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 06:13:01,053 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 06:13:01,063 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-12 06:13:01,063 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-12 06:13:01,063 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-12 06:13:01,064 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 06:13:01,096 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 06:13:01,100 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 06:13:01,112 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-12 06:13:01,112 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 06:13:01,125 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-12 06:13:01,125 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 06:13:01,132 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 06:13:01,132 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:24, output treesize:22 [2018-04-12 06:13:01,165 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:13:01,166 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 17 [2018-04-12 06:13:01,167 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 06:13:01,181 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:13:01,182 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:13:01,183 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-04-12 06:13:01,183 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 06:13:01,192 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-12 06:13:01,193 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:30, output treesize:23 [2018-04-12 06:13:01,239 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 21 treesize of output 28 [2018-04-12 06:13:01,240 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 2 xjuncts. [2018-04-12 06:13:01,260 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-1 vars, End of recursive call: 5 dim-0 vars, and 2 xjuncts. [2018-04-12 06:13:01,261 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 4 variables, input treesize:31, output treesize:56 [2018-04-12 06:13:01,380 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 06:13:01,380 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 06:13:01,380 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-04-12 06:13:01,381 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-04-12 06:13:01,381 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-04-12 06:13:01,381 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=66, Unknown=0, NotChecked=0, Total=90 [2018-04-12 06:13:01,381 INFO L87 Difference]: Start difference. First operand 45 states and 50 transitions. Second operand 10 states. [2018-04-12 06:13:01,919 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 06:13:01,919 INFO L93 Difference]: Finished difference Result 100 states and 112 transitions. [2018-04-12 06:13:01,919 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-04-12 06:13:01,920 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 21 [2018-04-12 06:13:01,920 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 06:13:01,922 INFO L225 Difference]: With dead ends: 100 [2018-04-12 06:13:01,922 INFO L226 Difference]: Without dead ends: 100 [2018-04-12 06:13:01,923 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 25 GetRequests, 12 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 28 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=59, Invalid=151, Unknown=0, NotChecked=0, Total=210 [2018-04-12 06:13:01,923 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 100 states. [2018-04-12 06:13:01,928 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 100 to 76. [2018-04-12 06:13:01,928 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 76 states. [2018-04-12 06:13:01,929 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 76 states to 76 states and 97 transitions. [2018-04-12 06:13:01,930 INFO L78 Accepts]: Start accepts. Automaton has 76 states and 97 transitions. Word has length 21 [2018-04-12 06:13:01,930 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 06:13:01,930 INFO L459 AbstractCegarLoop]: Abstraction has 76 states and 97 transitions. [2018-04-12 06:13:01,930 INFO L460 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-04-12 06:13:01,930 INFO L276 IsEmpty]: Start isEmpty. Operand 76 states and 97 transitions. [2018-04-12 06:13:01,931 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-04-12 06:13:01,931 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 06:13:01,931 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 06:13:01,931 INFO L408 AbstractCegarLoop]: === Iteration 3 === [mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr4RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr5RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr3RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr0RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr2RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr6RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr1RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr7RequiresViolation]=== [2018-04-12 06:13:01,931 INFO L82 PathProgramCache]: Analyzing trace with hash 873787617, now seen corresponding path program 1 times [2018-04-12 06:13:01,931 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-12 06:13:01,931 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-12 06:13:01,932 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 06:13:01,932 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 06:13:01,932 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 06:13:01,945 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 06:13:01,946 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 06:13:01,956 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-12 06:13:01,957 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-12 06:13:01,957 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-12 06:13:01,958 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 06:13:01,991 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 06:13:01,995 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 06:13:02,004 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-12 06:13:02,004 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 06:13:02,009 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-12 06:13:02,009 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 06:13:02,013 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 06:13:02,014 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:21, output treesize:19 [2018-04-12 06:13:02,030 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:13:02,034 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 19 [2018-04-12 06:13:02,035 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 06:13:02,044 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:13:02,045 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:13:02,045 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-04-12 06:13:02,046 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 06:13:02,059 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-04-12 06:13:02,059 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:32, output treesize:25 [2018-04-12 06:13:02,091 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 23 treesize of output 30 [2018-04-12 06:13:02,092 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 2 xjuncts. [2018-04-12 06:13:02,112 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 1 dim-1 vars, End of recursive call: 6 dim-0 vars, and 2 xjuncts. [2018-04-12 06:13:02,112 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 5 variables, input treesize:33, output treesize:58 [2018-04-12 06:13:02,211 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 06:13:02,212 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 06:13:02,212 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-04-12 06:13:02,212 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-04-12 06:13:02,212 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-04-12 06:13:02,212 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=53, Unknown=0, NotChecked=0, Total=72 [2018-04-12 06:13:02,212 INFO L87 Difference]: Start difference. First operand 76 states and 97 transitions. Second operand 9 states. [2018-04-12 06:13:02,493 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 06:13:02,493 INFO L93 Difference]: Finished difference Result 99 states and 126 transitions. [2018-04-12 06:13:02,493 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-04-12 06:13:02,493 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 21 [2018-04-12 06:13:02,493 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 06:13:02,494 INFO L225 Difference]: With dead ends: 99 [2018-04-12 06:13:02,494 INFO L226 Difference]: Without dead ends: 99 [2018-04-12 06:13:02,494 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 13 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=36, Invalid=96, Unknown=0, NotChecked=0, Total=132 [2018-04-12 06:13:02,494 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 99 states. [2018-04-12 06:13:02,499 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 99 to 54. [2018-04-12 06:13:02,499 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 54 states. [2018-04-12 06:13:02,500 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 54 states to 54 states and 65 transitions. [2018-04-12 06:13:02,500 INFO L78 Accepts]: Start accepts. Automaton has 54 states and 65 transitions. Word has length 21 [2018-04-12 06:13:02,500 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 06:13:02,500 INFO L459 AbstractCegarLoop]: Abstraction has 54 states and 65 transitions. [2018-04-12 06:13:02,500 INFO L460 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-04-12 06:13:02,500 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 65 transitions. [2018-04-12 06:13:02,500 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2018-04-12 06:13:02,500 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 06:13:02,500 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 06:13:02,500 INFO L408 AbstractCegarLoop]: === Iteration 4 === [mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr4RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr5RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr3RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr0RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr2RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr6RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr1RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr7RequiresViolation]=== [2018-04-12 06:13:02,500 INFO L82 PathProgramCache]: Analyzing trace with hash -1697491302, now seen corresponding path program 1 times [2018-04-12 06:13:02,501 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-12 06:13:02,501 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-12 06:13:02,501 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 06:13:02,501 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 06:13:02,501 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 06:13:02,512 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 06:13:02,513 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 06:13:02,516 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-12 06:13:02,517 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-12 06:13:02,517 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-12 06:13:02,517 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 06:13:02,544 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 06:13:02,547 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 06:13:02,553 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-12 06:13:02,553 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 06:13:02,554 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 06:13:02,554 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-04-12 06:13:02,563 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:13:02,564 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:13:02,564 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21 [2018-04-12 06:13:02,565 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 06:13:02,569 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-12 06:13:02,569 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:17, output treesize:15 [2018-04-12 06:13:02,593 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 06:13:02,593 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 06:13:02,593 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-04-12 06:13:02,593 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-04-12 06:13:02,593 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-04-12 06:13:02,594 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2018-04-12 06:13:02,594 INFO L87 Difference]: Start difference. First operand 54 states and 65 transitions. Second operand 7 states. [2018-04-12 06:13:02,699 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 06:13:02,700 INFO L93 Difference]: Finished difference Result 53 states and 63 transitions. [2018-04-12 06:13:02,701 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-04-12 06:13:02,701 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 22 [2018-04-12 06:13:02,701 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 06:13:02,702 INFO L225 Difference]: With dead ends: 53 [2018-04-12 06:13:02,702 INFO L226 Difference]: Without dead ends: 53 [2018-04-12 06:13:02,702 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 24 GetRequests, 16 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=26, Invalid=64, Unknown=0, NotChecked=0, Total=90 [2018-04-12 06:13:02,702 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 53 states. [2018-04-12 06:13:02,705 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 53 to 53. [2018-04-12 06:13:02,705 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 53 states. [2018-04-12 06:13:02,706 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 53 states to 53 states and 63 transitions. [2018-04-12 06:13:02,706 INFO L78 Accepts]: Start accepts. Automaton has 53 states and 63 transitions. Word has length 22 [2018-04-12 06:13:02,706 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 06:13:02,707 INFO L459 AbstractCegarLoop]: Abstraction has 53 states and 63 transitions. [2018-04-12 06:13:02,707 INFO L460 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-04-12 06:13:02,707 INFO L276 IsEmpty]: Start isEmpty. Operand 53 states and 63 transitions. [2018-04-12 06:13:02,707 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2018-04-12 06:13:02,707 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 06:13:02,708 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 06:13:02,708 INFO L408 AbstractCegarLoop]: === Iteration 5 === [mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr4RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr5RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr3RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr0RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr2RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr6RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr1RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr7RequiresViolation]=== [2018-04-12 06:13:02,708 INFO L82 PathProgramCache]: Analyzing trace with hash -1697491301, now seen corresponding path program 1 times [2018-04-12 06:13:02,708 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-12 06:13:02,708 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-12 06:13:02,709 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 06:13:02,709 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 06:13:02,709 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 06:13:02,722 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 06:13:02,723 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 06:13:02,730 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-12 06:13:02,731 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-12 06:13:02,731 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-12 06:13:02,731 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 06:13:02,755 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 06:13:02,760 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 06:13:02,772 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-12 06:13:02,772 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 06:13:02,780 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-12 06:13:02,780 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 06:13:02,786 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-12 06:13:02,787 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:21, output treesize:19 [2018-04-12 06:13:02,828 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:13:02,829 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:13:02,830 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-04-12 06:13:02,830 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 06:13:02,843 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 19 [2018-04-12 06:13:02,844 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 06:13:02,850 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-1 vars, End of recursive call: 3 dim-0 vars, and 1 xjuncts. [2018-04-12 06:13:02,851 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 5 variables, input treesize:32, output treesize:25 [2018-04-12 06:13:02,944 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 06:13:02,944 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 06:13:02,945 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-04-12 06:13:02,945 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-04-12 06:13:02,945 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-04-12 06:13:02,945 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=56, Unknown=0, NotChecked=0, Total=72 [2018-04-12 06:13:02,945 INFO L87 Difference]: Start difference. First operand 53 states and 63 transitions. Second operand 9 states. [2018-04-12 06:13:03,217 WARN L151 SmtUtils]: Spent 192ms on a formula simplification. DAG size of input: 35 DAG size of output 31 [2018-04-12 06:13:03,344 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 06:13:03,344 INFO L93 Difference]: Finished difference Result 78 states and 95 transitions. [2018-04-12 06:13:03,345 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-04-12 06:13:03,345 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 22 [2018-04-12 06:13:03,345 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 06:13:03,346 INFO L225 Difference]: With dead ends: 78 [2018-04-12 06:13:03,346 INFO L226 Difference]: Without dead ends: 78 [2018-04-12 06:13:03,346 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 27 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=49, Invalid=161, Unknown=0, NotChecked=0, Total=210 [2018-04-12 06:13:03,346 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 78 states. [2018-04-12 06:13:03,349 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 78 to 63. [2018-04-12 06:13:03,349 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 63 states. [2018-04-12 06:13:03,350 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 63 states to 63 states and 78 transitions. [2018-04-12 06:13:03,350 INFO L78 Accepts]: Start accepts. Automaton has 63 states and 78 transitions. Word has length 22 [2018-04-12 06:13:03,350 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 06:13:03,350 INFO L459 AbstractCegarLoop]: Abstraction has 63 states and 78 transitions. [2018-04-12 06:13:03,350 INFO L460 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-04-12 06:13:03,351 INFO L276 IsEmpty]: Start isEmpty. Operand 63 states and 78 transitions. [2018-04-12 06:13:03,351 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2018-04-12 06:13:03,351 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 06:13:03,351 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 06:13:03,351 INFO L408 AbstractCegarLoop]: === Iteration 6 === [mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr4RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr5RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr3RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr0RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr2RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr6RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr1RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr7RequiresViolation]=== [2018-04-12 06:13:03,352 INFO L82 PathProgramCache]: Analyzing trace with hash -1082665576, now seen corresponding path program 1 times [2018-04-12 06:13:03,352 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-12 06:13:03,352 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-12 06:13:03,352 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 06:13:03,352 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 06:13:03,352 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 06:13:03,359 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 06:13:03,359 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 06:13:03,403 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 06:13:03,404 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 06:13:03,404 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-04-12 06:13:03,404 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-04-12 06:13:03,404 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-04-12 06:13:03,404 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-04-12 06:13:03,404 INFO L87 Difference]: Start difference. First operand 63 states and 78 transitions. Second operand 6 states. [2018-04-12 06:13:03,451 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 06:13:03,451 INFO L93 Difference]: Finished difference Result 62 states and 77 transitions. [2018-04-12 06:13:03,452 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-04-12 06:13:03,452 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 23 [2018-04-12 06:13:03,452 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 06:13:03,452 INFO L225 Difference]: With dead ends: 62 [2018-04-12 06:13:03,452 INFO L226 Difference]: Without dead ends: 62 [2018-04-12 06:13:03,453 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2018-04-12 06:13:03,453 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 62 states. [2018-04-12 06:13:03,455 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 62 to 62. [2018-04-12 06:13:03,455 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 62 states. [2018-04-12 06:13:03,456 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 62 states to 62 states and 77 transitions. [2018-04-12 06:13:03,456 INFO L78 Accepts]: Start accepts. Automaton has 62 states and 77 transitions. Word has length 23 [2018-04-12 06:13:03,456 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 06:13:03,456 INFO L459 AbstractCegarLoop]: Abstraction has 62 states and 77 transitions. [2018-04-12 06:13:03,456 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-04-12 06:13:03,457 INFO L276 IsEmpty]: Start isEmpty. Operand 62 states and 77 transitions. [2018-04-12 06:13:03,457 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2018-04-12 06:13:03,457 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 06:13:03,457 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 06:13:03,457 INFO L408 AbstractCegarLoop]: === Iteration 7 === [mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr4RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr5RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr3RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr0RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr2RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr6RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr1RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr7RequiresViolation]=== [2018-04-12 06:13:03,457 INFO L82 PathProgramCache]: Analyzing trace with hash -1082665575, now seen corresponding path program 1 times [2018-04-12 06:13:03,458 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-12 06:13:03,458 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-12 06:13:03,458 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 06:13:03,458 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 06:13:03,458 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 06:13:03,465 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 06:13:03,465 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 06:13:03,506 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 06:13:03,506 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 06:13:03,506 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-04-12 06:13:03,506 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-04-12 06:13:03,506 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-04-12 06:13:03,506 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2018-04-12 06:13:03,507 INFO L87 Difference]: Start difference. First operand 62 states and 77 transitions. Second operand 6 states. [2018-04-12 06:13:03,545 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 06:13:03,545 INFO L93 Difference]: Finished difference Result 73 states and 90 transitions. [2018-04-12 06:13:03,545 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-04-12 06:13:03,545 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 23 [2018-04-12 06:13:03,545 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 06:13:03,546 INFO L225 Difference]: With dead ends: 73 [2018-04-12 06:13:03,547 INFO L226 Difference]: Without dead ends: 73 [2018-04-12 06:13:03,547 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=20, Invalid=36, Unknown=0, NotChecked=0, Total=56 [2018-04-12 06:13:03,547 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 73 states. [2018-04-12 06:13:03,550 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 73 to 66. [2018-04-12 06:13:03,550 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 66 states. [2018-04-12 06:13:03,551 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 66 states to 66 states and 81 transitions. [2018-04-12 06:13:03,551 INFO L78 Accepts]: Start accepts. Automaton has 66 states and 81 transitions. Word has length 23 [2018-04-12 06:13:03,551 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 06:13:03,551 INFO L459 AbstractCegarLoop]: Abstraction has 66 states and 81 transitions. [2018-04-12 06:13:03,552 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-04-12 06:13:03,552 INFO L276 IsEmpty]: Start isEmpty. Operand 66 states and 81 transitions. [2018-04-12 06:13:03,552 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-04-12 06:13:03,552 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 06:13:03,552 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 06:13:03,552 INFO L408 AbstractCegarLoop]: === Iteration 8 === [mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr4RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr5RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr3RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr0RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr2RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr6RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr1RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr7RequiresViolation]=== [2018-04-12 06:13:03,553 INFO L82 PathProgramCache]: Analyzing trace with hash 539067411, now seen corresponding path program 1 times [2018-04-12 06:13:03,553 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-12 06:13:03,553 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-12 06:13:03,553 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 06:13:03,554 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 06:13:03,554 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 06:13:03,561 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 06:13:03,561 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 06:13:03,610 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 06:13:03,610 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-12 06:13:03,610 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-12 06:13:03,611 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 06:13:03,622 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 06:13:03,626 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 06:13:03,651 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 06:13:03,651 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-04-12 06:13:03,651 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [9] total 13 [2018-04-12 06:13:03,652 INFO L442 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-04-12 06:13:03,652 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-04-12 06:13:03,652 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=31, Invalid=125, Unknown=0, NotChecked=0, Total=156 [2018-04-12 06:13:03,652 INFO L87 Difference]: Start difference. First operand 66 states and 81 transitions. Second operand 13 states. [2018-04-12 06:13:03,733 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 06:13:03,734 INFO L93 Difference]: Finished difference Result 132 states and 157 transitions. [2018-04-12 06:13:03,734 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-04-12 06:13:03,734 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 27 [2018-04-12 06:13:03,734 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 06:13:03,735 INFO L225 Difference]: With dead ends: 132 [2018-04-12 06:13:03,735 INFO L226 Difference]: Without dead ends: 132 [2018-04-12 06:13:03,735 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 39 GetRequests, 23 SyntacticMatches, 1 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 39 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=63, Invalid=209, Unknown=0, NotChecked=0, Total=272 [2018-04-12 06:13:03,735 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 132 states. [2018-04-12 06:13:03,737 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 132 to 105. [2018-04-12 06:13:03,738 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 105 states. [2018-04-12 06:13:03,738 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 105 states to 105 states and 131 transitions. [2018-04-12 06:13:03,738 INFO L78 Accepts]: Start accepts. Automaton has 105 states and 131 transitions. Word has length 27 [2018-04-12 06:13:03,738 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 06:13:03,738 INFO L459 AbstractCegarLoop]: Abstraction has 105 states and 131 transitions. [2018-04-12 06:13:03,738 INFO L460 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-04-12 06:13:03,739 INFO L276 IsEmpty]: Start isEmpty. Operand 105 states and 131 transitions. [2018-04-12 06:13:03,739 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-04-12 06:13:03,739 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 06:13:03,739 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 06:13:03,739 INFO L408 AbstractCegarLoop]: === Iteration 9 === [mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr4RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr5RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr3RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr0RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr2RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr6RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr1RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr7RequiresViolation]=== [2018-04-12 06:13:03,740 INFO L82 PathProgramCache]: Analyzing trace with hash -278581039, now seen corresponding path program 1 times [2018-04-12 06:13:03,740 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-12 06:13:03,740 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-12 06:13:03,740 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 06:13:03,741 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 06:13:03,741 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 06:13:03,747 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 06:13:03,748 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 06:13:03,754 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-12 06:13:03,754 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-12 06:13:03,754 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-12 06:13:03,754 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 06:13:03,768 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 06:13:03,771 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 06:13:03,775 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-12 06:13:03,775 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 06:13:03,779 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-12 06:13:03,779 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 06:13:03,782 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 06:13:03,783 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:18, output treesize:16 [2018-04-12 06:13:03,807 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:13:03,807 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:13:03,808 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-04-12 06:13:03,808 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 06:13:03,813 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 19 [2018-04-12 06:13:03,814 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 06:13:03,818 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-04-12 06:13:03,818 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:29, output treesize:22 [2018-04-12 06:13:03,926 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 06:13:03,926 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-12 06:13:03,926 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9] total 9 [2018-04-12 06:13:03,926 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-04-12 06:13:03,926 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-04-12 06:13:03,927 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=70, Unknown=0, NotChecked=0, Total=90 [2018-04-12 06:13:03,927 INFO L87 Difference]: Start difference. First operand 105 states and 131 transitions. Second operand 10 states. [2018-04-12 06:13:04,348 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 06:13:04,348 INFO L93 Difference]: Finished difference Result 159 states and 197 transitions. [2018-04-12 06:13:04,348 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-04-12 06:13:04,348 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 27 [2018-04-12 06:13:04,349 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 06:13:04,349 INFO L225 Difference]: With dead ends: 159 [2018-04-12 06:13:04,349 INFO L226 Difference]: Without dead ends: 159 [2018-04-12 06:13:04,350 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 32 GetRequests, 18 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=58, Invalid=182, Unknown=0, NotChecked=0, Total=240 [2018-04-12 06:13:04,350 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 159 states. [2018-04-12 06:13:04,354 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 159 to 94. [2018-04-12 06:13:04,354 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 94 states. [2018-04-12 06:13:04,354 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 94 states to 94 states and 114 transitions. [2018-04-12 06:13:04,355 INFO L78 Accepts]: Start accepts. Automaton has 94 states and 114 transitions. Word has length 27 [2018-04-12 06:13:04,355 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 06:13:04,355 INFO L459 AbstractCegarLoop]: Abstraction has 94 states and 114 transitions. [2018-04-12 06:13:04,355 INFO L460 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-04-12 06:13:04,355 INFO L276 IsEmpty]: Start isEmpty. Operand 94 states and 114 transitions. [2018-04-12 06:13:04,356 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2018-04-12 06:13:04,356 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 06:13:04,356 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 06:13:04,356 INFO L408 AbstractCegarLoop]: === Iteration 10 === [mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr4RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr5RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr3RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr0RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr2RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr6RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr1RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr7RequiresViolation]=== [2018-04-12 06:13:04,356 INFO L82 PathProgramCache]: Analyzing trace with hash -428535111, now seen corresponding path program 1 times [2018-04-12 06:13:04,356 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-12 06:13:04,356 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-12 06:13:04,357 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 06:13:04,357 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 06:13:04,357 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 06:13:04,363 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 06:13:04,363 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 06:13:04,395 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 06:13:04,395 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 06:13:04,395 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-04-12 06:13:04,395 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-04-12 06:13:04,396 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-04-12 06:13:04,396 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-04-12 06:13:04,396 INFO L87 Difference]: Start difference. First operand 94 states and 114 transitions. Second operand 5 states. [2018-04-12 06:13:04,430 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 06:13:04,430 INFO L93 Difference]: Finished difference Result 105 states and 124 transitions. [2018-04-12 06:13:04,430 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-04-12 06:13:04,430 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 28 [2018-04-12 06:13:04,430 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 06:13:04,431 INFO L225 Difference]: With dead ends: 105 [2018-04-12 06:13:04,431 INFO L226 Difference]: Without dead ends: 101 [2018-04-12 06:13:04,431 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-04-12 06:13:04,431 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 101 states. [2018-04-12 06:13:04,434 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 101 to 94. [2018-04-12 06:13:04,434 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 94 states. [2018-04-12 06:13:04,435 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 94 states to 94 states and 112 transitions. [2018-04-12 06:13:04,435 INFO L78 Accepts]: Start accepts. Automaton has 94 states and 112 transitions. Word has length 28 [2018-04-12 06:13:04,435 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 06:13:04,435 INFO L459 AbstractCegarLoop]: Abstraction has 94 states and 112 transitions. [2018-04-12 06:13:04,435 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-04-12 06:13:04,435 INFO L276 IsEmpty]: Start isEmpty. Operand 94 states and 112 transitions. [2018-04-12 06:13:04,436 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2018-04-12 06:13:04,436 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 06:13:04,436 INFO L355 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 06:13:04,436 INFO L408 AbstractCegarLoop]: === Iteration 11 === [mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr4RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr5RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr3RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr0RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr2RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr6RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr1RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr7RequiresViolation]=== [2018-04-12 06:13:04,437 INFO L82 PathProgramCache]: Analyzing trace with hash -468822239, now seen corresponding path program 1 times [2018-04-12 06:13:04,437 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-12 06:13:04,437 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-12 06:13:04,437 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 06:13:04,437 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 06:13:04,437 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 06:13:04,445 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 06:13:04,446 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 06:13:04,529 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-04-12 06:13:04,529 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 06:13:04,530 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-04-12 06:13:04,530 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-04-12 06:13:04,530 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-04-12 06:13:04,530 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-04-12 06:13:04,530 INFO L87 Difference]: Start difference. First operand 94 states and 112 transitions. Second operand 7 states. [2018-04-12 06:13:04,606 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 06:13:04,606 INFO L93 Difference]: Finished difference Result 130 states and 158 transitions. [2018-04-12 06:13:04,606 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-04-12 06:13:04,606 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 28 [2018-04-12 06:13:04,606 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 06:13:04,607 INFO L225 Difference]: With dead ends: 130 [2018-04-12 06:13:04,607 INFO L226 Difference]: Without dead ends: 130 [2018-04-12 06:13:04,607 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=50, Unknown=0, NotChecked=0, Total=72 [2018-04-12 06:13:04,607 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 130 states. [2018-04-12 06:13:04,612 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 130 to 122. [2018-04-12 06:13:04,613 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 122 states. [2018-04-12 06:13:04,613 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 122 states to 122 states and 152 transitions. [2018-04-12 06:13:04,614 INFO L78 Accepts]: Start accepts. Automaton has 122 states and 152 transitions. Word has length 28 [2018-04-12 06:13:04,614 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 06:13:04,614 INFO L459 AbstractCegarLoop]: Abstraction has 122 states and 152 transitions. [2018-04-12 06:13:04,614 INFO L460 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-04-12 06:13:04,614 INFO L276 IsEmpty]: Start isEmpty. Operand 122 states and 152 transitions. [2018-04-12 06:13:04,615 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-04-12 06:13:04,615 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 06:13:04,615 INFO L355 BasicCegarLoop]: trace histogram [3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 06:13:04,615 INFO L408 AbstractCegarLoop]: === Iteration 12 === [mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr4RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr5RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr3RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr0RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr2RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr6RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr1RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr7RequiresViolation]=== [2018-04-12 06:13:04,615 INFO L82 PathProgramCache]: Analyzing trace with hash -472485569, now seen corresponding path program 1 times [2018-04-12 06:13:04,615 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-12 06:13:04,616 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-12 06:13:04,616 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 06:13:04,616 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 06:13:04,616 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 06:13:04,621 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 06:13:04,622 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 06:13:04,635 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 7 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-04-12 06:13:04,635 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 06:13:04,635 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-04-12 06:13:04,635 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-04-12 06:13:04,636 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-04-12 06:13:04,636 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-04-12 06:13:04,636 INFO L87 Difference]: Start difference. First operand 122 states and 152 transitions. Second operand 3 states. [2018-04-12 06:13:04,647 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 06:13:04,647 INFO L93 Difference]: Finished difference Result 144 states and 179 transitions. [2018-04-12 06:13:04,647 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-04-12 06:13:04,647 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 32 [2018-04-12 06:13:04,648 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 06:13:04,648 INFO L225 Difference]: With dead ends: 144 [2018-04-12 06:13:04,648 INFO L226 Difference]: Without dead ends: 144 [2018-04-12 06:13:04,649 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-04-12 06:13:04,649 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 144 states. [2018-04-12 06:13:04,651 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 144 to 134. [2018-04-12 06:13:04,652 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 134 states. [2018-04-12 06:13:04,652 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 134 states to 134 states and 167 transitions. [2018-04-12 06:13:04,652 INFO L78 Accepts]: Start accepts. Automaton has 134 states and 167 transitions. Word has length 32 [2018-04-12 06:13:04,653 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 06:13:04,653 INFO L459 AbstractCegarLoop]: Abstraction has 134 states and 167 transitions. [2018-04-12 06:13:04,653 INFO L460 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-04-12 06:13:04,653 INFO L276 IsEmpty]: Start isEmpty. Operand 134 states and 167 transitions. [2018-04-12 06:13:04,654 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-04-12 06:13:04,654 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 06:13:04,654 INFO L355 BasicCegarLoop]: trace histogram [3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 06:13:04,654 INFO L408 AbstractCegarLoop]: === Iteration 13 === [mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr4RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr5RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr3RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr0RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr2RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr6RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr1RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr7RequiresViolation]=== [2018-04-12 06:13:04,654 INFO L82 PathProgramCache]: Analyzing trace with hash -79458559, now seen corresponding path program 1 times [2018-04-12 06:13:04,654 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-12 06:13:04,654 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-12 06:13:04,655 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 06:13:04,655 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 06:13:04,655 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 06:13:04,661 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 06:13:04,662 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 06:13:04,665 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-12 06:13:04,665 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-12 06:13:04,665 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-12 06:13:04,666 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 06:13:04,681 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 06:13:04,683 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 06:13:04,688 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-12 06:13:04,688 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 06:13:04,694 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-12 06:13:04,695 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 06:13:04,700 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 06:13:04,700 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:18, output treesize:16 [2018-04-12 06:13:04,720 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:13:04,722 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 19 [2018-04-12 06:13:04,722 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 06:13:04,742 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:13:04,743 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:13:04,744 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-04-12 06:13:04,744 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 06:13:04,751 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-04-12 06:13:04,751 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:29, output treesize:22 [2018-04-12 06:13:04,782 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 23 treesize of output 30 [2018-04-12 06:13:04,783 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 2 xjuncts. [2018-04-12 06:13:04,803 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-1 vars, End of recursive call: 4 dim-0 vars, and 2 xjuncts. [2018-04-12 06:13:04,804 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 4 variables, input treesize:30, output treesize:52 [2018-04-12 06:13:04,948 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 4 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 06:13:04,948 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-12 06:13:04,948 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9] total 9 [2018-04-12 06:13:04,949 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-04-12 06:13:04,949 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-04-12 06:13:04,949 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=70, Unknown=0, NotChecked=0, Total=90 [2018-04-12 06:13:04,949 INFO L87 Difference]: Start difference. First operand 134 states and 167 transitions. Second operand 10 states. [2018-04-12 06:13:05,258 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 06:13:05,258 INFO L93 Difference]: Finished difference Result 142 states and 169 transitions. [2018-04-12 06:13:05,259 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-04-12 06:13:05,259 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 32 [2018-04-12 06:13:05,259 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 06:13:05,259 INFO L225 Difference]: With dead ends: 142 [2018-04-12 06:13:05,259 INFO L226 Difference]: Without dead ends: 142 [2018-04-12 06:13:05,260 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 37 GetRequests, 22 SyntacticMatches, 1 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=58, Invalid=182, Unknown=0, NotChecked=0, Total=240 [2018-04-12 06:13:05,260 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 142 states. [2018-04-12 06:13:05,262 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 142 to 108. [2018-04-12 06:13:05,263 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 108 states. [2018-04-12 06:13:05,263 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 108 states to 108 states and 128 transitions. [2018-04-12 06:13:05,263 INFO L78 Accepts]: Start accepts. Automaton has 108 states and 128 transitions. Word has length 32 [2018-04-12 06:13:05,263 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 06:13:05,264 INFO L459 AbstractCegarLoop]: Abstraction has 108 states and 128 transitions. [2018-04-12 06:13:05,264 INFO L460 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-04-12 06:13:05,264 INFO L276 IsEmpty]: Start isEmpty. Operand 108 states and 128 transitions. [2018-04-12 06:13:05,265 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2018-04-12 06:13:05,265 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 06:13:05,265 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 06:13:05,265 INFO L408 AbstractCegarLoop]: === Iteration 14 === [mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr4RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr5RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr3RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr0RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr2RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr6RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr1RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr7RequiresViolation]=== [2018-04-12 06:13:05,265 INFO L82 PathProgramCache]: Analyzing trace with hash 1586510747, now seen corresponding path program 1 times [2018-04-12 06:13:05,265 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-12 06:13:05,265 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-12 06:13:05,266 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 06:13:05,266 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 06:13:05,266 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 06:13:05,274 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 06:13:05,275 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 06:13:05,277 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-12 06:13:05,277 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-12 06:13:05,278 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-12 06:13:05,278 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 06:13:05,293 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 06:13:05,299 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 06:13:05,342 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:13:05,342 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 38 [2018-04-12 06:13:05,356 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:13:05,356 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:13:05,357 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 42 [2018-04-12 06:13:05,359 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 34 [2018-04-12 06:13:05,359 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-12 06:13:05,365 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 06:13:05,370 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 06:13:05,376 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-1 vars, End of recursive call: 3 dim-0 vars, and 1 xjuncts. [2018-04-12 06:13:05,376 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 4 variables, input treesize:37, output treesize:28 [2018-04-12 06:13:05,423 WARN L1033 $PredicateComparison]: unable to prove that (exists ((|main_#t~malloc11.base| Int) (|main_#t~malloc10.base| Int)) (let ((.cse1 (store |c_old(#valid)| |main_#t~malloc10.base| 1))) (let ((.cse0 (store .cse1 |main_#t~malloc11.base| 1))) (and (= 0 (select |c_old(#valid)| |main_#t~malloc10.base|)) (= (store (store (store .cse0 |c_main_#t~malloc12.base| 1) |main_#t~malloc10.base| 0) |main_#t~malloc11.base| 0) |c_#valid|) (= (select .cse0 |c_main_#t~malloc12.base|) 0) (= (select .cse1 |main_#t~malloc11.base|) 0))))) is different from true [2018-04-12 06:13:05,433 WARN L1033 $PredicateComparison]: unable to prove that (exists ((|main_#t~malloc11.base| Int) (|main_#t~malloc10.base| Int) (|main_#t~malloc12.base| Int)) (let ((.cse1 (store |c_old(#valid)| |main_#t~malloc10.base| 1))) (let ((.cse0 (store .cse1 |main_#t~malloc11.base| 1))) (and (= 0 (select |c_old(#valid)| |main_#t~malloc10.base|)) (= (select .cse0 |main_#t~malloc12.base|) 0) (= |c_#valid| (store (store (store (store .cse0 |main_#t~malloc12.base| 1) |main_#t~malloc10.base| 0) |main_#t~malloc11.base| 0) |main_#t~malloc12.base| 0)) (= (select .cse1 |main_#t~malloc11.base|) 0))))) is different from true [2018-04-12 06:13:05,441 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-04-12 06:13:05,441 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 06:13:05,441 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-04-12 06:13:05,442 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-04-12 06:13:05,442 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-04-12 06:13:05,442 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=43, Unknown=3, NotChecked=26, Total=90 [2018-04-12 06:13:05,442 INFO L87 Difference]: Start difference. First operand 108 states and 128 transitions. Second operand 10 states. [2018-04-12 06:13:05,585 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 06:13:05,585 INFO L93 Difference]: Finished difference Result 107 states and 127 transitions. [2018-04-12 06:13:05,585 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-04-12 06:13:05,585 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 39 [2018-04-12 06:13:05,585 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 06:13:05,585 INFO L225 Difference]: With dead ends: 107 [2018-04-12 06:13:05,585 INFO L226 Difference]: Without dead ends: 95 [2018-04-12 06:13:05,586 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 39 GetRequests, 29 SyntacticMatches, 1 SemanticMatches, 9 ConstructedPredicates, 2 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=55, Unknown=3, NotChecked=30, Total=110 [2018-04-12 06:13:05,586 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 95 states. [2018-04-12 06:13:05,587 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 95 to 91. [2018-04-12 06:13:05,587 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 91 states. [2018-04-12 06:13:05,587 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 91 states to 91 states and 108 transitions. [2018-04-12 06:13:05,587 INFO L78 Accepts]: Start accepts. Automaton has 91 states and 108 transitions. Word has length 39 [2018-04-12 06:13:05,588 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 06:13:05,588 INFO L459 AbstractCegarLoop]: Abstraction has 91 states and 108 transitions. [2018-04-12 06:13:05,588 INFO L460 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-04-12 06:13:05,588 INFO L276 IsEmpty]: Start isEmpty. Operand 91 states and 108 transitions. [2018-04-12 06:13:05,588 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-04-12 06:13:05,588 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 06:13:05,588 INFO L355 BasicCegarLoop]: trace histogram [4, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 06:13:05,588 INFO L408 AbstractCegarLoop]: === Iteration 15 === [mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr4RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr5RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr3RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr0RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr2RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr6RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr1RequiresViolation, __U_MULTI_fdiff_alloca_true_valid_memsafety_true_termination_i__diffErr7RequiresViolation]=== [2018-04-12 06:13:05,588 INFO L82 PathProgramCache]: Analyzing trace with hash 994133498, now seen corresponding path program 1 times [2018-04-12 06:13:05,589 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-12 06:13:05,589 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-12 06:13:05,589 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 06:13:05,589 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 06:13:05,589 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 06:13:05,595 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 06:13:05,595 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 06:13:05,758 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 0 proven. 18 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-04-12 06:13:05,758 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-12 06:13:05,758 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-12 06:13:05,759 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 06:13:05,787 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 06:13:05,790 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 06:13:05,793 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-12 06:13:05,794 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 06:13:05,797 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 06:13:05,797 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:12, output treesize:11 [2018-04-12 06:13:06,061 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-04-12 06:13:06,062 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 06:13:06,062 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 9] total 20 [2018-04-12 06:13:06,062 INFO L442 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-04-12 06:13:06,062 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-04-12 06:13:06,063 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=48, Invalid=372, Unknown=0, NotChecked=0, Total=420 [2018-04-12 06:13:06,063 INFO L87 Difference]: Start difference. First operand 91 states and 108 transitions. Second operand 21 states. [2018-04-12 06:13:06,718 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 06:13:06,718 INFO L93 Difference]: Finished difference Result 138 states and 161 transitions. [2018-04-12 06:13:06,718 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-04-12 06:13:06,718 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 42 [2018-04-12 06:13:06,718 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 06:13:06,718 INFO L225 Difference]: With dead ends: 138 [2018-04-12 06:13:06,718 INFO L226 Difference]: Without dead ends: 0 [2018-04-12 06:13:06,719 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 65 GetRequests, 34 SyntacticMatches, 1 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 157 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=144, Invalid=848, Unknown=0, NotChecked=0, Total=992 [2018-04-12 06:13:06,719 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 0 states. [2018-04-12 06:13:06,719 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 0 to 0. [2018-04-12 06:13:06,719 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 0 states. [2018-04-12 06:13:06,719 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 0 states to 0 states and 0 transitions. [2018-04-12 06:13:06,720 INFO L78 Accepts]: Start accepts. Automaton has 0 states and 0 transitions. Word has length 42 [2018-04-12 06:13:06,720 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 06:13:06,720 INFO L459 AbstractCegarLoop]: Abstraction has 0 states and 0 transitions. [2018-04-12 06:13:06,720 INFO L460 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-04-12 06:13:06,720 INFO L276 IsEmpty]: Start isEmpty. Operand 0 states and 0 transitions. [2018-04-12 06:13:06,720 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-04-12 06:13:06,724 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 12.04 06:13:06 BoogieIcfgContainer [2018-04-12 06:13:06,724 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-04-12 06:13:06,725 INFO L168 Benchmark]: Toolchain (without parser) took 6928.73 ms. Allocated memory was 482.3 MB in the beginning and 858.3 MB in the end (delta: 375.9 MB). Free memory was 418.6 MB in the beginning and 773.9 MB in the end (delta: -355.3 MB). Peak memory consumption was 20.6 MB. Max. memory is 5.3 GB. [2018-04-12 06:13:06,726 INFO L168 Benchmark]: CDTParser took 0.19 ms. Allocated memory is still 482.3 MB. Free memory is still 447.2 MB. There was no memory consumed. Max. memory is 5.3 GB. [2018-04-12 06:13:06,726 INFO L168 Benchmark]: CACSL2BoogieTranslator took 262.96 ms. Allocated memory is still 482.3 MB. Free memory was 417.2 MB in the beginning and 392.2 MB in the end (delta: 25.0 MB). Peak memory consumption was 25.0 MB. Max. memory is 5.3 GB. [2018-04-12 06:13:06,726 INFO L168 Benchmark]: Boogie Preprocessor took 35.60 ms. Allocated memory is still 482.3 MB. Free memory was 392.2 MB in the beginning and 390.9 MB in the end (delta: 1.3 MB). Peak memory consumption was 1.3 MB. Max. memory is 5.3 GB. [2018-04-12 06:13:06,727 INFO L168 Benchmark]: RCFGBuilder took 385.42 ms. Allocated memory was 482.3 MB in the beginning and 593.0 MB in the end (delta: 110.6 MB). Free memory was 389.6 MB in the beginning and 520.9 MB in the end (delta: -131.3 MB). Peak memory consumption was 33.7 MB. Max. memory is 5.3 GB. [2018-04-12 06:13:06,727 INFO L168 Benchmark]: TraceAbstraction took 6241.93 ms. Allocated memory was 593.0 MB in the beginning and 858.3 MB in the end (delta: 265.3 MB). Free memory was 520.9 MB in the beginning and 773.9 MB in the end (delta: -253.0 MB). Peak memory consumption was 12.3 MB. Max. memory is 5.3 GB. [2018-04-12 06:13:06,728 INFO L344 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.19 ms. Allocated memory is still 482.3 MB. Free memory is still 447.2 MB. There was no memory consumed. Max. memory is 5.3 GB. * CACSL2BoogieTranslator took 262.96 ms. Allocated memory is still 482.3 MB. Free memory was 417.2 MB in the beginning and 392.2 MB in the end (delta: 25.0 MB). Peak memory consumption was 25.0 MB. Max. memory is 5.3 GB. * Boogie Preprocessor took 35.60 ms. Allocated memory is still 482.3 MB. Free memory was 392.2 MB in the beginning and 390.9 MB in the end (delta: 1.3 MB). Peak memory consumption was 1.3 MB. Max. memory is 5.3 GB. * RCFGBuilder took 385.42 ms. Allocated memory was 482.3 MB in the beginning and 593.0 MB in the end (delta: 110.6 MB). Free memory was 389.6 MB in the beginning and 520.9 MB in the end (delta: -131.3 MB). Peak memory consumption was 33.7 MB. Max. memory is 5.3 GB. * TraceAbstraction took 6241.93 ms. Allocated memory was 593.0 MB in the beginning and 858.3 MB in the end (delta: 265.3 MB). Free memory was 520.9 MB in the beginning and 773.9 MB in the end (delta: -253.0 MB). Peak memory consumption was 12.3 MB. Max. memory is 5.3 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - PositiveResult [Line: 564]: all allocated memory was freed For all program executions holds that all allocated memory was freed at this location - PositiveResult [Line: 558]: pointer dereference always succeeds For all program executions holds that pointer dereference always succeeds at this location - PositiveResult [Line: 558]: pointer dereference always succeeds For all program executions holds that pointer dereference always succeeds at this location - PositiveResult [Line: 551]: pointer dereference always succeeds For all program executions holds that pointer dereference always succeeds at this location - PositiveResult [Line: 551]: pointer dereference always succeeds For all program executions holds that pointer dereference always succeeds at this location - PositiveResult [Line: 551]: pointer dereference always succeeds For all program executions holds that pointer dereference always succeeds at this location - PositiveResult [Line: 558]: pointer dereference always succeeds For all program executions holds that pointer dereference always succeeds at this location - PositiveResult [Line: 551]: pointer dereference always succeeds For all program executions holds that pointer dereference always succeeds at this location - PositiveResult [Line: 558]: pointer dereference always succeeds For all program executions holds that pointer dereference always succeeds at this location - AllSpecificationsHoldResult: All specifications hold 9 specifications checked. All of them hold - StatisticsResult: Ultimate Automizer benchmark data CFG has 6 procedures, 56 locations, 9 error locations. SAFE Result, 6.2s OverallTime, 15 OverallIterations, 4 TraceHistogramMax, 3.3s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 579 SDtfs, 1211 SDslu, 2037 SDs, 0 SdLazy, 1466 SolverSat, 144 SolverUnsat, 5 SolverUnknown, 0 SolverNotchecked, 1.3s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 366 GetRequests, 203 SyntacticMatches, 5 SemanticMatches, 158 ConstructedPredicates, 2 IntricatePredicates, 0 DeprecatedPredicates, 304 ImplicationChecksByTransitivity, 2.8s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=134occurred in iteration=12, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.0s AutomataMinimizationTime, 15 MinimizatonAttempts, 246 StatesRemovedByMinimization, 11 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.0s SsaConstructionTime, 0.3s SatisfiabilityAnalysisTime, 2.2s InterpolantComputationTime, 682 NumberOfCodeBlocks, 682 NumberOfCodeBlocksAsserted, 25 NumberOfCheckSat, 460 ConstructedInterpolants, 134 QuantifiedInterpolants, 180423 SizeOfPredicates, 64 NumberOfNonLiveVariables, 1453 ConjunctsInSsa, 184 ConjunctsInUnsatCore, 17 InterpolantComputations, 12 PerfectInterpolantSequences, 33/76 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be correct! Written .csv to /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/diff-alloca_true-valid-memsafety_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_SmtInterpol_NoArray.epf_AutomizerC.xml/Csv-Benchmark-0-2018-04-12_06-13-06-735.csv Written .csv to /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/diff-alloca_true-valid-memsafety_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_SmtInterpol_NoArray.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-0-2018-04-12_06-13-06-735.csv Received shutdown request...