java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv --cacsl2boogietranslator.bitprecise.bitfields false -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/cade18-smtinterpol/svcomp-DerefFreeMemtrack-32bit-Automizer_SmtInterpol_NoArray.epf -i ../../../trunk/examples/svcomp/ldv-memsafety/memleaks_test22_3_false-valid-deref.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-666feb3-m [2018-04-12 06:50:46,842 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-04-12 06:50:46,843 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-04-12 06:50:46,855 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-04-12 06:50:46,855 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-04-12 06:50:46,856 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-04-12 06:50:46,857 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-04-12 06:50:46,858 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-04-12 06:50:46,860 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-04-12 06:50:46,861 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-04-12 06:50:46,861 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-04-12 06:50:46,861 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-04-12 06:50:46,862 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-04-12 06:50:46,863 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-04-12 06:50:46,864 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-04-12 06:50:46,865 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-04-12 06:50:46,867 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-04-12 06:50:46,868 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-04-12 06:50:46,869 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-04-12 06:50:46,870 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-04-12 06:50:46,872 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-04-12 06:50:46,872 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-04-12 06:50:46,872 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-04-12 06:50:46,873 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-04-12 06:50:46,874 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-04-12 06:50:46,875 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-04-12 06:50:46,875 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-04-12 06:50:46,875 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-04-12 06:50:46,876 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-04-12 06:50:46,876 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-04-12 06:50:46,876 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-04-12 06:50:46,877 INFO L98 SettingsManager]: Beginning loading settings from /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/cade18-smtinterpol/svcomp-DerefFreeMemtrack-32bit-Automizer_SmtInterpol_NoArray.epf [2018-04-12 06:50:46,897 INFO L110 SettingsManager]: Loading preferences was successful [2018-04-12 06:50:46,897 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-04-12 06:50:46,898 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-04-12 06:50:46,899 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-04-12 06:50:46,899 INFO L133 SettingsManager]: * Use SBE=true [2018-04-12 06:50:46,899 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-04-12 06:50:46,899 INFO L133 SettingsManager]: * sizeof long=4 [2018-04-12 06:50:46,899 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-04-12 06:50:46,899 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-04-12 06:50:46,899 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-04-12 06:50:46,899 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-04-12 06:50:46,900 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-04-12 06:50:46,900 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-04-12 06:50:46,900 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-04-12 06:50:46,900 INFO L133 SettingsManager]: * sizeof long double=12 [2018-04-12 06:50:46,900 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-04-12 06:50:46,900 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-04-12 06:50:46,900 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-04-12 06:50:46,900 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-04-12 06:50:46,900 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-04-12 06:50:46,900 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-04-12 06:50:46,901 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-04-12 06:50:46,901 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-04-12 06:50:46,901 INFO L133 SettingsManager]: * Trace refinement strategy=SMTINTERPOL Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Bitprecise bitfields -> false [2018-04-12 06:50:46,927 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-04-12 06:50:46,934 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully (re)initialized [2018-04-12 06:50:46,937 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-04-12 06:50:46,938 INFO L271 PluginConnector]: Initializing CDTParser... [2018-04-12 06:50:46,938 INFO L276 PluginConnector]: CDTParser initialized [2018-04-12 06:50:46,938 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/ldv-memsafety/memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,215 INFO L225 CDTParser]: Created temporary CDT project at /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/data/FLAGd01ca691d [2018-04-12 06:50:47,373 INFO L287 CDTParser]: IsIndexed: true [2018-04-12 06:50:47,373 INFO L288 CDTParser]: Found 1 translation units. [2018-04-12 06:50:47,374 INFO L168 CDTParser]: Scanning memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,383 INFO L210 ultiparseSymbolTable]: Include resolver: [2018-04-12 06:50:47,383 INFO L215 ultiparseSymbolTable]: [2018-04-12 06:50:47,383 INFO L218 ultiparseSymbolTable]: Function table: [2018-04-12 06:50:47,383 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_del ('__ldv_list_del') in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,384 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_get_drvdata ('ldv_dev_get_drvdata') in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,384 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_add_tail ('ldv_list_add_tail') in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,384 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_submit_msg ('ldv_submit_msg') in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,384 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_create ('ldv_kobject_create') in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,384 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_positive ('ldv_positive') in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,384 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_zalloc ('ldv_zalloc') in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,384 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kref_get ('ldv_kref_get') in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,384 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_put ('ldv_kobject_put') in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,384 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_del ('ldv_kobject_del') in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,385 INFO L221 ultiparseSymbolTable]: Function definition of null ('main') in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,385 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_nonpositive ('ldv_nonpositive') in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,385 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fmemleaks_test_____false_valid_deref_i____bswap_32 ('__bswap_32') in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,385 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_return ('ldv_atomic_sub_return') in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,385 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fmemleaks_test_____false_valid_deref_i__g ('g') in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,385 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fmemleaks_test_____false_valid_deref_i__f ('f') in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,385 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fill ('ldv_msg_fill') in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,385 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_add ('ldv_list_add') in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,385 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_init ('ldv_kobject_init') in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,385 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_alloc ('ldv_msg_alloc') in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,386 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fmemleaks_test_____false_valid_deref_i__entry_point ('entry_point') in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,386 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_init_internal ('ldv_kobject_init_internal') in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,386 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEAD ('LDV_INIT_LIST_HEAD') in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,386 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kref_sub ('ldv_kref_sub') in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,386 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgs ('ldv_destroy_msgs') in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,386 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_release ('ldv_kobject_release') in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,386 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_return ('ldv_atomic_add_return') in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,386 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_add ('__ldv_list_add') in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,386 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kref_init ('ldv_kref_init') in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,386 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_free ('ldv_msg_free') in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,387 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_get ('ldv_kobject_get') in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,387 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_del ('ldv_list_del') in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,387 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kref_put ('ldv_kref_put') in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,387 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fmemleaks_test_____false_valid_deref_i____bswap_64 ('__bswap_64') in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,387 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_set_drvdata ('ldv_dev_set_drvdata') in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,387 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_malloc ('ldv_malloc') in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,387 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanup ('ldv_kobject_cleanup') in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,387 INFO L227 ultiparseSymbolTable]: Global variable table: [2018-04-12 06:50:47,387 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_t in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,387 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____false_valid_deref_i__u_quad_t in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,387 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____false_valid_deref_i____u_char in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,387 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____false_valid_deref_i__u_int32_t in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,387 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____false_valid_deref_i____off64_t in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,387 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____false_valid_deref_i__pthread_key_t in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,388 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____false_valid_deref_i____dev_t in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,388 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____false_valid_deref_i____fsblkcnt_t in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,388 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____false_valid_deref_i__ulong in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,388 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____false_valid_deref_i__lldiv_t in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,388 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____false_valid_deref_i__uid_t in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,388 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____false_valid_deref_i__int16_t in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,388 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____false_valid_deref_i____pthread_list_t in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,388 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____false_valid_deref_i__pthread_barrierattr_t in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,388 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____false_valid_deref_i____caddr_t in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,388 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____false_valid_deref_i__fd_set in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,388 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____false_valid_deref_i__fsblkcnt_t in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,388 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____false_valid_deref_i____rlim64_t in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,388 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____false_valid_deref_i____suseconds_t in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,388 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____false_valid_deref_i__daddr_t in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,388 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____false_valid_deref_i____id_t in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,388 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____false_valid_deref_i____uint16_t in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,388 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____false_valid_deref_i____qaddr_t in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,388 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____false_valid_deref_i__u_int in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,388 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____false_valid_deref_i____syscall_ulong_t in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,389 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____false_valid_deref_i____int32_t in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,389 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____false_valid_deref_i____gid_t in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,389 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____false_valid_deref_i____blksize_t in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,389 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____false_valid_deref_i____syscall_slong_t in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,389 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____false_valid_deref_i__ushort in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,389 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____false_valid_deref_i____fsfilcnt_t in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,389 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____false_valid_deref_i__key_t in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,389 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____false_valid_deref_i____ino64_t in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,389 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____false_valid_deref_i____time_t in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,389 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____false_valid_deref_i__int8_t in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,389 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____false_valid_deref_i__fsfilcnt_t in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,389 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____false_valid_deref_i____ssize_t in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,389 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____false_valid_deref_i____fsfilcnt64_t in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,389 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____false_valid_deref_i__pthread_mutex_t in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,389 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____false_valid_deref_i__idtype_t in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,389 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____false_valid_deref_i__fd_mask in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,389 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____false_valid_deref_i__ino_t in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,389 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____false_valid_deref_i__int32_t in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,389 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____false_valid_deref_i____off_t in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,390 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____false_valid_deref_i__dev_t in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,390 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____false_valid_deref_i____blkcnt64_t in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,390 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____false_valid_deref_i__pthread_rwlockattr_t in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,390 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____false_valid_deref_i__uint in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,390 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____false_valid_deref_i__time_t in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,390 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____false_valid_deref_i__pthread_rwlock_t in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,390 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____false_valid_deref_i____u_int in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,390 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____false_valid_deref_i__sigset_t in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,390 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____false_valid_deref_i____blkcnt_t in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,390 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____false_valid_deref_i__id_t in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,390 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____false_valid_deref_i____uid_t in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,390 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____false_valid_deref_i____sig_atomic_t in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,391 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____false_valid_deref_i__pthread_once_t in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,391 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____false_valid_deref_i__ssize_t in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,391 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____false_valid_deref_i____fsblkcnt64_t in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,391 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____false_valid_deref_i__nlink_t in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,391 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____false_valid_deref_i__timer_t in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,391 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____false_valid_deref_i__register_t in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,391 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____false_valid_deref_i____int64_t in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,391 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____false_valid_deref_i____fsword_t in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,391 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____false_valid_deref_i__wchar_t in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,391 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____false_valid_deref_i__pthread_attr_t in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,391 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____false_valid_deref_i____uint64_t in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,391 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____false_valid_deref_i____useconds_t in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,392 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____false_valid_deref_i____key_t in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,392 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldiv_t in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,392 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____false_valid_deref_i____nlink_t in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,392 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____false_valid_deref_i__loff_t in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,392 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____false_valid_deref_i__clockid_t in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,392 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____false_valid_deref_i__u_int8_t in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,392 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____false_valid_deref_i____uint8_t in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,392 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____false_valid_deref_i____int8_t in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,392 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____false_valid_deref_i__u_int64_t in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,392 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____false_valid_deref_i__fsid_t in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,392 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____false_valid_deref_i__pthread_t in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,393 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____false_valid_deref_i____fd_mask in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,393 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____false_valid_deref_i____clock_t in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,393 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____false_valid_deref_i____daddr_t in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,393 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____false_valid_deref_i__int64_t in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,393 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____false_valid_deref_i__pthread_condattr_t in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,393 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____false_valid_deref_i____WAIT_STATUS in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,393 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____false_valid_deref_i____timer_t in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,393 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____false_valid_deref_i__size_t in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,393 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____false_valid_deref_i____pid_t in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,393 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_global_msg_list in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,394 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____false_valid_deref_i____u_quad_t in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,394 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____false_valid_deref_i____ino_t in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,394 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____false_valid_deref_i____intptr_t in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,394 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____false_valid_deref_i__pthread_mutexattr_t in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,394 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____false_valid_deref_i____loff_t in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,394 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____false_valid_deref_i____sigset_t in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,394 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____false_valid_deref_i____quad_t in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,394 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____false_valid_deref_i____fsid_t in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,394 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____false_valid_deref_i____socklen_t in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,394 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____false_valid_deref_i__mode_t in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,394 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____false_valid_deref_i__suseconds_t in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,394 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____false_valid_deref_i____u_short in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,395 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____false_valid_deref_i__u_long in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,395 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____false_valid_deref_i__clock_t in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,395 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____false_valid_deref_i__pthread_barrier_t in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,395 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____false_valid_deref_i__pid_t in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,395 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____false_valid_deref_i____rlim_t in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,395 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____false_valid_deref_i__gid_t in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,395 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____false_valid_deref_i__off_t in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,395 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____false_valid_deref_i____int16_t in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,395 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____false_valid_deref_i____clockid_t in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,395 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____false_valid_deref_i__u_char in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,395 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____false_valid_deref_i__u_short in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,395 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____false_valid_deref_i__quad_t in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,395 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____false_valid_deref_i__blkcnt_t in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,395 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____false_valid_deref_i__caddr_t in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,396 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____false_valid_deref_i__u_int16_t in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,396 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____false_valid_deref_i____mode_t in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,396 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____false_valid_deref_i__pthread_cond_t in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,396 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____false_valid_deref_i____uint32_t in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,396 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____false_valid_deref_i__div_t in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,396 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____false_valid_deref_i____u_long in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,396 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____false_valid_deref_i__blksize_t in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,396 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____false_valid_deref_i__pthread_spinlock_t in memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:47,413 INFO L330 CDTParser]: Deleted temporary CDT project at /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/data/FLAGd01ca691d [2018-04-12 06:50:47,417 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-04-12 06:50:47,418 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-04-12 06:50:47,419 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-04-12 06:50:47,419 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-04-12 06:50:47,422 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-04-12 06:50:47,423 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 12.04 06:50:47" (1/1) ... [2018-04-12 06:50:47,424 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@415925e0 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 06:50:47, skipping insertion in model container [2018-04-12 06:50:47,424 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 12.04 06:50:47" (1/1) ... [2018-04-12 06:50:47,435 INFO L167 Dispatcher]: Using SV-COMP mode [2018-04-12 06:50:47,463 INFO L167 Dispatcher]: Using SV-COMP mode [2018-04-12 06:50:47,651 INFO L175 PostProcessor]: Settings: Checked method=main [2018-04-12 06:50:47,704 INFO L175 PostProcessor]: Settings: Checked method=main [2018-04-12 06:50:47,712 INFO L100 SccComputation]: Graph consists of 0 InCaSumBalls and 155 non ball SCCs. Number of states in SCCs 155. [2018-04-12 06:50:47,770 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 06:50:47 WrapperNode [2018-04-12 06:50:47,770 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-04-12 06:50:47,771 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-04-12 06:50:47,771 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-04-12 06:50:47,771 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-04-12 06:50:47,782 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 06:50:47" (1/1) ... [2018-04-12 06:50:47,782 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 06:50:47" (1/1) ... [2018-04-12 06:50:47,797 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 06:50:47" (1/1) ... [2018-04-12 06:50:47,798 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 06:50:47" (1/1) ... [2018-04-12 06:50:47,812 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 06:50:47" (1/1) ... [2018-04-12 06:50:47,815 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 06:50:47" (1/1) ... [2018-04-12 06:50:47,818 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 06:50:47" (1/1) ... [2018-04-12 06:50:47,823 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-04-12 06:50:47,824 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-04-12 06:50:47,824 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-04-12 06:50:47,824 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-04-12 06:50:47,824 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 06:50:47" (1/1) ... No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-04-12 06:50:47,912 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-04-12 06:50:47,912 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-04-12 06:50:47,912 INFO L136 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~TO~VOID [2018-04-12 06:50:47,912 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fmemleaks_test_____false_valid_deref_i____bswap_32 [2018-04-12 06:50:47,912 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fmemleaks_test_____false_valid_deref_i____bswap_64 [2018-04-12 06:50:47,912 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_nonpositive [2018-04-12 06:50:47,912 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_positive [2018-04-12 06:50:47,912 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_malloc [2018-04-12 06:50:47,912 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_zalloc [2018-04-12 06:50:47,912 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEAD [2018-04-12 06:50:47,912 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_add [2018-04-12 06:50:47,913 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_del [2018-04-12 06:50:47,913 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_add [2018-04-12 06:50:47,913 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_add_tail [2018-04-12 06:50:47,913 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_del [2018-04-12 06:50:47,913 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_alloc [2018-04-12 06:50:47,913 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fill [2018-04-12 06:50:47,913 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_free [2018-04-12 06:50:47,913 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_submit_msg [2018-04-12 06:50:47,913 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgs [2018-04-12 06:50:47,913 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_get_drvdata [2018-04-12 06:50:47,913 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_set_drvdata [2018-04-12 06:50:47,913 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_return [2018-04-12 06:50:47,913 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_return [2018-04-12 06:50:47,913 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kref_sub [2018-04-12 06:50:47,914 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kref_init [2018-04-12 06:50:47,914 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kref_get [2018-04-12 06:50:47,914 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kref_put [2018-04-12 06:50:47,914 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_del [2018-04-12 06:50:47,914 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanup [2018-04-12 06:50:47,914 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_release [2018-04-12 06:50:47,914 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_put [2018-04-12 06:50:47,914 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_get [2018-04-12 06:50:47,914 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_init_internal [2018-04-12 06:50:47,915 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_init [2018-04-12 06:50:47,915 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_create [2018-04-12 06:50:47,915 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fmemleaks_test_____false_valid_deref_i__f [2018-04-12 06:50:47,915 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fmemleaks_test_____false_valid_deref_i__g [2018-04-12 06:50:47,915 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fmemleaks_test_____false_valid_deref_i__entry_point [2018-04-12 06:50:47,915 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-04-12 06:50:47,915 INFO L136 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2018-04-12 06:50:47,915 INFO L136 BoogieDeclarations]: Found implementation of procedure #Ultimate.meminit [2018-04-12 06:50:47,915 INFO L136 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memcpy [2018-04-12 06:50:47,916 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fmemleaks_test_____false_valid_deref_i____bswap_32 [2018-04-12 06:50:47,916 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fmemleaks_test_____false_valid_deref_i____bswap_64 [2018-04-12 06:50:47,916 INFO L128 BoogieDeclarations]: Found specification of procedure __ctype_get_mb_cur_max [2018-04-12 06:50:47,916 INFO L128 BoogieDeclarations]: Found specification of procedure atof [2018-04-12 06:50:47,916 INFO L128 BoogieDeclarations]: Found specification of procedure atoi [2018-04-12 06:50:47,916 INFO L128 BoogieDeclarations]: Found specification of procedure atol [2018-04-12 06:50:47,916 INFO L128 BoogieDeclarations]: Found specification of procedure atoll [2018-04-12 06:50:47,916 INFO L128 BoogieDeclarations]: Found specification of procedure strtod [2018-04-12 06:50:47,916 INFO L128 BoogieDeclarations]: Found specification of procedure strtof [2018-04-12 06:50:47,916 INFO L128 BoogieDeclarations]: Found specification of procedure strtold [2018-04-12 06:50:47,917 INFO L128 BoogieDeclarations]: Found specification of procedure strtol [2018-04-12 06:50:47,917 INFO L128 BoogieDeclarations]: Found specification of procedure strtoul [2018-04-12 06:50:47,917 INFO L128 BoogieDeclarations]: Found specification of procedure strtoq [2018-04-12 06:50:47,917 INFO L128 BoogieDeclarations]: Found specification of procedure strtouq [2018-04-12 06:50:47,917 INFO L128 BoogieDeclarations]: Found specification of procedure strtoll [2018-04-12 06:50:47,917 INFO L128 BoogieDeclarations]: Found specification of procedure strtoull [2018-04-12 06:50:47,917 INFO L128 BoogieDeclarations]: Found specification of procedure l64a [2018-04-12 06:50:47,917 INFO L128 BoogieDeclarations]: Found specification of procedure a64l [2018-04-12 06:50:47,917 INFO L128 BoogieDeclarations]: Found specification of procedure select [2018-04-12 06:50:47,917 INFO L128 BoogieDeclarations]: Found specification of procedure pselect [2018-04-12 06:50:47,918 INFO L128 BoogieDeclarations]: Found specification of procedure gnu_dev_major [2018-04-12 06:50:47,918 INFO L128 BoogieDeclarations]: Found specification of procedure gnu_dev_minor [2018-04-12 06:50:47,918 INFO L128 BoogieDeclarations]: Found specification of procedure gnu_dev_makedev [2018-04-12 06:50:47,918 INFO L128 BoogieDeclarations]: Found specification of procedure random [2018-04-12 06:50:47,918 INFO L128 BoogieDeclarations]: Found specification of procedure srandom [2018-04-12 06:50:47,918 INFO L128 BoogieDeclarations]: Found specification of procedure initstate [2018-04-12 06:50:47,918 INFO L128 BoogieDeclarations]: Found specification of procedure setstate [2018-04-12 06:50:47,918 INFO L128 BoogieDeclarations]: Found specification of procedure random_r [2018-04-12 06:50:47,918 INFO L128 BoogieDeclarations]: Found specification of procedure srandom_r [2018-04-12 06:50:47,918 INFO L128 BoogieDeclarations]: Found specification of procedure initstate_r [2018-04-12 06:50:47,918 INFO L128 BoogieDeclarations]: Found specification of procedure setstate_r [2018-04-12 06:50:47,919 INFO L128 BoogieDeclarations]: Found specification of procedure rand [2018-04-12 06:50:47,919 INFO L128 BoogieDeclarations]: Found specification of procedure srand [2018-04-12 06:50:47,919 INFO L128 BoogieDeclarations]: Found specification of procedure rand_r [2018-04-12 06:50:47,919 INFO L128 BoogieDeclarations]: Found specification of procedure drand48 [2018-04-12 06:50:47,919 INFO L128 BoogieDeclarations]: Found specification of procedure erand48 [2018-04-12 06:50:47,919 INFO L128 BoogieDeclarations]: Found specification of procedure lrand48 [2018-04-12 06:50:47,919 INFO L128 BoogieDeclarations]: Found specification of procedure nrand48 [2018-04-12 06:50:47,919 INFO L128 BoogieDeclarations]: Found specification of procedure mrand48 [2018-04-12 06:50:47,919 INFO L128 BoogieDeclarations]: Found specification of procedure jrand48 [2018-04-12 06:50:47,919 INFO L128 BoogieDeclarations]: Found specification of procedure srand48 [2018-04-12 06:50:47,919 INFO L128 BoogieDeclarations]: Found specification of procedure seed48 [2018-04-12 06:50:47,920 INFO L128 BoogieDeclarations]: Found specification of procedure lcong48 [2018-04-12 06:50:47,920 INFO L128 BoogieDeclarations]: Found specification of procedure drand48_r [2018-04-12 06:50:47,920 INFO L128 BoogieDeclarations]: Found specification of procedure erand48_r [2018-04-12 06:50:47,920 INFO L128 BoogieDeclarations]: Found specification of procedure lrand48_r [2018-04-12 06:50:47,920 INFO L128 BoogieDeclarations]: Found specification of procedure nrand48_r [2018-04-12 06:50:47,920 INFO L128 BoogieDeclarations]: Found specification of procedure mrand48_r [2018-04-12 06:50:47,920 INFO L128 BoogieDeclarations]: Found specification of procedure jrand48_r [2018-04-12 06:50:47,920 INFO L128 BoogieDeclarations]: Found specification of procedure srand48_r [2018-04-12 06:50:47,920 INFO L128 BoogieDeclarations]: Found specification of procedure seed48_r [2018-04-12 06:50:47,920 INFO L128 BoogieDeclarations]: Found specification of procedure lcong48_r [2018-04-12 06:50:47,920 INFO L128 BoogieDeclarations]: Found specification of procedure malloc [2018-04-12 06:50:47,921 INFO L128 BoogieDeclarations]: Found specification of procedure calloc [2018-04-12 06:50:47,921 INFO L128 BoogieDeclarations]: Found specification of procedure realloc [2018-04-12 06:50:47,921 INFO L128 BoogieDeclarations]: Found specification of procedure free [2018-04-12 06:50:47,921 INFO L128 BoogieDeclarations]: Found specification of procedure cfree [2018-04-12 06:50:47,921 INFO L128 BoogieDeclarations]: Found specification of procedure alloca [2018-04-12 06:50:47,921 INFO L128 BoogieDeclarations]: Found specification of procedure valloc [2018-04-12 06:50:47,921 INFO L128 BoogieDeclarations]: Found specification of procedure posix_memalign [2018-04-12 06:50:47,921 INFO L128 BoogieDeclarations]: Found specification of procedure abort [2018-04-12 06:50:47,921 INFO L128 BoogieDeclarations]: Found specification of procedure atexit [2018-04-12 06:50:47,921 INFO L128 BoogieDeclarations]: Found specification of procedure on_exit [2018-04-12 06:50:47,921 INFO L128 BoogieDeclarations]: Found specification of procedure exit [2018-04-12 06:50:47,922 INFO L128 BoogieDeclarations]: Found specification of procedure _Exit [2018-04-12 06:50:47,922 INFO L128 BoogieDeclarations]: Found specification of procedure getenv [2018-04-12 06:50:47,922 INFO L128 BoogieDeclarations]: Found specification of procedure putenv [2018-04-12 06:50:47,922 INFO L128 BoogieDeclarations]: Found specification of procedure setenv [2018-04-12 06:50:47,922 INFO L128 BoogieDeclarations]: Found specification of procedure unsetenv [2018-04-12 06:50:47,922 INFO L128 BoogieDeclarations]: Found specification of procedure clearenv [2018-04-12 06:50:47,922 INFO L128 BoogieDeclarations]: Found specification of procedure mktemp [2018-04-12 06:50:47,922 INFO L128 BoogieDeclarations]: Found specification of procedure mkstemp [2018-04-12 06:50:47,922 INFO L128 BoogieDeclarations]: Found specification of procedure mkstemps [2018-04-12 06:50:47,922 INFO L128 BoogieDeclarations]: Found specification of procedure mkdtemp [2018-04-12 06:50:47,923 INFO L128 BoogieDeclarations]: Found specification of procedure system [2018-04-12 06:50:47,923 INFO L128 BoogieDeclarations]: Found specification of procedure realpath [2018-04-12 06:50:47,923 INFO L128 BoogieDeclarations]: Found specification of procedure bsearch [2018-04-12 06:50:47,923 INFO L128 BoogieDeclarations]: Found specification of procedure qsort [2018-04-12 06:50:47,923 INFO L128 BoogieDeclarations]: Found specification of procedure abs [2018-04-12 06:50:47,923 INFO L128 BoogieDeclarations]: Found specification of procedure labs [2018-04-12 06:50:47,923 INFO L128 BoogieDeclarations]: Found specification of procedure llabs [2018-04-12 06:50:47,923 INFO L128 BoogieDeclarations]: Found specification of procedure div [2018-04-12 06:50:47,923 INFO L128 BoogieDeclarations]: Found specification of procedure ldiv [2018-04-12 06:50:47,923 INFO L128 BoogieDeclarations]: Found specification of procedure lldiv [2018-04-12 06:50:47,923 INFO L128 BoogieDeclarations]: Found specification of procedure ecvt [2018-04-12 06:50:47,924 INFO L128 BoogieDeclarations]: Found specification of procedure fcvt [2018-04-12 06:50:47,924 INFO L128 BoogieDeclarations]: Found specification of procedure gcvt [2018-04-12 06:50:47,924 INFO L128 BoogieDeclarations]: Found specification of procedure qecvt [2018-04-12 06:50:47,924 INFO L128 BoogieDeclarations]: Found specification of procedure qfcvt [2018-04-12 06:50:47,924 INFO L128 BoogieDeclarations]: Found specification of procedure qgcvt [2018-04-12 06:50:47,924 INFO L128 BoogieDeclarations]: Found specification of procedure ecvt_r [2018-04-12 06:50:47,924 INFO L128 BoogieDeclarations]: Found specification of procedure fcvt_r [2018-04-12 06:50:47,924 INFO L128 BoogieDeclarations]: Found specification of procedure qecvt_r [2018-04-12 06:50:47,924 INFO L128 BoogieDeclarations]: Found specification of procedure qfcvt_r [2018-04-12 06:50:47,924 INFO L128 BoogieDeclarations]: Found specification of procedure mblen [2018-04-12 06:50:47,924 INFO L128 BoogieDeclarations]: Found specification of procedure mbtowc [2018-04-12 06:50:47,925 INFO L128 BoogieDeclarations]: Found specification of procedure wctomb [2018-04-12 06:50:47,925 INFO L128 BoogieDeclarations]: Found specification of procedure mbstowcs [2018-04-12 06:50:47,925 INFO L128 BoogieDeclarations]: Found specification of procedure wcstombs [2018-04-12 06:50:47,925 INFO L128 BoogieDeclarations]: Found specification of procedure rpmatch [2018-04-12 06:50:47,925 INFO L128 BoogieDeclarations]: Found specification of procedure getsubopt [2018-04-12 06:50:47,925 INFO L128 BoogieDeclarations]: Found specification of procedure getloadavg [2018-04-12 06:50:47,925 INFO L128 BoogieDeclarations]: Found specification of procedure kfree [2018-04-12 06:50:47,925 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2018-04-12 06:50:47,925 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_pointer [2018-04-12 06:50:47,925 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_nonpositive [2018-04-12 06:50:47,925 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_positive [2018-04-12 06:50:47,925 INFO L128 BoogieDeclarations]: Found specification of procedure memcpy [2018-04-12 06:50:47,926 INFO L128 BoogieDeclarations]: Found specification of procedure memset [2018-04-12 06:50:47,926 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_malloc [2018-04-12 06:50:47,926 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-04-12 06:50:47,926 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_zalloc [2018-04-12 06:50:47,926 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.meminit [2018-04-12 06:50:47,926 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEAD [2018-04-12 06:50:47,926 INFO L128 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2018-04-12 06:50:47,926 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_add [2018-04-12 06:50:47,926 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_del [2018-04-12 06:50:47,926 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_add [2018-04-12 06:50:47,927 INFO L128 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2018-04-12 06:50:47,927 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_add_tail [2018-04-12 06:50:47,927 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_del [2018-04-12 06:50:47,927 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_alloc [2018-04-12 06:50:47,927 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fill [2018-04-12 06:50:47,927 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memcpy [2018-04-12 06:50:47,927 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_free [2018-04-12 06:50:47,927 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-04-12 06:50:47,927 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_submit_msg [2018-04-12 06:50:47,928 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgs [2018-04-12 06:50:47,928 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_get_drvdata [2018-04-12 06:50:47,928 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_set_drvdata [2018-04-12 06:50:47,928 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_return [2018-04-12 06:50:47,928 INFO L128 BoogieDeclarations]: Found specification of procedure read~int [2018-04-12 06:50:47,928 INFO L128 BoogieDeclarations]: Found specification of procedure write~int [2018-04-12 06:50:47,928 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_return [2018-04-12 06:50:47,928 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kref_sub [2018-04-12 06:50:47,928 INFO L128 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~TO~VOID [2018-04-12 06:50:47,928 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kref_init [2018-04-12 06:50:47,929 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kref_get [2018-04-12 06:50:47,929 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kref_put [2018-04-12 06:50:47,929 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_del [2018-04-12 06:50:47,929 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanup [2018-04-12 06:50:47,929 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_release [2018-04-12 06:50:47,929 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_put [2018-04-12 06:50:47,929 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_get [2018-04-12 06:50:47,929 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_init_internal [2018-04-12 06:50:47,929 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_init [2018-04-12 06:50:47,929 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_create [2018-04-12 06:50:47,929 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2018-04-12 06:50:47,930 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fmemleaks_test_____false_valid_deref_i__f [2018-04-12 06:50:47,930 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fmemleaks_test_____false_valid_deref_i__g [2018-04-12 06:50:47,930 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fmemleaks_test_____false_valid_deref_i__entry_point [2018-04-12 06:50:47,930 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-04-12 06:50:47,930 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-04-12 06:50:47,930 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-04-12 06:50:47,930 INFO L128 BoogieDeclarations]: Found specification of procedure write~unchecked~int [2018-04-12 06:50:48,197 WARN L446 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-04-12 06:50:48,279 WARN L446 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-04-12 06:50:48,512 INFO L259 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-04-12 06:50:48,512 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 12.04 06:50:48 BoogieIcfgContainer [2018-04-12 06:50:48,512 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-04-12 06:50:48,513 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-04-12 06:50:48,513 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-04-12 06:50:48,516 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-04-12 06:50:48,516 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 12.04 06:50:47" (1/3) ... [2018-04-12 06:50:48,516 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3488e46a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 12.04 06:50:48, skipping insertion in model container [2018-04-12 06:50:48,517 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 06:50:47" (2/3) ... [2018-04-12 06:50:48,517 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3488e46a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 12.04 06:50:48, skipping insertion in model container [2018-04-12 06:50:48,517 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 12.04 06:50:48" (3/3) ... [2018-04-12 06:50:48,518 INFO L107 eAbstractionObserver]: Analyzing ICFG memleaks_test22_3_false-valid-deref.i [2018-04-12 06:50:48,527 INFO L131 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-04-12 06:50:48,534 INFO L143 ceAbstractionStarter]: Appying trace abstraction to program that has 71 error locations. [2018-04-12 06:50:48,567 INFO L128 ementStrategyFactory]: Using default assertion order modulation [2018-04-12 06:50:48,567 INFO L369 AbstractCegarLoop]: Interprodecural is true [2018-04-12 06:50:48,567 INFO L370 AbstractCegarLoop]: Hoare is false [2018-04-12 06:50:48,567 INFO L371 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-04-12 06:50:48,568 INFO L372 AbstractCegarLoop]: Backedges is TWOTRACK [2018-04-12 06:50:48,568 INFO L373 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-04-12 06:50:48,568 INFO L374 AbstractCegarLoop]: Difference is false [2018-04-12 06:50:48,568 INFO L375 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-04-12 06:50:48,568 INFO L380 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-04-12 06:50:48,568 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-04-12 06:50:48,579 INFO L276 IsEmpty]: Start isEmpty. Operand 158 states. [2018-04-12 06:50:48,584 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 5 [2018-04-12 06:50:48,584 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 06:50:48,585 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1] [2018-04-12 06:50:48,585 INFO L408 AbstractCegarLoop]: === Iteration 1 === [__U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_add_tailErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_set_drvdataErr0RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_delErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_returnErr0RequiresViolation]=== [2018-04-12 06:50:48,588 INFO L82 PathProgramCache]: Analyzing trace with hash 13643315, now seen corresponding path program 1 times [2018-04-12 06:50:48,589 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-12 06:50:48,589 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-12 06:50:48,624 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 06:50:48,624 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 06:50:48,625 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 06:50:48,652 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 06:50:48,660 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 06:50:48,698 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 06:50:48,700 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 06:50:48,700 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-04-12 06:50:48,701 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-04-12 06:50:48,710 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-04-12 06:50:48,710 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-04-12 06:50:48,712 INFO L87 Difference]: Start difference. First operand 158 states. Second operand 3 states. [2018-04-12 06:50:48,825 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 06:50:48,825 INFO L93 Difference]: Finished difference Result 179 states and 195 transitions. [2018-04-12 06:50:48,825 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-04-12 06:50:48,826 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 4 [2018-04-12 06:50:48,827 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 06:50:48,835 INFO L225 Difference]: With dead ends: 179 [2018-04-12 06:50:48,835 INFO L226 Difference]: Without dead ends: 173 [2018-04-12 06:50:48,836 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-04-12 06:50:48,846 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 173 states. [2018-04-12 06:50:48,862 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 173 to 125. [2018-04-12 06:50:48,863 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 125 states. [2018-04-12 06:50:48,864 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 125 states to 125 states and 133 transitions. [2018-04-12 06:50:48,865 INFO L78 Accepts]: Start accepts. Automaton has 125 states and 133 transitions. Word has length 4 [2018-04-12 06:50:48,865 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 06:50:48,865 INFO L459 AbstractCegarLoop]: Abstraction has 125 states and 133 transitions. [2018-04-12 06:50:48,865 INFO L460 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-04-12 06:50:48,865 INFO L276 IsEmpty]: Start isEmpty. Operand 125 states and 133 transitions. [2018-04-12 06:50:48,865 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 5 [2018-04-12 06:50:48,865 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 06:50:48,873 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1] [2018-04-12 06:50:48,873 INFO L408 AbstractCegarLoop]: === Iteration 2 === [__U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_add_tailErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_set_drvdataErr0RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_delErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_returnErr0RequiresViolation]=== [2018-04-12 06:50:48,875 INFO L82 PathProgramCache]: Analyzing trace with hash 13643316, now seen corresponding path program 1 times [2018-04-12 06:50:48,875 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-12 06:50:48,875 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-12 06:50:48,876 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 06:50:48,876 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 06:50:48,876 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 06:50:48,889 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 06:50:48,890 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 06:50:48,926 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 06:50:48,926 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 06:50:48,926 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-04-12 06:50:48,927 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-04-12 06:50:48,927 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-04-12 06:50:48,927 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-04-12 06:50:48,927 INFO L87 Difference]: Start difference. First operand 125 states and 133 transitions. Second operand 3 states. [2018-04-12 06:50:49,007 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 06:50:49,008 INFO L93 Difference]: Finished difference Result 229 states and 244 transitions. [2018-04-12 06:50:49,008 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-04-12 06:50:49,008 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 4 [2018-04-12 06:50:49,008 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 06:50:49,010 INFO L225 Difference]: With dead ends: 229 [2018-04-12 06:50:49,010 INFO L226 Difference]: Without dead ends: 229 [2018-04-12 06:50:49,011 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-04-12 06:50:49,011 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 229 states. [2018-04-12 06:50:49,018 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 229 to 123. [2018-04-12 06:50:49,018 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 123 states. [2018-04-12 06:50:49,019 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 123 states to 123 states and 131 transitions. [2018-04-12 06:50:49,019 INFO L78 Accepts]: Start accepts. Automaton has 123 states and 131 transitions. Word has length 4 [2018-04-12 06:50:49,019 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 06:50:49,019 INFO L459 AbstractCegarLoop]: Abstraction has 123 states and 131 transitions. [2018-04-12 06:50:49,019 INFO L460 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-04-12 06:50:49,019 INFO L276 IsEmpty]: Start isEmpty. Operand 123 states and 131 transitions. [2018-04-12 06:50:49,020 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2018-04-12 06:50:49,020 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 06:50:49,020 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 06:50:49,020 INFO L408 AbstractCegarLoop]: === Iteration 3 === [__U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_add_tailErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_set_drvdataErr0RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_delErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_returnErr0RequiresViolation]=== [2018-04-12 06:50:49,020 INFO L82 PathProgramCache]: Analyzing trace with hash 1012562300, now seen corresponding path program 1 times [2018-04-12 06:50:49,021 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-12 06:50:49,021 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-12 06:50:49,022 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 06:50:49,022 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 06:50:49,023 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 06:50:49,040 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 06:50:49,041 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 06:50:49,088 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 06:50:49,089 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 06:50:49,089 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-04-12 06:50:49,089 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-04-12 06:50:49,089 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-04-12 06:50:49,089 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-04-12 06:50:49,089 INFO L87 Difference]: Start difference. First operand 123 states and 131 transitions. Second operand 5 states. [2018-04-12 06:50:49,108 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 06:50:49,108 INFO L93 Difference]: Finished difference Result 129 states and 137 transitions. [2018-04-12 06:50:49,109 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-04-12 06:50:49,109 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 20 [2018-04-12 06:50:49,109 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 06:50:49,110 INFO L225 Difference]: With dead ends: 129 [2018-04-12 06:50:49,110 INFO L226 Difference]: Without dead ends: 129 [2018-04-12 06:50:49,110 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-04-12 06:50:49,111 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 129 states. [2018-04-12 06:50:49,116 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 129 to 127. [2018-04-12 06:50:49,116 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 127 states. [2018-04-12 06:50:49,118 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 127 states to 127 states and 135 transitions. [2018-04-12 06:50:49,118 INFO L78 Accepts]: Start accepts. Automaton has 127 states and 135 transitions. Word has length 20 [2018-04-12 06:50:49,118 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 06:50:49,118 INFO L459 AbstractCegarLoop]: Abstraction has 127 states and 135 transitions. [2018-04-12 06:50:49,118 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-04-12 06:50:49,118 INFO L276 IsEmpty]: Start isEmpty. Operand 127 states and 135 transitions. [2018-04-12 06:50:49,119 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2018-04-12 06:50:49,119 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 06:50:49,119 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 06:50:49,119 INFO L408 AbstractCegarLoop]: === Iteration 4 === [__U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_add_tailErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_set_drvdataErr0RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_delErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_returnErr0RequiresViolation]=== [2018-04-12 06:50:49,119 INFO L82 PathProgramCache]: Analyzing trace with hash 858403550, now seen corresponding path program 1 times [2018-04-12 06:50:49,119 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-12 06:50:49,119 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-12 06:50:49,121 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 06:50:49,121 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 06:50:49,121 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 06:50:49,137 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 06:50:49,138 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 06:50:49,191 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 06:50:49,191 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 06:50:49,191 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-04-12 06:50:49,192 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-04-12 06:50:49,192 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-04-12 06:50:49,192 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-04-12 06:50:49,192 INFO L87 Difference]: Start difference. First operand 127 states and 135 transitions. Second operand 6 states. [2018-04-12 06:50:49,317 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 06:50:49,317 INFO L93 Difference]: Finished difference Result 128 states and 136 transitions. [2018-04-12 06:50:49,318 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-04-12 06:50:49,318 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 22 [2018-04-12 06:50:49,318 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 06:50:49,319 INFO L225 Difference]: With dead ends: 128 [2018-04-12 06:50:49,319 INFO L226 Difference]: Without dead ends: 128 [2018-04-12 06:50:49,319 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-04-12 06:50:49,319 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 128 states. [2018-04-12 06:50:49,323 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 128 to 126. [2018-04-12 06:50:49,324 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 126 states. [2018-04-12 06:50:49,324 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 126 states to 126 states and 134 transitions. [2018-04-12 06:50:49,324 INFO L78 Accepts]: Start accepts. Automaton has 126 states and 134 transitions. Word has length 22 [2018-04-12 06:50:49,325 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 06:50:49,325 INFO L459 AbstractCegarLoop]: Abstraction has 126 states and 134 transitions. [2018-04-12 06:50:49,325 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-04-12 06:50:49,325 INFO L276 IsEmpty]: Start isEmpty. Operand 126 states and 134 transitions. [2018-04-12 06:50:49,325 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2018-04-12 06:50:49,325 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 06:50:49,325 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 06:50:49,325 INFO L408 AbstractCegarLoop]: === Iteration 5 === [__U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_add_tailErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_set_drvdataErr0RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_delErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_returnErr0RequiresViolation]=== [2018-04-12 06:50:49,325 INFO L82 PathProgramCache]: Analyzing trace with hash 858403551, now seen corresponding path program 1 times [2018-04-12 06:50:49,325 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-12 06:50:49,325 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-12 06:50:49,326 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 06:50:49,327 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 06:50:49,327 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 06:50:49,343 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 06:50:49,344 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 06:50:49,454 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 06:50:49,455 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 06:50:49,455 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-04-12 06:50:49,455 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-04-12 06:50:49,456 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-04-12 06:50:49,456 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-04-12 06:50:49,456 INFO L87 Difference]: Start difference. First operand 126 states and 134 transitions. Second operand 7 states. [2018-04-12 06:50:49,599 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 06:50:49,600 INFO L93 Difference]: Finished difference Result 127 states and 135 transitions. [2018-04-12 06:50:49,600 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-04-12 06:50:49,600 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 22 [2018-04-12 06:50:49,600 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 06:50:49,601 INFO L225 Difference]: With dead ends: 127 [2018-04-12 06:50:49,601 INFO L226 Difference]: Without dead ends: 127 [2018-04-12 06:50:49,602 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2018-04-12 06:50:49,602 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 127 states. [2018-04-12 06:50:49,606 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 127 to 125. [2018-04-12 06:50:49,607 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 125 states. [2018-04-12 06:50:49,608 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 125 states to 125 states and 133 transitions. [2018-04-12 06:50:49,608 INFO L78 Accepts]: Start accepts. Automaton has 125 states and 133 transitions. Word has length 22 [2018-04-12 06:50:49,609 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 06:50:49,609 INFO L459 AbstractCegarLoop]: Abstraction has 125 states and 133 transitions. [2018-04-12 06:50:49,610 INFO L460 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-04-12 06:50:49,610 INFO L276 IsEmpty]: Start isEmpty. Operand 125 states and 133 transitions. [2018-04-12 06:50:49,610 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-04-12 06:50:49,610 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 06:50:49,611 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 06:50:49,611 INFO L408 AbstractCegarLoop]: === Iteration 6 === [__U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_add_tailErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_set_drvdataErr0RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_delErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_returnErr0RequiresViolation]=== [2018-04-12 06:50:49,611 INFO L82 PathProgramCache]: Analyzing trace with hash -76442267, now seen corresponding path program 1 times [2018-04-12 06:50:49,611 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-12 06:50:49,611 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-12 06:50:49,612 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 06:50:49,612 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 06:50:49,612 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 06:50:49,627 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 06:50:49,629 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 06:50:49,681 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 06:50:49,682 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 06:50:49,682 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-04-12 06:50:49,682 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-04-12 06:50:49,682 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-04-12 06:50:49,683 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-04-12 06:50:49,683 INFO L87 Difference]: Start difference. First operand 125 states and 133 transitions. Second operand 7 states. [2018-04-12 06:50:49,734 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 06:50:49,734 INFO L93 Difference]: Finished difference Result 138 states and 148 transitions. [2018-04-12 06:50:49,734 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-04-12 06:50:49,734 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 32 [2018-04-12 06:50:49,735 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 06:50:49,735 INFO L225 Difference]: With dead ends: 138 [2018-04-12 06:50:49,735 INFO L226 Difference]: Without dead ends: 138 [2018-04-12 06:50:49,736 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-04-12 06:50:49,736 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 138 states. [2018-04-12 06:50:49,740 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 138 to 134. [2018-04-12 06:50:49,741 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 134 states. [2018-04-12 06:50:49,741 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 134 states to 134 states and 143 transitions. [2018-04-12 06:50:49,742 INFO L78 Accepts]: Start accepts. Automaton has 134 states and 143 transitions. Word has length 32 [2018-04-12 06:50:49,742 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 06:50:49,742 INFO L459 AbstractCegarLoop]: Abstraction has 134 states and 143 transitions. [2018-04-12 06:50:49,742 INFO L460 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-04-12 06:50:49,742 INFO L276 IsEmpty]: Start isEmpty. Operand 134 states and 143 transitions. [2018-04-12 06:50:49,743 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2018-04-12 06:50:49,743 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 06:50:49,743 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 06:50:49,743 INFO L408 AbstractCegarLoop]: === Iteration 7 === [__U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_add_tailErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_set_drvdataErr0RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_delErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_returnErr0RequiresViolation]=== [2018-04-12 06:50:49,743 INFO L82 PathProgramCache]: Analyzing trace with hash -831870037, now seen corresponding path program 1 times [2018-04-12 06:50:49,743 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-12 06:50:49,743 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-12 06:50:49,745 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 06:50:49,745 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 06:50:49,745 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 06:50:49,758 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 06:50:49,759 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 06:50:49,824 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 06:50:49,824 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 06:50:49,824 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-04-12 06:50:49,825 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-04-12 06:50:49,825 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-04-12 06:50:49,825 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-04-12 06:50:49,825 INFO L87 Difference]: Start difference. First operand 134 states and 143 transitions. Second operand 10 states. [2018-04-12 06:50:50,003 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 06:50:50,004 INFO L93 Difference]: Finished difference Result 133 states and 142 transitions. [2018-04-12 06:50:50,004 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-04-12 06:50:50,004 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 37 [2018-04-12 06:50:50,004 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 06:50:50,005 INFO L225 Difference]: With dead ends: 133 [2018-04-12 06:50:50,005 INFO L226 Difference]: Without dead ends: 133 [2018-04-12 06:50:50,005 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=29, Invalid=127, Unknown=0, NotChecked=0, Total=156 [2018-04-12 06:50:50,005 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 133 states. [2018-04-12 06:50:50,007 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 133 to 133. [2018-04-12 06:50:50,007 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 133 states. [2018-04-12 06:50:50,008 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 133 states to 133 states and 142 transitions. [2018-04-12 06:50:50,008 INFO L78 Accepts]: Start accepts. Automaton has 133 states and 142 transitions. Word has length 37 [2018-04-12 06:50:50,008 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 06:50:50,009 INFO L459 AbstractCegarLoop]: Abstraction has 133 states and 142 transitions. [2018-04-12 06:50:50,009 INFO L460 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-04-12 06:50:50,009 INFO L276 IsEmpty]: Start isEmpty. Operand 133 states and 142 transitions. [2018-04-12 06:50:50,009 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2018-04-12 06:50:50,009 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 06:50:50,009 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 06:50:50,009 INFO L408 AbstractCegarLoop]: === Iteration 8 === [__U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_add_tailErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_set_drvdataErr0RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_delErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_returnErr0RequiresViolation]=== [2018-04-12 06:50:50,010 INFO L82 PathProgramCache]: Analyzing trace with hash -831870036, now seen corresponding path program 1 times [2018-04-12 06:50:50,010 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-12 06:50:50,010 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-12 06:50:50,011 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 06:50:50,011 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 06:50:50,011 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 06:50:50,021 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 06:50:50,022 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 06:50:50,048 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 06:50:50,049 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 06:50:50,049 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-04-12 06:50:50,049 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-04-12 06:50:50,049 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-04-12 06:50:50,050 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-04-12 06:50:50,050 INFO L87 Difference]: Start difference. First operand 133 states and 142 transitions. Second operand 4 states. [2018-04-12 06:50:50,064 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 06:50:50,065 INFO L93 Difference]: Finished difference Result 136 states and 145 transitions. [2018-04-12 06:50:50,065 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-04-12 06:50:50,065 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 37 [2018-04-12 06:50:50,065 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 06:50:50,066 INFO L225 Difference]: With dead ends: 136 [2018-04-12 06:50:50,066 INFO L226 Difference]: Without dead ends: 134 [2018-04-12 06:50:50,066 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-04-12 06:50:50,067 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 134 states. [2018-04-12 06:50:50,069 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 134 to 134. [2018-04-12 06:50:50,070 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 134 states. [2018-04-12 06:50:50,070 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 134 states to 134 states and 143 transitions. [2018-04-12 06:50:50,070 INFO L78 Accepts]: Start accepts. Automaton has 134 states and 143 transitions. Word has length 37 [2018-04-12 06:50:50,070 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 06:50:50,070 INFO L459 AbstractCegarLoop]: Abstraction has 134 states and 143 transitions. [2018-04-12 06:50:50,070 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-04-12 06:50:50,071 INFO L276 IsEmpty]: Start isEmpty. Operand 134 states and 143 transitions. [2018-04-12 06:50:50,072 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-04-12 06:50:50,072 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 06:50:50,072 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 06:50:50,072 INFO L408 AbstractCegarLoop]: === Iteration 9 === [__U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_add_tailErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_set_drvdataErr0RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_delErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_returnErr0RequiresViolation]=== [2018-04-12 06:50:50,072 INFO L82 PathProgramCache]: Analyzing trace with hash -888531586, now seen corresponding path program 1 times [2018-04-12 06:50:50,072 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-12 06:50:50,072 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-12 06:50:50,073 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 06:50:50,074 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 06:50:50,074 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 06:50:50,087 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 06:50:50,088 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 06:50:50,122 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-04-12 06:50:50,122 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 06:50:50,122 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-04-12 06:50:50,122 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-04-12 06:50:50,123 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-04-12 06:50:50,123 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-04-12 06:50:50,123 INFO L87 Difference]: Start difference. First operand 134 states and 143 transitions. Second operand 3 states. [2018-04-12 06:50:50,195 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 06:50:50,195 INFO L93 Difference]: Finished difference Result 150 states and 161 transitions. [2018-04-12 06:50:50,195 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-04-12 06:50:50,196 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 35 [2018-04-12 06:50:50,196 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 06:50:50,196 INFO L225 Difference]: With dead ends: 150 [2018-04-12 06:50:50,197 INFO L226 Difference]: Without dead ends: 138 [2018-04-12 06:50:50,197 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 11 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-04-12 06:50:50,197 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 138 states. [2018-04-12 06:50:50,200 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 138 to 130. [2018-04-12 06:50:50,200 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 130 states. [2018-04-12 06:50:50,201 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 130 states to 130 states and 138 transitions. [2018-04-12 06:50:50,201 INFO L78 Accepts]: Start accepts. Automaton has 130 states and 138 transitions. Word has length 35 [2018-04-12 06:50:50,201 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 06:50:50,202 INFO L459 AbstractCegarLoop]: Abstraction has 130 states and 138 transitions. [2018-04-12 06:50:50,202 INFO L460 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-04-12 06:50:50,202 INFO L276 IsEmpty]: Start isEmpty. Operand 130 states and 138 transitions. [2018-04-12 06:50:50,202 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-04-12 06:50:50,203 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 06:50:50,203 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 06:50:50,203 INFO L408 AbstractCegarLoop]: === Iteration 10 === [__U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_add_tailErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_set_drvdataErr0RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_delErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_returnErr0RequiresViolation]=== [2018-04-12 06:50:50,203 INFO L82 PathProgramCache]: Analyzing trace with hash -1739480015, now seen corresponding path program 1 times [2018-04-12 06:50:50,203 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-12 06:50:50,203 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-12 06:50:50,204 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 06:50:50,204 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 06:50:50,205 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 06:50:50,216 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 06:50:50,217 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 06:50:50,253 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 06:50:50,253 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-12 06:50:50,253 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-12 06:50:50,254 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 06:50:50,275 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 06:50:50,282 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 06:50:50,304 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 06:50:50,305 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 06:50:50,305 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 6 [2018-04-12 06:50:50,305 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-04-12 06:50:50,305 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-04-12 06:50:50,306 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-04-12 06:50:50,306 INFO L87 Difference]: Start difference. First operand 130 states and 138 transitions. Second operand 6 states. [2018-04-12 06:50:50,329 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 06:50:50,329 INFO L93 Difference]: Finished difference Result 133 states and 141 transitions. [2018-04-12 06:50:50,330 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-04-12 06:50:50,330 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 38 [2018-04-12 06:50:50,331 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 06:50:50,331 INFO L225 Difference]: With dead ends: 133 [2018-04-12 06:50:50,331 INFO L226 Difference]: Without dead ends: 131 [2018-04-12 06:50:50,332 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 43 GetRequests, 38 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=16, Invalid=26, Unknown=0, NotChecked=0, Total=42 [2018-04-12 06:50:50,332 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 131 states. [2018-04-12 06:50:50,335 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 131 to 131. [2018-04-12 06:50:50,335 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 131 states. [2018-04-12 06:50:50,335 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 131 states to 131 states and 139 transitions. [2018-04-12 06:50:50,335 INFO L78 Accepts]: Start accepts. Automaton has 131 states and 139 transitions. Word has length 38 [2018-04-12 06:50:50,336 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 06:50:50,336 INFO L459 AbstractCegarLoop]: Abstraction has 131 states and 139 transitions. [2018-04-12 06:50:50,336 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-04-12 06:50:50,336 INFO L276 IsEmpty]: Start isEmpty. Operand 131 states and 139 transitions. [2018-04-12 06:50:50,337 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2018-04-12 06:50:50,337 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 06:50:50,337 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 06:50:50,337 INFO L408 AbstractCegarLoop]: === Iteration 11 === [__U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_add_tailErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_set_drvdataErr0RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_delErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_returnErr0RequiresViolation]=== [2018-04-12 06:50:50,337 INFO L82 PathProgramCache]: Analyzing trace with hash 1065888732, now seen corresponding path program 1 times [2018-04-12 06:50:50,337 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-12 06:50:50,337 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-12 06:50:50,338 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 06:50:50,338 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 06:50:50,338 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 06:50:50,345 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 06:50:50,346 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 06:50:50,377 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-04-12 06:50:50,377 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 06:50:50,377 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-04-12 06:50:50,377 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-04-12 06:50:50,377 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-04-12 06:50:50,377 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-04-12 06:50:50,378 INFO L87 Difference]: Start difference. First operand 131 states and 139 transitions. Second operand 6 states. [2018-04-12 06:50:50,394 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 06:50:50,394 INFO L93 Difference]: Finished difference Result 122 states and 128 transitions. [2018-04-12 06:50:50,395 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-04-12 06:50:50,395 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 37 [2018-04-12 06:50:50,395 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 06:50:50,395 INFO L225 Difference]: With dead ends: 122 [2018-04-12 06:50:50,396 INFO L226 Difference]: Without dead ends: 122 [2018-04-12 06:50:50,396 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-04-12 06:50:50,396 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 122 states. [2018-04-12 06:50:50,398 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 122 to 122. [2018-04-12 06:50:50,399 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 122 states. [2018-04-12 06:50:50,399 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 122 states to 122 states and 128 transitions. [2018-04-12 06:50:50,399 INFO L78 Accepts]: Start accepts. Automaton has 122 states and 128 transitions. Word has length 37 [2018-04-12 06:50:50,400 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 06:50:50,400 INFO L459 AbstractCegarLoop]: Abstraction has 122 states and 128 transitions. [2018-04-12 06:50:50,400 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-04-12 06:50:50,400 INFO L276 IsEmpty]: Start isEmpty. Operand 122 states and 128 transitions. [2018-04-12 06:50:50,400 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2018-04-12 06:50:50,401 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 06:50:50,401 INFO L355 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 06:50:50,401 INFO L408 AbstractCegarLoop]: === Iteration 12 === [__U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_add_tailErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_set_drvdataErr0RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_delErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_returnErr0RequiresViolation]=== [2018-04-12 06:50:50,401 INFO L82 PathProgramCache]: Analyzing trace with hash 189381708, now seen corresponding path program 2 times [2018-04-12 06:50:50,401 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-12 06:50:50,401 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-12 06:50:50,402 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 06:50:50,402 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 06:50:50,403 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 06:50:50,414 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 06:50:50,415 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 06:50:50,443 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 06:50:50,443 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-12 06:50:50,443 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-12 06:50:50,444 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-04-12 06:50:50,466 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2018-04-12 06:50:50,467 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-12 06:50:50,470 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 06:50:50,501 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-04-12 06:50:50,503 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 06:50:50,518 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-04-12 06:50:50,519 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 06:50:50,531 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-12 06:50:50,531 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:38, output treesize:36 [2018-04-12 06:50:50,817 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-04-12 06:50:50,817 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-04-12 06:50:50,817 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [15] imperfect sequences [6] total 20 [2018-04-12 06:50:50,818 INFO L442 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-04-12 06:50:50,818 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-04-12 06:50:50,818 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=51, Invalid=329, Unknown=0, NotChecked=0, Total=380 [2018-04-12 06:50:50,818 INFO L87 Difference]: Start difference. First operand 122 states and 128 transitions. Second operand 20 states. [2018-04-12 06:50:51,357 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 06:50:51,358 INFO L93 Difference]: Finished difference Result 124 states and 130 transitions. [2018-04-12 06:50:51,358 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-04-12 06:50:51,358 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 39 [2018-04-12 06:50:51,358 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 06:50:51,359 INFO L225 Difference]: With dead ends: 124 [2018-04-12 06:50:51,359 INFO L226 Difference]: Without dead ends: 122 [2018-04-12 06:50:51,359 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 53 GetRequests, 26 SyntacticMatches, 0 SemanticMatches, 27 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 102 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=104, Invalid=708, Unknown=0, NotChecked=0, Total=812 [2018-04-12 06:50:51,359 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 122 states. [2018-04-12 06:50:51,361 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 122 to 122. [2018-04-12 06:50:51,361 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 122 states. [2018-04-12 06:50:51,362 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 122 states to 122 states and 128 transitions. [2018-04-12 06:50:51,362 INFO L78 Accepts]: Start accepts. Automaton has 122 states and 128 transitions. Word has length 39 [2018-04-12 06:50:51,362 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 06:50:51,362 INFO L459 AbstractCegarLoop]: Abstraction has 122 states and 128 transitions. [2018-04-12 06:50:51,362 INFO L460 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-04-12 06:50:51,362 INFO L276 IsEmpty]: Start isEmpty. Operand 122 states and 128 transitions. [2018-04-12 06:50:51,363 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2018-04-12 06:50:51,363 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 06:50:51,363 INFO L355 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 06:50:51,363 INFO L408 AbstractCegarLoop]: === Iteration 13 === [__U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_add_tailErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_set_drvdataErr0RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_delErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_returnErr0RequiresViolation]=== [2018-04-12 06:50:51,364 INFO L82 PathProgramCache]: Analyzing trace with hash 1919988440, now seen corresponding path program 1 times [2018-04-12 06:50:51,364 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-12 06:50:51,364 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-12 06:50:51,365 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 06:50:51,365 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-12 06:50:51,365 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 06:50:51,373 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 06:50:51,374 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 06:50:51,471 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-04-12 06:50:51,471 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 06:50:51,471 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2018-04-12 06:50:51,472 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-04-12 06:50:51,472 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-04-12 06:50:51,472 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=111, Unknown=0, NotChecked=0, Total=132 [2018-04-12 06:50:51,472 INFO L87 Difference]: Start difference. First operand 122 states and 128 transitions. Second operand 12 states. [2018-04-12 06:50:51,693 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 06:50:51,693 INFO L93 Difference]: Finished difference Result 120 states and 126 transitions. [2018-04-12 06:50:51,693 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-04-12 06:50:51,694 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 45 [2018-04-12 06:50:51,694 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 06:50:51,694 INFO L225 Difference]: With dead ends: 120 [2018-04-12 06:50:51,694 INFO L226 Difference]: Without dead ends: 120 [2018-04-12 06:50:51,695 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=37, Invalid=203, Unknown=0, NotChecked=0, Total=240 [2018-04-12 06:50:51,695 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 120 states. [2018-04-12 06:50:51,697 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 120 to 120. [2018-04-12 06:50:51,697 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 120 states. [2018-04-12 06:50:51,698 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 120 states to 120 states and 126 transitions. [2018-04-12 06:50:51,698 INFO L78 Accepts]: Start accepts. Automaton has 120 states and 126 transitions. Word has length 45 [2018-04-12 06:50:51,698 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 06:50:51,700 INFO L459 AbstractCegarLoop]: Abstraction has 120 states and 126 transitions. [2018-04-12 06:50:51,701 INFO L460 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-04-12 06:50:51,701 INFO L276 IsEmpty]: Start isEmpty. Operand 120 states and 126 transitions. [2018-04-12 06:50:51,701 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2018-04-12 06:50:51,701 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 06:50:51,701 INFO L355 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 06:50:51,702 INFO L408 AbstractCegarLoop]: === Iteration 14 === [__U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_add_tailErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_set_drvdataErr0RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_delErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_returnErr0RequiresViolation]=== [2018-04-12 06:50:51,702 INFO L82 PathProgramCache]: Analyzing trace with hash 1919988441, now seen corresponding path program 1 times [2018-04-12 06:50:51,702 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-12 06:50:51,702 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-12 06:50:51,703 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 06:50:51,703 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 06:50:51,703 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 06:50:51,716 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 06:50:51,717 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 06:50:51,761 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 06:50:51,761 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-12 06:50:51,761 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-12 06:50:51,762 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 06:50:51,780 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 06:50:51,783 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 06:50:51,795 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 06:50:51,795 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 06:50:51,796 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 8 [2018-04-12 06:50:51,796 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-04-12 06:50:51,796 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-04-12 06:50:51,796 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=33, Unknown=0, NotChecked=0, Total=56 [2018-04-12 06:50:51,796 INFO L87 Difference]: Start difference. First operand 120 states and 126 transitions. Second operand 8 states. [2018-04-12 06:50:51,816 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 06:50:51,816 INFO L93 Difference]: Finished difference Result 123 states and 129 transitions. [2018-04-12 06:50:51,816 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-04-12 06:50:51,816 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 45 [2018-04-12 06:50:51,817 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 06:50:51,817 INFO L225 Difference]: With dead ends: 123 [2018-04-12 06:50:51,817 INFO L226 Difference]: Without dead ends: 121 [2018-04-12 06:50:51,818 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 52 GetRequests, 45 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2018-04-12 06:50:51,818 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 121 states. [2018-04-12 06:50:51,820 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 121 to 121. [2018-04-12 06:50:51,820 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 121 states. [2018-04-12 06:50:51,821 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 121 states to 121 states and 127 transitions. [2018-04-12 06:50:51,821 INFO L78 Accepts]: Start accepts. Automaton has 121 states and 127 transitions. Word has length 45 [2018-04-12 06:50:51,822 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 06:50:51,822 INFO L459 AbstractCegarLoop]: Abstraction has 121 states and 127 transitions. [2018-04-12 06:50:51,822 INFO L460 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-04-12 06:50:51,822 INFO L276 IsEmpty]: Start isEmpty. Operand 121 states and 127 transitions. [2018-04-12 06:50:51,822 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2018-04-12 06:50:51,822 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 06:50:51,823 INFO L355 BasicCegarLoop]: trace histogram [4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 06:50:51,823 INFO L408 AbstractCegarLoop]: === Iteration 15 === [__U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_add_tailErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_set_drvdataErr0RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_delErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_returnErr0RequiresViolation]=== [2018-04-12 06:50:51,823 INFO L82 PathProgramCache]: Analyzing trace with hash 1231902302, now seen corresponding path program 2 times [2018-04-12 06:50:51,823 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-12 06:50:51,823 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-12 06:50:51,839 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 06:50:51,839 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 06:50:51,839 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 06:50:51,850 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 06:50:51,851 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 06:50:51,886 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 06:50:51,887 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-12 06:50:51,887 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-12 06:50:51,888 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-04-12 06:50:51,906 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2018-04-12 06:50:51,906 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-12 06:50:51,910 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 06:50:51,920 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-04-12 06:50:51,920 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 06:50:51,932 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-04-12 06:50:51,932 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 06:50:51,939 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-12 06:50:51,940 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:38, output treesize:36 [2018-04-12 06:50:52,222 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-04-12 06:50:52,222 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-04-12 06:50:52,222 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [15] imperfect sequences [8] total 22 [2018-04-12 06:50:52,223 INFO L442 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-04-12 06:50:52,223 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-04-12 06:50:52,223 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=62, Invalid=400, Unknown=0, NotChecked=0, Total=462 [2018-04-12 06:50:52,223 INFO L87 Difference]: Start difference. First operand 121 states and 127 transitions. Second operand 22 states. [2018-04-12 06:50:52,673 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 06:50:52,673 INFO L93 Difference]: Finished difference Result 122 states and 128 transitions. [2018-04-12 06:50:52,673 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-04-12 06:50:52,673 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 46 [2018-04-12 06:50:52,673 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 06:50:52,674 INFO L225 Difference]: With dead ends: 122 [2018-04-12 06:50:52,674 INFO L226 Difference]: Without dead ends: 120 [2018-04-12 06:50:52,675 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 64 GetRequests, 31 SyntacticMatches, 2 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 170 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=139, Invalid=917, Unknown=0, NotChecked=0, Total=1056 [2018-04-12 06:50:52,675 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 120 states. [2018-04-12 06:50:52,676 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 120 to 120. [2018-04-12 06:50:52,676 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 120 states. [2018-04-12 06:50:52,677 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 120 states to 120 states and 126 transitions. [2018-04-12 06:50:52,677 INFO L78 Accepts]: Start accepts. Automaton has 120 states and 126 transitions. Word has length 46 [2018-04-12 06:50:52,677 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 06:50:52,677 INFO L459 AbstractCegarLoop]: Abstraction has 120 states and 126 transitions. [2018-04-12 06:50:52,677 INFO L460 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-04-12 06:50:52,677 INFO L276 IsEmpty]: Start isEmpty. Operand 120 states and 126 transitions. [2018-04-12 06:50:52,678 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2018-04-12 06:50:52,678 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 06:50:52,678 INFO L355 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 06:50:52,678 INFO L408 AbstractCegarLoop]: === Iteration 16 === [__U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_add_tailErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_set_drvdataErr0RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_delErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_returnErr0RequiresViolation]=== [2018-04-12 06:50:52,679 INFO L82 PathProgramCache]: Analyzing trace with hash 1814469263, now seen corresponding path program 1 times [2018-04-12 06:50:52,679 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-12 06:50:52,679 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-12 06:50:52,680 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 06:50:52,680 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-12 06:50:52,680 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 06:50:52,686 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 06:50:52,686 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 06:50:52,745 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-04-12 06:50:52,745 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 06:50:52,745 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-04-12 06:50:52,745 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-04-12 06:50:52,745 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-04-12 06:50:52,745 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2018-04-12 06:50:52,745 INFO L87 Difference]: Start difference. First operand 120 states and 126 transitions. Second operand 8 states. [2018-04-12 06:50:52,768 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 06:50:52,768 INFO L93 Difference]: Finished difference Result 122 states and 127 transitions. [2018-04-12 06:50:52,768 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-04-12 06:50:52,768 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 52 [2018-04-12 06:50:52,768 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 06:50:52,769 INFO L225 Difference]: With dead ends: 122 [2018-04-12 06:50:52,769 INFO L226 Difference]: Without dead ends: 120 [2018-04-12 06:50:52,769 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=69, Unknown=0, NotChecked=0, Total=90 [2018-04-12 06:50:52,769 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 120 states. [2018-04-12 06:50:52,785 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 120 to 120. [2018-04-12 06:50:52,785 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 120 states. [2018-04-12 06:50:52,786 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 120 states to 120 states and 125 transitions. [2018-04-12 06:50:52,786 INFO L78 Accepts]: Start accepts. Automaton has 120 states and 125 transitions. Word has length 52 [2018-04-12 06:50:52,786 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 06:50:52,786 INFO L459 AbstractCegarLoop]: Abstraction has 120 states and 125 transitions. [2018-04-12 06:50:52,786 INFO L460 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-04-12 06:50:52,786 INFO L276 IsEmpty]: Start isEmpty. Operand 120 states and 125 transitions. [2018-04-12 06:50:52,787 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2018-04-12 06:50:52,787 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 06:50:52,787 INFO L355 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 06:50:52,787 INFO L408 AbstractCegarLoop]: === Iteration 17 === [__U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_add_tailErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_set_drvdataErr0RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_delErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_returnErr0RequiresViolation]=== [2018-04-12 06:50:52,787 INFO L82 PathProgramCache]: Analyzing trace with hash 1280233764, now seen corresponding path program 1 times [2018-04-12 06:50:52,787 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-12 06:50:52,787 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-12 06:50:52,788 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 06:50:52,788 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 06:50:52,788 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 06:50:52,797 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 06:50:52,798 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 06:50:52,860 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-04-12 06:50:52,860 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 06:50:52,860 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-04-12 06:50:52,861 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-04-12 06:50:52,861 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-04-12 06:50:52,861 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-04-12 06:50:52,861 INFO L87 Difference]: Start difference. First operand 120 states and 125 transitions. Second operand 10 states. [2018-04-12 06:50:52,924 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 06:50:52,924 INFO L93 Difference]: Finished difference Result 124 states and 128 transitions. [2018-04-12 06:50:52,924 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-04-12 06:50:52,925 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 57 [2018-04-12 06:50:52,925 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 06:50:52,925 INFO L225 Difference]: With dead ends: 124 [2018-04-12 06:50:52,925 INFO L226 Difference]: Without dead ends: 120 [2018-04-12 06:50:52,926 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=29, Invalid=127, Unknown=0, NotChecked=0, Total=156 [2018-04-12 06:50:52,926 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 120 states. [2018-04-12 06:50:52,928 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 120 to 120. [2018-04-12 06:50:52,928 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 120 states. [2018-04-12 06:50:52,928 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 120 states to 120 states and 124 transitions. [2018-04-12 06:50:52,928 INFO L78 Accepts]: Start accepts. Automaton has 120 states and 124 transitions. Word has length 57 [2018-04-12 06:50:52,929 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 06:50:52,929 INFO L459 AbstractCegarLoop]: Abstraction has 120 states and 124 transitions. [2018-04-12 06:50:52,929 INFO L460 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-04-12 06:50:52,929 INFO L276 IsEmpty]: Start isEmpty. Operand 120 states and 124 transitions. [2018-04-12 06:50:52,929 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2018-04-12 06:50:52,929 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 06:50:52,930 INFO L355 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 06:50:52,930 INFO L408 AbstractCegarLoop]: === Iteration 18 === [__U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_add_tailErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_set_drvdataErr0RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_delErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_returnErr0RequiresViolation]=== [2018-04-12 06:50:52,930 INFO L82 PathProgramCache]: Analyzing trace with hash 163697084, now seen corresponding path program 1 times [2018-04-12 06:50:52,930 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-12 06:50:52,930 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-12 06:50:52,931 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 06:50:52,931 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 06:50:52,931 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 06:50:52,943 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 06:50:52,944 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 06:50:53,154 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-04-12 06:50:53,155 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 06:50:53,155 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [20] imperfect sequences [] total 20 [2018-04-12 06:50:53,155 INFO L442 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-04-12 06:50:53,155 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-04-12 06:50:53,156 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=41, Invalid=379, Unknown=0, NotChecked=0, Total=420 [2018-04-12 06:50:53,156 INFO L87 Difference]: Start difference. First operand 120 states and 124 transitions. Second operand 21 states. [2018-04-12 06:50:53,568 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 06:50:53,568 INFO L93 Difference]: Finished difference Result 148 states and 159 transitions. [2018-04-12 06:50:53,568 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-04-12 06:50:53,568 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 68 [2018-04-12 06:50:53,569 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 06:50:53,569 INFO L225 Difference]: With dead ends: 148 [2018-04-12 06:50:53,569 INFO L226 Difference]: Without dead ends: 148 [2018-04-12 06:50:53,570 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 27 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 57 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=69, Invalid=687, Unknown=0, NotChecked=0, Total=756 [2018-04-12 06:50:53,570 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 148 states. [2018-04-12 06:50:53,572 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 148 to 143. [2018-04-12 06:50:53,572 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 143 states. [2018-04-12 06:50:53,573 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 143 states to 143 states and 155 transitions. [2018-04-12 06:50:53,573 INFO L78 Accepts]: Start accepts. Automaton has 143 states and 155 transitions. Word has length 68 [2018-04-12 06:50:53,574 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 06:50:53,574 INFO L459 AbstractCegarLoop]: Abstraction has 143 states and 155 transitions. [2018-04-12 06:50:53,574 INFO L460 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-04-12 06:50:53,574 INFO L276 IsEmpty]: Start isEmpty. Operand 143 states and 155 transitions. [2018-04-12 06:50:53,574 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2018-04-12 06:50:53,574 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 06:50:53,575 INFO L355 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 06:50:53,575 INFO L408 AbstractCegarLoop]: === Iteration 19 === [__U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_add_tailErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_set_drvdataErr0RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_delErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_returnErr0RequiresViolation]=== [2018-04-12 06:50:53,575 INFO L82 PathProgramCache]: Analyzing trace with hash 163697085, now seen corresponding path program 1 times [2018-04-12 06:50:53,575 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-12 06:50:53,575 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-12 06:50:53,576 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 06:50:53,576 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 06:50:53,576 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 06:50:53,590 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 06:50:53,591 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 06:50:53,651 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 06:50:53,651 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-12 06:50:53,652 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-12 06:50:53,653 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 06:50:53,673 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 06:50:53,678 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 06:50:53,696 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 06:50:53,697 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 06:50:53,697 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9] total 10 [2018-04-12 06:50:53,697 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-04-12 06:50:53,698 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-04-12 06:50:53,698 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=38, Invalid=52, Unknown=0, NotChecked=0, Total=90 [2018-04-12 06:50:53,698 INFO L87 Difference]: Start difference. First operand 143 states and 155 transitions. Second operand 10 states. [2018-04-12 06:50:53,721 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 06:50:53,721 INFO L93 Difference]: Finished difference Result 146 states and 158 transitions. [2018-04-12 06:50:53,721 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-04-12 06:50:53,721 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 68 [2018-04-12 06:50:53,722 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 06:50:53,722 INFO L225 Difference]: With dead ends: 146 [2018-04-12 06:50:53,722 INFO L226 Difference]: Without dead ends: 144 [2018-04-12 06:50:53,723 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 77 GetRequests, 68 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=42, Invalid=68, Unknown=0, NotChecked=0, Total=110 [2018-04-12 06:50:53,723 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 144 states. [2018-04-12 06:50:53,726 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 144 to 144. [2018-04-12 06:50:53,726 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 144 states. [2018-04-12 06:50:53,727 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 144 states to 144 states and 156 transitions. [2018-04-12 06:50:53,727 INFO L78 Accepts]: Start accepts. Automaton has 144 states and 156 transitions. Word has length 68 [2018-04-12 06:50:53,727 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 06:50:53,727 INFO L459 AbstractCegarLoop]: Abstraction has 144 states and 156 transitions. [2018-04-12 06:50:53,727 INFO L460 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-04-12 06:50:53,727 INFO L276 IsEmpty]: Start isEmpty. Operand 144 states and 156 transitions. [2018-04-12 06:50:53,728 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 70 [2018-04-12 06:50:53,728 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 06:50:53,728 INFO L355 BasicCegarLoop]: trace histogram [6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 06:50:53,728 INFO L408 AbstractCegarLoop]: === Iteration 20 === [__U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_add_tailErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_set_drvdataErr0RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_delErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_returnErr0RequiresViolation]=== [2018-04-12 06:50:53,729 INFO L82 PathProgramCache]: Analyzing trace with hash 34408600, now seen corresponding path program 2 times [2018-04-12 06:50:53,729 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-12 06:50:53,729 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-12 06:50:53,730 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 06:50:53,730 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 06:50:53,730 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 06:50:53,744 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 06:50:53,745 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 06:50:53,805 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 06:50:53,805 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-12 06:50:53,805 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-12 06:50:53,806 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-04-12 06:50:53,857 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2018-04-12 06:50:53,858 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-12 06:50:53,865 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 06:50:53,877 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-04-12 06:50:53,877 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 06:50:53,891 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-04-12 06:50:53,892 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 06:50:53,907 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-12 06:50:53,907 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:38, output treesize:36 [2018-04-12 06:50:54,259 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2018-04-12 06:50:54,259 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-04-12 06:50:54,259 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [20] imperfect sequences [10] total 29 [2018-04-12 06:50:54,260 INFO L442 AbstractCegarLoop]: Interpolant automaton has 29 states [2018-04-12 06:50:54,260 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2018-04-12 06:50:54,260 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=92, Invalid=720, Unknown=0, NotChecked=0, Total=812 [2018-04-12 06:50:54,261 INFO L87 Difference]: Start difference. First operand 144 states and 156 transitions. Second operand 29 states. [2018-04-12 06:50:54,956 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 06:50:54,957 INFO L93 Difference]: Finished difference Result 145 states and 155 transitions. [2018-04-12 06:50:54,957 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2018-04-12 06:50:54,957 INFO L78 Accepts]: Start accepts. Automaton has 29 states. Word has length 69 [2018-04-12 06:50:54,957 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 06:50:54,957 INFO L225 Difference]: With dead ends: 145 [2018-04-12 06:50:54,957 INFO L226 Difference]: Without dead ends: 143 [2018-04-12 06:50:54,958 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 93 GetRequests, 50 SyntacticMatches, 1 SemanticMatches, 42 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 295 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=212, Invalid=1680, Unknown=0, NotChecked=0, Total=1892 [2018-04-12 06:50:54,958 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 143 states. [2018-04-12 06:50:54,961 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 143 to 143. [2018-04-12 06:50:54,961 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 143 states. [2018-04-12 06:50:54,962 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 143 states to 143 states and 153 transitions. [2018-04-12 06:50:54,962 INFO L78 Accepts]: Start accepts. Automaton has 143 states and 153 transitions. Word has length 69 [2018-04-12 06:50:54,962 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 06:50:54,963 INFO L459 AbstractCegarLoop]: Abstraction has 143 states and 153 transitions. [2018-04-12 06:50:54,963 INFO L460 AbstractCegarLoop]: Interpolant automaton has 29 states. [2018-04-12 06:50:54,963 INFO L276 IsEmpty]: Start isEmpty. Operand 143 states and 153 transitions. [2018-04-12 06:50:54,963 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 74 [2018-04-12 06:50:54,964 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 06:50:54,964 INFO L355 BasicCegarLoop]: trace histogram [7, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 06:50:54,964 INFO L408 AbstractCegarLoop]: === Iteration 21 === [__U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_add_tailErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_set_drvdataErr0RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_delErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_returnErr0RequiresViolation]=== [2018-04-12 06:50:54,964 INFO L82 PathProgramCache]: Analyzing trace with hash -1900360089, now seen corresponding path program 1 times [2018-04-12 06:50:54,964 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-12 06:50:54,964 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-12 06:50:54,965 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 06:50:54,965 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-12 06:50:54,965 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 06:50:54,973 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 06:50:54,973 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 06:50:55,057 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2018-04-12 06:50:55,057 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-12 06:50:55,057 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-12 06:50:55,058 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 06:50:55,071 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 06:50:55,073 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 06:50:55,180 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-04-12 06:50:55,180 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 06:50:55,180 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11] total 20 [2018-04-12 06:50:55,180 INFO L442 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-04-12 06:50:55,181 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-04-12 06:50:55,181 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=65, Invalid=315, Unknown=0, NotChecked=0, Total=380 [2018-04-12 06:50:55,181 INFO L87 Difference]: Start difference. First operand 143 states and 153 transitions. Second operand 20 states. [2018-04-12 06:50:55,319 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 06:50:55,319 INFO L93 Difference]: Finished difference Result 147 states and 153 transitions. [2018-04-12 06:50:55,320 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-04-12 06:50:55,320 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 73 [2018-04-12 06:50:55,320 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 06:50:55,321 INFO L225 Difference]: With dead ends: 147 [2018-04-12 06:50:55,321 INFO L226 Difference]: Without dead ends: 141 [2018-04-12 06:50:55,321 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 87 GetRequests, 65 SyntacticMatches, 0 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=81, Invalid=471, Unknown=0, NotChecked=0, Total=552 [2018-04-12 06:50:55,321 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 141 states. [2018-04-12 06:50:55,324 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 141 to 141. [2018-04-12 06:50:55,324 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 141 states. [2018-04-12 06:50:55,325 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 141 states to 141 states and 147 transitions. [2018-04-12 06:50:55,325 INFO L78 Accepts]: Start accepts. Automaton has 141 states and 147 transitions. Word has length 73 [2018-04-12 06:50:55,325 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 06:50:55,325 INFO L459 AbstractCegarLoop]: Abstraction has 141 states and 147 transitions. [2018-04-12 06:50:55,325 INFO L460 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-04-12 06:50:55,326 INFO L276 IsEmpty]: Start isEmpty. Operand 141 states and 147 transitions. [2018-04-12 06:50:55,326 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 86 [2018-04-12 06:50:55,326 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 06:50:55,327 INFO L355 BasicCegarLoop]: trace histogram [8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 06:50:55,327 INFO L408 AbstractCegarLoop]: === Iteration 22 === [__U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_add_tailErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_set_drvdataErr0RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_delErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_returnErr0RequiresViolation]=== [2018-04-12 06:50:55,327 INFO L82 PathProgramCache]: Analyzing trace with hash 1516662274, now seen corresponding path program 1 times [2018-04-12 06:50:55,327 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-12 06:50:55,327 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-12 06:50:55,328 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 06:50:55,328 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 06:50:55,328 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 06:50:55,342 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 06:50:55,344 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 06:50:55,577 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2018-04-12 06:50:55,578 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 06:50:55,578 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [24] imperfect sequences [] total 24 [2018-04-12 06:50:55,578 INFO L442 AbstractCegarLoop]: Interpolant automaton has 25 states [2018-04-12 06:50:55,578 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2018-04-12 06:50:55,578 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=49, Invalid=551, Unknown=0, NotChecked=0, Total=600 [2018-04-12 06:50:55,578 INFO L87 Difference]: Start difference. First operand 141 states and 147 transitions. Second operand 25 states. [2018-04-12 06:50:56,013 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 06:50:56,014 INFO L93 Difference]: Finished difference Result 153 states and 162 transitions. [2018-04-12 06:50:56,014 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2018-04-12 06:50:56,014 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 85 [2018-04-12 06:50:56,014 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 06:50:56,015 INFO L225 Difference]: With dead ends: 153 [2018-04-12 06:50:56,015 INFO L226 Difference]: Without dead ends: 153 [2018-04-12 06:50:56,015 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 33 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 82 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=85, Invalid=1037, Unknown=0, NotChecked=0, Total=1122 [2018-04-12 06:50:56,015 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 153 states. [2018-04-12 06:50:56,018 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 153 to 147. [2018-04-12 06:50:56,018 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 147 states. [2018-04-12 06:50:56,019 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 147 states to 147 states and 157 transitions. [2018-04-12 06:50:56,019 INFO L78 Accepts]: Start accepts. Automaton has 147 states and 157 transitions. Word has length 85 [2018-04-12 06:50:56,019 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 06:50:56,019 INFO L459 AbstractCegarLoop]: Abstraction has 147 states and 157 transitions. [2018-04-12 06:50:56,019 INFO L460 AbstractCegarLoop]: Interpolant automaton has 25 states. [2018-04-12 06:50:56,019 INFO L276 IsEmpty]: Start isEmpty. Operand 147 states and 157 transitions. [2018-04-12 06:50:56,020 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 86 [2018-04-12 06:50:56,020 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 06:50:56,020 INFO L355 BasicCegarLoop]: trace histogram [8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 06:50:56,020 INFO L408 AbstractCegarLoop]: === Iteration 23 === [__U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_add_tailErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_set_drvdataErr0RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_delErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_returnErr0RequiresViolation]=== [2018-04-12 06:50:56,020 INFO L82 PathProgramCache]: Analyzing trace with hash 1516662275, now seen corresponding path program 1 times [2018-04-12 06:50:56,021 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-12 06:50:56,021 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-12 06:50:56,021 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 06:50:56,022 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 06:50:56,022 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 06:50:56,036 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 06:50:56,038 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 06:50:56,134 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 06:50:56,134 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-12 06:50:56,134 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-12 06:50:56,135 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 06:50:56,149 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 06:50:56,151 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 06:50:56,169 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 06:50:56,169 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 06:50:56,169 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12] total 13 [2018-04-12 06:50:56,170 INFO L442 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-04-12 06:50:56,170 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-04-12 06:50:56,170 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=68, Invalid=88, Unknown=0, NotChecked=0, Total=156 [2018-04-12 06:50:56,170 INFO L87 Difference]: Start difference. First operand 147 states and 157 transitions. Second operand 13 states. [2018-04-12 06:50:56,198 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 06:50:56,198 INFO L93 Difference]: Finished difference Result 150 states and 160 transitions. [2018-04-12 06:50:56,199 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-04-12 06:50:56,199 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 85 [2018-04-12 06:50:56,199 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 06:50:56,200 INFO L225 Difference]: With dead ends: 150 [2018-04-12 06:50:56,200 INFO L226 Difference]: Without dead ends: 148 [2018-04-12 06:50:56,200 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 97 GetRequests, 85 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 23 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=72, Invalid=110, Unknown=0, NotChecked=0, Total=182 [2018-04-12 06:50:56,200 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 148 states. [2018-04-12 06:50:56,203 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 148 to 148. [2018-04-12 06:50:56,203 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 148 states. [2018-04-12 06:50:56,204 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 148 states to 148 states and 158 transitions. [2018-04-12 06:50:56,204 INFO L78 Accepts]: Start accepts. Automaton has 148 states and 158 transitions. Word has length 85 [2018-04-12 06:50:56,204 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 06:50:56,204 INFO L459 AbstractCegarLoop]: Abstraction has 148 states and 158 transitions. [2018-04-12 06:50:56,204 INFO L460 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-04-12 06:50:56,205 INFO L276 IsEmpty]: Start isEmpty. Operand 148 states and 158 transitions. [2018-04-12 06:50:56,205 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 87 [2018-04-12 06:50:56,205 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 06:50:56,205 INFO L355 BasicCegarLoop]: trace histogram [9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 06:50:56,205 INFO L408 AbstractCegarLoop]: === Iteration 24 === [__U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_add_tailErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_set_drvdataErr0RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_delErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_returnErr0RequiresViolation]=== [2018-04-12 06:50:56,206 INFO L82 PathProgramCache]: Analyzing trace with hash -1879414648, now seen corresponding path program 2 times [2018-04-12 06:50:56,206 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-12 06:50:56,206 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-12 06:50:56,206 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 06:50:56,207 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 06:50:56,207 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 06:50:56,221 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 06:50:56,222 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 06:50:56,303 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 06:50:56,303 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-12 06:50:56,303 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-12 06:50:56,304 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-04-12 06:50:56,332 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2018-04-12 06:50:56,333 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-12 06:50:56,338 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 06:50:56,353 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-04-12 06:50:56,353 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 06:50:56,367 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-04-12 06:50:56,367 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 06:50:56,379 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-12 06:50:56,379 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:38, output treesize:36 [2018-04-12 06:50:56,853 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2018-04-12 06:50:56,853 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-04-12 06:50:56,853 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [24] imperfect sequences [13] total 36 [2018-04-12 06:50:56,854 INFO L442 AbstractCegarLoop]: Interpolant automaton has 36 states [2018-04-12 06:50:56,854 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2018-04-12 06:50:56,854 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=134, Invalid=1126, Unknown=0, NotChecked=0, Total=1260 [2018-04-12 06:50:56,854 INFO L87 Difference]: Start difference. First operand 148 states and 158 transitions. Second operand 36 states. [2018-04-12 06:50:57,851 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 06:50:57,851 INFO L93 Difference]: Finished difference Result 149 states and 158 transitions. [2018-04-12 06:50:57,852 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2018-04-12 06:50:57,852 INFO L78 Accepts]: Start accepts. Automaton has 36 states. Word has length 86 [2018-04-12 06:50:57,852 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 06:50:57,852 INFO L225 Difference]: With dead ends: 149 [2018-04-12 06:50:57,852 INFO L226 Difference]: Without dead ends: 147 [2018-04-12 06:50:57,853 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 118 GetRequests, 61 SyntacticMatches, 3 SemanticMatches, 54 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 532 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=327, Invalid=2753, Unknown=0, NotChecked=0, Total=3080 [2018-04-12 06:50:57,853 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 147 states. [2018-04-12 06:50:57,855 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 147 to 147. [2018-04-12 06:50:57,855 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 147 states. [2018-04-12 06:50:57,856 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 147 states to 147 states and 156 transitions. [2018-04-12 06:50:57,856 INFO L78 Accepts]: Start accepts. Automaton has 147 states and 156 transitions. Word has length 86 [2018-04-12 06:50:57,856 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 06:50:57,856 INFO L459 AbstractCegarLoop]: Abstraction has 147 states and 156 transitions. [2018-04-12 06:50:57,856 INFO L460 AbstractCegarLoop]: Interpolant automaton has 36 states. [2018-04-12 06:50:57,856 INFO L276 IsEmpty]: Start isEmpty. Operand 147 states and 156 transitions. [2018-04-12 06:50:57,857 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2018-04-12 06:50:57,857 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 06:50:57,857 INFO L355 BasicCegarLoop]: trace histogram [10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 06:50:57,857 INFO L408 AbstractCegarLoop]: === Iteration 25 === [__U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_add_tailErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_set_drvdataErr0RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_delErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_returnErr0RequiresViolation]=== [2018-04-12 06:50:57,857 INFO L82 PathProgramCache]: Analyzing trace with hash 1011558085, now seen corresponding path program 1 times [2018-04-12 06:50:57,857 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-12 06:50:57,857 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-12 06:50:57,858 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 06:50:57,858 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-12 06:50:57,858 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 06:50:57,874 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 06:50:57,875 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 06:50:57,968 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 06:50:57,968 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-12 06:50:57,968 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-12 06:50:57,969 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 06:50:57,991 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 06:50:57,996 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 06:50:58,013 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 06:50:58,013 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 06:50:58,013 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14] total 15 [2018-04-12 06:50:58,014 INFO L442 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-04-12 06:50:58,014 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-04-12 06:50:58,014 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=93, Invalid=117, Unknown=0, NotChecked=0, Total=210 [2018-04-12 06:50:58,014 INFO L87 Difference]: Start difference. First operand 147 states and 156 transitions. Second operand 15 states. [2018-04-12 06:50:58,042 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 06:50:58,042 INFO L93 Difference]: Finished difference Result 150 states and 159 transitions. [2018-04-12 06:50:58,042 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-04-12 06:50:58,043 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 93 [2018-04-12 06:50:58,043 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 06:50:58,043 INFO L225 Difference]: With dead ends: 150 [2018-04-12 06:50:58,043 INFO L226 Difference]: Without dead ends: 148 [2018-04-12 06:50:58,044 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 107 GetRequests, 93 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 29 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=97, Invalid=143, Unknown=0, NotChecked=0, Total=240 [2018-04-12 06:50:58,044 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 148 states. [2018-04-12 06:50:58,046 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 148 to 148. [2018-04-12 06:50:58,046 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 148 states. [2018-04-12 06:50:58,047 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 148 states to 148 states and 157 transitions. [2018-04-12 06:50:58,047 INFO L78 Accepts]: Start accepts. Automaton has 148 states and 157 transitions. Word has length 93 [2018-04-12 06:50:58,047 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 06:50:58,047 INFO L459 AbstractCegarLoop]: Abstraction has 148 states and 157 transitions. [2018-04-12 06:50:58,047 INFO L460 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-04-12 06:50:58,047 INFO L276 IsEmpty]: Start isEmpty. Operand 148 states and 157 transitions. [2018-04-12 06:50:58,048 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2018-04-12 06:50:58,048 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 06:50:58,048 INFO L355 BasicCegarLoop]: trace histogram [11, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 06:50:58,048 INFO L408 AbstractCegarLoop]: === Iteration 26 === [__U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_add_tailErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_set_drvdataErr0RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_delErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_returnErr0RequiresViolation]=== [2018-04-12 06:50:58,048 INFO L82 PathProgramCache]: Analyzing trace with hash 181587018, now seen corresponding path program 2 times [2018-04-12 06:50:58,049 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-12 06:50:58,049 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-12 06:50:58,049 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 06:50:58,049 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 06:50:58,050 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 06:50:58,064 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 06:50:58,065 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 06:50:58,171 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 06:50:58,171 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-12 06:50:58,171 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-12 06:50:58,172 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-04-12 06:50:58,207 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-04-12 06:50:58,207 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-12 06:50:58,211 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 06:50:58,224 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 06:50:58,224 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 06:50:58,224 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15] total 16 [2018-04-12 06:50:58,225 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-04-12 06:50:58,225 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-04-12 06:50:58,225 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=107, Invalid=133, Unknown=0, NotChecked=0, Total=240 [2018-04-12 06:50:58,225 INFO L87 Difference]: Start difference. First operand 148 states and 157 transitions. Second operand 16 states. [2018-04-12 06:50:58,257 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 06:50:58,257 INFO L93 Difference]: Finished difference Result 151 states and 160 transitions. [2018-04-12 06:50:58,257 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-04-12 06:50:58,257 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 94 [2018-04-12 06:50:58,257 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 06:50:58,258 INFO L225 Difference]: With dead ends: 151 [2018-04-12 06:50:58,258 INFO L226 Difference]: Without dead ends: 149 [2018-04-12 06:50:58,258 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 109 GetRequests, 94 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 32 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=111, Invalid=161, Unknown=0, NotChecked=0, Total=272 [2018-04-12 06:50:58,258 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 149 states. [2018-04-12 06:50:58,260 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 149 to 149. [2018-04-12 06:50:58,260 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 149 states. [2018-04-12 06:50:58,261 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 149 states to 149 states and 158 transitions. [2018-04-12 06:50:58,261 INFO L78 Accepts]: Start accepts. Automaton has 149 states and 158 transitions. Word has length 94 [2018-04-12 06:50:58,261 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 06:50:58,261 INFO L459 AbstractCegarLoop]: Abstraction has 149 states and 158 transitions. [2018-04-12 06:50:58,261 INFO L460 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-04-12 06:50:58,262 INFO L276 IsEmpty]: Start isEmpty. Operand 149 states and 158 transitions. [2018-04-12 06:50:58,262 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2018-04-12 06:50:58,262 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 06:50:58,262 INFO L355 BasicCegarLoop]: trace histogram [12, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 06:50:58,262 INFO L408 AbstractCegarLoop]: === Iteration 27 === [__U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_add_tailErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_set_drvdataErr0RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_delErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_returnErr0RequiresViolation]=== [2018-04-12 06:50:58,263 INFO L82 PathProgramCache]: Analyzing trace with hash 222287717, now seen corresponding path program 3 times [2018-04-12 06:50:58,263 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-12 06:50:58,263 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-12 06:50:58,263 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 06:50:58,263 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-12 06:50:58,264 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 06:50:58,278 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 06:50:58,279 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 06:50:58,396 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 06:50:58,396 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-12 06:50:58,396 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-12 06:50:58,397 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-04-12 06:50:58,443 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 7 check-sat command(s) [2018-04-12 06:50:58,443 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-12 06:50:58,447 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 06:50:58,473 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 06:50:58,473 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 06:50:58,474 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 16] total 17 [2018-04-12 06:50:58,474 INFO L442 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-04-12 06:50:58,474 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-04-12 06:50:58,474 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=122, Invalid=150, Unknown=0, NotChecked=0, Total=272 [2018-04-12 06:50:58,474 INFO L87 Difference]: Start difference. First operand 149 states and 158 transitions. Second operand 17 states. [2018-04-12 06:50:58,537 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 06:50:58,537 INFO L93 Difference]: Finished difference Result 152 states and 161 transitions. [2018-04-12 06:50:58,538 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-04-12 06:50:58,538 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 95 [2018-04-12 06:50:58,538 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 06:50:58,539 INFO L225 Difference]: With dead ends: 152 [2018-04-12 06:50:58,539 INFO L226 Difference]: Without dead ends: 150 [2018-04-12 06:50:58,539 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 111 GetRequests, 95 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 35 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=126, Invalid=180, Unknown=0, NotChecked=0, Total=306 [2018-04-12 06:50:58,540 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 150 states. [2018-04-12 06:50:58,542 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 150 to 150. [2018-04-12 06:50:58,542 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 150 states. [2018-04-12 06:50:58,543 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 150 states to 150 states and 159 transitions. [2018-04-12 06:50:58,543 INFO L78 Accepts]: Start accepts. Automaton has 150 states and 159 transitions. Word has length 95 [2018-04-12 06:50:58,543 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 06:50:58,543 INFO L459 AbstractCegarLoop]: Abstraction has 150 states and 159 transitions. [2018-04-12 06:50:58,543 INFO L460 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-04-12 06:50:58,543 INFO L276 IsEmpty]: Start isEmpty. Operand 150 states and 159 transitions. [2018-04-12 06:50:58,544 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2018-04-12 06:50:58,544 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 06:50:58,544 INFO L355 BasicCegarLoop]: trace histogram [13, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 06:50:58,544 INFO L408 AbstractCegarLoop]: === Iteration 28 === [__U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_add_tailErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_set_drvdataErr0RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_delErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_returnErr0RequiresViolation]=== [2018-04-12 06:50:58,544 INFO L82 PathProgramCache]: Analyzing trace with hash 1484009386, now seen corresponding path program 4 times [2018-04-12 06:50:58,545 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-12 06:50:58,545 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-12 06:50:58,545 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 06:50:58,546 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-12 06:50:58,546 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 06:50:58,560 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 06:50:58,561 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 06:50:58,685 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 06:50:58,685 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-12 06:50:58,685 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-12 06:50:58,686 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-04-12 06:50:58,719 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-04-12 06:50:58,719 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-12 06:50:58,723 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 06:50:58,737 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 06:50:58,737 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 06:50:58,737 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17] total 18 [2018-04-12 06:50:58,737 INFO L442 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-04-12 06:50:58,738 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-04-12 06:50:58,738 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=138, Invalid=168, Unknown=0, NotChecked=0, Total=306 [2018-04-12 06:50:58,738 INFO L87 Difference]: Start difference. First operand 150 states and 159 transitions. Second operand 18 states. [2018-04-12 06:50:58,771 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 06:50:58,771 INFO L93 Difference]: Finished difference Result 153 states and 162 transitions. [2018-04-12 06:50:58,772 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-04-12 06:50:58,772 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 96 [2018-04-12 06:50:58,772 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 06:50:58,773 INFO L225 Difference]: With dead ends: 153 [2018-04-12 06:50:58,773 INFO L226 Difference]: Without dead ends: 151 [2018-04-12 06:50:58,773 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 113 GetRequests, 96 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 38 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=142, Invalid=200, Unknown=0, NotChecked=0, Total=342 [2018-04-12 06:50:58,773 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 151 states. [2018-04-12 06:50:58,775 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 151 to 151. [2018-04-12 06:50:58,775 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 151 states. [2018-04-12 06:50:58,776 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 151 states to 151 states and 160 transitions. [2018-04-12 06:50:58,776 INFO L78 Accepts]: Start accepts. Automaton has 151 states and 160 transitions. Word has length 96 [2018-04-12 06:50:58,776 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 06:50:58,776 INFO L459 AbstractCegarLoop]: Abstraction has 151 states and 160 transitions. [2018-04-12 06:50:58,776 INFO L460 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-04-12 06:50:58,776 INFO L276 IsEmpty]: Start isEmpty. Operand 151 states and 160 transitions. [2018-04-12 06:50:58,777 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 98 [2018-04-12 06:50:58,777 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 06:50:58,777 INFO L355 BasicCegarLoop]: trace histogram [14, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 06:50:58,777 INFO L408 AbstractCegarLoop]: === Iteration 29 === [__U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_add_tailErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_set_drvdataErr0RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_delErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_returnErr0RequiresViolation]=== [2018-04-12 06:50:58,777 INFO L82 PathProgramCache]: Analyzing trace with hash 1942675461, now seen corresponding path program 5 times [2018-04-12 06:50:58,778 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-12 06:50:58,778 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-12 06:50:58,778 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 06:50:58,778 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-12 06:50:58,779 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 06:50:58,793 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 06:50:58,794 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 06:50:58,932 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 06:50:58,932 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-12 06:50:58,932 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-12 06:50:58,933 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-04-12 06:50:58,965 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 8 check-sat command(s) [2018-04-12 06:50:58,965 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-12 06:50:58,969 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 06:50:58,983 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 06:50:58,983 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 06:50:58,983 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 18] total 19 [2018-04-12 06:50:58,984 INFO L442 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-04-12 06:50:58,984 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-04-12 06:50:58,984 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=155, Invalid=187, Unknown=0, NotChecked=0, Total=342 [2018-04-12 06:50:58,984 INFO L87 Difference]: Start difference. First operand 151 states and 160 transitions. Second operand 19 states. [2018-04-12 06:50:59,026 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 06:50:59,026 INFO L93 Difference]: Finished difference Result 154 states and 163 transitions. [2018-04-12 06:50:59,027 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-04-12 06:50:59,027 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 97 [2018-04-12 06:50:59,027 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 06:50:59,028 INFO L225 Difference]: With dead ends: 154 [2018-04-12 06:50:59,028 INFO L226 Difference]: Without dead ends: 152 [2018-04-12 06:50:59,028 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 115 GetRequests, 97 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 41 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=159, Invalid=221, Unknown=0, NotChecked=0, Total=380 [2018-04-12 06:50:59,028 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 152 states. [2018-04-12 06:50:59,030 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 152 to 152. [2018-04-12 06:50:59,031 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 152 states. [2018-04-12 06:50:59,031 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 152 states to 152 states and 161 transitions. [2018-04-12 06:50:59,031 INFO L78 Accepts]: Start accepts. Automaton has 152 states and 161 transitions. Word has length 97 [2018-04-12 06:50:59,031 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 06:50:59,031 INFO L459 AbstractCegarLoop]: Abstraction has 152 states and 161 transitions. [2018-04-12 06:50:59,032 INFO L460 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-04-12 06:50:59,032 INFO L276 IsEmpty]: Start isEmpty. Operand 152 states and 161 transitions. [2018-04-12 06:50:59,032 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 99 [2018-04-12 06:50:59,032 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 06:50:59,032 INFO L355 BasicCegarLoop]: trace histogram [15, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 06:50:59,032 INFO L408 AbstractCegarLoop]: === Iteration 30 === [__U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_add_tailErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_set_drvdataErr0RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_delErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_returnErr0RequiresViolation]=== [2018-04-12 06:50:59,033 INFO L82 PathProgramCache]: Analyzing trace with hash -1018545398, now seen corresponding path program 6 times [2018-04-12 06:50:59,033 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-12 06:50:59,033 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-12 06:50:59,034 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 06:50:59,034 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-12 06:50:59,034 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 06:50:59,050 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 06:50:59,051 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 06:50:59,200 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 06:50:59,200 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-12 06:50:59,200 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-12 06:50:59,201 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-04-12 06:50:59,245 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 9 check-sat command(s) [2018-04-12 06:50:59,245 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-12 06:50:59,250 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 06:50:59,264 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 06:50:59,264 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 06:50:59,264 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19] total 20 [2018-04-12 06:50:59,265 INFO L442 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-04-12 06:50:59,265 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-04-12 06:50:59,265 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=173, Invalid=207, Unknown=0, NotChecked=0, Total=380 [2018-04-12 06:50:59,265 INFO L87 Difference]: Start difference. First operand 152 states and 161 transitions. Second operand 20 states. [2018-04-12 06:50:59,304 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 06:50:59,304 INFO L93 Difference]: Finished difference Result 155 states and 164 transitions. [2018-04-12 06:50:59,304 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-04-12 06:50:59,304 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 98 [2018-04-12 06:50:59,304 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 06:50:59,305 INFO L225 Difference]: With dead ends: 155 [2018-04-12 06:50:59,305 INFO L226 Difference]: Without dead ends: 153 [2018-04-12 06:50:59,306 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 117 GetRequests, 98 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 44 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=177, Invalid=243, Unknown=0, NotChecked=0, Total=420 [2018-04-12 06:50:59,306 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 153 states. [2018-04-12 06:50:59,308 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 153 to 153. [2018-04-12 06:50:59,308 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 153 states. [2018-04-12 06:50:59,309 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 153 states to 153 states and 162 transitions. [2018-04-12 06:50:59,309 INFO L78 Accepts]: Start accepts. Automaton has 153 states and 162 transitions. Word has length 98 [2018-04-12 06:50:59,309 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 06:50:59,309 INFO L459 AbstractCegarLoop]: Abstraction has 153 states and 162 transitions. [2018-04-12 06:50:59,309 INFO L460 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-04-12 06:50:59,309 INFO L276 IsEmpty]: Start isEmpty. Operand 153 states and 162 transitions. [2018-04-12 06:50:59,310 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 100 [2018-04-12 06:50:59,310 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 06:50:59,310 INFO L355 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 06:50:59,310 INFO L408 AbstractCegarLoop]: === Iteration 31 === [__U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_add_tailErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_set_drvdataErr0RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_delErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_returnErr0RequiresViolation]=== [2018-04-12 06:50:59,310 INFO L82 PathProgramCache]: Analyzing trace with hash 1672888485, now seen corresponding path program 7 times [2018-04-12 06:50:59,310 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-12 06:50:59,311 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-12 06:50:59,311 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 06:50:59,311 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-12 06:50:59,312 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 06:50:59,380 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 06:50:59,381 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 06:50:59,399 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-12 06:50:59,400 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-12 06:50:59,400 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-12 06:50:59,401 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 06:50:59,542 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 06:50:59,546 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 06:50:59,572 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-04-12 06:50:59,573 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-04-12 06:50:59,574 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 06:50:59,575 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 06:50:59,578 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 06:50:59,579 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:20, output treesize:16 [2018-04-12 06:50:59,591 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 20 [2018-04-12 06:50:59,593 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:50:59,593 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 27 [2018-04-12 06:50:59,593 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 06:50:59,597 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 06:50:59,602 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-12 06:50:59,602 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:31, output treesize:27 [2018-04-12 06:50:59,620 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 29 [2018-04-12 06:50:59,624 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:50:59,626 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 38 [2018-04-12 06:50:59,627 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 06:50:59,632 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 06:50:59,640 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-04-12 06:50:59,640 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:47, output treesize:43 [2018-04-12 06:51:00,253 WARN L148 SmtUtils]: Spent 484ms on a formula simplification that was a NOOP. DAG size: 29 [2018-04-12 06:51:00,258 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 38 [2018-04-12 06:51:00,262 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:51:00,267 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 49 [2018-04-12 06:51:00,268 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 06:51:00,274 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 06:51:00,283 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 3 dim-0 vars, and 1 xjuncts. [2018-04-12 06:51:00,284 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:63, output treesize:59 [2018-04-12 06:51:00,970 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 38 [2018-04-12 06:51:01,000 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:51:01,004 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 49 [2018-04-12 06:51:01,005 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 06:51:01,012 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 06:51:01,023 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 3 dim-0 vars, and 1 xjuncts. [2018-04-12 06:51:01,023 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:63, output treesize:59 [2018-04-12 06:51:01,589 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 38 [2018-04-12 06:51:01,596 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:51:01,600 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 49 [2018-04-12 06:51:01,601 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 06:51:01,635 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 06:51:01,651 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 3 dim-0 vars, and 1 xjuncts. [2018-04-12 06:51:01,651 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:63, output treesize:59 [2018-04-12 06:51:02,208 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 38 [2018-04-12 06:51:02,211 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:51:02,214 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 49 [2018-04-12 06:51:02,215 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 06:51:02,224 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 06:51:02,235 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 3 dim-0 vars, and 1 xjuncts. [2018-04-12 06:51:02,235 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:63, output treesize:59 [2018-04-12 06:51:02,362 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 38 [2018-04-12 06:51:02,366 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:51:02,369 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 49 [2018-04-12 06:51:02,369 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 06:51:02,376 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 06:51:02,386 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 3 dim-0 vars, and 1 xjuncts. [2018-04-12 06:51:02,386 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:63, output treesize:59 [2018-04-12 06:51:02,642 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 38 [2018-04-12 06:51:02,645 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:51:02,647 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 49 [2018-04-12 06:51:02,647 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 06:51:02,653 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 06:51:02,666 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 3 dim-0 vars, and 1 xjuncts. [2018-04-12 06:51:02,666 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:63, output treesize:59 [2018-04-12 06:51:03,070 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 38 [2018-04-12 06:51:03,073 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:51:03,075 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 49 [2018-04-12 06:51:03,076 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 06:51:03,081 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 06:51:03,091 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 3 dim-0 vars, and 1 xjuncts. [2018-04-12 06:51:03,091 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:63, output treesize:59 [2018-04-12 06:51:03,130 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 38 [2018-04-12 06:51:03,133 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:51:03,136 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 49 [2018-04-12 06:51:03,136 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 06:51:03,142 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 06:51:03,151 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 3 dim-0 vars, and 1 xjuncts. [2018-04-12 06:51:03,151 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:63, output treesize:59 [2018-04-12 06:51:03,573 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 38 [2018-04-12 06:51:03,576 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:51:03,579 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 49 [2018-04-12 06:51:03,580 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 06:51:03,585 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 06:51:03,594 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 3 dim-0 vars, and 1 xjuncts. [2018-04-12 06:51:03,594 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:63, output treesize:59 [2018-04-12 06:51:04,109 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 38 [2018-04-12 06:51:04,113 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:51:04,117 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 49 [2018-04-12 06:51:04,117 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 06:51:04,125 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 06:51:04,135 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 3 dim-0 vars, and 1 xjuncts. [2018-04-12 06:51:04,135 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:63, output treesize:59 [2018-04-12 06:51:04,254 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 38 [2018-04-12 06:51:04,257 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:51:04,260 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 49 [2018-04-12 06:51:04,260 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 06:51:04,265 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 06:51:04,274 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 3 dim-0 vars, and 1 xjuncts. [2018-04-12 06:51:04,274 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:63, output treesize:59 [2018-04-12 06:51:04,316 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 38 [2018-04-12 06:51:04,319 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:51:04,323 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 49 [2018-04-12 06:51:04,323 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 06:51:04,329 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 06:51:04,337 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 3 dim-0 vars, and 1 xjuncts. [2018-04-12 06:51:04,337 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:63, output treesize:59 [2018-04-12 06:51:04,491 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 38 [2018-04-12 06:51:04,494 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:51:04,497 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 49 [2018-04-12 06:51:04,497 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 06:51:04,503 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 06:51:04,511 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 3 dim-0 vars, and 1 xjuncts. [2018-04-12 06:51:04,511 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:63, output treesize:59 [2018-04-12 06:51:05,696 WARN L1033 $PredicateComparison]: unable to prove that (exists ((__U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEAD_~list.offset Int)) (and (= (store |c_old(#memory_$Pointer$.offset)| |c___U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEAD_#in~list.base| (store (store (select |c_old(#memory_$Pointer$.offset)| |c___U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEAD_#in~list.base|) __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEAD_~list.offset __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEAD_~list.offset) (+ __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEAD_~list.offset 4) __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEAD_~list.offset)) |c_#memory_$Pointer$.offset|) (<= |c___U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEAD_#in~list.offset| __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEAD_~list.offset))) is different from true [2018-04-12 06:51:05,699 WARN L1033 $PredicateComparison]: unable to prove that (exists ((__U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEAD_~list.offset Int)) (and (= |c_#memory_$Pointer$.offset| (store |c_old(#memory_$Pointer$.offset)| |c___U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_init_internal_#in~kobj.base| (store (store (select |c_old(#memory_$Pointer$.offset)| |c___U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_init_internal_#in~kobj.base|) __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEAD_~list.offset __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEAD_~list.offset) (+ __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEAD_~list.offset 4) __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEAD_~list.offset))) (<= (+ |c___U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_init_internal_#in~kobj.offset| 4) __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEAD_~list.offset))) is different from true [2018-04-12 06:51:05,703 WARN L1033 $PredicateComparison]: unable to prove that (exists ((__U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEAD_~list.offset Int)) (and (<= (+ |c___U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_init_#in~kobj.offset| 4) __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEAD_~list.offset) (= (store |c_old(#memory_$Pointer$.offset)| |c___U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_init_#in~kobj.base| (store (store (select |c_old(#memory_$Pointer$.offset)| |c___U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_init_#in~kobj.base|) __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEAD_~list.offset __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEAD_~list.offset) (+ __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEAD_~list.offset 4) __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEAD_~list.offset)) |c_#memory_$Pointer$.offset|))) is different from true [2018-04-12 06:51:05,708 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 42 treesize of output 33 [2018-04-12 06:51:05,710 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:51:05,710 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:51:05,711 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:51:05,713 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:51:05,726 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 4 case distinctions, treesize of input 33 treesize of output 69 [2018-04-12 06:51:05,735 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:51:05,736 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:51:05,736 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 53 treesize of output 78 [2018-04-12 06:51:05,737 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-12 06:51:05,780 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:51:05,781 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:51:05,782 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:51:05,782 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:51:05,783 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:51:05,784 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:51:05,789 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 6 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 33 treesize of output 96 [2018-04-12 06:51:05,790 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 2 xjuncts. [2018-04-12 06:51:05,843 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:51:05,844 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:51:05,844 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:51:05,845 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:51:05,845 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:51:05,847 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:51:05,851 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 6 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 33 treesize of output 96 [2018-04-12 06:51:05,852 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 2 xjuncts. [2018-04-12 06:51:05,911 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:51:05,911 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:51:05,912 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:51:05,912 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:51:05,913 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:51:05,913 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:51:05,914 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:51:05,917 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:51:05,926 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 8 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 4 case distinctions, treesize of input 35 treesize of output 110 [2018-04-12 06:51:05,927 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 4 xjuncts. [2018-04-12 06:51:06,025 INFO L267 ElimStorePlain]: Start of recursive call 3: 4 dim-1 vars, End of recursive call: and 9 xjuncts. [2018-04-12 06:51:06,083 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 9 xjuncts. [2018-04-12 06:51:06,154 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 1 dim-2 vars, End of recursive call: 24 dim-0 vars, and 9 xjuncts. [2018-04-12 06:51:06,154 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 5 variables, input treesize:59, output treesize:465 [2018-04-12 06:51:08,311 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 64 treesize of output 54 [2018-04-12 06:51:08,315 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:51:08,316 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:51:08,317 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:51:08,317 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:51:08,318 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:51:08,318 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:51:08,321 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:51:08,334 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 7 disjoint index pairs (out of 10 index pairs), introduced 0 new quantified variables, introduced 4 case distinctions, treesize of input 36 treesize of output 101 [2018-04-12 06:51:08,335 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 4 xjuncts. [2018-04-12 06:51:08,381 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 3 xjuncts. [2018-04-12 06:51:08,432 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 52 treesize of output 44 [2018-04-12 06:51:08,435 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:51:08,436 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:51:08,436 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:51:08,438 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:51:08,446 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 4 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 3 case distinctions, treesize of input 28 treesize of output 62 [2018-04-12 06:51:08,446 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 4 xjuncts. [2018-04-12 06:51:08,473 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 3 xjuncts. [2018-04-12 06:51:08,553 INFO L267 ElimStorePlain]: Start of recursive call 1: 7 dim-0 vars, 2 dim-2 vars, End of recursive call: and 6 xjuncts. [2018-04-12 06:51:08,553 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 9 variables, input treesize:123, output treesize:137 [2018-04-12 06:51:08,730 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 14 proven. 31 refuted. 0 times theorem prover too weak. 91 trivial. 0 not checked. [2018-04-12 06:51:08,731 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-12 06:51:08,731 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [41] total 41 [2018-04-12 06:51:08,731 INFO L442 AbstractCegarLoop]: Interpolant automaton has 42 states [2018-04-12 06:51:08,731 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 42 interpolants. [2018-04-12 06:51:08,731 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=108, Invalid=1383, Unknown=3, NotChecked=228, Total=1722 [2018-04-12 06:51:08,732 INFO L87 Difference]: Start difference. First operand 153 states and 162 transitions. Second operand 42 states. [2018-04-12 06:51:11,030 WARN L148 SmtUtils]: Spent 812ms on a formula simplification that was a NOOP. DAG size: 34 [2018-04-12 06:51:12,834 WARN L148 SmtUtils]: Spent 311ms on a formula simplification that was a NOOP. DAG size: 56 [2018-04-12 06:51:15,565 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 06:51:15,565 INFO L93 Difference]: Finished difference Result 152 states and 161 transitions. [2018-04-12 06:51:15,566 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 42 states. [2018-04-12 06:51:15,566 INFO L78 Accepts]: Start accepts. Automaton has 42 states. Word has length 99 [2018-04-12 06:51:15,566 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 06:51:15,567 INFO L225 Difference]: With dead ends: 152 [2018-04-12 06:51:15,567 INFO L226 Difference]: Without dead ends: 152 [2018-04-12 06:51:15,568 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 124 GetRequests, 44 SyntacticMatches, 14 SemanticMatches, 66 ConstructedPredicates, 3 IntricatePredicates, 0 DeprecatedPredicates, 759 ImplicationChecksByTransitivity, 11.7s TimeCoverageRelationStatistics Valid=283, Invalid=3886, Unknown=3, NotChecked=384, Total=4556 [2018-04-12 06:51:15,568 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 152 states. [2018-04-12 06:51:15,570 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 152 to 152. [2018-04-12 06:51:15,570 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 152 states. [2018-04-12 06:51:15,571 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 152 states to 152 states and 161 transitions. [2018-04-12 06:51:15,571 INFO L78 Accepts]: Start accepts. Automaton has 152 states and 161 transitions. Word has length 99 [2018-04-12 06:51:15,571 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 06:51:15,571 INFO L459 AbstractCegarLoop]: Abstraction has 152 states and 161 transitions. [2018-04-12 06:51:15,572 INFO L460 AbstractCegarLoop]: Interpolant automaton has 42 states. [2018-04-12 06:51:15,572 INFO L276 IsEmpty]: Start isEmpty. Operand 152 states and 161 transitions. [2018-04-12 06:51:15,572 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 101 [2018-04-12 06:51:15,572 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 06:51:15,572 INFO L355 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 06:51:15,572 INFO L408 AbstractCegarLoop]: === Iteration 32 === [__U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_add_tailErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_set_drvdataErr0RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_delErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____false_valid_deref_i__ldv_atomic_sub_returnErr0RequiresViolation]=== [2018-04-12 06:51:15,573 INFO L82 PathProgramCache]: Analyzing trace with hash 319935676, now seen corresponding path program 1 times [2018-04-12 06:51:15,573 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-12 06:51:15,573 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-12 06:51:15,574 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 06:51:15,574 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 06:51:15,574 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 06:51:15,623 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 06:51:15,624 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 06:51:15,636 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-12 06:51:15,636 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-12 06:51:15,636 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-12 06:51:15,637 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 06:51:15,728 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 06:51:15,734 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 06:51:15,778 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-04-12 06:51:15,780 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-12 06:51:15,780 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 06:51:15,781 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 06:51:15,785 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 06:51:15,785 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:18, output treesize:14 [2018-04-12 06:51:15,800 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 16 [2018-04-12 06:51:15,803 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 17 [2018-04-12 06:51:15,803 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 06:51:15,808 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 06:51:15,815 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-12 06:51:15,816 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:32, output treesize:28 [2018-04-12 06:51:15,839 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 23 [2018-04-12 06:51:15,845 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 26 [2018-04-12 06:51:15,874 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 06:51:15,880 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 06:51:15,891 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-04-12 06:51:15,891 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:46, output treesize:42 [2018-04-12 06:51:15,921 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 30 [2018-04-12 06:51:15,930 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 35 [2018-04-12 06:51:15,931 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 06:51:15,939 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 06:51:15,954 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 3 dim-0 vars, and 1 xjuncts. [2018-04-12 06:51:15,954 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:60, output treesize:56 [2018-04-12 06:51:15,989 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 37 [2018-04-12 06:51:16,006 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 0 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 44 [2018-04-12 06:51:16,006 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 06:51:16,016 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 06:51:16,035 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 1 dim-2 vars, End of recursive call: 4 dim-0 vars, and 1 xjuncts. [2018-04-12 06:51:16,035 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 5 variables, input treesize:74, output treesize:70 [2018-04-12 06:51:16,080 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 57 treesize of output 44 [2018-04-12 06:51:16,106 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 5 select indices, 5 select index equivalence classes, 0 disjoint index pairs (out of 10 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 53 [2018-04-12 06:51:16,106 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 06:51:16,118 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 06:51:16,136 INFO L267 ElimStorePlain]: Start of recursive call 1: 5 dim-0 vars, 1 dim-2 vars, End of recursive call: 5 dim-0 vars, and 1 xjuncts. [2018-04-12 06:51:16,136 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 6 variables, input treesize:88, output treesize:84 [2018-04-12 06:51:16,184 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 51 [2018-04-12 06:51:16,211 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 6 select indices, 6 select index equivalence classes, 0 disjoint index pairs (out of 15 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 62 [2018-04-12 06:51:16,211 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 06:51:16,222 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 06:51:16,240 INFO L267 ElimStorePlain]: Start of recursive call 1: 6 dim-0 vars, 1 dim-2 vars, End of recursive call: 6 dim-0 vars, and 1 xjuncts. [2018-04-12 06:51:16,240 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 7 variables, input treesize:102, output treesize:98 [2018-04-12 06:51:16,532 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 75 treesize of output 58 [2018-04-12 06:51:16,559 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 7 select indices, 7 select index equivalence classes, 0 disjoint index pairs (out of 21 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 58 treesize of output 71 [2018-04-12 06:51:16,559 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 06:51:16,570 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 06:51:16,591 INFO L267 ElimStorePlain]: Start of recursive call 1: 7 dim-0 vars, 1 dim-2 vars, End of recursive call: 7 dim-0 vars, and 1 xjuncts. [2018-04-12 06:51:16,591 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 8 variables, input treesize:116, output treesize:112 [2018-04-12 06:51:20,945 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 84 treesize of output 65 [2018-04-12 06:51:20,974 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 8 select indices, 8 select index equivalence classes, 0 disjoint index pairs (out of 28 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 65 treesize of output 80 [2018-04-12 06:51:20,975 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 06:51:20,986 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 06:51:21,030 INFO L267 ElimStorePlain]: Start of recursive call 1: 8 dim-0 vars, 1 dim-2 vars, End of recursive call: 8 dim-0 vars, and 1 xjuncts. [2018-04-12 06:51:21,030 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 9 variables, input treesize:130, output treesize:126 [2018-04-12 06:51:33,565 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 93 treesize of output 72 [2018-04-12 06:51:33,605 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 9 select indices, 9 select index equivalence classes, 0 disjoint index pairs (out of 36 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 72 treesize of output 89 [2018-04-12 06:51:33,606 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 06:51:33,630 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 06:51:33,668 INFO L267 ElimStorePlain]: Start of recursive call 1: 9 dim-0 vars, 1 dim-2 vars, End of recursive call: 9 dim-0 vars, and 1 xjuncts. [2018-04-12 06:51:33,669 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 10 variables, input treesize:144, output treesize:140 [2018-04-12 06:51:54,739 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 102 treesize of output 79 [2018-04-12 06:51:54,858 INFO L303 Elim1Store]: Index analysis took 118 ms [2018-04-12 06:51:54,859 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 10 select indices, 10 select index equivalence classes, 0 disjoint index pairs (out of 45 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 79 treesize of output 98 [2018-04-12 06:51:54,859 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 06:51:54,877 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 06:51:54,918 INFO L267 ElimStorePlain]: Start of recursive call 1: 10 dim-0 vars, 1 dim-2 vars, End of recursive call: 10 dim-0 vars, and 1 xjuncts. [2018-04-12 06:51:54,918 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 11 variables, input treesize:158, output treesize:154 [2018-04-12 06:52:23,384 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 111 treesize of output 86 [2018-04-12 06:52:23,551 INFO L303 Elim1Store]: Index analysis took 165 ms [2018-04-12 06:52:23,551 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 11 select indices, 11 select index equivalence classes, 0 disjoint index pairs (out of 55 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 86 treesize of output 107 [2018-04-12 06:52:23,552 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 06:52:23,574 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 06:52:23,621 INFO L267 ElimStorePlain]: Start of recursive call 1: 11 dim-0 vars, 1 dim-2 vars, End of recursive call: 11 dim-0 vars, and 1 xjuncts. [2018-04-12 06:52:23,621 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 12 variables, input treesize:172, output treesize:168 [2018-04-12 06:52:59,887 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 120 treesize of output 93 [2018-04-12 06:52:59,968 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 12 select indices, 12 select index equivalence classes, 0 disjoint index pairs (out of 66 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 93 treesize of output 116 [2018-04-12 06:52:59,968 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 06:52:59,993 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 06:53:00,038 INFO L267 ElimStorePlain]: Start of recursive call 1: 12 dim-0 vars, 1 dim-2 vars, End of recursive call: 12 dim-0 vars, and 1 xjuncts. [2018-04-12 06:53:00,038 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 13 variables, input treesize:186, output treesize:182 [2018-04-12 06:53:43,146 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 129 treesize of output 100 [2018-04-12 06:53:43,419 INFO L303 Elim1Store]: Index analysis took 271 ms [2018-04-12 06:53:43,419 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 13 select indices, 13 select index equivalence classes, 0 disjoint index pairs (out of 78 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 100 treesize of output 125 [2018-04-12 06:53:43,420 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 06:53:43,451 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 06:53:43,503 INFO L267 ElimStorePlain]: Start of recursive call 1: 13 dim-0 vars, 1 dim-2 vars, End of recursive call: 13 dim-0 vars, and 1 xjuncts. [2018-04-12 06:53:43,503 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 14 variables, input treesize:200, output treesize:196 [2018-04-12 06:54:32,379 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 138 treesize of output 107 [2018-04-12 06:54:32,766 INFO L303 Elim1Store]: Index analysis took 384 ms [2018-04-12 06:54:32,781 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 14 select indices, 14 select index equivalence classes, 0 disjoint index pairs (out of 91 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 107 treesize of output 134 [2018-04-12 06:54:32,781 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 06:54:32,815 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 06:54:32,878 INFO L267 ElimStorePlain]: Start of recursive call 1: 14 dim-0 vars, 1 dim-2 vars, End of recursive call: 14 dim-0 vars, and 1 xjuncts. [2018-04-12 06:54:32,878 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 15 variables, input treesize:214, output treesize:210 [2018-04-12 06:55:28,090 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 147 treesize of output 114 [2018-04-12 06:55:28,211 INFO L303 Elim1Store]: Index analysis took 119 ms [2018-04-12 06:55:28,212 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 15 select indices, 15 select index equivalence classes, 0 disjoint index pairs (out of 105 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 114 treesize of output 143 [2018-04-12 06:55:28,212 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 06:55:28,243 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 06:55:28,312 INFO L267 ElimStorePlain]: Start of recursive call 1: 15 dim-0 vars, 1 dim-2 vars, End of recursive call: 15 dim-0 vars, and 1 xjuncts. [2018-04-12 06:55:28,312 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 16 variables, input treesize:228, output treesize:224 [2018-04-12 06:57:02,040 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 161 treesize of output 126 [2018-04-12 06:57:02,068 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,071 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,075 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,084 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,087 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,089 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,092 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,095 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,098 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,100 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,102 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,105 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,107 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,110 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,113 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,115 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,117 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,119 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,121 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,123 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,125 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,127 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,129 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,131 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,133 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,135 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,137 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,139 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,141 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,143 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,145 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,148 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,150 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,152 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,155 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,167 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,173 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,176 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,180 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,183 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,186 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,189 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,193 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,197 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,200 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,202 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,204 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,207 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,210 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,212 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,214 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,217 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,220 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,222 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,225 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,227 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,229 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,231 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,233 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,235 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,237 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,240 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,244 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,246 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,248 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,250 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,252 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,256 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,259 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,261 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,264 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,267 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,274 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,277 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,281 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,284 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,288 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,291 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,297 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,300 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,303 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,307 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,310 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,313 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,317 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,320 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,322 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,324 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,327 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,329 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,331 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,333 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,335 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,337 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,339 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,341 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,343 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,345 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,346 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,348 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,350 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,352 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,354 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,368 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,371 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,375 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,380 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,383 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,387 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,389 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,392 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,394 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,396 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,399 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,401 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,404 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,407 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,409 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,413 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,415 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,417 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,419 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,421 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,424 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,426 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,427 INFO L682 Elim1Store]: detected equality via solver [2018-04-12 06:57:02,451 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,471 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,491 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,509 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,518 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,520 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,571 INFO L303 Elim1Store]: Index analysis took 527 ms [2018-04-12 06:57:02,572 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 16 select indices, 16 select index equivalence classes, 120 disjoint index pairs (out of 120 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 126 treesize of output 1176 [2018-04-12 06:57:02,607 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,608 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,609 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,610 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,611 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,612 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,613 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,614 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,614 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,615 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,616 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,618 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,619 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,620 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,621 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,621 INFO L682 Elim1Store]: detected equality via solver [2018-04-12 06:57:02,622 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,631 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,632 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,633 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,634 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,635 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,635 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,636 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,637 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,638 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,638 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,639 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,640 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,641 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,641 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,642 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,643 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,644 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,644 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,645 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,646 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,647 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,648 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,648 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,657 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,658 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,660 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,660 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,661 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,662 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,663 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,664 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,664 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,665 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,666 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,667 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,667 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,668 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,668 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,669 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,670 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,670 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,671 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,672 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,673 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,674 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,675 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,675 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,676 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,677 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,678 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,679 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,680 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,680 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,681 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,682 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,683 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,684 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,685 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,686 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,687 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,687 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,688 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,689 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,690 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,691 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,691 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,692 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,692 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,693 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,694 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,694 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,695 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,696 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,696 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,697 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,697 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,698 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,699 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,699 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,700 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,701 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,701 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,702 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,702 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,703 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,704 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,704 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,705 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,706 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,706 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,707 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,707 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,708 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,709 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,709 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,710 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,710 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,711 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,712 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,712 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,713 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,713 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,714 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,715 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:57:02,740 INFO L303 Elim1Store]: Index analysis took 153 ms [2018-04-12 06:57:02,742 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 16 select indices, 16 select index equivalence classes, 120 disjoint index pairs (out of 120 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 121 treesize of output 1080 [2018-04-12 06:57:02,743 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-12 06:57:03,224 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 06:57:03,245 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 06:57:03,299 INFO L267 ElimStorePlain]: Start of recursive call 1: 16 dim-0 vars, 1 dim-2 vars, End of recursive call: 16 dim-0 vars, and 1 xjuncts. [2018-04-12 06:57:03,299 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 17 variables, input treesize:243, output treesize:225 [2018-04-12 06:57:37,446 WARN L148 SmtUtils]: Spent 2661ms on a formula simplification that was a NOOP. DAG size: 203 [2018-04-12 06:57:40,508 WARN L148 SmtUtils]: Spent 2676ms on a formula simplification that was a NOOP. DAG size: 203 [2018-04-12 06:57:43,580 WARN L148 SmtUtils]: Spent 2681ms on a formula simplification that was a NOOP. DAG size: 203 [2018-04-12 06:57:47,317 WARN L148 SmtUtils]: Spent 2644ms on a formula simplification that was a NOOP. DAG size: 203 [2018-04-12 06:57:50,424 WARN L148 SmtUtils]: Spent 2656ms on a formula simplification that was a NOOP. DAG size: 203 [2018-04-12 06:58:09,718 WARN L148 SmtUtils]: Spent 2665ms on a formula simplification that was a NOOP. DAG size: 203 [2018-04-12 06:58:12,667 WARN L148 SmtUtils]: Spent 2495ms on a formula simplification that was a NOOP. DAG size: 203 [2018-04-12 06:58:12,688 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 292 treesize of output 234 [2018-04-12 06:58:12,723 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:12,724 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:12,726 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:12,727 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:12,728 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:12,729 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:12,730 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:12,731 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:12,732 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:12,733 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:12,734 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:12,735 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:12,736 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:12,737 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:12,738 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:12,739 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:12,740 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:12,741 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:12,742 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:12,744 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:12,745 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:12,746 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:12,747 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:12,748 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:12,749 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:12,750 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:12,751 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:12,752 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:12,753 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:12,754 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:12,755 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:12,756 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:12,757 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:12,758 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:12,759 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:12,760 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:12,761 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:12,763 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:12,764 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:12,765 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:12,766 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:12,767 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:12,768 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:12,769 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:12,770 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:12,771 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:12,772 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:12,773 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:12,774 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:12,775 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:12,776 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:12,777 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:12,778 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:12,779 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:12,780 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:12,781 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:12,782 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:12,783 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:12,784 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:12,785 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:12,786 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:12,787 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:12,788 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:12,789 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:12,790 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:12,791 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:12,792 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:12,793 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:12,794 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:12,795 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:12,796 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:12,797 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:12,798 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:12,799 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:12,801 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:12,802 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:12,803 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:12,804 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:12,805 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:12,806 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:12,807 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:12,808 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:12,809 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:12,810 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:12,811 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:12,812 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:12,813 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:12,814 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:12,815 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:12,816 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:12,817 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:12,818 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:12,819 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:12,820 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:12,821 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:12,822 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:12,824 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:12,825 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:12,826 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:12,827 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:12,828 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:12,829 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:12,830 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:12,831 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:12,832 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:12,833 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:12,834 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:12,835 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:12,836 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:12,837 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:12,838 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:12,839 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:12,840 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:12,841 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:12,842 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:12,843 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:12,844 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:12,845 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:12,846 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:12,847 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:12,908 INFO L303 Elim1Store]: Index analysis took 216 ms [2018-04-12 06:58:13,042 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 17 select indices, 17 select index equivalence classes, 120 disjoint index pairs (out of 136 index pairs), introduced 0 new quantified variables, introduced 16 case distinctions, treesize of input 230 treesize of output 1203 [2018-04-12 06:58:13,043 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 16 [2018-04-12 06:58:13,048 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 4 xjuncts. [2018-04-12 06:58:16,000 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:16,001 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:16,002 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:16,002 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:16,003 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:16,004 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:16,004 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:16,005 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:16,006 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:16,007 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:16,007 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:16,008 INFO L682 Elim1Store]: detected equality via solver [2018-04-12 06:58:16,009 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:16,009 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:16,010 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:16,011 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:16,012 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:16,012 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:16,013 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:16,014 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:16,014 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:16,015 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:16,016 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:16,016 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:16,017 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:16,018 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:16,019 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:16,019 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:16,020 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:16,021 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:16,021 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:16,022 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:16,023 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:16,024 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:16,024 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:16,025 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:16,026 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:16,027 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:16,027 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:16,028 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:16,029 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:16,029 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:16,030 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:16,031 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:16,032 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:16,032 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:16,033 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:16,034 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:16,035 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:16,035 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:16,036 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:16,037 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:16,038 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:16,038 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:16,039 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:16,040 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:16,040 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:16,041 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:16,042 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:16,043 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:16,043 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:16,044 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:16,045 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:16,045 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:16,046 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:16,047 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:16,048 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:16,048 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:16,049 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:16,050 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:16,051 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:16,051 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:16,052 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:16,053 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:16,054 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:16,054 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:16,055 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:16,056 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:16,057 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:16,057 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:16,058 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:16,059 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:16,059 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:16,060 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:16,061 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:16,062 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:16,062 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:16,063 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:16,064 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:16,065 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:16,065 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:16,066 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:16,067 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:16,067 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:16,068 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:16,069 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:16,070 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:16,070 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:16,071 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:16,072 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:16,073 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:16,073 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:16,074 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:16,075 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:16,076 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:16,076 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:16,077 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:16,078 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:16,079 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:16,079 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:16,080 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:16,081 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:16,081 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:16,082 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:16,083 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:16,084 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:16,084 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:16,085 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:16,086 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:16,087 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:16,087 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:16,136 INFO L303 Elim1Store]: Index analysis took 154 ms [2018-04-12 06:58:16,241 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 18 select indices, 18 select index equivalence classes, 120 disjoint index pairs (out of 153 index pairs), introduced 0 new quantified variables, introduced 17 case distinctions, treesize of input 123 treesize of output 1099 [2018-04-12 06:58:16,241 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 16 [2018-04-12 06:58:16,246 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 4 xjuncts. [2018-04-12 06:58:18,463 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,464 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,465 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,465 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,466 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,467 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,468 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,469 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,469 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,470 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,471 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,472 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,472 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,473 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,474 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,475 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,475 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,476 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,477 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,478 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,478 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,479 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,480 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,481 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,481 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,482 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,483 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,483 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,484 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,485 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,486 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,486 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,487 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,488 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,488 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,489 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,490 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,490 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,491 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,492 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,492 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,493 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,494 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,495 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,495 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,496 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,497 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,497 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,498 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,499 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,499 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,500 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,501 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,501 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,502 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,503 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,503 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,504 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,505 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,505 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,506 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,507 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,508 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,508 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,509 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,510 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,511 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,511 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,512 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,513 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,513 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,514 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,515 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,516 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,516 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,517 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,518 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,519 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,519 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,520 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,521 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,522 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,523 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,523 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,524 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,525 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,525 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,526 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,527 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,528 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,528 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,529 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,530 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,531 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,531 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,532 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,533 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,534 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,534 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,535 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,536 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,537 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,537 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,538 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,539 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,539 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,540 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,541 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,542 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,543 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,543 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,544 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,545 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,545 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,546 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,547 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,548 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,548 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,549 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,550 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,573 INFO L303 Elim1Store]: Index analysis took 126 ms [2018-04-12 06:58:18,575 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 16 select indices, 16 select index equivalence classes, 120 disjoint index pairs (out of 120 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 205 treesize of output 1025 [2018-04-12 06:58:18,577 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-12 06:58:18,584 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,585 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,585 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,586 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,587 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,587 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,588 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,588 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,589 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,590 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,590 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,591 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,591 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,592 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,593 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,593 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,594 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,594 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,595 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,596 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,597 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,598 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,599 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,599 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,600 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,601 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,601 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,602 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,602 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,603 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,604 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,604 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,605 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,605 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,606 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,607 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,607 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,608 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,608 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,609 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,610 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,610 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,611 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,612 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,612 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,613 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,613 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,614 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,615 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,615 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,616 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,616 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,617 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,618 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,618 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,619 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,619 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,620 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,621 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,621 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,622 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,623 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,623 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,624 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,625 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,625 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,626 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,627 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,627 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,628 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,629 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,629 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,630 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,631 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,632 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,632 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,633 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,634 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,634 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,635 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,636 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,636 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,637 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,638 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,638 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,639 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,640 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,640 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,641 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,641 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,642 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,643 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,643 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,644 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,645 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,645 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,646 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,647 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,648 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,648 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,649 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,650 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,651 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,652 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,652 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,653 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,654 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,654 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,655 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,656 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,657 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,657 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,658 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,659 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,659 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,660 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,661 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,662 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,662 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,663 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,681 INFO L303 Elim1Store]: Index analysis took 101 ms [2018-04-12 06:58:18,682 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 16 select indices, 16 select index equivalence classes, 120 disjoint index pairs (out of 120 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 126 treesize of output 946 [2018-04-12 06:58:18,683 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-04-12 06:58:18,690 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,691 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,692 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,692 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,693 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,694 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,694 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,695 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,696 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,696 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,697 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,698 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,699 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,699 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,700 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,701 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,701 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,702 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,703 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,703 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,704 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,705 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,705 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,706 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,707 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,708 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,708 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,709 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,710 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,711 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,711 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,712 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,713 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,713 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,714 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,715 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,716 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,716 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,717 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,718 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,719 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,720 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,720 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,721 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,722 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,723 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,723 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,724 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,725 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,726 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,726 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,727 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,728 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,728 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,729 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,730 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,730 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,731 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,732 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,733 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,733 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,734 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,735 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,735 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,736 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,737 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,737 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,738 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,739 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,740 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,740 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,741 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,742 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,743 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,743 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,744 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,745 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,745 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,746 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,747 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,748 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,748 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,749 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,750 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,750 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,751 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,752 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,752 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,753 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,754 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,754 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,755 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,756 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,756 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,757 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,758 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,759 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,759 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,760 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,761 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,762 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,762 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,763 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,764 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,764 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,765 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,766 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,767 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,767 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,768 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,769 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,770 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,770 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,771 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,772 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,773 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,773 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,774 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,775 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,776 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 06:58:18,798 INFO L303 Elim1Store]: Index analysis took 111 ms [2018-04-12 06:58:18,799 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 16 select indices, 16 select index equivalence classes, 120 disjoint index pairs (out of 120 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 196 treesize of output 1016 [2018-04-12 06:58:18,800 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-04-12 06:58:20,767 INFO L267 ElimStorePlain]: Start of recursive call 2: 3 dim-1 vars, End of recursive call: and 3 xjuncts. [2018-04-12 06:58:39,037 INFO L267 ElimStorePlain]: Start of recursive call 1: 34 dim-0 vars, 1 dim-2 vars, End of recursive call: and 3 xjuncts. [2018-04-12 06:58:39,038 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 35 variables, input treesize:459, output treesize:597 [2018-04-12 06:58:39,404 WARN L151 SmtUtils]: Spent 158ms on a formula simplification. DAG size of input: 142 DAG size of output 18 [2018-04-12 06:58:39,775 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 88 refuted. 48 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 06:58:39,775 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-12 06:58:39,775 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [55] total 55 [2018-04-12 06:58:39,775 INFO L442 AbstractCegarLoop]: Interpolant automaton has 56 states [2018-04-12 06:58:39,775 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 56 interpolants. [2018-04-12 06:58:39,776 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=195, Invalid=2745, Unknown=140, NotChecked=0, Total=3080 [2018-04-12 06:58:39,776 INFO L87 Difference]: Start difference. First operand 152 states and 161 transitions. Second operand 56 states. [2018-04-12 06:59:07,496 WARN L148 SmtUtils]: Spent 12070ms on a formula simplification that was a NOOP. DAG size: 119 [2018-04-12 06:59:43,856 WARN L148 SmtUtils]: Spent 16110ms on a formula simplification that was a NOOP. DAG size: 125 [2018-04-12 07:00:47,063 WARN L148 SmtUtils]: Spent 18135ms on a formula simplification that was a NOOP. DAG size: 128 [2018-04-12 07:00:51,255 WARN L195 Executor]: External (z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000) stderr output: (error "out of memory") [2018-04-12 07:00:51,256 FATAL L265 ToolchainWalker]: An unrecoverable error occured during an interaction with an SMT solver: de.uni_freiburg.informatik.ultimate.logic.SMTLIBException: External (z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000) Connection to SMT solver broken at de.uni_freiburg.informatik.ultimate.smtsolver.external.Executor.input(Executor.java:123) at de.uni_freiburg.informatik.ultimate.smtsolver.external.Scriptor.pop(Scriptor.java:138) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.arrays.DiffWrapperScript.pop(DiffWrapperScript.java:188) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.managedscript.ManagedScript.pop(ManagedScript.java:128) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.hoaretriple.IncrementalHoareTripleChecker.unAssertPrecondition(IncrementalHoareTripleChecker.java:320) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.hoaretriple.IncrementalHoareTripleChecker.clearAssertionStack(IncrementalHoareTripleChecker.java:242) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.hoaretriple.IncrementalHoareTripleChecker.releaseLock(IncrementalHoareTripleChecker.java:254) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.predicates.ProtectiveHoareTripleChecker.releaseLock(ProtectiveHoareTripleChecker.java:94) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.predicates.EfficientHoareTripleChecker.releaseLock(EfficientHoareTripleChecker.java:164) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.predicates.CachingHoareTripleChecker.releaseLock(CachingHoareTripleChecker.java:202) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.interpolantautomata.transitionappender.AbstractInterpolantAutomaton.switchToReadonlyMode(AbstractInterpolantAutomaton.java:141) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.BasicCegarLoop.computeAutomataDifference(BasicCegarLoop.java:610) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.BasicCegarLoop.refineAbstraction(BasicCegarLoop.java:564) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterateInternal(AbstractCegarLoop.java:452) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterate(AbstractCegarLoop.java:363) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.iterate(TraceAbstractionStarter.java:304) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.runCegarLoops(TraceAbstractionStarter.java:150) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.(TraceAbstractionStarter.java:118) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver.finish(TraceAbstractionObserver.java:119) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runObserver(PluginConnector.java:168) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runTool(PluginConnector.java:151) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.run(PluginConnector.java:128) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.executePluginConnector(ToolchainWalker.java:232) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.processPlugin(ToolchainWalker.java:226) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walkUnprotected(ToolchainWalker.java:142) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walk(ToolchainWalker.java:104) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainManager$Toolchain.processToolchain(ToolchainManager.java:324) at de.uni_freiburg.informatik.ultimate.core.coreplugin.toolchain.DefaultToolchainJob.runToolchainDefault(DefaultToolchainJob.java:221) at de.uni_freiburg.informatik.ultimate.core.coreplugin.toolchain.BasicToolchainJob.run(BasicToolchainJob.java:134) at org.eclipse.core.internal.jobs.Worker.run(Worker.java:55) Caused by: java.io.IOException: Stream closed at java.lang.ProcessBuilder$NullOutputStream.write(ProcessBuilder.java:433) at java.io.OutputStream.write(OutputStream.java:116) at java.io.BufferedOutputStream.flushBuffer(BufferedOutputStream.java:82) at java.io.BufferedOutputStream.flush(BufferedOutputStream.java:140) at sun.nio.cs.StreamEncoder.implFlush(StreamEncoder.java:297) at sun.nio.cs.StreamEncoder.flush(StreamEncoder.java:141) at java.io.OutputStreamWriter.flush(OutputStreamWriter.java:229) at java.io.BufferedWriter.flush(BufferedWriter.java:254) at de.uni_freiburg.informatik.ultimate.smtsolver.external.Executor.input(Executor.java:120) ... 29 more [2018-04-12 07:00:51,258 INFO L168 Benchmark]: Toolchain (without parser) took 603840.97 ms. Allocated memory was 356.0 MB in the beginning and 688.4 MB in the end (delta: 332.4 MB). Free memory was 295.6 MB in the beginning and 505.9 MB in the end (delta: -210.3 MB). Peak memory consumption was 122.1 MB. Max. memory is 5.3 GB. [2018-04-12 07:00:51,259 INFO L168 Benchmark]: CDTParser took 0.15 ms. Allocated memory is still 356.0 MB. Free memory is still 324.2 MB. There was no memory consumed. Max. memory is 5.3 GB. [2018-04-12 07:00:51,259 INFO L168 Benchmark]: CACSL2BoogieTranslator took 352.13 ms. Allocated memory is still 356.0 MB. Free memory was 294.4 MB in the beginning and 251.2 MB in the end (delta: 43.2 MB). Peak memory consumption was 43.2 MB. Max. memory is 5.3 GB. [2018-04-12 07:00:51,259 INFO L168 Benchmark]: Boogie Preprocessor took 52.37 ms. Allocated memory is still 356.0 MB. Free memory was 251.2 MB in the beginning and 247.3 MB in the end (delta: 4.0 MB). Peak memory consumption was 4.0 MB. Max. memory is 5.3 GB. [2018-04-12 07:00:51,259 INFO L168 Benchmark]: RCFGBuilder took 688.69 ms. Allocated memory was 356.0 MB in the beginning and 480.8 MB in the end (delta: 124.8 MB). Free memory was 247.3 MB in the beginning and 356.9 MB in the end (delta: -109.6 MB). Peak memory consumption was 30.8 MB. Max. memory is 5.3 GB. [2018-04-12 07:00:51,259 INFO L168 Benchmark]: TraceAbstraction took 602744.60 ms. Allocated memory was 480.8 MB in the beginning and 688.4 MB in the end (delta: 207.6 MB). Free memory was 355.6 MB in the beginning and 505.9 MB in the end (delta: -150.3 MB). Peak memory consumption was 57.3 MB. Max. memory is 5.3 GB. [2018-04-12 07:00:51,261 INFO L344 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.15 ms. Allocated memory is still 356.0 MB. Free memory is still 324.2 MB. There was no memory consumed. Max. memory is 5.3 GB. * CACSL2BoogieTranslator took 352.13 ms. Allocated memory is still 356.0 MB. Free memory was 294.4 MB in the beginning and 251.2 MB in the end (delta: 43.2 MB). Peak memory consumption was 43.2 MB. Max. memory is 5.3 GB. * Boogie Preprocessor took 52.37 ms. Allocated memory is still 356.0 MB. Free memory was 251.2 MB in the beginning and 247.3 MB in the end (delta: 4.0 MB). Peak memory consumption was 4.0 MB. Max. memory is 5.3 GB. * RCFGBuilder took 688.69 ms. Allocated memory was 356.0 MB in the beginning and 480.8 MB in the end (delta: 124.8 MB). Free memory was 247.3 MB in the beginning and 356.9 MB in the end (delta: -109.6 MB). Peak memory consumption was 30.8 MB. Max. memory is 5.3 GB. * TraceAbstraction took 602744.60 ms. Allocated memory was 480.8 MB in the beginning and 688.4 MB in the end (delta: 207.6 MB). Free memory was 355.6 MB in the beginning and 505.9 MB in the end (delta: -150.3 MB). Peak memory consumption was 57.3 MB. Max. memory is 5.3 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - ExceptionOrErrorResult: SMTLIBException: External (z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000) Connection to SMT solver broken de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: SMTLIBException: External (z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000) Connection to SMT solver broken: de.uni_freiburg.informatik.ultimate.smtsolver.external.Executor.input(Executor.java:123) RESULT: Ultimate could not prove your program: Toolchain returned no result. Written .csv to /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memleaks_test22_3_false-valid-deref.i_svcomp-DerefFreeMemtrack-32bit-Automizer_SmtInterpol_NoArray.epf_AutomizerC.xml/Csv-Benchmark-0-2018-04-12_07-00-51-265.csv Received shutdown request...