java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv --cacsl2boogietranslator.bitprecise.bitfields false -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/cade18-smtinterpol/svcomp-DerefFreeMemtrack-32bit-Automizer_Camel.epf -i ../../../trunk/examples/svcomp/forester-heap/dll-simple-white-blue_true-unreach-call_false-valid-memtrack.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-408c70d-m [2018-04-12 17:10:14,307 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-04-12 17:10:14,309 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-04-12 17:10:14,321 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-04-12 17:10:14,321 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-04-12 17:10:14,322 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-04-12 17:10:14,323 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-04-12 17:10:14,324 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-04-12 17:10:14,326 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-04-12 17:10:14,326 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-04-12 17:10:14,327 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-04-12 17:10:14,327 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-04-12 17:10:14,328 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-04-12 17:10:14,329 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-04-12 17:10:14,330 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-04-12 17:10:14,331 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-04-12 17:10:14,333 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-04-12 17:10:14,334 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-04-12 17:10:14,335 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-04-12 17:10:14,336 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-04-12 17:10:14,338 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-04-12 17:10:14,338 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-04-12 17:10:14,338 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-04-12 17:10:14,339 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-04-12 17:10:14,340 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-04-12 17:10:14,341 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-04-12 17:10:14,341 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-04-12 17:10:14,341 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-04-12 17:10:14,342 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-04-12 17:10:14,342 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-04-12 17:10:14,342 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-04-12 17:10:14,343 INFO L98 SettingsManager]: Beginning loading settings from /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/cade18-smtinterpol/svcomp-DerefFreeMemtrack-32bit-Automizer_Camel.epf [2018-04-12 17:10:14,352 INFO L110 SettingsManager]: Loading preferences was successful [2018-04-12 17:10:14,353 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-04-12 17:10:14,354 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-04-12 17:10:14,354 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-04-12 17:10:14,354 INFO L133 SettingsManager]: * Use SBE=true [2018-04-12 17:10:14,354 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-04-12 17:10:14,354 INFO L133 SettingsManager]: * sizeof long=4 [2018-04-12 17:10:14,354 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-04-12 17:10:14,354 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-04-12 17:10:14,355 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-04-12 17:10:14,355 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-04-12 17:10:14,355 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-04-12 17:10:14,355 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-04-12 17:10:14,355 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-04-12 17:10:14,355 INFO L133 SettingsManager]: * sizeof long double=12 [2018-04-12 17:10:14,356 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-04-12 17:10:14,356 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-04-12 17:10:14,356 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-04-12 17:10:14,356 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-04-12 17:10:14,356 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-04-12 17:10:14,356 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-04-12 17:10:14,356 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-04-12 17:10:14,357 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-04-12 17:10:14,357 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Bitprecise bitfields -> false [2018-04-12 17:10:14,386 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-04-12 17:10:14,399 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully (re)initialized [2018-04-12 17:10:14,403 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-04-12 17:10:14,404 INFO L271 PluginConnector]: Initializing CDTParser... [2018-04-12 17:10:14,405 INFO L276 PluginConnector]: CDTParser initialized [2018-04-12 17:10:14,405 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/forester-heap/dll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:14,738 INFO L225 CDTParser]: Created temporary CDT project at /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/data/FLAGffb8e9771 [2018-04-12 17:10:14,859 INFO L287 CDTParser]: IsIndexed: true [2018-04-12 17:10:14,859 INFO L288 CDTParser]: Found 1 translation units. [2018-04-12 17:10:14,859 INFO L168 CDTParser]: Scanning dll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:14,868 INFO L210 ultiparseSymbolTable]: Include resolver: [2018-04-12 17:10:14,868 INFO L215 ultiparseSymbolTable]: [2018-04-12 17:10:14,868 INFO L218 ultiparseSymbolTable]: Function table: [2018-04-12 17:10:14,869 INFO L221 ultiparseSymbolTable]: Function definition of null ('main') in dll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:14,869 INFO L227 ultiparseSymbolTable]: Global variable table: [2018-04-12 17:10:14,869 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__register_t in dll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:14,869 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____fsword_t in dll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:14,869 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____uint64_t in dll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:14,869 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__ssize_t in dll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:14,869 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__pthread_once_t in dll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:14,869 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__off_t in dll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:14,869 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____nlink_t in dll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:14,870 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__pthread_attr_t in dll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:14,870 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____int8_t in dll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:14,870 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__timer_t in dll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:14,870 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____sig_atomic_t in dll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:14,870 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__wchar_t in dll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:14,870 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____socklen_t in dll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:14,870 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__pthread_t in dll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:14,870 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____fd_mask in dll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:14,870 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____useconds_t in dll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:14,871 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__pthread_condattr_t in dll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:14,871 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____fsfilcnt64_t in dll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:14,871 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____int64_t in dll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:14,871 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__ldiv_t in dll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:14,871 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__ino_t in dll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:14,871 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____time_t in dll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:14,871 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____timer_t in dll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:14,871 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__pthread_mutexattr_t in dll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:14,871 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____key_t in dll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:14,871 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____uint8_t in dll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:14,871 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____daddr_t in dll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:14,872 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__loff_t in dll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:14,872 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__int8_t in dll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:14,872 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____fsfilcnt_t in dll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:14,872 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__u_int64_t in dll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:14,872 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____fsblkcnt64_t in dll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:14,872 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____rlim_t in dll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:14,872 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__quad_t in dll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:14,872 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__int64_t in dll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:14,872 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__u_int16_t in dll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:14,872 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__fsid_t in dll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:14,872 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__mode_t in dll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:14,873 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__pthread_cond_t in dll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:14,873 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____u_short in dll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:14,873 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____clock_t in dll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:14,873 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__pthread_spinlock_t in dll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:14,873 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__div_t in dll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:14,873 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__size_t in dll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:14,873 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____clockid_t in dll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:14,873 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__suseconds_t in dll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:14,873 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____loff_t in dll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:14,873 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__uid_t in dll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:14,873 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__fd_set in dll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:14,873 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____mode_t in dll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:14,873 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____fsid_t in dll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:14,873 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__blksize_t in dll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:14,873 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__clock_t in dll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:14,873 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____uint32_t in dll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:14,873 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____intptr_t in dll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:14,873 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__pid_t in dll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:14,874 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__u_long in dll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:14,874 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____int16_t in dll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:14,874 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____ino_t in dll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:14,874 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__u_short in dll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:14,874 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__gid_t in dll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:14,874 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__SLL in dll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:14,874 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____sigset_t in dll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:14,874 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__caddr_t in dll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:14,874 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__u_int32_t in dll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:14,874 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__pthread_barrierattr_t in dll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:14,874 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__blkcnt_t in dll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:14,874 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__sigset_t in dll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:14,874 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__ulong in dll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:14,874 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____u_long in dll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:14,874 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____caddr_t in dll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:14,874 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__pthread_key_t in dll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:14,874 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__u_char in dll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:14,874 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____dev_t in dll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:14,874 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____fsblkcnt_t in dll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:14,874 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__int16_t in dll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:14,875 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__lldiv_t in dll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:14,875 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____uint16_t in dll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:14,875 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____id_t in dll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:14,875 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____quad_t in dll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:14,875 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__daddr_t in dll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:14,875 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____qaddr_t in dll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:14,875 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____gid_t in dll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:14,875 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____blksize_t in dll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:14,875 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____syscall_ulong_t in dll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:14,875 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____u_quad_t in dll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:14,875 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__pthread_barrier_t in dll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:14,875 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__fsblkcnt_t in dll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:14,875 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____pid_t in dll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:14,876 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__u_quad_t in dll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:14,876 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____off64_t in dll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:14,876 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____suseconds_t in dll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:14,876 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__ushort in dll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:14,876 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____u_char in dll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:14,876 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____rlim64_t in dll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:14,876 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__u_int in dll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:14,876 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____blkcnt_t in dll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:14,876 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__fd_mask in dll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:14,876 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__pthread_mutex_t in dll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:14,876 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____int32_t in dll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:14,876 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____syscall_slong_t in dll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:14,877 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__time_t in dll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:14,877 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____u_int in dll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:14,877 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____pthread_slist_t in dll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:14,877 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__u_int8_t in dll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:14,877 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__idtype_t in dll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:14,877 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__key_t in dll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:14,877 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__clockid_t in dll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:14,877 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____ssize_t in dll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:14,877 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__pthread_rwlock_t in dll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:14,877 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__uint in dll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:14,877 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__nlink_t in dll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:14,877 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__int32_t in dll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:14,878 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__id_t in dll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:14,878 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____off_t in dll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:14,878 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__dev_t in dll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:14,878 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__fsfilcnt_t in dll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:14,878 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_simple_white_blue_true_unreach_call_false_valid_memtrack_i__pthread_rwlockattr_t in dll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:14,878 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____blkcnt64_t in dll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:14,878 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____uid_t in dll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:14,878 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fdll_simple_white_blue_true_unreach_call_false_valid_memtrack_i____ino64_t in dll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:14,892 INFO L330 CDTParser]: Deleted temporary CDT project at /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/data/FLAGffb8e9771 [2018-04-12 17:10:14,895 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-04-12 17:10:14,896 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-04-12 17:10:14,896 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-04-12 17:10:14,896 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-04-12 17:10:14,900 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-04-12 17:10:14,900 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 12.04 05:10:14" (1/1) ... [2018-04-12 17:10:14,902 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@32691b76 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 05:10:14, skipping insertion in model container [2018-04-12 17:10:14,902 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 12.04 05:10:14" (1/1) ... [2018-04-12 17:10:14,912 INFO L167 Dispatcher]: Using SV-COMP mode [2018-04-12 17:10:14,936 INFO L167 Dispatcher]: Using SV-COMP mode [2018-04-12 17:10:15,082 INFO L175 PostProcessor]: Settings: Checked method=main [2018-04-12 17:10:15,120 INFO L175 PostProcessor]: Settings: Checked method=main [2018-04-12 17:10:15,125 INFO L100 SccComputation]: Graph consists of 0 InCaSumBalls and 115 non ball SCCs. Number of states in SCCs 115. [2018-04-12 17:10:15,164 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 05:10:15 WrapperNode [2018-04-12 17:10:15,164 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-04-12 17:10:15,165 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-04-12 17:10:15,165 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-04-12 17:10:15,165 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-04-12 17:10:15,178 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 05:10:15" (1/1) ... [2018-04-12 17:10:15,178 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 05:10:15" (1/1) ... [2018-04-12 17:10:15,197 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 05:10:15" (1/1) ... [2018-04-12 17:10:15,198 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 05:10:15" (1/1) ... [2018-04-12 17:10:15,210 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 05:10:15" (1/1) ... [2018-04-12 17:10:15,214 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 05:10:15" (1/1) ... [2018-04-12 17:10:15,217 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 05:10:15" (1/1) ... [2018-04-12 17:10:15,221 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-04-12 17:10:15,221 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-04-12 17:10:15,221 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-04-12 17:10:15,221 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-04-12 17:10:15,222 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 05:10:15" (1/1) ... No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-04-12 17:10:15,317 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-04-12 17:10:15,317 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-04-12 17:10:15,317 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-04-12 17:10:15,317 INFO L128 BoogieDeclarations]: Found specification of procedure __ctype_get_mb_cur_max [2018-04-12 17:10:15,317 INFO L128 BoogieDeclarations]: Found specification of procedure atof [2018-04-12 17:10:15,317 INFO L128 BoogieDeclarations]: Found specification of procedure atoi [2018-04-12 17:10:15,317 INFO L128 BoogieDeclarations]: Found specification of procedure atol [2018-04-12 17:10:15,318 INFO L128 BoogieDeclarations]: Found specification of procedure atoll [2018-04-12 17:10:15,318 INFO L128 BoogieDeclarations]: Found specification of procedure strtod [2018-04-12 17:10:15,318 INFO L128 BoogieDeclarations]: Found specification of procedure strtof [2018-04-12 17:10:15,318 INFO L128 BoogieDeclarations]: Found specification of procedure strtold [2018-04-12 17:10:15,318 INFO L128 BoogieDeclarations]: Found specification of procedure strtol [2018-04-12 17:10:15,318 INFO L128 BoogieDeclarations]: Found specification of procedure strtoul [2018-04-12 17:10:15,318 INFO L128 BoogieDeclarations]: Found specification of procedure strtoq [2018-04-12 17:10:15,318 INFO L128 BoogieDeclarations]: Found specification of procedure strtouq [2018-04-12 17:10:15,318 INFO L128 BoogieDeclarations]: Found specification of procedure strtoll [2018-04-12 17:10:15,318 INFO L128 BoogieDeclarations]: Found specification of procedure strtoull [2018-04-12 17:10:15,318 INFO L128 BoogieDeclarations]: Found specification of procedure l64a [2018-04-12 17:10:15,319 INFO L128 BoogieDeclarations]: Found specification of procedure a64l [2018-04-12 17:10:15,319 INFO L128 BoogieDeclarations]: Found specification of procedure select [2018-04-12 17:10:15,319 INFO L128 BoogieDeclarations]: Found specification of procedure pselect [2018-04-12 17:10:15,319 INFO L128 BoogieDeclarations]: Found specification of procedure gnu_dev_major [2018-04-12 17:10:15,319 INFO L128 BoogieDeclarations]: Found specification of procedure gnu_dev_minor [2018-04-12 17:10:15,319 INFO L128 BoogieDeclarations]: Found specification of procedure gnu_dev_makedev [2018-04-12 17:10:15,319 INFO L128 BoogieDeclarations]: Found specification of procedure random [2018-04-12 17:10:15,319 INFO L128 BoogieDeclarations]: Found specification of procedure srandom [2018-04-12 17:10:15,320 INFO L128 BoogieDeclarations]: Found specification of procedure initstate [2018-04-12 17:10:15,320 INFO L128 BoogieDeclarations]: Found specification of procedure setstate [2018-04-12 17:10:15,320 INFO L128 BoogieDeclarations]: Found specification of procedure random_r [2018-04-12 17:10:15,320 INFO L128 BoogieDeclarations]: Found specification of procedure srandom_r [2018-04-12 17:10:15,320 INFO L128 BoogieDeclarations]: Found specification of procedure initstate_r [2018-04-12 17:10:15,320 INFO L128 BoogieDeclarations]: Found specification of procedure setstate_r [2018-04-12 17:10:15,320 INFO L128 BoogieDeclarations]: Found specification of procedure rand [2018-04-12 17:10:15,320 INFO L128 BoogieDeclarations]: Found specification of procedure srand [2018-04-12 17:10:15,320 INFO L128 BoogieDeclarations]: Found specification of procedure rand_r [2018-04-12 17:10:15,321 INFO L128 BoogieDeclarations]: Found specification of procedure drand48 [2018-04-12 17:10:15,321 INFO L128 BoogieDeclarations]: Found specification of procedure erand48 [2018-04-12 17:10:15,321 INFO L128 BoogieDeclarations]: Found specification of procedure lrand48 [2018-04-12 17:10:15,321 INFO L128 BoogieDeclarations]: Found specification of procedure nrand48 [2018-04-12 17:10:15,321 INFO L128 BoogieDeclarations]: Found specification of procedure mrand48 [2018-04-12 17:10:15,321 INFO L128 BoogieDeclarations]: Found specification of procedure jrand48 [2018-04-12 17:10:15,321 INFO L128 BoogieDeclarations]: Found specification of procedure srand48 [2018-04-12 17:10:15,321 INFO L128 BoogieDeclarations]: Found specification of procedure seed48 [2018-04-12 17:10:15,321 INFO L128 BoogieDeclarations]: Found specification of procedure lcong48 [2018-04-12 17:10:15,321 INFO L128 BoogieDeclarations]: Found specification of procedure drand48_r [2018-04-12 17:10:15,322 INFO L128 BoogieDeclarations]: Found specification of procedure erand48_r [2018-04-12 17:10:15,322 INFO L128 BoogieDeclarations]: Found specification of procedure lrand48_r [2018-04-12 17:10:15,322 INFO L128 BoogieDeclarations]: Found specification of procedure nrand48_r [2018-04-12 17:10:15,322 INFO L128 BoogieDeclarations]: Found specification of procedure mrand48_r [2018-04-12 17:10:15,322 INFO L128 BoogieDeclarations]: Found specification of procedure jrand48_r [2018-04-12 17:10:15,322 INFO L128 BoogieDeclarations]: Found specification of procedure srand48_r [2018-04-12 17:10:15,322 INFO L128 BoogieDeclarations]: Found specification of procedure seed48_r [2018-04-12 17:10:15,322 INFO L128 BoogieDeclarations]: Found specification of procedure lcong48_r [2018-04-12 17:10:15,322 INFO L128 BoogieDeclarations]: Found specification of procedure malloc [2018-04-12 17:10:15,322 INFO L128 BoogieDeclarations]: Found specification of procedure calloc [2018-04-12 17:10:15,323 INFO L128 BoogieDeclarations]: Found specification of procedure realloc [2018-04-12 17:10:15,323 INFO L128 BoogieDeclarations]: Found specification of procedure free [2018-04-12 17:10:15,323 INFO L128 BoogieDeclarations]: Found specification of procedure cfree [2018-04-12 17:10:15,323 INFO L128 BoogieDeclarations]: Found specification of procedure alloca [2018-04-12 17:10:15,323 INFO L128 BoogieDeclarations]: Found specification of procedure valloc [2018-04-12 17:10:15,323 INFO L128 BoogieDeclarations]: Found specification of procedure posix_memalign [2018-04-12 17:10:15,323 INFO L128 BoogieDeclarations]: Found specification of procedure aligned_alloc [2018-04-12 17:10:15,323 INFO L128 BoogieDeclarations]: Found specification of procedure abort [2018-04-12 17:10:15,323 INFO L128 BoogieDeclarations]: Found specification of procedure atexit [2018-04-12 17:10:15,323 INFO L128 BoogieDeclarations]: Found specification of procedure at_quick_exit [2018-04-12 17:10:15,324 INFO L128 BoogieDeclarations]: Found specification of procedure on_exit [2018-04-12 17:10:15,324 INFO L128 BoogieDeclarations]: Found specification of procedure exit [2018-04-12 17:10:15,324 INFO L128 BoogieDeclarations]: Found specification of procedure quick_exit [2018-04-12 17:10:15,324 INFO L128 BoogieDeclarations]: Found specification of procedure _Exit [2018-04-12 17:10:15,324 INFO L128 BoogieDeclarations]: Found specification of procedure getenv [2018-04-12 17:10:15,324 INFO L128 BoogieDeclarations]: Found specification of procedure putenv [2018-04-12 17:10:15,324 INFO L128 BoogieDeclarations]: Found specification of procedure setenv [2018-04-12 17:10:15,324 INFO L128 BoogieDeclarations]: Found specification of procedure unsetenv [2018-04-12 17:10:15,324 INFO L128 BoogieDeclarations]: Found specification of procedure clearenv [2018-04-12 17:10:15,324 INFO L128 BoogieDeclarations]: Found specification of procedure mktemp [2018-04-12 17:10:15,325 INFO L128 BoogieDeclarations]: Found specification of procedure mkstemp [2018-04-12 17:10:15,325 INFO L128 BoogieDeclarations]: Found specification of procedure mkstemps [2018-04-12 17:10:15,325 INFO L128 BoogieDeclarations]: Found specification of procedure mkdtemp [2018-04-12 17:10:15,325 INFO L128 BoogieDeclarations]: Found specification of procedure system [2018-04-12 17:10:15,325 INFO L128 BoogieDeclarations]: Found specification of procedure realpath [2018-04-12 17:10:15,325 INFO L128 BoogieDeclarations]: Found specification of procedure bsearch [2018-04-12 17:10:15,325 INFO L128 BoogieDeclarations]: Found specification of procedure qsort [2018-04-12 17:10:15,325 INFO L128 BoogieDeclarations]: Found specification of procedure abs [2018-04-12 17:10:15,325 INFO L128 BoogieDeclarations]: Found specification of procedure labs [2018-04-12 17:10:15,325 INFO L128 BoogieDeclarations]: Found specification of procedure llabs [2018-04-12 17:10:15,325 INFO L128 BoogieDeclarations]: Found specification of procedure div [2018-04-12 17:10:15,326 INFO L128 BoogieDeclarations]: Found specification of procedure ldiv [2018-04-12 17:10:15,326 INFO L128 BoogieDeclarations]: Found specification of procedure lldiv [2018-04-12 17:10:15,326 INFO L128 BoogieDeclarations]: Found specification of procedure ecvt [2018-04-12 17:10:15,326 INFO L128 BoogieDeclarations]: Found specification of procedure fcvt [2018-04-12 17:10:15,326 INFO L128 BoogieDeclarations]: Found specification of procedure gcvt [2018-04-12 17:10:15,326 INFO L128 BoogieDeclarations]: Found specification of procedure qecvt [2018-04-12 17:10:15,326 INFO L128 BoogieDeclarations]: Found specification of procedure qfcvt [2018-04-12 17:10:15,326 INFO L128 BoogieDeclarations]: Found specification of procedure qgcvt [2018-04-12 17:10:15,326 INFO L128 BoogieDeclarations]: Found specification of procedure ecvt_r [2018-04-12 17:10:15,326 INFO L128 BoogieDeclarations]: Found specification of procedure fcvt_r [2018-04-12 17:10:15,327 INFO L128 BoogieDeclarations]: Found specification of procedure qecvt_r [2018-04-12 17:10:15,327 INFO L128 BoogieDeclarations]: Found specification of procedure qfcvt_r [2018-04-12 17:10:15,327 INFO L128 BoogieDeclarations]: Found specification of procedure mblen [2018-04-12 17:10:15,327 INFO L128 BoogieDeclarations]: Found specification of procedure mbtowc [2018-04-12 17:10:15,327 INFO L128 BoogieDeclarations]: Found specification of procedure wctomb [2018-04-12 17:10:15,327 INFO L128 BoogieDeclarations]: Found specification of procedure mbstowcs [2018-04-12 17:10:15,327 INFO L128 BoogieDeclarations]: Found specification of procedure wcstombs [2018-04-12 17:10:15,327 INFO L128 BoogieDeclarations]: Found specification of procedure rpmatch [2018-04-12 17:10:15,327 INFO L128 BoogieDeclarations]: Found specification of procedure getsubopt [2018-04-12 17:10:15,327 INFO L128 BoogieDeclarations]: Found specification of procedure getloadavg [2018-04-12 17:10:15,328 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2018-04-12 17:10:15,328 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_error [2018-04-12 17:10:15,328 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-04-12 17:10:15,328 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-04-12 17:10:15,328 INFO L128 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2018-04-12 17:10:15,328 INFO L128 BoogieDeclarations]: Found specification of procedure write~int [2018-04-12 17:10:15,328 INFO L128 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2018-04-12 17:10:15,328 INFO L128 BoogieDeclarations]: Found specification of procedure read~int [2018-04-12 17:10:15,328 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-04-12 17:10:15,328 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-04-12 17:10:15,328 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-04-12 17:10:15,329 INFO L128 BoogieDeclarations]: Found specification of procedure write~unchecked~int [2018-04-12 17:10:15,741 INFO L259 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-04-12 17:10:15,741 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 12.04 05:10:15 BoogieIcfgContainer [2018-04-12 17:10:15,742 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-04-12 17:10:15,742 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-04-12 17:10:15,742 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-04-12 17:10:15,745 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-04-12 17:10:15,745 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 12.04 05:10:14" (1/3) ... [2018-04-12 17:10:15,746 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@33b8ed9 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 12.04 05:10:15, skipping insertion in model container [2018-04-12 17:10:15,746 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 05:10:15" (2/3) ... [2018-04-12 17:10:15,746 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@33b8ed9 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 12.04 05:10:15, skipping insertion in model container [2018-04-12 17:10:15,746 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 12.04 05:10:15" (3/3) ... [2018-04-12 17:10:15,748 INFO L107 eAbstractionObserver]: Analyzing ICFG dll-simple-white-blue_true-unreach-call_false-valid-memtrack.i [2018-04-12 17:10:15,756 INFO L131 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-04-12 17:10:15,762 INFO L143 ceAbstractionStarter]: Appying trace abstraction to program that has 57 error locations. [2018-04-12 17:10:15,797 INFO L128 ementStrategyFactory]: Using default assertion order modulation [2018-04-12 17:10:15,797 INFO L369 AbstractCegarLoop]: Interprodecural is true [2018-04-12 17:10:15,797 INFO L370 AbstractCegarLoop]: Hoare is false [2018-04-12 17:10:15,797 INFO L371 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-04-12 17:10:15,797 INFO L372 AbstractCegarLoop]: Backedges is TWOTRACK [2018-04-12 17:10:15,797 INFO L373 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-04-12 17:10:15,798 INFO L374 AbstractCegarLoop]: Difference is false [2018-04-12 17:10:15,798 INFO L375 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-04-12 17:10:15,798 INFO L380 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-04-12 17:10:15,798 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-04-12 17:10:15,810 INFO L276 IsEmpty]: Start isEmpty. Operand 135 states. [2018-04-12 17:10:15,817 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 9 [2018-04-12 17:10:15,817 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 17:10:15,817 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 17:10:15,818 INFO L408 AbstractCegarLoop]: === Iteration 1 === [mainErr51RequiresViolation, mainErr55AssertViolationMEMORY_FREE, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr31RequiresViolation, mainErr46RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr15RequiresViolation, mainErr49RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr56EnsuresViolationMEMORY_LEAK, mainErr17RequiresViolation, mainErr42RequiresViolation, mainErr30RequiresViolation, mainErr54AssertViolationMEMORY_FREE, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr44RequiresViolation, mainErr10RequiresViolation, mainErr43RequiresViolation, mainErr4RequiresViolation, mainErr50RequiresViolation, mainErr37RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr21RequiresViolation, mainErr41RequiresViolation, mainErr48RequiresViolation, mainErr39RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr52RequiresViolation, mainErr45RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr9RequiresViolation, mainErr53RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr8RequiresViolation, mainErr34RequiresViolation, mainErr47RequiresViolation, mainErr14RequiresViolation, mainErr40RequiresViolation]=== [2018-04-12 17:10:15,820 INFO L82 PathProgramCache]: Analyzing trace with hash -401927193, now seen corresponding path program 1 times [2018-04-12 17:10:15,821 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 17:10:15,822 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 17:10:15,854 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 17:10:15,854 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 17:10:15,854 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 17:10:15,877 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 17:10:15,882 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 17:10:15,917 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 17:10:15,919 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 17:10:15,919 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-04-12 17:10:15,921 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-04-12 17:10:15,929 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-04-12 17:10:15,929 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-04-12 17:10:15,931 INFO L87 Difference]: Start difference. First operand 135 states. Second operand 4 states. [2018-04-12 17:10:16,164 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 17:10:16,164 INFO L93 Difference]: Finished difference Result 179 states and 190 transitions. [2018-04-12 17:10:16,165 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-04-12 17:10:16,166 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 8 [2018-04-12 17:10:16,166 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 17:10:16,174 INFO L225 Difference]: With dead ends: 179 [2018-04-12 17:10:16,174 INFO L226 Difference]: Without dead ends: 170 [2018-04-12 17:10:16,176 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-04-12 17:10:16,188 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 170 states. [2018-04-12 17:10:16,203 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 170 to 126. [2018-04-12 17:10:16,204 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 126 states. [2018-04-12 17:10:16,205 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 126 states to 126 states and 133 transitions. [2018-04-12 17:10:16,206 INFO L78 Accepts]: Start accepts. Automaton has 126 states and 133 transitions. Word has length 8 [2018-04-12 17:10:16,207 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 17:10:16,207 INFO L459 AbstractCegarLoop]: Abstraction has 126 states and 133 transitions. [2018-04-12 17:10:16,207 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-04-12 17:10:16,207 INFO L276 IsEmpty]: Start isEmpty. Operand 126 states and 133 transitions. [2018-04-12 17:10:16,207 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 9 [2018-04-12 17:10:16,207 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 17:10:16,207 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 17:10:16,207 INFO L408 AbstractCegarLoop]: === Iteration 2 === [mainErr51RequiresViolation, mainErr55AssertViolationMEMORY_FREE, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr31RequiresViolation, mainErr46RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr15RequiresViolation, mainErr49RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr56EnsuresViolationMEMORY_LEAK, mainErr17RequiresViolation, mainErr42RequiresViolation, mainErr30RequiresViolation, mainErr54AssertViolationMEMORY_FREE, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr44RequiresViolation, mainErr10RequiresViolation, mainErr43RequiresViolation, mainErr4RequiresViolation, mainErr50RequiresViolation, mainErr37RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr21RequiresViolation, mainErr41RequiresViolation, mainErr48RequiresViolation, mainErr39RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr52RequiresViolation, mainErr45RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr9RequiresViolation, mainErr53RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr8RequiresViolation, mainErr34RequiresViolation, mainErr47RequiresViolation, mainErr14RequiresViolation, mainErr40RequiresViolation]=== [2018-04-12 17:10:16,208 INFO L82 PathProgramCache]: Analyzing trace with hash -401927192, now seen corresponding path program 1 times [2018-04-12 17:10:16,208 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 17:10:16,208 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 17:10:16,209 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 17:10:16,209 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 17:10:16,209 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 17:10:16,220 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 17:10:16,221 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 17:10:16,253 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 17:10:16,253 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 17:10:16,253 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-04-12 17:10:16,254 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-04-12 17:10:16,254 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-04-12 17:10:16,254 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-04-12 17:10:16,254 INFO L87 Difference]: Start difference. First operand 126 states and 133 transitions. Second operand 4 states. [2018-04-12 17:10:16,352 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 17:10:16,352 INFO L93 Difference]: Finished difference Result 153 states and 162 transitions. [2018-04-12 17:10:16,352 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-04-12 17:10:16,352 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 8 [2018-04-12 17:10:16,353 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 17:10:16,354 INFO L225 Difference]: With dead ends: 153 [2018-04-12 17:10:16,354 INFO L226 Difference]: Without dead ends: 153 [2018-04-12 17:10:16,355 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-04-12 17:10:16,355 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 153 states. [2018-04-12 17:10:16,360 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 153 to 123. [2018-04-12 17:10:16,360 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 123 states. [2018-04-12 17:10:16,362 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 123 states to 123 states and 130 transitions. [2018-04-12 17:10:16,362 INFO L78 Accepts]: Start accepts. Automaton has 123 states and 130 transitions. Word has length 8 [2018-04-12 17:10:16,362 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 17:10:16,362 INFO L459 AbstractCegarLoop]: Abstraction has 123 states and 130 transitions. [2018-04-12 17:10:16,362 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-04-12 17:10:16,362 INFO L276 IsEmpty]: Start isEmpty. Operand 123 states and 130 transitions. [2018-04-12 17:10:16,363 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2018-04-12 17:10:16,363 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 17:10:16,363 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 17:10:16,363 INFO L408 AbstractCegarLoop]: === Iteration 3 === [mainErr51RequiresViolation, mainErr55AssertViolationMEMORY_FREE, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr31RequiresViolation, mainErr46RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr15RequiresViolation, mainErr49RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr56EnsuresViolationMEMORY_LEAK, mainErr17RequiresViolation, mainErr42RequiresViolation, mainErr30RequiresViolation, mainErr54AssertViolationMEMORY_FREE, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr44RequiresViolation, mainErr10RequiresViolation, mainErr43RequiresViolation, mainErr4RequiresViolation, mainErr50RequiresViolation, mainErr37RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr21RequiresViolation, mainErr41RequiresViolation, mainErr48RequiresViolation, mainErr39RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr52RequiresViolation, mainErr45RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr9RequiresViolation, mainErr53RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr8RequiresViolation, mainErr34RequiresViolation, mainErr47RequiresViolation, mainErr14RequiresViolation, mainErr40RequiresViolation]=== [2018-04-12 17:10:16,363 INFO L82 PathProgramCache]: Analyzing trace with hash -166598540, now seen corresponding path program 1 times [2018-04-12 17:10:16,364 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 17:10:16,364 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 17:10:16,365 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 17:10:16,365 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 17:10:16,365 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 17:10:16,386 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 17:10:16,387 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 17:10:16,423 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 17:10:16,423 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 17:10:16,423 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-04-12 17:10:16,423 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-04-12 17:10:16,424 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-04-12 17:10:16,424 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-04-12 17:10:16,424 INFO L87 Difference]: Start difference. First operand 123 states and 130 transitions. Second operand 4 states. [2018-04-12 17:10:16,522 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 17:10:16,522 INFO L93 Difference]: Finished difference Result 126 states and 133 transitions. [2018-04-12 17:10:16,522 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-04-12 17:10:16,522 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 16 [2018-04-12 17:10:16,523 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 17:10:16,523 INFO L225 Difference]: With dead ends: 126 [2018-04-12 17:10:16,523 INFO L226 Difference]: Without dead ends: 126 [2018-04-12 17:10:16,523 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-04-12 17:10:16,524 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 126 states. [2018-04-12 17:10:16,527 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 126 to 118. [2018-04-12 17:10:16,527 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 118 states. [2018-04-12 17:10:16,528 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 118 states to 118 states and 130 transitions. [2018-04-12 17:10:16,529 INFO L78 Accepts]: Start accepts. Automaton has 118 states and 130 transitions. Word has length 16 [2018-04-12 17:10:16,529 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 17:10:16,529 INFO L459 AbstractCegarLoop]: Abstraction has 118 states and 130 transitions. [2018-04-12 17:10:16,529 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-04-12 17:10:16,529 INFO L276 IsEmpty]: Start isEmpty. Operand 118 states and 130 transitions. [2018-04-12 17:10:16,529 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2018-04-12 17:10:16,529 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 17:10:16,530 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 17:10:16,530 INFO L408 AbstractCegarLoop]: === Iteration 4 === [mainErr51RequiresViolation, mainErr55AssertViolationMEMORY_FREE, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr31RequiresViolation, mainErr46RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr15RequiresViolation, mainErr49RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr56EnsuresViolationMEMORY_LEAK, mainErr17RequiresViolation, mainErr42RequiresViolation, mainErr30RequiresViolation, mainErr54AssertViolationMEMORY_FREE, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr44RequiresViolation, mainErr10RequiresViolation, mainErr43RequiresViolation, mainErr4RequiresViolation, mainErr50RequiresViolation, mainErr37RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr21RequiresViolation, mainErr41RequiresViolation, mainErr48RequiresViolation, mainErr39RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr52RequiresViolation, mainErr45RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr9RequiresViolation, mainErr53RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr8RequiresViolation, mainErr34RequiresViolation, mainErr47RequiresViolation, mainErr14RequiresViolation, mainErr40RequiresViolation]=== [2018-04-12 17:10:16,530 INFO L82 PathProgramCache]: Analyzing trace with hash -166598539, now seen corresponding path program 1 times [2018-04-12 17:10:16,530 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 17:10:16,530 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 17:10:16,531 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 17:10:16,532 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 17:10:16,532 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 17:10:16,540 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 17:10:16,541 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 17:10:16,583 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 17:10:16,584 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 17:10:16,584 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-04-12 17:10:16,584 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-04-12 17:10:16,584 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-04-12 17:10:16,584 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-04-12 17:10:16,584 INFO L87 Difference]: Start difference. First operand 118 states and 130 transitions. Second operand 5 states. [2018-04-12 17:10:16,784 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 17:10:16,784 INFO L93 Difference]: Finished difference Result 198 states and 217 transitions. [2018-04-12 17:10:16,784 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-04-12 17:10:16,784 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 16 [2018-04-12 17:10:16,784 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 17:10:16,785 INFO L225 Difference]: With dead ends: 198 [2018-04-12 17:10:16,786 INFO L226 Difference]: Without dead ends: 198 [2018-04-12 17:10:16,786 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2018-04-12 17:10:16,786 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 198 states. [2018-04-12 17:10:16,792 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 198 to 164. [2018-04-12 17:10:16,792 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 164 states. [2018-04-12 17:10:16,793 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 164 states to 164 states and 194 transitions. [2018-04-12 17:10:16,793 INFO L78 Accepts]: Start accepts. Automaton has 164 states and 194 transitions. Word has length 16 [2018-04-12 17:10:16,793 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 17:10:16,793 INFO L459 AbstractCegarLoop]: Abstraction has 164 states and 194 transitions. [2018-04-12 17:10:16,793 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-04-12 17:10:16,793 INFO L276 IsEmpty]: Start isEmpty. Operand 164 states and 194 transitions. [2018-04-12 17:10:16,794 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2018-04-12 17:10:16,794 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 17:10:16,794 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 17:10:16,794 INFO L408 AbstractCegarLoop]: === Iteration 5 === [mainErr51RequiresViolation, mainErr55AssertViolationMEMORY_FREE, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr31RequiresViolation, mainErr46RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr15RequiresViolation, mainErr49RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr56EnsuresViolationMEMORY_LEAK, mainErr17RequiresViolation, mainErr42RequiresViolation, mainErr30RequiresViolation, mainErr54AssertViolationMEMORY_FREE, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr44RequiresViolation, mainErr10RequiresViolation, mainErr43RequiresViolation, mainErr4RequiresViolation, mainErr50RequiresViolation, mainErr37RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr21RequiresViolation, mainErr41RequiresViolation, mainErr48RequiresViolation, mainErr39RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr52RequiresViolation, mainErr45RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr9RequiresViolation, mainErr53RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr8RequiresViolation, mainErr34RequiresViolation, mainErr47RequiresViolation, mainErr14RequiresViolation, mainErr40RequiresViolation]=== [2018-04-12 17:10:16,794 INFO L82 PathProgramCache]: Analyzing trace with hash -1187407017, now seen corresponding path program 1 times [2018-04-12 17:10:16,794 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 17:10:16,795 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 17:10:16,796 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 17:10:16,796 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 17:10:16,796 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 17:10:16,805 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 17:10:16,806 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 17:10:16,834 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 17:10:16,835 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 17:10:16,835 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-04-12 17:10:16,835 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-04-12 17:10:16,835 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-04-12 17:10:16,835 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-04-12 17:10:16,836 INFO L87 Difference]: Start difference. First operand 164 states and 194 transitions. Second operand 5 states. [2018-04-12 17:10:16,980 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 17:10:16,981 INFO L93 Difference]: Finished difference Result 279 states and 331 transitions. [2018-04-12 17:10:16,981 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-04-12 17:10:16,981 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 18 [2018-04-12 17:10:16,981 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 17:10:16,982 INFO L225 Difference]: With dead ends: 279 [2018-04-12 17:10:16,982 INFO L226 Difference]: Without dead ends: 279 [2018-04-12 17:10:16,982 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2018-04-12 17:10:16,982 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 279 states. [2018-04-12 17:10:16,985 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 279 to 163. [2018-04-12 17:10:16,985 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 163 states. [2018-04-12 17:10:16,986 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 163 states to 163 states and 192 transitions. [2018-04-12 17:10:16,986 INFO L78 Accepts]: Start accepts. Automaton has 163 states and 192 transitions. Word has length 18 [2018-04-12 17:10:16,986 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 17:10:16,986 INFO L459 AbstractCegarLoop]: Abstraction has 163 states and 192 transitions. [2018-04-12 17:10:16,986 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-04-12 17:10:16,986 INFO L276 IsEmpty]: Start isEmpty. Operand 163 states and 192 transitions. [2018-04-12 17:10:16,987 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2018-04-12 17:10:16,987 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 17:10:16,987 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 17:10:16,987 INFO L408 AbstractCegarLoop]: === Iteration 6 === [mainErr51RequiresViolation, mainErr55AssertViolationMEMORY_FREE, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr31RequiresViolation, mainErr46RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr15RequiresViolation, mainErr49RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr56EnsuresViolationMEMORY_LEAK, mainErr17RequiresViolation, mainErr42RequiresViolation, mainErr30RequiresViolation, mainErr54AssertViolationMEMORY_FREE, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr44RequiresViolation, mainErr10RequiresViolation, mainErr43RequiresViolation, mainErr4RequiresViolation, mainErr50RequiresViolation, mainErr37RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr21RequiresViolation, mainErr41RequiresViolation, mainErr48RequiresViolation, mainErr39RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr52RequiresViolation, mainErr45RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr9RequiresViolation, mainErr53RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr8RequiresViolation, mainErr34RequiresViolation, mainErr47RequiresViolation, mainErr14RequiresViolation, mainErr40RequiresViolation]=== [2018-04-12 17:10:16,987 INFO L82 PathProgramCache]: Analyzing trace with hash -1187407016, now seen corresponding path program 1 times [2018-04-12 17:10:16,987 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 17:10:16,987 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 17:10:16,988 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 17:10:16,988 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 17:10:16,988 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 17:10:16,996 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 17:10:16,997 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 17:10:17,020 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 17:10:17,020 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 17:10:17,020 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-04-12 17:10:17,020 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-04-12 17:10:17,020 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-04-12 17:10:17,020 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-04-12 17:10:17,021 INFO L87 Difference]: Start difference. First operand 163 states and 192 transitions. Second operand 5 states. [2018-04-12 17:10:17,222 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 17:10:17,223 INFO L93 Difference]: Finished difference Result 286 states and 340 transitions. [2018-04-12 17:10:17,223 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-04-12 17:10:17,223 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 18 [2018-04-12 17:10:17,223 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 17:10:17,224 INFO L225 Difference]: With dead ends: 286 [2018-04-12 17:10:17,224 INFO L226 Difference]: Without dead ends: 286 [2018-04-12 17:10:17,225 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-04-12 17:10:17,225 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 286 states. [2018-04-12 17:10:17,227 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 286 to 162. [2018-04-12 17:10:17,227 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 162 states. [2018-04-12 17:10:17,228 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 162 states to 162 states and 190 transitions. [2018-04-12 17:10:17,228 INFO L78 Accepts]: Start accepts. Automaton has 162 states and 190 transitions. Word has length 18 [2018-04-12 17:10:17,228 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 17:10:17,229 INFO L459 AbstractCegarLoop]: Abstraction has 162 states and 190 transitions. [2018-04-12 17:10:17,229 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-04-12 17:10:17,229 INFO L276 IsEmpty]: Start isEmpty. Operand 162 states and 190 transitions. [2018-04-12 17:10:17,231 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2018-04-12 17:10:17,231 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 17:10:17,231 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 17:10:17,231 INFO L408 AbstractCegarLoop]: === Iteration 7 === [mainErr51RequiresViolation, mainErr55AssertViolationMEMORY_FREE, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr31RequiresViolation, mainErr46RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr15RequiresViolation, mainErr49RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr56EnsuresViolationMEMORY_LEAK, mainErr17RequiresViolation, mainErr42RequiresViolation, mainErr30RequiresViolation, mainErr54AssertViolationMEMORY_FREE, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr44RequiresViolation, mainErr10RequiresViolation, mainErr43RequiresViolation, mainErr4RequiresViolation, mainErr50RequiresViolation, mainErr37RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr21RequiresViolation, mainErr41RequiresViolation, mainErr48RequiresViolation, mainErr39RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr52RequiresViolation, mainErr45RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr9RequiresViolation, mainErr53RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr8RequiresViolation, mainErr34RequiresViolation, mainErr47RequiresViolation, mainErr14RequiresViolation, mainErr40RequiresViolation]=== [2018-04-12 17:10:17,231 INFO L82 PathProgramCache]: Analyzing trace with hash 1810792676, now seen corresponding path program 1 times [2018-04-12 17:10:17,231 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 17:10:17,231 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 17:10:17,232 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 17:10:17,232 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 17:10:17,232 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 17:10:17,241 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 17:10:17,242 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 17:10:17,271 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 17:10:17,271 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 17:10:17,272 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-04-12 17:10:17,272 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-04-12 17:10:17,272 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-04-12 17:10:17,272 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-04-12 17:10:17,273 INFO L87 Difference]: Start difference. First operand 162 states and 190 transitions. Second operand 4 states. [2018-04-12 17:10:17,379 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 17:10:17,379 INFO L93 Difference]: Finished difference Result 179 states and 198 transitions. [2018-04-12 17:10:17,379 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-04-12 17:10:17,379 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 19 [2018-04-12 17:10:17,380 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 17:10:17,380 INFO L225 Difference]: With dead ends: 179 [2018-04-12 17:10:17,380 INFO L226 Difference]: Without dead ends: 179 [2018-04-12 17:10:17,381 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-04-12 17:10:17,381 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 179 states. [2018-04-12 17:10:17,383 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 179 to 161. [2018-04-12 17:10:17,383 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 161 states. [2018-04-12 17:10:17,384 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 161 states to 161 states and 189 transitions. [2018-04-12 17:10:17,384 INFO L78 Accepts]: Start accepts. Automaton has 161 states and 189 transitions. Word has length 19 [2018-04-12 17:10:17,384 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 17:10:17,384 INFO L459 AbstractCegarLoop]: Abstraction has 161 states and 189 transitions. [2018-04-12 17:10:17,384 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-04-12 17:10:17,384 INFO L276 IsEmpty]: Start isEmpty. Operand 161 states and 189 transitions. [2018-04-12 17:10:17,384 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2018-04-12 17:10:17,384 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 17:10:17,384 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 17:10:17,384 INFO L408 AbstractCegarLoop]: === Iteration 8 === [mainErr51RequiresViolation, mainErr55AssertViolationMEMORY_FREE, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr31RequiresViolation, mainErr46RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr15RequiresViolation, mainErr49RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr56EnsuresViolationMEMORY_LEAK, mainErr17RequiresViolation, mainErr42RequiresViolation, mainErr30RequiresViolation, mainErr54AssertViolationMEMORY_FREE, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr44RequiresViolation, mainErr10RequiresViolation, mainErr43RequiresViolation, mainErr4RequiresViolation, mainErr50RequiresViolation, mainErr37RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr21RequiresViolation, mainErr41RequiresViolation, mainErr48RequiresViolation, mainErr39RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr52RequiresViolation, mainErr45RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr9RequiresViolation, mainErr53RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr8RequiresViolation, mainErr34RequiresViolation, mainErr47RequiresViolation, mainErr14RequiresViolation, mainErr40RequiresViolation]=== [2018-04-12 17:10:17,385 INFO L82 PathProgramCache]: Analyzing trace with hash 1810792677, now seen corresponding path program 1 times [2018-04-12 17:10:17,385 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 17:10:17,385 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 17:10:17,386 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 17:10:17,386 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 17:10:17,386 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 17:10:17,392 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 17:10:17,393 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 17:10:17,415 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 17:10:17,415 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 17:10:17,415 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-04-12 17:10:17,415 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-04-12 17:10:17,416 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-04-12 17:10:17,416 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-04-12 17:10:17,416 INFO L87 Difference]: Start difference. First operand 161 states and 189 transitions. Second operand 4 states. [2018-04-12 17:10:17,498 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 17:10:17,498 INFO L93 Difference]: Finished difference Result 180 states and 201 transitions. [2018-04-12 17:10:17,498 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-04-12 17:10:17,498 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 19 [2018-04-12 17:10:17,498 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 17:10:17,499 INFO L225 Difference]: With dead ends: 180 [2018-04-12 17:10:17,499 INFO L226 Difference]: Without dead ends: 180 [2018-04-12 17:10:17,500 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-04-12 17:10:17,500 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 180 states. [2018-04-12 17:10:17,502 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 180 to 158. [2018-04-12 17:10:17,502 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 158 states. [2018-04-12 17:10:17,503 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 158 states to 158 states and 186 transitions. [2018-04-12 17:10:17,503 INFO L78 Accepts]: Start accepts. Automaton has 158 states and 186 transitions. Word has length 19 [2018-04-12 17:10:17,503 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 17:10:17,503 INFO L459 AbstractCegarLoop]: Abstraction has 158 states and 186 transitions. [2018-04-12 17:10:17,503 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-04-12 17:10:17,503 INFO L276 IsEmpty]: Start isEmpty. Operand 158 states and 186 transitions. [2018-04-12 17:10:17,503 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2018-04-12 17:10:17,503 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 17:10:17,504 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 17:10:17,504 INFO L408 AbstractCegarLoop]: === Iteration 9 === [mainErr51RequiresViolation, mainErr55AssertViolationMEMORY_FREE, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr31RequiresViolation, mainErr46RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr15RequiresViolation, mainErr49RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr56EnsuresViolationMEMORY_LEAK, mainErr17RequiresViolation, mainErr42RequiresViolation, mainErr30RequiresViolation, mainErr54AssertViolationMEMORY_FREE, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr44RequiresViolation, mainErr10RequiresViolation, mainErr43RequiresViolation, mainErr4RequiresViolation, mainErr50RequiresViolation, mainErr37RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr21RequiresViolation, mainErr41RequiresViolation, mainErr48RequiresViolation, mainErr39RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr52RequiresViolation, mainErr45RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr9RequiresViolation, mainErr53RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr8RequiresViolation, mainErr34RequiresViolation, mainErr47RequiresViolation, mainErr14RequiresViolation, mainErr40RequiresViolation]=== [2018-04-12 17:10:17,504 INFO L82 PathProgramCache]: Analyzing trace with hash 29390169, now seen corresponding path program 1 times [2018-04-12 17:10:17,504 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 17:10:17,504 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 17:10:17,505 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 17:10:17,505 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 17:10:17,505 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 17:10:17,511 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 17:10:17,512 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 17:10:17,575 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 17:10:17,576 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 17:10:17,576 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-04-12 17:10:17,576 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-04-12 17:10:17,576 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-04-12 17:10:17,576 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2018-04-12 17:10:17,577 INFO L87 Difference]: Start difference. First operand 158 states and 186 transitions. Second operand 9 states. [2018-04-12 17:10:17,852 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 17:10:17,853 INFO L93 Difference]: Finished difference Result 164 states and 188 transitions. [2018-04-12 17:10:17,853 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-04-12 17:10:17,853 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 22 [2018-04-12 17:10:17,853 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 17:10:17,854 INFO L225 Difference]: With dead ends: 164 [2018-04-12 17:10:17,854 INFO L226 Difference]: Without dead ends: 164 [2018-04-12 17:10:17,854 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=67, Invalid=143, Unknown=0, NotChecked=0, Total=210 [2018-04-12 17:10:17,855 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 164 states. [2018-04-12 17:10:17,857 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 164 to 157. [2018-04-12 17:10:17,857 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 157 states. [2018-04-12 17:10:17,857 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 157 states to 157 states and 185 transitions. [2018-04-12 17:10:17,858 INFO L78 Accepts]: Start accepts. Automaton has 157 states and 185 transitions. Word has length 22 [2018-04-12 17:10:17,858 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 17:10:17,858 INFO L459 AbstractCegarLoop]: Abstraction has 157 states and 185 transitions. [2018-04-12 17:10:17,858 INFO L460 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-04-12 17:10:17,858 INFO L276 IsEmpty]: Start isEmpty. Operand 157 states and 185 transitions. [2018-04-12 17:10:17,859 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2018-04-12 17:10:17,859 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 17:10:17,859 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 17:10:17,859 INFO L408 AbstractCegarLoop]: === Iteration 10 === [mainErr51RequiresViolation, mainErr55AssertViolationMEMORY_FREE, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr31RequiresViolation, mainErr46RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr15RequiresViolation, mainErr49RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr56EnsuresViolationMEMORY_LEAK, mainErr17RequiresViolation, mainErr42RequiresViolation, mainErr30RequiresViolation, mainErr54AssertViolationMEMORY_FREE, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr44RequiresViolation, mainErr10RequiresViolation, mainErr43RequiresViolation, mainErr4RequiresViolation, mainErr50RequiresViolation, mainErr37RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr21RequiresViolation, mainErr41RequiresViolation, mainErr48RequiresViolation, mainErr39RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr52RequiresViolation, mainErr45RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr9RequiresViolation, mainErr53RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr8RequiresViolation, mainErr34RequiresViolation, mainErr47RequiresViolation, mainErr14RequiresViolation, mainErr40RequiresViolation]=== [2018-04-12 17:10:17,859 INFO L82 PathProgramCache]: Analyzing trace with hash 29390170, now seen corresponding path program 1 times [2018-04-12 17:10:17,860 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 17:10:17,860 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 17:10:17,861 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 17:10:17,861 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 17:10:17,861 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 17:10:17,870 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 17:10:17,871 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 17:10:17,976 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 17:10:17,976 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 17:10:17,976 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-04-12 17:10:17,976 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-04-12 17:10:17,976 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-04-12 17:10:17,977 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=71, Unknown=0, NotChecked=0, Total=90 [2018-04-12 17:10:17,977 INFO L87 Difference]: Start difference. First operand 157 states and 185 transitions. Second operand 10 states. [2018-04-12 17:10:18,471 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 17:10:18,471 INFO L93 Difference]: Finished difference Result 164 states and 189 transitions. [2018-04-12 17:10:18,472 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-04-12 17:10:18,472 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 22 [2018-04-12 17:10:18,472 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 17:10:18,472 INFO L225 Difference]: With dead ends: 164 [2018-04-12 17:10:18,472 INFO L226 Difference]: Without dead ends: 164 [2018-04-12 17:10:18,473 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=129, Invalid=291, Unknown=0, NotChecked=0, Total=420 [2018-04-12 17:10:18,473 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 164 states. [2018-04-12 17:10:18,475 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 164 to 143. [2018-04-12 17:10:18,475 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 143 states. [2018-04-12 17:10:18,475 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 143 states to 143 states and 170 transitions. [2018-04-12 17:10:18,475 INFO L78 Accepts]: Start accepts. Automaton has 143 states and 170 transitions. Word has length 22 [2018-04-12 17:10:18,475 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 17:10:18,475 INFO L459 AbstractCegarLoop]: Abstraction has 143 states and 170 transitions. [2018-04-12 17:10:18,475 INFO L460 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-04-12 17:10:18,475 INFO L276 IsEmpty]: Start isEmpty. Operand 143 states and 170 transitions. [2018-04-12 17:10:18,476 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2018-04-12 17:10:18,476 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 17:10:18,476 INFO L355 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 17:10:18,476 INFO L408 AbstractCegarLoop]: === Iteration 11 === [mainErr51RequiresViolation, mainErr55AssertViolationMEMORY_FREE, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr31RequiresViolation, mainErr46RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr15RequiresViolation, mainErr49RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr56EnsuresViolationMEMORY_LEAK, mainErr17RequiresViolation, mainErr42RequiresViolation, mainErr30RequiresViolation, mainErr54AssertViolationMEMORY_FREE, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr44RequiresViolation, mainErr10RequiresViolation, mainErr43RequiresViolation, mainErr4RequiresViolation, mainErr50RequiresViolation, mainErr37RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr21RequiresViolation, mainErr41RequiresViolation, mainErr48RequiresViolation, mainErr39RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr52RequiresViolation, mainErr45RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr9RequiresViolation, mainErr53RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr8RequiresViolation, mainErr34RequiresViolation, mainErr47RequiresViolation, mainErr14RequiresViolation, mainErr40RequiresViolation]=== [2018-04-12 17:10:18,476 INFO L82 PathProgramCache]: Analyzing trace with hash -1340356530, now seen corresponding path program 1 times [2018-04-12 17:10:18,476 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 17:10:18,476 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 17:10:18,477 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 17:10:18,477 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 17:10:18,477 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 17:10:18,482 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 17:10:18,482 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 17:10:18,524 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 17:10:18,525 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 17:10:18,525 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-04-12 17:10:18,525 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-04-12 17:10:18,525 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-04-12 17:10:18,525 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-04-12 17:10:18,525 INFO L87 Difference]: Start difference. First operand 143 states and 170 transitions. Second operand 5 states. [2018-04-12 17:10:18,636 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 17:10:18,636 INFO L93 Difference]: Finished difference Result 161 states and 190 transitions. [2018-04-12 17:10:18,636 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-04-12 17:10:18,636 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 24 [2018-04-12 17:10:18,637 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 17:10:18,637 INFO L225 Difference]: With dead ends: 161 [2018-04-12 17:10:18,637 INFO L226 Difference]: Without dead ends: 161 [2018-04-12 17:10:18,638 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2018-04-12 17:10:18,638 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 161 states. [2018-04-12 17:10:18,640 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 161 to 151. [2018-04-12 17:10:18,641 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 151 states. [2018-04-12 17:10:18,641 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 151 states to 151 states and 180 transitions. [2018-04-12 17:10:18,641 INFO L78 Accepts]: Start accepts. Automaton has 151 states and 180 transitions. Word has length 24 [2018-04-12 17:10:18,642 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 17:10:18,642 INFO L459 AbstractCegarLoop]: Abstraction has 151 states and 180 transitions. [2018-04-12 17:10:18,642 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-04-12 17:10:18,642 INFO L276 IsEmpty]: Start isEmpty. Operand 151 states and 180 transitions. [2018-04-12 17:10:18,643 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2018-04-12 17:10:18,643 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 17:10:18,643 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 17:10:18,643 INFO L408 AbstractCegarLoop]: === Iteration 12 === [mainErr51RequiresViolation, mainErr55AssertViolationMEMORY_FREE, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr31RequiresViolation, mainErr46RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr15RequiresViolation, mainErr49RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr56EnsuresViolationMEMORY_LEAK, mainErr17RequiresViolation, mainErr42RequiresViolation, mainErr30RequiresViolation, mainErr54AssertViolationMEMORY_FREE, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr44RequiresViolation, mainErr10RequiresViolation, mainErr43RequiresViolation, mainErr4RequiresViolation, mainErr50RequiresViolation, mainErr37RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr21RequiresViolation, mainErr41RequiresViolation, mainErr48RequiresViolation, mainErr39RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr52RequiresViolation, mainErr45RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr9RequiresViolation, mainErr53RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr8RequiresViolation, mainErr34RequiresViolation, mainErr47RequiresViolation, mainErr14RequiresViolation, mainErr40RequiresViolation]=== [2018-04-12 17:10:18,643 INFO L82 PathProgramCache]: Analyzing trace with hash -1381455388, now seen corresponding path program 1 times [2018-04-12 17:10:18,643 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 17:10:18,643 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 17:10:18,645 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 17:10:18,645 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 17:10:18,645 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 17:10:18,652 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 17:10:18,653 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 17:10:18,682 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 17:10:18,682 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 17:10:18,682 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-04-12 17:10:18,682 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-04-12 17:10:18,682 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-04-12 17:10:18,682 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-04-12 17:10:18,683 INFO L87 Difference]: Start difference. First operand 151 states and 180 transitions. Second operand 5 states. [2018-04-12 17:10:18,857 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 17:10:18,857 INFO L93 Difference]: Finished difference Result 187 states and 206 transitions. [2018-04-12 17:10:18,858 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-04-12 17:10:18,858 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 25 [2018-04-12 17:10:18,858 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 17:10:18,859 INFO L225 Difference]: With dead ends: 187 [2018-04-12 17:10:18,859 INFO L226 Difference]: Without dead ends: 187 [2018-04-12 17:10:18,859 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-04-12 17:10:18,859 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 187 states. [2018-04-12 17:10:18,861 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 187 to 129. [2018-04-12 17:10:18,861 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 129 states. [2018-04-12 17:10:18,862 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 129 states to 129 states and 145 transitions. [2018-04-12 17:10:18,862 INFO L78 Accepts]: Start accepts. Automaton has 129 states and 145 transitions. Word has length 25 [2018-04-12 17:10:18,862 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 17:10:18,862 INFO L459 AbstractCegarLoop]: Abstraction has 129 states and 145 transitions. [2018-04-12 17:10:18,862 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-04-12 17:10:18,862 INFO L276 IsEmpty]: Start isEmpty. Operand 129 states and 145 transitions. [2018-04-12 17:10:18,863 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-04-12 17:10:18,863 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 17:10:18,863 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 17:10:18,863 INFO L408 AbstractCegarLoop]: === Iteration 13 === [mainErr51RequiresViolation, mainErr55AssertViolationMEMORY_FREE, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr31RequiresViolation, mainErr46RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr15RequiresViolation, mainErr49RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr56EnsuresViolationMEMORY_LEAK, mainErr17RequiresViolation, mainErr42RequiresViolation, mainErr30RequiresViolation, mainErr54AssertViolationMEMORY_FREE, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr44RequiresViolation, mainErr10RequiresViolation, mainErr43RequiresViolation, mainErr4RequiresViolation, mainErr50RequiresViolation, mainErr37RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr21RequiresViolation, mainErr41RequiresViolation, mainErr48RequiresViolation, mainErr39RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr52RequiresViolation, mainErr45RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr9RequiresViolation, mainErr53RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr8RequiresViolation, mainErr34RequiresViolation, mainErr47RequiresViolation, mainErr14RequiresViolation, mainErr40RequiresViolation]=== [2018-04-12 17:10:18,863 INFO L82 PathProgramCache]: Analyzing trace with hash 667065395, now seen corresponding path program 1 times [2018-04-12 17:10:18,863 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 17:10:18,863 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 17:10:18,864 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 17:10:18,864 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 17:10:18,865 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 17:10:18,871 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 17:10:18,872 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 17:10:18,908 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 17:10:18,908 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 17:10:18,908 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-04-12 17:10:18,909 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-04-12 17:10:18,909 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-04-12 17:10:18,909 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-04-12 17:10:18,909 INFO L87 Difference]: Start difference. First operand 129 states and 145 transitions. Second operand 6 states. [2018-04-12 17:10:19,049 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 17:10:19,050 INFO L93 Difference]: Finished difference Result 199 states and 219 transitions. [2018-04-12 17:10:19,050 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-04-12 17:10:19,050 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 27 [2018-04-12 17:10:19,050 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 17:10:19,051 INFO L225 Difference]: With dead ends: 199 [2018-04-12 17:10:19,051 INFO L226 Difference]: Without dead ends: 199 [2018-04-12 17:10:19,051 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2018-04-12 17:10:19,051 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 199 states. [2018-04-12 17:10:19,054 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 199 to 142. [2018-04-12 17:10:19,054 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 142 states. [2018-04-12 17:10:19,055 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 142 states to 142 states and 162 transitions. [2018-04-12 17:10:19,055 INFO L78 Accepts]: Start accepts. Automaton has 142 states and 162 transitions. Word has length 27 [2018-04-12 17:10:19,056 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 17:10:19,056 INFO L459 AbstractCegarLoop]: Abstraction has 142 states and 162 transitions. [2018-04-12 17:10:19,056 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-04-12 17:10:19,056 INFO L276 IsEmpty]: Start isEmpty. Operand 142 states and 162 transitions. [2018-04-12 17:10:19,056 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2018-04-12 17:10:19,057 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 17:10:19,057 INFO L355 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 17:10:19,057 INFO L408 AbstractCegarLoop]: === Iteration 14 === [mainErr51RequiresViolation, mainErr55AssertViolationMEMORY_FREE, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr31RequiresViolation, mainErr46RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr15RequiresViolation, mainErr49RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr56EnsuresViolationMEMORY_LEAK, mainErr17RequiresViolation, mainErr42RequiresViolation, mainErr30RequiresViolation, mainErr54AssertViolationMEMORY_FREE, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr44RequiresViolation, mainErr10RequiresViolation, mainErr43RequiresViolation, mainErr4RequiresViolation, mainErr50RequiresViolation, mainErr37RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr21RequiresViolation, mainErr41RequiresViolation, mainErr48RequiresViolation, mainErr39RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr52RequiresViolation, mainErr45RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr9RequiresViolation, mainErr53RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr8RequiresViolation, mainErr34RequiresViolation, mainErr47RequiresViolation, mainErr14RequiresViolation, mainErr40RequiresViolation]=== [2018-04-12 17:10:19,057 INFO L82 PathProgramCache]: Analyzing trace with hash -2018605973, now seen corresponding path program 1 times [2018-04-12 17:10:19,057 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 17:10:19,057 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 17:10:19,058 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 17:10:19,058 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 17:10:19,058 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 17:10:19,066 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 17:10:19,067 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 17:10:19,113 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 17:10:19,113 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-12 17:10:19,113 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-12 17:10:19,120 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 17:10:19,143 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 17:10:19,150 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 17:10:19,194 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 17:10:19,195 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 17:10:19,202 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21 [2018-04-12 17:10:19,203 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 17:10:19,212 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:10:19,213 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:17, output treesize:15 [2018-04-12 17:10:19,245 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-04-12 17:10:19,250 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-12 17:10:19,250 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 17:10:19,252 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:10:19,258 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:10:19,258 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:26, output treesize:23 [2018-04-12 17:10:19,278 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 24 [2018-04-12 17:10:19,286 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 17:10:19,288 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 33 [2018-04-12 17:10:19,288 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 17:10:19,294 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:10:19,301 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:10:19,301 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:36, output treesize:32 [2018-04-12 17:10:19,339 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 26 [2018-04-12 17:10:19,342 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 17:10:19,343 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 16 [2018-04-12 17:10:19,344 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 17:10:19,348 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:10:19,353 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-12 17:10:19,353 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:39, output treesize:15 [2018-04-12 17:10:19,399 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 17:10:19,418 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 17:10:19,418 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 9] total 15 [2018-04-12 17:10:19,419 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-04-12 17:10:19,419 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-04-12 17:10:19,419 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=52, Invalid=188, Unknown=0, NotChecked=0, Total=240 [2018-04-12 17:10:19,419 INFO L87 Difference]: Start difference. First operand 142 states and 162 transitions. Second operand 16 states. [2018-04-12 17:10:19,871 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 17:10:19,871 INFO L93 Difference]: Finished difference Result 193 states and 215 transitions. [2018-04-12 17:10:19,871 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-04-12 17:10:19,871 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 30 [2018-04-12 17:10:19,872 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 17:10:19,873 INFO L225 Difference]: With dead ends: 193 [2018-04-12 17:10:19,873 INFO L226 Difference]: Without dead ends: 193 [2018-04-12 17:10:19,874 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 49 GetRequests, 26 SyntacticMatches, 0 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 88 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=166, Invalid=434, Unknown=0, NotChecked=0, Total=600 [2018-04-12 17:10:19,874 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 193 states. [2018-04-12 17:10:19,876 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 193 to 148. [2018-04-12 17:10:19,876 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 148 states. [2018-04-12 17:10:19,877 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 148 states to 148 states and 170 transitions. [2018-04-12 17:10:19,877 INFO L78 Accepts]: Start accepts. Automaton has 148 states and 170 transitions. Word has length 30 [2018-04-12 17:10:19,877 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 17:10:19,877 INFO L459 AbstractCegarLoop]: Abstraction has 148 states and 170 transitions. [2018-04-12 17:10:19,877 INFO L460 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-04-12 17:10:19,877 INFO L276 IsEmpty]: Start isEmpty. Operand 148 states and 170 transitions. [2018-04-12 17:10:19,877 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2018-04-12 17:10:19,878 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 17:10:19,878 INFO L355 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 17:10:19,878 INFO L408 AbstractCegarLoop]: === Iteration 15 === [mainErr51RequiresViolation, mainErr55AssertViolationMEMORY_FREE, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr31RequiresViolation, mainErr46RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr15RequiresViolation, mainErr49RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr56EnsuresViolationMEMORY_LEAK, mainErr17RequiresViolation, mainErr42RequiresViolation, mainErr30RequiresViolation, mainErr54AssertViolationMEMORY_FREE, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr44RequiresViolation, mainErr10RequiresViolation, mainErr43RequiresViolation, mainErr4RequiresViolation, mainErr50RequiresViolation, mainErr37RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr21RequiresViolation, mainErr41RequiresViolation, mainErr48RequiresViolation, mainErr39RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr52RequiresViolation, mainErr45RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr9RequiresViolation, mainErr53RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr8RequiresViolation, mainErr34RequiresViolation, mainErr47RequiresViolation, mainErr14RequiresViolation, mainErr40RequiresViolation]=== [2018-04-12 17:10:19,878 INFO L82 PathProgramCache]: Analyzing trace with hash -2018605972, now seen corresponding path program 1 times [2018-04-12 17:10:19,878 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 17:10:19,878 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 17:10:19,879 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 17:10:19,879 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 17:10:19,879 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 17:10:19,886 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 17:10:19,887 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 17:10:19,980 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 17:10:19,980 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-12 17:10:19,980 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-12 17:10:19,989 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 17:10:20,007 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 17:10:20,010 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 17:10:20,025 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-12 17:10:20,025 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 17:10:20,027 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:10:20,027 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-04-12 17:10:20,057 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 14 [2018-04-12 17:10:20,057 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 17:10:20,061 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:10:20,062 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:24, output treesize:19 [2018-04-12 17:10:20,087 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-04-12 17:10:20,089 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-12 17:10:20,089 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 17:10:20,091 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:10:20,099 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-04-12 17:10:20,100 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-12 17:10:20,101 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-12 17:10:20,101 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:10:20,107 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:10:20,107 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:41, output treesize:31 [2018-04-12 17:10:20,121 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 23 [2018-04-12 17:10:20,123 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 17:10:20,124 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 32 [2018-04-12 17:10:20,125 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 17:10:20,130 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:10:20,139 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 18 [2018-04-12 17:10:20,140 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 17:10:20,142 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 25 [2018-04-12 17:10:20,142 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-12 17:10:20,147 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:10:20,154 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:10:20,154 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:57, output treesize:49 [2018-04-12 17:10:20,200 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 20 [2018-04-12 17:10:20,203 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 17:10:20,205 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 12 [2018-04-12 17:10:20,205 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 17:10:20,208 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:10:20,214 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 25 [2018-04-12 17:10:20,216 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 17:10:20,217 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 15 [2018-04-12 17:10:20,217 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-12 17:10:20,220 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:10:20,223 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-12 17:10:20,224 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:63, output treesize:19 [2018-04-12 17:10:20,251 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 17:10:20,278 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 17:10:20,278 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 11] total 18 [2018-04-12 17:10:20,278 INFO L442 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-04-12 17:10:20,279 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-04-12 17:10:20,279 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=50, Invalid=292, Unknown=0, NotChecked=0, Total=342 [2018-04-12 17:10:20,279 INFO L87 Difference]: Start difference. First operand 148 states and 170 transitions. Second operand 19 states. [2018-04-12 17:10:20,951 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 17:10:20,951 INFO L93 Difference]: Finished difference Result 221 states and 242 transitions. [2018-04-12 17:10:20,984 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-04-12 17:10:20,985 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 30 [2018-04-12 17:10:20,985 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 17:10:20,985 INFO L225 Difference]: With dead ends: 221 [2018-04-12 17:10:20,986 INFO L226 Difference]: Without dead ends: 221 [2018-04-12 17:10:20,986 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 55 GetRequests, 23 SyntacticMatches, 1 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 140 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=265, Invalid=791, Unknown=0, NotChecked=0, Total=1056 [2018-04-12 17:10:20,987 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 221 states. [2018-04-12 17:10:20,990 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 221 to 146. [2018-04-12 17:10:20,990 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 146 states. [2018-04-12 17:10:20,990 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 146 states to 146 states and 167 transitions. [2018-04-12 17:10:20,991 INFO L78 Accepts]: Start accepts. Automaton has 146 states and 167 transitions. Word has length 30 [2018-04-12 17:10:20,991 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 17:10:20,991 INFO L459 AbstractCegarLoop]: Abstraction has 146 states and 167 transitions. [2018-04-12 17:10:20,991 INFO L460 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-04-12 17:10:20,991 INFO L276 IsEmpty]: Start isEmpty. Operand 146 states and 167 transitions. [2018-04-12 17:10:20,992 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2018-04-12 17:10:20,992 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 17:10:20,992 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 17:10:20,992 INFO L408 AbstractCegarLoop]: === Iteration 16 === [mainErr51RequiresViolation, mainErr55AssertViolationMEMORY_FREE, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr31RequiresViolation, mainErr46RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr15RequiresViolation, mainErr49RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr56EnsuresViolationMEMORY_LEAK, mainErr17RequiresViolation, mainErr42RequiresViolation, mainErr30RequiresViolation, mainErr54AssertViolationMEMORY_FREE, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr44RequiresViolation, mainErr10RequiresViolation, mainErr43RequiresViolation, mainErr4RequiresViolation, mainErr50RequiresViolation, mainErr37RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr21RequiresViolation, mainErr41RequiresViolation, mainErr48RequiresViolation, mainErr39RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr52RequiresViolation, mainErr45RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr9RequiresViolation, mainErr53RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr8RequiresViolation, mainErr34RequiresViolation, mainErr47RequiresViolation, mainErr14RequiresViolation, mainErr40RequiresViolation]=== [2018-04-12 17:10:20,992 INFO L82 PathProgramCache]: Analyzing trace with hash 1797163218, now seen corresponding path program 1 times [2018-04-12 17:10:20,993 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 17:10:20,993 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 17:10:20,994 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 17:10:20,994 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 17:10:20,994 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 17:10:21,001 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 17:10:21,002 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 17:10:21,053 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 17:10:21,053 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 17:10:21,054 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-04-12 17:10:21,054 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-04-12 17:10:21,054 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-04-12 17:10:21,054 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2018-04-12 17:10:21,054 INFO L87 Difference]: Start difference. First operand 146 states and 167 transitions. Second operand 9 states. [2018-04-12 17:10:21,222 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 17:10:21,222 INFO L93 Difference]: Finished difference Result 192 states and 216 transitions. [2018-04-12 17:10:21,223 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-04-12 17:10:21,223 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 31 [2018-04-12 17:10:21,223 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 17:10:21,223 INFO L225 Difference]: With dead ends: 192 [2018-04-12 17:10:21,223 INFO L226 Difference]: Without dead ends: 192 [2018-04-12 17:10:21,224 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 18 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=72, Invalid=138, Unknown=0, NotChecked=0, Total=210 [2018-04-12 17:10:21,224 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 192 states. [2018-04-12 17:10:21,225 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 192 to 151. [2018-04-12 17:10:21,226 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 151 states. [2018-04-12 17:10:21,226 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 151 states to 151 states and 174 transitions. [2018-04-12 17:10:21,226 INFO L78 Accepts]: Start accepts. Automaton has 151 states and 174 transitions. Word has length 31 [2018-04-12 17:10:21,226 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 17:10:21,226 INFO L459 AbstractCegarLoop]: Abstraction has 151 states and 174 transitions. [2018-04-12 17:10:21,226 INFO L460 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-04-12 17:10:21,226 INFO L276 IsEmpty]: Start isEmpty. Operand 151 states and 174 transitions. [2018-04-12 17:10:21,227 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2018-04-12 17:10:21,227 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 17:10:21,227 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 17:10:21,227 INFO L408 AbstractCegarLoop]: === Iteration 17 === [mainErr51RequiresViolation, mainErr55AssertViolationMEMORY_FREE, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr31RequiresViolation, mainErr46RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr15RequiresViolation, mainErr49RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr56EnsuresViolationMEMORY_LEAK, mainErr17RequiresViolation, mainErr42RequiresViolation, mainErr30RequiresViolation, mainErr54AssertViolationMEMORY_FREE, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr44RequiresViolation, mainErr10RequiresViolation, mainErr43RequiresViolation, mainErr4RequiresViolation, mainErr50RequiresViolation, mainErr37RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr21RequiresViolation, mainErr41RequiresViolation, mainErr48RequiresViolation, mainErr39RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr52RequiresViolation, mainErr45RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr9RequiresViolation, mainErr53RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr8RequiresViolation, mainErr34RequiresViolation, mainErr47RequiresViolation, mainErr14RequiresViolation, mainErr40RequiresViolation]=== [2018-04-12 17:10:21,227 INFO L82 PathProgramCache]: Analyzing trace with hash 1797163219, now seen corresponding path program 1 times [2018-04-12 17:10:21,227 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 17:10:21,227 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 17:10:21,228 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 17:10:21,228 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 17:10:21,228 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 17:10:21,234 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 17:10:21,234 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 17:10:21,392 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 17:10:21,392 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 17:10:21,392 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-04-12 17:10:21,393 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-04-12 17:10:21,393 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-04-12 17:10:21,393 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=56, Unknown=0, NotChecked=0, Total=72 [2018-04-12 17:10:21,393 INFO L87 Difference]: Start difference. First operand 151 states and 174 transitions. Second operand 9 states. [2018-04-12 17:10:21,742 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 17:10:21,742 INFO L93 Difference]: Finished difference Result 226 states and 248 transitions. [2018-04-12 17:10:21,743 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-04-12 17:10:21,743 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 31 [2018-04-12 17:10:21,743 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 17:10:21,743 INFO L225 Difference]: With dead ends: 226 [2018-04-12 17:10:21,744 INFO L226 Difference]: Without dead ends: 226 [2018-04-12 17:10:21,744 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 4 SyntacticMatches, 2 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 39 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=73, Invalid=233, Unknown=0, NotChecked=0, Total=306 [2018-04-12 17:10:21,744 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 226 states. [2018-04-12 17:10:21,746 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 226 to 153. [2018-04-12 17:10:21,746 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 153 states. [2018-04-12 17:10:21,746 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 153 states to 153 states and 175 transitions. [2018-04-12 17:10:21,746 INFO L78 Accepts]: Start accepts. Automaton has 153 states and 175 transitions. Word has length 31 [2018-04-12 17:10:21,747 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 17:10:21,747 INFO L459 AbstractCegarLoop]: Abstraction has 153 states and 175 transitions. [2018-04-12 17:10:21,747 INFO L460 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-04-12 17:10:21,747 INFO L276 IsEmpty]: Start isEmpty. Operand 153 states and 175 transitions. [2018-04-12 17:10:21,747 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-04-12 17:10:21,747 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 17:10:21,747 INFO L355 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 17:10:21,747 INFO L408 AbstractCegarLoop]: === Iteration 18 === [mainErr51RequiresViolation, mainErr55AssertViolationMEMORY_FREE, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr31RequiresViolation, mainErr46RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr15RequiresViolation, mainErr49RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr56EnsuresViolationMEMORY_LEAK, mainErr17RequiresViolation, mainErr42RequiresViolation, mainErr30RequiresViolation, mainErr54AssertViolationMEMORY_FREE, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr44RequiresViolation, mainErr10RequiresViolation, mainErr43RequiresViolation, mainErr4RequiresViolation, mainErr50RequiresViolation, mainErr37RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr21RequiresViolation, mainErr41RequiresViolation, mainErr48RequiresViolation, mainErr39RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr52RequiresViolation, mainErr45RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr9RequiresViolation, mainErr53RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr8RequiresViolation, mainErr34RequiresViolation, mainErr47RequiresViolation, mainErr14RequiresViolation, mainErr40RequiresViolation]=== [2018-04-12 17:10:21,747 INFO L82 PathProgramCache]: Analyzing trace with hash -1604260488, now seen corresponding path program 1 times [2018-04-12 17:10:21,747 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 17:10:21,747 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 17:10:21,748 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 17:10:21,748 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 17:10:21,748 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 17:10:21,755 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 17:10:21,756 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 17:10:21,857 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 17:10:21,857 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 17:10:21,858 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-04-12 17:10:21,858 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-04-12 17:10:21,858 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-04-12 17:10:21,858 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=53, Unknown=0, NotChecked=0, Total=72 [2018-04-12 17:10:21,858 INFO L87 Difference]: Start difference. First operand 153 states and 175 transitions. Second operand 9 states. [2018-04-12 17:10:22,088 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 17:10:22,089 INFO L93 Difference]: Finished difference Result 240 states and 263 transitions. [2018-04-12 17:10:22,089 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-04-12 17:10:22,089 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 34 [2018-04-12 17:10:22,089 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 17:10:22,090 INFO L225 Difference]: With dead ends: 240 [2018-04-12 17:10:22,090 INFO L226 Difference]: Without dead ends: 240 [2018-04-12 17:10:22,090 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 29 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=84, Invalid=188, Unknown=0, NotChecked=0, Total=272 [2018-04-12 17:10:22,090 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 240 states. [2018-04-12 17:10:22,092 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 240 to 160. [2018-04-12 17:10:22,092 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 160 states. [2018-04-12 17:10:22,092 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 160 states to 160 states and 184 transitions. [2018-04-12 17:10:22,092 INFO L78 Accepts]: Start accepts. Automaton has 160 states and 184 transitions. Word has length 34 [2018-04-12 17:10:22,092 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 17:10:22,093 INFO L459 AbstractCegarLoop]: Abstraction has 160 states and 184 transitions. [2018-04-12 17:10:22,093 INFO L460 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-04-12 17:10:22,093 INFO L276 IsEmpty]: Start isEmpty. Operand 160 states and 184 transitions. [2018-04-12 17:10:22,093 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-04-12 17:10:22,093 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 17:10:22,093 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 17:10:22,093 INFO L408 AbstractCegarLoop]: === Iteration 19 === [mainErr51RequiresViolation, mainErr55AssertViolationMEMORY_FREE, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr31RequiresViolation, mainErr46RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr15RequiresViolation, mainErr49RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr56EnsuresViolationMEMORY_LEAK, mainErr17RequiresViolation, mainErr42RequiresViolation, mainErr30RequiresViolation, mainErr54AssertViolationMEMORY_FREE, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr44RequiresViolation, mainErr10RequiresViolation, mainErr43RequiresViolation, mainErr4RequiresViolation, mainErr50RequiresViolation, mainErr37RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr21RequiresViolation, mainErr41RequiresViolation, mainErr48RequiresViolation, mainErr39RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr52RequiresViolation, mainErr45RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr9RequiresViolation, mainErr53RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr8RequiresViolation, mainErr34RequiresViolation, mainErr47RequiresViolation, mainErr14RequiresViolation, mainErr40RequiresViolation]=== [2018-04-12 17:10:22,093 INFO L82 PathProgramCache]: Analyzing trace with hash 1756971365, now seen corresponding path program 1 times [2018-04-12 17:10:22,093 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 17:10:22,093 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 17:10:22,094 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 17:10:22,094 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 17:10:22,094 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 17:10:22,098 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 17:10:22,099 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 17:10:22,212 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 17:10:22,212 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 17:10:22,212 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2018-04-12 17:10:22,213 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-04-12 17:10:22,213 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-04-12 17:10:22,213 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=85, Unknown=0, NotChecked=0, Total=110 [2018-04-12 17:10:22,213 INFO L87 Difference]: Start difference. First operand 160 states and 184 transitions. Second operand 11 states. [2018-04-12 17:10:22,565 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 17:10:22,565 INFO L93 Difference]: Finished difference Result 216 states and 236 transitions. [2018-04-12 17:10:22,566 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-04-12 17:10:22,566 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 35 [2018-04-12 17:10:22,566 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 17:10:22,567 INFO L225 Difference]: With dead ends: 216 [2018-04-12 17:10:22,567 INFO L226 Difference]: Without dead ends: 216 [2018-04-12 17:10:22,567 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 42 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=72, Invalid=234, Unknown=0, NotChecked=0, Total=306 [2018-04-12 17:10:22,568 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 216 states. [2018-04-12 17:10:22,570 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 216 to 168. [2018-04-12 17:10:22,570 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 168 states. [2018-04-12 17:10:22,570 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 168 states to 168 states and 192 transitions. [2018-04-12 17:10:22,570 INFO L78 Accepts]: Start accepts. Automaton has 168 states and 192 transitions. Word has length 35 [2018-04-12 17:10:22,571 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 17:10:22,571 INFO L459 AbstractCegarLoop]: Abstraction has 168 states and 192 transitions. [2018-04-12 17:10:22,571 INFO L460 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-04-12 17:10:22,571 INFO L276 IsEmpty]: Start isEmpty. Operand 168 states and 192 transitions. [2018-04-12 17:10:22,571 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-04-12 17:10:22,571 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 17:10:22,571 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 17:10:22,572 INFO L408 AbstractCegarLoop]: === Iteration 20 === [mainErr51RequiresViolation, mainErr55AssertViolationMEMORY_FREE, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr31RequiresViolation, mainErr46RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr15RequiresViolation, mainErr49RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr56EnsuresViolationMEMORY_LEAK, mainErr17RequiresViolation, mainErr42RequiresViolation, mainErr30RequiresViolation, mainErr54AssertViolationMEMORY_FREE, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr44RequiresViolation, mainErr10RequiresViolation, mainErr43RequiresViolation, mainErr4RequiresViolation, mainErr50RequiresViolation, mainErr37RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr21RequiresViolation, mainErr41RequiresViolation, mainErr48RequiresViolation, mainErr39RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr52RequiresViolation, mainErr45RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr9RequiresViolation, mainErr53RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr8RequiresViolation, mainErr34RequiresViolation, mainErr47RequiresViolation, mainErr14RequiresViolation, mainErr40RequiresViolation]=== [2018-04-12 17:10:22,572 INFO L82 PathProgramCache]: Analyzing trace with hash 854380635, now seen corresponding path program 1 times [2018-04-12 17:10:22,572 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 17:10:22,572 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 17:10:22,573 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 17:10:22,573 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 17:10:22,573 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 17:10:22,579 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 17:10:22,580 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 17:10:22,606 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 17:10:22,606 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 17:10:22,606 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-04-12 17:10:22,607 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-04-12 17:10:22,607 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-04-12 17:10:22,607 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-04-12 17:10:22,607 INFO L87 Difference]: Start difference. First operand 168 states and 192 transitions. Second operand 5 states. [2018-04-12 17:10:22,688 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 17:10:22,688 INFO L93 Difference]: Finished difference Result 219 states and 246 transitions. [2018-04-12 17:10:22,688 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-04-12 17:10:22,689 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 35 [2018-04-12 17:10:22,689 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 17:10:22,690 INFO L225 Difference]: With dead ends: 219 [2018-04-12 17:10:22,690 INFO L226 Difference]: Without dead ends: 219 [2018-04-12 17:10:22,690 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-04-12 17:10:22,690 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 219 states. [2018-04-12 17:10:22,693 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 219 to 189. [2018-04-12 17:10:22,693 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 189 states. [2018-04-12 17:10:22,694 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 189 states to 189 states and 223 transitions. [2018-04-12 17:10:22,694 INFO L78 Accepts]: Start accepts. Automaton has 189 states and 223 transitions. Word has length 35 [2018-04-12 17:10:22,694 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 17:10:22,694 INFO L459 AbstractCegarLoop]: Abstraction has 189 states and 223 transitions. [2018-04-12 17:10:22,694 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-04-12 17:10:22,694 INFO L276 IsEmpty]: Start isEmpty. Operand 189 states and 223 transitions. [2018-04-12 17:10:22,695 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-04-12 17:10:22,695 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 17:10:22,695 INFO L355 BasicCegarLoop]: trace histogram [3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 17:10:22,695 INFO L408 AbstractCegarLoop]: === Iteration 21 === [mainErr51RequiresViolation, mainErr55AssertViolationMEMORY_FREE, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr31RequiresViolation, mainErr46RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr15RequiresViolation, mainErr49RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr56EnsuresViolationMEMORY_LEAK, mainErr17RequiresViolation, mainErr42RequiresViolation, mainErr30RequiresViolation, mainErr54AssertViolationMEMORY_FREE, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr44RequiresViolation, mainErr10RequiresViolation, mainErr43RequiresViolation, mainErr4RequiresViolation, mainErr50RequiresViolation, mainErr37RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr21RequiresViolation, mainErr41RequiresViolation, mainErr48RequiresViolation, mainErr39RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr52RequiresViolation, mainErr45RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr9RequiresViolation, mainErr53RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr8RequiresViolation, mainErr34RequiresViolation, mainErr47RequiresViolation, mainErr14RequiresViolation, mainErr40RequiresViolation]=== [2018-04-12 17:10:22,695 INFO L82 PathProgramCache]: Analyzing trace with hash 290717411, now seen corresponding path program 2 times [2018-04-12 17:10:22,695 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 17:10:22,695 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 17:10:22,696 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 17:10:22,697 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 17:10:22,697 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 17:10:22,706 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 17:10:22,707 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 17:10:22,797 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-04-12 17:10:22,797 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 17:10:22,797 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-04-12 17:10:22,797 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-04-12 17:10:22,797 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-04-12 17:10:22,797 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=66, Unknown=0, NotChecked=0, Total=90 [2018-04-12 17:10:22,797 INFO L87 Difference]: Start difference. First operand 189 states and 223 transitions. Second operand 10 states. [2018-04-12 17:10:22,998 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 17:10:22,998 INFO L93 Difference]: Finished difference Result 204 states and 224 transitions. [2018-04-12 17:10:22,999 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-04-12 17:10:22,999 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 35 [2018-04-12 17:10:22,999 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 17:10:23,000 INFO L225 Difference]: With dead ends: 204 [2018-04-12 17:10:23,000 INFO L226 Difference]: Without dead ends: 204 [2018-04-12 17:10:23,000 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 51 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=127, Invalid=253, Unknown=0, NotChecked=0, Total=380 [2018-04-12 17:10:23,000 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 204 states. [2018-04-12 17:10:23,001 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 204 to 175. [2018-04-12 17:10:23,002 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 175 states. [2018-04-12 17:10:23,002 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 175 states to 175 states and 202 transitions. [2018-04-12 17:10:23,002 INFO L78 Accepts]: Start accepts. Automaton has 175 states and 202 transitions. Word has length 35 [2018-04-12 17:10:23,002 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 17:10:23,002 INFO L459 AbstractCegarLoop]: Abstraction has 175 states and 202 transitions. [2018-04-12 17:10:23,002 INFO L460 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-04-12 17:10:23,002 INFO L276 IsEmpty]: Start isEmpty. Operand 175 states and 202 transitions. [2018-04-12 17:10:23,003 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-04-12 17:10:23,003 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 17:10:23,003 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 17:10:23,003 INFO L408 AbstractCegarLoop]: === Iteration 22 === [mainErr51RequiresViolation, mainErr55AssertViolationMEMORY_FREE, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr31RequiresViolation, mainErr46RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr15RequiresViolation, mainErr49RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr56EnsuresViolationMEMORY_LEAK, mainErr17RequiresViolation, mainErr42RequiresViolation, mainErr30RequiresViolation, mainErr54AssertViolationMEMORY_FREE, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr44RequiresViolation, mainErr10RequiresViolation, mainErr43RequiresViolation, mainErr4RequiresViolation, mainErr50RequiresViolation, mainErr37RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr21RequiresViolation, mainErr41RequiresViolation, mainErr48RequiresViolation, mainErr39RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr52RequiresViolation, mainErr45RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr9RequiresViolation, mainErr53RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr8RequiresViolation, mainErr34RequiresViolation, mainErr47RequiresViolation, mainErr14RequiresViolation, mainErr40RequiresViolation]=== [2018-04-12 17:10:23,003 INFO L82 PathProgramCache]: Analyzing trace with hash 287564991, now seen corresponding path program 1 times [2018-04-12 17:10:23,003 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 17:10:23,003 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 17:10:23,004 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 17:10:23,004 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-12 17:10:23,004 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 17:10:23,009 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 17:10:23,010 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 17:10:23,273 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 17:10:23,273 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-12 17:10:23,273 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-12 17:10:23,279 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 17:10:23,292 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 17:10:23,294 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 17:10:23,318 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 17:10:23,318 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 17:10:23,319 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21 [2018-04-12 17:10:23,320 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 17:10:23,332 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:10:23,332 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:23, output treesize:21 [2018-04-12 17:10:23,353 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-04-12 17:10:23,354 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-12 17:10:23,355 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 17:10:23,356 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:10:23,362 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:10:23,362 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:32, output treesize:29 [2018-04-12 17:10:23,397 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 43 [2018-04-12 17:10:23,399 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 13 [2018-04-12 17:10:23,399 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 17:10:23,404 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:10:23,411 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-12 17:10:23,411 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:50, output treesize:42 [2018-04-12 17:10:23,483 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 50 treesize of output 40 [2018-04-12 17:10:23,490 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 20 treesize of output 31 [2018-04-12 17:10:23,490 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 2 xjuncts. [2018-04-12 17:10:23,498 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-12 17:10:23,509 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 3 dim-0 vars, and 2 xjuncts. [2018-04-12 17:10:23,509 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:55, output treesize:84 [2018-04-12 17:10:37,568 WARN L148 SmtUtils]: Spent 14038ms on a formula simplification that was a NOOP. DAG size: 33 [2018-04-12 17:10:51,628 WARN L148 SmtUtils]: Spent 14025ms on a formula simplification that was a NOOP. DAG size: 33 [2018-04-12 17:10:51,641 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 31 [2018-04-12 17:10:51,643 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 10 [2018-04-12 17:10:51,643 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 17:10:51,647 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 1 [2018-04-12 17:10:51,647 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-12 17:10:51,650 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:10:51,659 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 54 treesize of output 36 [2018-04-12 17:10:51,668 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 10 [2018-04-12 17:10:51,668 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-04-12 17:10:51,676 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 1 case distinctions, treesize of input 13 treesize of output 10 [2018-04-12 17:10:51,676 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 2 xjuncts. [2018-04-12 17:10:51,681 INFO L267 ElimStorePlain]: Start of recursive call 5: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-12 17:10:51,693 INFO L267 ElimStorePlain]: Start of recursive call 1: 7 dim-0 vars, 2 dim-2 vars, End of recursive call: 2 dim-0 vars, and 3 xjuncts. [2018-04-12 17:10:51,693 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 9 variables, input treesize:98, output treesize:46 [2018-04-12 17:10:51,742 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 17:10:51,760 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 17:10:51,760 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 13] total 30 [2018-04-12 17:10:51,760 INFO L442 AbstractCegarLoop]: Interpolant automaton has 31 states [2018-04-12 17:10:51,761 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 31 interpolants. [2018-04-12 17:10:51,761 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=140, Invalid=790, Unknown=0, NotChecked=0, Total=930 [2018-04-12 17:10:51,761 INFO L87 Difference]: Start difference. First operand 175 states and 202 transitions. Second operand 31 states. [2018-04-12 17:11:16,497 WARN L151 SmtUtils]: Spent 24068ms on a formula simplification. DAG size of input: 65 DAG size of output 54 [2018-04-12 17:11:40,642 WARN L151 SmtUtils]: Spent 24050ms on a formula simplification. DAG size of input: 66 DAG size of output 41 [2018-04-12 17:12:04,798 WARN L151 SmtUtils]: Spent 24052ms on a formula simplification. DAG size of input: 37 DAG size of output 37 [2018-04-12 17:12:28,936 WARN L151 SmtUtils]: Spent 24042ms on a formula simplification. DAG size of input: 47 DAG size of output 40 [2018-04-12 17:12:53,093 WARN L151 SmtUtils]: Spent 24051ms on a formula simplification. DAG size of input: 76 DAG size of output 44 [2018-04-12 17:12:53,777 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 17:12:53,777 INFO L93 Difference]: Finished difference Result 274 states and 301 transitions. [2018-04-12 17:12:53,777 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 39 states. [2018-04-12 17:12:53,777 INFO L78 Accepts]: Start accepts. Automaton has 31 states. Word has length 36 [2018-04-12 17:12:53,777 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 17:12:53,778 INFO L225 Difference]: With dead ends: 274 [2018-04-12 17:12:53,778 INFO L226 Difference]: Without dead ends: 274 [2018-04-12 17:12:53,779 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 91 GetRequests, 25 SyntacticMatches, 1 SemanticMatches, 65 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1181 ImplicationChecksByTransitivity, 149.6s TimeCoverageRelationStatistics Valid=944, Invalid=3478, Unknown=0, NotChecked=0, Total=4422 [2018-04-12 17:12:53,780 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 274 states. [2018-04-12 17:12:53,783 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 274 to 197. [2018-04-12 17:12:53,783 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 197 states. [2018-04-12 17:12:53,783 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 197 states to 197 states and 229 transitions. [2018-04-12 17:12:53,795 INFO L78 Accepts]: Start accepts. Automaton has 197 states and 229 transitions. Word has length 36 [2018-04-12 17:12:53,795 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 17:12:53,796 INFO L459 AbstractCegarLoop]: Abstraction has 197 states and 229 transitions. [2018-04-12 17:12:53,796 INFO L460 AbstractCegarLoop]: Interpolant automaton has 31 states. [2018-04-12 17:12:53,796 INFO L276 IsEmpty]: Start isEmpty. Operand 197 states and 229 transitions. [2018-04-12 17:12:53,796 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-04-12 17:12:53,796 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 17:12:53,796 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 17:12:53,796 INFO L408 AbstractCegarLoop]: === Iteration 23 === [mainErr51RequiresViolation, mainErr55AssertViolationMEMORY_FREE, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr31RequiresViolation, mainErr46RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr15RequiresViolation, mainErr49RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr56EnsuresViolationMEMORY_LEAK, mainErr17RequiresViolation, mainErr42RequiresViolation, mainErr30RequiresViolation, mainErr54AssertViolationMEMORY_FREE, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr44RequiresViolation, mainErr10RequiresViolation, mainErr43RequiresViolation, mainErr4RequiresViolation, mainErr50RequiresViolation, mainErr37RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr21RequiresViolation, mainErr41RequiresViolation, mainErr48RequiresViolation, mainErr39RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr52RequiresViolation, mainErr45RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr9RequiresViolation, mainErr53RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr8RequiresViolation, mainErr34RequiresViolation, mainErr47RequiresViolation, mainErr14RequiresViolation, mainErr40RequiresViolation]=== [2018-04-12 17:12:53,797 INFO L82 PathProgramCache]: Analyzing trace with hash 287564992, now seen corresponding path program 1 times [2018-04-12 17:12:53,797 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 17:12:53,797 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 17:12:53,798 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 17:12:53,798 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 17:12:53,798 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 17:12:53,807 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 17:12:53,808 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 17:12:54,004 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 17:12:54,004 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-12 17:12:54,004 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-12 17:12:54,010 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 17:12:54,024 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 17:12:54,026 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 17:12:54,053 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 17:12:54,053 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 17:12:54,054 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-04-12 17:12:54,054 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 17:12:54,061 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-12 17:12:54,061 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 17:12:54,067 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:12:54,067 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:26, output treesize:19 [2018-04-12 17:12:54,089 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-04-12 17:12:54,091 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-12 17:12:54,091 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 17:12:54,093 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:12:54,102 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-04-12 17:12:54,104 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-12 17:12:54,104 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-12 17:12:54,106 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:12:54,112 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:12:54,112 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:38, output treesize:31 [2018-04-12 17:12:54,157 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 60 treesize of output 64 [2018-04-12 17:12:54,159 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 13 [2018-04-12 17:12:54,160 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 17:12:54,166 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:12:54,182 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 30 [2018-04-12 17:12:54,184 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 13 [2018-04-12 17:12:54,184 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-12 17:12:54,188 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:12:54,195 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-12 17:12:54,196 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:73, output treesize:57 [2018-04-12 17:12:54,308 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 82 treesize of output 72 [2018-04-12 17:12:54,339 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 20 treesize of output 31 [2018-04-12 17:12:54,339 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 2 xjuncts. [2018-04-12 17:12:54,353 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-12 17:12:54,378 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 73 treesize of output 60 [2018-04-12 17:12:54,381 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 17 [2018-04-12 17:12:54,381 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-12 17:12:54,387 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:12:54,390 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 81 treesize of output 68 [2018-04-12 17:12:54,397 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 20 treesize of output 31 [2018-04-12 17:12:54,398 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 2 xjuncts. [2018-04-12 17:12:54,410 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-12 17:12:54,431 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: 3 dim-0 vars, and 2 xjuncts. [2018-04-12 17:12:54,431 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 4 variables, input treesize:89, output treesize:125 [2018-04-12 17:13:08,480 WARN L148 SmtUtils]: Spent 14023ms on a formula simplification that was a NOOP. DAG size: 45 [2018-04-12 17:13:22,534 WARN L148 SmtUtils]: Spent 14023ms on a formula simplification that was a NOOP. DAG size: 45 [2018-04-12 17:13:22,542 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 65 treesize of output 55 [2018-04-12 17:13:22,543 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2018-04-12 17:13:22,543 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 17:13:22,550 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 1 [2018-04-12 17:13:22,550 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-12 17:13:22,554 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:13:22,579 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 87 treesize of output 65 [2018-04-12 17:13:22,581 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 26 [2018-04-12 17:13:22,581 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-04-12 17:13:22,592 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 1 case distinctions, treesize of input 13 treesize of output 10 [2018-04-12 17:13:22,593 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 2 xjuncts. [2018-04-12 17:13:22,600 INFO L267 ElimStorePlain]: Start of recursive call 5: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-12 17:13:22,634 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 46 treesize of output 38 [2018-04-12 17:13:22,636 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2018-04-12 17:13:22,636 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-04-12 17:13:22,643 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 6 [2018-04-12 17:13:22,643 INFO L267 ElimStorePlain]: Start of recursive call 10: End of recursive call: and 1 xjuncts. [2018-04-12 17:13:22,646 INFO L267 ElimStorePlain]: Start of recursive call 8: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:13:22,648 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 35 [2018-04-12 17:13:22,650 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2018-04-12 17:13:22,650 INFO L267 ElimStorePlain]: Start of recursive call 12: End of recursive call: and 1 xjuncts. [2018-04-12 17:13:22,658 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 1 case distinctions, treesize of input 13 treesize of output 10 [2018-04-12 17:13:22,658 INFO L267 ElimStorePlain]: Start of recursive call 13: End of recursive call: and 2 xjuncts. [2018-04-12 17:13:22,664 INFO L267 ElimStorePlain]: Start of recursive call 11: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-12 17:13:22,683 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 29 [2018-04-12 17:13:22,684 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 1 [2018-04-12 17:13:22,684 INFO L267 ElimStorePlain]: Start of recursive call 15: End of recursive call: and 1 xjuncts. [2018-04-12 17:13:22,689 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 10 [2018-04-12 17:13:22,689 INFO L267 ElimStorePlain]: Start of recursive call 16: End of recursive call: and 1 xjuncts. [2018-04-12 17:13:22,692 INFO L267 ElimStorePlain]: Start of recursive call 14: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:13:22,704 INFO L267 ElimStorePlain]: Start of recursive call 1: 7 dim-0 vars, 4 dim-2 vars, End of recursive call: and 2 xjuncts. [2018-04-12 17:13:22,704 INFO L202 ElimStorePlain]: Needed 16 recursive calls to eliminate 11 variables, input treesize:153, output treesize:23 [2018-04-12 17:13:22,762 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 17:13:22,781 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 17:13:22,781 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 13] total 30 [2018-04-12 17:13:22,781 INFO L442 AbstractCegarLoop]: Interpolant automaton has 31 states [2018-04-12 17:13:22,781 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 31 interpolants. [2018-04-12 17:13:22,782 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=118, Invalid=812, Unknown=0, NotChecked=0, Total=930 [2018-04-12 17:13:22,782 INFO L87 Difference]: Start difference. First operand 197 states and 229 transitions. Second operand 31 states. [2018-04-12 17:13:47,585 WARN L151 SmtUtils]: Spent 24141ms on a formula simplification. DAG size of input: 77 DAG size of output 72 [2018-04-12 17:14:13,773 WARN L151 SmtUtils]: Spent 26101ms on a formula simplification. DAG size of input: 97 DAG size of output 57 [2018-04-12 17:14:27,952 WARN L148 SmtUtils]: Spent 14063ms on a formula simplification that was a NOOP. DAG size: 53 [2018-04-12 17:14:54,128 WARN L151 SmtUtils]: Spent 26075ms on a formula simplification. DAG size of input: 102 DAG size of output 62 [2018-04-12 17:15:08,253 WARN L148 SmtUtils]: Spent 14074ms on a formula simplification that was a NOOP. DAG size: 57 [2018-04-12 17:15:09,027 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 17:15:09,027 INFO L93 Difference]: Finished difference Result 288 states and 318 transitions. [2018-04-12 17:15:09,027 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2018-04-12 17:15:09,027 INFO L78 Accepts]: Start accepts. Automaton has 31 states. Word has length 36 [2018-04-12 17:15:09,027 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 17:15:09,028 INFO L225 Difference]: With dead ends: 288 [2018-04-12 17:15:09,028 INFO L226 Difference]: Without dead ends: 288 [2018-04-12 17:15:09,029 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 78 GetRequests, 25 SyntacticMatches, 1 SemanticMatches, 52 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 665 ImplicationChecksByTransitivity, 133.5s TimeCoverageRelationStatistics Valid=547, Invalid=2315, Unknown=0, NotChecked=0, Total=2862 [2018-04-12 17:15:09,029 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 288 states. [2018-04-12 17:15:09,030 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 288 to 214. [2018-04-12 17:15:09,030 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 214 states. [2018-04-12 17:15:09,031 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 214 states to 214 states and 250 transitions. [2018-04-12 17:15:09,031 INFO L78 Accepts]: Start accepts. Automaton has 214 states and 250 transitions. Word has length 36 [2018-04-12 17:15:09,031 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 17:15:09,031 INFO L459 AbstractCegarLoop]: Abstraction has 214 states and 250 transitions. [2018-04-12 17:15:09,031 INFO L460 AbstractCegarLoop]: Interpolant automaton has 31 states. [2018-04-12 17:15:09,031 INFO L276 IsEmpty]: Start isEmpty. Operand 214 states and 250 transitions. [2018-04-12 17:15:09,031 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2018-04-12 17:15:09,031 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 17:15:09,031 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 17:15:09,031 INFO L408 AbstractCegarLoop]: === Iteration 24 === [mainErr51RequiresViolation, mainErr55AssertViolationMEMORY_FREE, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr31RequiresViolation, mainErr46RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr15RequiresViolation, mainErr49RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr56EnsuresViolationMEMORY_LEAK, mainErr17RequiresViolation, mainErr42RequiresViolation, mainErr30RequiresViolation, mainErr54AssertViolationMEMORY_FREE, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr44RequiresViolation, mainErr10RequiresViolation, mainErr43RequiresViolation, mainErr4RequiresViolation, mainErr50RequiresViolation, mainErr37RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr21RequiresViolation, mainErr41RequiresViolation, mainErr48RequiresViolation, mainErr39RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr52RequiresViolation, mainErr45RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr9RequiresViolation, mainErr53RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr8RequiresViolation, mainErr34RequiresViolation, mainErr47RequiresViolation, mainErr14RequiresViolation, mainErr40RequiresViolation]=== [2018-04-12 17:15:09,032 INFO L82 PathProgramCache]: Analyzing trace with hash -585558576, now seen corresponding path program 1 times [2018-04-12 17:15:09,032 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 17:15:09,032 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 17:15:09,032 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 17:15:09,033 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 17:15:09,033 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 17:15:09,040 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 17:15:09,041 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 17:15:09,143 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 1 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 17:15:09,144 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-12 17:15:09,144 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-12 17:15:09,151 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 17:15:09,166 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 17:15:09,168 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 17:15:09,189 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-04-12 17:15:09,191 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-12 17:15:09,191 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 17:15:09,192 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:15:09,198 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-04-12 17:15:09,200 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-12 17:15:09,200 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-12 17:15:09,201 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:15:09,204 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:15:09,205 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:34, output treesize:23 [2018-04-12 17:15:09,220 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 16 [2018-04-12 17:15:09,223 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 17:15:09,223 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 23 [2018-04-12 17:15:09,223 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 17:15:09,227 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:15:09,236 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 16 [2018-04-12 17:15:09,247 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 17:15:09,248 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 23 [2018-04-12 17:15:09,248 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-12 17:15:09,277 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:15:09,282 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:15:09,282 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:49, output treesize:41 [2018-04-12 17:15:09,303 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 17:15:09,303 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 17:15:09,304 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-04-12 17:15:09,304 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 17:15:09,310 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:15:09,311 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:46, output treesize:40 [2018-04-12 17:15:09,352 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 27 [2018-04-12 17:15:09,353 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-12 17:15:09,353 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 17:15:09,357 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:15:09,367 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 35 [2018-04-12 17:15:09,369 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-12 17:15:09,369 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-12 17:15:09,373 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:15:09,380 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:15:09,380 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:55, output treesize:60 [2018-04-12 17:15:09,416 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 46 [2018-04-12 17:15:09,419 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 17:15:09,419 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 23 [2018-04-12 17:15:09,420 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 17:15:09,432 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:15:09,451 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 54 [2018-04-12 17:15:09,453 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 17:15:09,454 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 53 treesize of output 68 [2018-04-12 17:15:09,454 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-12 17:15:09,461 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:15:09,469 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:15:09,470 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:86, output treesize:78 [2018-04-12 17:15:09,969 WARN L151 SmtUtils]: Spent 117ms on a formula simplification. DAG size of input: 41 DAG size of output 37 [2018-04-12 17:15:09,980 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 100 treesize of output 75 [2018-04-12 17:15:09,982 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 23 [2018-04-12 17:15:09,982 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 17:15:10,010 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 40 [2018-04-12 17:15:10,011 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-12 17:15:10,021 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-12 17:15:10,035 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 39 [2018-04-12 17:15:10,038 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 17:15:10,038 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 15 [2018-04-12 17:15:10,039 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-04-12 17:15:10,051 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 11 [2018-04-12 17:15:10,051 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-04-12 17:15:10,054 INFO L267 ElimStorePlain]: Start of recursive call 5: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:15:10,057 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:15:10,057 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 4 variables, input treesize:116, output treesize:7 [2018-04-12 17:15:10,074 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 1 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 17:15:10,092 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 17:15:10,092 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 16] total 24 [2018-04-12 17:15:10,092 INFO L442 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-04-12 17:15:10,092 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-04-12 17:15:10,092 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=65, Invalid=463, Unknown=24, NotChecked=0, Total=552 [2018-04-12 17:15:10,092 INFO L87 Difference]: Start difference. First operand 214 states and 250 transitions. Second operand 24 states. [2018-04-12 17:15:10,988 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 17:15:10,989 INFO L93 Difference]: Finished difference Result 255 states and 289 transitions. [2018-04-12 17:15:10,989 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-04-12 17:15:10,989 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 37 [2018-04-12 17:15:10,989 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 17:15:10,989 INFO L225 Difference]: With dead ends: 255 [2018-04-12 17:15:10,990 INFO L226 Difference]: Without dead ends: 255 [2018-04-12 17:15:10,990 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 71 GetRequests, 26 SyntacticMatches, 3 SemanticMatches, 42 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 399 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=269, Invalid=1598, Unknown=25, NotChecked=0, Total=1892 [2018-04-12 17:15:10,990 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 255 states. [2018-04-12 17:15:10,992 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 255 to 234. [2018-04-12 17:15:10,992 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 234 states. [2018-04-12 17:15:10,992 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 234 states to 234 states and 271 transitions. [2018-04-12 17:15:10,992 INFO L78 Accepts]: Start accepts. Automaton has 234 states and 271 transitions. Word has length 37 [2018-04-12 17:15:10,992 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 17:15:10,992 INFO L459 AbstractCegarLoop]: Abstraction has 234 states and 271 transitions. [2018-04-12 17:15:10,992 INFO L460 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-04-12 17:15:10,992 INFO L276 IsEmpty]: Start isEmpty. Operand 234 states and 271 transitions. [2018-04-12 17:15:10,992 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2018-04-12 17:15:10,993 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 17:15:10,993 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 17:15:10,993 INFO L408 AbstractCegarLoop]: === Iteration 25 === [mainErr51RequiresViolation, mainErr55AssertViolationMEMORY_FREE, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr31RequiresViolation, mainErr46RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr15RequiresViolation, mainErr49RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr56EnsuresViolationMEMORY_LEAK, mainErr17RequiresViolation, mainErr42RequiresViolation, mainErr30RequiresViolation, mainErr54AssertViolationMEMORY_FREE, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr44RequiresViolation, mainErr10RequiresViolation, mainErr43RequiresViolation, mainErr4RequiresViolation, mainErr50RequiresViolation, mainErr37RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr21RequiresViolation, mainErr41RequiresViolation, mainErr48RequiresViolation, mainErr39RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr52RequiresViolation, mainErr45RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr9RequiresViolation, mainErr53RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr8RequiresViolation, mainErr34RequiresViolation, mainErr47RequiresViolation, mainErr14RequiresViolation, mainErr40RequiresViolation]=== [2018-04-12 17:15:10,993 INFO L82 PathProgramCache]: Analyzing trace with hash -58521746, now seen corresponding path program 1 times [2018-04-12 17:15:10,993 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 17:15:10,993 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 17:15:10,993 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 17:15:10,994 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 17:15:10,994 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 17:15:10,998 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 17:15:10,999 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 17:15:11,018 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 17:15:11,018 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 17:15:11,018 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-04-12 17:15:11,018 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-04-12 17:15:11,019 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-04-12 17:15:11,019 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-04-12 17:15:11,019 INFO L87 Difference]: Start difference. First operand 234 states and 271 transitions. Second operand 5 states. [2018-04-12 17:15:11,090 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 17:15:11,090 INFO L93 Difference]: Finished difference Result 255 states and 284 transitions. [2018-04-12 17:15:11,090 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-04-12 17:15:11,090 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 39 [2018-04-12 17:15:11,090 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 17:15:11,091 INFO L225 Difference]: With dead ends: 255 [2018-04-12 17:15:11,091 INFO L226 Difference]: Without dead ends: 255 [2018-04-12 17:15:11,091 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2018-04-12 17:15:11,091 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 255 states. [2018-04-12 17:15:11,092 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 255 to 223. [2018-04-12 17:15:11,093 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 223 states. [2018-04-12 17:15:11,093 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 223 states to 223 states and 255 transitions. [2018-04-12 17:15:11,093 INFO L78 Accepts]: Start accepts. Automaton has 223 states and 255 transitions. Word has length 39 [2018-04-12 17:15:11,093 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 17:15:11,093 INFO L459 AbstractCegarLoop]: Abstraction has 223 states and 255 transitions. [2018-04-12 17:15:11,093 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-04-12 17:15:11,093 INFO L276 IsEmpty]: Start isEmpty. Operand 223 states and 255 transitions. [2018-04-12 17:15:11,093 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2018-04-12 17:15:11,093 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 17:15:11,094 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 17:15:11,094 INFO L408 AbstractCegarLoop]: === Iteration 26 === [mainErr51RequiresViolation, mainErr55AssertViolationMEMORY_FREE, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr31RequiresViolation, mainErr46RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr15RequiresViolation, mainErr49RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr56EnsuresViolationMEMORY_LEAK, mainErr17RequiresViolation, mainErr42RequiresViolation, mainErr30RequiresViolation, mainErr54AssertViolationMEMORY_FREE, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr44RequiresViolation, mainErr10RequiresViolation, mainErr43RequiresViolation, mainErr4RequiresViolation, mainErr50RequiresViolation, mainErr37RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr21RequiresViolation, mainErr41RequiresViolation, mainErr48RequiresViolation, mainErr39RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr52RequiresViolation, mainErr45RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr9RequiresViolation, mainErr53RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr8RequiresViolation, mainErr34RequiresViolation, mainErr47RequiresViolation, mainErr14RequiresViolation, mainErr40RequiresViolation]=== [2018-04-12 17:15:11,094 INFO L82 PathProgramCache]: Analyzing trace with hash -1377853024, now seen corresponding path program 1 times [2018-04-12 17:15:11,094 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 17:15:11,094 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 17:15:11,095 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 17:15:11,095 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 17:15:11,095 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 17:15:11,101 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 17:15:11,102 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 17:15:11,215 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 17:15:11,215 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-12 17:15:11,215 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-12 17:15:11,228 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 17:15:11,239 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 17:15:11,241 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 17:15:11,246 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 17:15:11,247 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 17:15:11,247 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21 [2018-04-12 17:15:11,247 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 17:15:11,252 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:15:11,252 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:23, output treesize:21 [2018-04-12 17:15:11,264 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-04-12 17:15:11,265 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-12 17:15:11,265 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 17:15:11,266 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:15:11,270 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:15:11,270 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:32, output treesize:29 [2018-04-12 17:15:11,297 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 35 [2018-04-12 17:15:11,298 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 13 [2018-04-12 17:15:11,298 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 17:15:11,301 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:15:11,306 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-12 17:15:11,306 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:50, output treesize:42 [2018-04-12 17:15:11,360 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 50 treesize of output 40 [2018-04-12 17:15:11,366 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 20 treesize of output 31 [2018-04-12 17:15:11,367 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 2 xjuncts. [2018-04-12 17:15:11,375 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-12 17:15:11,388 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 3 dim-0 vars, and 2 xjuncts. [2018-04-12 17:15:11,388 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:55, output treesize:84 [2018-04-12 17:15:25,422 WARN L148 SmtUtils]: Spent 14018ms on a formula simplification that was a NOOP. DAG size: 33 [2018-04-12 17:15:39,480 WARN L148 SmtUtils]: Spent 14027ms on a formula simplification that was a NOOP. DAG size: 33 [2018-04-12 17:15:39,492 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 54 treesize of output 36 [2018-04-12 17:15:39,497 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 1 case distinctions, treesize of input 13 treesize of output 10 [2018-04-12 17:15:39,497 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 2 xjuncts. [2018-04-12 17:15:39,513 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 10 [2018-04-12 17:15:39,513 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-12 17:15:39,528 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-12 17:15:39,561 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 31 [2018-04-12 17:15:39,563 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 10 [2018-04-12 17:15:39,563 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-04-12 17:15:39,570 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 1 [2018-04-12 17:15:39,571 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-04-12 17:15:39,574 INFO L267 ElimStorePlain]: Start of recursive call 5: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:15:39,589 INFO L267 ElimStorePlain]: Start of recursive call 1: 7 dim-0 vars, 2 dim-2 vars, End of recursive call: 2 dim-0 vars, and 3 xjuncts. [2018-04-12 17:15:39,589 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 9 variables, input treesize:98, output treesize:46 [2018-04-12 17:15:39,718 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 17:15:39,719 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 17:15:39,720 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 17:15:39,720 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 34 [2018-04-12 17:15:39,721 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 17:15:39,742 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-04-12 17:15:39,742 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:26, output treesize:28 [2018-04-12 17:15:39,791 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 17:15:39,814 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 17:15:39,814 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 14] total 23 [2018-04-12 17:15:39,814 INFO L442 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-04-12 17:15:39,814 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-04-12 17:15:39,814 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=87, Invalid=465, Unknown=0, NotChecked=0, Total=552 [2018-04-12 17:15:39,815 INFO L87 Difference]: Start difference. First operand 223 states and 255 transitions. Second operand 24 states. [2018-04-12 17:16:08,250 WARN L151 SmtUtils]: Spent 28058ms on a formula simplification. DAG size of input: 37 DAG size of output 37 [2018-04-12 17:16:36,380 WARN L151 SmtUtils]: Spent 28058ms on a formula simplification. DAG size of input: 59 DAG size of output 37 [2018-04-12 17:17:04,532 WARN L151 SmtUtils]: Spent 28050ms on a formula simplification. DAG size of input: 66 DAG size of output 40 [2018-04-12 17:17:32,723 WARN L151 SmtUtils]: Spent 28051ms on a formula simplification. DAG size of input: 66 DAG size of output 40 [2018-04-12 17:18:00,909 WARN L151 SmtUtils]: Spent 28141ms on a formula simplification. DAG size of input: 73 DAG size of output 53 [2018-04-12 17:18:01,160 WARN L151 SmtUtils]: Spent 147ms on a formula simplification. DAG size of input: 35 DAG size of output 31 [2018-04-12 17:18:01,761 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 17:18:01,762 INFO L93 Difference]: Finished difference Result 369 states and 407 transitions. [2018-04-12 17:18:01,762 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2018-04-12 17:18:01,762 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 40 [2018-04-12 17:18:01,762 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 17:18:01,763 INFO L225 Difference]: With dead ends: 369 [2018-04-12 17:18:01,763 INFO L226 Difference]: Without dead ends: 369 [2018-04-12 17:18:01,763 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 77 GetRequests, 33 SyntacticMatches, 2 SemanticMatches, 42 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 464 ImplicationChecksByTransitivity, 169.4s TimeCoverageRelationStatistics Valid=331, Invalid=1561, Unknown=0, NotChecked=0, Total=1892 [2018-04-12 17:18:01,763 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 369 states. [2018-04-12 17:18:01,765 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 369 to 230. [2018-04-12 17:18:01,765 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 230 states. [2018-04-12 17:18:01,766 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 230 states to 230 states and 263 transitions. [2018-04-12 17:18:01,766 INFO L78 Accepts]: Start accepts. Automaton has 230 states and 263 transitions. Word has length 40 [2018-04-12 17:18:01,766 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 17:18:01,766 INFO L459 AbstractCegarLoop]: Abstraction has 230 states and 263 transitions. [2018-04-12 17:18:01,766 INFO L460 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-04-12 17:18:01,766 INFO L276 IsEmpty]: Start isEmpty. Operand 230 states and 263 transitions. [2018-04-12 17:18:01,766 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2018-04-12 17:18:01,766 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 17:18:01,766 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 17:18:01,766 INFO L408 AbstractCegarLoop]: === Iteration 27 === [mainErr51RequiresViolation, mainErr55AssertViolationMEMORY_FREE, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr31RequiresViolation, mainErr46RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr15RequiresViolation, mainErr49RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr56EnsuresViolationMEMORY_LEAK, mainErr17RequiresViolation, mainErr42RequiresViolation, mainErr30RequiresViolation, mainErr54AssertViolationMEMORY_FREE, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr44RequiresViolation, mainErr10RequiresViolation, mainErr43RequiresViolation, mainErr4RequiresViolation, mainErr50RequiresViolation, mainErr37RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr21RequiresViolation, mainErr41RequiresViolation, mainErr48RequiresViolation, mainErr39RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr52RequiresViolation, mainErr45RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr9RequiresViolation, mainErr53RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr8RequiresViolation, mainErr34RequiresViolation, mainErr47RequiresViolation, mainErr14RequiresViolation, mainErr40RequiresViolation]=== [2018-04-12 17:18:01,767 INFO L82 PathProgramCache]: Analyzing trace with hash -1377853023, now seen corresponding path program 1 times [2018-04-12 17:18:01,767 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 17:18:01,767 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 17:18:01,767 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 17:18:01,768 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 17:18:01,768 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 17:18:01,777 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 17:18:01,778 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 17:18:02,090 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 17:18:02,090 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-12 17:18:02,090 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-12 17:18:02,101 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 17:18:02,132 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 17:18:02,136 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 17:18:02,239 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 17:18:02,239 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 17:18:02,240 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21 [2018-04-12 17:18:02,240 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 17:18:02,267 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-12 17:18:02,267 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 17:18:02,275 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:18:02,275 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:32, output treesize:29 [2018-04-12 17:18:02,303 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-04-12 17:18:02,308 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-12 17:18:02,308 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 17:18:02,315 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:18:02,348 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-04-12 17:18:02,350 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-12 17:18:02,350 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-12 17:18:02,351 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:18:02,358 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:18:02,359 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:48, output treesize:45 [2018-04-12 17:18:02,408 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 69 treesize of output 73 [2018-04-12 17:18:02,411 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 13 [2018-04-12 17:18:02,411 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 17:18:02,418 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:18:02,433 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 30 [2018-04-12 17:18:02,435 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 13 [2018-04-12 17:18:02,435 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-12 17:18:02,439 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:18:02,451 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-12 17:18:02,451 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:87, output treesize:71 [2018-04-12 17:18:02,677 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 91 treesize of output 81 [2018-04-12 17:18:02,686 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 20 treesize of output 31 [2018-04-12 17:18:02,686 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 2 xjuncts. [2018-04-12 17:18:02,702 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-12 17:18:02,734 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 90 treesize of output 77 [2018-04-12 17:18:02,771 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 20 treesize of output 31 [2018-04-12 17:18:02,771 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 2 xjuncts. [2018-04-12 17:18:02,788 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-12 17:18:02,793 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 82 treesize of output 69 [2018-04-12 17:18:02,796 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 17 [2018-04-12 17:18:02,797 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-04-12 17:18:02,805 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:18:02,836 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: 3 dim-0 vars, and 2 xjuncts. [2018-04-12 17:18:02,836 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 4 variables, input treesize:103, output treesize:153 [2018-04-12 17:18:20,899 WARN L148 SmtUtils]: Spent 18031ms on a formula simplification that was a NOOP. DAG size: 51 [2018-04-12 17:18:38,973 WARN L148 SmtUtils]: Spent 18029ms on a formula simplification that was a NOOP. DAG size: 51 [2018-04-12 17:18:38,980 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 101 treesize of output 77 [2018-04-12 17:18:38,989 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 1 case distinctions, treesize of input 13 treesize of output 10 [2018-04-12 17:18:38,990 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 2 xjuncts. [2018-04-12 17:18:39,001 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 46 treesize of output 31 [2018-04-12 17:18:39,002 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-12 17:18:39,011 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-12 17:18:39,058 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 56 treesize of output 48 [2018-04-12 17:18:39,059 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2018-04-12 17:18:39,059 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-04-12 17:18:39,067 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 6 [2018-04-12 17:18:39,068 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-04-12 17:18:39,073 INFO L267 ElimStorePlain]: Start of recursive call 5: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:18:39,074 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 53 treesize of output 45 [2018-04-12 17:18:39,078 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 1 case distinctions, treesize of input 13 treesize of output 10 [2018-04-12 17:18:39,078 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 2 xjuncts. [2018-04-12 17:18:39,089 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2018-04-12 17:18:39,089 INFO L267 ElimStorePlain]: Start of recursive call 10: End of recursive call: and 1 xjuncts. [2018-04-12 17:18:39,097 INFO L267 ElimStorePlain]: Start of recursive call 8: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-12 17:18:39,124 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 79 treesize of output 77 [2018-04-12 17:18:39,126 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2018-04-12 17:18:39,126 INFO L267 ElimStorePlain]: Start of recursive call 12: End of recursive call: and 1 xjuncts. [2018-04-12 17:18:39,136 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 1 [2018-04-12 17:18:39,136 INFO L267 ElimStorePlain]: Start of recursive call 13: End of recursive call: and 1 xjuncts. [2018-04-12 17:18:39,142 INFO L267 ElimStorePlain]: Start of recursive call 11: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:18:39,164 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 41 [2018-04-12 17:18:39,165 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 1 [2018-04-12 17:18:39,165 INFO L267 ElimStorePlain]: Start of recursive call 15: End of recursive call: and 1 xjuncts. [2018-04-12 17:18:39,171 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 15 [2018-04-12 17:18:39,171 INFO L267 ElimStorePlain]: Start of recursive call 16: End of recursive call: and 1 xjuncts. [2018-04-12 17:18:39,174 INFO L267 ElimStorePlain]: Start of recursive call 14: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:18:39,191 INFO L267 ElimStorePlain]: Start of recursive call 1: 7 dim-0 vars, 4 dim-2 vars, End of recursive call: 2 dim-0 vars, and 3 xjuncts. [2018-04-12 17:18:39,191 INFO L202 ElimStorePlain]: Needed 16 recursive calls to eliminate 11 variables, input treesize:181, output treesize:70 [2018-04-12 17:18:39,290 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 17:18:39,290 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 17:18:39,291 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 17:18:39,291 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 13 [2018-04-12 17:18:39,291 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 17:18:39,298 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-04-12 17:18:39,298 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 17:18:39,304 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-12 17:18:39,304 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:34, output treesize:18 [2018-04-12 17:18:39,359 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 17:18:39,386 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 17:18:39,386 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 14] total 32 [2018-04-12 17:18:39,386 INFO L442 AbstractCegarLoop]: Interpolant automaton has 33 states [2018-04-12 17:18:39,387 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 33 interpolants. [2018-04-12 17:18:39,387 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=136, Invalid=920, Unknown=0, NotChecked=0, Total=1056 [2018-04-12 17:18:39,387 INFO L87 Difference]: Start difference. First operand 230 states and 263 transitions. Second operand 33 states. [2018-04-12 17:19:08,264 WARN L151 SmtUtils]: Spent 28104ms on a formula simplification. DAG size of input: 81 DAG size of output 78 [2018-04-12 17:19:34,509 WARN L151 SmtUtils]: Spent 26079ms on a formula simplification. DAG size of input: 104 DAG size of output 62 [2018-04-12 17:20:06,667 WARN L151 SmtUtils]: Spent 32070ms on a formula simplification. DAG size of input: 55 DAG size of output 55 [2018-04-12 17:20:32,823 WARN L151 SmtUtils]: Spent 26096ms on a formula simplification. DAG size of input: 115 DAG size of output 69 [2018-04-12 17:20:59,013 WARN L151 SmtUtils]: Spent 26113ms on a formula simplification. DAG size of input: 115 DAG size of output 69 [2018-04-12 17:21:25,301 WARN L151 SmtUtils]: Spent 26226ms on a formula simplification. DAG size of input: 122 DAG size of output 76 [2018-04-12 17:21:26,069 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 17:21:26,070 INFO L93 Difference]: Finished difference Result 341 states and 376 transitions. [2018-04-12 17:21:26,070 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2018-04-12 17:21:26,070 INFO L78 Accepts]: Start accepts. Automaton has 33 states. Word has length 40 [2018-04-12 17:21:26,070 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 17:21:26,071 INFO L225 Difference]: With dead ends: 341 [2018-04-12 17:21:26,071 INFO L226 Difference]: Without dead ends: 341 [2018-04-12 17:21:26,072 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 91 GetRequests, 29 SyntacticMatches, 2 SemanticMatches, 60 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 944 ImplicationChecksByTransitivity, 202.6s TimeCoverageRelationStatistics Valid=729, Invalid=3053, Unknown=0, NotChecked=0, Total=3782 [2018-04-12 17:21:26,072 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 341 states. [2018-04-12 17:21:26,073 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 341 to 233. [2018-04-12 17:21:26,073 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 233 states. [2018-04-12 17:21:26,074 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 233 states to 233 states and 265 transitions. [2018-04-12 17:21:26,074 INFO L78 Accepts]: Start accepts. Automaton has 233 states and 265 transitions. Word has length 40 [2018-04-12 17:21:26,074 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 17:21:26,074 INFO L459 AbstractCegarLoop]: Abstraction has 233 states and 265 transitions. [2018-04-12 17:21:26,074 INFO L460 AbstractCegarLoop]: Interpolant automaton has 33 states. [2018-04-12 17:21:26,074 INFO L276 IsEmpty]: Start isEmpty. Operand 233 states and 265 transitions. [2018-04-12 17:21:26,074 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2018-04-12 17:21:26,075 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 17:21:26,075 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 17:21:26,075 INFO L408 AbstractCegarLoop]: === Iteration 28 === [mainErr51RequiresViolation, mainErr55AssertViolationMEMORY_FREE, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr31RequiresViolation, mainErr46RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr15RequiresViolation, mainErr49RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr56EnsuresViolationMEMORY_LEAK, mainErr17RequiresViolation, mainErr42RequiresViolation, mainErr30RequiresViolation, mainErr54AssertViolationMEMORY_FREE, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr44RequiresViolation, mainErr10RequiresViolation, mainErr43RequiresViolation, mainErr4RequiresViolation, mainErr50RequiresViolation, mainErr37RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr21RequiresViolation, mainErr41RequiresViolation, mainErr48RequiresViolation, mainErr39RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr52RequiresViolation, mainErr45RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr9RequiresViolation, mainErr53RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr8RequiresViolation, mainErr34RequiresViolation, mainErr47RequiresViolation, mainErr14RequiresViolation, mainErr40RequiresViolation]=== [2018-04-12 17:21:26,075 INFO L82 PathProgramCache]: Analyzing trace with hash -1591944237, now seen corresponding path program 1 times [2018-04-12 17:21:26,075 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 17:21:26,075 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 17:21:26,076 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 17:21:26,076 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 17:21:26,076 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 17:21:26,080 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 17:21:26,080 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 17:21:26,129 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 1 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 17:21:26,129 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-12 17:21:26,129 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-12 17:21:26,134 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 17:21:26,149 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 17:21:26,151 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 17:21:26,165 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-04-12 17:21:26,166 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-04-12 17:21:26,166 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 17:21:26,167 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:21:26,172 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-04-12 17:21:26,173 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-04-12 17:21:26,173 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-12 17:21:26,174 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:21:26,177 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:21:26,177 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:30, output treesize:22 [2018-04-12 17:21:26,304 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 16 [2018-04-12 17:21:26,316 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 16 treesize of output 17 [2018-04-12 17:21:26,317 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 2 xjuncts. [2018-04-12 17:21:26,321 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-12 17:21:26,331 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 16 [2018-04-12 17:21:26,340 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 16 treesize of output 17 [2018-04-12 17:21:26,340 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 2 xjuncts. [2018-04-12 17:21:26,344 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-12 17:21:26,373 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 3 xjuncts. [2018-04-12 17:21:26,373 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:49, output treesize:28 [2018-04-12 17:21:26,424 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 1 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 17:21:26,443 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 17:21:26,444 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 15] total 21 [2018-04-12 17:21:26,444 INFO L442 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-04-12 17:21:26,444 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-04-12 17:21:26,444 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=44, Invalid=376, Unknown=0, NotChecked=0, Total=420 [2018-04-12 17:21:26,444 INFO L87 Difference]: Start difference. First operand 233 states and 265 transitions. Second operand 21 states. [2018-04-12 17:21:27,179 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 17:21:27,179 INFO L93 Difference]: Finished difference Result 317 states and 346 transitions. [2018-04-12 17:21:27,179 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2018-04-12 17:21:27,179 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 41 [2018-04-12 17:21:27,179 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 17:21:27,180 INFO L225 Difference]: With dead ends: 317 [2018-04-12 17:21:27,180 INFO L226 Difference]: Without dead ends: 317 [2018-04-12 17:21:27,180 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 71 GetRequests, 31 SyntacticMatches, 1 SemanticMatches, 39 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 241 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=230, Invalid=1410, Unknown=0, NotChecked=0, Total=1640 [2018-04-12 17:21:27,180 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 317 states. [2018-04-12 17:21:27,183 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 317 to 248. [2018-04-12 17:21:27,183 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 248 states. [2018-04-12 17:21:27,184 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 248 states to 248 states and 281 transitions. [2018-04-12 17:21:27,184 INFO L78 Accepts]: Start accepts. Automaton has 248 states and 281 transitions. Word has length 41 [2018-04-12 17:21:27,184 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 17:21:27,184 INFO L459 AbstractCegarLoop]: Abstraction has 248 states and 281 transitions. [2018-04-12 17:21:27,184 INFO L460 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-04-12 17:21:27,184 INFO L276 IsEmpty]: Start isEmpty. Operand 248 states and 281 transitions. [2018-04-12 17:21:27,185 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-04-12 17:21:27,185 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 17:21:27,185 INFO L355 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 17:21:27,185 INFO L408 AbstractCegarLoop]: === Iteration 29 === [mainErr51RequiresViolation, mainErr55AssertViolationMEMORY_FREE, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr31RequiresViolation, mainErr46RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr15RequiresViolation, mainErr49RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr56EnsuresViolationMEMORY_LEAK, mainErr17RequiresViolation, mainErr42RequiresViolation, mainErr30RequiresViolation, mainErr54AssertViolationMEMORY_FREE, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr44RequiresViolation, mainErr10RequiresViolation, mainErr43RequiresViolation, mainErr4RequiresViolation, mainErr50RequiresViolation, mainErr37RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr21RequiresViolation, mainErr41RequiresViolation, mainErr48RequiresViolation, mainErr39RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr52RequiresViolation, mainErr45RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr9RequiresViolation, mainErr53RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr8RequiresViolation, mainErr34RequiresViolation, mainErr47RequiresViolation, mainErr14RequiresViolation, mainErr40RequiresViolation]=== [2018-04-12 17:21:27,187 INFO L82 PathProgramCache]: Analyzing trace with hash -2105632456, now seen corresponding path program 1 times [2018-04-12 17:21:27,187 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 17:21:27,187 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 17:21:27,188 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 17:21:27,188 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 17:21:27,188 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 17:21:27,193 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 17:21:27,194 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 17:21:27,246 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 17:21:27,247 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-12 17:21:27,247 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-12 17:21:27,252 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 17:21:27,275 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 17:21:27,277 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 17:21:27,288 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-04-12 17:21:27,289 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-12 17:21:27,289 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 17:21:27,290 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:21:27,293 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:21:27,293 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:16, output treesize:8 [2018-04-12 17:21:27,298 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 17 [2018-04-12 17:21:27,299 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 17:21:27,300 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 24 [2018-04-12 17:21:27,300 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 17:21:27,303 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:21:27,305 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:21:27,305 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:22, output treesize:18 [2018-04-12 17:21:27,325 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 19 [2018-04-12 17:21:27,326 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 11 [2018-04-12 17:21:27,326 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 17:21:27,328 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:21:27,328 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:21:27,328 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:25, output treesize:4 [2018-04-12 17:21:27,334 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-04-12 17:21:27,351 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-04-12 17:21:27,352 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [8] total 11 [2018-04-12 17:21:27,352 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-04-12 17:21:27,352 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-04-12 17:21:27,352 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2018-04-12 17:21:27,352 INFO L87 Difference]: Start difference. First operand 248 states and 281 transitions. Second operand 11 states. [2018-04-12 17:21:27,541 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 17:21:27,541 INFO L93 Difference]: Finished difference Result 287 states and 316 transitions. [2018-04-12 17:21:27,541 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-04-12 17:21:27,542 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 42 [2018-04-12 17:21:27,542 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 17:21:27,542 INFO L225 Difference]: With dead ends: 287 [2018-04-12 17:21:27,542 INFO L226 Difference]: Without dead ends: 287 [2018-04-12 17:21:27,543 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 60 GetRequests, 40 SyntacticMatches, 2 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 42 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=85, Invalid=295, Unknown=0, NotChecked=0, Total=380 [2018-04-12 17:21:27,543 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 287 states. [2018-04-12 17:21:27,544 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 287 to 264. [2018-04-12 17:21:27,544 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 264 states. [2018-04-12 17:21:27,545 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 264 states to 264 states and 299 transitions. [2018-04-12 17:21:27,545 INFO L78 Accepts]: Start accepts. Automaton has 264 states and 299 transitions. Word has length 42 [2018-04-12 17:21:27,545 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 17:21:27,545 INFO L459 AbstractCegarLoop]: Abstraction has 264 states and 299 transitions. [2018-04-12 17:21:27,545 INFO L460 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-04-12 17:21:27,545 INFO L276 IsEmpty]: Start isEmpty. Operand 264 states and 299 transitions. [2018-04-12 17:21:27,545 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-04-12 17:21:27,546 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 17:21:27,546 INFO L355 BasicCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 17:21:27,546 INFO L408 AbstractCegarLoop]: === Iteration 30 === [mainErr51RequiresViolation, mainErr55AssertViolationMEMORY_FREE, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr31RequiresViolation, mainErr46RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr15RequiresViolation, mainErr49RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr56EnsuresViolationMEMORY_LEAK, mainErr17RequiresViolation, mainErr42RequiresViolation, mainErr30RequiresViolation, mainErr54AssertViolationMEMORY_FREE, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr44RequiresViolation, mainErr10RequiresViolation, mainErr43RequiresViolation, mainErr4RequiresViolation, mainErr50RequiresViolation, mainErr37RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr21RequiresViolation, mainErr41RequiresViolation, mainErr48RequiresViolation, mainErr39RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr52RequiresViolation, mainErr45RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr9RequiresViolation, mainErr53RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr8RequiresViolation, mainErr34RequiresViolation, mainErr47RequiresViolation, mainErr14RequiresViolation, mainErr40RequiresViolation]=== [2018-04-12 17:21:27,546 INFO L82 PathProgramCache]: Analyzing trace with hash 1176462409, now seen corresponding path program 2 times [2018-04-12 17:21:27,546 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 17:21:27,546 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 17:21:27,547 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 17:21:27,547 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 17:21:27,547 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 17:21:27,554 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 17:21:27,555 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 17:21:27,805 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 10 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 17:21:27,806 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-12 17:21:27,806 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-12 17:21:27,813 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-04-12 17:21:27,833 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-04-12 17:21:27,833 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-12 17:21:27,835 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 17:21:27,847 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 17:21:27,848 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 17:21:27,848 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-04-12 17:21:27,848 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 17:21:27,852 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:21:27,852 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:23, output treesize:17 [2018-04-12 17:21:27,868 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-04-12 17:21:27,870 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-12 17:21:27,870 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 17:21:27,871 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:21:27,878 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-04-12 17:21:27,907 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-12 17:21:27,908 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-12 17:21:27,909 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:21:27,915 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:21:27,915 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:36, output treesize:25 [2018-04-12 17:21:27,957 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 47 [2018-04-12 17:21:27,959 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 13 [2018-04-12 17:21:27,959 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 17:21:27,963 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:21:27,975 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 30 [2018-04-12 17:21:27,977 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 13 [2018-04-12 17:21:27,977 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-12 17:21:27,981 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:21:27,989 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-12 17:21:27,989 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:67, output treesize:51 [2018-04-12 17:21:28,127 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 67 treesize of output 62 [2018-04-12 17:21:28,131 INFO L682 Elim1Store]: detected equality via solver [2018-04-12 17:21:28,132 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 43 [2018-04-12 17:21:28,132 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 17:21:28,139 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:21:28,151 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 73 treesize of output 63 [2018-04-12 17:21:28,158 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 24 treesize of output 39 [2018-04-12 17:21:28,159 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 2 xjuncts. [2018-04-12 17:21:28,174 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-12 17:21:28,192 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-04-12 17:21:28,192 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:91, output treesize:125 [2018-04-12 17:21:28,321 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 69 treesize of output 56 [2018-04-12 17:21:28,322 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 27 [2018-04-12 17:21:28,323 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-12 17:21:28,328 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 15 [2018-04-12 17:21:28,329 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-12 17:21:28,333 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-12 17:21:28,340 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 29 [2018-04-12 17:21:28,342 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 3 [2018-04-12 17:21:28,342 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-04-12 17:21:28,360 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2018-04-12 17:21:28,360 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-04-12 17:21:28,362 INFO L267 ElimStorePlain]: Start of recursive call 5: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:21:28,365 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 17:21:28,365 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 3 variables, input treesize:76, output treesize:7 [2018-04-12 17:21:28,390 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 7 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 17:21:28,410 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 17:21:28,410 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 17] total 30 [2018-04-12 17:21:28,410 INFO L442 AbstractCegarLoop]: Interpolant automaton has 30 states [2018-04-12 17:21:28,411 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2018-04-12 17:21:28,411 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=102, Invalid=765, Unknown=3, NotChecked=0, Total=870 [2018-04-12 17:21:28,411 INFO L87 Difference]: Start difference. First operand 264 states and 299 transitions. Second operand 30 states. [2018-04-12 17:21:29,767 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 17:21:29,767 INFO L93 Difference]: Finished difference Result 283 states and 307 transitions. [2018-04-12 17:21:29,768 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-04-12 17:21:29,768 INFO L78 Accepts]: Start accepts. Automaton has 30 states. Word has length 42 [2018-04-12 17:21:29,768 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 17:21:29,768 INFO L225 Difference]: With dead ends: 283 [2018-04-12 17:21:29,768 INFO L226 Difference]: Without dead ends: 283 [2018-04-12 17:21:29,769 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 84 GetRequests, 31 SyntacticMatches, 3 SemanticMatches, 50 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 597 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=431, Invalid=2217, Unknown=4, NotChecked=0, Total=2652 [2018-04-12 17:21:29,769 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 283 states. [2018-04-12 17:21:29,771 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 283 to 254. [2018-04-12 17:21:29,771 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 254 states. [2018-04-12 17:21:29,772 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 254 states to 254 states and 284 transitions. [2018-04-12 17:21:29,772 INFO L78 Accepts]: Start accepts. Automaton has 254 states and 284 transitions. Word has length 42 [2018-04-12 17:21:29,772 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 17:21:29,772 INFO L459 AbstractCegarLoop]: Abstraction has 254 states and 284 transitions. [2018-04-12 17:21:29,772 INFO L460 AbstractCegarLoop]: Interpolant automaton has 30 states. [2018-04-12 17:21:29,772 INFO L276 IsEmpty]: Start isEmpty. Operand 254 states and 284 transitions. [2018-04-12 17:21:29,773 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2018-04-12 17:21:29,773 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 17:21:29,773 INFO L355 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 17:21:29,773 INFO L408 AbstractCegarLoop]: === Iteration 31 === [mainErr51RequiresViolation, mainErr55AssertViolationMEMORY_FREE, mainErr26RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr31RequiresViolation, mainErr46RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr15RequiresViolation, mainErr49RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr56EnsuresViolationMEMORY_LEAK, mainErr17RequiresViolation, mainErr42RequiresViolation, mainErr30RequiresViolation, mainErr54AssertViolationMEMORY_FREE, mainErr11RequiresViolation, mainErr24RequiresViolation, mainErr44RequiresViolation, mainErr10RequiresViolation, mainErr43RequiresViolation, mainErr4RequiresViolation, mainErr50RequiresViolation, mainErr37RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr21RequiresViolation, mainErr41RequiresViolation, mainErr48RequiresViolation, mainErr39RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr52RequiresViolation, mainErr45RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr9RequiresViolation, mainErr53RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr8RequiresViolation, mainErr34RequiresViolation, mainErr47RequiresViolation, mainErr14RequiresViolation, mainErr40RequiresViolation]=== [2018-04-12 17:21:29,773 INFO L82 PathProgramCache]: Analyzing trace with hash -92088635, now seen corresponding path program 1 times [2018-04-12 17:21:29,773 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 17:21:29,773 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 17:21:29,774 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 17:21:29,774 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-12 17:21:29,774 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 17:21:29,780 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-04-12 17:21:29,787 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-04-12 17:21:29,806 INFO L421 BasicCegarLoop]: Counterexample might be feasible [2018-04-12 17:21:29,819 WARN L343 cessorBacktranslator]: Generated EnsuresSpecification ensures #valid == old(#valid); is not ensure(true) [2018-04-12 17:21:29,834 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 12.04 05:21:29 BoogieIcfgContainer [2018-04-12 17:21:29,834 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-04-12 17:21:29,835 INFO L168 Benchmark]: Toolchain (without parser) took 674939.68 ms. Allocated memory was 400.0 MB in the beginning and 705.7 MB in the end (delta: 305.7 MB). Free memory was 338.0 MB in the beginning and 416.9 MB in the end (delta: -79.0 MB). Peak memory consumption was 226.7 MB. Max. memory is 5.3 GB. [2018-04-12 17:21:29,836 INFO L168 Benchmark]: CDTParser took 0.15 ms. Allocated memory is still 400.0 MB. Free memory is still 363.2 MB. There was no memory consumed. Max. memory is 5.3 GB. [2018-04-12 17:21:29,836 INFO L168 Benchmark]: CACSL2BoogieTranslator took 268.68 ms. Allocated memory is still 400.0 MB. Free memory was 336.6 MB in the beginning and 310.1 MB in the end (delta: 26.5 MB). Peak memory consumption was 26.5 MB. Max. memory is 5.3 GB. [2018-04-12 17:21:29,836 INFO L168 Benchmark]: Boogie Preprocessor took 56.00 ms. Allocated memory is still 400.0 MB. Free memory was 310.1 MB in the beginning and 306.2 MB in the end (delta: 4.0 MB). Peak memory consumption was 4.0 MB. Max. memory is 5.3 GB. [2018-04-12 17:21:29,836 INFO L168 Benchmark]: RCFGBuilder took 520.38 ms. Allocated memory was 400.0 MB in the beginning and 607.1 MB in the end (delta: 207.1 MB). Free memory was 306.2 MB in the beginning and 525.0 MB in the end (delta: -218.8 MB). Peak memory consumption was 23.5 MB. Max. memory is 5.3 GB. [2018-04-12 17:21:29,837 INFO L168 Benchmark]: TraceAbstraction took 674091.77 ms. Allocated memory was 607.1 MB in the beginning and 705.7 MB in the end (delta: 98.6 MB). Free memory was 525.0 MB in the beginning and 416.9 MB in the end (delta: 108.0 MB). Peak memory consumption was 206.6 MB. Max. memory is 5.3 GB. [2018-04-12 17:21:29,838 INFO L344 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.15 ms. Allocated memory is still 400.0 MB. Free memory is still 363.2 MB. There was no memory consumed. Max. memory is 5.3 GB. * CACSL2BoogieTranslator took 268.68 ms. Allocated memory is still 400.0 MB. Free memory was 336.6 MB in the beginning and 310.1 MB in the end (delta: 26.5 MB). Peak memory consumption was 26.5 MB. Max. memory is 5.3 GB. * Boogie Preprocessor took 56.00 ms. Allocated memory is still 400.0 MB. Free memory was 310.1 MB in the beginning and 306.2 MB in the end (delta: 4.0 MB). Peak memory consumption was 4.0 MB. Max. memory is 5.3 GB. * RCFGBuilder took 520.38 ms. Allocated memory was 400.0 MB in the beginning and 607.1 MB in the end (delta: 207.1 MB). Free memory was 306.2 MB in the beginning and 525.0 MB in the end (delta: -218.8 MB). Peak memory consumption was 23.5 MB. Max. memory is 5.3 GB. * TraceAbstraction took 674091.77 ms. Allocated memory was 607.1 MB in the beginning and 705.7 MB in the end (delta: 98.6 MB). Free memory was 525.0 MB in the beginning and 416.9 MB in the end (delta: 108.0 MB). Peak memory consumption was 206.6 MB. Max. memory is 5.3 GB. * Results from de.uni_freiburg.informatik.ultimate.boogie.preprocessor: - GenericResult: Unfinished Backtranslation Generated EnsuresSpecification ensures #valid == old(#valid); is not ensure(true) * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 986]: not all allocated memory was freed not all allocated memory was freed We found a FailurePath: [L989] EXPR, FCALL malloc(sizeof(SLL)) VAL [malloc(sizeof(SLL))={14:0}] [L989] SLL* head = malloc(sizeof(SLL)); VAL [head={14:0}, malloc(sizeof(SLL))={14:0}] [L990] FCALL head->next = ((void*)0) VAL [head={14:0}, malloc(sizeof(SLL))={14:0}] [L991] FCALL head->prev = ((void*)0) VAL [head={14:0}, malloc(sizeof(SLL))={14:0}] [L992] FCALL head->data = 0 VAL [head={14:0}, malloc(sizeof(SLL))={14:0}] [L994] SLL* x = head; VAL [head={14:0}, malloc(sizeof(SLL))={14:0}, x={14:0}] [L997] COND FALSE !(__VERIFIER_nondet_int()) [L1008] COND FALSE !(__VERIFIER_nondet_int()) [L1018] x = head VAL [head={14:0}, malloc(sizeof(SLL))={14:0}, x={14:0}] [L1019] EXPR, FCALL x->next VAL [head={14:0}, malloc(sizeof(SLL))={14:0}, x={14:0}, x->next={0:0}] [L1019] COND FALSE !(x->next != ((void*)0)) [L1026] EXPR, FCALL x->next VAL [head={14:0}, malloc(sizeof(SLL))={14:0}, x={14:0}, x->next={0:0}] [L1026] SLL* y = x->next; [L1027] EXPR, FCALL malloc(sizeof(SLL)) VAL [head={14:0}, malloc(sizeof(SLL))={14:0}, malloc(sizeof(SLL))={15:0}, x={14:0}, y={0:0}] [L1027] FCALL x->next = malloc(sizeof(SLL)) VAL [head={14:0}, malloc(sizeof(SLL))={14:0}, malloc(sizeof(SLL))={15:0}, x={14:0}, y={0:0}] [L1028] FCALL x->data = 1 VAL [head={14:0}, malloc(sizeof(SLL))={14:0}, malloc(sizeof(SLL))={15:0}, x={14:0}, y={0:0}] [L1029] FCALL x->next = y VAL [head={14:0}, malloc(sizeof(SLL))={14:0}, malloc(sizeof(SLL))={15:0}, x={14:0}, y={0:0}] [L1030] COND FALSE !(y != ((void*)0)) VAL [head={14:0}, malloc(sizeof(SLL))={14:0}, malloc(sizeof(SLL))={15:0}, x={14:0}, y={0:0}] [L1038] x = head VAL [head={14:0}, malloc(sizeof(SLL))={14:0}, malloc(sizeof(SLL))={15:0}, x={14:0}, y={0:0}] [L1041] EXPR, FCALL x->data VAL [head={14:0}, malloc(sizeof(SLL))={14:0}, malloc(sizeof(SLL))={15:0}, x={14:0}, x->data=1, y={0:0}] [L1041] COND FALSE !(x->data != 1) [L1047] EXPR, FCALL x->next VAL [head={14:0}, malloc(sizeof(SLL))={14:0}, malloc(sizeof(SLL))={15:0}, x={14:0}, x->next={0:0}, y={0:0}] [L1047] x = x->next [L1048] COND FALSE !(\read(*x)) VAL [head={14:0}, malloc(sizeof(SLL))={14:0}, malloc(sizeof(SLL))={15:0}, x={0:0}, y={0:0}] [L1056] x = head VAL [head={14:0}, malloc(sizeof(SLL))={14:0}, malloc(sizeof(SLL))={15:0}, x={14:0}, y={0:0}] [L1057] COND TRUE x != ((void*)0) [L1059] head = x VAL [head={14:0}, malloc(sizeof(SLL))={14:0}, malloc(sizeof(SLL))={15:0}, x={14:0}, y={0:0}] [L1060] EXPR, FCALL x->next VAL [head={14:0}, malloc(sizeof(SLL))={14:0}, malloc(sizeof(SLL))={15:0}, x={14:0}, x->next={0:0}, y={0:0}] [L1060] x = x->next [L1061] free(head) VAL [head={14:0}, malloc(sizeof(SLL))={14:0}, malloc(sizeof(SLL))={15:0}, x={0:0}, y={0:0}] [L1061] free(head) VAL [head={14:0}, malloc(sizeof(SLL))={14:0}, malloc(sizeof(SLL))={15:0}, x={0:0}, y={0:0}] [L1061] FCALL free(head) VAL [head={14:0}, malloc(sizeof(SLL))={14:0}, malloc(sizeof(SLL))={15:0}, x={0:0}, y={0:0}] [L1057] COND FALSE !(x != ((void*)0)) VAL [head={14:0}, malloc(sizeof(SLL))={14:0}, malloc(sizeof(SLL))={15:0}, x={0:0}, y={0:0}] [L1064] return 0; VAL [\result=0, head={14:0}, malloc(sizeof(SLL))={14:0}, malloc(sizeof(SLL))={15:0}, x={0:0}, y={0:0}] - StatisticsResult: Ultimate Automizer benchmark data CFG has 3 procedures, 135 locations, 57 error locations. UNSAFE Result, 674.0s OverallTime, 31 OverallIterations, 3 TraceHistogramMax, 545.1s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 2471 SDtfs, 10455 SDslu, 10664 SDs, 0 SdLazy, 16630 SolverSat, 1827 SolverUnsat, 20 SolverUnknown, 0 SolverNotchecked, 8.0s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 943 GetRequests, 326 SyntacticMatches, 26 SemanticMatches, 591 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4974 ImplicationChecksByTransitivity, 660.3s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=264occurred in iteration=29, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.1s AutomataMinimizationTime, 30 MinimizatonAttempts, 1542 StatesRemovedByMinimization, 30 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.0s SsaConstructionTime, 0.3s SatisfiabilityAnalysisTime, 127.8s InterpolantComputationTime, 1276 NumberOfCodeBlocks, 1276 NumberOfCodeBlocksAsserted, 42 NumberOfCheckSat, 1190 ConstructedInterpolants, 94 QuantifiedInterpolants, 635310 SizeOfPredicates, 138 NumberOfNonLiveVariables, 1610 ConjunctsInSsa, 345 ConjunctsInUnsatCore, 40 InterpolantComputations, 21 PerfectInterpolantSequences, 36/95 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Written .csv to /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/dll-simple-white-blue_true-unreach-call_false-valid-memtrack.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Camel.epf_AutomizerC.xml/Csv-Benchmark-0-2018-04-12_17-21-29-844.csv Written .csv to /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/dll-simple-white-blue_true-unreach-call_false-valid-memtrack.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Camel.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-0-2018-04-12_17-21-29-844.csv Received shutdown request...