java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv --cacsl2boogietranslator.bitprecise.bitfields false -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/cade18-smtinterpol/svcomp-DerefFreeMemtrack-32bit-Automizer_Camel.epf -i ../../../trunk/examples/svcomp/memsafety-ext2/optional_data_creation_test04_false-valid-memtrack.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-408c70d-m [2018-04-12 13:51:18,307 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-04-12 13:51:18,308 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-04-12 13:51:18,321 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-04-12 13:51:18,321 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-04-12 13:51:18,322 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-04-12 13:51:18,323 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-04-12 13:51:18,325 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-04-12 13:51:18,326 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-04-12 13:51:18,327 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-04-12 13:51:18,328 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-04-12 13:51:18,328 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-04-12 13:51:18,328 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-04-12 13:51:18,329 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-04-12 13:51:18,330 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-04-12 13:51:18,332 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-04-12 13:51:18,333 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-04-12 13:51:18,335 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-04-12 13:51:18,336 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-04-12 13:51:18,336 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-04-12 13:51:18,338 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-04-12 13:51:18,338 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-04-12 13:51:18,338 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-04-12 13:51:18,339 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-04-12 13:51:18,340 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-04-12 13:51:18,341 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-04-12 13:51:18,341 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-04-12 13:51:18,341 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-04-12 13:51:18,342 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-04-12 13:51:18,342 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-04-12 13:51:18,343 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-04-12 13:51:18,343 INFO L98 SettingsManager]: Beginning loading settings from /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/cade18-smtinterpol/svcomp-DerefFreeMemtrack-32bit-Automizer_Camel.epf [2018-04-12 13:51:18,352 INFO L110 SettingsManager]: Loading preferences was successful [2018-04-12 13:51:18,352 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-04-12 13:51:18,353 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-04-12 13:51:18,353 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-04-12 13:51:18,353 INFO L133 SettingsManager]: * Use SBE=true [2018-04-12 13:51:18,353 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-04-12 13:51:18,353 INFO L133 SettingsManager]: * sizeof long=4 [2018-04-12 13:51:18,354 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-04-12 13:51:18,354 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-04-12 13:51:18,354 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-04-12 13:51:18,354 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-04-12 13:51:18,354 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-04-12 13:51:18,354 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-04-12 13:51:18,354 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-04-12 13:51:18,355 INFO L133 SettingsManager]: * sizeof long double=12 [2018-04-12 13:51:18,355 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-04-12 13:51:18,355 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-04-12 13:51:18,355 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-04-12 13:51:18,355 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-04-12 13:51:18,355 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-04-12 13:51:18,356 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-04-12 13:51:18,356 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-04-12 13:51:18,356 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-04-12 13:51:18,356 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Bitprecise bitfields -> false [2018-04-12 13:51:18,383 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-04-12 13:51:18,393 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully (re)initialized [2018-04-12 13:51:18,397 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-04-12 13:51:18,399 INFO L271 PluginConnector]: Initializing CDTParser... [2018-04-12 13:51:18,399 INFO L276 PluginConnector]: CDTParser initialized [2018-04-12 13:51:18,400 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/memsafety-ext2/optional_data_creation_test04_false-valid-memtrack.i [2018-04-12 13:51:18,772 INFO L225 CDTParser]: Created temporary CDT project at /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/data/FLAG72b2a1a28 [2018-04-12 13:51:18,908 INFO L287 CDTParser]: IsIndexed: true [2018-04-12 13:51:18,908 INFO L288 CDTParser]: Found 1 translation units. [2018-04-12 13:51:18,909 INFO L168 CDTParser]: Scanning optional_data_creation_test04_false-valid-memtrack.i [2018-04-12 13:51:18,915 INFO L210 ultiparseSymbolTable]: Include resolver: [2018-04-12 13:51:18,915 INFO L215 ultiparseSymbolTable]: [2018-04-12 13:51:18,915 INFO L218 ultiparseSymbolTable]: Function table: [2018-04-12 13:51:18,915 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append ('append') in optional_data_creation_test04_false-valid-memtrack.i [2018-04-12 13:51:18,915 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeData ('freeData') in optional_data_creation_test04_false-valid-memtrack.i [2018-04-12 13:51:18,916 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____bswap_64 ('__bswap_64') in optional_data_creation_test04_false-valid-memtrack.i [2018-04-12 13:51:18,916 INFO L221 ultiparseSymbolTable]: Function definition of null ('main') in optional_data_creation_test04_false-valid-memtrack.i [2018-04-12 13:51:18,916 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____bswap_32 ('__bswap_32') in optional_data_creation_test04_false-valid-memtrack.i [2018-04-12 13:51:18,916 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_data ('create_data') in optional_data_creation_test04_false-valid-memtrack.i [2018-04-12 13:51:18,916 INFO L227 ultiparseSymbolTable]: Global variable table: [2018-04-12 13:51:18,916 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____int8_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-12 13:51:18,916 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__register_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-12 13:51:18,916 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____uint64_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-12 13:51:18,916 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____fsword_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-12 13:51:18,916 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__pthread_once_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-12 13:51:18,916 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__off_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-12 13:51:18,916 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__pthread_attr_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-12 13:51:18,916 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____nlink_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-12 13:51:18,916 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____socklen_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-12 13:51:18,916 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____sig_atomic_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-12 13:51:18,916 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__timer_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-12 13:51:18,916 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____ssize_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-12 13:51:18,917 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__fsfilcnt_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-12 13:51:18,917 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____mode_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-12 13:51:18,917 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__nlink_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-12 13:51:18,917 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__uint in optional_data_creation_test04_false-valid-memtrack.i [2018-04-12 13:51:18,917 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__int32_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-12 13:51:18,917 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____intptr_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-12 13:51:18,917 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__pid_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-12 13:51:18,917 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____blkcnt64_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-12 13:51:18,917 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__gid_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-12 13:51:18,917 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__dev_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-12 13:51:18,917 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__u_short in optional_data_creation_test04_false-valid-memtrack.i [2018-04-12 13:51:18,917 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____uid_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-12 13:51:18,917 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__ssize_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-12 13:51:18,917 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__id_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-12 13:51:18,917 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__mode_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-12 13:51:18,918 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__fsid_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-12 13:51:18,918 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__int64_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-12 13:51:18,918 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____key_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-12 13:51:18,918 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____blkcnt_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-12 13:51:18,918 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__pthread_mutex_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-12 13:51:18,918 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____clock_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-12 13:51:18,918 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____u_int in optional_data_creation_test04_false-valid-memtrack.i [2018-04-12 13:51:18,918 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____useconds_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-12 13:51:18,918 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__time_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-12 13:51:18,918 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____u_short in optional_data_creation_test04_false-valid-memtrack.i [2018-04-12 13:51:18,918 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____loff_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-12 13:51:18,918 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__suseconds_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-12 13:51:18,919 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____syscall_slong_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-12 13:51:18,919 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____blksize_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-12 13:51:18,919 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__int8_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-12 13:51:18,919 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__daddr_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-12 13:51:18,919 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____qaddr_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-12 13:51:18,919 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____uint16_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-12 13:51:18,919 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____fsfilcnt64_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-12 13:51:18,919 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____int64_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-12 13:51:18,919 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__pthread_condattr_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-12 13:51:18,919 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__ldiv_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-12 13:51:18,919 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__ino_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-12 13:51:18,919 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__ushort in optional_data_creation_test04_false-valid-memtrack.i [2018-04-12 13:51:18,920 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____rlim64_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-12 13:51:18,920 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____time_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-12 13:51:18,920 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____uint8_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-12 13:51:18,920 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__u_quad_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-12 13:51:18,920 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__u_int64_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-12 13:51:18,920 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__loff_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-12 13:51:18,920 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____daddr_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-12 13:51:18,920 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____fsfilcnt_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-12 13:51:18,920 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__pthread_barrierattr_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-12 13:51:18,920 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__sigset_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-12 13:51:18,921 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__blkcnt_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-12 13:51:18,921 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__ulong in optional_data_creation_test04_false-valid-memtrack.i [2018-04-12 13:51:18,921 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__u_char in optional_data_creation_test04_false-valid-memtrack.i [2018-04-12 13:51:18,921 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____u_long in optional_data_creation_test04_false-valid-memtrack.i [2018-04-12 13:51:18,921 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____int16_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-12 13:51:18,921 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__u_int32_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-12 13:51:18,921 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____dev_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-12 13:51:18,921 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____fsblkcnt_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-12 13:51:18,921 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__Data in optional_data_creation_test04_false-valid-memtrack.i [2018-04-12 13:51:18,921 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____off_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-12 13:51:18,922 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__pthread_key_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-12 13:51:18,922 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__pthread_rwlock_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-12 13:51:18,922 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__clock_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-12 13:51:18,922 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____fsid_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-12 13:51:18,922 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__blksize_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-12 13:51:18,922 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__u_long in optional_data_creation_test04_false-valid-memtrack.i [2018-04-12 13:51:18,922 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____uint32_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-12 13:51:18,922 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____caddr_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-12 13:51:18,922 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__fd_set in optional_data_creation_test04_false-valid-memtrack.i [2018-04-12 13:51:18,922 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__pthread_rwlockattr_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-12 13:51:18,923 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____ino_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-12 13:51:18,923 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____ino64_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-12 13:51:18,923 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____sigset_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-12 13:51:18,923 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__quad_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-12 13:51:18,923 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__caddr_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-12 13:51:18,923 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____rlim_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-12 13:51:18,923 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__pthread_cond_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-12 13:51:18,923 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__pthread_spinlock_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-12 13:51:18,923 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__u_int in optional_data_creation_test04_false-valid-memtrack.i [2018-04-12 13:51:18,923 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__u_int16_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-12 13:51:18,923 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____int32_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-12 13:51:18,923 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__fd_mask in optional_data_creation_test04_false-valid-memtrack.i [2018-04-12 13:51:18,924 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__div_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-12 13:51:18,924 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__size_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-12 13:51:18,924 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__u_int8_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-12 13:51:18,924 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__uid_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-12 13:51:18,924 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__key_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-12 13:51:18,924 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____pthread_slist_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-12 13:51:18,924 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____clockid_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-12 13:51:18,924 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__clockid_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-12 13:51:18,924 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____fd_mask in optional_data_creation_test04_false-valid-memtrack.i [2018-04-12 13:51:18,924 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__int16_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-12 13:51:18,924 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__lldiv_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-12 13:51:18,924 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____quad_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-12 13:51:18,924 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__pthread_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-12 13:51:18,924 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____gid_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-12 13:51:18,924 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__wchar_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-12 13:51:18,925 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____u_char in optional_data_creation_test04_false-valid-memtrack.i [2018-04-12 13:51:18,925 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____u_quad_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-12 13:51:18,925 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____syscall_ulong_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-12 13:51:18,925 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____id_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-12 13:51:18,925 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__pthread_barrier_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-12 13:51:18,925 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__pthread_mutexattr_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-12 13:51:18,925 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__fsblkcnt_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-12 13:51:18,925 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____timer_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-12 13:51:18,925 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____off64_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-12 13:51:18,925 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____suseconds_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-12 13:51:18,925 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____fsblkcnt64_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-12 13:51:18,925 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____pid_t in optional_data_creation_test04_false-valid-memtrack.i [2018-04-12 13:51:18,938 INFO L330 CDTParser]: Deleted temporary CDT project at /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/data/FLAG72b2a1a28 [2018-04-12 13:51:18,941 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-04-12 13:51:18,942 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-04-12 13:51:18,942 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-04-12 13:51:18,942 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-04-12 13:51:18,946 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-04-12 13:51:18,946 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 12.04 01:51:18" (1/1) ... [2018-04-12 13:51:18,948 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@2d63f8ba and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 01:51:18, skipping insertion in model container [2018-04-12 13:51:18,948 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 12.04 01:51:18" (1/1) ... [2018-04-12 13:51:18,958 INFO L167 Dispatcher]: Using SV-COMP mode [2018-04-12 13:51:18,980 INFO L167 Dispatcher]: Using SV-COMP mode [2018-04-12 13:51:19,099 INFO L175 PostProcessor]: Settings: Checked method=main [2018-04-12 13:51:19,137 INFO L175 PostProcessor]: Settings: Checked method=main [2018-04-12 13:51:19,142 INFO L100 SccComputation]: Graph consists of 0 InCaSumBalls and 120 non ball SCCs. Number of states in SCCs 120. [2018-04-12 13:51:19,172 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 01:51:19 WrapperNode [2018-04-12 13:51:19,172 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-04-12 13:51:19,172 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-04-12 13:51:19,173 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-04-12 13:51:19,173 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-04-12 13:51:19,180 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 01:51:19" (1/1) ... [2018-04-12 13:51:19,180 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 01:51:19" (1/1) ... [2018-04-12 13:51:19,192 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 01:51:19" (1/1) ... [2018-04-12 13:51:19,192 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 01:51:19" (1/1) ... [2018-04-12 13:51:19,201 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 01:51:19" (1/1) ... [2018-04-12 13:51:19,205 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 01:51:19" (1/1) ... [2018-04-12 13:51:19,208 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 01:51:19" (1/1) ... [2018-04-12 13:51:19,212 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-04-12 13:51:19,212 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-04-12 13:51:19,212 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-04-12 13:51:19,212 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-04-12 13:51:19,213 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 01:51:19" (1/1) ... No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-04-12 13:51:19,296 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-04-12 13:51:19,296 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-04-12 13:51:19,296 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____bswap_32 [2018-04-12 13:51:19,296 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____bswap_64 [2018-04-12 13:51:19,296 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_data [2018-04-12 13:51:19,296 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeData [2018-04-12 13:51:19,296 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append [2018-04-12 13:51:19,297 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-04-12 13:51:19,297 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_error [2018-04-12 13:51:19,297 INFO L128 BoogieDeclarations]: Found specification of procedure __ctype_get_mb_cur_max [2018-04-12 13:51:19,297 INFO L128 BoogieDeclarations]: Found specification of procedure atof [2018-04-12 13:51:19,297 INFO L128 BoogieDeclarations]: Found specification of procedure atoi [2018-04-12 13:51:19,297 INFO L128 BoogieDeclarations]: Found specification of procedure atol [2018-04-12 13:51:19,297 INFO L128 BoogieDeclarations]: Found specification of procedure atoll [2018-04-12 13:51:19,297 INFO L128 BoogieDeclarations]: Found specification of procedure strtod [2018-04-12 13:51:19,297 INFO L128 BoogieDeclarations]: Found specification of procedure strtof [2018-04-12 13:51:19,297 INFO L128 BoogieDeclarations]: Found specification of procedure strtold [2018-04-12 13:51:19,297 INFO L128 BoogieDeclarations]: Found specification of procedure strtol [2018-04-12 13:51:19,297 INFO L128 BoogieDeclarations]: Found specification of procedure strtoul [2018-04-12 13:51:19,297 INFO L128 BoogieDeclarations]: Found specification of procedure strtoq [2018-04-12 13:51:19,297 INFO L128 BoogieDeclarations]: Found specification of procedure strtouq [2018-04-12 13:51:19,297 INFO L128 BoogieDeclarations]: Found specification of procedure strtoll [2018-04-12 13:51:19,297 INFO L128 BoogieDeclarations]: Found specification of procedure strtoull [2018-04-12 13:51:19,297 INFO L128 BoogieDeclarations]: Found specification of procedure l64a [2018-04-12 13:51:19,298 INFO L128 BoogieDeclarations]: Found specification of procedure a64l [2018-04-12 13:51:19,298 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____bswap_32 [2018-04-12 13:51:19,298 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____bswap_64 [2018-04-12 13:51:19,298 INFO L128 BoogieDeclarations]: Found specification of procedure select [2018-04-12 13:51:19,298 INFO L128 BoogieDeclarations]: Found specification of procedure pselect [2018-04-12 13:51:19,298 INFO L128 BoogieDeclarations]: Found specification of procedure gnu_dev_major [2018-04-12 13:51:19,298 INFO L128 BoogieDeclarations]: Found specification of procedure gnu_dev_minor [2018-04-12 13:51:19,298 INFO L128 BoogieDeclarations]: Found specification of procedure gnu_dev_makedev [2018-04-12 13:51:19,298 INFO L128 BoogieDeclarations]: Found specification of procedure random [2018-04-12 13:51:19,298 INFO L128 BoogieDeclarations]: Found specification of procedure srandom [2018-04-12 13:51:19,298 INFO L128 BoogieDeclarations]: Found specification of procedure initstate [2018-04-12 13:51:19,298 INFO L128 BoogieDeclarations]: Found specification of procedure setstate [2018-04-12 13:51:19,298 INFO L128 BoogieDeclarations]: Found specification of procedure random_r [2018-04-12 13:51:19,298 INFO L128 BoogieDeclarations]: Found specification of procedure srandom_r [2018-04-12 13:51:19,298 INFO L128 BoogieDeclarations]: Found specification of procedure initstate_r [2018-04-12 13:51:19,298 INFO L128 BoogieDeclarations]: Found specification of procedure setstate_r [2018-04-12 13:51:19,298 INFO L128 BoogieDeclarations]: Found specification of procedure rand [2018-04-12 13:51:19,299 INFO L128 BoogieDeclarations]: Found specification of procedure srand [2018-04-12 13:51:19,299 INFO L128 BoogieDeclarations]: Found specification of procedure rand_r [2018-04-12 13:51:19,299 INFO L128 BoogieDeclarations]: Found specification of procedure drand48 [2018-04-12 13:51:19,299 INFO L128 BoogieDeclarations]: Found specification of procedure erand48 [2018-04-12 13:51:19,299 INFO L128 BoogieDeclarations]: Found specification of procedure lrand48 [2018-04-12 13:51:19,299 INFO L128 BoogieDeclarations]: Found specification of procedure nrand48 [2018-04-12 13:51:19,299 INFO L128 BoogieDeclarations]: Found specification of procedure mrand48 [2018-04-12 13:51:19,299 INFO L128 BoogieDeclarations]: Found specification of procedure jrand48 [2018-04-12 13:51:19,299 INFO L128 BoogieDeclarations]: Found specification of procedure srand48 [2018-04-12 13:51:19,299 INFO L128 BoogieDeclarations]: Found specification of procedure seed48 [2018-04-12 13:51:19,299 INFO L128 BoogieDeclarations]: Found specification of procedure lcong48 [2018-04-12 13:51:19,299 INFO L128 BoogieDeclarations]: Found specification of procedure drand48_r [2018-04-12 13:51:19,299 INFO L128 BoogieDeclarations]: Found specification of procedure erand48_r [2018-04-12 13:51:19,299 INFO L128 BoogieDeclarations]: Found specification of procedure lrand48_r [2018-04-12 13:51:19,299 INFO L128 BoogieDeclarations]: Found specification of procedure nrand48_r [2018-04-12 13:51:19,299 INFO L128 BoogieDeclarations]: Found specification of procedure mrand48_r [2018-04-12 13:51:19,299 INFO L128 BoogieDeclarations]: Found specification of procedure jrand48_r [2018-04-12 13:51:19,299 INFO L128 BoogieDeclarations]: Found specification of procedure srand48_r [2018-04-12 13:51:19,299 INFO L128 BoogieDeclarations]: Found specification of procedure seed48_r [2018-04-12 13:51:19,300 INFO L128 BoogieDeclarations]: Found specification of procedure lcong48_r [2018-04-12 13:51:19,300 INFO L128 BoogieDeclarations]: Found specification of procedure malloc [2018-04-12 13:51:19,300 INFO L128 BoogieDeclarations]: Found specification of procedure calloc [2018-04-12 13:51:19,300 INFO L128 BoogieDeclarations]: Found specification of procedure realloc [2018-04-12 13:51:19,300 INFO L128 BoogieDeclarations]: Found specification of procedure free [2018-04-12 13:51:19,300 INFO L128 BoogieDeclarations]: Found specification of procedure cfree [2018-04-12 13:51:19,300 INFO L128 BoogieDeclarations]: Found specification of procedure alloca [2018-04-12 13:51:19,300 INFO L128 BoogieDeclarations]: Found specification of procedure valloc [2018-04-12 13:51:19,300 INFO L128 BoogieDeclarations]: Found specification of procedure posix_memalign [2018-04-12 13:51:19,300 INFO L128 BoogieDeclarations]: Found specification of procedure aligned_alloc [2018-04-12 13:51:19,300 INFO L128 BoogieDeclarations]: Found specification of procedure abort [2018-04-12 13:51:19,300 INFO L128 BoogieDeclarations]: Found specification of procedure atexit [2018-04-12 13:51:19,300 INFO L128 BoogieDeclarations]: Found specification of procedure at_quick_exit [2018-04-12 13:51:19,300 INFO L128 BoogieDeclarations]: Found specification of procedure on_exit [2018-04-12 13:51:19,300 INFO L128 BoogieDeclarations]: Found specification of procedure exit [2018-04-12 13:51:19,300 INFO L128 BoogieDeclarations]: Found specification of procedure quick_exit [2018-04-12 13:51:19,300 INFO L128 BoogieDeclarations]: Found specification of procedure _Exit [2018-04-12 13:51:19,300 INFO L128 BoogieDeclarations]: Found specification of procedure getenv [2018-04-12 13:51:19,300 INFO L128 BoogieDeclarations]: Found specification of procedure putenv [2018-04-12 13:51:19,300 INFO L128 BoogieDeclarations]: Found specification of procedure setenv [2018-04-12 13:51:19,301 INFO L128 BoogieDeclarations]: Found specification of procedure unsetenv [2018-04-12 13:51:19,301 INFO L128 BoogieDeclarations]: Found specification of procedure clearenv [2018-04-12 13:51:19,301 INFO L128 BoogieDeclarations]: Found specification of procedure mktemp [2018-04-12 13:51:19,301 INFO L128 BoogieDeclarations]: Found specification of procedure mkstemp [2018-04-12 13:51:19,301 INFO L128 BoogieDeclarations]: Found specification of procedure mkstemps [2018-04-12 13:51:19,301 INFO L128 BoogieDeclarations]: Found specification of procedure mkdtemp [2018-04-12 13:51:19,301 INFO L128 BoogieDeclarations]: Found specification of procedure system [2018-04-12 13:51:19,301 INFO L128 BoogieDeclarations]: Found specification of procedure realpath [2018-04-12 13:51:19,301 INFO L128 BoogieDeclarations]: Found specification of procedure bsearch [2018-04-12 13:51:19,301 INFO L128 BoogieDeclarations]: Found specification of procedure qsort [2018-04-12 13:51:19,301 INFO L128 BoogieDeclarations]: Found specification of procedure abs [2018-04-12 13:51:19,301 INFO L128 BoogieDeclarations]: Found specification of procedure labs [2018-04-12 13:51:19,301 INFO L128 BoogieDeclarations]: Found specification of procedure llabs [2018-04-12 13:51:19,301 INFO L128 BoogieDeclarations]: Found specification of procedure div [2018-04-12 13:51:19,301 INFO L128 BoogieDeclarations]: Found specification of procedure ldiv [2018-04-12 13:51:19,301 INFO L128 BoogieDeclarations]: Found specification of procedure lldiv [2018-04-12 13:51:19,301 INFO L128 BoogieDeclarations]: Found specification of procedure ecvt [2018-04-12 13:51:19,301 INFO L128 BoogieDeclarations]: Found specification of procedure fcvt [2018-04-12 13:51:19,301 INFO L128 BoogieDeclarations]: Found specification of procedure gcvt [2018-04-12 13:51:19,302 INFO L128 BoogieDeclarations]: Found specification of procedure qecvt [2018-04-12 13:51:19,302 INFO L128 BoogieDeclarations]: Found specification of procedure qfcvt [2018-04-12 13:51:19,302 INFO L128 BoogieDeclarations]: Found specification of procedure qgcvt [2018-04-12 13:51:19,302 INFO L128 BoogieDeclarations]: Found specification of procedure ecvt_r [2018-04-12 13:51:19,302 INFO L128 BoogieDeclarations]: Found specification of procedure fcvt_r [2018-04-12 13:51:19,302 INFO L128 BoogieDeclarations]: Found specification of procedure qecvt_r [2018-04-12 13:51:19,302 INFO L128 BoogieDeclarations]: Found specification of procedure qfcvt_r [2018-04-12 13:51:19,302 INFO L128 BoogieDeclarations]: Found specification of procedure mblen [2018-04-12 13:51:19,302 INFO L128 BoogieDeclarations]: Found specification of procedure mbtowc [2018-04-12 13:51:19,302 INFO L128 BoogieDeclarations]: Found specification of procedure wctomb [2018-04-12 13:51:19,302 INFO L128 BoogieDeclarations]: Found specification of procedure mbstowcs [2018-04-12 13:51:19,302 INFO L128 BoogieDeclarations]: Found specification of procedure wcstombs [2018-04-12 13:51:19,302 INFO L128 BoogieDeclarations]: Found specification of procedure rpmatch [2018-04-12 13:51:19,302 INFO L128 BoogieDeclarations]: Found specification of procedure getsubopt [2018-04-12 13:51:19,302 INFO L128 BoogieDeclarations]: Found specification of procedure getloadavg [2018-04-12 13:51:19,302 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2018-04-12 13:51:19,302 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_data [2018-04-12 13:51:19,302 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-04-12 13:51:19,302 INFO L128 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2018-04-12 13:51:19,303 INFO L128 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2018-04-12 13:51:19,303 INFO L128 BoogieDeclarations]: Found specification of procedure write~int [2018-04-12 13:51:19,303 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeData [2018-04-12 13:51:19,303 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-04-12 13:51:19,303 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append [2018-04-12 13:51:19,303 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-04-12 13:51:19,303 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-04-12 13:51:19,303 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-04-12 13:51:19,303 INFO L128 BoogieDeclarations]: Found specification of procedure write~unchecked~int [2018-04-12 13:51:19,303 INFO L128 BoogieDeclarations]: Found specification of procedure read~int [2018-04-12 13:51:19,676 INFO L259 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-04-12 13:51:19,677 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 12.04 01:51:19 BoogieIcfgContainer [2018-04-12 13:51:19,677 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-04-12 13:51:19,678 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-04-12 13:51:19,678 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-04-12 13:51:19,680 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-04-12 13:51:19,680 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 12.04 01:51:18" (1/3) ... [2018-04-12 13:51:19,680 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2e901638 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 12.04 01:51:19, skipping insertion in model container [2018-04-12 13:51:19,681 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 01:51:19" (2/3) ... [2018-04-12 13:51:19,681 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2e901638 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 12.04 01:51:19, skipping insertion in model container [2018-04-12 13:51:19,681 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 12.04 01:51:19" (3/3) ... [2018-04-12 13:51:19,682 INFO L107 eAbstractionObserver]: Analyzing ICFG optional_data_creation_test04_false-valid-memtrack.i [2018-04-12 13:51:19,687 INFO L131 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-04-12 13:51:19,695 INFO L143 ceAbstractionStarter]: Appying trace abstraction to program that has 45 error locations. [2018-04-12 13:51:19,719 INFO L128 ementStrategyFactory]: Using default assertion order modulation [2018-04-12 13:51:19,720 INFO L369 AbstractCegarLoop]: Interprodecural is true [2018-04-12 13:51:19,720 INFO L370 AbstractCegarLoop]: Hoare is false [2018-04-12 13:51:19,720 INFO L371 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-04-12 13:51:19,720 INFO L372 AbstractCegarLoop]: Backedges is TWOTRACK [2018-04-12 13:51:19,720 INFO L373 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-04-12 13:51:19,720 INFO L374 AbstractCegarLoop]: Difference is false [2018-04-12 13:51:19,720 INFO L375 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-04-12 13:51:19,720 INFO L380 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-04-12 13:51:19,720 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-04-12 13:51:19,731 INFO L276 IsEmpty]: Start isEmpty. Operand 127 states. [2018-04-12 13:51:19,738 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 8 [2018-04-12 13:51:19,738 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 13:51:19,739 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1] [2018-04-12 13:51:19,739 INFO L408 AbstractCegarLoop]: === Iteration 1 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-04-12 13:51:19,742 INFO L82 PathProgramCache]: Analyzing trace with hash -1118692906, now seen corresponding path program 1 times [2018-04-12 13:51:19,744 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 13:51:19,744 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 13:51:19,774 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 13:51:19,775 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 13:51:19,775 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 13:51:19,797 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 13:51:19,802 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 13:51:19,831 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 13:51:19,833 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 13:51:19,833 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-04-12 13:51:19,834 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-04-12 13:51:19,841 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-04-12 13:51:19,842 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-04-12 13:51:19,843 INFO L87 Difference]: Start difference. First operand 127 states. Second operand 3 states. [2018-04-12 13:51:19,944 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 13:51:19,944 INFO L93 Difference]: Finished difference Result 129 states and 136 transitions. [2018-04-12 13:51:19,945 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-04-12 13:51:19,945 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 7 [2018-04-12 13:51:19,945 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 13:51:19,954 INFO L225 Difference]: With dead ends: 129 [2018-04-12 13:51:19,954 INFO L226 Difference]: Without dead ends: 126 [2018-04-12 13:51:19,956 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-04-12 13:51:19,967 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 126 states. [2018-04-12 13:51:19,983 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 126 to 123. [2018-04-12 13:51:19,984 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 123 states. [2018-04-12 13:51:19,986 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 123 states to 123 states and 130 transitions. [2018-04-12 13:51:19,987 INFO L78 Accepts]: Start accepts. Automaton has 123 states and 130 transitions. Word has length 7 [2018-04-12 13:51:19,988 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 13:51:19,988 INFO L459 AbstractCegarLoop]: Abstraction has 123 states and 130 transitions. [2018-04-12 13:51:19,988 INFO L460 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-04-12 13:51:19,988 INFO L276 IsEmpty]: Start isEmpty. Operand 123 states and 130 transitions. [2018-04-12 13:51:19,988 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 8 [2018-04-12 13:51:19,988 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 13:51:19,988 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1] [2018-04-12 13:51:19,988 INFO L408 AbstractCegarLoop]: === Iteration 2 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-04-12 13:51:19,989 INFO L82 PathProgramCache]: Analyzing trace with hash -1118692905, now seen corresponding path program 1 times [2018-04-12 13:51:19,989 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 13:51:19,989 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 13:51:19,989 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 13:51:19,990 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 13:51:19,990 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 13:51:20,001 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 13:51:20,002 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 13:51:20,023 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 13:51:20,023 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 13:51:20,023 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-04-12 13:51:20,024 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-04-12 13:51:20,025 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-04-12 13:51:20,025 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-04-12 13:51:20,025 INFO L87 Difference]: Start difference. First operand 123 states and 130 transitions. Second operand 3 states. [2018-04-12 13:51:20,089 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 13:51:20,089 INFO L93 Difference]: Finished difference Result 124 states and 132 transitions. [2018-04-12 13:51:20,089 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-04-12 13:51:20,089 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 7 [2018-04-12 13:51:20,089 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 13:51:20,090 INFO L225 Difference]: With dead ends: 124 [2018-04-12 13:51:20,090 INFO L226 Difference]: Without dead ends: 124 [2018-04-12 13:51:20,091 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-04-12 13:51:20,091 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 124 states. [2018-04-12 13:51:20,096 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 124 to 122. [2018-04-12 13:51:20,096 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 122 states. [2018-04-12 13:51:20,098 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 122 states to 122 states and 129 transitions. [2018-04-12 13:51:20,098 INFO L78 Accepts]: Start accepts. Automaton has 122 states and 129 transitions. Word has length 7 [2018-04-12 13:51:20,098 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 13:51:20,098 INFO L459 AbstractCegarLoop]: Abstraction has 122 states and 129 transitions. [2018-04-12 13:51:20,098 INFO L460 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-04-12 13:51:20,099 INFO L276 IsEmpty]: Start isEmpty. Operand 122 states and 129 transitions. [2018-04-12 13:51:20,099 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2018-04-12 13:51:20,099 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 13:51:20,099 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 13:51:20,099 INFO L408 AbstractCegarLoop]: === Iteration 3 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-04-12 13:51:20,099 INFO L82 PathProgramCache]: Analyzing trace with hash 1889111161, now seen corresponding path program 1 times [2018-04-12 13:51:20,100 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 13:51:20,100 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 13:51:20,101 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 13:51:20,101 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 13:51:20,101 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 13:51:20,115 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 13:51:20,116 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 13:51:20,148 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 13:51:20,148 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 13:51:20,149 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-04-12 13:51:20,149 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-04-12 13:51:20,149 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-04-12 13:51:20,149 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-04-12 13:51:20,149 INFO L87 Difference]: Start difference. First operand 122 states and 129 transitions. Second operand 5 states. [2018-04-12 13:51:20,308 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 13:51:20,308 INFO L93 Difference]: Finished difference Result 135 states and 143 transitions. [2018-04-12 13:51:20,309 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-04-12 13:51:20,309 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 14 [2018-04-12 13:51:20,309 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 13:51:20,310 INFO L225 Difference]: With dead ends: 135 [2018-04-12 13:51:20,310 INFO L226 Difference]: Without dead ends: 135 [2018-04-12 13:51:20,310 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-04-12 13:51:20,310 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 135 states. [2018-04-12 13:51:20,314 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 135 to 128. [2018-04-12 13:51:20,314 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 128 states. [2018-04-12 13:51:20,315 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 128 states to 128 states and 137 transitions. [2018-04-12 13:51:20,315 INFO L78 Accepts]: Start accepts. Automaton has 128 states and 137 transitions. Word has length 14 [2018-04-12 13:51:20,315 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 13:51:20,315 INFO L459 AbstractCegarLoop]: Abstraction has 128 states and 137 transitions. [2018-04-12 13:51:20,315 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-04-12 13:51:20,315 INFO L276 IsEmpty]: Start isEmpty. Operand 128 states and 137 transitions. [2018-04-12 13:51:20,316 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2018-04-12 13:51:20,316 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 13:51:20,316 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 13:51:20,316 INFO L408 AbstractCegarLoop]: === Iteration 4 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-04-12 13:51:20,316 INFO L82 PathProgramCache]: Analyzing trace with hash 1889111162, now seen corresponding path program 1 times [2018-04-12 13:51:20,316 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 13:51:20,316 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 13:51:20,317 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 13:51:20,317 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 13:51:20,317 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 13:51:20,327 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 13:51:20,328 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 13:51:20,379 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 13:51:20,379 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 13:51:20,379 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-04-12 13:51:20,380 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-04-12 13:51:20,380 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-04-12 13:51:20,380 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-04-12 13:51:20,380 INFO L87 Difference]: Start difference. First operand 128 states and 137 transitions. Second operand 7 states. [2018-04-12 13:51:20,537 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 13:51:20,537 INFO L93 Difference]: Finished difference Result 133 states and 142 transitions. [2018-04-12 13:51:20,537 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-04-12 13:51:20,537 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 14 [2018-04-12 13:51:20,537 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 13:51:20,538 INFO L225 Difference]: With dead ends: 133 [2018-04-12 13:51:20,538 INFO L226 Difference]: Without dead ends: 133 [2018-04-12 13:51:20,539 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=38, Unknown=0, NotChecked=0, Total=56 [2018-04-12 13:51:20,539 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 133 states. [2018-04-12 13:51:20,544 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 133 to 128. [2018-04-12 13:51:20,544 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 128 states. [2018-04-12 13:51:20,545 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 128 states to 128 states and 136 transitions. [2018-04-12 13:51:20,546 INFO L78 Accepts]: Start accepts. Automaton has 128 states and 136 transitions. Word has length 14 [2018-04-12 13:51:20,546 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 13:51:20,546 INFO L459 AbstractCegarLoop]: Abstraction has 128 states and 136 transitions. [2018-04-12 13:51:20,546 INFO L460 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-04-12 13:51:20,546 INFO L276 IsEmpty]: Start isEmpty. Operand 128 states and 136 transitions. [2018-04-12 13:51:20,546 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2018-04-12 13:51:20,546 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 13:51:20,547 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 13:51:20,547 INFO L408 AbstractCegarLoop]: === Iteration 5 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-04-12 13:51:20,547 INFO L82 PathProgramCache]: Analyzing trace with hash -1567096148, now seen corresponding path program 1 times [2018-04-12 13:51:20,547 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 13:51:20,547 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 13:51:20,548 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 13:51:20,548 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 13:51:20,548 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 13:51:20,556 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 13:51:20,557 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 13:51:20,573 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 13:51:20,573 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 13:51:20,573 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-04-12 13:51:20,573 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-04-12 13:51:20,573 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-04-12 13:51:20,574 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-04-12 13:51:20,574 INFO L87 Difference]: Start difference. First operand 128 states and 136 transitions. Second operand 4 states. [2018-04-12 13:51:20,649 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 13:51:20,649 INFO L93 Difference]: Finished difference Result 127 states and 135 transitions. [2018-04-12 13:51:20,649 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-04-12 13:51:20,649 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 15 [2018-04-12 13:51:20,649 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 13:51:20,650 INFO L225 Difference]: With dead ends: 127 [2018-04-12 13:51:20,650 INFO L226 Difference]: Without dead ends: 127 [2018-04-12 13:51:20,650 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-04-12 13:51:20,650 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 127 states. [2018-04-12 13:51:20,654 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 127 to 127. [2018-04-12 13:51:20,654 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 127 states. [2018-04-12 13:51:20,655 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 127 states to 127 states and 135 transitions. [2018-04-12 13:51:20,655 INFO L78 Accepts]: Start accepts. Automaton has 127 states and 135 transitions. Word has length 15 [2018-04-12 13:51:20,655 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 13:51:20,655 INFO L459 AbstractCegarLoop]: Abstraction has 127 states and 135 transitions. [2018-04-12 13:51:20,655 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-04-12 13:51:20,655 INFO L276 IsEmpty]: Start isEmpty. Operand 127 states and 135 transitions. [2018-04-12 13:51:20,656 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2018-04-12 13:51:20,656 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 13:51:20,656 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 13:51:20,656 INFO L408 AbstractCegarLoop]: === Iteration 6 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-04-12 13:51:20,656 INFO L82 PathProgramCache]: Analyzing trace with hash -1567096147, now seen corresponding path program 1 times [2018-04-12 13:51:20,656 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 13:51:20,656 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 13:51:20,657 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 13:51:20,657 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 13:51:20,657 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 13:51:20,666 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 13:51:20,667 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 13:51:20,691 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 13:51:20,691 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 13:51:20,691 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-04-12 13:51:20,691 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-04-12 13:51:20,691 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-04-12 13:51:20,691 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-04-12 13:51:20,692 INFO L87 Difference]: Start difference. First operand 127 states and 135 transitions. Second operand 4 states. [2018-04-12 13:51:20,742 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 13:51:20,743 INFO L93 Difference]: Finished difference Result 126 states and 134 transitions. [2018-04-12 13:51:20,743 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-04-12 13:51:20,743 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 15 [2018-04-12 13:51:20,743 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 13:51:20,743 INFO L225 Difference]: With dead ends: 126 [2018-04-12 13:51:20,743 INFO L226 Difference]: Without dead ends: 126 [2018-04-12 13:51:20,744 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-04-12 13:51:20,744 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 126 states. [2018-04-12 13:51:20,746 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 126 to 126. [2018-04-12 13:51:20,746 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 126 states. [2018-04-12 13:51:20,747 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 126 states to 126 states and 134 transitions. [2018-04-12 13:51:20,747 INFO L78 Accepts]: Start accepts. Automaton has 126 states and 134 transitions. Word has length 15 [2018-04-12 13:51:20,747 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 13:51:20,747 INFO L459 AbstractCegarLoop]: Abstraction has 126 states and 134 transitions. [2018-04-12 13:51:20,747 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-04-12 13:51:20,747 INFO L276 IsEmpty]: Start isEmpty. Operand 126 states and 134 transitions. [2018-04-12 13:51:20,747 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2018-04-12 13:51:20,747 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 13:51:20,747 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 13:51:20,747 INFO L408 AbstractCegarLoop]: === Iteration 7 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-04-12 13:51:20,748 INFO L82 PathProgramCache]: Analyzing trace with hash -262877075, now seen corresponding path program 1 times [2018-04-12 13:51:20,748 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 13:51:20,748 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 13:51:20,748 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 13:51:20,748 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 13:51:20,748 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 13:51:20,757 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 13:51:20,758 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 13:51:20,776 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 13:51:20,776 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 13:51:20,776 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-04-12 13:51:20,777 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-04-12 13:51:20,777 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-04-12 13:51:20,777 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-04-12 13:51:20,777 INFO L87 Difference]: Start difference. First operand 126 states and 134 transitions. Second operand 5 states. [2018-04-12 13:51:20,872 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 13:51:20,872 INFO L93 Difference]: Finished difference Result 143 states and 152 transitions. [2018-04-12 13:51:20,873 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-04-12 13:51:20,873 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2018-04-12 13:51:20,873 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 13:51:20,874 INFO L225 Difference]: With dead ends: 143 [2018-04-12 13:51:20,874 INFO L226 Difference]: Without dead ends: 143 [2018-04-12 13:51:20,874 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-04-12 13:51:20,874 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 143 states. [2018-04-12 13:51:20,877 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 143 to 129. [2018-04-12 13:51:20,877 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 129 states. [2018-04-12 13:51:20,878 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 129 states to 129 states and 138 transitions. [2018-04-12 13:51:20,879 INFO L78 Accepts]: Start accepts. Automaton has 129 states and 138 transitions. Word has length 22 [2018-04-12 13:51:20,879 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 13:51:20,879 INFO L459 AbstractCegarLoop]: Abstraction has 129 states and 138 transitions. [2018-04-12 13:51:20,879 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-04-12 13:51:20,879 INFO L276 IsEmpty]: Start isEmpty. Operand 129 states and 138 transitions. [2018-04-12 13:51:20,879 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2018-04-12 13:51:20,879 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 13:51:20,880 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 13:51:20,880 INFO L408 AbstractCegarLoop]: === Iteration 8 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-04-12 13:51:20,880 INFO L82 PathProgramCache]: Analyzing trace with hash -262877074, now seen corresponding path program 1 times [2018-04-12 13:51:20,880 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 13:51:20,880 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 13:51:20,881 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 13:51:20,881 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 13:51:20,881 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 13:51:20,889 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 13:51:20,890 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 13:51:20,915 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 13:51:20,915 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 13:51:20,915 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-04-12 13:51:20,916 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-04-12 13:51:20,916 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-04-12 13:51:20,916 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-04-12 13:51:20,916 INFO L87 Difference]: Start difference. First operand 129 states and 138 transitions. Second operand 5 states. [2018-04-12 13:51:21,004 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 13:51:21,005 INFO L93 Difference]: Finished difference Result 135 states and 144 transitions. [2018-04-12 13:51:21,005 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-04-12 13:51:21,005 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2018-04-12 13:51:21,005 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 13:51:21,006 INFO L225 Difference]: With dead ends: 135 [2018-04-12 13:51:21,006 INFO L226 Difference]: Without dead ends: 135 [2018-04-12 13:51:21,006 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-04-12 13:51:21,007 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 135 states. [2018-04-12 13:51:21,009 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 135 to 129. [2018-04-12 13:51:21,009 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 129 states. [2018-04-12 13:51:21,010 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 129 states to 129 states and 137 transitions. [2018-04-12 13:51:21,010 INFO L78 Accepts]: Start accepts. Automaton has 129 states and 137 transitions. Word has length 22 [2018-04-12 13:51:21,010 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 13:51:21,010 INFO L459 AbstractCegarLoop]: Abstraction has 129 states and 137 transitions. [2018-04-12 13:51:21,010 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-04-12 13:51:21,011 INFO L276 IsEmpty]: Start isEmpty. Operand 129 states and 137 transitions. [2018-04-12 13:51:21,011 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2018-04-12 13:51:21,011 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 13:51:21,011 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 13:51:21,011 INFO L408 AbstractCegarLoop]: === Iteration 9 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-04-12 13:51:21,011 INFO L82 PathProgramCache]: Analyzing trace with hash 440344442, now seen corresponding path program 1 times [2018-04-12 13:51:21,012 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 13:51:21,012 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 13:51:21,012 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 13:51:21,012 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 13:51:21,013 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 13:51:21,021 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 13:51:21,022 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 13:51:21,048 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 13:51:21,048 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 13:51:21,048 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-04-12 13:51:21,048 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-04-12 13:51:21,048 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-04-12 13:51:21,049 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-04-12 13:51:21,049 INFO L87 Difference]: Start difference. First operand 129 states and 137 transitions. Second operand 4 states. [2018-04-12 13:51:21,125 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 13:51:21,125 INFO L93 Difference]: Finished difference Result 134 states and 142 transitions. [2018-04-12 13:51:21,125 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-04-12 13:51:21,125 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 23 [2018-04-12 13:51:21,126 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 13:51:21,126 INFO L225 Difference]: With dead ends: 134 [2018-04-12 13:51:21,126 INFO L226 Difference]: Without dead ends: 134 [2018-04-12 13:51:21,127 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-04-12 13:51:21,127 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 134 states. [2018-04-12 13:51:21,129 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 134 to 130. [2018-04-12 13:51:21,129 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 130 states. [2018-04-12 13:51:21,129 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 130 states to 130 states and 139 transitions. [2018-04-12 13:51:21,130 INFO L78 Accepts]: Start accepts. Automaton has 130 states and 139 transitions. Word has length 23 [2018-04-12 13:51:21,130 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 13:51:21,130 INFO L459 AbstractCegarLoop]: Abstraction has 130 states and 139 transitions. [2018-04-12 13:51:21,130 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-04-12 13:51:21,130 INFO L276 IsEmpty]: Start isEmpty. Operand 130 states and 139 transitions. [2018-04-12 13:51:21,130 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2018-04-12 13:51:21,131 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 13:51:21,131 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 13:51:21,131 INFO L408 AbstractCegarLoop]: === Iteration 10 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-04-12 13:51:21,131 INFO L82 PathProgramCache]: Analyzing trace with hash 440344441, now seen corresponding path program 1 times [2018-04-12 13:51:21,131 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 13:51:21,131 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 13:51:21,132 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 13:51:21,132 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 13:51:21,132 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 13:51:21,139 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 13:51:21,140 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 13:51:21,154 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 13:51:21,154 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 13:51:21,154 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-04-12 13:51:21,154 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-04-12 13:51:21,155 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-04-12 13:51:21,155 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-04-12 13:51:21,155 INFO L87 Difference]: Start difference. First operand 130 states and 139 transitions. Second operand 4 states. [2018-04-12 13:51:21,206 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 13:51:21,206 INFO L93 Difference]: Finished difference Result 126 states and 134 transitions. [2018-04-12 13:51:21,206 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-04-12 13:51:21,206 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 23 [2018-04-12 13:51:21,207 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 13:51:21,207 INFO L225 Difference]: With dead ends: 126 [2018-04-12 13:51:21,207 INFO L226 Difference]: Without dead ends: 126 [2018-04-12 13:51:21,207 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-04-12 13:51:21,208 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 126 states. [2018-04-12 13:51:21,210 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 126 to 126. [2018-04-12 13:51:21,210 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 126 states. [2018-04-12 13:51:21,210 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 126 states to 126 states and 134 transitions. [2018-04-12 13:51:21,211 INFO L78 Accepts]: Start accepts. Automaton has 126 states and 134 transitions. Word has length 23 [2018-04-12 13:51:21,211 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 13:51:21,211 INFO L459 AbstractCegarLoop]: Abstraction has 126 states and 134 transitions. [2018-04-12 13:51:21,211 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-04-12 13:51:21,211 INFO L276 IsEmpty]: Start isEmpty. Operand 126 states and 134 transitions. [2018-04-12 13:51:21,211 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2018-04-12 13:51:21,211 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 13:51:21,212 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 13:51:21,212 INFO L408 AbstractCegarLoop]: === Iteration 11 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-04-12 13:51:21,212 INFO L82 PathProgramCache]: Analyzing trace with hash 778201806, now seen corresponding path program 1 times [2018-04-12 13:51:21,212 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 13:51:21,212 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 13:51:21,212 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 13:51:21,212 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 13:51:21,212 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 13:51:21,219 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 13:51:21,220 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 13:51:21,242 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 13:51:21,242 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 13:51:21,243 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-04-12 13:51:21,243 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-04-12 13:51:21,243 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-04-12 13:51:21,243 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-04-12 13:51:21,243 INFO L87 Difference]: Start difference. First operand 126 states and 134 transitions. Second operand 4 states. [2018-04-12 13:51:21,323 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 13:51:21,323 INFO L93 Difference]: Finished difference Result 136 states and 144 transitions. [2018-04-12 13:51:21,323 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-04-12 13:51:21,323 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 24 [2018-04-12 13:51:21,324 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 13:51:21,324 INFO L225 Difference]: With dead ends: 136 [2018-04-12 13:51:21,324 INFO L226 Difference]: Without dead ends: 136 [2018-04-12 13:51:21,324 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-04-12 13:51:21,324 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 136 states. [2018-04-12 13:51:21,326 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 136 to 128. [2018-04-12 13:51:21,326 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 128 states. [2018-04-12 13:51:21,327 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 128 states to 128 states and 137 transitions. [2018-04-12 13:51:21,327 INFO L78 Accepts]: Start accepts. Automaton has 128 states and 137 transitions. Word has length 24 [2018-04-12 13:51:21,327 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 13:51:21,327 INFO L459 AbstractCegarLoop]: Abstraction has 128 states and 137 transitions. [2018-04-12 13:51:21,327 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-04-12 13:51:21,327 INFO L276 IsEmpty]: Start isEmpty. Operand 128 states and 137 transitions. [2018-04-12 13:51:21,328 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2018-04-12 13:51:21,328 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 13:51:21,328 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 13:51:21,328 INFO L408 AbstractCegarLoop]: === Iteration 12 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-04-12 13:51:21,329 INFO L82 PathProgramCache]: Analyzing trace with hash 778201807, now seen corresponding path program 1 times [2018-04-12 13:51:21,329 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 13:51:21,329 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 13:51:21,329 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 13:51:21,329 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 13:51:21,329 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 13:51:21,336 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 13:51:21,337 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 13:51:21,395 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 13:51:21,395 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 13:51:21,395 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-04-12 13:51:21,395 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-04-12 13:51:21,395 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-04-12 13:51:21,396 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-04-12 13:51:21,396 INFO L87 Difference]: Start difference. First operand 128 states and 137 transitions. Second operand 7 states. [2018-04-12 13:51:21,573 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 13:51:21,573 INFO L93 Difference]: Finished difference Result 128 states and 136 transitions. [2018-04-12 13:51:21,574 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-04-12 13:51:21,574 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 24 [2018-04-12 13:51:21,574 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 13:51:21,575 INFO L225 Difference]: With dead ends: 128 [2018-04-12 13:51:21,575 INFO L226 Difference]: Without dead ends: 128 [2018-04-12 13:51:21,575 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=32, Invalid=78, Unknown=0, NotChecked=0, Total=110 [2018-04-12 13:51:21,576 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 128 states. [2018-04-12 13:51:21,578 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 128 to 128. [2018-04-12 13:51:21,578 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 128 states. [2018-04-12 13:51:21,578 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 128 states to 128 states and 136 transitions. [2018-04-12 13:51:21,579 INFO L78 Accepts]: Start accepts. Automaton has 128 states and 136 transitions. Word has length 24 [2018-04-12 13:51:21,579 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 13:51:21,579 INFO L459 AbstractCegarLoop]: Abstraction has 128 states and 136 transitions. [2018-04-12 13:51:21,579 INFO L460 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-04-12 13:51:21,579 INFO L276 IsEmpty]: Start isEmpty. Operand 128 states and 136 transitions. [2018-04-12 13:51:21,579 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2018-04-12 13:51:21,580 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 13:51:21,580 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 13:51:21,580 INFO L408 AbstractCegarLoop]: === Iteration 13 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-04-12 13:51:21,580 INFO L82 PathProgramCache]: Analyzing trace with hash 765747116, now seen corresponding path program 1 times [2018-04-12 13:51:21,580 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 13:51:21,580 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 13:51:21,581 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 13:51:21,581 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 13:51:21,581 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 13:51:21,589 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 13:51:21,590 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 13:51:21,624 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 13:51:21,624 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 13:51:21,624 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-04-12 13:51:21,624 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-04-12 13:51:21,624 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-04-12 13:51:21,624 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2018-04-12 13:51:21,625 INFO L87 Difference]: Start difference. First operand 128 states and 136 transitions. Second operand 5 states. [2018-04-12 13:51:21,718 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 13:51:21,718 INFO L93 Difference]: Finished difference Result 125 states and 133 transitions. [2018-04-12 13:51:21,718 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-04-12 13:51:21,718 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 24 [2018-04-12 13:51:21,719 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 13:51:21,719 INFO L225 Difference]: With dead ends: 125 [2018-04-12 13:51:21,719 INFO L226 Difference]: Without dead ends: 125 [2018-04-12 13:51:21,720 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2018-04-12 13:51:21,720 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 125 states. [2018-04-12 13:51:21,722 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 125 to 123. [2018-04-12 13:51:21,722 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 123 states. [2018-04-12 13:51:21,723 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 123 states to 123 states and 131 transitions. [2018-04-12 13:51:21,723 INFO L78 Accepts]: Start accepts. Automaton has 123 states and 131 transitions. Word has length 24 [2018-04-12 13:51:21,723 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 13:51:21,723 INFO L459 AbstractCegarLoop]: Abstraction has 123 states and 131 transitions. [2018-04-12 13:51:21,723 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-04-12 13:51:21,723 INFO L276 IsEmpty]: Start isEmpty. Operand 123 states and 131 transitions. [2018-04-12 13:51:21,724 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-04-12 13:51:21,724 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 13:51:21,724 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 13:51:21,724 INFO L408 AbstractCegarLoop]: === Iteration 14 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-04-12 13:51:21,724 INFO L82 PathProgramCache]: Analyzing trace with hash -103829771, now seen corresponding path program 1 times [2018-04-12 13:51:21,725 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 13:51:21,725 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 13:51:21,725 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 13:51:21,725 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 13:51:21,725 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 13:51:21,733 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 13:51:21,734 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 13:51:21,797 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 13:51:21,798 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 13:51:21,798 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-04-12 13:51:21,798 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-04-12 13:51:21,798 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-04-12 13:51:21,798 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=38, Unknown=0, NotChecked=0, Total=56 [2018-04-12 13:51:21,798 INFO L87 Difference]: Start difference. First operand 123 states and 131 transitions. Second operand 8 states. [2018-04-12 13:51:22,070 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 13:51:22,071 INFO L93 Difference]: Finished difference Result 139 states and 148 transitions. [2018-04-12 13:51:22,071 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-04-12 13:51:22,071 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 29 [2018-04-12 13:51:22,071 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 13:51:22,072 INFO L225 Difference]: With dead ends: 139 [2018-04-12 13:51:22,072 INFO L226 Difference]: Without dead ends: 139 [2018-04-12 13:51:22,072 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=42, Invalid=90, Unknown=0, NotChecked=0, Total=132 [2018-04-12 13:51:22,073 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 139 states. [2018-04-12 13:51:22,075 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 139 to 129. [2018-04-12 13:51:22,075 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 129 states. [2018-04-12 13:51:22,076 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 129 states to 129 states and 138 transitions. [2018-04-12 13:51:22,076 INFO L78 Accepts]: Start accepts. Automaton has 129 states and 138 transitions. Word has length 29 [2018-04-12 13:51:22,076 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 13:51:22,076 INFO L459 AbstractCegarLoop]: Abstraction has 129 states and 138 transitions. [2018-04-12 13:51:22,076 INFO L460 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-04-12 13:51:22,076 INFO L276 IsEmpty]: Start isEmpty. Operand 129 states and 138 transitions. [2018-04-12 13:51:22,077 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-04-12 13:51:22,077 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 13:51:22,077 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 13:51:22,077 INFO L408 AbstractCegarLoop]: === Iteration 15 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-04-12 13:51:22,077 INFO L82 PathProgramCache]: Analyzing trace with hash -103829770, now seen corresponding path program 1 times [2018-04-12 13:51:22,077 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 13:51:22,077 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 13:51:22,078 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 13:51:22,078 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 13:51:22,078 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 13:51:22,086 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 13:51:22,086 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 13:51:22,137 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 13:51:22,137 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 13:51:22,137 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-04-12 13:51:22,138 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-04-12 13:51:22,138 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-04-12 13:51:22,138 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-04-12 13:51:22,138 INFO L87 Difference]: Start difference. First operand 129 states and 138 transitions. Second operand 7 states. [2018-04-12 13:51:22,382 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 13:51:22,382 INFO L93 Difference]: Finished difference Result 137 states and 147 transitions. [2018-04-12 13:51:22,383 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-04-12 13:51:22,383 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 29 [2018-04-12 13:51:22,383 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 13:51:22,384 INFO L225 Difference]: With dead ends: 137 [2018-04-12 13:51:22,384 INFO L226 Difference]: Without dead ends: 137 [2018-04-12 13:51:22,384 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=28, Invalid=62, Unknown=0, NotChecked=0, Total=90 [2018-04-12 13:51:22,384 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 137 states. [2018-04-12 13:51:22,387 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 137 to 129. [2018-04-12 13:51:22,387 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 129 states. [2018-04-12 13:51:22,388 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 129 states to 129 states and 137 transitions. [2018-04-12 13:51:22,388 INFO L78 Accepts]: Start accepts. Automaton has 129 states and 137 transitions. Word has length 29 [2018-04-12 13:51:22,388 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 13:51:22,388 INFO L459 AbstractCegarLoop]: Abstraction has 129 states and 137 transitions. [2018-04-12 13:51:22,388 INFO L460 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-04-12 13:51:22,388 INFO L276 IsEmpty]: Start isEmpty. Operand 129 states and 137 transitions. [2018-04-12 13:51:22,389 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2018-04-12 13:51:22,389 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 13:51:22,389 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 13:51:22,389 INFO L408 AbstractCegarLoop]: === Iteration 16 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-04-12 13:51:22,390 INFO L82 PathProgramCache]: Analyzing trace with hash 1741287252, now seen corresponding path program 1 times [2018-04-12 13:51:22,390 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 13:51:22,390 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 13:51:22,390 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 13:51:22,390 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 13:51:22,394 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 13:51:22,401 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 13:51:22,402 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 13:51:22,430 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 13:51:22,430 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 13:51:22,430 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-04-12 13:51:22,430 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-04-12 13:51:22,431 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-04-12 13:51:22,431 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-04-12 13:51:22,431 INFO L87 Difference]: Start difference. First operand 129 states and 137 transitions. Second operand 5 states. [2018-04-12 13:51:22,551 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 13:51:22,552 INFO L93 Difference]: Finished difference Result 127 states and 135 transitions. [2018-04-12 13:51:22,552 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-04-12 13:51:22,552 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 30 [2018-04-12 13:51:22,552 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 13:51:22,553 INFO L225 Difference]: With dead ends: 127 [2018-04-12 13:51:22,553 INFO L226 Difference]: Without dead ends: 127 [2018-04-12 13:51:22,553 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-04-12 13:51:22,553 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 127 states. [2018-04-12 13:51:22,555 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 127 to 125. [2018-04-12 13:51:22,556 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 125 states. [2018-04-12 13:51:22,556 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 125 states to 125 states and 132 transitions. [2018-04-12 13:51:22,556 INFO L78 Accepts]: Start accepts. Automaton has 125 states and 132 transitions. Word has length 30 [2018-04-12 13:51:22,557 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 13:51:22,557 INFO L459 AbstractCegarLoop]: Abstraction has 125 states and 132 transitions. [2018-04-12 13:51:22,557 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-04-12 13:51:22,557 INFO L276 IsEmpty]: Start isEmpty. Operand 125 states and 132 transitions. [2018-04-12 13:51:22,557 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2018-04-12 13:51:22,557 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 13:51:22,558 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 13:51:22,558 INFO L408 AbstractCegarLoop]: === Iteration 17 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-04-12 13:51:22,558 INFO L82 PathProgramCache]: Analyzing trace with hash 1741287253, now seen corresponding path program 1 times [2018-04-12 13:51:22,558 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 13:51:22,558 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 13:51:22,559 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 13:51:22,559 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 13:51:22,559 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 13:51:22,565 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 13:51:22,566 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 13:51:22,623 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 13:51:22,624 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 13:51:22,624 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-04-12 13:51:22,624 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-04-12 13:51:22,624 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-04-12 13:51:22,624 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2018-04-12 13:51:22,625 INFO L87 Difference]: Start difference. First operand 125 states and 132 transitions. Second operand 6 states. [2018-04-12 13:51:22,724 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 13:51:22,724 INFO L93 Difference]: Finished difference Result 132 states and 141 transitions. [2018-04-12 13:51:22,724 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-04-12 13:51:22,724 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 30 [2018-04-12 13:51:22,724 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 13:51:22,725 INFO L225 Difference]: With dead ends: 132 [2018-04-12 13:51:22,725 INFO L226 Difference]: Without dead ends: 132 [2018-04-12 13:51:22,725 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2018-04-12 13:51:22,726 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 132 states. [2018-04-12 13:51:22,727 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 132 to 125. [2018-04-12 13:51:22,728 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 125 states. [2018-04-12 13:51:22,728 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 125 states to 125 states and 133 transitions. [2018-04-12 13:51:22,728 INFO L78 Accepts]: Start accepts. Automaton has 125 states and 133 transitions. Word has length 30 [2018-04-12 13:51:22,728 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 13:51:22,728 INFO L459 AbstractCegarLoop]: Abstraction has 125 states and 133 transitions. [2018-04-12 13:51:22,729 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-04-12 13:51:22,729 INFO L276 IsEmpty]: Start isEmpty. Operand 125 states and 133 transitions. [2018-04-12 13:51:22,729 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2018-04-12 13:51:22,729 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 13:51:22,729 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 13:51:22,729 INFO L408 AbstractCegarLoop]: === Iteration 18 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-04-12 13:51:22,729 INFO L82 PathProgramCache]: Analyzing trace with hash -565817711, now seen corresponding path program 1 times [2018-04-12 13:51:22,729 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 13:51:22,729 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 13:51:22,730 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 13:51:22,730 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 13:51:22,730 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 13:51:22,734 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 13:51:22,735 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 13:51:22,771 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 13:51:22,771 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 13:51:22,771 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-04-12 13:51:22,772 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-04-12 13:51:22,772 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-04-12 13:51:22,772 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-04-12 13:51:22,772 INFO L87 Difference]: Start difference. First operand 125 states and 133 transitions. Second operand 5 states. [2018-04-12 13:51:22,887 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 13:51:22,887 INFO L93 Difference]: Finished difference Result 124 states and 132 transitions. [2018-04-12 13:51:22,887 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-04-12 13:51:22,887 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 30 [2018-04-12 13:51:22,887 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 13:51:22,887 INFO L225 Difference]: With dead ends: 124 [2018-04-12 13:51:22,887 INFO L226 Difference]: Without dead ends: 124 [2018-04-12 13:51:22,888 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2018-04-12 13:51:22,888 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 124 states. [2018-04-12 13:51:22,889 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 124 to 124. [2018-04-12 13:51:22,889 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 124 states. [2018-04-12 13:51:22,890 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 124 states to 124 states and 132 transitions. [2018-04-12 13:51:22,890 INFO L78 Accepts]: Start accepts. Automaton has 124 states and 132 transitions. Word has length 30 [2018-04-12 13:51:22,890 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 13:51:22,890 INFO L459 AbstractCegarLoop]: Abstraction has 124 states and 132 transitions. [2018-04-12 13:51:22,890 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-04-12 13:51:22,891 INFO L276 IsEmpty]: Start isEmpty. Operand 124 states and 132 transitions. [2018-04-12 13:51:22,891 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2018-04-12 13:51:22,891 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 13:51:22,891 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 13:51:22,891 INFO L408 AbstractCegarLoop]: === Iteration 19 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-04-12 13:51:22,891 INFO L82 PathProgramCache]: Analyzing trace with hash -565817710, now seen corresponding path program 1 times [2018-04-12 13:51:22,891 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 13:51:22,892 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 13:51:22,892 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 13:51:22,892 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 13:51:22,892 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 13:51:22,900 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 13:51:22,901 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 13:51:22,973 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 13:51:22,973 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 13:51:22,973 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-04-12 13:51:22,973 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-04-12 13:51:22,974 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-04-12 13:51:22,974 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2018-04-12 13:51:22,974 INFO L87 Difference]: Start difference. First operand 124 states and 132 transitions. Second operand 6 states. [2018-04-12 13:51:23,067 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 13:51:23,067 INFO L93 Difference]: Finished difference Result 131 states and 139 transitions. [2018-04-12 13:51:23,067 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-04-12 13:51:23,068 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 30 [2018-04-12 13:51:23,068 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 13:51:23,068 INFO L225 Difference]: With dead ends: 131 [2018-04-12 13:51:23,069 INFO L226 Difference]: Without dead ends: 131 [2018-04-12 13:51:23,069 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=28, Invalid=44, Unknown=0, NotChecked=0, Total=72 [2018-04-12 13:51:23,069 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 131 states. [2018-04-12 13:51:23,071 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 131 to 129. [2018-04-12 13:51:23,071 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 129 states. [2018-04-12 13:51:23,072 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 129 states to 129 states and 137 transitions. [2018-04-12 13:51:23,072 INFO L78 Accepts]: Start accepts. Automaton has 129 states and 137 transitions. Word has length 30 [2018-04-12 13:51:23,072 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 13:51:23,072 INFO L459 AbstractCegarLoop]: Abstraction has 129 states and 137 transitions. [2018-04-12 13:51:23,072 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-04-12 13:51:23,072 INFO L276 IsEmpty]: Start isEmpty. Operand 129 states and 137 transitions. [2018-04-12 13:51:23,072 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2018-04-12 13:51:23,073 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 13:51:23,073 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 13:51:23,073 INFO L408 AbstractCegarLoop]: === Iteration 20 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-04-12 13:51:23,073 INFO L82 PathProgramCache]: Analyzing trace with hash -996161706, now seen corresponding path program 1 times [2018-04-12 13:51:23,073 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 13:51:23,073 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 13:51:23,074 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 13:51:23,074 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 13:51:23,074 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 13:51:23,081 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 13:51:23,082 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 13:51:23,148 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 13:51:23,148 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 13:51:23,148 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-04-12 13:51:23,148 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-04-12 13:51:23,148 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-04-12 13:51:23,148 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=48, Unknown=0, NotChecked=0, Total=72 [2018-04-12 13:51:23,148 INFO L87 Difference]: Start difference. First operand 129 states and 137 transitions. Second operand 9 states. [2018-04-12 13:51:23,342 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 13:51:23,342 INFO L93 Difference]: Finished difference Result 141 states and 150 transitions. [2018-04-12 13:51:23,342 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-04-12 13:51:23,342 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 31 [2018-04-12 13:51:23,343 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 13:51:23,343 INFO L225 Difference]: With dead ends: 141 [2018-04-12 13:51:23,343 INFO L226 Difference]: Without dead ends: 141 [2018-04-12 13:51:23,343 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=50, Invalid=106, Unknown=0, NotChecked=0, Total=156 [2018-04-12 13:51:23,343 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 141 states. [2018-04-12 13:51:23,345 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 141 to 131. [2018-04-12 13:51:23,345 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 131 states. [2018-04-12 13:51:23,345 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 131 states to 131 states and 140 transitions. [2018-04-12 13:51:23,345 INFO L78 Accepts]: Start accepts. Automaton has 131 states and 140 transitions. Word has length 31 [2018-04-12 13:51:23,345 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 13:51:23,345 INFO L459 AbstractCegarLoop]: Abstraction has 131 states and 140 transitions. [2018-04-12 13:51:23,345 INFO L460 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-04-12 13:51:23,345 INFO L276 IsEmpty]: Start isEmpty. Operand 131 states and 140 transitions. [2018-04-12 13:51:23,346 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2018-04-12 13:51:23,346 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 13:51:23,346 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 13:51:23,346 INFO L408 AbstractCegarLoop]: === Iteration 21 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-04-12 13:51:23,346 INFO L82 PathProgramCache]: Analyzing trace with hash -996161705, now seen corresponding path program 1 times [2018-04-12 13:51:23,346 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 13:51:23,346 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 13:51:23,346 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 13:51:23,346 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 13:51:23,346 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 13:51:23,351 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 13:51:23,352 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 13:51:23,441 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 13:51:23,441 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 13:51:23,441 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-04-12 13:51:23,442 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-04-12 13:51:23,442 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-04-12 13:51:23,442 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=70, Unknown=0, NotChecked=0, Total=90 [2018-04-12 13:51:23,442 INFO L87 Difference]: Start difference. First operand 131 states and 140 transitions. Second operand 10 states. [2018-04-12 13:51:23,726 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 13:51:23,726 INFO L93 Difference]: Finished difference Result 140 states and 149 transitions. [2018-04-12 13:51:23,726 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-04-12 13:51:23,727 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 31 [2018-04-12 13:51:23,727 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 13:51:23,727 INFO L225 Difference]: With dead ends: 140 [2018-04-12 13:51:23,727 INFO L226 Difference]: Without dead ends: 140 [2018-04-12 13:51:23,727 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 28 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=73, Invalid=233, Unknown=0, NotChecked=0, Total=306 [2018-04-12 13:51:23,728 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 140 states. [2018-04-12 13:51:23,733 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 140 to 126. [2018-04-12 13:51:23,733 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 126 states. [2018-04-12 13:51:23,733 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 126 states to 126 states and 134 transitions. [2018-04-12 13:51:23,733 INFO L78 Accepts]: Start accepts. Automaton has 126 states and 134 transitions. Word has length 31 [2018-04-12 13:51:23,734 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 13:51:23,734 INFO L459 AbstractCegarLoop]: Abstraction has 126 states and 134 transitions. [2018-04-12 13:51:23,734 INFO L460 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-04-12 13:51:23,734 INFO L276 IsEmpty]: Start isEmpty. Operand 126 states and 134 transitions. [2018-04-12 13:51:23,734 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2018-04-12 13:51:23,734 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 13:51:23,734 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 13:51:23,734 INFO L408 AbstractCegarLoop]: === Iteration 22 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-04-12 13:51:23,734 INFO L82 PathProgramCache]: Analyzing trace with hash 73575908, now seen corresponding path program 1 times [2018-04-12 13:51:23,734 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 13:51:23,734 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 13:51:23,735 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 13:51:23,735 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 13:51:23,735 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 13:51:23,738 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 13:51:23,739 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 13:51:23,775 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 13:51:23,775 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 13:51:23,775 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-04-12 13:51:23,775 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-04-12 13:51:23,775 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-04-12 13:51:23,775 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2018-04-12 13:51:23,775 INFO L87 Difference]: Start difference. First operand 126 states and 134 transitions. Second operand 7 states. [2018-04-12 13:51:23,893 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 13:51:23,893 INFO L93 Difference]: Finished difference Result 141 states and 151 transitions. [2018-04-12 13:51:23,894 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-04-12 13:51:23,894 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 33 [2018-04-12 13:51:23,894 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 13:51:23,895 INFO L225 Difference]: With dead ends: 141 [2018-04-12 13:51:23,895 INFO L226 Difference]: Without dead ends: 141 [2018-04-12 13:51:23,895 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=26, Invalid=64, Unknown=0, NotChecked=0, Total=90 [2018-04-12 13:51:23,895 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 141 states. [2018-04-12 13:51:23,897 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 141 to 131. [2018-04-12 13:51:23,897 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 131 states. [2018-04-12 13:51:23,898 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 131 states to 131 states and 141 transitions. [2018-04-12 13:51:23,898 INFO L78 Accepts]: Start accepts. Automaton has 131 states and 141 transitions. Word has length 33 [2018-04-12 13:51:23,898 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 13:51:23,898 INFO L459 AbstractCegarLoop]: Abstraction has 131 states and 141 transitions. [2018-04-12 13:51:23,898 INFO L460 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-04-12 13:51:23,898 INFO L276 IsEmpty]: Start isEmpty. Operand 131 states and 141 transitions. [2018-04-12 13:51:23,899 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2018-04-12 13:51:23,899 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 13:51:23,899 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 13:51:23,899 INFO L408 AbstractCegarLoop]: === Iteration 23 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-04-12 13:51:23,899 INFO L82 PathProgramCache]: Analyzing trace with hash 73575909, now seen corresponding path program 1 times [2018-04-12 13:51:23,899 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 13:51:23,899 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 13:51:23,900 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 13:51:23,900 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 13:51:23,900 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 13:51:23,906 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 13:51:23,907 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 13:51:23,973 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 13:51:23,974 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 13:51:23,974 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-04-12 13:51:23,974 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-04-12 13:51:23,974 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-04-12 13:51:23,974 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2018-04-12 13:51:23,974 INFO L87 Difference]: Start difference. First operand 131 states and 141 transitions. Second operand 9 states. [2018-04-12 13:51:24,262 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 13:51:24,262 INFO L93 Difference]: Finished difference Result 178 states and 195 transitions. [2018-04-12 13:51:24,262 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-04-12 13:51:24,263 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 33 [2018-04-12 13:51:24,263 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 13:51:24,263 INFO L225 Difference]: With dead ends: 178 [2018-04-12 13:51:24,263 INFO L226 Difference]: Without dead ends: 178 [2018-04-12 13:51:24,263 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 30 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=54, Invalid=186, Unknown=0, NotChecked=0, Total=240 [2018-04-12 13:51:24,264 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 178 states. [2018-04-12 13:51:24,266 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 178 to 149. [2018-04-12 13:51:24,266 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 149 states. [2018-04-12 13:51:24,267 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 149 states to 149 states and 164 transitions. [2018-04-12 13:51:24,267 INFO L78 Accepts]: Start accepts. Automaton has 149 states and 164 transitions. Word has length 33 [2018-04-12 13:51:24,267 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 13:51:24,267 INFO L459 AbstractCegarLoop]: Abstraction has 149 states and 164 transitions. [2018-04-12 13:51:24,267 INFO L460 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-04-12 13:51:24,268 INFO L276 IsEmpty]: Start isEmpty. Operand 149 states and 164 transitions. [2018-04-12 13:51:24,268 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-04-12 13:51:24,268 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 13:51:24,268 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 13:51:24,268 INFO L408 AbstractCegarLoop]: === Iteration 24 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-04-12 13:51:24,268 INFO L82 PathProgramCache]: Analyzing trace with hash -550148662, now seen corresponding path program 1 times [2018-04-12 13:51:24,268 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 13:51:24,269 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 13:51:24,269 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 13:51:24,269 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 13:51:24,269 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 13:51:24,277 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 13:51:24,277 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 13:51:24,380 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-04-12 13:51:24,381 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-12 13:51:24,381 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-12 13:51:24,395 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 13:51:24,422 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 13:51:24,430 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 13:51:24,586 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 13:51:24,591 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-04-12 13:51:24,592 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 13:51:24,602 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 13:51:24,603 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 13:51:24,604 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-04-12 13:51:24,604 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 13:51:24,610 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-12 13:51:24,610 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:25, output treesize:18 [2018-04-12 13:51:24,652 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 13:51:24,680 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 13:51:24,681 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 9] total 19 [2018-04-12 13:51:24,681 INFO L442 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-04-12 13:51:24,681 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-04-12 13:51:24,681 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=53, Invalid=327, Unknown=0, NotChecked=0, Total=380 [2018-04-12 13:51:24,681 INFO L87 Difference]: Start difference. First operand 149 states and 164 transitions. Second operand 20 states. [2018-04-12 13:51:25,277 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 13:51:25,277 INFO L93 Difference]: Finished difference Result 206 states and 229 transitions. [2018-04-12 13:51:25,277 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-04-12 13:51:25,277 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 34 [2018-04-12 13:51:25,277 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 13:51:25,278 INFO L225 Difference]: With dead ends: 206 [2018-04-12 13:51:25,278 INFO L226 Difference]: Without dead ends: 206 [2018-04-12 13:51:25,278 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 54 GetRequests, 29 SyntacticMatches, 0 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 102 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=130, Invalid=572, Unknown=0, NotChecked=0, Total=702 [2018-04-12 13:51:25,278 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 206 states. [2018-04-12 13:51:25,282 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 206 to 137. [2018-04-12 13:51:25,282 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 137 states. [2018-04-12 13:51:25,282 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 137 states to 137 states and 147 transitions. [2018-04-12 13:51:25,282 INFO L78 Accepts]: Start accepts. Automaton has 137 states and 147 transitions. Word has length 34 [2018-04-12 13:51:25,283 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 13:51:25,283 INFO L459 AbstractCegarLoop]: Abstraction has 137 states and 147 transitions. [2018-04-12 13:51:25,283 INFO L460 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-04-12 13:51:25,283 INFO L276 IsEmpty]: Start isEmpty. Operand 137 states and 147 transitions. [2018-04-12 13:51:25,283 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-04-12 13:51:25,283 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 13:51:25,283 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 13:51:25,283 INFO L408 AbstractCegarLoop]: === Iteration 25 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-04-12 13:51:25,284 INFO L82 PathProgramCache]: Analyzing trace with hash 1986047201, now seen corresponding path program 1 times [2018-04-12 13:51:25,284 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 13:51:25,284 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 13:51:25,284 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 13:51:25,285 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 13:51:25,285 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 13:51:25,291 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 13:51:25,291 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 13:51:25,332 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 13:51:25,332 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 13:51:25,332 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-04-12 13:51:25,332 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-04-12 13:51:25,332 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-04-12 13:51:25,332 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-04-12 13:51:25,333 INFO L87 Difference]: Start difference. First operand 137 states and 147 transitions. Second operand 8 states. [2018-04-12 13:51:25,425 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 13:51:25,425 INFO L93 Difference]: Finished difference Result 164 states and 175 transitions. [2018-04-12 13:51:25,425 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-04-12 13:51:25,425 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 35 [2018-04-12 13:51:25,425 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 13:51:25,426 INFO L225 Difference]: With dead ends: 164 [2018-04-12 13:51:25,426 INFO L226 Difference]: Without dead ends: 164 [2018-04-12 13:51:25,426 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=43, Invalid=113, Unknown=0, NotChecked=0, Total=156 [2018-04-12 13:51:25,427 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 164 states. [2018-04-12 13:51:25,429 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 164 to 137. [2018-04-12 13:51:25,429 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 137 states. [2018-04-12 13:51:25,430 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 137 states to 137 states and 145 transitions. [2018-04-12 13:51:25,430 INFO L78 Accepts]: Start accepts. Automaton has 137 states and 145 transitions. Word has length 35 [2018-04-12 13:51:25,430 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 13:51:25,430 INFO L459 AbstractCegarLoop]: Abstraction has 137 states and 145 transitions. [2018-04-12 13:51:25,430 INFO L460 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-04-12 13:51:25,430 INFO L276 IsEmpty]: Start isEmpty. Operand 137 states and 145 transitions. [2018-04-12 13:51:25,431 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-04-12 13:51:25,431 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 13:51:25,431 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 13:51:25,431 INFO L408 AbstractCegarLoop]: === Iteration 26 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-04-12 13:51:25,431 INFO L82 PathProgramCache]: Analyzing trace with hash 1466613884, now seen corresponding path program 1 times [2018-04-12 13:51:25,431 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 13:51:25,431 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 13:51:25,432 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 13:51:25,432 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 13:51:25,432 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 13:51:25,440 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 13:51:25,441 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 13:51:25,522 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 13:51:25,522 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 13:51:25,522 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-04-12 13:51:25,522 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-04-12 13:51:25,522 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-04-12 13:51:25,522 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=70, Unknown=0, NotChecked=0, Total=90 [2018-04-12 13:51:25,523 INFO L87 Difference]: Start difference. First operand 137 states and 145 transitions. Second operand 10 states. [2018-04-12 13:51:25,768 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 13:51:25,768 INFO L93 Difference]: Finished difference Result 162 states and 174 transitions. [2018-04-12 13:51:25,768 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-04-12 13:51:25,768 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 36 [2018-04-12 13:51:25,768 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 13:51:25,769 INFO L225 Difference]: With dead ends: 162 [2018-04-12 13:51:25,769 INFO L226 Difference]: Without dead ends: 162 [2018-04-12 13:51:25,769 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 42 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=57, Invalid=215, Unknown=0, NotChecked=0, Total=272 [2018-04-12 13:51:25,769 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 162 states. [2018-04-12 13:51:25,771 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 162 to 140. [2018-04-12 13:51:25,771 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 140 states. [2018-04-12 13:51:25,771 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 140 states to 140 states and 149 transitions. [2018-04-12 13:51:25,771 INFO L78 Accepts]: Start accepts. Automaton has 140 states and 149 transitions. Word has length 36 [2018-04-12 13:51:25,772 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 13:51:25,772 INFO L459 AbstractCegarLoop]: Abstraction has 140 states and 149 transitions. [2018-04-12 13:51:25,772 INFO L460 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-04-12 13:51:25,772 INFO L276 IsEmpty]: Start isEmpty. Operand 140 states and 149 transitions. [2018-04-12 13:51:25,772 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-04-12 13:51:25,772 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 13:51:25,772 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 13:51:25,772 INFO L408 AbstractCegarLoop]: === Iteration 27 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-04-12 13:51:25,772 INFO L82 PathProgramCache]: Analyzing trace with hash 1466613883, now seen corresponding path program 1 times [2018-04-12 13:51:25,772 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 13:51:25,772 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 13:51:25,773 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 13:51:25,773 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 13:51:25,773 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 13:51:25,778 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 13:51:25,779 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 13:51:25,800 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 13:51:25,801 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 13:51:25,801 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-04-12 13:51:25,801 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-04-12 13:51:25,801 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-04-12 13:51:25,801 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-04-12 13:51:25,801 INFO L87 Difference]: Start difference. First operand 140 states and 149 transitions. Second operand 5 states. [2018-04-12 13:51:25,882 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 13:51:25,882 INFO L93 Difference]: Finished difference Result 139 states and 147 transitions. [2018-04-12 13:51:25,883 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-04-12 13:51:25,883 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 36 [2018-04-12 13:51:25,883 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 13:51:25,883 INFO L225 Difference]: With dead ends: 139 [2018-04-12 13:51:25,883 INFO L226 Difference]: Without dead ends: 139 [2018-04-12 13:51:25,883 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2018-04-12 13:51:25,884 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 139 states. [2018-04-12 13:51:25,885 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 139 to 139. [2018-04-12 13:51:25,885 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 139 states. [2018-04-12 13:51:25,885 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 139 states to 139 states and 147 transitions. [2018-04-12 13:51:25,885 INFO L78 Accepts]: Start accepts. Automaton has 139 states and 147 transitions. Word has length 36 [2018-04-12 13:51:25,885 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 13:51:25,885 INFO L459 AbstractCegarLoop]: Abstraction has 139 states and 147 transitions. [2018-04-12 13:51:25,885 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-04-12 13:51:25,885 INFO L276 IsEmpty]: Start isEmpty. Operand 139 states and 147 transitions. [2018-04-12 13:51:25,886 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2018-04-12 13:51:25,886 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 13:51:25,886 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 13:51:25,886 INFO L408 AbstractCegarLoop]: === Iteration 28 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-04-12 13:51:25,886 INFO L82 PathProgramCache]: Analyzing trace with hash -1151086149, now seen corresponding path program 1 times [2018-04-12 13:51:25,886 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 13:51:25,886 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 13:51:25,886 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 13:51:25,886 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 13:51:25,887 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 13:51:25,891 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 13:51:25,892 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 13:51:26,000 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 13:51:26,000 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-12 13:51:26,000 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-12 13:51:26,008 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 13:51:26,031 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 13:51:26,033 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 13:51:26,037 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-12 13:51:26,037 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 13:51:26,040 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 13:51:26,041 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-04-12 13:51:26,057 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-04-12 13:51:26,060 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-04-12 13:51:26,060 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 13:51:26,062 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 13:51:26,071 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-04-12 13:51:26,073 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-04-12 13:51:26,073 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-12 13:51:26,075 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 13:51:26,083 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 13:51:26,083 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:35, output treesize:21 [2018-04-12 13:51:26,171 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 17 [2018-04-12 13:51:26,180 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 5 [2018-04-12 13:51:26,201 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 13:51:26,203 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 13:51:26,209 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 26 [2018-04-12 13:51:26,211 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 11 [2018-04-12 13:51:26,212 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-12 13:51:26,214 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 13:51:26,217 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 13:51:26,217 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:55, output treesize:19 [2018-04-12 13:51:26,230 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 13:51:26,247 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 13:51:26,247 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8] total 15 [2018-04-12 13:51:26,247 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-04-12 13:51:26,248 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-04-12 13:51:26,248 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=49, Invalid=191, Unknown=0, NotChecked=0, Total=240 [2018-04-12 13:51:26,248 INFO L87 Difference]: Start difference. First operand 139 states and 147 transitions. Second operand 16 states. [2018-04-12 13:51:26,483 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 13:51:26,483 INFO L93 Difference]: Finished difference Result 149 states and 157 transitions. [2018-04-12 13:51:26,483 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-04-12 13:51:26,483 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 37 [2018-04-12 13:51:26,483 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 13:51:26,484 INFO L225 Difference]: With dead ends: 149 [2018-04-12 13:51:26,484 INFO L226 Difference]: Without dead ends: 149 [2018-04-12 13:51:26,484 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 52 GetRequests, 30 SyntacticMatches, 0 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 81 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=143, Invalid=409, Unknown=0, NotChecked=0, Total=552 [2018-04-12 13:51:26,484 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 149 states. [2018-04-12 13:51:26,485 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 149 to 149. [2018-04-12 13:51:26,485 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 149 states. [2018-04-12 13:51:26,485 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 149 states to 149 states and 157 transitions. [2018-04-12 13:51:26,485 INFO L78 Accepts]: Start accepts. Automaton has 149 states and 157 transitions. Word has length 37 [2018-04-12 13:51:26,486 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 13:51:26,486 INFO L459 AbstractCegarLoop]: Abstraction has 149 states and 157 transitions. [2018-04-12 13:51:26,486 INFO L460 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-04-12 13:51:26,486 INFO L276 IsEmpty]: Start isEmpty. Operand 149 states and 157 transitions. [2018-04-12 13:51:26,486 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2018-04-12 13:51:26,486 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 13:51:26,486 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 13:51:26,486 INFO L408 AbstractCegarLoop]: === Iteration 29 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-04-12 13:51:26,486 INFO L82 PathProgramCache]: Analyzing trace with hash 722626987, now seen corresponding path program 1 times [2018-04-12 13:51:26,486 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 13:51:26,486 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 13:51:26,487 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 13:51:26,487 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 13:51:26,487 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 13:51:26,495 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 13:51:26,496 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 13:51:26,728 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 13:51:26,728 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 13:51:26,728 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [17] imperfect sequences [] total 17 [2018-04-12 13:51:26,729 INFO L442 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-04-12 13:51:26,729 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-04-12 13:51:26,729 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=237, Unknown=0, NotChecked=0, Total=272 [2018-04-12 13:51:26,729 INFO L87 Difference]: Start difference. First operand 149 states and 157 transitions. Second operand 17 states. [2018-04-12 13:51:27,394 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 13:51:27,395 INFO L93 Difference]: Finished difference Result 188 states and 201 transitions. [2018-04-12 13:51:27,395 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-04-12 13:51:27,395 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 40 [2018-04-12 13:51:27,395 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 13:51:27,396 INFO L225 Difference]: With dead ends: 188 [2018-04-12 13:51:27,396 INFO L226 Difference]: Without dead ends: 188 [2018-04-12 13:51:27,397 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 35 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 201 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=134, Invalid=988, Unknown=0, NotChecked=0, Total=1122 [2018-04-12 13:51:27,397 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 188 states. [2018-04-12 13:51:27,399 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 188 to 166. [2018-04-12 13:51:27,399 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 166 states. [2018-04-12 13:51:27,400 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 166 states to 166 states and 177 transitions. [2018-04-12 13:51:27,400 INFO L78 Accepts]: Start accepts. Automaton has 166 states and 177 transitions. Word has length 40 [2018-04-12 13:51:27,400 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 13:51:27,400 INFO L459 AbstractCegarLoop]: Abstraction has 166 states and 177 transitions. [2018-04-12 13:51:27,400 INFO L460 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-04-12 13:51:27,400 INFO L276 IsEmpty]: Start isEmpty. Operand 166 states and 177 transitions. [2018-04-12 13:51:27,401 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2018-04-12 13:51:27,401 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 13:51:27,401 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 13:51:27,401 INFO L408 AbstractCegarLoop]: === Iteration 30 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-04-12 13:51:27,402 INFO L82 PathProgramCache]: Analyzing trace with hash 1316022877, now seen corresponding path program 1 times [2018-04-12 13:51:27,402 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 13:51:27,402 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 13:51:27,402 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 13:51:27,403 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 13:51:27,403 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 13:51:27,410 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 13:51:27,411 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 13:51:27,554 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 13:51:27,554 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 13:51:27,554 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2018-04-12 13:51:27,554 INFO L442 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-04-12 13:51:27,555 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-04-12 13:51:27,555 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=32, Invalid=124, Unknown=0, NotChecked=0, Total=156 [2018-04-12 13:51:27,555 INFO L87 Difference]: Start difference. First operand 166 states and 177 transitions. Second operand 13 states. [2018-04-12 13:51:28,006 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 13:51:28,006 INFO L93 Difference]: Finished difference Result 205 states and 223 transitions. [2018-04-12 13:51:28,006 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-04-12 13:51:28,006 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 40 [2018-04-12 13:51:28,006 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 13:51:28,007 INFO L225 Difference]: With dead ends: 205 [2018-04-12 13:51:28,007 INFO L226 Difference]: Without dead ends: 205 [2018-04-12 13:51:28,008 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 85 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=117, Invalid=435, Unknown=0, NotChecked=0, Total=552 [2018-04-12 13:51:28,008 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 205 states. [2018-04-12 13:51:28,010 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 205 to 175. [2018-04-12 13:51:28,010 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 175 states. [2018-04-12 13:51:28,011 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 175 states to 175 states and 188 transitions. [2018-04-12 13:51:28,011 INFO L78 Accepts]: Start accepts. Automaton has 175 states and 188 transitions. Word has length 40 [2018-04-12 13:51:28,011 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 13:51:28,011 INFO L459 AbstractCegarLoop]: Abstraction has 175 states and 188 transitions. [2018-04-12 13:51:28,011 INFO L460 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-04-12 13:51:28,011 INFO L276 IsEmpty]: Start isEmpty. Operand 175 states and 188 transitions. [2018-04-12 13:51:28,011 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-04-12 13:51:28,011 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 13:51:28,012 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 13:51:28,012 INFO L408 AbstractCegarLoop]: === Iteration 31 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-04-12 13:51:28,012 INFO L82 PathProgramCache]: Analyzing trace with hash 586362613, now seen corresponding path program 1 times [2018-04-12 13:51:28,012 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 13:51:28,012 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 13:51:28,012 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 13:51:28,012 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 13:51:28,012 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 13:51:28,016 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 13:51:28,016 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 13:51:28,084 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 13:51:28,085 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 13:51:28,085 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-04-12 13:51:28,085 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-04-12 13:51:28,085 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-04-12 13:51:28,085 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-04-12 13:51:28,086 INFO L87 Difference]: Start difference. First operand 175 states and 188 transitions. Second operand 8 states. [2018-04-12 13:51:28,168 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 13:51:28,168 INFO L93 Difference]: Finished difference Result 193 states and 207 transitions. [2018-04-12 13:51:28,168 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-04-12 13:51:28,168 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 44 [2018-04-12 13:51:28,168 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 13:51:28,170 INFO L225 Difference]: With dead ends: 193 [2018-04-12 13:51:28,170 INFO L226 Difference]: Without dead ends: 193 [2018-04-12 13:51:28,171 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=43, Invalid=113, Unknown=0, NotChecked=0, Total=156 [2018-04-12 13:51:28,171 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 193 states. [2018-04-12 13:51:28,173 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 193 to 184. [2018-04-12 13:51:28,173 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 184 states. [2018-04-12 13:51:28,174 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 184 states to 184 states and 201 transitions. [2018-04-12 13:51:28,174 INFO L78 Accepts]: Start accepts. Automaton has 184 states and 201 transitions. Word has length 44 [2018-04-12 13:51:28,174 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 13:51:28,174 INFO L459 AbstractCegarLoop]: Abstraction has 184 states and 201 transitions. [2018-04-12 13:51:28,174 INFO L460 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-04-12 13:51:28,174 INFO L276 IsEmpty]: Start isEmpty. Operand 184 states and 201 transitions. [2018-04-12 13:51:28,174 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-04-12 13:51:28,174 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 13:51:28,174 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 13:51:28,174 INFO L408 AbstractCegarLoop]: === Iteration 32 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-04-12 13:51:28,174 INFO L82 PathProgramCache]: Analyzing trace with hash 1176080644, now seen corresponding path program 1 times [2018-04-12 13:51:28,175 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 13:51:28,175 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 13:51:28,175 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 13:51:28,175 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 13:51:28,175 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 13:51:28,183 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 13:51:28,184 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 13:51:28,262 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 13:51:28,262 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 13:51:28,262 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-04-12 13:51:28,263 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-04-12 13:51:28,263 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-04-12 13:51:28,263 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=70, Unknown=0, NotChecked=0, Total=90 [2018-04-12 13:51:28,263 INFO L87 Difference]: Start difference. First operand 184 states and 201 transitions. Second operand 10 states. [2018-04-12 13:51:28,392 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 13:51:28,392 INFO L93 Difference]: Finished difference Result 192 states and 206 transitions. [2018-04-12 13:51:28,392 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-04-12 13:51:28,393 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 43 [2018-04-12 13:51:28,393 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 13:51:28,393 INFO L225 Difference]: With dead ends: 192 [2018-04-12 13:51:28,394 INFO L226 Difference]: Without dead ends: 192 [2018-04-12 13:51:28,394 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 39 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=60, Invalid=212, Unknown=0, NotChecked=0, Total=272 [2018-04-12 13:51:28,394 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 192 states. [2018-04-12 13:51:28,397 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 192 to 174. [2018-04-12 13:51:28,397 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 174 states. [2018-04-12 13:51:28,398 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 174 states to 174 states and 189 transitions. [2018-04-12 13:51:28,398 INFO L78 Accepts]: Start accepts. Automaton has 174 states and 189 transitions. Word has length 43 [2018-04-12 13:51:28,398 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 13:51:28,398 INFO L459 AbstractCegarLoop]: Abstraction has 174 states and 189 transitions. [2018-04-12 13:51:28,398 INFO L460 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-04-12 13:51:28,398 INFO L276 IsEmpty]: Start isEmpty. Operand 174 states and 189 transitions. [2018-04-12 13:51:28,399 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2018-04-12 13:51:28,399 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 13:51:28,399 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 13:51:28,399 INFO L408 AbstractCegarLoop]: === Iteration 33 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-04-12 13:51:28,399 INFO L82 PathProgramCache]: Analyzing trace with hash 997371954, now seen corresponding path program 1 times [2018-04-12 13:51:28,399 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 13:51:28,399 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 13:51:28,400 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 13:51:28,400 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 13:51:28,400 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 13:51:28,405 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 13:51:28,406 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 13:51:28,427 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 13:51:28,427 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 13:51:28,427 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-04-12 13:51:28,427 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-04-12 13:51:28,428 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-04-12 13:51:28,428 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-04-12 13:51:28,428 INFO L87 Difference]: Start difference. First operand 174 states and 189 transitions. Second operand 6 states. [2018-04-12 13:51:28,519 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 13:51:28,519 INFO L93 Difference]: Finished difference Result 184 states and 199 transitions. [2018-04-12 13:51:28,519 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-04-12 13:51:28,519 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 45 [2018-04-12 13:51:28,519 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 13:51:28,520 INFO L225 Difference]: With dead ends: 184 [2018-04-12 13:51:28,520 INFO L226 Difference]: Without dead ends: 184 [2018-04-12 13:51:28,520 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2018-04-12 13:51:28,520 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 184 states. [2018-04-12 13:51:28,522 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 184 to 177. [2018-04-12 13:51:28,522 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 177 states. [2018-04-12 13:51:28,523 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 177 states to 177 states and 193 transitions. [2018-04-12 13:51:28,523 INFO L78 Accepts]: Start accepts. Automaton has 177 states and 193 transitions. Word has length 45 [2018-04-12 13:51:28,523 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 13:51:28,523 INFO L459 AbstractCegarLoop]: Abstraction has 177 states and 193 transitions. [2018-04-12 13:51:28,523 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-04-12 13:51:28,523 INFO L276 IsEmpty]: Start isEmpty. Operand 177 states and 193 transitions. [2018-04-12 13:51:28,523 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-04-12 13:51:28,523 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 13:51:28,524 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 13:51:28,524 INFO L408 AbstractCegarLoop]: === Iteration 34 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-04-12 13:51:28,524 INFO L82 PathProgramCache]: Analyzing trace with hash -1923762637, now seen corresponding path program 1 times [2018-04-12 13:51:28,524 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 13:51:28,524 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 13:51:28,524 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 13:51:28,524 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 13:51:28,524 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 13:51:28,530 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 13:51:28,531 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 13:51:28,736 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 13:51:28,736 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 13:51:28,736 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [17] imperfect sequences [] total 17 [2018-04-12 13:51:28,736 INFO L442 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-04-12 13:51:28,736 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-04-12 13:51:28,736 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=269, Unknown=0, NotChecked=0, Total=306 [2018-04-12 13:51:28,736 INFO L87 Difference]: Start difference. First operand 177 states and 193 transitions. Second operand 18 states. [2018-04-12 13:51:29,380 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 13:51:29,380 INFO L93 Difference]: Finished difference Result 229 states and 253 transitions. [2018-04-12 13:51:29,380 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-04-12 13:51:29,380 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 47 [2018-04-12 13:51:29,380 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 13:51:29,381 INFO L225 Difference]: With dead ends: 229 [2018-04-12 13:51:29,381 INFO L226 Difference]: Without dead ends: 229 [2018-04-12 13:51:29,381 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 37 GetRequests, 1 SyntacticMatches, 3 SemanticMatches, 33 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 208 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=136, Invalid=1054, Unknown=0, NotChecked=0, Total=1190 [2018-04-12 13:51:29,382 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 229 states. [2018-04-12 13:51:29,385 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 229 to 201. [2018-04-12 13:51:29,385 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 201 states. [2018-04-12 13:51:29,385 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 201 states to 201 states and 224 transitions. [2018-04-12 13:51:29,386 INFO L78 Accepts]: Start accepts. Automaton has 201 states and 224 transitions. Word has length 47 [2018-04-12 13:51:29,386 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 13:51:29,386 INFO L459 AbstractCegarLoop]: Abstraction has 201 states and 224 transitions. [2018-04-12 13:51:29,386 INFO L460 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-04-12 13:51:29,386 INFO L276 IsEmpty]: Start isEmpty. Operand 201 states and 224 transitions. [2018-04-12 13:51:29,386 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-04-12 13:51:29,387 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 13:51:29,387 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 13:51:29,387 INFO L408 AbstractCegarLoop]: === Iteration 35 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-04-12 13:51:29,387 INFO L82 PathProgramCache]: Analyzing trace with hash -1923762636, now seen corresponding path program 1 times [2018-04-12 13:51:29,387 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 13:51:29,387 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 13:51:29,388 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 13:51:29,388 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 13:51:29,388 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 13:51:29,396 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 13:51:29,397 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 13:51:29,685 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 13:51:29,686 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 13:51:29,686 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [18] imperfect sequences [] total 18 [2018-04-12 13:51:29,686 INFO L442 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-04-12 13:51:29,686 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-04-12 13:51:29,686 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=39, Invalid=303, Unknown=0, NotChecked=0, Total=342 [2018-04-12 13:51:29,687 INFO L87 Difference]: Start difference. First operand 201 states and 224 transitions. Second operand 19 states. [2018-04-12 13:51:30,410 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 13:51:30,410 INFO L93 Difference]: Finished difference Result 250 states and 277 transitions. [2018-04-12 13:51:30,410 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2018-04-12 13:51:30,410 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 47 [2018-04-12 13:51:30,410 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 13:51:30,411 INFO L225 Difference]: With dead ends: 250 [2018-04-12 13:51:30,411 INFO L226 Difference]: Without dead ends: 250 [2018-04-12 13:51:30,411 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 39 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 246 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=150, Invalid=1256, Unknown=0, NotChecked=0, Total=1406 [2018-04-12 13:51:30,411 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 250 states. [2018-04-12 13:51:30,414 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 250 to 223. [2018-04-12 13:51:30,414 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 223 states. [2018-04-12 13:51:30,415 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 223 states to 223 states and 251 transitions. [2018-04-12 13:51:30,415 INFO L78 Accepts]: Start accepts. Automaton has 223 states and 251 transitions. Word has length 47 [2018-04-12 13:51:30,415 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 13:51:30,415 INFO L459 AbstractCegarLoop]: Abstraction has 223 states and 251 transitions. [2018-04-12 13:51:30,415 INFO L460 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-04-12 13:51:30,415 INFO L276 IsEmpty]: Start isEmpty. Operand 223 states and 251 transitions. [2018-04-12 13:51:30,416 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2018-04-12 13:51:30,416 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 13:51:30,416 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 13:51:30,416 INFO L408 AbstractCegarLoop]: === Iteration 36 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-04-12 13:51:30,416 INFO L82 PathProgramCache]: Analyzing trace with hash 124262969, now seen corresponding path program 1 times [2018-04-12 13:51:30,417 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 13:51:30,417 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 13:51:30,417 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 13:51:30,417 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 13:51:30,417 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 13:51:30,423 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 13:51:30,424 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 13:51:30,495 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 13:51:30,495 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 13:51:30,495 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-04-12 13:51:30,496 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-04-12 13:51:30,496 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-04-12 13:51:30,496 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=71, Unknown=0, NotChecked=0, Total=90 [2018-04-12 13:51:30,496 INFO L87 Difference]: Start difference. First operand 223 states and 251 transitions. Second operand 10 states. [2018-04-12 13:51:30,656 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 13:51:30,657 INFO L93 Difference]: Finished difference Result 242 states and 271 transitions. [2018-04-12 13:51:30,657 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-04-12 13:51:30,657 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 48 [2018-04-12 13:51:30,657 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 13:51:30,658 INFO L225 Difference]: With dead ends: 242 [2018-04-12 13:51:30,658 INFO L226 Difference]: Without dead ends: 242 [2018-04-12 13:51:30,658 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=39, Invalid=143, Unknown=0, NotChecked=0, Total=182 [2018-04-12 13:51:30,658 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 242 states. [2018-04-12 13:51:30,662 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 242 to 234. [2018-04-12 13:51:30,662 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 234 states. [2018-04-12 13:51:30,663 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 234 states to 234 states and 264 transitions. [2018-04-12 13:51:30,663 INFO L78 Accepts]: Start accepts. Automaton has 234 states and 264 transitions. Word has length 48 [2018-04-12 13:51:30,663 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 13:51:30,663 INFO L459 AbstractCegarLoop]: Abstraction has 234 states and 264 transitions. [2018-04-12 13:51:30,663 INFO L460 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-04-12 13:51:30,663 INFO L276 IsEmpty]: Start isEmpty. Operand 234 states and 264 transitions. [2018-04-12 13:51:30,664 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2018-04-12 13:51:30,664 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 13:51:30,664 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 13:51:30,664 INFO L408 AbstractCegarLoop]: === Iteration 37 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-04-12 13:51:30,664 INFO L82 PathProgramCache]: Analyzing trace with hash 1230859131, now seen corresponding path program 1 times [2018-04-12 13:51:30,664 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 13:51:30,664 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 13:51:30,665 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 13:51:30,665 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 13:51:30,665 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 13:51:30,671 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 13:51:30,672 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 13:51:30,696 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 13:51:30,697 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 13:51:30,697 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-04-12 13:51:30,697 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-04-12 13:51:30,697 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-04-12 13:51:30,697 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-04-12 13:51:30,698 INFO L87 Difference]: Start difference. First operand 234 states and 264 transitions. Second operand 5 states. [2018-04-12 13:51:30,757 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 13:51:30,757 INFO L93 Difference]: Finished difference Result 240 states and 270 transitions. [2018-04-12 13:51:30,757 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-04-12 13:51:30,757 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 50 [2018-04-12 13:51:30,757 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 13:51:30,758 INFO L225 Difference]: With dead ends: 240 [2018-04-12 13:51:30,758 INFO L226 Difference]: Without dead ends: 240 [2018-04-12 13:51:30,758 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-04-12 13:51:30,758 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 240 states. [2018-04-12 13:51:30,761 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 240 to 233. [2018-04-12 13:51:30,761 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 233 states. [2018-04-12 13:51:30,762 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 233 states to 233 states and 262 transitions. [2018-04-12 13:51:30,762 INFO L78 Accepts]: Start accepts. Automaton has 233 states and 262 transitions. Word has length 50 [2018-04-12 13:51:30,762 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 13:51:30,763 INFO L459 AbstractCegarLoop]: Abstraction has 233 states and 262 transitions. [2018-04-12 13:51:30,763 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-04-12 13:51:30,763 INFO L276 IsEmpty]: Start isEmpty. Operand 233 states and 262 transitions. [2018-04-12 13:51:30,763 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2018-04-12 13:51:30,763 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 13:51:30,764 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 13:51:30,764 INFO L408 AbstractCegarLoop]: === Iteration 38 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-04-12 13:51:30,764 INFO L82 PathProgramCache]: Analyzing trace with hash -498072556, now seen corresponding path program 1 times [2018-04-12 13:51:30,764 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 13:51:30,764 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 13:51:30,764 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 13:51:30,765 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 13:51:30,765 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 13:51:30,771 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 13:51:30,771 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 13:51:30,796 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 13:51:30,797 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 13:51:30,797 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-04-12 13:51:30,797 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-04-12 13:51:30,797 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-04-12 13:51:30,797 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-04-12 13:51:30,797 INFO L87 Difference]: Start difference. First operand 233 states and 262 transitions. Second operand 5 states. [2018-04-12 13:51:30,838 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 13:51:30,839 INFO L93 Difference]: Finished difference Result 239 states and 268 transitions. [2018-04-12 13:51:30,839 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-04-12 13:51:30,839 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 51 [2018-04-12 13:51:30,839 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 13:51:30,839 INFO L225 Difference]: With dead ends: 239 [2018-04-12 13:51:30,839 INFO L226 Difference]: Without dead ends: 239 [2018-04-12 13:51:30,840 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-04-12 13:51:30,840 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 239 states. [2018-04-12 13:51:30,842 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 239 to 232. [2018-04-12 13:51:30,842 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 232 states. [2018-04-12 13:51:30,842 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 232 states to 232 states and 260 transitions. [2018-04-12 13:51:30,842 INFO L78 Accepts]: Start accepts. Automaton has 232 states and 260 transitions. Word has length 51 [2018-04-12 13:51:30,843 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 13:51:30,843 INFO L459 AbstractCegarLoop]: Abstraction has 232 states and 260 transitions. [2018-04-12 13:51:30,843 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-04-12 13:51:30,843 INFO L276 IsEmpty]: Start isEmpty. Operand 232 states and 260 transitions. [2018-04-12 13:51:30,843 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2018-04-12 13:51:30,843 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 13:51:30,843 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 13:51:30,843 INFO L408 AbstractCegarLoop]: === Iteration 39 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-04-12 13:51:30,843 INFO L82 PathProgramCache]: Analyzing trace with hash 459154013, now seen corresponding path program 1 times [2018-04-12 13:51:30,843 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 13:51:30,843 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 13:51:30,844 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 13:51:30,844 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 13:51:30,844 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 13:51:30,849 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 13:51:30,849 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 13:51:31,195 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 2 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 13:51:31,195 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-12 13:51:31,259 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-12 13:51:31,264 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 13:51:31,284 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 13:51:31,287 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 13:51:31,299 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-04-12 13:51:31,300 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-12 13:51:31,300 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 13:51:31,301 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 13:51:31,305 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-04-12 13:51:31,306 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-12 13:51:31,306 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-12 13:51:31,307 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 13:51:31,310 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 13:51:31,310 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:26, output treesize:18 [2018-04-12 13:51:31,457 WARN L1033 $PredicateComparison]: unable to prove that (exists ((__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_~node~0.base Int) (__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_~node~0.offset Int) (|__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_#t~ret14.offset| Int) (|__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_#t~ret14.base| Int)) (let ((.cse1 (+ __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_~node~0.offset 4))) (and (= |c_#memory_$Pointer$.base| (let ((.cse0 (store |c_old(#memory_$Pointer$.base)| __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_~node~0.base (store (store (select |c_old(#memory_$Pointer$.base)| __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_~node~0.base) .cse1 (select (select |c_old(#memory_$Pointer$.base)| |c___U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_#in~pointerToList.base|) |c___U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_#in~pointerToList.offset|)) __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_~node~0.offset |__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_#t~ret14.base|)))) (store .cse0 |c___U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_#in~pointerToList.base| (store (select .cse0 |c___U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_#in~pointerToList.base|) |c___U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_#in~pointerToList.offset| __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_~node~0.base)))) (<= __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_~node~0.offset 0) (= (let ((.cse2 (store |c_old(#memory_$Pointer$.offset)| __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_~node~0.base (store (store (select |c_old(#memory_$Pointer$.offset)| __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_~node~0.base) .cse1 (select (select |c_old(#memory_$Pointer$.offset)| |c___U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_#in~pointerToList.base|) |c___U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_#in~pointerToList.offset|)) __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_~node~0.offset |__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_#t~ret14.offset|)))) (store .cse2 |c___U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_#in~pointerToList.base| (store (select .cse2 |c___U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_#in~pointerToList.base|) |c___U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_#in~pointerToList.offset| __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_~node~0.offset))) |c_#memory_$Pointer$.offset|) (<= 0 __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_~node~0.offset)))) is different from true [2018-04-12 13:51:31,555 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 43 [2018-04-12 13:51:31,558 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 13:51:31,559 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 41 [2018-04-12 13:51:31,562 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 13:51:31,562 INFO L682 Elim1Store]: detected equality via solver [2018-04-12 13:51:31,565 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 46 [2018-04-12 13:51:31,565 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-12 13:51:31,573 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 13:51:31,585 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 21 [2018-04-12 13:51:31,589 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 13:51:31,590 INFO L682 Elim1Store]: detected equality via solver [2018-04-12 13:51:31,592 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 32 [2018-04-12 13:51:31,592 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-04-12 13:51:31,597 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 13:51:31,603 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 13:51:31,612 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 40 [2018-04-12 13:51:31,625 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 20 [2018-04-12 13:51:31,628 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 13:51:31,629 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 27 [2018-04-12 13:51:31,630 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-04-12 13:51:31,635 INFO L267 ElimStorePlain]: Start of recursive call 8: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 13:51:31,650 INFO L682 Elim1Store]: detected equality via solver [2018-04-12 13:51:31,652 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 41 [2018-04-12 13:51:31,655 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 32 [2018-04-12 13:51:31,655 INFO L267 ElimStorePlain]: Start of recursive call 11: End of recursive call: and 1 xjuncts. [2018-04-12 13:51:31,661 INFO L267 ElimStorePlain]: Start of recursive call 10: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 13:51:31,669 INFO L267 ElimStorePlain]: Start of recursive call 7: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 13:51:31,703 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 43 [2018-04-12 13:51:31,705 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 13:51:31,705 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 41 [2018-04-12 13:51:31,709 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 13:51:31,709 INFO L682 Elim1Store]: detected equality via solver [2018-04-12 13:51:31,712 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 46 [2018-04-12 13:51:31,712 INFO L267 ElimStorePlain]: Start of recursive call 14: End of recursive call: and 1 xjuncts. [2018-04-12 13:51:31,719 INFO L267 ElimStorePlain]: Start of recursive call 13: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 13:51:31,726 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 21 [2018-04-12 13:51:31,729 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 13:51:31,731 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 23 [2018-04-12 13:51:31,731 INFO L267 ElimStorePlain]: Start of recursive call 16: End of recursive call: and 1 xjuncts. [2018-04-12 13:51:31,734 INFO L267 ElimStorePlain]: Start of recursive call 15: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 13:51:31,737 INFO L267 ElimStorePlain]: Start of recursive call 12: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 13:51:31,741 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 40 [2018-04-12 13:51:31,743 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 20 [2018-04-12 13:51:31,745 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 13:51:31,747 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 27 [2018-04-12 13:51:31,747 INFO L267 ElimStorePlain]: Start of recursive call 19: End of recursive call: and 1 xjuncts. [2018-04-12 13:51:31,751 INFO L267 ElimStorePlain]: Start of recursive call 18: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 13:51:31,760 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 36 [2018-04-12 13:51:31,762 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 23 [2018-04-12 13:51:31,762 INFO L267 ElimStorePlain]: Start of recursive call 21: End of recursive call: and 1 xjuncts. [2018-04-12 13:51:31,766 INFO L267 ElimStorePlain]: Start of recursive call 20: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 13:51:31,770 INFO L267 ElimStorePlain]: Start of recursive call 17: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 13:51:31,789 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 2 dim-2 vars, End of recursive call: 3 dim-0 vars, and 4 xjuncts. [2018-04-12 13:51:31,789 INFO L202 ElimStorePlain]: Needed 21 recursive calls to eliminate 6 variables, input treesize:114, output treesize:231 [2018-04-12 13:51:32,107 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-04-12 13:51:32,107 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 13:51:32,118 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-04-12 13:51:32,118 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:98, output treesize:97 [2018-04-12 13:51:32,161 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 13:51:32,161 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 13:51:32,162 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 8 [2018-04-12 13:51:32,162 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 13:51:32,175 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 13:51:32,175 INFO L682 Elim1Store]: detected equality via solver [2018-04-12 13:51:32,180 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 81 treesize of output 77 [2018-04-12 13:51:32,183 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 64 treesize of output 58 [2018-04-12 13:51:32,183 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-12 13:51:32,188 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 13:51:32,199 INFO L682 Elim1Store]: detected equality via solver [2018-04-12 13:51:32,201 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 67 treesize of output 75 [2018-04-12 13:51:32,202 INFO L682 Elim1Store]: detected equality via solver [2018-04-12 13:51:32,203 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 62 treesize of output 90 [2018-04-12 13:51:32,203 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-04-12 13:51:32,208 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 13:51:32,215 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, 2 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-04-12 13:51:32,215 INFO L202 ElimStorePlain]: Needed 6 recursive calls to eliminate 5 variables, input treesize:118, output treesize:94 [2018-04-12 13:51:32,254 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 88 treesize of output 72 [2018-04-12 13:51:32,257 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2018-04-12 13:51:32,257 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 13:51:32,265 INFO L682 Elim1Store]: detected equality via solver [2018-04-12 13:51:32,265 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 57 treesize of output 33 [2018-04-12 13:51:32,265 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-12 13:51:32,271 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 13:51:32,280 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 26 [2018-04-12 13:51:32,282 INFO L682 Elim1Store]: detected equality via solver [2018-04-12 13:51:32,283 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2018-04-12 13:51:32,283 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-04-12 13:51:32,289 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 3 [2018-04-12 13:51:32,289 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-04-12 13:51:32,290 INFO L267 ElimStorePlain]: Start of recursive call 5: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 13:51:32,295 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 13:51:32,296 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 5 variables, input treesize:105, output treesize:10 [2018-04-12 13:51:32,334 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 2 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 13:51:32,364 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 13:51:32,364 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 22] total 36 [2018-04-12 13:51:32,365 INFO L442 AbstractCegarLoop]: Interpolant automaton has 36 states [2018-04-12 13:51:32,365 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2018-04-12 13:51:32,365 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=141, Invalid=1049, Unknown=4, NotChecked=66, Total=1260 [2018-04-12 13:51:32,365 INFO L87 Difference]: Start difference. First operand 232 states and 260 transitions. Second operand 36 states. [2018-04-12 13:51:33,610 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 13:51:33,610 INFO L93 Difference]: Finished difference Result 252 states and 283 transitions. [2018-04-12 13:51:33,611 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2018-04-12 13:51:33,611 INFO L78 Accepts]: Start accepts. Automaton has 36 states. Word has length 53 [2018-04-12 13:51:33,611 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 13:51:33,612 INFO L225 Difference]: With dead ends: 252 [2018-04-12 13:51:33,612 INFO L226 Difference]: Without dead ends: 252 [2018-04-12 13:51:33,612 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 92 GetRequests, 39 SyntacticMatches, 4 SemanticMatches, 49 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 584 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=279, Invalid=2169, Unknown=6, NotChecked=96, Total=2550 [2018-04-12 13:51:33,613 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 252 states. [2018-04-12 13:51:33,615 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 252 to 242. [2018-04-12 13:51:33,615 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 242 states. [2018-04-12 13:51:33,615 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 242 states to 242 states and 270 transitions. [2018-04-12 13:51:33,616 INFO L78 Accepts]: Start accepts. Automaton has 242 states and 270 transitions. Word has length 53 [2018-04-12 13:51:33,616 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 13:51:33,616 INFO L459 AbstractCegarLoop]: Abstraction has 242 states and 270 transitions. [2018-04-12 13:51:33,616 INFO L460 AbstractCegarLoop]: Interpolant automaton has 36 states. [2018-04-12 13:51:33,616 INFO L276 IsEmpty]: Start isEmpty. Operand 242 states and 270 transitions. [2018-04-12 13:51:33,617 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2018-04-12 13:51:33,617 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 13:51:33,617 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 13:51:33,617 INFO L408 AbstractCegarLoop]: === Iteration 40 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-04-12 13:51:33,617 INFO L82 PathProgramCache]: Analyzing trace with hash -1135548646, now seen corresponding path program 1 times [2018-04-12 13:51:33,617 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 13:51:33,617 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 13:51:33,618 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 13:51:33,618 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 13:51:33,618 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 13:51:33,624 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 13:51:33,624 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 13:51:33,774 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 13:51:33,774 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-12 13:51:33,774 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-12 13:51:33,779 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 13:51:33,797 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 13:51:33,799 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 13:51:33,852 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-04-12 13:51:33,854 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-12 13:51:33,854 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 13:51:33,855 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 13:51:33,859 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 13:51:33,859 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:23, output treesize:20 [2018-04-12 13:51:33,894 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 8 [2018-04-12 13:51:33,894 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 13:51:33,896 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-12 13:51:33,896 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:21, output treesize:12 [2018-04-12 13:51:39,912 WARN L148 SmtUtils]: Spent 2002ms on a formula simplification that was a NOOP. DAG size: 12 [2018-04-12 13:51:39,928 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 27 [2018-04-12 13:51:39,929 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 18 [2018-04-12 13:51:39,930 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 13:51:39,932 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 13:51:39,935 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 13:51:39,935 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:38, output treesize:23 [2018-04-12 13:51:39,982 WARN L1033 $PredicateComparison]: unable to prove that (exists ((|main_~#list~0.base| Int) (|main_#t~mem20.base| Int)) (let ((.cse0 (store |c_old(#valid)| |main_~#list~0.base| 1))) (and (= 0 (select |c_old(#valid)| |main_~#list~0.base|)) (= (store (store .cse0 |main_#t~mem20.base| 0) |main_~#list~0.base| 0) |c_#valid|) (= 0 (select .cse0 |main_#t~mem20.base|))))) is different from true [2018-04-12 13:51:39,993 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 13:51:40,011 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 13:51:40,012 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 12] total 19 [2018-04-12 13:51:40,012 INFO L442 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-04-12 13:51:40,012 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-04-12 13:51:40,012 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=49, Invalid=291, Unknown=6, NotChecked=34, Total=380 [2018-04-12 13:51:40,012 INFO L87 Difference]: Start difference. First operand 242 states and 270 transitions. Second operand 20 states. [2018-04-12 13:52:00,255 WARN L148 SmtUtils]: Spent 2004ms on a formula simplification that was a NOOP. DAG size: 18 [2018-04-12 13:52:42,010 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 13:52:42,010 INFO L93 Difference]: Finished difference Result 253 states and 282 transitions. [2018-04-12 13:52:42,010 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-04-12 13:52:42,010 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 55 [2018-04-12 13:52:42,010 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 13:52:42,011 INFO L225 Difference]: With dead ends: 253 [2018-04-12 13:52:42,011 INFO L226 Difference]: Without dead ends: 226 [2018-04-12 13:52:42,011 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 82 GetRequests, 48 SyntacticMatches, 7 SemanticMatches, 27 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 169 ImplicationChecksByTransitivity, 12.4s TimeCoverageRelationStatistics Valid=108, Invalid=643, Unknown=9, NotChecked=52, Total=812 [2018-04-12 13:52:42,011 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 226 states. [2018-04-12 13:52:42,013 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 226 to 219. [2018-04-12 13:52:42,013 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 219 states. [2018-04-12 13:52:42,014 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 219 states to 219 states and 246 transitions. [2018-04-12 13:52:42,014 INFO L78 Accepts]: Start accepts. Automaton has 219 states and 246 transitions. Word has length 55 [2018-04-12 13:52:42,014 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 13:52:42,014 INFO L459 AbstractCegarLoop]: Abstraction has 219 states and 246 transitions. [2018-04-12 13:52:42,014 INFO L460 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-04-12 13:52:42,014 INFO L276 IsEmpty]: Start isEmpty. Operand 219 states and 246 transitions. [2018-04-12 13:52:42,014 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2018-04-12 13:52:42,014 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 13:52:42,014 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 13:52:42,014 INFO L408 AbstractCegarLoop]: === Iteration 41 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-04-12 13:52:42,015 INFO L82 PathProgramCache]: Analyzing trace with hash -1522120989, now seen corresponding path program 1 times [2018-04-12 13:52:42,015 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 13:52:42,015 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 13:52:42,015 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 13:52:42,015 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 13:52:42,015 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 13:52:42,022 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 13:52:42,023 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 13:52:42,280 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 12 proven. 6 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-04-12 13:52:42,280 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-12 13:52:42,280 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-12 13:52:42,286 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 13:52:42,331 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 13:52:42,336 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 13:52:42,434 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-04-12 13:52:42,435 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-12 13:52:42,435 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 13:52:42,437 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 13:52:42,442 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 13:52:42,442 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:28, output treesize:21 [2018-04-12 13:52:42,470 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-04-12 13:52:42,472 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-12 13:52:42,472 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 13:52:42,473 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 13:52:42,492 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 21 treesize of output 33 [2018-04-12 13:52:42,494 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 21 [2018-04-12 13:52:42,494 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-12 13:52:42,517 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 19 treesize of output 35 [2018-04-12 13:52:42,517 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-04-12 13:52:42,530 INFO L267 ElimStorePlain]: Start of recursive call 4: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-04-12 13:52:42,540 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-04-12 13:52:42,540 INFO L202 ElimStorePlain]: Needed 6 recursive calls to eliminate 4 variables, input treesize:37, output treesize:57 [2018-04-12 13:52:42,571 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 13:52:42,572 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 13:52:42,572 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 29 [2018-04-12 13:52:42,573 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 13:52:42,581 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 13:52:42,582 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:73, output treesize:29 [2018-04-12 13:52:42,602 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 21 [2018-04-12 13:52:42,611 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2018-04-12 13:52:42,611 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 13:52:42,616 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 13:52:42,619 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-12 13:52:42,620 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:40, output treesize:29 [2018-04-12 13:52:42,645 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 24 [2018-04-12 13:52:42,646 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2018-04-12 13:52:42,647 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 13:52:42,650 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 5 [2018-04-12 13:52:42,650 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-12 13:52:42,651 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 13:52:42,652 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 13:52:42,652 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 3 variables, input treesize:33, output treesize:5 [2018-04-12 13:52:42,677 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 6 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 13:52:42,694 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 13:52:42,694 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19] total 27 [2018-04-12 13:52:42,695 INFO L442 AbstractCegarLoop]: Interpolant automaton has 28 states [2018-04-12 13:52:42,695 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2018-04-12 13:52:42,695 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=76, Invalid=680, Unknown=0, NotChecked=0, Total=756 [2018-04-12 13:52:42,695 INFO L87 Difference]: Start difference. First operand 219 states and 246 transitions. Second operand 28 states. [2018-04-12 13:52:43,432 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 13:52:43,433 INFO L93 Difference]: Finished difference Result 263 states and 295 transitions. [2018-04-12 13:52:43,433 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2018-04-12 13:52:43,433 INFO L78 Accepts]: Start accepts. Automaton has 28 states. Word has length 67 [2018-04-12 13:52:43,433 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 13:52:43,433 INFO L225 Difference]: With dead ends: 263 [2018-04-12 13:52:43,434 INFO L226 Difference]: Without dead ends: 263 [2018-04-12 13:52:43,434 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 109 GetRequests, 54 SyntacticMatches, 9 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 497 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=235, Invalid=2021, Unknown=0, NotChecked=0, Total=2256 [2018-04-12 13:52:43,434 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 263 states. [2018-04-12 13:52:43,436 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 263 to 234. [2018-04-12 13:52:43,436 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 234 states. [2018-04-12 13:52:43,437 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 234 states to 234 states and 264 transitions. [2018-04-12 13:52:43,437 INFO L78 Accepts]: Start accepts. Automaton has 234 states and 264 transitions. Word has length 67 [2018-04-12 13:52:43,437 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 13:52:43,437 INFO L459 AbstractCegarLoop]: Abstraction has 234 states and 264 transitions. [2018-04-12 13:52:43,437 INFO L460 AbstractCegarLoop]: Interpolant automaton has 28 states. [2018-04-12 13:52:43,437 INFO L276 IsEmpty]: Start isEmpty. Operand 234 states and 264 transitions. [2018-04-12 13:52:43,437 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2018-04-12 13:52:43,437 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 13:52:43,437 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 13:52:43,437 INFO L408 AbstractCegarLoop]: === Iteration 42 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-04-12 13:52:43,438 INFO L82 PathProgramCache]: Analyzing trace with hash -562675973, now seen corresponding path program 1 times [2018-04-12 13:52:43,438 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 13:52:43,438 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 13:52:43,438 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 13:52:43,438 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 13:52:43,438 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 13:52:43,451 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 13:52:43,451 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 13:52:43,702 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 7 proven. 11 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-04-12 13:52:43,702 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-12 13:52:43,702 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-12 13:52:43,707 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 13:52:43,734 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 13:52:43,737 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 13:52:43,826 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-04-12 13:52:43,828 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-12 13:52:43,828 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 13:52:43,830 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 13:52:43,845 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-04-12 13:52:43,847 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-12 13:52:43,847 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-12 13:52:43,849 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 13:52:43,858 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 13:52:43,858 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:34, output treesize:26 [2018-04-12 13:52:43,894 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 19 treesize of output 31 [2018-04-12 13:52:43,896 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-04-12 13:52:43,897 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 13:52:43,914 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 17 treesize of output 22 [2018-04-12 13:52:43,915 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 2 xjuncts. [2018-04-12 13:52:43,925 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-12 13:52:43,952 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 19 treesize of output 31 [2018-04-12 13:52:43,954 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-04-12 13:52:43,955 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-04-12 13:52:43,981 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 17 treesize of output 22 [2018-04-12 13:52:43,981 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 2 xjuncts. [2018-04-12 13:52:43,991 INFO L267 ElimStorePlain]: Start of recursive call 5: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-12 13:52:44,012 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 4 xjuncts. [2018-04-12 13:52:44,012 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 4 variables, input treesize:42, output treesize:139 [2018-04-12 13:52:44,099 WARN L307 Elim1Store]: Array PQE input equivalent to false [2018-04-12 13:52:44,099 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 13:52:44,109 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 13:52:44,110 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 13:52:44,111 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 8 [2018-04-12 13:52:44,111 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 13:52:44,117 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 13:52:44,117 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:81, output treesize:42 [2018-04-12 13:52:44,192 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 69 treesize of output 56 [2018-04-12 13:52:44,194 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 3 [2018-04-12 13:52:44,194 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 13:52:44,200 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 27 [2018-04-12 13:52:44,201 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-12 13:52:44,207 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-12 13:52:44,215 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2018-04-12 13:52:44,216 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2018-04-12 13:52:44,216 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-12 13:52:44,221 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2018-04-12 13:52:44,221 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-04-12 13:52:44,222 INFO L267 ElimStorePlain]: Start of recursive call 5: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 13:52:44,226 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 13:52:44,226 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 3 variables, input treesize:69, output treesize:7 [2018-04-12 13:52:44,252 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 6 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 13:52:44,281 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 13:52:44,281 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19] total 27 [2018-04-12 13:52:44,281 INFO L442 AbstractCegarLoop]: Interpolant automaton has 27 states [2018-04-12 13:52:44,282 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2018-04-12 13:52:44,282 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=73, Invalid=627, Unknown=2, NotChecked=0, Total=702 [2018-04-12 13:52:44,282 INFO L87 Difference]: Start difference. First operand 234 states and 264 transitions. Second operand 27 states. [2018-04-12 13:52:45,045 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 13:52:45,045 INFO L93 Difference]: Finished difference Result 256 states and 286 transitions. [2018-04-12 13:52:45,045 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2018-04-12 13:52:45,045 INFO L78 Accepts]: Start accepts. Automaton has 27 states. Word has length 60 [2018-04-12 13:52:45,045 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 13:52:45,046 INFO L225 Difference]: With dead ends: 256 [2018-04-12 13:52:45,046 INFO L226 Difference]: Without dead ends: 256 [2018-04-12 13:52:45,047 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 101 GetRequests, 47 SyntacticMatches, 8 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 514 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=251, Invalid=2003, Unknown=2, NotChecked=0, Total=2256 [2018-04-12 13:52:45,047 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 256 states. [2018-04-12 13:52:45,049 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 256 to 238. [2018-04-12 13:52:45,049 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 238 states. [2018-04-12 13:52:45,049 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 238 states to 238 states and 266 transitions. [2018-04-12 13:52:45,049 INFO L78 Accepts]: Start accepts. Automaton has 238 states and 266 transitions. Word has length 60 [2018-04-12 13:52:45,049 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 13:52:45,050 INFO L459 AbstractCegarLoop]: Abstraction has 238 states and 266 transitions. [2018-04-12 13:52:45,050 INFO L460 AbstractCegarLoop]: Interpolant automaton has 27 states. [2018-04-12 13:52:45,050 INFO L276 IsEmpty]: Start isEmpty. Operand 238 states and 266 transitions. [2018-04-12 13:52:45,050 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2018-04-12 13:52:45,050 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 13:52:45,050 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 13:52:45,050 INFO L408 AbstractCegarLoop]: === Iteration 43 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-04-12 13:52:45,050 INFO L82 PathProgramCache]: Analyzing trace with hash -1522120988, now seen corresponding path program 1 times [2018-04-12 13:52:45,050 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 13:52:45,050 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 13:52:45,051 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 13:52:45,051 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 13:52:45,051 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 13:52:45,067 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 13:52:45,068 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 13:52:45,373 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 7 proven. 11 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-04-12 13:52:45,373 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-12 13:52:45,373 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-12 13:52:45,379 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 13:52:45,411 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 13:52:45,415 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 13:52:45,608 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-04-12 13:52:45,609 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-12 13:52:45,609 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 13:52:45,611 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 13:52:45,619 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-04-12 13:52:45,620 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-12 13:52:45,620 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-12 13:52:45,621 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 13:52:45,627 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 13:52:45,628 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:39, output treesize:28 [2018-04-12 13:52:45,665 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 21 treesize of output 33 [2018-04-12 13:52:45,667 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 21 [2018-04-12 13:52:45,668 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 13:52:45,686 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 19 treesize of output 27 [2018-04-12 13:52:45,686 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-04-12 13:52:45,696 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-04-12 13:52:45,717 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 19 treesize of output 31 [2018-04-12 13:52:45,719 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-04-12 13:52:45,719 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-04-12 13:52:45,743 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 17 treesize of output 22 [2018-04-12 13:52:45,744 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 2 xjuncts. [2018-04-12 13:52:45,758 INFO L267 ElimStorePlain]: Start of recursive call 5: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-12 13:52:45,796 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: 2 dim-0 vars, and 4 xjuncts. [2018-04-12 13:52:45,796 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 4 variables, input treesize:44, output treesize:153 [2018-04-12 13:52:45,853 WARN L307 Elim1Store]: Array PQE input equivalent to false [2018-04-12 13:52:45,853 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 13:52:45,860 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 13:52:45,861 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 13:52:45,861 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 8 [2018-04-12 13:52:45,861 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 13:52:45,865 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 13:52:45,866 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:88, output treesize:44 [2018-04-12 13:52:45,921 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 71 treesize of output 58 [2018-04-12 13:52:45,923 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 27 [2018-04-12 13:52:45,923 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-12 13:52:45,929 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 5 [2018-04-12 13:52:45,929 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-12 13:52:45,942 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-12 13:52:45,948 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2018-04-12 13:52:45,949 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 3 [2018-04-12 13:52:45,949 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-04-12 13:52:45,952 INFO L267 ElimStorePlain]: Start of recursive call 5: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 13:52:45,955 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 13:52:45,955 INFO L202 ElimStorePlain]: Needed 6 recursive calls to eliminate 3 variables, input treesize:71, output treesize:9 [2018-04-12 13:52:46,020 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 6 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 13:52:46,039 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 13:52:46,039 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 21] total 35 [2018-04-12 13:52:46,039 INFO L442 AbstractCegarLoop]: Interpolant automaton has 36 states [2018-04-12 13:52:46,039 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2018-04-12 13:52:46,040 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=94, Invalid=1166, Unknown=0, NotChecked=0, Total=1260 [2018-04-12 13:52:46,040 INFO L87 Difference]: Start difference. First operand 238 states and 266 transitions. Second operand 36 states. [2018-04-12 13:52:47,864 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 13:52:47,864 INFO L93 Difference]: Finished difference Result 326 states and 360 transitions. [2018-04-12 13:52:47,865 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 43 states. [2018-04-12 13:52:47,865 INFO L78 Accepts]: Start accepts. Automaton has 36 states. Word has length 67 [2018-04-12 13:52:47,865 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 13:52:47,866 INFO L225 Difference]: With dead ends: 326 [2018-04-12 13:52:47,866 INFO L226 Difference]: Without dead ends: 326 [2018-04-12 13:52:47,867 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 128 GetRequests, 52 SyntacticMatches, 6 SemanticMatches, 70 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1132 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=405, Invalid=4707, Unknown=0, NotChecked=0, Total=5112 [2018-04-12 13:52:47,867 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 326 states. [2018-04-12 13:52:47,869 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 326 to 273. [2018-04-12 13:52:47,870 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 273 states. [2018-04-12 13:52:47,870 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 273 states to 273 states and 304 transitions. [2018-04-12 13:52:47,870 INFO L78 Accepts]: Start accepts. Automaton has 273 states and 304 transitions. Word has length 67 [2018-04-12 13:52:47,871 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 13:52:47,871 INFO L459 AbstractCegarLoop]: Abstraction has 273 states and 304 transitions. [2018-04-12 13:52:47,871 INFO L460 AbstractCegarLoop]: Interpolant automaton has 36 states. [2018-04-12 13:52:47,871 INFO L276 IsEmpty]: Start isEmpty. Operand 273 states and 304 transitions. [2018-04-12 13:52:47,871 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2018-04-12 13:52:47,871 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 13:52:47,871 INFO L355 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 13:52:47,871 INFO L408 AbstractCegarLoop]: === Iteration 44 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-04-12 13:52:47,871 INFO L82 PathProgramCache]: Analyzing trace with hash -363478814, now seen corresponding path program 1 times [2018-04-12 13:52:47,872 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 13:52:47,872 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 13:52:47,872 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 13:52:47,872 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 13:52:47,872 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 13:52:47,879 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 13:52:47,879 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 13:52:47,932 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 3 proven. 27 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2018-04-12 13:52:47,933 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-12 13:52:47,933 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-12 13:52:47,938 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 13:52:47,964 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 13:52:47,966 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 13:52:47,979 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 3 proven. 27 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2018-04-12 13:52:47,998 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 13:52:47,998 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 7 [2018-04-12 13:52:47,998 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-04-12 13:52:47,998 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-04-12 13:52:47,999 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2018-04-12 13:52:47,999 INFO L87 Difference]: Start difference. First operand 273 states and 304 transitions. Second operand 7 states. [2018-04-12 13:52:48,012 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 13:52:48,012 INFO L93 Difference]: Finished difference Result 285 states and 316 transitions. [2018-04-12 13:52:48,012 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-04-12 13:52:48,012 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 74 [2018-04-12 13:52:48,013 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 13:52:48,013 INFO L225 Difference]: With dead ends: 285 [2018-04-12 13:52:48,013 INFO L226 Difference]: Without dead ends: 285 [2018-04-12 13:52:48,013 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 79 GetRequests, 74 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2018-04-12 13:52:48,013 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 285 states. [2018-04-12 13:52:48,015 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 285 to 280. [2018-04-12 13:52:48,015 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 280 states. [2018-04-12 13:52:48,016 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 280 states to 280 states and 311 transitions. [2018-04-12 13:52:48,016 INFO L78 Accepts]: Start accepts. Automaton has 280 states and 311 transitions. Word has length 74 [2018-04-12 13:52:48,016 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 13:52:48,016 INFO L459 AbstractCegarLoop]: Abstraction has 280 states and 311 transitions. [2018-04-12 13:52:48,016 INFO L460 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-04-12 13:52:48,016 INFO L276 IsEmpty]: Start isEmpty. Operand 280 states and 311 transitions. [2018-04-12 13:52:48,017 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2018-04-12 13:52:48,017 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 13:52:48,017 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 13:52:48,017 INFO L408 AbstractCegarLoop]: === Iteration 45 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-04-12 13:52:48,017 INFO L82 PathProgramCache]: Analyzing trace with hash -1382711762, now seen corresponding path program 1 times [2018-04-12 13:52:48,017 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 13:52:48,017 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 13:52:48,017 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 13:52:48,017 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 13:52:48,017 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 13:52:48,022 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 13:52:48,023 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 13:52:48,306 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 13:52:48,306 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 13:52:48,306 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [19] imperfect sequences [] total 19 [2018-04-12 13:52:48,306 INFO L442 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-04-12 13:52:48,306 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-04-12 13:52:48,306 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=50, Invalid=330, Unknown=0, NotChecked=0, Total=380 [2018-04-12 13:52:48,307 INFO L87 Difference]: Start difference. First operand 280 states and 311 transitions. Second operand 20 states. [2018-04-12 13:52:49,101 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 13:52:49,101 INFO L93 Difference]: Finished difference Result 316 states and 350 transitions. [2018-04-12 13:52:49,101 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-04-12 13:52:49,101 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 55 [2018-04-12 13:52:49,101 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 13:52:49,102 INFO L225 Difference]: With dead ends: 316 [2018-04-12 13:52:49,102 INFO L226 Difference]: Without dead ends: 316 [2018-04-12 13:52:49,102 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 38 GetRequests, 4 SyntacticMatches, 2 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 230 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=140, Invalid=982, Unknown=0, NotChecked=0, Total=1122 [2018-04-12 13:52:49,103 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 316 states. [2018-04-12 13:52:49,104 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 316 to 293. [2018-04-12 13:52:49,105 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 293 states. [2018-04-12 13:52:49,105 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 293 states to 293 states and 325 transitions. [2018-04-12 13:52:49,105 INFO L78 Accepts]: Start accepts. Automaton has 293 states and 325 transitions. Word has length 55 [2018-04-12 13:52:49,105 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 13:52:49,105 INFO L459 AbstractCegarLoop]: Abstraction has 293 states and 325 transitions. [2018-04-12 13:52:49,105 INFO L460 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-04-12 13:52:49,105 INFO L276 IsEmpty]: Start isEmpty. Operand 293 states and 325 transitions. [2018-04-12 13:52:49,106 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2018-04-12 13:52:49,106 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 13:52:49,106 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 13:52:49,106 INFO L408 AbstractCegarLoop]: === Iteration 46 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-04-12 13:52:49,106 INFO L82 PathProgramCache]: Analyzing trace with hash 1943956119, now seen corresponding path program 1 times [2018-04-12 13:52:49,106 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 13:52:49,106 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 13:52:49,107 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 13:52:49,107 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 13:52:49,107 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 13:52:49,111 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 13:52:49,112 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 13:52:49,147 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 13:52:49,148 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 13:52:49,148 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-04-12 13:52:49,148 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-04-12 13:52:49,148 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-04-12 13:52:49,148 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-04-12 13:52:49,148 INFO L87 Difference]: Start difference. First operand 293 states and 325 transitions. Second operand 6 states. [2018-04-12 13:52:49,259 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 13:52:49,259 INFO L93 Difference]: Finished difference Result 292 states and 321 transitions. [2018-04-12 13:52:49,259 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-04-12 13:52:49,260 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 55 [2018-04-12 13:52:49,260 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 13:52:49,260 INFO L225 Difference]: With dead ends: 292 [2018-04-12 13:52:49,260 INFO L226 Difference]: Without dead ends: 292 [2018-04-12 13:52:49,261 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2018-04-12 13:52:49,261 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 292 states. [2018-04-12 13:52:49,263 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 292 to 290. [2018-04-12 13:52:49,263 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 290 states. [2018-04-12 13:52:49,264 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 290 states to 290 states and 318 transitions. [2018-04-12 13:52:49,264 INFO L78 Accepts]: Start accepts. Automaton has 290 states and 318 transitions. Word has length 55 [2018-04-12 13:52:49,264 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 13:52:49,264 INFO L459 AbstractCegarLoop]: Abstraction has 290 states and 318 transitions. [2018-04-12 13:52:49,264 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-04-12 13:52:49,264 INFO L276 IsEmpty]: Start isEmpty. Operand 290 states and 318 transitions. [2018-04-12 13:52:49,265 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2018-04-12 13:52:49,265 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 13:52:49,265 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 13:52:49,265 INFO L408 AbstractCegarLoop]: === Iteration 47 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-04-12 13:52:49,265 INFO L82 PathProgramCache]: Analyzing trace with hash -1641106482, now seen corresponding path program 1 times [2018-04-12 13:52:49,266 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 13:52:49,266 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 13:52:49,266 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 13:52:49,266 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 13:52:49,266 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 13:52:49,274 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 13:52:49,275 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 13:52:49,582 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 13:52:49,582 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 13:52:49,583 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [18] imperfect sequences [] total 18 [2018-04-12 13:52:49,583 INFO L442 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-04-12 13:52:49,583 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-04-12 13:52:49,583 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=47, Invalid=295, Unknown=0, NotChecked=0, Total=342 [2018-04-12 13:52:49,583 INFO L87 Difference]: Start difference. First operand 290 states and 318 transitions. Second operand 19 states. [2018-04-12 13:52:50,149 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 13:52:50,149 INFO L93 Difference]: Finished difference Result 314 states and 344 transitions. [2018-04-12 13:52:50,150 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-04-12 13:52:50,150 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 57 [2018-04-12 13:52:50,150 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 13:52:50,151 INFO L225 Difference]: With dead ends: 314 [2018-04-12 13:52:50,151 INFO L226 Difference]: Without dead ends: 314 [2018-04-12 13:52:50,151 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 33 GetRequests, 2 SyntacticMatches, 3 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 140 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=110, Invalid=760, Unknown=0, NotChecked=0, Total=870 [2018-04-12 13:52:50,151 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 314 states. [2018-04-12 13:52:50,153 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 314 to 282. [2018-04-12 13:52:50,153 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 282 states. [2018-04-12 13:52:50,154 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 282 states to 282 states and 310 transitions. [2018-04-12 13:52:50,154 INFO L78 Accepts]: Start accepts. Automaton has 282 states and 310 transitions. Word has length 57 [2018-04-12 13:52:50,154 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 13:52:50,154 INFO L459 AbstractCegarLoop]: Abstraction has 282 states and 310 transitions. [2018-04-12 13:52:50,154 INFO L460 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-04-12 13:52:50,154 INFO L276 IsEmpty]: Start isEmpty. Operand 282 states and 310 transitions. [2018-04-12 13:52:50,154 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2018-04-12 13:52:50,154 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 13:52:50,155 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 13:52:50,155 INFO L408 AbstractCegarLoop]: === Iteration 48 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-04-12 13:52:50,155 INFO L82 PathProgramCache]: Analyzing trace with hash -1817611563, now seen corresponding path program 1 times [2018-04-12 13:52:50,155 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 13:52:50,155 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 13:52:50,155 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 13:52:50,155 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 13:52:50,155 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 13:52:50,161 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 13:52:50,161 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 13:52:50,436 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 13:52:50,437 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 13:52:50,437 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [21] imperfect sequences [] total 21 [2018-04-12 13:52:50,437 INFO L442 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-04-12 13:52:50,437 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-04-12 13:52:50,437 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=57, Invalid=363, Unknown=0, NotChecked=0, Total=420 [2018-04-12 13:52:50,437 INFO L87 Difference]: Start difference. First operand 282 states and 310 transitions. Second operand 21 states. [2018-04-12 13:52:51,059 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 13:52:51,059 INFO L93 Difference]: Finished difference Result 320 states and 347 transitions. [2018-04-12 13:52:51,061 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2018-04-12 13:52:51,061 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 60 [2018-04-12 13:52:51,061 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 13:52:51,062 INFO L225 Difference]: With dead ends: 320 [2018-04-12 13:52:51,063 INFO L226 Difference]: Without dead ends: 309 [2018-04-12 13:52:51,063 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 41 GetRequests, 2 SyntacticMatches, 3 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 277 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=186, Invalid=1220, Unknown=0, NotChecked=0, Total=1406 [2018-04-12 13:52:51,063 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 309 states. [2018-04-12 13:52:51,066 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 309 to 289. [2018-04-12 13:52:51,067 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 289 states. [2018-04-12 13:52:51,067 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 289 states to 289 states and 315 transitions. [2018-04-12 13:52:51,067 INFO L78 Accepts]: Start accepts. Automaton has 289 states and 315 transitions. Word has length 60 [2018-04-12 13:52:51,068 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 13:52:51,068 INFO L459 AbstractCegarLoop]: Abstraction has 289 states and 315 transitions. [2018-04-12 13:52:51,068 INFO L460 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-04-12 13:52:51,068 INFO L276 IsEmpty]: Start isEmpty. Operand 289 states and 315 transitions. [2018-04-12 13:52:51,068 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2018-04-12 13:52:51,069 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 13:52:51,069 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 13:52:51,069 INFO L408 AbstractCegarLoop]: === Iteration 49 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-04-12 13:52:51,069 INFO L82 PathProgramCache]: Analyzing trace with hash 763384283, now seen corresponding path program 1 times [2018-04-12 13:52:51,069 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 13:52:51,069 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 13:52:51,070 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 13:52:51,070 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 13:52:51,070 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 13:52:51,078 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 13:52:51,078 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 13:52:51,496 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 13:52:51,496 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 13:52:51,496 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [25] imperfect sequences [] total 25 [2018-04-12 13:52:51,496 INFO L442 AbstractCegarLoop]: Interpolant automaton has 26 states [2018-04-12 13:52:51,496 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2018-04-12 13:52:51,496 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=86, Invalid=564, Unknown=0, NotChecked=0, Total=650 [2018-04-12 13:52:51,497 INFO L87 Difference]: Start difference. First operand 289 states and 315 transitions. Second operand 26 states. [2018-04-12 13:52:52,292 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 13:52:52,292 INFO L93 Difference]: Finished difference Result 308 states and 334 transitions. [2018-04-12 13:52:52,292 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2018-04-12 13:52:52,292 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 60 [2018-04-12 13:52:52,292 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 13:52:52,293 INFO L225 Difference]: With dead ends: 308 [2018-04-12 13:52:52,293 INFO L226 Difference]: Without dead ends: 308 [2018-04-12 13:52:52,293 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 45 GetRequests, 4 SyntacticMatches, 2 SemanticMatches, 39 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 384 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=188, Invalid=1452, Unknown=0, NotChecked=0, Total=1640 [2018-04-12 13:52:52,293 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 308 states. [2018-04-12 13:52:52,295 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 308 to 289. [2018-04-12 13:52:52,295 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 289 states. [2018-04-12 13:52:52,296 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 289 states to 289 states and 313 transitions. [2018-04-12 13:52:52,296 INFO L78 Accepts]: Start accepts. Automaton has 289 states and 313 transitions. Word has length 60 [2018-04-12 13:52:52,296 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 13:52:52,296 INFO L459 AbstractCegarLoop]: Abstraction has 289 states and 313 transitions. [2018-04-12 13:52:52,296 INFO L460 AbstractCegarLoop]: Interpolant automaton has 26 states. [2018-04-12 13:52:52,296 INFO L276 IsEmpty]: Start isEmpty. Operand 289 states and 313 transitions. [2018-04-12 13:52:52,296 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 62 [2018-04-12 13:52:52,296 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 13:52:52,296 INFO L355 BasicCegarLoop]: trace histogram [5, 4, 4, 4, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 13:52:52,297 INFO L408 AbstractCegarLoop]: === Iteration 50 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-04-12 13:52:52,297 INFO L82 PathProgramCache]: Analyzing trace with hash 897208251, now seen corresponding path program 1 times [2018-04-12 13:52:52,297 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 13:52:52,297 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 13:52:52,297 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 13:52:52,297 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 13:52:52,297 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 13:52:52,302 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 13:52:52,303 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 13:52:52,339 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 0 proven. 50 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 13:52:52,339 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-12 13:52:52,339 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-12 13:52:52,344 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 13:52:52,360 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 13:52:52,361 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 13:52:52,367 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 0 proven. 50 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 13:52:52,384 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 13:52:52,385 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 8 [2018-04-12 13:52:52,385 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-04-12 13:52:52,385 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-04-12 13:52:52,385 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=28, Invalid=28, Unknown=0, NotChecked=0, Total=56 [2018-04-12 13:52:52,385 INFO L87 Difference]: Start difference. First operand 289 states and 313 transitions. Second operand 8 states. [2018-04-12 13:52:52,398 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 13:52:52,399 INFO L93 Difference]: Finished difference Result 301 states and 325 transitions. [2018-04-12 13:52:52,399 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-04-12 13:52:52,399 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 61 [2018-04-12 13:52:52,399 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 13:52:52,399 INFO L225 Difference]: With dead ends: 301 [2018-04-12 13:52:52,400 INFO L226 Difference]: Without dead ends: 301 [2018-04-12 13:52:52,400 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 67 GetRequests, 61 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=28, Invalid=28, Unknown=0, NotChecked=0, Total=56 [2018-04-12 13:52:52,400 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 301 states. [2018-04-12 13:52:52,401 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 301 to 296. [2018-04-12 13:52:52,401 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 296 states. [2018-04-12 13:52:52,402 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 296 states to 296 states and 320 transitions. [2018-04-12 13:52:52,402 INFO L78 Accepts]: Start accepts. Automaton has 296 states and 320 transitions. Word has length 61 [2018-04-12 13:52:52,402 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 13:52:52,403 INFO L459 AbstractCegarLoop]: Abstraction has 296 states and 320 transitions. [2018-04-12 13:52:52,403 INFO L460 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-04-12 13:52:52,403 INFO L276 IsEmpty]: Start isEmpty. Operand 296 states and 320 transitions. [2018-04-12 13:52:52,403 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 63 [2018-04-12 13:52:52,403 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 13:52:52,403 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 13:52:52,403 INFO L408 AbstractCegarLoop]: === Iteration 51 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-04-12 13:52:52,403 INFO L82 PathProgramCache]: Analyzing trace with hash -827109317, now seen corresponding path program 1 times [2018-04-12 13:52:52,403 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 13:52:52,404 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 13:52:52,404 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 13:52:52,404 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 13:52:52,404 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 13:52:52,411 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 13:52:52,412 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 13:52:53,008 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 13:52:53,008 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 13:52:53,008 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [24] imperfect sequences [] total 24 [2018-04-12 13:52:53,008 INFO L442 AbstractCegarLoop]: Interpolant automaton has 25 states [2018-04-12 13:52:53,009 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2018-04-12 13:52:53,009 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=522, Unknown=0, NotChecked=0, Total=600 [2018-04-12 13:52:53,009 INFO L87 Difference]: Start difference. First operand 296 states and 320 transitions. Second operand 25 states. [2018-04-12 13:52:53,721 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 13:52:53,721 INFO L93 Difference]: Finished difference Result 314 states and 339 transitions. [2018-04-12 13:52:53,721 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2018-04-12 13:52:53,721 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 62 [2018-04-12 13:52:53,722 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 13:52:53,722 INFO L225 Difference]: With dead ends: 314 [2018-04-12 13:52:53,722 INFO L226 Difference]: Without dead ends: 314 [2018-04-12 13:52:53,723 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 44 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 369 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=197, Invalid=1525, Unknown=0, NotChecked=0, Total=1722 [2018-04-12 13:52:53,723 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 314 states. [2018-04-12 13:52:53,725 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 314 to 274. [2018-04-12 13:52:53,725 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 274 states. [2018-04-12 13:52:53,725 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 274 states to 274 states and 296 transitions. [2018-04-12 13:52:53,726 INFO L78 Accepts]: Start accepts. Automaton has 274 states and 296 transitions. Word has length 62 [2018-04-12 13:52:53,726 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 13:52:53,726 INFO L459 AbstractCegarLoop]: Abstraction has 274 states and 296 transitions. [2018-04-12 13:52:53,726 INFO L460 AbstractCegarLoop]: Interpolant automaton has 25 states. [2018-04-12 13:52:53,726 INFO L276 IsEmpty]: Start isEmpty. Operand 274 states and 296 transitions. [2018-04-12 13:52:53,726 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 76 [2018-04-12 13:52:53,726 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 13:52:53,726 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 13:52:53,726 INFO L408 AbstractCegarLoop]: === Iteration 52 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-04-12 13:52:53,727 INFO L82 PathProgramCache]: Analyzing trace with hash 560414577, now seen corresponding path program 1 times [2018-04-12 13:52:53,727 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 13:52:53,727 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 13:52:53,727 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 13:52:53,727 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 13:52:53,727 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 13:52:53,732 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 13:52:53,733 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 13:52:53,815 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 12 proven. 4 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-04-12 13:52:53,815 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-12 13:52:53,815 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-12 13:52:53,821 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 13:52:53,842 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 13:52:53,844 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 13:52:53,878 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-04-12 13:52:53,879 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-12 13:52:53,879 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 13:52:53,880 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 13:52:53,882 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 13:52:53,882 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:17, output treesize:9 [2018-04-12 13:52:53,884 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 13:52:53,885 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 13:52:53,885 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 8 [2018-04-12 13:52:53,885 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 13:52:53,888 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 13:52:53,888 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:18, output treesize:12 [2018-04-12 13:52:53,908 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1 [2018-04-12 13:52:53,908 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 13:52:53,910 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-12 13:52:53,910 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:17, output treesize:12 [2018-04-12 13:52:59,924 WARN L148 SmtUtils]: Spent 2003ms on a formula simplification that was a NOOP. DAG size: 12 [2018-04-12 13:52:59,937 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 12 [2018-04-12 13:52:59,937 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2018-04-12 13:52:59,938 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 13:52:59,938 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 13:52:59,940 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 13:52:59,940 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:21, output treesize:10 [2018-04-12 13:52:59,942 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 13:52:59,942 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 21 [2018-04-12 13:52:59,942 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 13:52:59,945 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-12 13:52:59,945 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:16, output treesize:11 [2018-04-12 13:52:59,961 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 6 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 13:52:59,979 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 13:52:59,979 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 15] total 17 [2018-04-12 13:52:59,980 INFO L442 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-04-12 13:52:59,980 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-04-12 13:52:59,980 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=49, Invalid=255, Unknown=2, NotChecked=0, Total=306 [2018-04-12 13:52:59,980 INFO L87 Difference]: Start difference. First operand 274 states and 296 transitions. Second operand 18 states. [2018-04-12 13:53:28,146 WARN L148 SmtUtils]: Spent 2004ms on a formula simplification that was a NOOP. DAG size: 16 [2018-04-12 13:53:32,167 WARN L148 SmtUtils]: Spent 2005ms on a formula simplification that was a NOOP. DAG size: 21 [2018-04-12 13:54:05,771 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 13:54:05,772 INFO L93 Difference]: Finished difference Result 316 states and 339 transitions. [2018-04-12 13:54:05,772 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-04-12 13:54:05,772 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 75 [2018-04-12 13:54:05,772 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 13:54:05,773 INFO L225 Difference]: With dead ends: 316 [2018-04-12 13:54:05,773 INFO L226 Difference]: Without dead ends: 305 [2018-04-12 13:54:05,773 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 99 GetRequests, 66 SyntacticMatches, 4 SemanticMatches, 29 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 201 ImplicationChecksByTransitivity, 20.2s TimeCoverageRelationStatistics Valid=150, Invalid=773, Unknown=7, NotChecked=0, Total=930 [2018-04-12 13:54:05,773 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 305 states. [2018-04-12 13:54:05,775 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 305 to 204. [2018-04-12 13:54:05,775 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 204 states. [2018-04-12 13:54:05,775 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 204 states to 204 states and 218 transitions. [2018-04-12 13:54:05,776 INFO L78 Accepts]: Start accepts. Automaton has 204 states and 218 transitions. Word has length 75 [2018-04-12 13:54:05,776 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 13:54:05,776 INFO L459 AbstractCegarLoop]: Abstraction has 204 states and 218 transitions. [2018-04-12 13:54:05,776 INFO L460 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-04-12 13:54:05,776 INFO L276 IsEmpty]: Start isEmpty. Operand 204 states and 218 transitions. [2018-04-12 13:54:05,776 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2018-04-12 13:54:05,776 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 13:54:05,776 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 13:54:05,776 INFO L408 AbstractCegarLoop]: === Iteration 53 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-04-12 13:54:05,777 INFO L82 PathProgramCache]: Analyzing trace with hash 689621497, now seen corresponding path program 1 times [2018-04-12 13:54:05,777 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 13:54:05,777 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 13:54:05,777 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 13:54:05,777 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 13:54:05,777 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 13:54:05,788 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 13:54:05,789 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 13:54:06,242 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 13:54:06,243 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 13:54:06,243 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [24] imperfect sequences [] total 24 [2018-04-12 13:54:06,243 INFO L442 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-04-12 13:54:06,243 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-04-12 13:54:06,243 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=64, Invalid=488, Unknown=0, NotChecked=0, Total=552 [2018-04-12 13:54:06,243 INFO L87 Difference]: Start difference. First operand 204 states and 218 transitions. Second operand 24 states. [2018-04-12 13:54:07,201 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 13:54:07,202 INFO L93 Difference]: Finished difference Result 240 states and 258 transitions. [2018-04-12 13:54:07,202 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2018-04-12 13:54:07,202 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 65 [2018-04-12 13:54:07,202 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 13:54:07,203 INFO L225 Difference]: With dead ends: 240 [2018-04-12 13:54:07,203 INFO L226 Difference]: Without dead ends: 233 [2018-04-12 13:54:07,203 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 51 GetRequests, 3 SyntacticMatches, 4 SemanticMatches, 44 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 473 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=211, Invalid=1859, Unknown=0, NotChecked=0, Total=2070 [2018-04-12 13:54:07,203 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 233 states. [2018-04-12 13:54:07,208 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 233 to 213. [2018-04-12 13:54:07,208 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 213 states. [2018-04-12 13:54:07,208 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 213 states to 213 states and 228 transitions. [2018-04-12 13:54:07,209 INFO L78 Accepts]: Start accepts. Automaton has 213 states and 228 transitions. Word has length 65 [2018-04-12 13:54:07,209 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 13:54:07,209 INFO L459 AbstractCegarLoop]: Abstraction has 213 states and 228 transitions. [2018-04-12 13:54:07,209 INFO L460 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-04-12 13:54:07,209 INFO L276 IsEmpty]: Start isEmpty. Operand 213 states and 228 transitions. [2018-04-12 13:54:07,210 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 74 [2018-04-12 13:54:07,210 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 13:54:07,210 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 13:54:07,210 INFO L408 AbstractCegarLoop]: === Iteration 54 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-04-12 13:54:07,210 INFO L82 PathProgramCache]: Analyzing trace with hash 1592487693, now seen corresponding path program 1 times [2018-04-12 13:54:07,211 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 13:54:07,211 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 13:54:07,211 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 13:54:07,211 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 13:54:07,212 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 13:54:07,223 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 13:54:07,224 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 13:54:07,732 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 14 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 13:54:07,732 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-12 13:54:07,732 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-12 13:54:07,737 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 13:54:07,761 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 13:54:07,764 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 13:54:07,788 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-04-12 13:54:07,804 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-12 13:54:07,804 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 13:54:07,805 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 13:54:07,808 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 13:54:07,808 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:17, output treesize:9 [2018-04-12 13:54:08,021 WARN L1033 $PredicateComparison]: unable to prove that (exists ((__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_~node~0.base Int) (|__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_#t~ret14.base| Int)) (and (= |c_#memory_$Pointer$.base| (let ((.cse0 (store |c_old(#memory_$Pointer$.base)| __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_~node~0.base (store (store (select |c_old(#memory_$Pointer$.base)| __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_~node~0.base) 4 (select (select |c_old(#memory_$Pointer$.base)| |c___U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_#in~pointerToList.base|) |c___U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_#in~pointerToList.offset|)) 0 |__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_#t~ret14.base|)))) (store .cse0 |c___U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_#in~pointerToList.base| (store (select .cse0 |c___U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_#in~pointerToList.base|) |c___U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_#in~pointerToList.offset| __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_~node~0.base)))) (= (select |c_old(#valid)| __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_~node~0.base) 0) (= |c_#valid| (store |c_old(#valid)| __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_~node~0.base 1)))) is different from true [2018-04-12 13:54:08,041 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 13:54:08,042 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 13:54:08,043 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 33 [2018-04-12 13:54:08,043 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 13:54:08,077 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 57 treesize of output 47 [2018-04-12 13:54:08,080 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 13:54:08,080 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 45 [2018-04-12 13:54:08,083 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 42 [2018-04-12 13:54:08,084 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-12 13:54:08,090 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 13:54:08,128 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 27 [2018-04-12 13:54:08,131 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 13:54:08,134 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 29 [2018-04-12 13:54:08,134 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-04-12 13:54:08,140 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 13:54:08,147 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 13:54:08,153 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 48 [2018-04-12 13:54:08,155 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 18 [2018-04-12 13:54:08,159 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 19 [2018-04-12 13:54:08,159 INFO L267 ElimStorePlain]: Start of recursive call 10: End of recursive call: and 1 xjuncts. [2018-04-12 13:54:08,163 INFO L267 ElimStorePlain]: Start of recursive call 9: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 13:54:08,174 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 13:54:08,176 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 42 [2018-04-12 13:54:08,177 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 25 [2018-04-12 13:54:08,178 INFO L267 ElimStorePlain]: Start of recursive call 12: End of recursive call: and 1 xjuncts. [2018-04-12 13:54:08,183 INFO L267 ElimStorePlain]: Start of recursive call 11: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 13:54:08,188 INFO L267 ElimStorePlain]: Start of recursive call 8: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 13:54:08,199 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 2 xjuncts. [2018-04-12 13:54:08,200 INFO L202 ElimStorePlain]: Needed 12 recursive calls to eliminate 4 variables, input treesize:65, output treesize:84 [2018-04-12 13:54:08,319 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 16 [2018-04-12 13:54:08,319 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 13:54:08,321 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-12 13:54:08,322 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:42, output treesize:20 [2018-04-12 13:54:08,381 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 21 [2018-04-12 13:54:08,382 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2018-04-12 13:54:08,383 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 13:54:08,384 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 13:54:08,390 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 13:54:08,390 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:73, output treesize:62 [2018-04-12 13:54:08,462 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 13:54:08,462 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 53 [2018-04-12 13:54:08,462 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 13:54:08,467 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 13:54:08,467 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:63, output treesize:37 [2018-04-12 13:54:08,494 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 13:54:08,495 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 13:54:08,496 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 42 treesize of output 50 [2018-04-12 13:54:08,507 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 38 [2018-04-12 13:54:08,508 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-12 13:54:08,513 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-12 13:54:08,519 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-12 13:54:08,519 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:50, output treesize:34 [2018-04-12 13:54:08,559 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 13:54:08,560 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 24 [2018-04-12 13:54:08,562 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 5 [2018-04-12 13:54:08,562 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 13:54:08,567 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 5 [2018-04-12 13:54:08,567 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-12 13:54:08,568 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 13:54:08,571 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-04-12 13:54:08,571 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 3 variables, input treesize:38, output treesize:16 [2018-04-12 13:54:08,613 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 18 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 2 not checked. [2018-04-12 13:54:08,632 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 13:54:08,632 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 25] total 39 [2018-04-12 13:54:08,633 INFO L442 AbstractCegarLoop]: Interpolant automaton has 40 states [2018-04-12 13:54:08,633 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 40 interpolants. [2018-04-12 13:54:08,633 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=142, Invalid=1340, Unknown=4, NotChecked=74, Total=1560 [2018-04-12 13:54:08,633 INFO L87 Difference]: Start difference. First operand 213 states and 228 transitions. Second operand 40 states. [2018-04-12 13:54:12,252 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 13:54:12,252 INFO L93 Difference]: Finished difference Result 256 states and 279 transitions. [2018-04-12 13:54:12,253 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2018-04-12 13:54:12,253 INFO L78 Accepts]: Start accepts. Automaton has 40 states. Word has length 73 [2018-04-12 13:54:12,253 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 13:54:12,254 INFO L225 Difference]: With dead ends: 256 [2018-04-12 13:54:12,254 INFO L226 Difference]: Without dead ends: 256 [2018-04-12 13:54:12,254 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 125 GetRequests, 54 SyntacticMatches, 8 SemanticMatches, 63 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 1071 ImplicationChecksByTransitivity, 1.6s TimeCoverageRelationStatistics Valid=372, Invalid=3654, Unknown=10, NotChecked=124, Total=4160 [2018-04-12 13:54:12,254 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 256 states. [2018-04-12 13:54:12,257 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 256 to 225. [2018-04-12 13:54:12,257 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 225 states. [2018-04-12 13:54:12,258 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 225 states to 225 states and 242 transitions. [2018-04-12 13:54:12,258 INFO L78 Accepts]: Start accepts. Automaton has 225 states and 242 transitions. Word has length 73 [2018-04-12 13:54:12,258 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 13:54:12,259 INFO L459 AbstractCegarLoop]: Abstraction has 225 states and 242 transitions. [2018-04-12 13:54:12,259 INFO L460 AbstractCegarLoop]: Interpolant automaton has 40 states. [2018-04-12 13:54:12,259 INFO L276 IsEmpty]: Start isEmpty. Operand 225 states and 242 transitions. [2018-04-12 13:54:12,259 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 74 [2018-04-12 13:54:12,259 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 13:54:12,260 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 13:54:12,260 INFO L408 AbstractCegarLoop]: === Iteration 55 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-04-12 13:54:12,260 INFO L82 PathProgramCache]: Analyzing trace with hash 1592487694, now seen corresponding path program 1 times [2018-04-12 13:54:12,260 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 13:54:12,260 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 13:54:12,261 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 13:54:12,261 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 13:54:12,261 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 13:54:12,273 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 13:54:12,274 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 13:54:13,104 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 8 proven. 17 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 13:54:13,104 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-12 13:54:13,104 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-12 13:54:13,119 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 13:54:13,150 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 13:54:13,154 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 13:54:13,296 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-04-12 13:54:13,298 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-12 13:54:13,298 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 13:54:13,299 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 13:54:13,306 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-04-12 13:54:13,307 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-12 13:54:13,308 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-12 13:54:13,309 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 13:54:13,313 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 13:54:13,314 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:33, output treesize:26 [2018-04-12 13:54:13,613 WARN L1033 $PredicateComparison]: unable to prove that (exists ((__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_~node~0.base Int) (|__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_#t~ret14.offset| Int) (|__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_#t~ret14.base| Int)) (and (= |c_#length| (store |c_old(#length)| __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_~node~0.base 8)) (= |c_#memory_$Pointer$.base| (let ((.cse0 (store |c_old(#memory_$Pointer$.base)| __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_~node~0.base (store (store (select |c_old(#memory_$Pointer$.base)| __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_~node~0.base) 4 (select (select |c_old(#memory_$Pointer$.base)| |c___U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_#in~pointerToList.base|) |c___U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_#in~pointerToList.offset|)) 0 |__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_#t~ret14.base|)))) (store .cse0 |c___U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_#in~pointerToList.base| (store (select .cse0 |c___U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_#in~pointerToList.base|) |c___U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_#in~pointerToList.offset| __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_~node~0.base)))) (= (select |c_old(#valid)| __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_~node~0.base) 0) (= |c_#memory_$Pointer$.offset| (let ((.cse1 (store |c_old(#memory_$Pointer$.offset)| __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_~node~0.base (store (store (select |c_old(#memory_$Pointer$.offset)| __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_~node~0.base) 4 (select (select |c_old(#memory_$Pointer$.offset)| |c___U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_#in~pointerToList.base|) |c___U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_#in~pointerToList.offset|)) 0 |__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_#t~ret14.offset|)))) (store .cse1 |c___U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_#in~pointerToList.base| (store (select .cse1 |c___U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_#in~pointerToList.base|) |c___U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_#in~pointerToList.offset| 0)))))) is different from true [2018-04-12 13:54:13,697 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 13:54:13,699 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 13:54:13,699 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 8 [2018-04-12 13:54:13,699 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 13:54:13,778 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 23 [2018-04-12 13:54:13,778 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 13:54:13,848 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 57 treesize of output 47 [2018-04-12 13:54:13,850 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 13:54:13,850 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 45 [2018-04-12 13:54:13,853 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 42 [2018-04-12 13:54:13,854 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-04-12 13:54:13,860 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 13:54:13,871 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 27 [2018-04-12 13:54:13,873 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 13:54:13,874 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 29 [2018-04-12 13:54:13,875 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 1 xjuncts. [2018-04-12 13:54:13,879 INFO L267 ElimStorePlain]: Start of recursive call 7: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 13:54:13,885 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 13:54:13,892 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 48 [2018-04-12 13:54:13,894 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 18 [2018-04-12 13:54:13,897 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 19 [2018-04-12 13:54:13,897 INFO L267 ElimStorePlain]: Start of recursive call 11: End of recursive call: and 1 xjuncts. [2018-04-12 13:54:13,901 INFO L267 ElimStorePlain]: Start of recursive call 10: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 13:54:13,917 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 13:54:13,918 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 42 [2018-04-12 13:54:13,920 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 25 [2018-04-12 13:54:13,921 INFO L267 ElimStorePlain]: Start of recursive call 13: End of recursive call: and 1 xjuncts. [2018-04-12 13:54:13,927 INFO L267 ElimStorePlain]: Start of recursive call 12: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 13:54:13,935 INFO L267 ElimStorePlain]: Start of recursive call 9: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 13:54:13,968 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 39 [2018-04-12 13:54:13,971 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 13:54:13,971 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 37 [2018-04-12 13:54:13,974 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 33 [2018-04-12 13:54:13,974 INFO L267 ElimStorePlain]: Start of recursive call 16: End of recursive call: and 1 xjuncts. [2018-04-12 13:54:13,979 INFO L267 ElimStorePlain]: Start of recursive call 15: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 13:54:13,985 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 19 [2018-04-12 13:54:13,987 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 13:54:13,992 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 19 [2018-04-12 13:54:13,992 INFO L267 ElimStorePlain]: Start of recursive call 18: End of recursive call: and 1 xjuncts. [2018-04-12 13:54:13,995 INFO L267 ElimStorePlain]: Start of recursive call 17: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 13:54:13,999 INFO L267 ElimStorePlain]: Start of recursive call 14: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 13:54:14,003 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 38 [2018-04-12 13:54:14,005 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 18 [2018-04-12 13:54:14,008 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 19 [2018-04-12 13:54:14,008 INFO L267 ElimStorePlain]: Start of recursive call 21: End of recursive call: and 1 xjuncts. [2018-04-12 13:54:14,011 INFO L267 ElimStorePlain]: Start of recursive call 20: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 13:54:14,027 INFO L682 Elim1Store]: detected equality via solver [2018-04-12 13:54:14,028 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 34 [2018-04-12 13:54:14,030 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2018-04-12 13:54:14,030 INFO L267 ElimStorePlain]: Start of recursive call 23: End of recursive call: and 1 xjuncts. [2018-04-12 13:54:14,034 INFO L267 ElimStorePlain]: Start of recursive call 22: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 13:54:14,039 INFO L267 ElimStorePlain]: Start of recursive call 19: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 13:54:14,064 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-1 vars, 2 dim-2 vars, End of recursive call: and 4 xjuncts. [2018-04-12 13:54:14,064 INFO L202 ElimStorePlain]: Needed 23 recursive calls to eliminate 7 variables, input treesize:122, output treesize:254 [2018-04-12 13:54:14,440 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-04-12 13:54:14,440 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 13:54:14,450 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 13:54:14,451 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:112, output treesize:111 [2018-04-12 13:54:14,501 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 13:54:14,502 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 13:54:14,502 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 8 [2018-04-12 13:54:14,503 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 13:54:14,518 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 13:54:14,520 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 123 treesize of output 117 [2018-04-12 13:54:14,522 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 120 treesize of output 97 [2018-04-12 13:54:14,522 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-12 13:54:14,533 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-12 13:54:14,545 INFO L682 Elim1Store]: detected equality via solver [2018-04-12 13:54:14,546 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 71 treesize of output 77 [2018-04-12 13:54:14,548 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 84 [2018-04-12 13:54:14,548 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-04-12 13:54:14,554 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 13:54:14,562 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, 2 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-12 13:54:14,562 INFO L202 ElimStorePlain]: Needed 6 recursive calls to eliminate 3 variables, input treesize:132, output treesize:81 [2018-04-12 13:54:14,609 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 42 [2018-04-12 13:54:14,611 INFO L682 Elim1Store]: detected equality via solver [2018-04-12 13:54:14,611 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 23 [2018-04-12 13:54:14,611 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 13:54:14,617 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 10 [2018-04-12 13:54:14,617 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-12 13:54:14,620 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 13:54:14,627 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 28 [2018-04-12 13:54:14,629 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 15 [2018-04-12 13:54:14,629 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-04-12 13:54:14,632 INFO L682 Elim1Store]: detected equality via solver [2018-04-12 13:54:14,633 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 9 [2018-04-12 13:54:14,633 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-04-12 13:54:14,634 INFO L267 ElimStorePlain]: Start of recursive call 5: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 13:54:14,639 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-12 13:54:14,639 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 4 variables, input treesize:92, output treesize:18 [2018-04-12 13:54:14,687 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 7 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 2 not checked. [2018-04-12 13:54:14,704 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 13:54:14,705 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 28] total 47 [2018-04-12 13:54:14,705 INFO L442 AbstractCegarLoop]: Interpolant automaton has 48 states [2018-04-12 13:54:14,705 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 48 interpolants. [2018-04-12 13:54:14,705 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=206, Invalid=1953, Unknown=7, NotChecked=90, Total=2256 [2018-04-12 13:54:14,705 INFO L87 Difference]: Start difference. First operand 225 states and 242 transitions. Second operand 48 states. [2018-04-12 13:54:15,318 WARN L151 SmtUtils]: Spent 173ms on a formula simplification. DAG size of input: 101 DAG size of output 75 [2018-04-12 13:54:17,083 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 13:54:17,083 INFO L93 Difference]: Finished difference Result 296 states and 327 transitions. [2018-04-12 13:54:17,083 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 41 states. [2018-04-12 13:54:17,083 INFO L78 Accepts]: Start accepts. Automaton has 48 states. Word has length 73 [2018-04-12 13:54:17,084 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 13:54:17,084 INFO L225 Difference]: With dead ends: 296 [2018-04-12 13:54:17,084 INFO L226 Difference]: Without dead ends: 296 [2018-04-12 13:54:17,085 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 134 GetRequests, 51 SyntacticMatches, 6 SemanticMatches, 77 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 1933 ImplicationChecksByTransitivity, 2.8s TimeCoverageRelationStatistics Valid=595, Invalid=5396, Unknown=19, NotChecked=152, Total=6162 [2018-04-12 13:54:17,085 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 296 states. [2018-04-12 13:54:17,089 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 296 to 254. [2018-04-12 13:54:17,089 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 254 states. [2018-04-12 13:54:17,090 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 254 states to 254 states and 276 transitions. [2018-04-12 13:54:17,090 INFO L78 Accepts]: Start accepts. Automaton has 254 states and 276 transitions. Word has length 73 [2018-04-12 13:54:17,090 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 13:54:17,090 INFO L459 AbstractCegarLoop]: Abstraction has 254 states and 276 transitions. [2018-04-12 13:54:17,090 INFO L460 AbstractCegarLoop]: Interpolant automaton has 48 states. [2018-04-12 13:54:17,091 INFO L276 IsEmpty]: Start isEmpty. Operand 254 states and 276 transitions. [2018-04-12 13:54:17,091 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2018-04-12 13:54:17,091 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 13:54:17,091 INFO L355 BasicCegarLoop]: trace histogram [6, 5, 5, 5, 5, 5, 5, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 13:54:17,092 INFO L408 AbstractCegarLoop]: === Iteration 56 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-04-12 13:54:17,092 INFO L82 PathProgramCache]: Analyzing trace with hash -1288339126, now seen corresponding path program 1 times [2018-04-12 13:54:17,092 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 13:54:17,092 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 13:54:17,092 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 13:54:17,093 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 13:54:17,093 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 13:54:17,104 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 13:54:17,106 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 13:54:17,141 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 6 proven. 80 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2018-04-12 13:54:17,141 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-12 13:54:17,141 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-12 13:54:17,147 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 13:54:17,172 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 13:54:17,174 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 13:54:17,180 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 6 proven. 80 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2018-04-12 13:54:17,200 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 13:54:17,200 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8] total 9 [2018-04-12 13:54:17,200 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-04-12 13:54:17,200 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-04-12 13:54:17,200 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=36, Invalid=36, Unknown=0, NotChecked=0, Total=72 [2018-04-12 13:54:17,200 INFO L87 Difference]: Start difference. First operand 254 states and 276 transitions. Second operand 9 states. [2018-04-12 13:54:17,216 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 13:54:17,216 INFO L93 Difference]: Finished difference Result 266 states and 288 transitions. [2018-04-12 13:54:17,217 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-04-12 13:54:17,217 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 95 [2018-04-12 13:54:17,217 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 13:54:17,218 INFO L225 Difference]: With dead ends: 266 [2018-04-12 13:54:17,218 INFO L226 Difference]: Without dead ends: 266 [2018-04-12 13:54:17,218 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 102 GetRequests, 95 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=36, Invalid=36, Unknown=0, NotChecked=0, Total=72 [2018-04-12 13:54:17,218 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 266 states. [2018-04-12 13:54:17,221 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 266 to 261. [2018-04-12 13:54:17,221 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 261 states. [2018-04-12 13:54:17,222 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 261 states to 261 states and 283 transitions. [2018-04-12 13:54:17,222 INFO L78 Accepts]: Start accepts. Automaton has 261 states and 283 transitions. Word has length 95 [2018-04-12 13:54:17,222 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 13:54:17,222 INFO L459 AbstractCegarLoop]: Abstraction has 261 states and 283 transitions. [2018-04-12 13:54:17,222 INFO L460 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-04-12 13:54:17,222 INFO L276 IsEmpty]: Start isEmpty. Operand 261 states and 283 transitions. [2018-04-12 13:54:17,235 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 76 [2018-04-12 13:54:17,235 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 13:54:17,235 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 13:54:17,235 INFO L408 AbstractCegarLoop]: === Iteration 57 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-04-12 13:54:17,235 INFO L82 PathProgramCache]: Analyzing trace with hash 1371391946, now seen corresponding path program 1 times [2018-04-12 13:54:17,235 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 13:54:17,235 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 13:54:17,236 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 13:54:17,236 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 13:54:17,236 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 13:54:17,242 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 13:54:17,242 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 13:54:17,641 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 8 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 13:54:17,641 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-12 13:54:17,641 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-12 13:54:17,646 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 13:54:17,675 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 13:54:17,678 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 13:54:17,740 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-04-12 13:54:17,742 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-12 13:54:17,742 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 13:54:17,743 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 13:54:17,746 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 13:54:17,746 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:16, output treesize:8 [2018-04-12 13:54:17,840 WARN L1033 $PredicateComparison]: unable to prove that (exists ((__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_~node~0.base Int) (|__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_#t~ret14.base| Int)) (= |c_#memory_$Pointer$.base| (let ((.cse0 (store |c_old(#memory_$Pointer$.base)| __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_~node~0.base (store (store (select |c_old(#memory_$Pointer$.base)| __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_~node~0.base) 4 (select (select |c_old(#memory_$Pointer$.base)| |c___U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_#in~pointerToList.base|) |c___U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_#in~pointerToList.offset|)) 0 |__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_#t~ret14.base|)))) (store .cse0 |c___U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_#in~pointerToList.base| (store (select .cse0 |c___U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_#in~pointerToList.base|) |c___U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_#in~pointerToList.offset| __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_~node~0.base))))) is different from true [2018-04-12 13:54:17,859 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 40 [2018-04-12 13:54:17,861 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 13:54:17,861 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 38 [2018-04-12 13:54:17,864 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 37 [2018-04-12 13:54:17,864 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-12 13:54:17,869 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 13:54:17,874 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 20 [2018-04-12 13:54:17,876 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 13:54:17,877 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 20 [2018-04-12 13:54:17,878 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-04-12 13:54:17,880 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 13:54:17,883 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 13:54:17,887 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 39 [2018-04-12 13:54:17,888 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 18 [2018-04-12 13:54:17,891 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 19 [2018-04-12 13:54:17,891 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-04-12 13:54:17,894 INFO L267 ElimStorePlain]: Start of recursive call 8: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 13:54:17,905 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 35 [2018-04-12 13:54:17,908 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 16 [2018-04-12 13:54:17,908 INFO L267 ElimStorePlain]: Start of recursive call 11: End of recursive call: and 1 xjuncts. [2018-04-12 13:54:17,913 INFO L267 ElimStorePlain]: Start of recursive call 10: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 13:54:17,918 INFO L267 ElimStorePlain]: Start of recursive call 7: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 13:54:17,938 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 2 xjuncts. [2018-04-12 13:54:17,939 INFO L202 ElimStorePlain]: Needed 11 recursive calls to eliminate 3 variables, input treesize:53, output treesize:36 [2018-04-12 13:54:22,109 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 21 [2018-04-12 13:54:22,110 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2018-04-12 13:54:22,110 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 13:54:22,111 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 13:54:22,115 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 13:54:22,115 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:47, output treesize:36 [2018-04-12 13:54:22,166 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-04-12 13:54:22,166 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 13:54:22,170 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 13:54:22,170 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:37, output treesize:36 [2018-04-12 13:54:22,193 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 13:54:22,194 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 13:54:22,194 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 8 [2018-04-12 13:54:22,194 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 13:54:22,201 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 32 [2018-04-12 13:54:22,203 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 24 [2018-04-12 13:54:22,203 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-12 13:54:22,207 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-12 13:54:22,210 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-12 13:54:22,210 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 2 variables, input treesize:49, output treesize:27 [2018-04-12 13:54:22,238 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 23 [2018-04-12 13:54:22,239 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 5 [2018-04-12 13:54:22,239 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 13:54:22,242 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2018-04-12 13:54:22,242 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-12 13:54:22,243 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 13:54:22,245 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 13:54:22,245 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 3 variables, input treesize:31, output treesize:4 [2018-04-12 13:54:22,262 INFO L134 CoverageAnalysis]: Checked inductivity of 23 backedges. 8 proven. 13 refuted. 0 times theorem prover too weak. 0 trivial. 2 not checked. [2018-04-12 13:54:22,280 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 13:54:22,280 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 26] total 36 [2018-04-12 13:54:22,280 INFO L442 AbstractCegarLoop]: Interpolant automaton has 36 states [2018-04-12 13:54:22,280 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2018-04-12 13:54:22,281 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=123, Invalid=1058, Unknown=13, NotChecked=66, Total=1260 [2018-04-12 13:54:22,281 INFO L87 Difference]: Start difference. First operand 261 states and 283 transitions. Second operand 36 states. [2018-04-12 13:55:11,414 WARN L148 SmtUtils]: Spent 184ms on a formula simplification that was a NOOP. DAG size: 20 [2018-04-12 13:55:11,639 WARN L148 SmtUtils]: Spent 191ms on a formula simplification that was a NOOP. DAG size: 24 [2018-04-12 13:55:11,881 WARN L148 SmtUtils]: Spent 198ms on a formula simplification that was a NOOP. DAG size: 29 [2018-04-12 13:55:12,143 WARN L148 SmtUtils]: Spent 202ms on a formula simplification that was a NOOP. DAG size: 34 [2018-04-12 13:55:12,417 WARN L148 SmtUtils]: Spent 205ms on a formula simplification that was a NOOP. DAG size: 38 [2018-04-12 13:55:16,458 WARN L148 SmtUtils]: Spent 2012ms on a formula simplification that was a NOOP. DAG size: 38 [2018-04-12 13:55:24,883 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 13:55:24,883 INFO L93 Difference]: Finished difference Result 311 states and 342 transitions. [2018-04-12 13:55:24,883 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 41 states. [2018-04-12 13:55:24,883 INFO L78 Accepts]: Start accepts. Automaton has 36 states. Word has length 75 [2018-04-12 13:55:24,883 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 13:55:24,884 INFO L225 Difference]: With dead ends: 311 [2018-04-12 13:55:24,884 INFO L226 Difference]: Without dead ends: 311 [2018-04-12 13:55:24,885 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 136 GetRequests, 57 SyntacticMatches, 11 SemanticMatches, 68 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 1314 ImplicationChecksByTransitivity, 18.4s TimeCoverageRelationStatistics Valid=519, Invalid=4139, Unknown=38, NotChecked=134, Total=4830 [2018-04-12 13:55:24,885 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 311 states. [2018-04-12 13:55:24,887 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 311 to 261. [2018-04-12 13:55:24,887 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 261 states. [2018-04-12 13:55:24,888 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 261 states to 261 states and 281 transitions. [2018-04-12 13:55:24,888 INFO L78 Accepts]: Start accepts. Automaton has 261 states and 281 transitions. Word has length 75 [2018-04-12 13:55:24,888 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 13:55:24,888 INFO L459 AbstractCegarLoop]: Abstraction has 261 states and 281 transitions. [2018-04-12 13:55:24,888 INFO L460 AbstractCegarLoop]: Interpolant automaton has 36 states. [2018-04-12 13:55:24,888 INFO L276 IsEmpty]: Start isEmpty. Operand 261 states and 281 transitions. [2018-04-12 13:55:24,889 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2018-04-12 13:55:24,889 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 13:55:24,890 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 13:55:24,890 INFO L408 AbstractCegarLoop]: === Iteration 58 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-04-12 13:55:24,890 INFO L82 PathProgramCache]: Analyzing trace with hash 1785112934, now seen corresponding path program 1 times [2018-04-12 13:55:24,890 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 13:55:24,890 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 13:55:24,890 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 13:55:24,890 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 13:55:24,890 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 13:55:24,896 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 13:55:24,897 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 13:55:25,310 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 2 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 13:55:25,310 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-12 13:55:25,310 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-12 13:55:25,315 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 13:55:25,341 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 13:55:25,344 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 13:55:25,365 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-04-12 13:55:25,366 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-12 13:55:25,366 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 13:55:25,367 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 13:55:25,371 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-04-12 13:55:25,372 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-12 13:55:25,373 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-12 13:55:25,373 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 13:55:25,383 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 13:55:25,383 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:26, output treesize:18 [2018-04-12 13:55:25,505 WARN L1033 $PredicateComparison]: unable to prove that (exists ((__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_data_~data~0.base Int) (__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_data_~data~0.offset Int)) (let ((.cse0 (+ __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_data_~data~0.offset 4))) (and (= (store |c_old(#memory_$Pointer$.offset)| __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_data_~data~0.base (store (select |c_old(#memory_$Pointer$.offset)| __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_data_~data~0.base) .cse0 0)) |c_#memory_$Pointer$.offset|) (= 0 (select |c_old(#valid)| __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_data_~data~0.base)) (= |c_#memory_$Pointer$.base| (store |c_old(#memory_$Pointer$.base)| __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_data_~data~0.base (store (select |c_old(#memory_$Pointer$.base)| __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_data_~data~0.base) .cse0 0)))))) is different from true [2018-04-12 13:55:25,511 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 13:55:25,512 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 13:55:25,513 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-04-12 13:55:25,513 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 13:55:25,526 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-04-12 13:55:25,526 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:102, output treesize:96 [2018-04-12 13:55:25,657 WARN L1033 $PredicateComparison]: unable to prove that (exists ((__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_~node~0.base Int) (__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_data_~data~0.base Int) (__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_data_~data~0.offset Int) (|__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_#t~ret14.offset| Int) (|__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_#t~ret14.base| Int)) (let ((.cse3 (+ __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_data_~data~0.offset 4))) (and (= |c_#memory_$Pointer$.offset| (let ((.cse0 (let ((.cse1 (let ((.cse2 (store |c_old(#memory_$Pointer$.offset)| __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_~node~0.base (store (select |c_old(#memory_$Pointer$.offset)| __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_~node~0.base) 4 (select (select |c_old(#memory_$Pointer$.offset)| |c___U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_#in~pointerToList.base|) |c___U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_#in~pointerToList.offset|))))) (store .cse2 __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_data_~data~0.base (store (select .cse2 __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_data_~data~0.base) .cse3 0))))) (store .cse1 __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_~node~0.base (store (select .cse1 __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_~node~0.base) 0 |__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_#t~ret14.offset|))))) (store .cse0 |c___U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_#in~pointerToList.base| (store (select .cse0 |c___U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_#in~pointerToList.base|) |c___U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_#in~pointerToList.offset| 0)))) (= (let ((.cse4 (let ((.cse5 (let ((.cse6 (store |c_old(#memory_$Pointer$.base)| __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_~node~0.base (store (select |c_old(#memory_$Pointer$.base)| __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_~node~0.base) 4 (select (select |c_old(#memory_$Pointer$.base)| |c___U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_#in~pointerToList.base|) |c___U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_#in~pointerToList.offset|))))) (store .cse6 __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_data_~data~0.base (store (select .cse6 __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_data_~data~0.base) .cse3 0))))) (store .cse5 __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_~node~0.base (store (select .cse5 __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_~node~0.base) 0 |__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_#t~ret14.base|))))) (store .cse4 |c___U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_#in~pointerToList.base| (store (select .cse4 |c___U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_#in~pointerToList.base|) |c___U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_#in~pointerToList.offset| __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_~node~0.base))) |c_#memory_$Pointer$.base|) (not (= __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_~node~0.base __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_data_~data~0.base))))) is different from true [2018-04-12 13:55:25,697 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 171 treesize of output 100 [2018-04-12 13:55:25,701 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 91 treesize of output 90 [2018-04-12 13:55:25,701 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 13:55:25,962 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 13:55:25,962 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 86 treesize of output 93 [2018-04-12 13:55:25,963 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-12 13:55:26,241 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 90 treesize of output 77 [2018-04-12 13:55:26,245 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 68 treesize of output 67 [2018-04-12 13:55:26,245 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-04-12 13:55:26,424 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 58 [2018-04-12 13:55:26,424 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-04-12 13:55:26,628 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 62 treesize of output 56 [2018-04-12 13:55:26,633 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 19 [2018-04-12 13:55:26,633 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-04-12 13:55:26,682 INFO L682 Elim1Store]: detected equality via solver [2018-04-12 13:55:26,695 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 49 treesize of output 51 [2018-04-12 13:55:26,700 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 2 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 39 [2018-04-12 13:55:26,701 INFO L267 ElimStorePlain]: Start of recursive call 11: End of recursive call: and 1 xjuncts. [2018-04-12 13:55:26,717 INFO L267 ElimStorePlain]: Start of recursive call 10: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 13:55:26,729 INFO L267 ElimStorePlain]: Start of recursive call 8: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 13:55:26,865 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 59 treesize of output 53 [2018-04-12 13:55:26,868 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 19 [2018-04-12 13:55:26,869 INFO L267 ElimStorePlain]: Start of recursive call 13: End of recursive call: and 1 xjuncts. [2018-04-12 13:55:26,904 INFO L682 Elim1Store]: detected equality via solver [2018-04-12 13:55:26,918 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 46 treesize of output 58 [2018-04-12 13:55:26,921 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 47 [2018-04-12 13:55:26,921 INFO L267 ElimStorePlain]: Start of recursive call 15: End of recursive call: and 1 xjuncts. [2018-04-12 13:55:26,941 INFO L267 ElimStorePlain]: Start of recursive call 14: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 13:55:26,951 INFO L267 ElimStorePlain]: Start of recursive call 12: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 13:55:26,969 INFO L267 ElimStorePlain]: Start of recursive call 5: 2 dim-1 vars, 3 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 13:55:27,107 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 86 treesize of output 60 [2018-04-12 13:55:27,151 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-04-12 13:55:27,152 INFO L267 ElimStorePlain]: Start of recursive call 17: End of recursive call: and 1 xjuncts. [2018-04-12 13:55:27,177 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 45 [2018-04-12 13:55:27,185 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 22 [2018-04-12 13:55:27,185 INFO L267 ElimStorePlain]: Start of recursive call 19: End of recursive call: and 1 xjuncts. [2018-04-12 13:55:27,230 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 6 case distinctions, treesize of input 35 treesize of output 64 [2018-04-12 13:55:27,234 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 47 [2018-04-12 13:55:27,234 INFO L267 ElimStorePlain]: Start of recursive call 21: End of recursive call: and 1 xjuncts. [2018-04-12 13:55:27,312 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 13:55:27,314 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 31 [2018-04-12 13:55:27,314 INFO L267 ElimStorePlain]: Start of recursive call 22: End of recursive call: and 1 xjuncts. [2018-04-12 13:55:27,382 INFO L267 ElimStorePlain]: Start of recursive call 20: 4 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-12 13:55:27,399 INFO L267 ElimStorePlain]: Start of recursive call 18: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 2 xjuncts. [2018-04-12 13:55:27,416 INFO L267 ElimStorePlain]: Start of recursive call 16: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 2 xjuncts. [2018-04-12 13:55:27,469 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, 3 dim-2 vars, End of recursive call: and 2 xjuncts. [2018-04-12 13:55:27,521 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 171 treesize of output 100 [2018-04-12 13:55:27,524 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 91 treesize of output 90 [2018-04-12 13:55:27,524 INFO L267 ElimStorePlain]: Start of recursive call 24: End of recursive call: and 1 xjuncts. [2018-04-12 13:55:27,631 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 13:55:27,631 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 86 treesize of output 93 [2018-04-12 13:55:27,632 INFO L267 ElimStorePlain]: Start of recursive call 25: End of recursive call: and 1 xjuncts. [2018-04-12 13:55:27,744 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 4 case distinctions, treesize of input 89 treesize of output 74 [2018-04-12 13:55:27,746 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 67 treesize of output 66 [2018-04-12 13:55:27,747 INFO L267 ElimStorePlain]: Start of recursive call 27: End of recursive call: and 1 xjuncts. [2018-04-12 13:55:27,809 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 13:55:27,810 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 2 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 56 treesize of output 69 [2018-04-12 13:55:27,810 INFO L267 ElimStorePlain]: Start of recursive call 28: End of recursive call: and 1 xjuncts. [2018-04-12 13:55:27,874 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 65 treesize of output 55 [2018-04-12 13:55:27,877 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 22 [2018-04-12 13:55:27,877 INFO L267 ElimStorePlain]: Start of recursive call 30: End of recursive call: and 1 xjuncts. [2018-04-12 13:55:27,890 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 42 treesize of output 39 [2018-04-12 13:55:27,898 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 21 treesize of output 42 [2018-04-12 13:55:27,899 INFO L267 ElimStorePlain]: Start of recursive call 32: End of recursive call: and 2 xjuncts. [2018-04-12 13:55:27,910 INFO L267 ElimStorePlain]: Start of recursive call 31: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-12 13:55:27,924 INFO L267 ElimStorePlain]: Start of recursive call 29: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 2 xjuncts. [2018-04-12 13:55:27,994 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 4 case distinctions, treesize of input 61 treesize of output 64 [2018-04-12 13:55:28,001 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 2 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 63 [2018-04-12 13:55:28,002 INFO L267 ElimStorePlain]: Start of recursive call 34: End of recursive call: and 1 xjuncts. [2018-04-12 13:55:28,049 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 52 treesize of output 49 [2018-04-12 13:55:28,052 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 13:55:28,054 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 19 [2018-04-12 13:55:28,054 INFO L267 ElimStorePlain]: Start of recursive call 36: End of recursive call: and 1 xjuncts. [2018-04-12 13:55:28,062 INFO L267 ElimStorePlain]: Start of recursive call 35: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 13:55:28,112 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 6 case distinctions, treesize of input 48 treesize of output 71 [2018-04-12 13:55:28,116 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 13:55:28,120 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 3 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 60 [2018-04-12 13:55:28,123 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 22 [2018-04-12 13:55:28,123 INFO L267 ElimStorePlain]: Start of recursive call 39: End of recursive call: and 1 xjuncts. [2018-04-12 13:55:28,132 INFO L267 ElimStorePlain]: Start of recursive call 38: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 13:55:28,226 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 13:55:28,234 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 2 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 37 treesize of output 62 [2018-04-12 13:55:28,238 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 52 treesize of output 42 [2018-04-12 13:55:28,238 INFO L267 ElimStorePlain]: Start of recursive call 41: End of recursive call: and 1 xjuncts. [2018-04-12 13:55:28,269 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 49 treesize of output 89 [2018-04-12 13:55:28,270 INFO L267 ElimStorePlain]: Start of recursive call 42: End of recursive call: and 2 xjuncts. [2018-04-12 13:55:28,289 INFO L267 ElimStorePlain]: Start of recursive call 40: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-12 13:55:28,418 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 13:55:28,422 FATAL L292 ToolchainWalker]: The Plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction has thrown an exception: java.lang.AssertionError: var is still there: v_arrayElimCell_124 term size 30 at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.Elim1Store.elim1(Elim1Store.java:452) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimOneRec(ElimStorePlain.java:221) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimAllRec(ElimStorePlain.java:247) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimOneRec(ElimStorePlain.java:225) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimAllRec(ElimStorePlain.java:247) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimOneRec(ElimStorePlain.java:225) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimAllRec(ElimStorePlain.java:247) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimOneRec(ElimStorePlain.java:225) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimAllRec(ElimStorePlain.java:247) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimOneRec(ElimStorePlain.java:225) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimAllRec(ElimStorePlain.java:247) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.elimAllRec(ElimStorePlain.java:199) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.PartialQuantifierElimination.elim(PartialQuantifierElimination.java:270) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.PartialQuantifierElimination.tryToEliminate(PartialQuantifierElimination.java:101) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.predicates.IterativePredicateTransformer$QuantifierEliminationPostprocessor.postprocess(IterativePredicateTransformer.java:243) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.predicates.IterativePredicateTransformer.applyPostprocessors(IterativePredicateTransformer.java:445) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.predicates.IterativePredicateTransformer.computeStrongestPostconditionSequence(IterativePredicateTransformer.java:198) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.singletracecheck.TraceCheckSpWp.computeInterpolantsUsingUnsatCore(TraceCheckSpWp.java:283) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.singletracecheck.TraceCheckSpWp.computeInterpolants(TraceCheckSpWp.java:173) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.singletracecheck.TraceCheckSpWp.(TraceCheckSpWp.java:160) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceCheckConstructor.constructForwardBackward(TraceCheckConstructor.java:237) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceCheckConstructor.get(TraceCheckConstructor.java:185) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.MultiTrackRefinementStrategy.getTraceCheck(MultiTrackRefinementStrategy.java:222) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.BaseRefinementStrategy.checkFeasibility(BaseRefinementStrategy.java:231) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.BaseRefinementStrategy.executeStrategy(BaseRefinementStrategy.java:205) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceAbstractionRefinementEngine.(TraceAbstractionRefinementEngine.java:69) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.BasicCegarLoop.isCounterexampleFeasible(BasicCegarLoop.java:408) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterateInternal(AbstractCegarLoop.java:417) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterate(AbstractCegarLoop.java:363) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.iterate(TraceAbstractionStarter.java:304) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.runCegarLoops(TraceAbstractionStarter.java:150) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.(TraceAbstractionStarter.java:118) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver.finish(TraceAbstractionObserver.java:119) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runObserver(PluginConnector.java:168) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runTool(PluginConnector.java:151) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.run(PluginConnector.java:128) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.executePluginConnector(ToolchainWalker.java:232) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.processPlugin(ToolchainWalker.java:226) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walkUnprotected(ToolchainWalker.java:142) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walk(ToolchainWalker.java:104) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainManager$Toolchain.processToolchain(ToolchainManager.java:324) at de.uni_freiburg.informatik.ultimate.core.coreplugin.toolchain.DefaultToolchainJob.runToolchainDefault(DefaultToolchainJob.java:221) at de.uni_freiburg.informatik.ultimate.core.coreplugin.toolchain.BasicToolchainJob.run(BasicToolchainJob.java:134) at org.eclipse.core.internal.jobs.Worker.run(Worker.java:55) [2018-04-12 13:55:28,424 INFO L168 Benchmark]: Toolchain (without parser) took 249483.25 ms. Allocated memory was 397.4 MB in the beginning and 853.0 MB in the end (delta: 455.6 MB). Free memory was 333.3 MB in the beginning and 788.9 MB in the end (delta: -455.5 MB). Peak memory consumption was 414.5 MB. Max. memory is 5.3 GB. [2018-04-12 13:55:28,425 INFO L168 Benchmark]: CDTParser took 0.12 ms. Allocated memory is still 397.4 MB. Free memory is still 359.1 MB. There was no memory consumed. Max. memory is 5.3 GB. [2018-04-12 13:55:28,425 INFO L168 Benchmark]: CACSL2BoogieTranslator took 230.17 ms. Allocated memory is still 397.4 MB. Free memory was 333.3 MB in the beginning and 306.7 MB in the end (delta: 26.6 MB). Peak memory consumption was 26.6 MB. Max. memory is 5.3 GB. [2018-04-12 13:55:28,425 INFO L168 Benchmark]: Boogie Preprocessor took 39.30 ms. Allocated memory is still 397.4 MB. Free memory was 306.7 MB in the beginning and 304.1 MB in the end (delta: 2.6 MB). Peak memory consumption was 2.6 MB. Max. memory is 5.3 GB. [2018-04-12 13:55:28,425 INFO L168 Benchmark]: RCFGBuilder took 465.08 ms. Allocated memory was 397.4 MB in the beginning and 602.4 MB in the end (delta: 205.0 MB). Free memory was 304.1 MB in the beginning and 524.0 MB in the end (delta: -219.9 MB). Peak memory consumption was 25.0 MB. Max. memory is 5.3 GB. [2018-04-12 13:55:28,426 INFO L168 Benchmark]: TraceAbstraction took 248746.16 ms. Allocated memory was 602.4 MB in the beginning and 853.0 MB in the end (delta: 250.6 MB). Free memory was 521.3 MB in the beginning and 788.9 MB in the end (delta: -267.5 MB). Peak memory consumption was 397.5 MB. Max. memory is 5.3 GB. [2018-04-12 13:55:28,426 INFO L344 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.12 ms. Allocated memory is still 397.4 MB. Free memory is still 359.1 MB. There was no memory consumed. Max. memory is 5.3 GB. * CACSL2BoogieTranslator took 230.17 ms. Allocated memory is still 397.4 MB. Free memory was 333.3 MB in the beginning and 306.7 MB in the end (delta: 26.6 MB). Peak memory consumption was 26.6 MB. Max. memory is 5.3 GB. * Boogie Preprocessor took 39.30 ms. Allocated memory is still 397.4 MB. Free memory was 306.7 MB in the beginning and 304.1 MB in the end (delta: 2.6 MB). Peak memory consumption was 2.6 MB. Max. memory is 5.3 GB. * RCFGBuilder took 465.08 ms. Allocated memory was 397.4 MB in the beginning and 602.4 MB in the end (delta: 205.0 MB). Free memory was 304.1 MB in the beginning and 524.0 MB in the end (delta: -219.9 MB). Peak memory consumption was 25.0 MB. Max. memory is 5.3 GB. * TraceAbstraction took 248746.16 ms. Allocated memory was 602.4 MB in the beginning and 853.0 MB in the end (delta: 250.6 MB). Free memory was 521.3 MB in the beginning and 788.9 MB in the end (delta: -267.5 MB). Peak memory consumption was 397.5 MB. Max. memory is 5.3 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - ExceptionOrErrorResult: AssertionError: var is still there: v_arrayElimCell_124 term size 30 de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: AssertionError: var is still there: v_arrayElimCell_124 term size 30: de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.Elim1Store.elim1(Elim1Store.java:452) RESULT: Ultimate could not prove your program: Toolchain returned no result. Written .csv to /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/optional_data_creation_test04_false-valid-memtrack.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Camel.epf_AutomizerC.xml/Csv-Benchmark-0-2018-04-12_13-55-28-431.csv Received shutdown request...