java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv --cacsl2boogietranslator.bitprecise.bitfields false -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/cade18-smtinterpol/svcomp-DerefFreeMemtrack-32bit-Automizer_Camel.epf -i ../../../trunk/examples/svcomp/array-memsafety/subseq-alloca_true-valid-memsafety_true-termination.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-408c70d-m [2018-04-12 10:40:40,415 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-04-12 10:40:40,416 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-04-12 10:40:40,428 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-04-12 10:40:40,428 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-04-12 10:40:40,429 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-04-12 10:40:40,429 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-04-12 10:40:40,431 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-04-12 10:40:40,433 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-04-12 10:40:40,433 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-04-12 10:40:40,434 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-04-12 10:40:40,434 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-04-12 10:40:40,435 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-04-12 10:40:40,436 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-04-12 10:40:40,437 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-04-12 10:40:40,438 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-04-12 10:40:40,440 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-04-12 10:40:40,441 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-04-12 10:40:40,442 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-04-12 10:40:40,443 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-04-12 10:40:40,445 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2018-04-12 10:40:40,450 INFO L98 SettingsManager]: Beginning loading settings from /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/cade18-smtinterpol/svcomp-DerefFreeMemtrack-32bit-Automizer_Camel.epf [2018-04-12 10:40:40,459 INFO L110 SettingsManager]: Loading preferences was successful [2018-04-12 10:40:40,459 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-04-12 10:40:40,460 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-04-12 10:40:40,460 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-04-12 10:40:40,460 INFO L133 SettingsManager]: * Use SBE=true [2018-04-12 10:40:40,460 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-04-12 10:40:40,460 INFO L133 SettingsManager]: * sizeof long=4 [2018-04-12 10:40:40,461 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-04-12 10:40:40,461 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-04-12 10:40:40,461 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-04-12 10:40:40,461 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-04-12 10:40:40,461 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-04-12 10:40:40,461 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-04-12 10:40:40,461 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-04-12 10:40:40,462 INFO L133 SettingsManager]: * sizeof long double=12 [2018-04-12 10:40:40,462 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-04-12 10:40:40,462 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-04-12 10:40:40,462 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-04-12 10:40:40,462 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-04-12 10:40:40,462 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-04-12 10:40:40,462 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-04-12 10:40:40,462 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-04-12 10:40:40,462 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-04-12 10:40:40,463 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Bitprecise bitfields -> false [2018-04-12 10:40:40,489 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-04-12 10:40:40,497 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully (re)initialized [2018-04-12 10:40:40,499 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-04-12 10:40:40,500 INFO L271 PluginConnector]: Initializing CDTParser... [2018-04-12 10:40:40,501 INFO L276 PluginConnector]: CDTParser initialized [2018-04-12 10:40:40,501 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/array-memsafety/subseq-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:40:40,864 INFO L225 CDTParser]: Created temporary CDT project at /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/data/FLAG54881b190 [2018-04-12 10:40:40,981 INFO L287 CDTParser]: IsIndexed: true [2018-04-12 10:40:40,982 INFO L288 CDTParser]: Found 1 translation units. [2018-04-12 10:40:40,982 INFO L168 CDTParser]: Scanning subseq-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:40:40,989 INFO L210 ultiparseSymbolTable]: Include resolver: [2018-04-12 10:40:40,989 INFO L215 ultiparseSymbolTable]: [2018-04-12 10:40:40,989 INFO L218 ultiparseSymbolTable]: Function table: [2018-04-12 10:40:40,989 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fsubseq_alloca_true_valid_memsafety_true_termination_i____bswap_64 ('__bswap_64') in subseq-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:40:40,990 INFO L221 ultiparseSymbolTable]: Function definition of null ('main') in subseq-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:40:40,990 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fsubseq_alloca_true_valid_memsafety_true_termination_i____bswap_32 ('__bswap_32') in subseq-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:40:40,990 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fsubseq_alloca_true_valid_memsafety_true_termination_i__ ('') in subseq-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:40:40,990 INFO L227 ultiparseSymbolTable]: Global variable table: [2018-04-12 10:40:40,990 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsubseq_alloca_true_valid_memsafety_true_termination_i____intptr_t in subseq-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:40:40,990 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsubseq_alloca_true_valid_memsafety_true_termination_i____ssize_t in subseq-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:40:40,990 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsubseq_alloca_true_valid_memsafety_true_termination_i__pthread_mutexattr_t in subseq-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:40:40,990 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsubseq_alloca_true_valid_memsafety_true_termination_i__fsfilcnt_t in subseq-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:40:40,990 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsubseq_alloca_true_valid_memsafety_true_termination_i____timer_t in subseq-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:40:40,991 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsubseq_alloca_true_valid_memsafety_true_termination_i____mode_t in subseq-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:40:40,991 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsubseq_alloca_true_valid_memsafety_true_termination_i__int32_t in subseq-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:40:40,991 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsubseq_alloca_true_valid_memsafety_true_termination_i____u_short in subseq-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:40:40,991 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsubseq_alloca_true_valid_memsafety_true_termination_i____socklen_t in subseq-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:40:40,991 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsubseq_alloca_true_valid_memsafety_true_termination_i__key_t in subseq-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:40:40,991 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsubseq_alloca_true_valid_memsafety_true_termination_i__size_t in subseq-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:40:40,991 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsubseq_alloca_true_valid_memsafety_true_termination_i__off_t in subseq-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:40:40,991 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsubseq_alloca_true_valid_memsafety_true_termination_i____int32_t in subseq-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:40:40,991 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsubseq_alloca_true_valid_memsafety_true_termination_i____rlim_t in subseq-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:40:40,992 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsubseq_alloca_true_valid_memsafety_true_termination_i__fsblkcnt_t in subseq-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:40:40,992 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsubseq_alloca_true_valid_memsafety_true_termination_i____rlim64_t in subseq-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:40:40,992 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsubseq_alloca_true_valid_memsafety_true_termination_i__u_int in subseq-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:40:40,992 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsubseq_alloca_true_valid_memsafety_true_termination_i__register_t in subseq-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:40:40,992 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsubseq_alloca_true_valid_memsafety_true_termination_i__u_int64_t in subseq-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:40:40,992 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsubseq_alloca_true_valid_memsafety_true_termination_i____fsfilcnt64_t in subseq-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:40:40,992 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsubseq_alloca_true_valid_memsafety_true_termination_i____fsblkcnt64_t in subseq-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:40:40,992 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsubseq_alloca_true_valid_memsafety_true_termination_i__pthread_mutex_t in subseq-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:40:40,992 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsubseq_alloca_true_valid_memsafety_true_termination_i____fsfilcnt_t in subseq-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:40:40,992 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsubseq_alloca_true_valid_memsafety_true_termination_i__ldiv_t in subseq-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:40:40,993 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsubseq_alloca_true_valid_memsafety_true_termination_i__ino_t in subseq-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:40:40,993 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsubseq_alloca_true_valid_memsafety_true_termination_i____time_t in subseq-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:40:40,993 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsubseq_alloca_true_valid_memsafety_true_termination_i__int8_t in subseq-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:40:40,993 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsubseq_alloca_true_valid_memsafety_true_termination_i____u_char in subseq-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:40:40,993 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsubseq_alloca_true_valid_memsafety_true_termination_i____suseconds_t in subseq-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:40:40,993 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsubseq_alloca_true_valid_memsafety_true_termination_i____caddr_t in subseq-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:40:40,993 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsubseq_alloca_true_valid_memsafety_true_termination_i____dev_t in subseq-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:40:40,993 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsubseq_alloca_true_valid_memsafety_true_termination_i____qaddr_t in subseq-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:40:40,993 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsubseq_alloca_true_valid_memsafety_true_termination_i__int16_t in subseq-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:40:40,993 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsubseq_alloca_true_valid_memsafety_true_termination_i__lldiv_t in subseq-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:40:40,994 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsubseq_alloca_true_valid_memsafety_true_termination_i__wchar_t in subseq-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:40:40,994 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsubseq_alloca_true_valid_memsafety_true_termination_i____blksize_t in subseq-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:40:40,994 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsubseq_alloca_true_valid_memsafety_true_termination_i__blksize_t in subseq-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:40:40,994 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsubseq_alloca_true_valid_memsafety_true_termination_i__pthread_attr_t in subseq-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:40:40,994 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsubseq_alloca_true_valid_memsafety_true_termination_i__uid_t in subseq-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:40:40,994 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsubseq_alloca_true_valid_memsafety_true_termination_i____uint32_t in subseq-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:40:40,994 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsubseq_alloca_true_valid_memsafety_true_termination_i__pthread_condattr_t in subseq-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:40:40,994 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsubseq_alloca_true_valid_memsafety_true_termination_i__pthread_once_t in subseq-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:40:40,994 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsubseq_alloca_true_valid_memsafety_true_termination_i__blkcnt_t in subseq-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:40:40,995 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsubseq_alloca_true_valid_memsafety_true_termination_i____int8_t in subseq-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:40:40,995 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsubseq_alloca_true_valid_memsafety_true_termination_i__u_char in subseq-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:40:40,995 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsubseq_alloca_true_valid_memsafety_true_termination_i____u_long in subseq-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:40:40,995 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsubseq_alloca_true_valid_memsafety_true_termination_i____int16_t in subseq-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:40:40,995 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsubseq_alloca_true_valid_memsafety_true_termination_i__div_t in subseq-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:40:40,995 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsubseq_alloca_true_valid_memsafety_true_termination_i__caddr_t in subseq-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:40:40,995 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsubseq_alloca_true_valid_memsafety_true_termination_i__pthread_spinlock_t in subseq-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:40:40,995 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsubseq_alloca_true_valid_memsafety_true_termination_i__mode_t in subseq-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:40:40,995 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsubseq_alloca_true_valid_memsafety_true_termination_i__pid_t in subseq-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:40:40,995 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsubseq_alloca_true_valid_memsafety_true_termination_i__fd_set in subseq-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:40:40,995 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsubseq_alloca_true_valid_memsafety_true_termination_i____sigset_t in subseq-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:40:40,995 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsubseq_alloca_true_valid_memsafety_true_termination_i__gid_t in subseq-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:40:40,995 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsubseq_alloca_true_valid_memsafety_true_termination_i__u_short in subseq-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:40:40,995 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsubseq_alloca_true_valid_memsafety_true_termination_i__ulong in subseq-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:40:40,995 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsubseq_alloca_true_valid_memsafety_true_termination_i____fsid_t in subseq-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:40:40,995 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsubseq_alloca_true_valid_memsafety_true_termination_i__u_long in subseq-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:40:40,995 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsubseq_alloca_true_valid_memsafety_true_termination_i____ino_t in subseq-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:40:40,995 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsubseq_alloca_true_valid_memsafety_true_termination_i____ino64_t in subseq-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:40:40,995 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsubseq_alloca_true_valid_memsafety_true_termination_i____u_quad_t in subseq-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:40:40,996 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsubseq_alloca_true_valid_memsafety_true_termination_i____pid_t in subseq-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:40:40,996 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsubseq_alloca_true_valid_memsafety_true_termination_i____syscall_slong_t in subseq-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:40:40,996 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsubseq_alloca_true_valid_memsafety_true_termination_i__pthread_barrier_t in subseq-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:40:40,996 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsubseq_alloca_true_valid_memsafety_true_termination_i____off_t in subseq-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:40:40,996 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsubseq_alloca_true_valid_memsafety_true_termination_i____WAIT_STATUS in subseq-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:40:40,996 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsubseq_alloca_true_valid_memsafety_true_termination_i____gid_t in subseq-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:40:40,996 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsubseq_alloca_true_valid_memsafety_true_termination_i__clock_t in subseq-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:40:40,996 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsubseq_alloca_true_valid_memsafety_true_termination_i____uint16_t in subseq-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:40:40,996 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsubseq_alloca_true_valid_memsafety_true_termination_i____loff_t in subseq-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:40:40,996 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsubseq_alloca_true_valid_memsafety_true_termination_i__suseconds_t in subseq-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:40:40,996 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsubseq_alloca_true_valid_memsafety_true_termination_i____blkcnt_t in subseq-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:40:40,996 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsubseq_alloca_true_valid_memsafety_true_termination_i__quad_t in subseq-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:40:40,996 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsubseq_alloca_true_valid_memsafety_true_termination_i__u_int16_t in subseq-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:40:40,996 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsubseq_alloca_true_valid_memsafety_true_termination_i__pthread_cond_t in subseq-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:40:40,996 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsubseq_alloca_true_valid_memsafety_true_termination_i__daddr_t in subseq-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:40:40,996 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsubseq_alloca_true_valid_memsafety_true_termination_i__fsid_t in subseq-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:40:40,996 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsubseq_alloca_true_valid_memsafety_true_termination_i____key_t in subseq-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:40:40,996 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsubseq_alloca_true_valid_memsafety_true_termination_i____clockid_t in subseq-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:40:40,996 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsubseq_alloca_true_valid_memsafety_true_termination_i____daddr_t in subseq-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:40:40,996 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsubseq_alloca_true_valid_memsafety_true_termination_i____clock_t in subseq-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:40:40,997 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsubseq_alloca_true_valid_memsafety_true_termination_i____pthread_list_t in subseq-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:40:40,997 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsubseq_alloca_true_valid_memsafety_true_termination_i__pthread_barrierattr_t in subseq-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:40:40,997 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsubseq_alloca_true_valid_memsafety_true_termination_i____useconds_t in subseq-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:40:40,997 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsubseq_alloca_true_valid_memsafety_true_termination_i__int64_t in subseq-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:40:40,997 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsubseq_alloca_true_valid_memsafety_true_termination_i____quad_t in subseq-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:40:40,997 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsubseq_alloca_true_valid_memsafety_true_termination_i__u_quad_t in subseq-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:40:40,997 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsubseq_alloca_true_valid_memsafety_true_termination_i__ushort in subseq-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:40:40,997 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsubseq_alloca_true_valid_memsafety_true_termination_i____uint8_t in subseq-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:40:40,997 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsubseq_alloca_true_valid_memsafety_true_termination_i____off64_t in subseq-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:40:40,997 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsubseq_alloca_true_valid_memsafety_true_termination_i__loff_t in subseq-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:40:40,997 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsubseq_alloca_true_valid_memsafety_true_termination_i____int64_t in subseq-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:40:40,997 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsubseq_alloca_true_valid_memsafety_true_termination_i____fsblkcnt_t in subseq-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:40:40,997 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsubseq_alloca_true_valid_memsafety_true_termination_i____syscall_ulong_t in subseq-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:40:40,997 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsubseq_alloca_true_valid_memsafety_true_termination_i____sig_atomic_t in subseq-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:40:40,997 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsubseq_alloca_true_valid_memsafety_true_termination_i__u_int32_t in subseq-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:40:40,997 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsubseq_alloca_true_valid_memsafety_true_termination_i____id_t in subseq-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:40:40,997 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsubseq_alloca_true_valid_memsafety_true_termination_i____fd_mask in subseq-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:40:40,997 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsubseq_alloca_true_valid_memsafety_true_termination_i____u_int in subseq-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:40:40,997 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsubseq_alloca_true_valid_memsafety_true_termination_i__pthread_t in subseq-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:40:40,997 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsubseq_alloca_true_valid_memsafety_true_termination_i__u_int8_t in subseq-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:40:40,997 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsubseq_alloca_true_valid_memsafety_true_termination_i__time_t in subseq-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:40:40,997 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsubseq_alloca_true_valid_memsafety_true_termination_i__pthread_key_t in subseq-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:40:40,997 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsubseq_alloca_true_valid_memsafety_true_termination_i__pthread_rwlock_t in subseq-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:40:40,997 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsubseq_alloca_true_valid_memsafety_true_termination_i____nlink_t in subseq-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:40:40,998 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsubseq_alloca_true_valid_memsafety_true_termination_i__clockid_t in subseq-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:40:40,998 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsubseq_alloca_true_valid_memsafety_true_termination_i__timer_t in subseq-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:40:40,998 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsubseq_alloca_true_valid_memsafety_true_termination_i__dev_t in subseq-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:40:40,998 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsubseq_alloca_true_valid_memsafety_true_termination_i__sigset_t in subseq-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:40:40,998 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsubseq_alloca_true_valid_memsafety_true_termination_i__id_t in subseq-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:40:40,998 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsubseq_alloca_true_valid_memsafety_true_termination_i____uint64_t in subseq-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:40:40,998 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsubseq_alloca_true_valid_memsafety_true_termination_i__fd_mask in subseq-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:40:40,998 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsubseq_alloca_true_valid_memsafety_true_termination_i____blkcnt64_t in subseq-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:40:40,998 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsubseq_alloca_true_valid_memsafety_true_termination_i____fsword_t in subseq-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:40:40,998 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsubseq_alloca_true_valid_memsafety_true_termination_i__pthread_rwlockattr_t in subseq-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:40:40,998 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsubseq_alloca_true_valid_memsafety_true_termination_i__ssize_t in subseq-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:40:40,998 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsubseq_alloca_true_valid_memsafety_true_termination_i____uid_t in subseq-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:40:40,998 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsubseq_alloca_true_valid_memsafety_true_termination_i__nlink_t in subseq-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:40:40,998 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fsubseq_alloca_true_valid_memsafety_true_termination_i__uint in subseq-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:40:41,010 INFO L330 CDTParser]: Deleted temporary CDT project at /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/data/FLAG54881b190 [2018-04-12 10:40:41,014 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-04-12 10:40:41,015 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-04-12 10:40:41,015 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-04-12 10:40:41,015 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-04-12 10:40:41,019 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-04-12 10:40:41,019 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 12.04 10:40:41" (1/1) ... [2018-04-12 10:40:41,021 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@74168c57 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 10:40:41, skipping insertion in model container [2018-04-12 10:40:41,021 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 12.04 10:40:41" (1/1) ... [2018-04-12 10:40:41,033 INFO L167 Dispatcher]: Using SV-COMP mode [2018-04-12 10:40:41,053 INFO L167 Dispatcher]: Using SV-COMP mode [2018-04-12 10:40:41,172 INFO L175 PostProcessor]: Settings: Checked method=main [2018-04-12 10:40:41,207 INFO L175 PostProcessor]: Settings: Checked method=main [2018-04-12 10:40:41,213 INFO L100 SccComputation]: Graph consists of 0 InCaSumBalls and 112 non ball SCCs. Number of states in SCCs 112. [2018-04-12 10:40:41,238 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 10:40:41 WrapperNode [2018-04-12 10:40:41,238 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-04-12 10:40:41,239 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-04-12 10:40:41,239 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-04-12 10:40:41,239 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-04-12 10:40:41,246 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 10:40:41" (1/1) ... [2018-04-12 10:40:41,246 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 10:40:41" (1/1) ... [2018-04-12 10:40:41,257 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 10:40:41" (1/1) ... [2018-04-12 10:40:41,257 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 10:40:41" (1/1) ... [2018-04-12 10:40:41,265 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 10:40:41" (1/1) ... [2018-04-12 10:40:41,269 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 10:40:41" (1/1) ... [2018-04-12 10:40:41,271 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 10:40:41" (1/1) ... [2018-04-12 10:40:41,275 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-04-12 10:40:41,275 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-04-12 10:40:41,275 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-04-12 10:40:41,275 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-04-12 10:40:41,276 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 10:40:41" (1/1) ... No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-04-12 10:40:41,364 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-04-12 10:40:41,364 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-04-12 10:40:41,364 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fsubseq_alloca_true_valid_memsafety_true_termination_i____bswap_32 [2018-04-12 10:40:41,364 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fsubseq_alloca_true_valid_memsafety_true_termination_i____bswap_64 [2018-04-12 10:40:41,364 INFO L136 BoogieDeclarations]: Found implementation of procedure subseq [2018-04-12 10:40:41,364 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-04-12 10:40:41,364 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fsubseq_alloca_true_valid_memsafety_true_termination_i____bswap_32 [2018-04-12 10:40:41,364 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fsubseq_alloca_true_valid_memsafety_true_termination_i____bswap_64 [2018-04-12 10:40:41,365 INFO L128 BoogieDeclarations]: Found specification of procedure __ctype_get_mb_cur_max [2018-04-12 10:40:41,365 INFO L128 BoogieDeclarations]: Found specification of procedure atof [2018-04-12 10:40:41,365 INFO L128 BoogieDeclarations]: Found specification of procedure atoi [2018-04-12 10:40:41,365 INFO L128 BoogieDeclarations]: Found specification of procedure atol [2018-04-12 10:40:41,365 INFO L128 BoogieDeclarations]: Found specification of procedure atoll [2018-04-12 10:40:41,365 INFO L128 BoogieDeclarations]: Found specification of procedure strtod [2018-04-12 10:40:41,365 INFO L128 BoogieDeclarations]: Found specification of procedure strtof [2018-04-12 10:40:41,365 INFO L128 BoogieDeclarations]: Found specification of procedure strtold [2018-04-12 10:40:41,365 INFO L128 BoogieDeclarations]: Found specification of procedure strtol [2018-04-12 10:40:41,365 INFO L128 BoogieDeclarations]: Found specification of procedure strtoul [2018-04-12 10:40:41,365 INFO L128 BoogieDeclarations]: Found specification of procedure strtoq [2018-04-12 10:40:41,365 INFO L128 BoogieDeclarations]: Found specification of procedure strtouq [2018-04-12 10:40:41,366 INFO L128 BoogieDeclarations]: Found specification of procedure strtoll [2018-04-12 10:40:41,366 INFO L128 BoogieDeclarations]: Found specification of procedure strtoull [2018-04-12 10:40:41,366 INFO L128 BoogieDeclarations]: Found specification of procedure l64a [2018-04-12 10:40:41,366 INFO L128 BoogieDeclarations]: Found specification of procedure a64l [2018-04-12 10:40:41,366 INFO L128 BoogieDeclarations]: Found specification of procedure select [2018-04-12 10:40:41,366 INFO L128 BoogieDeclarations]: Found specification of procedure pselect [2018-04-12 10:40:41,366 INFO L128 BoogieDeclarations]: Found specification of procedure gnu_dev_major [2018-04-12 10:40:41,366 INFO L128 BoogieDeclarations]: Found specification of procedure gnu_dev_minor [2018-04-12 10:40:41,366 INFO L128 BoogieDeclarations]: Found specification of procedure gnu_dev_makedev [2018-04-12 10:40:41,366 INFO L128 BoogieDeclarations]: Found specification of procedure random [2018-04-12 10:40:41,367 INFO L128 BoogieDeclarations]: Found specification of procedure srandom [2018-04-12 10:40:41,367 INFO L128 BoogieDeclarations]: Found specification of procedure initstate [2018-04-12 10:40:41,367 INFO L128 BoogieDeclarations]: Found specification of procedure setstate [2018-04-12 10:40:41,367 INFO L128 BoogieDeclarations]: Found specification of procedure random_r [2018-04-12 10:40:41,367 INFO L128 BoogieDeclarations]: Found specification of procedure srandom_r [2018-04-12 10:40:41,367 INFO L128 BoogieDeclarations]: Found specification of procedure initstate_r [2018-04-12 10:40:41,367 INFO L128 BoogieDeclarations]: Found specification of procedure setstate_r [2018-04-12 10:40:41,367 INFO L128 BoogieDeclarations]: Found specification of procedure rand [2018-04-12 10:40:41,367 INFO L128 BoogieDeclarations]: Found specification of procedure srand [2018-04-12 10:40:41,367 INFO L128 BoogieDeclarations]: Found specification of procedure rand_r [2018-04-12 10:40:41,368 INFO L128 BoogieDeclarations]: Found specification of procedure drand48 [2018-04-12 10:40:41,368 INFO L128 BoogieDeclarations]: Found specification of procedure erand48 [2018-04-12 10:40:41,368 INFO L128 BoogieDeclarations]: Found specification of procedure lrand48 [2018-04-12 10:40:41,368 INFO L128 BoogieDeclarations]: Found specification of procedure nrand48 [2018-04-12 10:40:41,368 INFO L128 BoogieDeclarations]: Found specification of procedure mrand48 [2018-04-12 10:40:41,368 INFO L128 BoogieDeclarations]: Found specification of procedure jrand48 [2018-04-12 10:40:41,368 INFO L128 BoogieDeclarations]: Found specification of procedure srand48 [2018-04-12 10:40:41,368 INFO L128 BoogieDeclarations]: Found specification of procedure seed48 [2018-04-12 10:40:41,368 INFO L128 BoogieDeclarations]: Found specification of procedure lcong48 [2018-04-12 10:40:41,368 INFO L128 BoogieDeclarations]: Found specification of procedure drand48_r [2018-04-12 10:40:41,369 INFO L128 BoogieDeclarations]: Found specification of procedure erand48_r [2018-04-12 10:40:41,369 INFO L128 BoogieDeclarations]: Found specification of procedure lrand48_r [2018-04-12 10:40:41,369 INFO L128 BoogieDeclarations]: Found specification of procedure nrand48_r [2018-04-12 10:40:41,369 INFO L128 BoogieDeclarations]: Found specification of procedure mrand48_r [2018-04-12 10:40:41,369 INFO L128 BoogieDeclarations]: Found specification of procedure jrand48_r [2018-04-12 10:40:41,369 INFO L128 BoogieDeclarations]: Found specification of procedure srand48_r [2018-04-12 10:40:41,369 INFO L128 BoogieDeclarations]: Found specification of procedure seed48_r [2018-04-12 10:40:41,369 INFO L128 BoogieDeclarations]: Found specification of procedure lcong48_r [2018-04-12 10:40:41,369 INFO L128 BoogieDeclarations]: Found specification of procedure malloc [2018-04-12 10:40:41,369 INFO L128 BoogieDeclarations]: Found specification of procedure calloc [2018-04-12 10:40:41,369 INFO L128 BoogieDeclarations]: Found specification of procedure realloc [2018-04-12 10:40:41,370 INFO L128 BoogieDeclarations]: Found specification of procedure free [2018-04-12 10:40:41,370 INFO L128 BoogieDeclarations]: Found specification of procedure cfree [2018-04-12 10:40:41,370 INFO L128 BoogieDeclarations]: Found specification of procedure alloca [2018-04-12 10:40:41,370 INFO L128 BoogieDeclarations]: Found specification of procedure valloc [2018-04-12 10:40:41,370 INFO L128 BoogieDeclarations]: Found specification of procedure posix_memalign [2018-04-12 10:40:41,370 INFO L128 BoogieDeclarations]: Found specification of procedure abort [2018-04-12 10:40:41,370 INFO L128 BoogieDeclarations]: Found specification of procedure atexit [2018-04-12 10:40:41,370 INFO L128 BoogieDeclarations]: Found specification of procedure on_exit [2018-04-12 10:40:41,370 INFO L128 BoogieDeclarations]: Found specification of procedure exit [2018-04-12 10:40:41,371 INFO L128 BoogieDeclarations]: Found specification of procedure _Exit [2018-04-12 10:40:41,371 INFO L128 BoogieDeclarations]: Found specification of procedure getenv [2018-04-12 10:40:41,371 INFO L128 BoogieDeclarations]: Found specification of procedure putenv [2018-04-12 10:40:41,371 INFO L128 BoogieDeclarations]: Found specification of procedure setenv [2018-04-12 10:40:41,371 INFO L128 BoogieDeclarations]: Found specification of procedure unsetenv [2018-04-12 10:40:41,371 INFO L128 BoogieDeclarations]: Found specification of procedure clearenv [2018-04-12 10:40:41,371 INFO L128 BoogieDeclarations]: Found specification of procedure mktemp [2018-04-12 10:40:41,371 INFO L128 BoogieDeclarations]: Found specification of procedure mkstemp [2018-04-12 10:40:41,371 INFO L128 BoogieDeclarations]: Found specification of procedure mkstemps [2018-04-12 10:40:41,371 INFO L128 BoogieDeclarations]: Found specification of procedure mkdtemp [2018-04-12 10:40:41,371 INFO L128 BoogieDeclarations]: Found specification of procedure system [2018-04-12 10:40:41,371 INFO L128 BoogieDeclarations]: Found specification of procedure realpath [2018-04-12 10:40:41,371 INFO L128 BoogieDeclarations]: Found specification of procedure bsearch [2018-04-12 10:40:41,372 INFO L128 BoogieDeclarations]: Found specification of procedure qsort [2018-04-12 10:40:41,372 INFO L128 BoogieDeclarations]: Found specification of procedure abs [2018-04-12 10:40:41,372 INFO L128 BoogieDeclarations]: Found specification of procedure labs [2018-04-12 10:40:41,372 INFO L128 BoogieDeclarations]: Found specification of procedure llabs [2018-04-12 10:40:41,372 INFO L128 BoogieDeclarations]: Found specification of procedure div [2018-04-12 10:40:41,372 INFO L128 BoogieDeclarations]: Found specification of procedure ldiv [2018-04-12 10:40:41,372 INFO L128 BoogieDeclarations]: Found specification of procedure lldiv [2018-04-12 10:40:41,372 INFO L128 BoogieDeclarations]: Found specification of procedure ecvt [2018-04-12 10:40:41,372 INFO L128 BoogieDeclarations]: Found specification of procedure fcvt [2018-04-12 10:40:41,372 INFO L128 BoogieDeclarations]: Found specification of procedure gcvt [2018-04-12 10:40:41,372 INFO L128 BoogieDeclarations]: Found specification of procedure qecvt [2018-04-12 10:40:41,372 INFO L128 BoogieDeclarations]: Found specification of procedure qfcvt [2018-04-12 10:40:41,372 INFO L128 BoogieDeclarations]: Found specification of procedure qgcvt [2018-04-12 10:40:41,372 INFO L128 BoogieDeclarations]: Found specification of procedure ecvt_r [2018-04-12 10:40:41,372 INFO L128 BoogieDeclarations]: Found specification of procedure fcvt_r [2018-04-12 10:40:41,372 INFO L128 BoogieDeclarations]: Found specification of procedure qecvt_r [2018-04-12 10:40:41,373 INFO L128 BoogieDeclarations]: Found specification of procedure qfcvt_r [2018-04-12 10:40:41,373 INFO L128 BoogieDeclarations]: Found specification of procedure mblen [2018-04-12 10:40:41,373 INFO L128 BoogieDeclarations]: Found specification of procedure mbtowc [2018-04-12 10:40:41,373 INFO L128 BoogieDeclarations]: Found specification of procedure wctomb [2018-04-12 10:40:41,373 INFO L128 BoogieDeclarations]: Found specification of procedure mbstowcs [2018-04-12 10:40:41,373 INFO L128 BoogieDeclarations]: Found specification of procedure wcstombs [2018-04-12 10:40:41,373 INFO L128 BoogieDeclarations]: Found specification of procedure rpmatch [2018-04-12 10:40:41,373 INFO L128 BoogieDeclarations]: Found specification of procedure getsubopt [2018-04-12 10:40:41,373 INFO L128 BoogieDeclarations]: Found specification of procedure getloadavg [2018-04-12 10:40:41,373 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2018-04-12 10:40:41,373 INFO L128 BoogieDeclarations]: Found specification of procedure subseq [2018-04-12 10:40:41,374 INFO L128 BoogieDeclarations]: Found specification of procedure read~int [2018-04-12 10:40:41,374 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-04-12 10:40:41,374 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-04-12 10:40:41,374 INFO L128 BoogieDeclarations]: Found specification of procedure write~int [2018-04-12 10:40:41,374 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-04-12 10:40:41,374 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-04-12 10:40:41,374 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-04-12 10:40:41,374 INFO L128 BoogieDeclarations]: Found specification of procedure write~unchecked~int [2018-04-12 10:40:41,635 INFO L259 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-04-12 10:40:41,635 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 12.04 10:40:41 BoogieIcfgContainer [2018-04-12 10:40:41,635 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-04-12 10:40:41,636 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-04-12 10:40:41,636 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-04-12 10:40:41,637 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-04-12 10:40:41,638 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 12.04 10:40:41" (1/3) ... [2018-04-12 10:40:41,638 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7f65f105 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 12.04 10:40:41, skipping insertion in model container [2018-04-12 10:40:41,638 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 10:40:41" (2/3) ... [2018-04-12 10:40:41,638 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7f65f105 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 12.04 10:40:41, skipping insertion in model container [2018-04-12 10:40:41,638 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 12.04 10:40:41" (3/3) ... [2018-04-12 10:40:41,639 INFO L107 eAbstractionObserver]: Analyzing ICFG subseq-alloca_true-valid-memsafety_true-termination.i [2018-04-12 10:40:41,644 INFO L131 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-04-12 10:40:41,649 INFO L143 ceAbstractionStarter]: Appying trace abstraction to program that has 15 error locations. [2018-04-12 10:40:41,671 INFO L128 ementStrategyFactory]: Using default assertion order modulation [2018-04-12 10:40:41,671 INFO L369 AbstractCegarLoop]: Interprodecural is true [2018-04-12 10:40:41,671 INFO L370 AbstractCegarLoop]: Hoare is false [2018-04-12 10:40:41,671 INFO L371 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-04-12 10:40:41,671 INFO L372 AbstractCegarLoop]: Backedges is TWOTRACK [2018-04-12 10:40:41,671 INFO L373 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-04-12 10:40:41,671 INFO L374 AbstractCegarLoop]: Difference is false [2018-04-12 10:40:41,672 INFO L375 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-04-12 10:40:41,672 INFO L380 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-04-12 10:40:41,672 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-04-12 10:40:41,679 INFO L276 IsEmpty]: Start isEmpty. Operand 55 states. [2018-04-12 10:40:41,685 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2018-04-12 10:40:41,685 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 10:40:41,685 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 10:40:41,686 INFO L408 AbstractCegarLoop]: === Iteration 1 === [subseqErr8RequiresViolation, subseqErr4RequiresViolation, subseqErr2RequiresViolation, subseqErr3RequiresViolation, subseqErr9RequiresViolation, subseqErr7RequiresViolation, subseqErr5RequiresViolation, subseqErr1RequiresViolation, subseqErr0RequiresViolation, subseqErr6RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr0RequiresViolation]=== [2018-04-12 10:40:41,688 INFO L82 PathProgramCache]: Analyzing trace with hash 1220202854, now seen corresponding path program 1 times [2018-04-12 10:40:41,689 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 10:40:41,690 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 10:40:41,718 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 10:40:41,719 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 10:40:41,719 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 10:40:41,748 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 10:40:41,753 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 10:40:41,804 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 10:40:41,806 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 10:40:41,806 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-04-12 10:40:41,807 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-04-12 10:40:41,816 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-04-12 10:40:41,816 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-04-12 10:40:41,818 INFO L87 Difference]: Start difference. First operand 55 states. Second operand 4 states. [2018-04-12 10:40:41,897 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 10:40:41,897 INFO L93 Difference]: Finished difference Result 54 states and 59 transitions. [2018-04-12 10:40:41,897 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-04-12 10:40:41,898 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2018-04-12 10:40:41,898 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 10:40:41,905 INFO L225 Difference]: With dead ends: 54 [2018-04-12 10:40:41,905 INFO L226 Difference]: Without dead ends: 51 [2018-04-12 10:40:41,907 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-04-12 10:40:41,917 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51 states. [2018-04-12 10:40:41,927 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51 to 51. [2018-04-12 10:40:41,928 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 51 states. [2018-04-12 10:40:41,929 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51 states to 51 states and 56 transitions. [2018-04-12 10:40:41,930 INFO L78 Accepts]: Start accepts. Automaton has 51 states and 56 transitions. Word has length 13 [2018-04-12 10:40:41,930 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 10:40:41,931 INFO L459 AbstractCegarLoop]: Abstraction has 51 states and 56 transitions. [2018-04-12 10:40:41,931 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-04-12 10:40:41,931 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 56 transitions. [2018-04-12 10:40:41,931 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2018-04-12 10:40:41,931 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 10:40:41,931 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 10:40:41,931 INFO L408 AbstractCegarLoop]: === Iteration 2 === [subseqErr8RequiresViolation, subseqErr4RequiresViolation, subseqErr2RequiresViolation, subseqErr3RequiresViolation, subseqErr9RequiresViolation, subseqErr7RequiresViolation, subseqErr5RequiresViolation, subseqErr1RequiresViolation, subseqErr0RequiresViolation, subseqErr6RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr0RequiresViolation]=== [2018-04-12 10:40:41,932 INFO L82 PathProgramCache]: Analyzing trace with hash 1220202855, now seen corresponding path program 1 times [2018-04-12 10:40:41,932 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 10:40:41,932 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 10:40:41,933 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 10:40:41,933 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 10:40:41,933 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 10:40:41,947 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 10:40:41,947 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 10:40:42,024 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 10:40:42,025 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 10:40:42,025 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-04-12 10:40:42,026 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-04-12 10:40:42,026 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-04-12 10:40:42,026 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2018-04-12 10:40:42,026 INFO L87 Difference]: Start difference. First operand 51 states and 56 transitions. Second operand 6 states. [2018-04-12 10:40:42,078 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 10:40:42,079 INFO L93 Difference]: Finished difference Result 50 states and 55 transitions. [2018-04-12 10:40:42,083 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-04-12 10:40:42,083 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 13 [2018-04-12 10:40:42,083 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 10:40:42,084 INFO L225 Difference]: With dead ends: 50 [2018-04-12 10:40:42,084 INFO L226 Difference]: Without dead ends: 50 [2018-04-12 10:40:42,085 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=23, Unknown=0, NotChecked=0, Total=42 [2018-04-12 10:40:42,085 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 50 states. [2018-04-12 10:40:42,088 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 50 to 50. [2018-04-12 10:40:42,088 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 50 states. [2018-04-12 10:40:42,089 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50 states to 50 states and 55 transitions. [2018-04-12 10:40:42,090 INFO L78 Accepts]: Start accepts. Automaton has 50 states and 55 transitions. Word has length 13 [2018-04-12 10:40:42,090 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 10:40:42,090 INFO L459 AbstractCegarLoop]: Abstraction has 50 states and 55 transitions. [2018-04-12 10:40:42,090 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-04-12 10:40:42,090 INFO L276 IsEmpty]: Start isEmpty. Operand 50 states and 55 transitions. [2018-04-12 10:40:42,092 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2018-04-12 10:40:42,092 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 10:40:42,093 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 10:40:42,093 INFO L408 AbstractCegarLoop]: === Iteration 3 === [subseqErr8RequiresViolation, subseqErr4RequiresViolation, subseqErr2RequiresViolation, subseqErr3RequiresViolation, subseqErr9RequiresViolation, subseqErr7RequiresViolation, subseqErr5RequiresViolation, subseqErr1RequiresViolation, subseqErr0RequiresViolation, subseqErr6RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr0RequiresViolation]=== [2018-04-12 10:40:42,093 INFO L82 PathProgramCache]: Analyzing trace with hash -828417196, now seen corresponding path program 1 times [2018-04-12 10:40:42,093 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 10:40:42,093 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 10:40:42,094 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 10:40:42,094 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 10:40:42,094 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 10:40:42,106 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 10:40:42,107 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 10:40:42,126 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 10:40:42,127 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 10:40:42,127 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-04-12 10:40:42,127 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-04-12 10:40:42,127 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-04-12 10:40:42,127 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-04-12 10:40:42,128 INFO L87 Difference]: Start difference. First operand 50 states and 55 transitions. Second operand 4 states. [2018-04-12 10:40:42,191 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 10:40:42,191 INFO L93 Difference]: Finished difference Result 49 states and 54 transitions. [2018-04-12 10:40:42,191 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-04-12 10:40:42,191 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 14 [2018-04-12 10:40:42,192 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 10:40:42,192 INFO L225 Difference]: With dead ends: 49 [2018-04-12 10:40:42,192 INFO L226 Difference]: Without dead ends: 49 [2018-04-12 10:40:42,192 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-04-12 10:40:42,193 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 49 states. [2018-04-12 10:40:42,196 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 49 to 49. [2018-04-12 10:40:42,196 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 49 states. [2018-04-12 10:40:42,197 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 49 states to 49 states and 54 transitions. [2018-04-12 10:40:42,198 INFO L78 Accepts]: Start accepts. Automaton has 49 states and 54 transitions. Word has length 14 [2018-04-12 10:40:42,198 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 10:40:42,198 INFO L459 AbstractCegarLoop]: Abstraction has 49 states and 54 transitions. [2018-04-12 10:40:42,198 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-04-12 10:40:42,198 INFO L276 IsEmpty]: Start isEmpty. Operand 49 states and 54 transitions. [2018-04-12 10:40:42,198 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2018-04-12 10:40:42,198 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 10:40:42,198 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 10:40:42,198 INFO L408 AbstractCegarLoop]: === Iteration 4 === [subseqErr8RequiresViolation, subseqErr4RequiresViolation, subseqErr2RequiresViolation, subseqErr3RequiresViolation, subseqErr9RequiresViolation, subseqErr7RequiresViolation, subseqErr5RequiresViolation, subseqErr1RequiresViolation, subseqErr0RequiresViolation, subseqErr6RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr0RequiresViolation]=== [2018-04-12 10:40:42,199 INFO L82 PathProgramCache]: Analyzing trace with hash -828417195, now seen corresponding path program 1 times [2018-04-12 10:40:42,199 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 10:40:42,199 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 10:40:42,199 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 10:40:42,199 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 10:40:42,200 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 10:40:42,209 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 10:40:42,209 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 10:40:42,241 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 10:40:42,241 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 10:40:42,241 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-04-12 10:40:42,241 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-04-12 10:40:42,241 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-04-12 10:40:42,241 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-04-12 10:40:42,242 INFO L87 Difference]: Start difference. First operand 49 states and 54 transitions. Second operand 5 states. [2018-04-12 10:40:42,282 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 10:40:42,282 INFO L93 Difference]: Finished difference Result 48 states and 53 transitions. [2018-04-12 10:40:42,283 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-04-12 10:40:42,283 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 14 [2018-04-12 10:40:42,283 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 10:40:42,283 INFO L225 Difference]: With dead ends: 48 [2018-04-12 10:40:42,283 INFO L226 Difference]: Without dead ends: 48 [2018-04-12 10:40:42,284 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=14, Invalid=16, Unknown=0, NotChecked=0, Total=30 [2018-04-12 10:40:42,284 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48 states. [2018-04-12 10:40:42,286 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48 to 48. [2018-04-12 10:40:42,286 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 48 states. [2018-04-12 10:40:42,290 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 48 states to 48 states and 53 transitions. [2018-04-12 10:40:42,291 INFO L78 Accepts]: Start accepts. Automaton has 48 states and 53 transitions. Word has length 14 [2018-04-12 10:40:42,291 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 10:40:42,291 INFO L459 AbstractCegarLoop]: Abstraction has 48 states and 53 transitions. [2018-04-12 10:40:42,291 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-04-12 10:40:42,291 INFO L276 IsEmpty]: Start isEmpty. Operand 48 states and 53 transitions. [2018-04-12 10:40:42,291 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2018-04-12 10:40:42,292 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 10:40:42,292 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 10:40:42,292 INFO L408 AbstractCegarLoop]: === Iteration 5 === [subseqErr8RequiresViolation, subseqErr4RequiresViolation, subseqErr2RequiresViolation, subseqErr3RequiresViolation, subseqErr9RequiresViolation, subseqErr7RequiresViolation, subseqErr5RequiresViolation, subseqErr1RequiresViolation, subseqErr0RequiresViolation, subseqErr6RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr0RequiresViolation]=== [2018-04-12 10:40:42,292 INFO L82 PathProgramCache]: Analyzing trace with hash 1848934114, now seen corresponding path program 1 times [2018-04-12 10:40:42,292 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 10:40:42,292 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 10:40:42,293 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 10:40:42,293 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 10:40:42,293 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 10:40:42,306 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 10:40:42,309 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 10:40:42,345 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 10:40:42,345 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 10:40:42,345 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-04-12 10:40:42,346 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-04-12 10:40:42,346 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-04-12 10:40:42,346 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-04-12 10:40:42,346 INFO L87 Difference]: Start difference. First operand 48 states and 53 transitions. Second operand 5 states. [2018-04-12 10:40:42,387 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 10:40:42,387 INFO L93 Difference]: Finished difference Result 46 states and 51 transitions. [2018-04-12 10:40:42,387 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-04-12 10:40:42,387 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 18 [2018-04-12 10:40:42,388 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 10:40:42,388 INFO L225 Difference]: With dead ends: 46 [2018-04-12 10:40:42,388 INFO L226 Difference]: Without dead ends: 46 [2018-04-12 10:40:42,388 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-04-12 10:40:42,388 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 46 states. [2018-04-12 10:40:42,389 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 46 to 46. [2018-04-12 10:40:42,389 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 46 states. [2018-04-12 10:40:42,390 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46 states to 46 states and 51 transitions. [2018-04-12 10:40:42,390 INFO L78 Accepts]: Start accepts. Automaton has 46 states and 51 transitions. Word has length 18 [2018-04-12 10:40:42,390 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 10:40:42,390 INFO L459 AbstractCegarLoop]: Abstraction has 46 states and 51 transitions. [2018-04-12 10:40:42,390 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-04-12 10:40:42,390 INFO L276 IsEmpty]: Start isEmpty. Operand 46 states and 51 transitions. [2018-04-12 10:40:42,391 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2018-04-12 10:40:42,391 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 10:40:42,391 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 10:40:42,391 INFO L408 AbstractCegarLoop]: === Iteration 6 === [subseqErr8RequiresViolation, subseqErr4RequiresViolation, subseqErr2RequiresViolation, subseqErr3RequiresViolation, subseqErr9RequiresViolation, subseqErr7RequiresViolation, subseqErr5RequiresViolation, subseqErr1RequiresViolation, subseqErr0RequiresViolation, subseqErr6RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr0RequiresViolation]=== [2018-04-12 10:40:42,391 INFO L82 PathProgramCache]: Analyzing trace with hash 1848934115, now seen corresponding path program 1 times [2018-04-12 10:40:42,391 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 10:40:42,391 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 10:40:42,392 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 10:40:42,392 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 10:40:42,392 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 10:40:42,398 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 10:40:42,398 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 10:40:42,446 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 10:40:42,447 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 10:40:42,447 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-04-12 10:40:42,447 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-04-12 10:40:42,447 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-04-12 10:40:42,447 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-04-12 10:40:42,447 INFO L87 Difference]: Start difference. First operand 46 states and 51 transitions. Second operand 8 states. [2018-04-12 10:40:42,545 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 10:40:42,545 INFO L93 Difference]: Finished difference Result 67 states and 76 transitions. [2018-04-12 10:40:42,545 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-04-12 10:40:42,545 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 18 [2018-04-12 10:40:42,546 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 10:40:42,547 INFO L225 Difference]: With dead ends: 67 [2018-04-12 10:40:42,547 INFO L226 Difference]: Without dead ends: 67 [2018-04-12 10:40:42,548 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=37, Invalid=95, Unknown=0, NotChecked=0, Total=132 [2018-04-12 10:40:42,548 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 67 states. [2018-04-12 10:40:42,549 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 67 to 57. [2018-04-12 10:40:42,550 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 57 states. [2018-04-12 10:40:42,550 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 57 states to 57 states and 69 transitions. [2018-04-12 10:40:42,550 INFO L78 Accepts]: Start accepts. Automaton has 57 states and 69 transitions. Word has length 18 [2018-04-12 10:40:42,550 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 10:40:42,550 INFO L459 AbstractCegarLoop]: Abstraction has 57 states and 69 transitions. [2018-04-12 10:40:42,550 INFO L460 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-04-12 10:40:42,550 INFO L276 IsEmpty]: Start isEmpty. Operand 57 states and 69 transitions. [2018-04-12 10:40:42,551 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-04-12 10:40:42,551 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 10:40:42,551 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 10:40:42,551 INFO L408 AbstractCegarLoop]: === Iteration 7 === [subseqErr8RequiresViolation, subseqErr4RequiresViolation, subseqErr2RequiresViolation, subseqErr3RequiresViolation, subseqErr9RequiresViolation, subseqErr7RequiresViolation, subseqErr5RequiresViolation, subseqErr1RequiresViolation, subseqErr0RequiresViolation, subseqErr6RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr0RequiresViolation]=== [2018-04-12 10:40:42,551 INFO L82 PathProgramCache]: Analyzing trace with hash -1359365041, now seen corresponding path program 1 times [2018-04-12 10:40:42,551 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 10:40:42,551 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 10:40:42,552 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 10:40:42,552 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 10:40:42,552 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 10:40:42,562 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 10:40:42,562 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 10:40:42,601 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 10:40:42,601 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 10:40:42,601 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-04-12 10:40:42,601 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-04-12 10:40:42,601 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-04-12 10:40:42,601 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-04-12 10:40:42,601 INFO L87 Difference]: Start difference. First operand 57 states and 69 transitions. Second operand 5 states. [2018-04-12 10:40:42,630 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 10:40:42,630 INFO L93 Difference]: Finished difference Result 54 states and 64 transitions. [2018-04-12 10:40:42,630 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-04-12 10:40:42,630 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 21 [2018-04-12 10:40:42,631 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 10:40:42,631 INFO L225 Difference]: With dead ends: 54 [2018-04-12 10:40:42,631 INFO L226 Difference]: Without dead ends: 54 [2018-04-12 10:40:42,631 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-04-12 10:40:42,631 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 54 states. [2018-04-12 10:40:42,633 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 54 to 54. [2018-04-12 10:40:42,633 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 54 states. [2018-04-12 10:40:42,633 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 54 states to 54 states and 64 transitions. [2018-04-12 10:40:42,633 INFO L78 Accepts]: Start accepts. Automaton has 54 states and 64 transitions. Word has length 21 [2018-04-12 10:40:42,633 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 10:40:42,633 INFO L459 AbstractCegarLoop]: Abstraction has 54 states and 64 transitions. [2018-04-12 10:40:42,633 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-04-12 10:40:42,633 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 64 transitions. [2018-04-12 10:40:42,634 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-04-12 10:40:42,634 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 10:40:42,634 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 10:40:42,634 INFO L408 AbstractCegarLoop]: === Iteration 8 === [subseqErr8RequiresViolation, subseqErr4RequiresViolation, subseqErr2RequiresViolation, subseqErr3RequiresViolation, subseqErr9RequiresViolation, subseqErr7RequiresViolation, subseqErr5RequiresViolation, subseqErr1RequiresViolation, subseqErr0RequiresViolation, subseqErr6RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr0RequiresViolation]=== [2018-04-12 10:40:42,634 INFO L82 PathProgramCache]: Analyzing trace with hash -1359365040, now seen corresponding path program 1 times [2018-04-12 10:40:42,634 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 10:40:42,634 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 10:40:42,635 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 10:40:42,635 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 10:40:42,635 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 10:40:42,644 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 10:40:42,645 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 10:40:42,693 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 10:40:42,693 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 10:40:42,694 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-04-12 10:40:42,694 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-04-12 10:40:42,694 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-04-12 10:40:42,694 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=40, Unknown=0, NotChecked=0, Total=56 [2018-04-12 10:40:42,694 INFO L87 Difference]: Start difference. First operand 54 states and 64 transitions. Second operand 8 states. [2018-04-12 10:40:42,760 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 10:40:42,760 INFO L93 Difference]: Finished difference Result 70 states and 84 transitions. [2018-04-12 10:40:42,760 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-04-12 10:40:42,760 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 21 [2018-04-12 10:40:42,760 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 10:40:42,761 INFO L225 Difference]: With dead ends: 70 [2018-04-12 10:40:42,761 INFO L226 Difference]: Without dead ends: 70 [2018-04-12 10:40:42,761 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=26, Invalid=64, Unknown=0, NotChecked=0, Total=90 [2018-04-12 10:40:42,761 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 70 states. [2018-04-12 10:40:42,763 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 70 to 64. [2018-04-12 10:40:42,763 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 64 states. [2018-04-12 10:40:42,764 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 64 states to 64 states and 76 transitions. [2018-04-12 10:40:42,764 INFO L78 Accepts]: Start accepts. Automaton has 64 states and 76 transitions. Word has length 21 [2018-04-12 10:40:42,764 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 10:40:42,764 INFO L459 AbstractCegarLoop]: Abstraction has 64 states and 76 transitions. [2018-04-12 10:40:42,764 INFO L460 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-04-12 10:40:42,764 INFO L276 IsEmpty]: Start isEmpty. Operand 64 states and 76 transitions. [2018-04-12 10:40:42,765 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-04-12 10:40:42,765 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 10:40:42,765 INFO L355 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 10:40:42,765 INFO L408 AbstractCegarLoop]: === Iteration 9 === [subseqErr8RequiresViolation, subseqErr4RequiresViolation, subseqErr2RequiresViolation, subseqErr3RequiresViolation, subseqErr9RequiresViolation, subseqErr7RequiresViolation, subseqErr5RequiresViolation, subseqErr1RequiresViolation, subseqErr0RequiresViolation, subseqErr6RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr0RequiresViolation]=== [2018-04-12 10:40:42,765 INFO L82 PathProgramCache]: Analyzing trace with hash 613400062, now seen corresponding path program 1 times [2018-04-12 10:40:42,765 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 10:40:42,766 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 10:40:42,766 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 10:40:42,766 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 10:40:42,767 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 10:40:42,776 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 10:40:42,776 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 10:40:42,805 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 10:40:42,805 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 10:40:42,805 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-04-12 10:40:42,806 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-04-12 10:40:42,806 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-04-12 10:40:42,806 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-04-12 10:40:42,806 INFO L87 Difference]: Start difference. First operand 64 states and 76 transitions. Second operand 3 states. [2018-04-12 10:40:42,812 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 10:40:42,812 INFO L93 Difference]: Finished difference Result 67 states and 79 transitions. [2018-04-12 10:40:42,813 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-04-12 10:40:42,813 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 27 [2018-04-12 10:40:42,813 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 10:40:42,814 INFO L225 Difference]: With dead ends: 67 [2018-04-12 10:40:42,814 INFO L226 Difference]: Without dead ends: 67 [2018-04-12 10:40:42,815 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-04-12 10:40:42,815 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 67 states. [2018-04-12 10:40:42,818 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 67 to 66. [2018-04-12 10:40:42,818 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 66 states. [2018-04-12 10:40:42,819 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 66 states to 66 states and 78 transitions. [2018-04-12 10:40:42,819 INFO L78 Accepts]: Start accepts. Automaton has 66 states and 78 transitions. Word has length 27 [2018-04-12 10:40:42,819 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 10:40:42,819 INFO L459 AbstractCegarLoop]: Abstraction has 66 states and 78 transitions. [2018-04-12 10:40:42,819 INFO L460 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-04-12 10:40:42,820 INFO L276 IsEmpty]: Start isEmpty. Operand 66 states and 78 transitions. [2018-04-12 10:40:42,820 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-04-12 10:40:42,820 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 10:40:42,820 INFO L355 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 10:40:42,820 INFO L408 AbstractCegarLoop]: === Iteration 10 === [subseqErr8RequiresViolation, subseqErr4RequiresViolation, subseqErr2RequiresViolation, subseqErr3RequiresViolation, subseqErr9RequiresViolation, subseqErr7RequiresViolation, subseqErr5RequiresViolation, subseqErr1RequiresViolation, subseqErr0RequiresViolation, subseqErr6RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr0RequiresViolation]=== [2018-04-12 10:40:42,821 INFO L82 PathProgramCache]: Analyzing trace with hash -1638706655, now seen corresponding path program 1 times [2018-04-12 10:40:42,821 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 10:40:42,821 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 10:40:42,822 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 10:40:42,822 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 10:40:42,822 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 10:40:42,834 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 10:40:42,835 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 10:40:42,968 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 10:40:42,968 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 10:40:42,968 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2018-04-12 10:40:42,968 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-04-12 10:40:42,968 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-04-12 10:40:42,968 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=26, Invalid=106, Unknown=0, NotChecked=0, Total=132 [2018-04-12 10:40:42,968 INFO L87 Difference]: Start difference. First operand 66 states and 78 transitions. Second operand 12 states. [2018-04-12 10:40:43,130 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 10:40:43,131 INFO L93 Difference]: Finished difference Result 91 states and 104 transitions. [2018-04-12 10:40:43,131 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-04-12 10:40:43,131 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 29 [2018-04-12 10:40:43,131 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 10:40:43,135 INFO L225 Difference]: With dead ends: 91 [2018-04-12 10:40:43,135 INFO L226 Difference]: Without dead ends: 91 [2018-04-12 10:40:43,135 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 66 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=90, Invalid=330, Unknown=0, NotChecked=0, Total=420 [2018-04-12 10:40:43,135 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 91 states. [2018-04-12 10:40:43,139 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 91 to 84. [2018-04-12 10:40:43,139 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 84 states. [2018-04-12 10:40:43,140 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 84 states to 84 states and 98 transitions. [2018-04-12 10:40:43,140 INFO L78 Accepts]: Start accepts. Automaton has 84 states and 98 transitions. Word has length 29 [2018-04-12 10:40:43,140 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 10:40:43,140 INFO L459 AbstractCegarLoop]: Abstraction has 84 states and 98 transitions. [2018-04-12 10:40:43,140 INFO L460 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-04-12 10:40:43,140 INFO L276 IsEmpty]: Start isEmpty. Operand 84 states and 98 transitions. [2018-04-12 10:40:43,141 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-04-12 10:40:43,141 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 10:40:43,141 INFO L355 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 10:40:43,141 INFO L408 AbstractCegarLoop]: === Iteration 11 === [subseqErr8RequiresViolation, subseqErr4RequiresViolation, subseqErr2RequiresViolation, subseqErr3RequiresViolation, subseqErr9RequiresViolation, subseqErr7RequiresViolation, subseqErr5RequiresViolation, subseqErr1RequiresViolation, subseqErr0RequiresViolation, subseqErr6RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr0RequiresViolation]=== [2018-04-12 10:40:43,141 INFO L82 PathProgramCache]: Analyzing trace with hash 850822307, now seen corresponding path program 1 times [2018-04-12 10:40:43,141 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 10:40:43,142 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 10:40:43,142 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 10:40:43,142 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 10:40:43,142 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 10:40:43,153 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 10:40:43,153 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 10:40:43,283 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 10:40:43,283 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-12 10:40:43,283 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-12 10:40:43,289 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 10:40:43,306 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 10:40:43,311 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 10:40:43,361 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-04-12 10:40:43,365 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-12 10:40:43,365 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 10:40:43,367 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 10:40:43,368 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 10:40:43,368 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:11, output treesize:7 [2018-04-12 10:40:43,402 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2018-04-12 10:40:43,404 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2018-04-12 10:40:43,404 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 10:40:43,405 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 10:40:43,405 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 10:40:43,406 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:15, output treesize:3 [2018-04-12 10:40:43,438 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 10:40:43,456 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-04-12 10:40:43,456 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [13] total 20 [2018-04-12 10:40:43,456 INFO L442 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-04-12 10:40:43,456 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-04-12 10:40:43,457 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=45, Invalid=335, Unknown=0, NotChecked=0, Total=380 [2018-04-12 10:40:43,463 INFO L87 Difference]: Start difference. First operand 84 states and 98 transitions. Second operand 20 states. [2018-04-12 10:40:44,142 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 10:40:44,142 INFO L93 Difference]: Finished difference Result 163 states and 184 transitions. [2018-04-12 10:40:44,147 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 37 states. [2018-04-12 10:40:44,147 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 29 [2018-04-12 10:40:44,147 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 10:40:44,148 INFO L225 Difference]: With dead ends: 163 [2018-04-12 10:40:44,148 INFO L226 Difference]: Without dead ends: 163 [2018-04-12 10:40:44,149 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 75 GetRequests, 25 SyntacticMatches, 0 SemanticMatches, 50 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 607 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=386, Invalid=2266, Unknown=0, NotChecked=0, Total=2652 [2018-04-12 10:40:44,149 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 163 states. [2018-04-12 10:40:44,156 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 163 to 114. [2018-04-12 10:40:44,156 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 114 states. [2018-04-12 10:40:44,157 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 114 states to 114 states and 135 transitions. [2018-04-12 10:40:44,157 INFO L78 Accepts]: Start accepts. Automaton has 114 states and 135 transitions. Word has length 29 [2018-04-12 10:40:44,158 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 10:40:44,158 INFO L459 AbstractCegarLoop]: Abstraction has 114 states and 135 transitions. [2018-04-12 10:40:44,158 INFO L460 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-04-12 10:40:44,158 INFO L276 IsEmpty]: Start isEmpty. Operand 114 states and 135 transitions. [2018-04-12 10:40:44,158 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2018-04-12 10:40:44,159 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 10:40:44,159 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 10:40:44,159 INFO L408 AbstractCegarLoop]: === Iteration 12 === [subseqErr8RequiresViolation, subseqErr4RequiresViolation, subseqErr2RequiresViolation, subseqErr3RequiresViolation, subseqErr9RequiresViolation, subseqErr7RequiresViolation, subseqErr5RequiresViolation, subseqErr1RequiresViolation, subseqErr0RequiresViolation, subseqErr6RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr0RequiresViolation]=== [2018-04-12 10:40:44,159 INFO L82 PathProgramCache]: Analyzing trace with hash -1886060033, now seen corresponding path program 1 times [2018-04-12 10:40:44,163 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 10:40:44,163 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 10:40:44,163 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 10:40:44,164 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 10:40:44,164 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 10:40:44,174 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 10:40:44,175 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 10:40:44,244 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 10:40:44,245 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-12 10:40:44,245 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-04-12 10:40:44,245 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-04-12 10:40:44,245 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-04-12 10:40:44,245 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-04-12 10:40:44,246 INFO L87 Difference]: Start difference. First operand 114 states and 135 transitions. Second operand 6 states. [2018-04-12 10:40:44,371 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 10:40:44,372 INFO L93 Difference]: Finished difference Result 113 states and 134 transitions. [2018-04-12 10:40:44,372 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-04-12 10:40:44,372 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 31 [2018-04-12 10:40:44,372 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 10:40:44,388 INFO L225 Difference]: With dead ends: 113 [2018-04-12 10:40:44,388 INFO L226 Difference]: Without dead ends: 65 [2018-04-12 10:40:44,389 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2018-04-12 10:40:44,389 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 65 states. [2018-04-12 10:40:44,391 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 65 to 65. [2018-04-12 10:40:44,391 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 65 states. [2018-04-12 10:40:44,391 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 65 states to 65 states and 77 transitions. [2018-04-12 10:40:44,392 INFO L78 Accepts]: Start accepts. Automaton has 65 states and 77 transitions. Word has length 31 [2018-04-12 10:40:44,392 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 10:40:44,392 INFO L459 AbstractCegarLoop]: Abstraction has 65 states and 77 transitions. [2018-04-12 10:40:44,392 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-04-12 10:40:44,392 INFO L276 IsEmpty]: Start isEmpty. Operand 65 states and 77 transitions. [2018-04-12 10:40:44,393 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-04-12 10:40:44,393 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 10:40:44,393 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 10:40:44,393 INFO L408 AbstractCegarLoop]: === Iteration 13 === [subseqErr8RequiresViolation, subseqErr4RequiresViolation, subseqErr2RequiresViolation, subseqErr3RequiresViolation, subseqErr9RequiresViolation, subseqErr7RequiresViolation, subseqErr5RequiresViolation, subseqErr1RequiresViolation, subseqErr0RequiresViolation, subseqErr6RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr0RequiresViolation]=== [2018-04-12 10:40:44,393 INFO L82 PathProgramCache]: Analyzing trace with hash -1909098350, now seen corresponding path program 1 times [2018-04-12 10:40:44,393 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 10:40:44,393 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 10:40:44,394 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 10:40:44,394 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 10:40:44,394 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 10:40:44,407 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 10:40:44,408 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 10:40:44,606 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 10:40:44,606 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-12 10:40:44,607 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-12 10:40:44,612 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 10:40:44,626 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 10:40:44,628 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 10:40:44,634 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 11 [2018-04-12 10:40:44,636 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 10 [2018-04-12 10:40:44,636 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 10:40:44,638 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 10:40:44,650 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-12 10:40:44,650 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:25, output treesize:21 [2018-04-12 10:40:44,728 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 14 [2018-04-12 10:40:44,734 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 1 case distinctions, treesize of input 14 treesize of output 11 [2018-04-12 10:40:44,734 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 2 xjuncts. [2018-04-12 10:40:44,737 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-12 10:40:44,747 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 2 xjuncts. [2018-04-12 10:40:44,747 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:34, output treesize:33 [2018-04-12 10:40:44,826 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 10:40:44,844 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 10:40:44,844 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 9] total 20 [2018-04-12 10:40:44,844 INFO L442 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-04-12 10:40:44,845 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-04-12 10:40:44,845 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=55, Invalid=365, Unknown=0, NotChecked=0, Total=420 [2018-04-12 10:40:44,845 INFO L87 Difference]: Start difference. First operand 65 states and 77 transitions. Second operand 21 states. [2018-04-12 10:40:45,599 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 10:40:45,600 INFO L93 Difference]: Finished difference Result 93 states and 111 transitions. [2018-04-12 10:40:45,600 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-04-12 10:40:45,600 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 32 [2018-04-12 10:40:45,600 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 10:40:45,600 INFO L225 Difference]: With dead ends: 93 [2018-04-12 10:40:45,600 INFO L226 Difference]: Without dead ends: 91 [2018-04-12 10:40:45,601 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 57 GetRequests, 26 SyntacticMatches, 0 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 164 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=180, Invalid=876, Unknown=0, NotChecked=0, Total=1056 [2018-04-12 10:40:45,601 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 91 states. [2018-04-12 10:40:45,602 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 91 to 86. [2018-04-12 10:40:45,602 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 86 states. [2018-04-12 10:40:45,603 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 86 states to 86 states and 99 transitions. [2018-04-12 10:40:45,603 INFO L78 Accepts]: Start accepts. Automaton has 86 states and 99 transitions. Word has length 32 [2018-04-12 10:40:45,603 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 10:40:45,603 INFO L459 AbstractCegarLoop]: Abstraction has 86 states and 99 transitions. [2018-04-12 10:40:45,603 INFO L460 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-04-12 10:40:45,603 INFO L276 IsEmpty]: Start isEmpty. Operand 86 states and 99 transitions. [2018-04-12 10:40:45,603 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2018-04-12 10:40:45,603 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 10:40:45,603 INFO L355 BasicCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 10:40:45,603 INFO L408 AbstractCegarLoop]: === Iteration 14 === [subseqErr8RequiresViolation, subseqErr4RequiresViolation, subseqErr2RequiresViolation, subseqErr3RequiresViolation, subseqErr9RequiresViolation, subseqErr7RequiresViolation, subseqErr5RequiresViolation, subseqErr1RequiresViolation, subseqErr0RequiresViolation, subseqErr6RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr0RequiresViolation]=== [2018-04-12 10:40:45,604 INFO L82 PathProgramCache]: Analyzing trace with hash -1917342621, now seen corresponding path program 1 times [2018-04-12 10:40:45,604 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 10:40:45,604 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 10:40:45,604 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 10:40:45,604 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 10:40:45,604 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 10:40:45,613 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 10:40:45,613 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 10:40:45,898 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 10:40:45,899 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-12 10:40:45,899 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-12 10:40:45,904 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 10:40:45,920 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 10:40:45,923 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 10:40:45,925 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-12 10:40:45,925 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 10:40:45,930 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-12 10:40:45,930 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 10:40:45,933 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 10:40:45,934 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:16, output treesize:14 [2018-04-12 10:40:45,955 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 10:40:45,956 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-04-12 10:40:45,957 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 10:40:45,963 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 10:40:45,964 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 10:40:45,964 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-04-12 10:40:45,965 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 10:40:45,968 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 10:40:45,969 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:25, output treesize:18 [2018-04-12 10:40:46,017 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-04-12 10:40:46,018 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-12 10:40:46,019 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 10:40:46,020 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 10:40:46,023 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 10:40:46,023 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:25, output treesize:21 [2018-04-12 10:40:46,043 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 29 [2018-04-12 10:40:46,045 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 12 [2018-04-12 10:40:46,045 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 10:40:46,049 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 10:40:46,053 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-04-12 10:40:46,053 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:32, output treesize:28 [2018-04-12 10:40:48,396 WARN L148 SmtUtils]: Spent 2023ms on a formula simplification that was a NOOP. DAG size: 37 [2018-04-12 10:40:48,487 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 2 case distinctions, treesize of input 46 treesize of output 56 [2018-04-12 10:40:48,501 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 44 treesize of output 51 [2018-04-12 10:40:48,502 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 4 xjuncts. [2018-04-12 10:40:48,581 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 3 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 3 case distinctions, treesize of input 36 treesize of output 55 [2018-04-12 10:40:48,582 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 4 xjuncts. [2018-04-12 10:40:48,644 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 29 [2018-04-12 10:40:48,645 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-12 10:40:48,646 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 28 [2018-04-12 10:40:48,647 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-04-12 10:40:48,649 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 24 [2018-04-12 10:40:48,649 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-04-12 10:40:48,715 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 32 [2018-04-12 10:40:48,716 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 1 xjuncts. [2018-04-12 10:40:48,808 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 1 case distinctions, treesize of input 44 treesize of output 42 [2018-04-12 10:40:48,809 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 2 xjuncts. [2018-04-12 10:40:48,899 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 1 case distinctions, treesize of input 32 treesize of output 30 [2018-04-12 10:40:48,900 INFO L267 ElimStorePlain]: Start of recursive call 10: End of recursive call: and 2 xjuncts. [2018-04-12 10:40:48,964 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 31 [2018-04-12 10:40:48,965 INFO L267 ElimStorePlain]: Start of recursive call 11: End of recursive call: and 1 xjuncts. [2018-04-12 10:40:48,966 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 26 [2018-04-12 10:40:48,966 INFO L267 ElimStorePlain]: Start of recursive call 12: End of recursive call: and 1 xjuncts. [2018-04-12 10:40:49,006 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 21 [2018-04-12 10:40:49,007 INFO L267 ElimStorePlain]: Start of recursive call 13: End of recursive call: and 1 xjuncts. [2018-04-12 10:40:49,008 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 16 [2018-04-12 10:40:49,008 INFO L267 ElimStorePlain]: Start of recursive call 14: End of recursive call: and 1 xjuncts. [2018-04-12 10:40:49,042 INFO L267 ElimStorePlain]: Start of recursive call 2: 8 dim-1 vars, End of recursive call: and 7 xjuncts. [2018-04-12 10:40:49,079 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 1 dim-2 vars, End of recursive call: and 3 xjuncts. [2018-04-12 10:40:49,080 INFO L202 ElimStorePlain]: Needed 14 recursive calls to eliminate 5 variables, input treesize:60, output treesize:68 [2018-04-12 10:40:49,155 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 9 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 10:40:49,176 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 10:40:49,177 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 18] total 28 [2018-04-12 10:40:49,177 INFO L442 AbstractCegarLoop]: Interpolant automaton has 29 states [2018-04-12 10:40:49,177 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2018-04-12 10:40:49,177 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=85, Invalid=727, Unknown=0, NotChecked=0, Total=812 [2018-04-12 10:40:49,177 INFO L87 Difference]: Start difference. First operand 86 states and 99 transitions. Second operand 29 states. [2018-04-12 10:40:51,570 WARN L151 SmtUtils]: Spent 2031ms on a formula simplification. DAG size of input: 51 DAG size of output 33 [2018-04-12 10:40:56,334 WARN L151 SmtUtils]: Spent 4521ms on a formula simplification. DAG size of input: 62 DAG size of output 49 [2018-04-12 10:40:57,113 WARN L151 SmtUtils]: Spent 238ms on a formula simplification. DAG size of input: 60 DAG size of output 49 [2018-04-12 10:40:57,474 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 10:40:57,474 INFO L93 Difference]: Finished difference Result 102 states and 109 transitions. [2018-04-12 10:40:57,474 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2018-04-12 10:40:57,474 INFO L78 Accepts]: Start accepts. Automaton has 29 states. Word has length 40 [2018-04-12 10:40:57,474 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 10:40:57,475 INFO L225 Difference]: With dead ends: 102 [2018-04-12 10:40:57,475 INFO L226 Difference]: Without dead ends: 102 [2018-04-12 10:40:57,475 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 78 GetRequests, 25 SyntacticMatches, 3 SemanticMatches, 50 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 426 ImplicationChecksByTransitivity, 10.3s TimeCoverageRelationStatistics Valid=397, Invalid=2255, Unknown=0, NotChecked=0, Total=2652 [2018-04-12 10:40:57,476 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 102 states. [2018-04-12 10:40:57,477 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 102 to 52. [2018-04-12 10:40:57,477 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 52 states. [2018-04-12 10:40:57,477 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 52 states to 52 states and 55 transitions. [2018-04-12 10:40:57,477 INFO L78 Accepts]: Start accepts. Automaton has 52 states and 55 transitions. Word has length 40 [2018-04-12 10:40:57,477 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 10:40:57,477 INFO L459 AbstractCegarLoop]: Abstraction has 52 states and 55 transitions. [2018-04-12 10:40:57,477 INFO L460 AbstractCegarLoop]: Interpolant automaton has 29 states. [2018-04-12 10:40:57,478 INFO L276 IsEmpty]: Start isEmpty. Operand 52 states and 55 transitions. [2018-04-12 10:40:57,478 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-04-12 10:40:57,478 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 10:40:57,478 INFO L355 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 10:40:57,479 INFO L408 AbstractCegarLoop]: === Iteration 15 === [subseqErr8RequiresViolation, subseqErr4RequiresViolation, subseqErr2RequiresViolation, subseqErr3RequiresViolation, subseqErr9RequiresViolation, subseqErr7RequiresViolation, subseqErr5RequiresViolation, subseqErr1RequiresViolation, subseqErr0RequiresViolation, subseqErr6RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr0RequiresViolation]=== [2018-04-12 10:40:57,479 INFO L82 PathProgramCache]: Analyzing trace with hash -783966512, now seen corresponding path program 2 times [2018-04-12 10:40:57,479 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 10:40:57,479 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 10:40:57,480 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 10:40:57,480 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 10:40:57,480 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 10:40:57,490 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 10:40:57,491 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 10:40:57,778 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 10:40:57,779 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-12 10:40:57,779 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-12 10:40:57,787 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-04-12 10:40:57,803 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-04-12 10:40:57,803 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-12 10:40:57,806 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 10:40:57,809 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-12 10:40:57,809 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 10:40:57,811 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 10:40:57,812 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-04-12 10:40:57,832 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 13 [2018-04-12 10:40:57,834 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 12 [2018-04-12 10:40:57,834 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 10:40:57,836 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 10:40:57,839 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 10:40:57,839 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:20, output treesize:16 [2018-04-12 10:40:58,030 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 34 treesize of output 34 [2018-04-12 10:40:58,043 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 26 treesize of output 33 [2018-04-12 10:40:58,044 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 4 xjuncts. [2018-04-12 10:40:58,070 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 23 [2018-04-12 10:40:58,071 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-12 10:40:58,116 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 1 case distinctions, treesize of input 23 treesize of output 21 [2018-04-12 10:40:58,116 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 2 xjuncts. [2018-04-12 10:40:58,138 INFO L267 ElimStorePlain]: Start of recursive call 2: 3 dim-1 vars, End of recursive call: and 5 xjuncts. [2018-04-12 10:40:58,170 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 5 xjuncts. [2018-04-12 10:40:58,171 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:44, output treesize:109 [2018-04-12 10:40:58,234 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 9 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 10:40:58,253 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 10:40:58,253 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 14] total 25 [2018-04-12 10:40:58,253 INFO L442 AbstractCegarLoop]: Interpolant automaton has 26 states [2018-04-12 10:40:58,254 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2018-04-12 10:40:58,254 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=72, Invalid=578, Unknown=0, NotChecked=0, Total=650 [2018-04-12 10:40:58,254 INFO L87 Difference]: Start difference. First operand 52 states and 55 transitions. Second operand 26 states. [2018-04-12 10:40:59,597 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 10:40:59,597 INFO L93 Difference]: Finished difference Result 69 states and 73 transitions. [2018-04-12 10:40:59,597 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2018-04-12 10:40:59,597 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 43 [2018-04-12 10:40:59,598 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 10:40:59,598 INFO L225 Difference]: With dead ends: 69 [2018-04-12 10:40:59,598 INFO L226 Difference]: Without dead ends: 66 [2018-04-12 10:40:59,599 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 87 GetRequests, 31 SyntacticMatches, 2 SemanticMatches, 54 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 632 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=473, Invalid=2607, Unknown=0, NotChecked=0, Total=3080 [2018-04-12 10:40:59,599 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 66 states. [2018-04-12 10:40:59,599 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 66 to 51. [2018-04-12 10:40:59,600 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 51 states. [2018-04-12 10:40:59,600 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51 states to 51 states and 53 transitions. [2018-04-12 10:40:59,600 INFO L78 Accepts]: Start accepts. Automaton has 51 states and 53 transitions. Word has length 43 [2018-04-12 10:40:59,600 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 10:40:59,600 INFO L459 AbstractCegarLoop]: Abstraction has 51 states and 53 transitions. [2018-04-12 10:40:59,600 INFO L460 AbstractCegarLoop]: Interpolant automaton has 26 states. [2018-04-12 10:40:59,600 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 53 transitions. [2018-04-12 10:40:59,601 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-04-12 10:40:59,601 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 10:40:59,601 INFO L355 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 10:40:59,601 INFO L408 AbstractCegarLoop]: === Iteration 16 === [subseqErr8RequiresViolation, subseqErr4RequiresViolation, subseqErr2RequiresViolation, subseqErr3RequiresViolation, subseqErr9RequiresViolation, subseqErr7RequiresViolation, subseqErr5RequiresViolation, subseqErr1RequiresViolation, subseqErr0RequiresViolation, subseqErr6RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr0RequiresViolation]=== [2018-04-12 10:40:59,601 INFO L82 PathProgramCache]: Analyzing trace with hash 991040850, now seen corresponding path program 1 times [2018-04-12 10:40:59,601 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-04-12 10:40:59,601 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-04-12 10:40:59,601 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 10:40:59,602 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-12 10:40:59,602 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-12 10:40:59,610 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 10:40:59,611 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-12 10:40:59,767 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 10:40:59,768 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-12 10:40:59,768 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-04-12 10:40:59,773 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-12 10:40:59,787 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 10:40:59,790 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 10:40:59,796 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-12 10:40:59,796 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 10:40:59,799 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 10:40:59,799 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-04-12 10:40:59,814 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-04-12 10:40:59,816 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-12 10:40:59,816 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 10:40:59,817 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 10:40:59,818 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-12 10:40:59,818 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:15, output treesize:11 [2018-04-12 10:40:59,876 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 15 [2018-04-12 10:40:59,880 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 1 case distinctions, treesize of input 15 treesize of output 12 [2018-04-12 10:40:59,880 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 2 xjuncts. [2018-04-12 10:40:59,882 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-12 10:40:59,886 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 2 xjuncts. [2018-04-12 10:40:59,886 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:29, output treesize:34 [2018-04-12 10:40:59,939 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 5 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 10:40:59,957 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 10:40:59,957 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 12] total 19 [2018-04-12 10:40:59,958 INFO L442 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-04-12 10:40:59,958 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-04-12 10:40:59,958 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=47, Invalid=333, Unknown=0, NotChecked=0, Total=380 [2018-04-12 10:40:59,958 INFO L87 Difference]: Start difference. First operand 51 states and 53 transitions. Second operand 20 states. [2018-04-12 10:41:00,361 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 10:41:00,361 INFO L93 Difference]: Finished difference Result 61 states and 64 transitions. [2018-04-12 10:41:00,361 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-04-12 10:41:00,361 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 43 [2018-04-12 10:41:00,361 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 10:41:00,361 INFO L225 Difference]: With dead ends: 61 [2018-04-12 10:41:00,361 INFO L226 Difference]: Without dead ends: 0 [2018-04-12 10:41:00,362 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 65 GetRequests, 33 SyntacticMatches, 2 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 105 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=180, Invalid=812, Unknown=0, NotChecked=0, Total=992 [2018-04-12 10:41:00,362 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 0 states. [2018-04-12 10:41:00,362 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 0 to 0. [2018-04-12 10:41:00,362 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 0 states. [2018-04-12 10:41:00,362 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 0 states to 0 states and 0 transitions. [2018-04-12 10:41:00,362 INFO L78 Accepts]: Start accepts. Automaton has 0 states and 0 transitions. Word has length 43 [2018-04-12 10:41:00,362 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 10:41:00,362 INFO L459 AbstractCegarLoop]: Abstraction has 0 states and 0 transitions. [2018-04-12 10:41:00,362 INFO L460 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-04-12 10:41:00,362 INFO L276 IsEmpty]: Start isEmpty. Operand 0 states and 0 transitions. [2018-04-12 10:41:00,363 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2018-04-12 10:41:00,365 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 12.04 10:41:00 BoogieIcfgContainer [2018-04-12 10:41:00,365 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-04-12 10:41:00,366 INFO L168 Benchmark]: Toolchain (without parser) took 19351.70 ms. Allocated memory was 400.0 MB in the beginning and 800.1 MB in the end (delta: 400.0 MB). Free memory was 335.2 MB in the beginning and 516.3 MB in the end (delta: -181.1 MB). Peak memory consumption was 218.9 MB. Max. memory is 5.3 GB. [2018-04-12 10:41:00,367 INFO L168 Benchmark]: CDTParser took 0.12 ms. Allocated memory is still 400.0 MB. Free memory is still 359.1 MB. There was no memory consumed. Max. memory is 5.3 GB. [2018-04-12 10:41:00,367 INFO L168 Benchmark]: CACSL2BoogieTranslator took 223.41 ms. Allocated memory is still 400.0 MB. Free memory was 335.2 MB in the beginning and 311.4 MB in the end (delta: 23.8 MB). Peak memory consumption was 23.8 MB. Max. memory is 5.3 GB. [2018-04-12 10:41:00,367 INFO L168 Benchmark]: Boogie Preprocessor took 35.99 ms. Allocated memory is still 400.0 MB. Free memory was 311.4 MB in the beginning and 308.7 MB in the end (delta: 2.6 MB). Peak memory consumption was 2.6 MB. Max. memory is 5.3 GB. [2018-04-12 10:41:00,367 INFO L168 Benchmark]: RCFGBuilder took 360.23 ms. Allocated memory was 400.0 MB in the beginning and 605.6 MB in the end (delta: 205.5 MB). Free memory was 308.7 MB in the beginning and 539.8 MB in the end (delta: -231.1 MB). Peak memory consumption was 24.6 MB. Max. memory is 5.3 GB. [2018-04-12 10:41:00,368 INFO L168 Benchmark]: TraceAbstraction took 18729.66 ms. Allocated memory was 605.6 MB in the beginning and 800.1 MB in the end (delta: 194.5 MB). Free memory was 539.8 MB in the beginning and 516.3 MB in the end (delta: 23.4 MB). Peak memory consumption was 217.9 MB. Max. memory is 5.3 GB. [2018-04-12 10:41:00,369 INFO L344 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.12 ms. Allocated memory is still 400.0 MB. Free memory is still 359.1 MB. There was no memory consumed. Max. memory is 5.3 GB. * CACSL2BoogieTranslator took 223.41 ms. Allocated memory is still 400.0 MB. Free memory was 335.2 MB in the beginning and 311.4 MB in the end (delta: 23.8 MB). Peak memory consumption was 23.8 MB. Max. memory is 5.3 GB. * Boogie Preprocessor took 35.99 ms. Allocated memory is still 400.0 MB. Free memory was 311.4 MB in the beginning and 308.7 MB in the end (delta: 2.6 MB). Peak memory consumption was 2.6 MB. Max. memory is 5.3 GB. * RCFGBuilder took 360.23 ms. Allocated memory was 400.0 MB in the beginning and 605.6 MB in the end (delta: 205.5 MB). Free memory was 308.7 MB in the beginning and 539.8 MB in the end (delta: -231.1 MB). Peak memory consumption was 24.6 MB. Max. memory is 5.3 GB. * TraceAbstraction took 18729.66 ms. Allocated memory was 605.6 MB in the beginning and 800.1 MB in the end (delta: 194.5 MB). Free memory was 539.8 MB in the beginning and 516.3 MB in the end (delta: 23.4 MB). Peak memory consumption was 217.9 MB. Max. memory is 5.3 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - PositiveResult [Line: 550]: pointer dereference always succeeds For all program executions holds that pointer dereference always succeeds at this location - PositiveResult [Line: 545]: pointer dereference always succeeds For all program executions holds that pointer dereference always succeeds at this location - PositiveResult [Line: 544]: pointer dereference always succeeds For all program executions holds that pointer dereference always succeeds at this location - PositiveResult [Line: 544]: pointer dereference always succeeds For all program executions holds that pointer dereference always succeeds at this location - PositiveResult [Line: 550]: pointer dereference always succeeds For all program executions holds that pointer dereference always succeeds at this location - PositiveResult [Line: 545]: pointer dereference always succeeds For all program executions holds that pointer dereference always succeeds at this location - PositiveResult [Line: 545]: pointer dereference always succeeds For all program executions holds that pointer dereference always succeeds at this location - PositiveResult [Line: 544]: pointer dereference always succeeds For all program executions holds that pointer dereference always succeeds at this location - PositiveResult [Line: 544]: pointer dereference always succeeds For all program executions holds that pointer dereference always succeeds at this location - PositiveResult [Line: 545]: pointer dereference always succeeds For all program executions holds that pointer dereference always succeeds at this location - PositiveResult [Line: 565]: pointer dereference always succeeds For all program executions holds that pointer dereference always succeeds at this location - PositiveResult [Line: 564]: pointer dereference always succeeds For all program executions holds that pointer dereference always succeeds at this location - PositiveResult [Line: 565]: pointer dereference always succeeds For all program executions holds that pointer dereference always succeeds at this location - PositiveResult [Line: 553]: all allocated memory was freed For all program executions holds that all allocated memory was freed at this location - PositiveResult [Line: 564]: pointer dereference always succeeds For all program executions holds that pointer dereference always succeeds at this location - AllSpecificationsHoldResult: All specifications hold 15 specifications checked. All of them hold - StatisticsResult: Ultimate Automizer benchmark data CFG has 6 procedures, 61 locations, 15 error locations. SAFE Result, 18.6s OverallTime, 16 OverallIterations, 3 TraceHistogramMax, 12.3s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 595 SDtfs, 1444 SDslu, 2314 SDs, 0 SdLazy, 2983 SolverSat, 350 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 1.6s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 446 GetRequests, 157 SyntacticMatches, 7 SemanticMatches, 282 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2025 ImplicationChecksByTransitivity, 14.5s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=114occurred in iteration=11, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.0s AutomataMinimizationTime, 16 MinimizatonAttempts, 143 StatesRemovedByMinimization, 8 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 5.7s InterpolantComputationTime, 593 NumberOfCodeBlocks, 593 NumberOfCodeBlocksAsserted, 22 NumberOfCheckSat, 572 ConstructedInterpolants, 30 QuantifiedInterpolants, 210537 SizeOfPredicates, 50 NumberOfNonLiveVariables, 818 ConjunctsInSsa, 147 ConjunctsInUnsatCore, 21 InterpolantComputations, 12 PerfectInterpolantSequences, 29/132 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be correct! Written .csv to /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/subseq-alloca_true-valid-memsafety_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Camel.epf_AutomizerC.xml/Csv-Benchmark-0-2018-04-12_10-41-00-374.csv Written .csv to /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/subseq-alloca_true-valid-memsafety_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Camel.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-0-2018-04-12_10-41-00-374.csv Received shutdown request...