java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv --cacsl2boogietranslator.bitprecise.bitfields false -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/cade18-smtinterpol/svcomp-DerefFreeMemtrack-32bit-Automizer_SmtInterpol_NoArray.epf -i ../../../trunk/examples/svcomp/memsafety/960521-1_true-valid-memsafety.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-408c70d-m [2018-04-13 05:33:31,186 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-04-13 05:33:31,187 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-04-13 05:33:31,200 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-04-13 05:33:31,200 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-04-13 05:33:31,201 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-04-13 05:33:31,202 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-04-13 05:33:31,203 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-04-13 05:33:31,205 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-04-13 05:33:31,205 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-04-13 05:33:31,206 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-04-13 05:33:31,206 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-04-13 05:33:31,207 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-04-13 05:33:31,208 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-04-13 05:33:31,209 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-04-13 05:33:31,210 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-04-13 05:33:31,212 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-04-13 05:33:31,213 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-04-13 05:33:31,214 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-04-13 05:33:31,215 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-04-13 05:33:31,217 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2018-04-13 05:33:31,221 INFO L98 SettingsManager]: Beginning loading settings from /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/cade18-smtinterpol/svcomp-DerefFreeMemtrack-32bit-Automizer_SmtInterpol_NoArray.epf [2018-04-13 05:33:31,231 INFO L110 SettingsManager]: Loading preferences was successful [2018-04-13 05:33:31,232 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-04-13 05:33:31,232 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-04-13 05:33:31,233 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-04-13 05:33:31,233 INFO L133 SettingsManager]: * Use SBE=true [2018-04-13 05:33:31,233 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-04-13 05:33:31,233 INFO L133 SettingsManager]: * sizeof long=4 [2018-04-13 05:33:31,233 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-04-13 05:33:31,233 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-04-13 05:33:31,233 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-04-13 05:33:31,233 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-04-13 05:33:31,233 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-04-13 05:33:31,233 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-04-13 05:33:31,234 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-04-13 05:33:31,234 INFO L133 SettingsManager]: * sizeof long double=12 [2018-04-13 05:33:31,234 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-04-13 05:33:31,234 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-04-13 05:33:31,234 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-04-13 05:33:31,234 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-04-13 05:33:31,234 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-04-13 05:33:31,234 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-04-13 05:33:31,234 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-04-13 05:33:31,235 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-04-13 05:33:31,235 INFO L133 SettingsManager]: * Trace refinement strategy=SMTINTERPOL Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Bitprecise bitfields -> false [2018-04-13 05:33:31,261 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-04-13 05:33:31,268 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully (re)initialized [2018-04-13 05:33:31,271 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-04-13 05:33:31,272 INFO L271 PluginConnector]: Initializing CDTParser... [2018-04-13 05:33:31,272 INFO L276 PluginConnector]: CDTParser initialized [2018-04-13 05:33:31,272 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/memsafety/960521-1_true-valid-memsafety.i [2018-04-13 05:33:31,631 INFO L225 CDTParser]: Created temporary CDT project at /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/data/FLAG0faa93dc2 [2018-04-13 05:33:31,751 INFO L287 CDTParser]: IsIndexed: true [2018-04-13 05:33:31,751 INFO L288 CDTParser]: Found 1 translation units. [2018-04-13 05:33:31,751 INFO L168 CDTParser]: Scanning 960521-1_true-valid-memsafety.i [2018-04-13 05:33:31,758 INFO L210 ultiparseSymbolTable]: Include resolver: [2018-04-13 05:33:31,759 INFO L215 ultiparseSymbolTable]: [2018-04-13 05:33:31,759 INFO L218 ultiparseSymbolTable]: Function table: [2018-04-13 05:33:31,759 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_f_________true_valid_memsafety_i__foo ('foo') in 960521-1_true-valid-memsafety.i [2018-04-13 05:33:31,759 INFO L221 ultiparseSymbolTable]: Function definition of null ('main') in 960521-1_true-valid-memsafety.i [2018-04-13 05:33:31,759 INFO L227 ultiparseSymbolTable]: Global variable table: [2018-04-13 05:33:31,759 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_f_________true_valid_memsafety_i__dev_t in 960521-1_true-valid-memsafety.i [2018-04-13 05:33:31,759 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_f_________true_valid_memsafety_i____uint8_t in 960521-1_true-valid-memsafety.i [2018-04-13 05:33:31,759 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_f_________true_valid_memsafety_i____key_t in 960521-1_true-valid-memsafety.i [2018-04-13 05:33:31,760 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_f_________true_valid_memsafety_i____clockid_t in 960521-1_true-valid-memsafety.i [2018-04-13 05:33:31,760 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_f_________true_valid_memsafety_i__clockid_t in 960521-1_true-valid-memsafety.i [2018-04-13 05:33:31,760 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_f_________true_valid_memsafety_i__loff_t in 960521-1_true-valid-memsafety.i [2018-04-13 05:33:31,760 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_f_________true_valid_memsafety_i__u_int8_t in 960521-1_true-valid-memsafety.i [2018-04-13 05:33:31,760 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_f_________true_valid_memsafety_i__uint in 960521-1_true-valid-memsafety.i [2018-04-13 05:33:31,760 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_f_________true_valid_memsafety_i____u_int in 960521-1_true-valid-memsafety.i [2018-04-13 05:33:31,760 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_f_________true_valid_memsafety_i__quad_t in 960521-1_true-valid-memsafety.i [2018-04-13 05:33:31,760 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_f_________true_valid_memsafety_i__nlink_t in 960521-1_true-valid-memsafety.i [2018-04-13 05:33:31,760 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_f_________true_valid_memsafety_i____int64_t in 960521-1_true-valid-memsafety.i [2018-04-13 05:33:31,761 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_f_________true_valid_memsafety_i__suseconds_t in 960521-1_true-valid-memsafety.i [2018-04-13 05:33:31,761 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_f_________true_valid_memsafety_i____useconds_t in 960521-1_true-valid-memsafety.i [2018-04-13 05:33:31,761 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_f_________true_valid_memsafety_i__fd_mask in 960521-1_true-valid-memsafety.i [2018-04-13 05:33:31,761 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_f_________true_valid_memsafety_i__wchar_t in 960521-1_true-valid-memsafety.i [2018-04-13 05:33:31,761 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_f_________true_valid_memsafety_i____pid_t in 960521-1_true-valid-memsafety.i [2018-04-13 05:33:31,761 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_f_________true_valid_memsafety_i____u_quad_t in 960521-1_true-valid-memsafety.i [2018-04-13 05:33:31,761 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_f_________true_valid_memsafety_i__ushort in 960521-1_true-valid-memsafety.i [2018-04-13 05:33:31,761 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_f_________true_valid_memsafety_i____sig_atomic_t in 960521-1_true-valid-memsafety.i [2018-04-13 05:33:31,761 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_f_________true_valid_memsafety_i____loff_t in 960521-1_true-valid-memsafety.i [2018-04-13 05:33:31,761 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_f_________true_valid_memsafety_i____quad_t in 960521-1_true-valid-memsafety.i [2018-04-13 05:33:31,762 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_f_________true_valid_memsafety_i____fsblkcnt64_t in 960521-1_true-valid-memsafety.i [2018-04-13 05:33:31,762 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_f_________true_valid_memsafety_i____fd_mask in 960521-1_true-valid-memsafety.i [2018-04-13 05:33:31,762 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_f_________true_valid_memsafety_i____uint16_t in 960521-1_true-valid-memsafety.i [2018-04-13 05:33:31,762 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_f_________true_valid_memsafety_i__fsid_t in 960521-1_true-valid-memsafety.i [2018-04-13 05:33:31,762 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_f_________true_valid_memsafety_i__pthread_t in 960521-1_true-valid-memsafety.i [2018-04-13 05:33:31,762 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_f_________true_valid_memsafety_i____daddr_t in 960521-1_true-valid-memsafety.i [2018-04-13 05:33:31,762 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_f_________true_valid_memsafety_i____clock_t in 960521-1_true-valid-memsafety.i [2018-04-13 05:33:31,762 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_f_________true_valid_memsafety_i__pthread_condattr_t in 960521-1_true-valid-memsafety.i [2018-04-13 05:33:31,762 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_f_________true_valid_memsafety_i____gid_t in 960521-1_true-valid-memsafety.i [2018-04-13 05:33:31,762 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_f_________true_valid_memsafety_i__int64_t in 960521-1_true-valid-memsafety.i [2018-04-13 05:33:31,762 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_f_________true_valid_memsafety_i____WAIT_STATUS in 960521-1_true-valid-memsafety.i [2018-04-13 05:33:31,762 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_f_________true_valid_memsafety_i__ldiv_t in 960521-1_true-valid-memsafety.i [2018-04-13 05:33:31,762 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_f_________true_valid_memsafety_i____nlink_t in 960521-1_true-valid-memsafety.i [2018-04-13 05:33:31,763 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_f_________true_valid_memsafety_i__u_int64_t in 960521-1_true-valid-memsafety.i [2018-04-13 05:33:31,763 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_f_________true_valid_memsafety_i____swblk_t in 960521-1_true-valid-memsafety.i [2018-04-13 05:33:31,763 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_f_________true_valid_memsafety_i__fsfilcnt_t in 960521-1_true-valid-memsafety.i [2018-04-13 05:33:31,763 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_f_________true_valid_memsafety_i____ssize_t in 960521-1_true-valid-memsafety.i [2018-04-13 05:33:31,763 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_f_________true_valid_memsafety_i__timer_t in 960521-1_true-valid-memsafety.i [2018-04-13 05:33:31,763 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_f_________true_valid_memsafety_i__int32_t in 960521-1_true-valid-memsafety.i [2018-04-13 05:33:31,763 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_f_________true_valid_memsafety_i__register_t in 960521-1_true-valid-memsafety.i [2018-04-13 05:33:31,763 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_f_________true_valid_memsafety_i__pthread_barrierattr_t in 960521-1_true-valid-memsafety.i [2018-04-13 05:33:31,763 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_f_________true_valid_memsafety_i____fsfilcnt64_t in 960521-1_true-valid-memsafety.i [2018-04-13 05:33:31,763 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_f_________true_valid_memsafety_i__pthread_rwlockattr_t in 960521-1_true-valid-memsafety.i [2018-04-13 05:33:31,764 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_f_________true_valid_memsafety_i__b in 960521-1_true-valid-memsafety.i [2018-04-13 05:33:31,764 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_f_________true_valid_memsafety_i____blkcnt64_t in 960521-1_true-valid-memsafety.i [2018-04-13 05:33:31,764 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_f_________true_valid_memsafety_i__a in 960521-1_true-valid-memsafety.i [2018-04-13 05:33:31,764 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_f_________true_valid_memsafety_i____off_t in 960521-1_true-valid-memsafety.i [2018-04-13 05:33:31,764 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_f_________true_valid_memsafety_i__ino_t in 960521-1_true-valid-memsafety.i [2018-04-13 05:33:31,764 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_f_________true_valid_memsafety_i____uint64_t in 960521-1_true-valid-memsafety.i [2018-04-13 05:33:31,764 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_f_________true_valid_memsafety_i____uid_t in 960521-1_true-valid-memsafety.i [2018-04-13 05:33:31,764 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_f_________true_valid_memsafety_i__pthread_key_t in 960521-1_true-valid-memsafety.i [2018-04-13 05:33:31,764 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_f_________true_valid_memsafety_i____ino64_t in 960521-1_true-valid-memsafety.i [2018-04-13 05:33:31,765 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_f_________true_valid_memsafety_i__ssize_t in 960521-1_true-valid-memsafety.i [2018-04-13 05:33:31,765 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_f_________true_valid_memsafety_i__n in 960521-1_true-valid-memsafety.i [2018-04-13 05:33:31,765 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_f_________true_valid_memsafety_i__sigset_t in 960521-1_true-valid-memsafety.i [2018-04-13 05:33:31,765 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_f_________true_valid_memsafety_i____blkcnt_t in 960521-1_true-valid-memsafety.i [2018-04-13 05:33:31,765 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_f_________true_valid_memsafety_i__id_t in 960521-1_true-valid-memsafety.i [2018-04-13 05:33:31,765 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_f_________true_valid_memsafety_i__fsblkcnt_t in 960521-1_true-valid-memsafety.i [2018-04-13 05:33:31,765 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_f_________true_valid_memsafety_i____rlim64_t in 960521-1_true-valid-memsafety.i [2018-04-13 05:33:31,765 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_f_________true_valid_memsafety_i____suseconds_t in 960521-1_true-valid-memsafety.i [2018-04-13 05:33:31,765 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_f_________true_valid_memsafety_i__time_t in 960521-1_true-valid-memsafety.i [2018-04-13 05:33:31,766 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_f_________true_valid_memsafety_i__pthread_rwlock_t in 960521-1_true-valid-memsafety.i [2018-04-13 05:33:31,766 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_f_________true_valid_memsafety_i____rlim_t in 960521-1_true-valid-memsafety.i [2018-04-13 05:33:31,766 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_f_________true_valid_memsafety_i__int16_t in 960521-1_true-valid-memsafety.i [2018-04-13 05:33:31,766 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_f_________true_valid_memsafety_i____dev_t in 960521-1_true-valid-memsafety.i [2018-04-13 05:33:31,766 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_f_________true_valid_memsafety_i____fsblkcnt_t in 960521-1_true-valid-memsafety.i [2018-04-13 05:33:31,766 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_f_________true_valid_memsafety_i__mode_t in 960521-1_true-valid-memsafety.i [2018-04-13 05:33:31,766 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_f_________true_valid_memsafety_i__uid_t in 960521-1_true-valid-memsafety.i [2018-04-13 05:33:31,766 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_f_________true_valid_memsafety_i__lldiv_t in 960521-1_true-valid-memsafety.i [2018-04-13 05:33:31,766 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_f_________true_valid_memsafety_i____u_short in 960521-1_true-valid-memsafety.i [2018-04-13 05:33:31,766 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_f_________true_valid_memsafety_i____caddr_t in 960521-1_true-valid-memsafety.i [2018-04-13 05:33:31,767 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_f_________true_valid_memsafety_i__fd_set in 960521-1_true-valid-memsafety.i [2018-04-13 05:33:31,767 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_f_________true_valid_memsafety_i__pthread_mutex_t in 960521-1_true-valid-memsafety.i [2018-04-13 05:33:31,767 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_f_________true_valid_memsafety_i__u_quad_t in 960521-1_true-valid-memsafety.i [2018-04-13 05:33:31,767 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_f_________true_valid_memsafety_i____fsfilcnt_t in 960521-1_true-valid-memsafety.i [2018-04-13 05:33:31,767 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_f_________true_valid_memsafety_i__pthread_mutexattr_t in 960521-1_true-valid-memsafety.i [2018-04-13 05:33:31,767 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_f_________true_valid_memsafety_i____u_char in 960521-1_true-valid-memsafety.i [2018-04-13 05:33:31,767 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_f_________true_valid_memsafety_i__key_t in 960521-1_true-valid-memsafety.i [2018-04-13 05:33:31,767 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_f_________true_valid_memsafety_i____off64_t in 960521-1_true-valid-memsafety.i [2018-04-13 05:33:31,767 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_f_________true_valid_memsafety_i____time_t in 960521-1_true-valid-memsafety.i [2018-04-13 05:33:31,767 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_f_________true_valid_memsafety_i__int8_t in 960521-1_true-valid-memsafety.i [2018-04-13 05:33:31,767 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_f_________true_valid_memsafety_i__u_int32_t in 960521-1_true-valid-memsafety.i [2018-04-13 05:33:31,768 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_f_________true_valid_memsafety_i____id_t in 960521-1_true-valid-memsafety.i [2018-04-13 05:33:31,768 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_f_________true_valid_memsafety_i__u_int in 960521-1_true-valid-memsafety.i [2018-04-13 05:33:31,768 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_f_________true_valid_memsafety_i____qaddr_t in 960521-1_true-valid-memsafety.i [2018-04-13 05:33:31,768 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_f_________true_valid_memsafety_i____int32_t in 960521-1_true-valid-memsafety.i [2018-04-13 05:33:31,768 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_f_________true_valid_memsafety_i____blksize_t in 960521-1_true-valid-memsafety.i [2018-04-13 05:33:31,768 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_f_________true_valid_memsafety_i____timer_t in 960521-1_true-valid-memsafety.i [2018-04-13 05:33:31,768 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_f_________true_valid_memsafety_i__off_t in 960521-1_true-valid-memsafety.i [2018-04-13 05:33:31,768 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_f_________true_valid_memsafety_i____int16_t in 960521-1_true-valid-memsafety.i [2018-04-13 05:33:31,768 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_f_________true_valid_memsafety_i__gid_t in 960521-1_true-valid-memsafety.i [2018-04-13 05:33:31,768 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_f_________true_valid_memsafety_i__u_char in 960521-1_true-valid-memsafety.i [2018-04-13 05:33:31,768 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_f_________true_valid_memsafety_i__blkcnt_t in 960521-1_true-valid-memsafety.i [2018-04-13 05:33:31,768 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_f_________true_valid_memsafety_i__daddr_t in 960521-1_true-valid-memsafety.i [2018-04-13 05:33:31,768 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_f_________true_valid_memsafety_i____int8_t in 960521-1_true-valid-memsafety.i [2018-04-13 05:33:31,768 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_f_________true_valid_memsafety_i__u_short in 960521-1_true-valid-memsafety.i [2018-04-13 05:33:31,768 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_f_________true_valid_memsafety_i____fsid_t in 960521-1_true-valid-memsafety.i [2018-04-13 05:33:31,768 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_f_________true_valid_memsafety_i__clock_t in 960521-1_true-valid-memsafety.i [2018-04-13 05:33:31,768 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_f_________true_valid_memsafety_i____socklen_t in 960521-1_true-valid-memsafety.i [2018-04-13 05:33:31,768 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_f_________true_valid_memsafety_i__ulong in 960521-1_true-valid-memsafety.i [2018-04-13 05:33:31,768 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_f_________true_valid_memsafety_i____pthread_list_t in 960521-1_true-valid-memsafety.i [2018-04-13 05:33:31,768 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_f_________true_valid_memsafety_i__u_long in 960521-1_true-valid-memsafety.i [2018-04-13 05:33:31,768 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_f_________true_valid_memsafety_i__pthread_barrier_t in 960521-1_true-valid-memsafety.i [2018-04-13 05:33:31,768 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_f_________true_valid_memsafety_i__pid_t in 960521-1_true-valid-memsafety.i [2018-04-13 05:33:31,769 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_f_________true_valid_memsafety_i__size_t in 960521-1_true-valid-memsafety.i [2018-04-13 05:33:31,769 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_f_________true_valid_memsafety_i____ino_t in 960521-1_true-valid-memsafety.i [2018-04-13 05:33:31,769 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_f_________true_valid_memsafety_i__pthread_attr_t in 960521-1_true-valid-memsafety.i [2018-04-13 05:33:31,769 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_f_________true_valid_memsafety_i____intptr_t in 960521-1_true-valid-memsafety.i [2018-04-13 05:33:31,769 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_f_________true_valid_memsafety_i____sigset_t in 960521-1_true-valid-memsafety.i [2018-04-13 05:33:31,769 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_f_________true_valid_memsafety_i__caddr_t in 960521-1_true-valid-memsafety.i [2018-04-13 05:33:31,769 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_f_________true_valid_memsafety_i__pthread_cond_t in 960521-1_true-valid-memsafety.i [2018-04-13 05:33:31,769 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_f_________true_valid_memsafety_i__u_int16_t in 960521-1_true-valid-memsafety.i [2018-04-13 05:33:31,769 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_f_________true_valid_memsafety_i____mode_t in 960521-1_true-valid-memsafety.i [2018-04-13 05:33:31,769 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_f_________true_valid_memsafety_i____uint32_t in 960521-1_true-valid-memsafety.i [2018-04-13 05:33:31,769 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_f_________true_valid_memsafety_i____u_long in 960521-1_true-valid-memsafety.i [2018-04-13 05:33:31,769 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_f_________true_valid_memsafety_i__pthread_spinlock_t in 960521-1_true-valid-memsafety.i [2018-04-13 05:33:31,769 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_f_________true_valid_memsafety_i__div_t in 960521-1_true-valid-memsafety.i [2018-04-13 05:33:31,769 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_f_________true_valid_memsafety_i__blksize_t in 960521-1_true-valid-memsafety.i [2018-04-13 05:33:31,769 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_f_________true_valid_memsafety_i__pthread_once_t in 960521-1_true-valid-memsafety.i [2018-04-13 05:33:31,782 INFO L330 CDTParser]: Deleted temporary CDT project at /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/data/FLAG0faa93dc2 [2018-04-13 05:33:31,785 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-04-13 05:33:31,786 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-04-13 05:33:31,787 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-04-13 05:33:31,787 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-04-13 05:33:31,790 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-04-13 05:33:31,791 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 13.04 05:33:31" (1/1) ... [2018-04-13 05:33:31,793 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@56f5e2c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.04 05:33:31, skipping insertion in model container [2018-04-13 05:33:31,793 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 13.04 05:33:31" (1/1) ... [2018-04-13 05:33:31,804 INFO L167 Dispatcher]: Using SV-COMP mode [2018-04-13 05:33:31,825 INFO L167 Dispatcher]: Using SV-COMP mode [2018-04-13 05:33:31,940 INFO L175 PostProcessor]: Settings: Checked method=main [2018-04-13 05:33:31,968 INFO L175 PostProcessor]: Settings: Checked method=main [2018-04-13 05:33:31,973 INFO L100 SccComputation]: Graph consists of 0 InCaSumBalls and 111 non ball SCCs. Number of states in SCCs 111. [2018-04-13 05:33:32,009 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.04 05:33:32 WrapperNode [2018-04-13 05:33:32,009 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-04-13 05:33:32,009 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-04-13 05:33:32,009 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-04-13 05:33:32,010 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-04-13 05:33:32,021 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.04 05:33:32" (1/1) ... [2018-04-13 05:33:32,021 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.04 05:33:32" (1/1) ... [2018-04-13 05:33:32,033 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.04 05:33:32" (1/1) ... [2018-04-13 05:33:32,033 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.04 05:33:32" (1/1) ... [2018-04-13 05:33:32,039 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.04 05:33:32" (1/1) ... [2018-04-13 05:33:32,044 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.04 05:33:32" (1/1) ... [2018-04-13 05:33:32,046 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.04 05:33:32" (1/1) ... [2018-04-13 05:33:32,050 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-04-13 05:33:32,050 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-04-13 05:33:32,050 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-04-13 05:33:32,050 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-04-13 05:33:32,051 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.04 05:33:32" (1/1) ... No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-04-13 05:33:32,146 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-04-13 05:33:32,146 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-04-13 05:33:32,146 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_f_________true_valid_memsafety_i__foo [2018-04-13 05:33:32,146 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-04-13 05:33:32,147 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_error [2018-04-13 05:33:32,147 INFO L128 BoogieDeclarations]: Found specification of procedure __ctype_get_mb_cur_max [2018-04-13 05:33:32,147 INFO L128 BoogieDeclarations]: Found specification of procedure atof [2018-04-13 05:33:32,147 INFO L128 BoogieDeclarations]: Found specification of procedure atoi [2018-04-13 05:33:32,147 INFO L128 BoogieDeclarations]: Found specification of procedure atol [2018-04-13 05:33:32,147 INFO L128 BoogieDeclarations]: Found specification of procedure atoll [2018-04-13 05:33:32,147 INFO L128 BoogieDeclarations]: Found specification of procedure strtod [2018-04-13 05:33:32,147 INFO L128 BoogieDeclarations]: Found specification of procedure strtof [2018-04-13 05:33:32,147 INFO L128 BoogieDeclarations]: Found specification of procedure strtold [2018-04-13 05:33:32,147 INFO L128 BoogieDeclarations]: Found specification of procedure strtol [2018-04-13 05:33:32,147 INFO L128 BoogieDeclarations]: Found specification of procedure strtoul [2018-04-13 05:33:32,147 INFO L128 BoogieDeclarations]: Found specification of procedure strtoq [2018-04-13 05:33:32,148 INFO L128 BoogieDeclarations]: Found specification of procedure strtouq [2018-04-13 05:33:32,148 INFO L128 BoogieDeclarations]: Found specification of procedure strtoll [2018-04-13 05:33:32,148 INFO L128 BoogieDeclarations]: Found specification of procedure strtoull [2018-04-13 05:33:32,148 INFO L128 BoogieDeclarations]: Found specification of procedure l64a [2018-04-13 05:33:32,148 INFO L128 BoogieDeclarations]: Found specification of procedure a64l [2018-04-13 05:33:32,148 INFO L128 BoogieDeclarations]: Found specification of procedure select [2018-04-13 05:33:32,148 INFO L128 BoogieDeclarations]: Found specification of procedure pselect [2018-04-13 05:33:32,148 INFO L128 BoogieDeclarations]: Found specification of procedure gnu_dev_major [2018-04-13 05:33:32,148 INFO L128 BoogieDeclarations]: Found specification of procedure gnu_dev_minor [2018-04-13 05:33:32,149 INFO L128 BoogieDeclarations]: Found specification of procedure gnu_dev_makedev [2018-04-13 05:33:32,149 INFO L128 BoogieDeclarations]: Found specification of procedure random [2018-04-13 05:33:32,149 INFO L128 BoogieDeclarations]: Found specification of procedure srandom [2018-04-13 05:33:32,149 INFO L128 BoogieDeclarations]: Found specification of procedure initstate [2018-04-13 05:33:32,149 INFO L128 BoogieDeclarations]: Found specification of procedure setstate [2018-04-13 05:33:32,149 INFO L128 BoogieDeclarations]: Found specification of procedure random_r [2018-04-13 05:33:32,149 INFO L128 BoogieDeclarations]: Found specification of procedure srandom_r [2018-04-13 05:33:32,149 INFO L128 BoogieDeclarations]: Found specification of procedure initstate_r [2018-04-13 05:33:32,150 INFO L128 BoogieDeclarations]: Found specification of procedure setstate_r [2018-04-13 05:33:32,150 INFO L128 BoogieDeclarations]: Found specification of procedure rand [2018-04-13 05:33:32,150 INFO L128 BoogieDeclarations]: Found specification of procedure srand [2018-04-13 05:33:32,150 INFO L128 BoogieDeclarations]: Found specification of procedure rand_r [2018-04-13 05:33:32,150 INFO L128 BoogieDeclarations]: Found specification of procedure drand48 [2018-04-13 05:33:32,150 INFO L128 BoogieDeclarations]: Found specification of procedure erand48 [2018-04-13 05:33:32,150 INFO L128 BoogieDeclarations]: Found specification of procedure lrand48 [2018-04-13 05:33:32,150 INFO L128 BoogieDeclarations]: Found specification of procedure nrand48 [2018-04-13 05:33:32,151 INFO L128 BoogieDeclarations]: Found specification of procedure mrand48 [2018-04-13 05:33:32,151 INFO L128 BoogieDeclarations]: Found specification of procedure jrand48 [2018-04-13 05:33:32,151 INFO L128 BoogieDeclarations]: Found specification of procedure srand48 [2018-04-13 05:33:32,151 INFO L128 BoogieDeclarations]: Found specification of procedure seed48 [2018-04-13 05:33:32,151 INFO L128 BoogieDeclarations]: Found specification of procedure lcong48 [2018-04-13 05:33:32,151 INFO L128 BoogieDeclarations]: Found specification of procedure drand48_r [2018-04-13 05:33:32,151 INFO L128 BoogieDeclarations]: Found specification of procedure erand48_r [2018-04-13 05:33:32,151 INFO L128 BoogieDeclarations]: Found specification of procedure lrand48_r [2018-04-13 05:33:32,151 INFO L128 BoogieDeclarations]: Found specification of procedure nrand48_r [2018-04-13 05:33:32,151 INFO L128 BoogieDeclarations]: Found specification of procedure mrand48_r [2018-04-13 05:33:32,152 INFO L128 BoogieDeclarations]: Found specification of procedure jrand48_r [2018-04-13 05:33:32,152 INFO L128 BoogieDeclarations]: Found specification of procedure srand48_r [2018-04-13 05:33:32,152 INFO L128 BoogieDeclarations]: Found specification of procedure seed48_r [2018-04-13 05:33:32,152 INFO L128 BoogieDeclarations]: Found specification of procedure lcong48_r [2018-04-13 05:33:32,152 INFO L128 BoogieDeclarations]: Found specification of procedure malloc [2018-04-13 05:33:32,152 INFO L128 BoogieDeclarations]: Found specification of procedure calloc [2018-04-13 05:33:32,152 INFO L128 BoogieDeclarations]: Found specification of procedure realloc [2018-04-13 05:33:32,152 INFO L128 BoogieDeclarations]: Found specification of procedure free [2018-04-13 05:33:32,152 INFO L128 BoogieDeclarations]: Found specification of procedure cfree [2018-04-13 05:33:32,153 INFO L128 BoogieDeclarations]: Found specification of procedure alloca [2018-04-13 05:33:32,153 INFO L128 BoogieDeclarations]: Found specification of procedure valloc [2018-04-13 05:33:32,153 INFO L128 BoogieDeclarations]: Found specification of procedure posix_memalign [2018-04-13 05:33:32,153 INFO L128 BoogieDeclarations]: Found specification of procedure abort [2018-04-13 05:33:32,153 INFO L128 BoogieDeclarations]: Found specification of procedure atexit [2018-04-13 05:33:32,153 INFO L128 BoogieDeclarations]: Found specification of procedure on_exit [2018-04-13 05:33:32,153 INFO L128 BoogieDeclarations]: Found specification of procedure exit [2018-04-13 05:33:32,153 INFO L128 BoogieDeclarations]: Found specification of procedure _Exit [2018-04-13 05:33:32,153 INFO L128 BoogieDeclarations]: Found specification of procedure getenv [2018-04-13 05:33:32,153 INFO L128 BoogieDeclarations]: Found specification of procedure __secure_getenv [2018-04-13 05:33:32,153 INFO L128 BoogieDeclarations]: Found specification of procedure putenv [2018-04-13 05:33:32,154 INFO L128 BoogieDeclarations]: Found specification of procedure setenv [2018-04-13 05:33:32,154 INFO L128 BoogieDeclarations]: Found specification of procedure unsetenv [2018-04-13 05:33:32,154 INFO L128 BoogieDeclarations]: Found specification of procedure clearenv [2018-04-13 05:33:32,154 INFO L128 BoogieDeclarations]: Found specification of procedure mktemp [2018-04-13 05:33:32,154 INFO L128 BoogieDeclarations]: Found specification of procedure mkstemp [2018-04-13 05:33:32,154 INFO L128 BoogieDeclarations]: Found specification of procedure mkstemps [2018-04-13 05:33:32,154 INFO L128 BoogieDeclarations]: Found specification of procedure mkdtemp [2018-04-13 05:33:32,154 INFO L128 BoogieDeclarations]: Found specification of procedure system [2018-04-13 05:33:32,154 INFO L128 BoogieDeclarations]: Found specification of procedure realpath [2018-04-13 05:33:32,154 INFO L128 BoogieDeclarations]: Found specification of procedure bsearch [2018-04-13 05:33:32,155 INFO L128 BoogieDeclarations]: Found specification of procedure qsort [2018-04-13 05:33:32,155 INFO L128 BoogieDeclarations]: Found specification of procedure abs [2018-04-13 05:33:32,155 INFO L128 BoogieDeclarations]: Found specification of procedure labs [2018-04-13 05:33:32,155 INFO L128 BoogieDeclarations]: Found specification of procedure llabs [2018-04-13 05:33:32,155 INFO L128 BoogieDeclarations]: Found specification of procedure div [2018-04-13 05:33:32,155 INFO L128 BoogieDeclarations]: Found specification of procedure ldiv [2018-04-13 05:33:32,155 INFO L128 BoogieDeclarations]: Found specification of procedure lldiv [2018-04-13 05:33:32,155 INFO L128 BoogieDeclarations]: Found specification of procedure ecvt [2018-04-13 05:33:32,155 INFO L128 BoogieDeclarations]: Found specification of procedure fcvt [2018-04-13 05:33:32,155 INFO L128 BoogieDeclarations]: Found specification of procedure gcvt [2018-04-13 05:33:32,156 INFO L128 BoogieDeclarations]: Found specification of procedure qecvt [2018-04-13 05:33:32,156 INFO L128 BoogieDeclarations]: Found specification of procedure qfcvt [2018-04-13 05:33:32,156 INFO L128 BoogieDeclarations]: Found specification of procedure qgcvt [2018-04-13 05:33:32,156 INFO L128 BoogieDeclarations]: Found specification of procedure ecvt_r [2018-04-13 05:33:32,156 INFO L128 BoogieDeclarations]: Found specification of procedure fcvt_r [2018-04-13 05:33:32,156 INFO L128 BoogieDeclarations]: Found specification of procedure qecvt_r [2018-04-13 05:33:32,156 INFO L128 BoogieDeclarations]: Found specification of procedure qfcvt_r [2018-04-13 05:33:32,156 INFO L128 BoogieDeclarations]: Found specification of procedure mblen [2018-04-13 05:33:32,156 INFO L128 BoogieDeclarations]: Found specification of procedure mbtowc [2018-04-13 05:33:32,156 INFO L128 BoogieDeclarations]: Found specification of procedure wctomb [2018-04-13 05:33:32,157 INFO L128 BoogieDeclarations]: Found specification of procedure mbstowcs [2018-04-13 05:33:32,157 INFO L128 BoogieDeclarations]: Found specification of procedure wcstombs [2018-04-13 05:33:32,157 INFO L128 BoogieDeclarations]: Found specification of procedure rpmatch [2018-04-13 05:33:32,157 INFO L128 BoogieDeclarations]: Found specification of procedure getsubopt [2018-04-13 05:33:32,157 INFO L128 BoogieDeclarations]: Found specification of procedure getloadavg [2018-04-13 05:33:32,157 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_f_________true_valid_memsafety_i__foo [2018-04-13 05:33:32,157 INFO L128 BoogieDeclarations]: Found specification of procedure write~int [2018-04-13 05:33:32,157 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-04-13 05:33:32,157 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-04-13 05:33:32,157 INFO L128 BoogieDeclarations]: Found specification of procedure read~int [2018-04-13 05:33:32,158 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-04-13 05:33:32,158 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-04-13 05:33:32,158 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-04-13 05:33:32,158 INFO L128 BoogieDeclarations]: Found specification of procedure write~unchecked~int [2018-04-13 05:33:32,413 INFO L259 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-04-13 05:33:32,414 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 13.04 05:33:32 BoogieIcfgContainer [2018-04-13 05:33:32,414 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-04-13 05:33:32,414 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-04-13 05:33:32,415 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-04-13 05:33:32,416 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-04-13 05:33:32,416 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 13.04 05:33:31" (1/3) ... [2018-04-13 05:33:32,417 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@60cb5b78 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 13.04 05:33:32, skipping insertion in model container [2018-04-13 05:33:32,417 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.04 05:33:32" (2/3) ... [2018-04-13 05:33:32,417 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@60cb5b78 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 13.04 05:33:32, skipping insertion in model container [2018-04-13 05:33:32,417 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 13.04 05:33:32" (3/3) ... [2018-04-13 05:33:32,418 INFO L107 eAbstractionObserver]: Analyzing ICFG 960521-1_true-valid-memsafety.i [2018-04-13 05:33:32,423 INFO L131 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-04-13 05:33:32,428 INFO L143 ceAbstractionStarter]: Appying trace abstraction to program that has 17 error locations. [2018-04-13 05:33:32,460 INFO L128 ementStrategyFactory]: Using default assertion order modulation [2018-04-13 05:33:32,461 INFO L369 AbstractCegarLoop]: Interprodecural is true [2018-04-13 05:33:32,461 INFO L370 AbstractCegarLoop]: Hoare is false [2018-04-13 05:33:32,461 INFO L371 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-04-13 05:33:32,461 INFO L372 AbstractCegarLoop]: Backedges is TWOTRACK [2018-04-13 05:33:32,461 INFO L373 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-04-13 05:33:32,461 INFO L374 AbstractCegarLoop]: Difference is false [2018-04-13 05:33:32,461 INFO L375 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-04-13 05:33:32,461 INFO L380 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-04-13 05:33:32,461 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-04-13 05:33:32,469 INFO L276 IsEmpty]: Start isEmpty. Operand 61 states. [2018-04-13 05:33:32,474 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2018-04-13 05:33:32,474 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:33:32,475 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:33:32,475 INFO L408 AbstractCegarLoop]: === Iteration 1 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:33:32,478 INFO L82 PathProgramCache]: Analyzing trace with hash 516560539, now seen corresponding path program 1 times [2018-04-13 05:33:32,478 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:33:32,479 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:33:32,506 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:33:32,506 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 05:33:32,507 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:33:32,546 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:33:32,551 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:33:32,607 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-13 05:33:32,609 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-13 05:33:32,610 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-04-13 05:33:32,611 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-04-13 05:33:32,622 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-04-13 05:33:32,623 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-04-13 05:33:32,624 INFO L87 Difference]: Start difference. First operand 61 states. Second operand 4 states. [2018-04-13 05:33:32,718 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:33:32,718 INFO L93 Difference]: Finished difference Result 60 states and 62 transitions. [2018-04-13 05:33:32,719 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-04-13 05:33:32,720 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2018-04-13 05:33:32,721 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:33:32,729 INFO L225 Difference]: With dead ends: 60 [2018-04-13 05:33:32,730 INFO L226 Difference]: Without dead ends: 57 [2018-04-13 05:33:32,731 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-04-13 05:33:32,748 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 57 states. [2018-04-13 05:33:32,761 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 57 to 57. [2018-04-13 05:33:32,762 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 57 states. [2018-04-13 05:33:32,764 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 57 states to 57 states and 59 transitions. [2018-04-13 05:33:32,765 INFO L78 Accepts]: Start accepts. Automaton has 57 states and 59 transitions. Word has length 11 [2018-04-13 05:33:32,765 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:33:32,765 INFO L459 AbstractCegarLoop]: Abstraction has 57 states and 59 transitions. [2018-04-13 05:33:32,765 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-04-13 05:33:32,765 INFO L276 IsEmpty]: Start isEmpty. Operand 57 states and 59 transitions. [2018-04-13 05:33:32,765 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2018-04-13 05:33:32,765 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:33:32,766 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:33:32,766 INFO L408 AbstractCegarLoop]: === Iteration 2 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:33:32,766 INFO L82 PathProgramCache]: Analyzing trace with hash 516560540, now seen corresponding path program 1 times [2018-04-13 05:33:32,766 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:33:32,766 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:33:32,767 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:33:32,767 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 05:33:32,767 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:33:32,782 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:33:32,783 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:33:32,822 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-13 05:33:32,822 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-13 05:33:32,822 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-04-13 05:33:32,823 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-04-13 05:33:32,823 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-04-13 05:33:32,823 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-04-13 05:33:32,824 INFO L87 Difference]: Start difference. First operand 57 states and 59 transitions. Second operand 5 states. [2018-04-13 05:33:32,861 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:33:32,861 INFO L93 Difference]: Finished difference Result 56 states and 58 transitions. [2018-04-13 05:33:32,861 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-04-13 05:33:32,861 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 11 [2018-04-13 05:33:32,861 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:33:32,862 INFO L225 Difference]: With dead ends: 56 [2018-04-13 05:33:32,862 INFO L226 Difference]: Without dead ends: 56 [2018-04-13 05:33:32,862 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2018-04-13 05:33:32,863 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 56 states. [2018-04-13 05:33:32,865 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 56 to 56. [2018-04-13 05:33:32,866 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 56 states. [2018-04-13 05:33:32,867 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 56 states to 56 states and 58 transitions. [2018-04-13 05:33:32,867 INFO L78 Accepts]: Start accepts. Automaton has 56 states and 58 transitions. Word has length 11 [2018-04-13 05:33:32,867 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:33:32,867 INFO L459 AbstractCegarLoop]: Abstraction has 56 states and 58 transitions. [2018-04-13 05:33:32,867 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-04-13 05:33:32,867 INFO L276 IsEmpty]: Start isEmpty. Operand 56 states and 58 transitions. [2018-04-13 05:33:32,868 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-04-13 05:33:32,868 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:33:32,868 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:33:32,868 INFO L408 AbstractCegarLoop]: === Iteration 3 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:33:32,868 INFO L82 PathProgramCache]: Analyzing trace with hash 1337247429, now seen corresponding path program 1 times [2018-04-13 05:33:32,868 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:33:32,868 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:33:32,869 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:33:32,869 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 05:33:32,869 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:33:32,885 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:33:32,885 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:33:32,891 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-13 05:33:32,891 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:33:32,891 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:33:32,892 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 05:33:32,927 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:33:32,935 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:33:32,958 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-13 05:33:32,959 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 05:33:32,960 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:33:32,960 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-04-13 05:33:32,972 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 05:33:32,972 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 05:33:32,973 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21 [2018-04-13 05:33:32,974 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 05:33:32,978 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 05:33:32,978 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:17, output treesize:15 [2018-04-13 05:33:33,000 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-13 05:33:33,001 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-13 05:33:33,001 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-04-13 05:33:33,001 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-04-13 05:33:33,001 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-04-13 05:33:33,001 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2018-04-13 05:33:33,002 INFO L87 Difference]: Start difference. First operand 56 states and 58 transitions. Second operand 5 states. [2018-04-13 05:33:33,096 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:33:33,096 INFO L93 Difference]: Finished difference Result 53 states and 55 transitions. [2018-04-13 05:33:33,096 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-04-13 05:33:33,096 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 17 [2018-04-13 05:33:33,096 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:33:33,097 INFO L225 Difference]: With dead ends: 53 [2018-04-13 05:33:33,097 INFO L226 Difference]: Without dead ends: 53 [2018-04-13 05:33:33,098 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 13 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2018-04-13 05:33:33,098 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 53 states. [2018-04-13 05:33:33,101 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 53 to 53. [2018-04-13 05:33:33,101 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 53 states. [2018-04-13 05:33:33,102 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 53 states to 53 states and 55 transitions. [2018-04-13 05:33:33,102 INFO L78 Accepts]: Start accepts. Automaton has 53 states and 55 transitions. Word has length 17 [2018-04-13 05:33:33,102 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:33:33,102 INFO L459 AbstractCegarLoop]: Abstraction has 53 states and 55 transitions. [2018-04-13 05:33:33,103 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-04-13 05:33:33,103 INFO L276 IsEmpty]: Start isEmpty. Operand 53 states and 55 transitions. [2018-04-13 05:33:33,103 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-04-13 05:33:33,103 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:33:33,103 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:33:33,104 INFO L408 AbstractCegarLoop]: === Iteration 4 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:33:33,104 INFO L82 PathProgramCache]: Analyzing trace with hash 1337247430, now seen corresponding path program 1 times [2018-04-13 05:33:33,104 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:33:33,104 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:33:33,105 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:33:33,105 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 05:33:33,105 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:33:33,117 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:33:33,118 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:33:33,121 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-13 05:33:33,121 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:33:33,121 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:33:33,122 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 05:33:33,148 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:33:33,152 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:33:33,158 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-13 05:33:33,158 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 05:33:33,163 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:33:33,163 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:15, output treesize:14 [2018-04-13 05:33:33,181 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 15 [2018-04-13 05:33:33,181 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 05:33:33,196 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-04-13 05:33:33,196 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:22, output treesize:21 [2018-04-13 05:33:33,236 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-13 05:33:33,237 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-13 05:33:33,237 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-04-13 05:33:33,237 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-04-13 05:33:33,237 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-04-13 05:33:33,237 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2018-04-13 05:33:33,238 INFO L87 Difference]: Start difference. First operand 53 states and 55 transitions. Second operand 7 states. [2018-04-13 05:33:33,333 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:33:33,334 INFO L93 Difference]: Finished difference Result 61 states and 63 transitions. [2018-04-13 05:33:33,334 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-04-13 05:33:33,334 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 17 [2018-04-13 05:33:33,334 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:33:33,334 INFO L225 Difference]: With dead ends: 61 [2018-04-13 05:33:33,334 INFO L226 Difference]: Without dead ends: 61 [2018-04-13 05:33:33,335 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 11 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2018-04-13 05:33:33,335 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 61 states. [2018-04-13 05:33:33,338 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 61 to 56. [2018-04-13 05:33:33,338 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 56 states. [2018-04-13 05:33:33,339 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 56 states to 56 states and 58 transitions. [2018-04-13 05:33:33,339 INFO L78 Accepts]: Start accepts. Automaton has 56 states and 58 transitions. Word has length 17 [2018-04-13 05:33:33,339 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:33:33,339 INFO L459 AbstractCegarLoop]: Abstraction has 56 states and 58 transitions. [2018-04-13 05:33:33,339 INFO L460 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-04-13 05:33:33,339 INFO L276 IsEmpty]: Start isEmpty. Operand 56 states and 58 transitions. [2018-04-13 05:33:33,340 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-04-13 05:33:33,340 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:33:33,340 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:33:33,340 INFO L408 AbstractCegarLoop]: === Iteration 5 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:33:33,340 INFO L82 PathProgramCache]: Analyzing trace with hash 1186083357, now seen corresponding path program 1 times [2018-04-13 05:33:33,340 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:33:33,341 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:33:33,341 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:33:33,342 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 05:33:33,342 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:33:33,352 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:33:33,353 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:33:33,357 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-13 05:33:33,357 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:33:33,357 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:33:33,358 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 05:33:33,382 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:33:33,386 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:33:33,396 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-13 05:33:33,396 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 05:33:33,400 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:33:33,400 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:15, output treesize:14 [2018-04-13 05:33:33,418 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 15 [2018-04-13 05:33:33,419 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 05:33:33,425 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-04-13 05:33:33,425 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:22, output treesize:21 [2018-04-13 05:33:33,522 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-13 05:33:33,522 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-13 05:33:33,522 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8] total 8 [2018-04-13 05:33:33,522 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-04-13 05:33:33,523 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-04-13 05:33:33,523 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=50, Unknown=0, NotChecked=0, Total=72 [2018-04-13 05:33:33,523 INFO L87 Difference]: Start difference. First operand 56 states and 58 transitions. Second operand 9 states. [2018-04-13 05:33:33,697 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:33:33,697 INFO L93 Difference]: Finished difference Result 65 states and 67 transitions. [2018-04-13 05:33:33,698 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-04-13 05:33:33,698 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 21 [2018-04-13 05:33:33,698 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:33:33,698 INFO L225 Difference]: With dead ends: 65 [2018-04-13 05:33:33,699 INFO L226 Difference]: Without dead ends: 65 [2018-04-13 05:33:33,699 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 24 GetRequests, 13 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 19 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=48, Invalid=108, Unknown=0, NotChecked=0, Total=156 [2018-04-13 05:33:33,699 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 65 states. [2018-04-13 05:33:33,701 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 65 to 60. [2018-04-13 05:33:33,701 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 60 states. [2018-04-13 05:33:33,701 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 60 states to 60 states and 62 transitions. [2018-04-13 05:33:33,702 INFO L78 Accepts]: Start accepts. Automaton has 60 states and 62 transitions. Word has length 21 [2018-04-13 05:33:33,702 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:33:33,702 INFO L459 AbstractCegarLoop]: Abstraction has 60 states and 62 transitions. [2018-04-13 05:33:33,702 INFO L460 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-04-13 05:33:33,702 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 62 transitions. [2018-04-13 05:33:33,702 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2018-04-13 05:33:33,702 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:33:33,703 INFO L355 BasicCegarLoop]: trace histogram [3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:33:33,703 INFO L408 AbstractCegarLoop]: === Iteration 6 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:33:33,703 INFO L82 PathProgramCache]: Analyzing trace with hash 1607211508, now seen corresponding path program 2 times [2018-04-13 05:33:33,703 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:33:33,703 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:33:33,703 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:33:33,703 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 05:33:33,704 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:33:33,719 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:33:33,720 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:33:33,724 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-13 05:33:33,724 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:33:33,724 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:33:33,725 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-04-13 05:33:33,755 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-04-13 05:33:33,755 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 05:33:33,759 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:33:33,765 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-13 05:33:33,765 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 05:33:33,769 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:33:33,769 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:15, output treesize:14 [2018-04-13 05:33:33,788 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 15 [2018-04-13 05:33:33,789 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 05:33:33,795 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-04-13 05:33:33,795 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:22, output treesize:21 [2018-04-13 05:33:33,870 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-13 05:33:33,870 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-13 05:33:33,870 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8] total 8 [2018-04-13 05:33:33,872 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-04-13 05:33:33,873 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-04-13 05:33:33,873 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2018-04-13 05:33:33,873 INFO L87 Difference]: Start difference. First operand 60 states and 62 transitions. Second operand 9 states. [2018-04-13 05:33:34,087 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:33:34,088 INFO L93 Difference]: Finished difference Result 81 states and 83 transitions. [2018-04-13 05:33:34,089 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-04-13 05:33:34,089 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 25 [2018-04-13 05:33:34,089 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:33:34,090 INFO L225 Difference]: With dead ends: 81 [2018-04-13 05:33:34,090 INFO L226 Difference]: Without dead ends: 81 [2018-04-13 05:33:34,090 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 28 GetRequests, 17 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=45, Invalid=111, Unknown=0, NotChecked=0, Total=156 [2018-04-13 05:33:34,090 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 81 states. [2018-04-13 05:33:34,092 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 81 to 72. [2018-04-13 05:33:34,092 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 72 states. [2018-04-13 05:33:34,093 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 72 states to 72 states and 78 transitions. [2018-04-13 05:33:34,093 INFO L78 Accepts]: Start accepts. Automaton has 72 states and 78 transitions. Word has length 25 [2018-04-13 05:33:34,093 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:33:34,093 INFO L459 AbstractCegarLoop]: Abstraction has 72 states and 78 transitions. [2018-04-13 05:33:34,093 INFO L460 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-04-13 05:33:34,093 INFO L276 IsEmpty]: Start isEmpty. Operand 72 states and 78 transitions. [2018-04-13 05:33:34,094 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-04-13 05:33:34,094 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:33:34,094 INFO L355 BasicCegarLoop]: trace histogram [4, 4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:33:34,094 INFO L408 AbstractCegarLoop]: === Iteration 7 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:33:34,095 INFO L82 PathProgramCache]: Analyzing trace with hash 124796491, now seen corresponding path program 3 times [2018-04-13 05:33:34,095 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:33:34,095 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:33:34,095 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:33:34,096 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 05:33:34,096 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:33:34,105 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:33:34,106 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:33:34,109 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-13 05:33:34,109 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:33:34,110 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:33:34,110 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-04-13 05:33:34,128 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 2 check-sat command(s) [2018-04-13 05:33:34,128 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 05:33:34,131 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:33:34,138 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-13 05:33:34,138 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 05:33:34,142 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:33:34,142 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:15, output treesize:14 [2018-04-13 05:33:34,157 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 15 [2018-04-13 05:33:34,157 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 05:33:34,162 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 05:33:34,162 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:22, output treesize:21 [2018-04-13 05:33:34,197 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 8 proven. 3 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-04-13 05:33:34,197 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-13 05:33:34,197 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7] total 7 [2018-04-13 05:33:34,197 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-04-13 05:33:34,198 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-04-13 05:33:34,198 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=36, Unknown=0, NotChecked=0, Total=56 [2018-04-13 05:33:34,198 INFO L87 Difference]: Start difference. First operand 72 states and 78 transitions. Second operand 8 states. [2018-04-13 05:33:34,308 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:33:34,308 INFO L93 Difference]: Finished difference Result 73 states and 77 transitions. [2018-04-13 05:33:34,309 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-04-13 05:33:34,309 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 29 [2018-04-13 05:33:34,309 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:33:34,310 INFO L225 Difference]: With dead ends: 73 [2018-04-13 05:33:34,310 INFO L226 Difference]: Without dead ends: 73 [2018-04-13 05:33:34,310 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 30 GetRequests, 21 SyntacticMatches, 1 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=32, Invalid=58, Unknown=0, NotChecked=0, Total=90 [2018-04-13 05:33:34,310 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 73 states. [2018-04-13 05:33:34,313 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 73 to 70. [2018-04-13 05:33:34,313 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 70 states. [2018-04-13 05:33:34,314 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 70 states to 70 states and 76 transitions. [2018-04-13 05:33:34,314 INFO L78 Accepts]: Start accepts. Automaton has 70 states and 76 transitions. Word has length 29 [2018-04-13 05:33:34,314 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:33:34,314 INFO L459 AbstractCegarLoop]: Abstraction has 70 states and 76 transitions. [2018-04-13 05:33:34,314 INFO L460 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-04-13 05:33:34,314 INFO L276 IsEmpty]: Start isEmpty. Operand 70 states and 76 transitions. [2018-04-13 05:33:34,315 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-04-13 05:33:34,315 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:33:34,315 INFO L355 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:33:34,315 INFO L408 AbstractCegarLoop]: === Iteration 8 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:33:34,315 INFO L82 PathProgramCache]: Analyzing trace with hash -1631061243, now seen corresponding path program 1 times [2018-04-13 05:33:34,315 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:33:34,315 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:33:34,316 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:33:34,316 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 05:33:34,316 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:33:34,322 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:33:34,322 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:33:34,338 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-04-13 05:33:34,338 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-13 05:33:34,338 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-04-13 05:33:34,339 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-04-13 05:33:34,339 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-04-13 05:33:34,339 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-04-13 05:33:34,339 INFO L87 Difference]: Start difference. First operand 70 states and 76 transitions. Second operand 4 states. [2018-04-13 05:33:34,382 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:33:34,383 INFO L93 Difference]: Finished difference Result 68 states and 72 transitions. [2018-04-13 05:33:34,383 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-04-13 05:33:34,383 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 32 [2018-04-13 05:33:34,383 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:33:34,384 INFO L225 Difference]: With dead ends: 68 [2018-04-13 05:33:34,384 INFO L226 Difference]: Without dead ends: 68 [2018-04-13 05:33:34,384 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-04-13 05:33:34,384 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 68 states. [2018-04-13 05:33:34,386 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 68 to 68. [2018-04-13 05:33:34,386 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 68 states. [2018-04-13 05:33:34,387 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 68 states to 68 states and 72 transitions. [2018-04-13 05:33:34,387 INFO L78 Accepts]: Start accepts. Automaton has 68 states and 72 transitions. Word has length 32 [2018-04-13 05:33:34,387 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:33:34,387 INFO L459 AbstractCegarLoop]: Abstraction has 68 states and 72 transitions. [2018-04-13 05:33:34,388 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-04-13 05:33:34,388 INFO L276 IsEmpty]: Start isEmpty. Operand 68 states and 72 transitions. [2018-04-13 05:33:34,388 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-04-13 05:33:34,388 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:33:34,388 INFO L355 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:33:34,388 INFO L408 AbstractCegarLoop]: === Iteration 9 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:33:34,388 INFO L82 PathProgramCache]: Analyzing trace with hash -1631061242, now seen corresponding path program 1 times [2018-04-13 05:33:34,389 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:33:34,389 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:33:34,389 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:33:34,389 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 05:33:34,390 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:33:34,396 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:33:34,397 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:33:34,430 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 18 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-13 05:33:34,430 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:33:34,430 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:33:34,431 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 05:33:34,442 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:33:34,445 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:33:34,493 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 18 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-13 05:33:34,493 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:33:34,493 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 11 [2018-04-13 05:33:34,493 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-04-13 05:33:34,493 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-04-13 05:33:34,494 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=49, Invalid=61, Unknown=0, NotChecked=0, Total=110 [2018-04-13 05:33:34,494 INFO L87 Difference]: Start difference. First operand 68 states and 72 transitions. Second operand 11 states. [2018-04-13 05:33:34,568 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:33:34,568 INFO L93 Difference]: Finished difference Result 84 states and 86 transitions. [2018-04-13 05:33:34,568 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-04-13 05:33:34,568 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 32 [2018-04-13 05:33:34,568 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:33:34,568 INFO L225 Difference]: With dead ends: 84 [2018-04-13 05:33:34,569 INFO L226 Difference]: Without dead ends: 84 [2018-04-13 05:33:34,569 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 38 GetRequests, 29 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 21 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=49, Invalid=61, Unknown=0, NotChecked=0, Total=110 [2018-04-13 05:33:34,569 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 84 states. [2018-04-13 05:33:34,571 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 84 to 76. [2018-04-13 05:33:34,571 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 76 states. [2018-04-13 05:33:34,572 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 76 states to 76 states and 81 transitions. [2018-04-13 05:33:34,572 INFO L78 Accepts]: Start accepts. Automaton has 76 states and 81 transitions. Word has length 32 [2018-04-13 05:33:34,572 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:33:34,572 INFO L459 AbstractCegarLoop]: Abstraction has 76 states and 81 transitions. [2018-04-13 05:33:34,572 INFO L460 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-04-13 05:33:34,573 INFO L276 IsEmpty]: Start isEmpty. Operand 76 states and 81 transitions. [2018-04-13 05:33:34,573 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-04-13 05:33:34,573 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:33:34,573 INFO L355 BasicCegarLoop]: trace histogram [5, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:33:34,573 INFO L408 AbstractCegarLoop]: === Iteration 10 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:33:34,574 INFO L82 PathProgramCache]: Analyzing trace with hash -830892337, now seen corresponding path program 2 times [2018-04-13 05:33:34,574 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:33:34,574 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:33:34,574 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:33:34,574 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 05:33:34,574 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:33:34,582 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:33:34,582 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:33:34,619 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 0 proven. 32 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-13 05:33:34,619 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:33:34,619 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:33:34,620 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-04-13 05:33:34,630 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2018-04-13 05:33:34,631 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 05:33:34,633 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:33:34,640 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-13 05:33:34,640 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 05:33:34,646 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 05:33:34,646 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:14 [2018-04-13 05:33:34,723 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 32 trivial. 0 not checked. [2018-04-13 05:33:34,724 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-04-13 05:33:34,724 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [8] total 12 [2018-04-13 05:33:34,724 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-04-13 05:33:34,724 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-04-13 05:33:34,724 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=99, Unknown=0, NotChecked=0, Total=132 [2018-04-13 05:33:34,725 INFO L87 Difference]: Start difference. First operand 76 states and 81 transitions. Second operand 12 states. [2018-04-13 05:33:35,001 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:33:35,002 INFO L93 Difference]: Finished difference Result 89 states and 91 transitions. [2018-04-13 05:33:35,002 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-04-13 05:33:35,002 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 36 [2018-04-13 05:33:35,002 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:33:35,005 INFO L225 Difference]: With dead ends: 89 [2018-04-13 05:33:35,005 INFO L226 Difference]: Without dead ends: 89 [2018-04-13 05:33:35,005 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 53 GetRequests, 33 SyntacticMatches, 0 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 62 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=115, Invalid=347, Unknown=0, NotChecked=0, Total=462 [2018-04-13 05:33:35,006 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 89 states. [2018-04-13 05:33:35,008 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 89 to 75. [2018-04-13 05:33:35,008 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 75 states. [2018-04-13 05:33:35,009 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 75 states to 75 states and 78 transitions. [2018-04-13 05:33:35,009 INFO L78 Accepts]: Start accepts. Automaton has 75 states and 78 transitions. Word has length 36 [2018-04-13 05:33:35,009 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:33:35,009 INFO L459 AbstractCegarLoop]: Abstraction has 75 states and 78 transitions. [2018-04-13 05:33:35,009 INFO L460 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-04-13 05:33:35,010 INFO L276 IsEmpty]: Start isEmpty. Operand 75 states and 78 transitions. [2018-04-13 05:33:35,010 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-04-13 05:33:35,010 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:33:35,010 INFO L355 BasicCegarLoop]: trace histogram [6, 5, 5, 5, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:33:35,011 INFO L408 AbstractCegarLoop]: === Iteration 11 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:33:35,011 INFO L82 PathProgramCache]: Analyzing trace with hash -21492497, now seen corresponding path program 1 times [2018-04-13 05:33:35,011 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:33:35,011 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:33:35,012 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:33:35,012 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 05:33:35,012 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:33:35,020 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:33:35,021 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:33:35,077 INFO L134 CoverageAnalysis]: Checked inductivity of 53 backedges. 0 proven. 50 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-04-13 05:33:35,077 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:33:35,077 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:33:35,077 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 05:33:35,085 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:33:35,087 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:33:35,134 INFO L134 CoverageAnalysis]: Checked inductivity of 53 backedges. 0 proven. 50 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-04-13 05:33:35,135 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:33:35,135 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9] total 15 [2018-04-13 05:33:35,135 INFO L442 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-04-13 05:33:35,135 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-04-13 05:33:35,135 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=90, Invalid=120, Unknown=0, NotChecked=0, Total=210 [2018-04-13 05:33:35,135 INFO L87 Difference]: Start difference. First operand 75 states and 78 transitions. Second operand 15 states. [2018-04-13 05:33:35,206 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:33:35,207 INFO L93 Difference]: Finished difference Result 96 states and 97 transitions. [2018-04-13 05:33:35,207 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-04-13 05:33:35,207 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 44 [2018-04-13 05:33:35,207 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:33:35,208 INFO L225 Difference]: With dead ends: 96 [2018-04-13 05:33:35,208 INFO L226 Difference]: Without dead ends: 96 [2018-04-13 05:33:35,208 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 52 GetRequests, 39 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 57 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=90, Invalid=120, Unknown=0, NotChecked=0, Total=210 [2018-04-13 05:33:35,208 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 96 states. [2018-04-13 05:33:35,210 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 96 to 87. [2018-04-13 05:33:35,210 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 87 states. [2018-04-13 05:33:35,211 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 87 states to 87 states and 92 transitions. [2018-04-13 05:33:35,211 INFO L78 Accepts]: Start accepts. Automaton has 87 states and 92 transitions. Word has length 44 [2018-04-13 05:33:35,212 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:33:35,212 INFO L459 AbstractCegarLoop]: Abstraction has 87 states and 92 transitions. [2018-04-13 05:33:35,212 INFO L460 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-04-13 05:33:35,212 INFO L276 IsEmpty]: Start isEmpty. Operand 87 states and 92 transitions. [2018-04-13 05:33:35,213 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2018-04-13 05:33:35,213 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:33:35,213 INFO L355 BasicCegarLoop]: trace histogram [7, 6, 6, 6, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:33:35,213 INFO L408 AbstractCegarLoop]: === Iteration 12 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:33:35,213 INFO L82 PathProgramCache]: Analyzing trace with hash -960937160, now seen corresponding path program 2 times [2018-04-13 05:33:35,213 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:33:35,214 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:33:35,214 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:33:35,214 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 05:33:35,215 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:33:35,223 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:33:35,224 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:33:35,277 INFO L134 CoverageAnalysis]: Checked inductivity of 75 backedges. 0 proven. 72 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-04-13 05:33:35,277 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:33:35,277 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:33:35,278 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-04-13 05:33:35,291 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-04-13 05:33:35,291 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 05:33:35,294 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:33:35,298 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-13 05:33:35,298 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 05:33:35,301 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 05:33:35,302 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:14 [2018-04-13 05:33:35,420 INFO L134 CoverageAnalysis]: Checked inductivity of 75 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 72 trivial. 0 not checked. [2018-04-13 05:33:35,421 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-04-13 05:33:35,421 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [10] total 15 [2018-04-13 05:33:35,421 INFO L442 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-04-13 05:33:35,421 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-04-13 05:33:35,422 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=55, Invalid=155, Unknown=0, NotChecked=0, Total=210 [2018-04-13 05:33:35,422 INFO L87 Difference]: Start difference. First operand 87 states and 92 transitions. Second operand 15 states. [2018-04-13 05:33:35,847 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:33:35,847 INFO L93 Difference]: Finished difference Result 100 states and 102 transitions. [2018-04-13 05:33:35,847 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-04-13 05:33:35,847 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 48 [2018-04-13 05:33:35,848 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:33:35,848 INFO L225 Difference]: With dead ends: 100 [2018-04-13 05:33:35,848 INFO L226 Difference]: Without dead ends: 100 [2018-04-13 05:33:35,849 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 74 GetRequests, 44 SyntacticMatches, 0 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 164 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=280, Invalid=712, Unknown=0, NotChecked=0, Total=992 [2018-04-13 05:33:35,849 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 100 states. [2018-04-13 05:33:35,851 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 100 to 90. [2018-04-13 05:33:35,851 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 90 states. [2018-04-13 05:33:35,852 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 90 states to 90 states and 91 transitions. [2018-04-13 05:33:35,852 INFO L78 Accepts]: Start accepts. Automaton has 90 states and 91 transitions. Word has length 48 [2018-04-13 05:33:35,852 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:33:35,852 INFO L459 AbstractCegarLoop]: Abstraction has 90 states and 91 transitions. [2018-04-13 05:33:35,852 INFO L460 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-04-13 05:33:35,852 INFO L276 IsEmpty]: Start isEmpty. Operand 90 states and 91 transitions. [2018-04-13 05:33:35,853 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2018-04-13 05:33:35,853 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:33:35,853 INFO L355 BasicCegarLoop]: trace histogram [8, 7, 7, 7, 7, 6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:33:35,853 INFO L408 AbstractCegarLoop]: === Iteration 13 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:33:35,854 INFO L82 PathProgramCache]: Analyzing trace with hash 556961057, now seen corresponding path program 1 times [2018-04-13 05:33:35,854 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:33:35,854 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:33:35,854 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:33:35,854 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 05:33:35,854 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:33:35,866 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:33:35,867 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:33:35,933 INFO L134 CoverageAnalysis]: Checked inductivity of 170 backedges. 0 proven. 98 refuted. 0 times theorem prover too weak. 72 trivial. 0 not checked. [2018-04-13 05:33:35,933 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:33:35,934 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:33:35,934 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 05:33:35,950 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:33:35,953 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:33:36,039 INFO L134 CoverageAnalysis]: Checked inductivity of 170 backedges. 0 proven. 98 refuted. 0 times theorem prover too weak. 72 trivial. 0 not checked. [2018-04-13 05:33:36,039 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:33:36,039 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 11] total 20 [2018-04-13 05:33:36,040 INFO L442 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-04-13 05:33:36,040 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-04-13 05:33:36,040 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=136, Invalid=244, Unknown=0, NotChecked=0, Total=380 [2018-04-13 05:33:36,040 INFO L87 Difference]: Start difference. First operand 90 states and 91 transitions. Second operand 20 states. [2018-04-13 05:33:36,147 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:33:36,147 INFO L93 Difference]: Finished difference Result 106 states and 107 transitions. [2018-04-13 05:33:36,147 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-04-13 05:33:36,147 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 79 [2018-04-13 05:33:36,148 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:33:36,148 INFO L225 Difference]: With dead ends: 106 [2018-04-13 05:33:36,148 INFO L226 Difference]: Without dead ends: 106 [2018-04-13 05:33:36,149 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 91 GetRequests, 71 SyntacticMatches, 1 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 117 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=155, Invalid=265, Unknown=0, NotChecked=0, Total=420 [2018-04-13 05:33:36,149 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 106 states. [2018-04-13 05:33:36,151 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 106 to 102. [2018-04-13 05:33:36,152 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 102 states. [2018-04-13 05:33:36,152 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 102 states to 102 states and 103 transitions. [2018-04-13 05:33:36,152 INFO L78 Accepts]: Start accepts. Automaton has 102 states and 103 transitions. Word has length 79 [2018-04-13 05:33:36,153 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:33:36,153 INFO L459 AbstractCegarLoop]: Abstraction has 102 states and 103 transitions. [2018-04-13 05:33:36,153 INFO L460 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-04-13 05:33:36,153 INFO L276 IsEmpty]: Start isEmpty. Operand 102 states and 103 transitions. [2018-04-13 05:33:36,155 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 92 [2018-04-13 05:33:36,155 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:33:36,155 INFO L355 BasicCegarLoop]: trace histogram [9, 9, 8, 8, 8, 8, 8, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:33:36,155 INFO L408 AbstractCegarLoop]: === Iteration 14 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:33:36,155 INFO L82 PathProgramCache]: Analyzing trace with hash -1434925750, now seen corresponding path program 2 times [2018-04-13 05:33:36,155 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:33:36,155 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:33:36,156 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:33:36,156 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 05:33:36,156 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:33:36,167 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:33:36,168 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:33:36,249 INFO L134 CoverageAnalysis]: Checked inductivity of 256 backedges. 0 proven. 128 refuted. 0 times theorem prover too weak. 128 trivial. 0 not checked. [2018-04-13 05:33:36,250 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:33:36,250 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:33:36,250 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-04-13 05:33:36,265 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-04-13 05:33:36,266 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 05:33:36,269 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:33:36,295 INFO L134 CoverageAnalysis]: Checked inductivity of 256 backedges. 0 proven. 128 refuted. 0 times theorem prover too weak. 128 trivial. 0 not checked. [2018-04-13 05:33:36,295 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:33:36,295 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 11] total 14 [2018-04-13 05:33:36,296 INFO L442 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-04-13 05:33:36,296 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-04-13 05:33:36,296 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=70, Invalid=112, Unknown=0, NotChecked=0, Total=182 [2018-04-13 05:33:36,296 INFO L87 Difference]: Start difference. First operand 102 states and 103 transitions. Second operand 14 states. [2018-04-13 05:33:36,430 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:33:36,430 INFO L93 Difference]: Finished difference Result 114 states and 115 transitions. [2018-04-13 05:33:36,430 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-04-13 05:33:36,430 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 91 [2018-04-13 05:33:36,431 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:33:36,431 INFO L225 Difference]: With dead ends: 114 [2018-04-13 05:33:36,431 INFO L226 Difference]: Without dead ends: 114 [2018-04-13 05:33:36,432 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 121 GetRequests, 100 SyntacticMatches, 0 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 65 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=179, Invalid=327, Unknown=0, NotChecked=0, Total=506 [2018-04-13 05:33:36,432 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 114 states. [2018-04-13 05:33:36,434 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 114 to 110. [2018-04-13 05:33:36,434 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 110 states. [2018-04-13 05:33:36,435 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 110 states to 110 states and 111 transitions. [2018-04-13 05:33:36,435 INFO L78 Accepts]: Start accepts. Automaton has 110 states and 111 transitions. Word has length 91 [2018-04-13 05:33:36,435 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:33:36,435 INFO L459 AbstractCegarLoop]: Abstraction has 110 states and 111 transitions. [2018-04-13 05:33:36,435 INFO L460 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-04-13 05:33:36,435 INFO L276 IsEmpty]: Start isEmpty. Operand 110 states and 111 transitions. [2018-04-13 05:33:36,436 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 100 [2018-04-13 05:33:36,436 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:33:36,436 INFO L355 BasicCegarLoop]: trace histogram [10, 10, 9, 9, 9, 9, 9, 9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:33:36,436 INFO L408 AbstractCegarLoop]: === Iteration 15 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:33:36,437 INFO L82 PathProgramCache]: Analyzing trace with hash -1034252502, now seen corresponding path program 3 times [2018-04-13 05:33:36,437 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:33:36,437 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:33:36,437 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:33:36,438 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 05:33:36,438 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:33:36,450 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:33:36,451 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:33:36,578 INFO L134 CoverageAnalysis]: Checked inductivity of 324 backedges. 0 proven. 162 refuted. 0 times theorem prover too weak. 162 trivial. 0 not checked. [2018-04-13 05:33:36,578 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:33:36,578 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:33:36,579 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-04-13 05:33:36,611 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 10 check-sat command(s) [2018-04-13 05:33:36,612 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 05:33:36,616 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:33:36,632 INFO L134 CoverageAnalysis]: Checked inductivity of 324 backedges. 0 proven. 162 refuted. 0 times theorem prover too weak. 162 trivial. 0 not checked. [2018-04-13 05:33:36,632 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:33:36,632 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 12] total 15 [2018-04-13 05:33:36,633 INFO L442 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-04-13 05:33:36,633 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-04-13 05:33:36,633 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=82, Invalid=128, Unknown=0, NotChecked=0, Total=210 [2018-04-13 05:33:36,633 INFO L87 Difference]: Start difference. First operand 110 states and 111 transitions. Second operand 15 states. [2018-04-13 05:33:36,808 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:33:36,808 INFO L93 Difference]: Finished difference Result 122 states and 123 transitions. [2018-04-13 05:33:36,808 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-04-13 05:33:36,808 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 99 [2018-04-13 05:33:36,809 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:33:36,809 INFO L225 Difference]: With dead ends: 122 [2018-04-13 05:33:36,809 INFO L226 Difference]: Without dead ends: 122 [2018-04-13 05:33:36,810 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 132 GetRequests, 109 SyntacticMatches, 0 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 78 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=213, Invalid=387, Unknown=0, NotChecked=0, Total=600 [2018-04-13 05:33:36,810 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 122 states. [2018-04-13 05:33:36,811 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 122 to 118. [2018-04-13 05:33:36,812 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 118 states. [2018-04-13 05:33:36,812 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 118 states to 118 states and 119 transitions. [2018-04-13 05:33:36,812 INFO L78 Accepts]: Start accepts. Automaton has 118 states and 119 transitions. Word has length 99 [2018-04-13 05:33:36,812 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:33:36,812 INFO L459 AbstractCegarLoop]: Abstraction has 118 states and 119 transitions. [2018-04-13 05:33:36,813 INFO L460 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-04-13 05:33:36,813 INFO L276 IsEmpty]: Start isEmpty. Operand 118 states and 119 transitions. [2018-04-13 05:33:36,814 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 108 [2018-04-13 05:33:36,814 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:33:36,814 INFO L355 BasicCegarLoop]: trace histogram [11, 11, 10, 10, 10, 10, 10, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:33:36,814 INFO L408 AbstractCegarLoop]: === Iteration 16 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:33:36,814 INFO L82 PathProgramCache]: Analyzing trace with hash 271278602, now seen corresponding path program 4 times [2018-04-13 05:33:36,814 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:33:36,814 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:33:36,815 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:33:36,815 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 05:33:36,815 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:33:36,824 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:33:36,824 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:33:36,931 INFO L134 CoverageAnalysis]: Checked inductivity of 400 backedges. 0 proven. 200 refuted. 0 times theorem prover too weak. 200 trivial. 0 not checked. [2018-04-13 05:33:36,932 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:33:36,932 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:33:36,932 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-04-13 05:33:36,961 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-04-13 05:33:36,962 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 05:33:36,967 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:33:36,976 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-13 05:33:36,976 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 05:33:36,980 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:33:36,980 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:12, output treesize:11 [2018-04-13 05:33:37,332 INFO L134 CoverageAnalysis]: Checked inductivity of 400 backedges. 200 proven. 200 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-13 05:33:37,333 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:33:37,333 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 26] total 39 [2018-04-13 05:33:37,333 INFO L442 AbstractCegarLoop]: Interpolant automaton has 39 states [2018-04-13 05:33:37,333 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 39 interpolants. [2018-04-13 05:33:37,334 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=338, Invalid=1144, Unknown=0, NotChecked=0, Total=1482 [2018-04-13 05:33:37,334 INFO L87 Difference]: Start difference. First operand 118 states and 119 transitions. Second operand 39 states. [2018-04-13 05:33:37,665 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:33:37,665 INFO L93 Difference]: Finished difference Result 130 states and 131 transitions. [2018-04-13 05:33:37,665 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-04-13 05:33:37,665 INFO L78 Accepts]: Start accepts. Automaton has 39 states. Word has length 107 [2018-04-13 05:33:37,665 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:33:37,666 INFO L225 Difference]: With dead ends: 130 [2018-04-13 05:33:37,666 INFO L226 Difference]: Without dead ends: 130 [2018-04-13 05:33:37,666 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 136 GetRequests, 84 SyntacticMatches, 1 SemanticMatches, 51 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 909 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=595, Invalid=2161, Unknown=0, NotChecked=0, Total=2756 [2018-04-13 05:33:37,667 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 130 states. [2018-04-13 05:33:37,668 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 130 to 126. [2018-04-13 05:33:37,669 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 126 states. [2018-04-13 05:33:37,669 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 126 states to 126 states and 127 transitions. [2018-04-13 05:33:37,669 INFO L78 Accepts]: Start accepts. Automaton has 126 states and 127 transitions. Word has length 107 [2018-04-13 05:33:37,669 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:33:37,670 INFO L459 AbstractCegarLoop]: Abstraction has 126 states and 127 transitions. [2018-04-13 05:33:37,670 INFO L460 AbstractCegarLoop]: Interpolant automaton has 39 states. [2018-04-13 05:33:37,670 INFO L276 IsEmpty]: Start isEmpty. Operand 126 states and 127 transitions. [2018-04-13 05:33:37,671 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 116 [2018-04-13 05:33:37,671 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:33:37,671 INFO L355 BasicCegarLoop]: trace histogram [12, 12, 11, 11, 11, 11, 11, 11, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:33:37,671 INFO L408 AbstractCegarLoop]: === Iteration 17 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:33:37,671 INFO L82 PathProgramCache]: Analyzing trace with hash 221625834, now seen corresponding path program 5 times [2018-04-13 05:33:37,671 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:33:37,671 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:33:37,672 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:33:37,672 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 05:33:37,672 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:33:37,686 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:33:37,687 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:33:37,802 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 0 proven. 242 refuted. 0 times theorem prover too weak. 242 trivial. 0 not checked. [2018-04-13 05:33:37,802 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:33:37,802 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:33:37,803 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-04-13 05:33:37,835 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 12 check-sat command(s) [2018-04-13 05:33:37,835 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 05:33:37,841 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:33:37,859 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 0 proven. 242 refuted. 0 times theorem prover too weak. 242 trivial. 0 not checked. [2018-04-13 05:33:37,860 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:33:37,860 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 14] total 17 [2018-04-13 05:33:37,860 INFO L442 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-04-13 05:33:37,861 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-04-13 05:33:37,861 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=109, Invalid=163, Unknown=0, NotChecked=0, Total=272 [2018-04-13 05:33:37,861 INFO L87 Difference]: Start difference. First operand 126 states and 127 transitions. Second operand 17 states. [2018-04-13 05:33:38,075 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:33:38,075 INFO L93 Difference]: Finished difference Result 138 states and 139 transitions. [2018-04-13 05:33:38,076 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-04-13 05:33:38,076 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 115 [2018-04-13 05:33:38,077 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:33:38,077 INFO L225 Difference]: With dead ends: 138 [2018-04-13 05:33:38,077 INFO L226 Difference]: Without dead ends: 138 [2018-04-13 05:33:38,078 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 154 GetRequests, 127 SyntacticMatches, 0 SemanticMatches, 27 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 107 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=290, Invalid=522, Unknown=0, NotChecked=0, Total=812 [2018-04-13 05:33:38,078 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 138 states. [2018-04-13 05:33:38,080 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 138 to 134. [2018-04-13 05:33:38,081 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 134 states. [2018-04-13 05:33:38,081 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 134 states to 134 states and 135 transitions. [2018-04-13 05:33:38,081 INFO L78 Accepts]: Start accepts. Automaton has 134 states and 135 transitions. Word has length 115 [2018-04-13 05:33:38,082 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:33:38,082 INFO L459 AbstractCegarLoop]: Abstraction has 134 states and 135 transitions. [2018-04-13 05:33:38,082 INFO L460 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-04-13 05:33:38,082 INFO L276 IsEmpty]: Start isEmpty. Operand 134 states and 135 transitions. [2018-04-13 05:33:38,083 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 124 [2018-04-13 05:33:38,083 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:33:38,083 INFO L355 BasicCegarLoop]: trace histogram [13, 13, 12, 12, 12, 12, 12, 12, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:33:38,083 INFO L408 AbstractCegarLoop]: === Iteration 18 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:33:38,083 INFO L82 PathProgramCache]: Analyzing trace with hash -1568398646, now seen corresponding path program 6 times [2018-04-13 05:33:38,084 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:33:38,084 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:33:38,084 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:33:38,084 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 05:33:38,084 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:33:38,099 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:33:38,100 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:33:38,230 INFO L134 CoverageAnalysis]: Checked inductivity of 576 backedges. 0 proven. 288 refuted. 0 times theorem prover too weak. 288 trivial. 0 not checked. [2018-04-13 05:33:38,230 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:33:38,230 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:33:38,231 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-04-13 05:33:38,267 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 13 check-sat command(s) [2018-04-13 05:33:38,267 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 05:33:38,272 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:33:38,290 INFO L134 CoverageAnalysis]: Checked inductivity of 576 backedges. 0 proven. 288 refuted. 0 times theorem prover too weak. 288 trivial. 0 not checked. [2018-04-13 05:33:38,290 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:33:38,290 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 15] total 18 [2018-04-13 05:33:38,291 INFO L442 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-04-13 05:33:38,291 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-04-13 05:33:38,291 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=124, Invalid=182, Unknown=0, NotChecked=0, Total=306 [2018-04-13 05:33:38,291 INFO L87 Difference]: Start difference. First operand 134 states and 135 transitions. Second operand 18 states. [2018-04-13 05:33:38,488 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:33:38,488 INFO L93 Difference]: Finished difference Result 146 states and 147 transitions. [2018-04-13 05:33:38,489 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-04-13 05:33:38,489 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 123 [2018-04-13 05:33:38,489 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:33:38,489 INFO L225 Difference]: With dead ends: 146 [2018-04-13 05:33:38,489 INFO L226 Difference]: Without dead ends: 146 [2018-04-13 05:33:38,490 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 165 GetRequests, 136 SyntacticMatches, 0 SemanticMatches, 29 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 123 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=333, Invalid=597, Unknown=0, NotChecked=0, Total=930 [2018-04-13 05:33:38,490 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 146 states. [2018-04-13 05:33:38,491 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 146 to 142. [2018-04-13 05:33:38,491 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 142 states. [2018-04-13 05:33:38,492 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 142 states to 142 states and 143 transitions. [2018-04-13 05:33:38,492 INFO L78 Accepts]: Start accepts. Automaton has 142 states and 143 transitions. Word has length 123 [2018-04-13 05:33:38,492 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:33:38,492 INFO L459 AbstractCegarLoop]: Abstraction has 142 states and 143 transitions. [2018-04-13 05:33:38,492 INFO L460 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-04-13 05:33:38,492 INFO L276 IsEmpty]: Start isEmpty. Operand 142 states and 143 transitions. [2018-04-13 05:33:38,493 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 132 [2018-04-13 05:33:38,493 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:33:38,493 INFO L355 BasicCegarLoop]: trace histogram [14, 14, 13, 13, 13, 13, 13, 13, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:33:38,493 INFO L408 AbstractCegarLoop]: === Iteration 19 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:33:38,493 INFO L82 PathProgramCache]: Analyzing trace with hash 1222709418, now seen corresponding path program 7 times [2018-04-13 05:33:38,493 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:33:38,493 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:33:38,494 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:33:38,494 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 05:33:38,494 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:33:38,503 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:33:38,504 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:33:38,628 INFO L134 CoverageAnalysis]: Checked inductivity of 676 backedges. 0 proven. 338 refuted. 0 times theorem prover too weak. 338 trivial. 0 not checked. [2018-04-13 05:33:38,628 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:33:38,628 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:33:38,629 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 05:33:38,645 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:33:38,649 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:33:38,807 INFO L134 CoverageAnalysis]: Checked inductivity of 676 backedges. 0 proven. 338 refuted. 0 times theorem prover too weak. 338 trivial. 0 not checked. [2018-04-13 05:33:38,808 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:33:38,808 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 17] total 32 [2018-04-13 05:33:38,808 INFO L442 AbstractCegarLoop]: Interpolant automaton has 32 states [2018-04-13 05:33:38,808 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2018-04-13 05:33:38,808 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=361, Invalid=631, Unknown=0, NotChecked=0, Total=992 [2018-04-13 05:33:38,809 INFO L87 Difference]: Start difference. First operand 142 states and 143 transitions. Second operand 32 states. [2018-04-13 05:33:38,933 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:33:38,933 INFO L93 Difference]: Finished difference Result 154 states and 155 transitions. [2018-04-13 05:33:38,933 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-04-13 05:33:38,933 INFO L78 Accepts]: Start accepts. Automaton has 32 states. Word has length 131 [2018-04-13 05:33:38,933 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:33:38,933 INFO L225 Difference]: With dead ends: 154 [2018-04-13 05:33:38,933 INFO L226 Difference]: Without dead ends: 154 [2018-04-13 05:33:38,934 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 149 GetRequests, 117 SyntacticMatches, 1 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 375 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=392, Invalid=664, Unknown=0, NotChecked=0, Total=1056 [2018-04-13 05:33:38,934 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 154 states. [2018-04-13 05:33:38,936 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 154 to 150. [2018-04-13 05:33:38,936 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 150 states. [2018-04-13 05:33:38,936 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 150 states to 150 states and 151 transitions. [2018-04-13 05:33:38,937 INFO L78 Accepts]: Start accepts. Automaton has 150 states and 151 transitions. Word has length 131 [2018-04-13 05:33:38,937 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:33:38,937 INFO L459 AbstractCegarLoop]: Abstraction has 150 states and 151 transitions. [2018-04-13 05:33:38,937 INFO L460 AbstractCegarLoop]: Interpolant automaton has 32 states. [2018-04-13 05:33:38,937 INFO L276 IsEmpty]: Start isEmpty. Operand 150 states and 151 transitions. [2018-04-13 05:33:38,937 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 140 [2018-04-13 05:33:38,937 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:33:38,937 INFO L355 BasicCegarLoop]: trace histogram [15, 15, 14, 14, 14, 14, 14, 14, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:33:38,937 INFO L408 AbstractCegarLoop]: === Iteration 20 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:33:38,937 INFO L82 PathProgramCache]: Analyzing trace with hash 685180810, now seen corresponding path program 8 times [2018-04-13 05:33:38,937 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:33:38,938 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:33:38,938 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:33:38,938 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 05:33:38,938 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:33:38,947 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:33:38,948 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:33:39,086 INFO L134 CoverageAnalysis]: Checked inductivity of 784 backedges. 0 proven. 392 refuted. 0 times theorem prover too weak. 392 trivial. 0 not checked. [2018-04-13 05:33:39,086 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:33:39,086 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:33:39,087 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-04-13 05:33:39,110 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-04-13 05:33:39,111 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 05:33:39,115 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:33:39,149 INFO L134 CoverageAnalysis]: Checked inductivity of 784 backedges. 0 proven. 392 refuted. 0 times theorem prover too weak. 392 trivial. 0 not checked. [2018-04-13 05:33:39,150 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:33:39,150 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 17] total 20 [2018-04-13 05:33:39,151 INFO L442 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-04-13 05:33:39,151 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-04-13 05:33:39,151 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=157, Invalid=223, Unknown=0, NotChecked=0, Total=380 [2018-04-13 05:33:39,151 INFO L87 Difference]: Start difference. First operand 150 states and 151 transitions. Second operand 20 states. [2018-04-13 05:33:39,357 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:33:39,358 INFO L93 Difference]: Finished difference Result 162 states and 163 transitions. [2018-04-13 05:33:39,358 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-04-13 05:33:39,358 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 139 [2018-04-13 05:33:39,358 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:33:39,358 INFO L225 Difference]: With dead ends: 162 [2018-04-13 05:33:39,359 INFO L226 Difference]: Without dead ends: 162 [2018-04-13 05:33:39,359 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 187 GetRequests, 154 SyntacticMatches, 0 SemanticMatches, 33 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 158 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=428, Invalid=762, Unknown=0, NotChecked=0, Total=1190 [2018-04-13 05:33:39,359 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 162 states. [2018-04-13 05:33:39,360 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 162 to 158. [2018-04-13 05:33:39,360 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 158 states. [2018-04-13 05:33:39,361 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 158 states to 158 states and 159 transitions. [2018-04-13 05:33:39,361 INFO L78 Accepts]: Start accepts. Automaton has 158 states and 159 transitions. Word has length 139 [2018-04-13 05:33:39,361 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:33:39,361 INFO L459 AbstractCegarLoop]: Abstraction has 158 states and 159 transitions. [2018-04-13 05:33:39,361 INFO L460 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-04-13 05:33:39,361 INFO L276 IsEmpty]: Start isEmpty. Operand 158 states and 159 transitions. [2018-04-13 05:33:39,362 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 148 [2018-04-13 05:33:39,362 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:33:39,362 INFO L355 BasicCegarLoop]: trace histogram [16, 16, 15, 15, 15, 15, 15, 15, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:33:39,362 INFO L408 AbstractCegarLoop]: === Iteration 21 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:33:39,362 INFO L82 PathProgramCache]: Analyzing trace with hash 984647530, now seen corresponding path program 9 times [2018-04-13 05:33:39,362 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:33:39,362 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:33:39,362 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:33:39,363 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 05:33:39,363 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:33:39,373 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:33:39,374 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:33:39,565 INFO L134 CoverageAnalysis]: Checked inductivity of 900 backedges. 0 proven. 450 refuted. 0 times theorem prover too weak. 450 trivial. 0 not checked. [2018-04-13 05:33:39,566 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:33:39,566 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:33:39,566 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-04-13 05:33:39,596 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 16 check-sat command(s) [2018-04-13 05:33:39,597 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 05:33:39,600 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:33:39,790 INFO L134 CoverageAnalysis]: Checked inductivity of 900 backedges. 0 proven. 450 refuted. 0 times theorem prover too weak. 450 trivial. 0 not checked. [2018-04-13 05:33:39,790 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:33:39,791 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 19] total 36 [2018-04-13 05:33:39,791 INFO L442 AbstractCegarLoop]: Interpolant automaton has 36 states [2018-04-13 05:33:39,791 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2018-04-13 05:33:39,792 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=460, Invalid=800, Unknown=0, NotChecked=0, Total=1260 [2018-04-13 05:33:39,792 INFO L87 Difference]: Start difference. First operand 158 states and 159 transitions. Second operand 36 states. [2018-04-13 05:33:39,960 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:33:39,961 INFO L93 Difference]: Finished difference Result 170 states and 171 transitions. [2018-04-13 05:33:39,961 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-04-13 05:33:39,961 INFO L78 Accepts]: Start accepts. Automaton has 36 states. Word has length 147 [2018-04-13 05:33:39,961 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:33:39,962 INFO L225 Difference]: With dead ends: 170 [2018-04-13 05:33:39,962 INFO L226 Difference]: Without dead ends: 170 [2018-04-13 05:33:39,963 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 167 GetRequests, 131 SyntacticMatches, 1 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 493 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=495, Invalid=837, Unknown=0, NotChecked=0, Total=1332 [2018-04-13 05:33:39,963 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 170 states. [2018-04-13 05:33:39,965 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 170 to 166. [2018-04-13 05:33:39,965 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 166 states. [2018-04-13 05:33:39,966 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 166 states to 166 states and 167 transitions. [2018-04-13 05:33:39,966 INFO L78 Accepts]: Start accepts. Automaton has 166 states and 167 transitions. Word has length 147 [2018-04-13 05:33:39,966 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:33:39,967 INFO L459 AbstractCegarLoop]: Abstraction has 166 states and 167 transitions. [2018-04-13 05:33:39,967 INFO L460 AbstractCegarLoop]: Interpolant automaton has 36 states. [2018-04-13 05:33:39,967 INFO L276 IsEmpty]: Start isEmpty. Operand 166 states and 167 transitions. [2018-04-13 05:33:39,967 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 156 [2018-04-13 05:33:39,967 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:33:39,968 INFO L355 BasicCegarLoop]: trace histogram [17, 17, 16, 16, 16, 16, 16, 16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:33:39,968 INFO L408 AbstractCegarLoop]: === Iteration 22 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:33:39,968 INFO L82 PathProgramCache]: Analyzing trace with hash 1719144522, now seen corresponding path program 10 times [2018-04-13 05:33:39,968 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:33:39,968 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:33:39,969 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:33:39,969 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 05:33:39,969 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:33:39,984 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:33:39,985 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:33:40,148 INFO L134 CoverageAnalysis]: Checked inductivity of 1024 backedges. 0 proven. 512 refuted. 0 times theorem prover too weak. 512 trivial. 0 not checked. [2018-04-13 05:33:40,149 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:33:40,149 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:33:40,149 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-04-13 05:33:40,180 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-04-13 05:33:40,180 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 05:33:40,188 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:33:40,203 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-13 05:33:40,203 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 05:33:40,206 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:33:40,206 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:12, output treesize:11 [2018-04-13 05:33:41,023 INFO L134 CoverageAnalysis]: Checked inductivity of 1024 backedges. 512 proven. 512 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-13 05:33:41,023 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:33:41,048 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 38] total 57 [2018-04-13 05:33:41,049 INFO L442 AbstractCegarLoop]: Interpolant automaton has 57 states [2018-04-13 05:33:41,049 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 57 interpolants. [2018-04-13 05:33:41,050 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=722, Invalid=2470, Unknown=0, NotChecked=0, Total=3192 [2018-04-13 05:33:41,050 INFO L87 Difference]: Start difference. First operand 166 states and 167 transitions. Second operand 57 states. [2018-04-13 05:33:41,574 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:33:41,574 INFO L93 Difference]: Finished difference Result 178 states and 179 transitions. [2018-04-13 05:33:41,577 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-04-13 05:33:41,577 INFO L78 Accepts]: Start accepts. Automaton has 57 states. Word has length 155 [2018-04-13 05:33:41,577 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:33:41,578 INFO L225 Difference]: With dead ends: 178 [2018-04-13 05:33:41,578 INFO L226 Difference]: Without dead ends: 178 [2018-04-13 05:33:41,579 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 196 GetRequests, 120 SyntacticMatches, 1 SemanticMatches, 75 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2121 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=1264, Invalid=4588, Unknown=0, NotChecked=0, Total=5852 [2018-04-13 05:33:41,579 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 178 states. [2018-04-13 05:33:41,581 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 178 to 174. [2018-04-13 05:33:41,581 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 174 states. [2018-04-13 05:33:41,582 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 174 states to 174 states and 175 transitions. [2018-04-13 05:33:41,582 INFO L78 Accepts]: Start accepts. Automaton has 174 states and 175 transitions. Word has length 155 [2018-04-13 05:33:41,582 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:33:41,582 INFO L459 AbstractCegarLoop]: Abstraction has 174 states and 175 transitions. [2018-04-13 05:33:41,582 INFO L460 AbstractCegarLoop]: Interpolant automaton has 57 states. [2018-04-13 05:33:41,582 INFO L276 IsEmpty]: Start isEmpty. Operand 174 states and 175 transitions. [2018-04-13 05:33:41,583 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 164 [2018-04-13 05:33:41,583 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:33:41,583 INFO L355 BasicCegarLoop]: trace histogram [18, 18, 17, 17, 17, 17, 17, 17, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:33:41,583 INFO L408 AbstractCegarLoop]: === Iteration 23 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:33:41,584 INFO L82 PathProgramCache]: Analyzing trace with hash -1544019414, now seen corresponding path program 11 times [2018-04-13 05:33:41,584 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:33:41,584 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:33:41,584 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:33:41,584 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 05:33:41,585 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:33:41,600 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:33:41,601 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:33:41,817 INFO L134 CoverageAnalysis]: Checked inductivity of 1156 backedges. 0 proven. 578 refuted. 0 times theorem prover too weak. 578 trivial. 0 not checked. [2018-04-13 05:33:41,817 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:33:41,817 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:33:41,818 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-04-13 05:33:41,848 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 18 check-sat command(s) [2018-04-13 05:33:41,848 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 05:33:41,852 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:33:41,888 INFO L134 CoverageAnalysis]: Checked inductivity of 1156 backedges. 0 proven. 578 refuted. 0 times theorem prover too weak. 578 trivial. 0 not checked. [2018-04-13 05:33:41,888 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:33:41,889 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 20] total 23 [2018-04-13 05:33:41,889 INFO L442 AbstractCegarLoop]: Interpolant automaton has 23 states [2018-04-13 05:33:41,889 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2018-04-13 05:33:41,890 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=214, Invalid=292, Unknown=0, NotChecked=0, Total=506 [2018-04-13 05:33:41,890 INFO L87 Difference]: Start difference. First operand 174 states and 175 transitions. Second operand 23 states. [2018-04-13 05:33:42,168 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:33:42,168 INFO L93 Difference]: Finished difference Result 186 states and 187 transitions. [2018-04-13 05:33:42,168 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-04-13 05:33:42,168 INFO L78 Accepts]: Start accepts. Automaton has 23 states. Word has length 163 [2018-04-13 05:33:42,169 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:33:42,169 INFO L225 Difference]: With dead ends: 186 [2018-04-13 05:33:42,169 INFO L226 Difference]: Without dead ends: 186 [2018-04-13 05:33:42,170 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 220 GetRequests, 181 SyntacticMatches, 0 SemanticMatches, 39 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 218 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=593, Invalid=1047, Unknown=0, NotChecked=0, Total=1640 [2018-04-13 05:33:42,170 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 186 states. [2018-04-13 05:33:42,172 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 186 to 182. [2018-04-13 05:33:42,172 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 182 states. [2018-04-13 05:33:42,173 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 182 states to 182 states and 183 transitions. [2018-04-13 05:33:42,173 INFO L78 Accepts]: Start accepts. Automaton has 182 states and 183 transitions. Word has length 163 [2018-04-13 05:33:42,173 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:33:42,174 INFO L459 AbstractCegarLoop]: Abstraction has 182 states and 183 transitions. [2018-04-13 05:33:42,174 INFO L460 AbstractCegarLoop]: Interpolant automaton has 23 states. [2018-04-13 05:33:42,174 INFO L276 IsEmpty]: Start isEmpty. Operand 182 states and 183 transitions. [2018-04-13 05:33:42,174 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 172 [2018-04-13 05:33:42,174 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:33:42,174 INFO L355 BasicCegarLoop]: trace histogram [19, 19, 18, 18, 18, 18, 18, 18, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:33:42,174 INFO L408 AbstractCegarLoop]: === Iteration 24 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:33:42,175 INFO L82 PathProgramCache]: Analyzing trace with hash 448478474, now seen corresponding path program 12 times [2018-04-13 05:33:42,175 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:33:42,175 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:33:42,175 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:33:42,176 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 05:33:42,176 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:33:42,191 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:33:42,192 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:33:42,427 INFO L134 CoverageAnalysis]: Checked inductivity of 1296 backedges. 0 proven. 648 refuted. 0 times theorem prover too weak. 648 trivial. 0 not checked. [2018-04-13 05:33:42,427 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:33:42,427 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:33:42,428 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-04-13 05:33:42,472 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 19 check-sat command(s) [2018-04-13 05:33:42,472 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 05:33:42,480 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:33:42,741 INFO L134 CoverageAnalysis]: Checked inductivity of 1296 backedges. 0 proven. 648 refuted. 0 times theorem prover too weak. 648 trivial. 0 not checked. [2018-04-13 05:33:42,741 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:33:42,741 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 22] total 42 [2018-04-13 05:33:42,742 INFO L442 AbstractCegarLoop]: Interpolant automaton has 42 states [2018-04-13 05:33:42,742 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 42 interpolants. [2018-04-13 05:33:42,742 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=631, Invalid=1091, Unknown=0, NotChecked=0, Total=1722 [2018-04-13 05:33:42,742 INFO L87 Difference]: Start difference. First operand 182 states and 183 transitions. Second operand 42 states. [2018-04-13 05:33:42,951 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:33:42,951 INFO L93 Difference]: Finished difference Result 194 states and 195 transitions. [2018-04-13 05:33:42,951 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-04-13 05:33:42,952 INFO L78 Accepts]: Start accepts. Automaton has 42 states. Word has length 171 [2018-04-13 05:33:42,952 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:33:42,952 INFO L225 Difference]: With dead ends: 194 [2018-04-13 05:33:42,952 INFO L226 Difference]: Without dead ends: 194 [2018-04-13 05:33:42,953 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 194 GetRequests, 152 SyntacticMatches, 1 SemanticMatches, 41 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 700 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=672, Invalid=1134, Unknown=0, NotChecked=0, Total=1806 [2018-04-13 05:33:42,953 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 194 states. [2018-04-13 05:33:42,955 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 194 to 190. [2018-04-13 05:33:42,955 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 190 states. [2018-04-13 05:33:42,956 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 190 states to 190 states and 191 transitions. [2018-04-13 05:33:42,956 INFO L78 Accepts]: Start accepts. Automaton has 190 states and 191 transitions. Word has length 171 [2018-04-13 05:33:42,956 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:33:42,956 INFO L459 AbstractCegarLoop]: Abstraction has 190 states and 191 transitions. [2018-04-13 05:33:42,956 INFO L460 AbstractCegarLoop]: Interpolant automaton has 42 states. [2018-04-13 05:33:42,957 INFO L276 IsEmpty]: Start isEmpty. Operand 190 states and 191 transitions. [2018-04-13 05:33:42,957 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 180 [2018-04-13 05:33:42,957 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:33:42,958 INFO L355 BasicCegarLoop]: trace histogram [20, 20, 19, 19, 19, 19, 19, 19, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:33:42,958 INFO L408 AbstractCegarLoop]: === Iteration 25 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:33:42,958 INFO L82 PathProgramCache]: Analyzing trace with hash 1108074730, now seen corresponding path program 13 times [2018-04-13 05:33:42,958 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:33:42,958 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:33:42,959 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:33:42,959 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 05:33:42,959 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:33:42,973 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:33:42,974 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:33:43,199 INFO L134 CoverageAnalysis]: Checked inductivity of 1444 backedges. 0 proven. 722 refuted. 0 times theorem prover too weak. 722 trivial. 0 not checked. [2018-04-13 05:33:43,199 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:33:43,199 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:33:43,200 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 05:33:43,219 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:33:43,223 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:33:43,502 INFO L134 CoverageAnalysis]: Checked inductivity of 1444 backedges. 0 proven. 722 refuted. 0 times theorem prover too weak. 722 trivial. 0 not checked. [2018-04-13 05:33:43,502 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:33:43,502 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 23] total 44 [2018-04-13 05:33:43,503 INFO L442 AbstractCegarLoop]: Interpolant automaton has 44 states [2018-04-13 05:33:43,503 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 44 interpolants. [2018-04-13 05:33:43,504 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=694, Invalid=1198, Unknown=0, NotChecked=0, Total=1892 [2018-04-13 05:33:43,504 INFO L87 Difference]: Start difference. First operand 190 states and 191 transitions. Second operand 44 states. [2018-04-13 05:33:43,655 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:33:43,655 INFO L93 Difference]: Finished difference Result 202 states and 203 transitions. [2018-04-13 05:33:43,655 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-04-13 05:33:43,655 INFO L78 Accepts]: Start accepts. Automaton has 44 states. Word has length 179 [2018-04-13 05:33:43,655 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:33:43,656 INFO L225 Difference]: With dead ends: 202 [2018-04-13 05:33:43,656 INFO L226 Difference]: Without dead ends: 202 [2018-04-13 05:33:43,656 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 203 GetRequests, 159 SyntacticMatches, 1 SemanticMatches, 43 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 777 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=737, Invalid=1243, Unknown=0, NotChecked=0, Total=1980 [2018-04-13 05:33:43,656 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 202 states. [2018-04-13 05:33:43,658 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 202 to 198. [2018-04-13 05:33:43,659 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 198 states. [2018-04-13 05:33:43,659 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 198 states to 198 states and 199 transitions. [2018-04-13 05:33:43,659 INFO L78 Accepts]: Start accepts. Automaton has 198 states and 199 transitions. Word has length 179 [2018-04-13 05:33:43,660 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:33:43,660 INFO L459 AbstractCegarLoop]: Abstraction has 198 states and 199 transitions. [2018-04-13 05:33:43,660 INFO L460 AbstractCegarLoop]: Interpolant automaton has 44 states. [2018-04-13 05:33:43,660 INFO L276 IsEmpty]: Start isEmpty. Operand 198 states and 199 transitions. [2018-04-13 05:33:43,661 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 188 [2018-04-13 05:33:43,661 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:33:43,661 INFO L355 BasicCegarLoop]: trace histogram [21, 21, 20, 20, 20, 20, 20, 20, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:33:43,661 INFO L408 AbstractCegarLoop]: === Iteration 26 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:33:43,661 INFO L82 PathProgramCache]: Analyzing trace with hash 16027082, now seen corresponding path program 14 times [2018-04-13 05:33:43,661 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:33:43,661 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:33:43,661 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:33:43,662 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 05:33:43,662 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:33:43,677 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:33:43,678 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:33:43,851 INFO L134 CoverageAnalysis]: Checked inductivity of 1600 backedges. 0 proven. 800 refuted. 0 times theorem prover too weak. 800 trivial. 0 not checked. [2018-04-13 05:33:43,852 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:33:43,852 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:33:43,852 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-04-13 05:33:43,867 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-04-13 05:33:43,868 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 05:33:43,872 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:33:43,915 INFO L134 CoverageAnalysis]: Checked inductivity of 1600 backedges. 0 proven. 800 refuted. 0 times theorem prover too weak. 800 trivial. 0 not checked. [2018-04-13 05:33:43,915 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:33:43,915 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 23] total 26 [2018-04-13 05:33:43,915 INFO L442 AbstractCegarLoop]: Interpolant automaton has 26 states [2018-04-13 05:33:43,916 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2018-04-13 05:33:43,916 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=280, Invalid=370, Unknown=0, NotChecked=0, Total=650 [2018-04-13 05:33:43,916 INFO L87 Difference]: Start difference. First operand 198 states and 199 transitions. Second operand 26 states. [2018-04-13 05:33:44,191 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:33:44,192 INFO L93 Difference]: Finished difference Result 210 states and 211 transitions. [2018-04-13 05:33:44,192 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-04-13 05:33:44,192 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 187 [2018-04-13 05:33:44,192 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:33:44,192 INFO L225 Difference]: With dead ends: 210 [2018-04-13 05:33:44,192 INFO L226 Difference]: Without dead ends: 210 [2018-04-13 05:33:44,193 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 253 GetRequests, 208 SyntacticMatches, 0 SemanticMatches, 45 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 287 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=785, Invalid=1377, Unknown=0, NotChecked=0, Total=2162 [2018-04-13 05:33:44,193 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 210 states. [2018-04-13 05:33:44,194 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 210 to 206. [2018-04-13 05:33:44,194 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 206 states. [2018-04-13 05:33:44,195 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 206 states to 206 states and 207 transitions. [2018-04-13 05:33:44,195 INFO L78 Accepts]: Start accepts. Automaton has 206 states and 207 transitions. Word has length 187 [2018-04-13 05:33:44,195 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:33:44,195 INFO L459 AbstractCegarLoop]: Abstraction has 206 states and 207 transitions. [2018-04-13 05:33:44,195 INFO L460 AbstractCegarLoop]: Interpolant automaton has 26 states. [2018-04-13 05:33:44,195 INFO L276 IsEmpty]: Start isEmpty. Operand 206 states and 207 transitions. [2018-04-13 05:33:44,196 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 196 [2018-04-13 05:33:44,196 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:33:44,196 INFO L355 BasicCegarLoop]: trace histogram [22, 22, 21, 21, 21, 21, 21, 21, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:33:44,196 INFO L408 AbstractCegarLoop]: === Iteration 27 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:33:44,196 INFO L82 PathProgramCache]: Analyzing trace with hash -834681942, now seen corresponding path program 15 times [2018-04-13 05:33:44,196 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:33:44,196 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:33:44,197 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:33:44,197 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 05:33:44,197 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:33:44,206 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:33:44,206 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:33:44,425 INFO L134 CoverageAnalysis]: Checked inductivity of 1764 backedges. 0 proven. 882 refuted. 0 times theorem prover too weak. 882 trivial. 0 not checked. [2018-04-13 05:33:44,425 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:33:44,425 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:33:44,426 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-04-13 05:33:44,470 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 22 check-sat command(s) [2018-04-13 05:33:44,470 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 05:33:44,478 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:33:44,767 INFO L134 CoverageAnalysis]: Checked inductivity of 1764 backedges. 0 proven. 882 refuted. 0 times theorem prover too weak. 882 trivial. 0 not checked. [2018-04-13 05:33:44,767 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:33:44,767 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [26, 25] total 48 [2018-04-13 05:33:44,767 INFO L442 AbstractCegarLoop]: Interpolant automaton has 48 states [2018-04-13 05:33:44,768 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 48 interpolants. [2018-04-13 05:33:44,768 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=829, Invalid=1427, Unknown=0, NotChecked=0, Total=2256 [2018-04-13 05:33:44,768 INFO L87 Difference]: Start difference. First operand 206 states and 207 transitions. Second operand 48 states. [2018-04-13 05:33:44,991 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:33:44,991 INFO L93 Difference]: Finished difference Result 218 states and 219 transitions. [2018-04-13 05:33:44,991 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2018-04-13 05:33:44,991 INFO L78 Accepts]: Start accepts. Automaton has 48 states. Word has length 195 [2018-04-13 05:33:44,991 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:33:44,992 INFO L225 Difference]: With dead ends: 218 [2018-04-13 05:33:44,992 INFO L226 Difference]: Without dead ends: 218 [2018-04-13 05:33:44,992 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 221 GetRequests, 173 SyntacticMatches, 1 SemanticMatches, 47 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 943 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=876, Invalid=1476, Unknown=0, NotChecked=0, Total=2352 [2018-04-13 05:33:44,993 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 218 states. [2018-04-13 05:33:44,994 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 218 to 214. [2018-04-13 05:33:44,995 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 214 states. [2018-04-13 05:33:44,995 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 214 states to 214 states and 215 transitions. [2018-04-13 05:33:44,995 INFO L78 Accepts]: Start accepts. Automaton has 214 states and 215 transitions. Word has length 195 [2018-04-13 05:33:44,996 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:33:44,996 INFO L459 AbstractCegarLoop]: Abstraction has 214 states and 215 transitions. [2018-04-13 05:33:44,996 INFO L460 AbstractCegarLoop]: Interpolant automaton has 48 states. [2018-04-13 05:33:44,996 INFO L276 IsEmpty]: Start isEmpty. Operand 214 states and 215 transitions. [2018-04-13 05:33:44,997 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 204 [2018-04-13 05:33:44,997 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:33:44,997 INFO L355 BasicCegarLoop]: trace histogram [23, 23, 22, 22, 22, 22, 22, 22, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:33:44,997 INFO L408 AbstractCegarLoop]: === Iteration 28 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:33:44,997 INFO L82 PathProgramCache]: Analyzing trace with hash -797441398, now seen corresponding path program 16 times [2018-04-13 05:33:44,997 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:33:44,997 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:33:44,998 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:33:44,998 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 05:33:44,998 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:33:45,014 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:33:45,019 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:33:45,341 INFO L134 CoverageAnalysis]: Checked inductivity of 1936 backedges. 0 proven. 968 refuted. 0 times theorem prover too weak. 968 trivial. 0 not checked. [2018-04-13 05:33:45,341 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:33:45,341 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:33:45,342 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-04-13 05:33:45,386 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-04-13 05:33:45,388 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 05:33:45,401 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:33:45,407 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-13 05:33:45,407 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 05:33:45,410 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:33:45,411 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:12, output treesize:11 [2018-04-13 05:33:46,404 INFO L134 CoverageAnalysis]: Checked inductivity of 1936 backedges. 968 proven. 968 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-13 05:33:46,404 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:33:46,404 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [27, 50] total 75 [2018-04-13 05:33:46,405 INFO L442 AbstractCegarLoop]: Interpolant automaton has 75 states [2018-04-13 05:33:46,405 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 75 interpolants. [2018-04-13 05:33:46,406 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1250, Invalid=4300, Unknown=0, NotChecked=0, Total=5550 [2018-04-13 05:33:46,406 INFO L87 Difference]: Start difference. First operand 214 states and 215 transitions. Second operand 75 states. [2018-04-13 05:33:47,074 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:33:47,074 INFO L93 Difference]: Finished difference Result 226 states and 227 transitions. [2018-04-13 05:33:47,074 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2018-04-13 05:33:47,074 INFO L78 Accepts]: Start accepts. Automaton has 75 states. Word has length 203 [2018-04-13 05:33:47,075 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:33:47,075 INFO L225 Difference]: With dead ends: 226 [2018-04-13 05:33:47,076 INFO L226 Difference]: Without dead ends: 226 [2018-04-13 05:33:47,078 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 256 GetRequests, 156 SyntacticMatches, 1 SemanticMatches, 99 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3837 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=2185, Invalid=7915, Unknown=0, NotChecked=0, Total=10100 [2018-04-13 05:33:47,078 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 226 states. [2018-04-13 05:33:47,081 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 226 to 222. [2018-04-13 05:33:47,081 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 222 states. [2018-04-13 05:33:47,082 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 222 states to 222 states and 223 transitions. [2018-04-13 05:33:47,082 INFO L78 Accepts]: Start accepts. Automaton has 222 states and 223 transitions. Word has length 203 [2018-04-13 05:33:47,082 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:33:47,082 INFO L459 AbstractCegarLoop]: Abstraction has 222 states and 223 transitions. [2018-04-13 05:33:47,082 INFO L460 AbstractCegarLoop]: Interpolant automaton has 75 states. [2018-04-13 05:33:47,082 INFO L276 IsEmpty]: Start isEmpty. Operand 222 states and 223 transitions. [2018-04-13 05:33:47,083 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 212 [2018-04-13 05:33:47,083 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:33:47,083 INFO L355 BasicCegarLoop]: trace histogram [24, 24, 23, 23, 23, 23, 23, 23, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:33:47,083 INFO L408 AbstractCegarLoop]: === Iteration 29 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:33:47,084 INFO L82 PathProgramCache]: Analyzing trace with hash -35141014, now seen corresponding path program 17 times [2018-04-13 05:33:47,084 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:33:47,084 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:33:47,084 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:33:47,085 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 05:33:47,085 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:33:47,102 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:33:47,103 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:33:47,401 INFO L134 CoverageAnalysis]: Checked inductivity of 2116 backedges. 0 proven. 1058 refuted. 0 times theorem prover too weak. 1058 trivial. 0 not checked. [2018-04-13 05:33:47,402 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:33:47,402 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:33:47,402 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-04-13 05:33:47,440 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 24 check-sat command(s) [2018-04-13 05:33:47,440 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 05:33:47,445 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:33:47,478 INFO L134 CoverageAnalysis]: Checked inductivity of 2116 backedges. 0 proven. 1058 refuted. 0 times theorem prover too weak. 1058 trivial. 0 not checked. [2018-04-13 05:33:47,478 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:33:47,478 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [28, 26] total 29 [2018-04-13 05:33:47,478 INFO L442 AbstractCegarLoop]: Interpolant automaton has 29 states [2018-04-13 05:33:47,479 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2018-04-13 05:33:47,479 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=355, Invalid=457, Unknown=0, NotChecked=0, Total=812 [2018-04-13 05:33:47,479 INFO L87 Difference]: Start difference. First operand 222 states and 223 transitions. Second operand 29 states. [2018-04-13 05:33:47,915 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:33:47,915 INFO L93 Difference]: Finished difference Result 234 states and 235 transitions. [2018-04-13 05:33:47,916 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2018-04-13 05:33:47,916 INFO L78 Accepts]: Start accepts. Automaton has 29 states. Word has length 211 [2018-04-13 05:33:47,916 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:33:47,916 INFO L225 Difference]: With dead ends: 234 [2018-04-13 05:33:47,916 INFO L226 Difference]: Without dead ends: 234 [2018-04-13 05:33:47,917 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 286 GetRequests, 235 SyntacticMatches, 0 SemanticMatches, 51 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 365 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=1004, Invalid=1752, Unknown=0, NotChecked=0, Total=2756 [2018-04-13 05:33:47,917 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 234 states. [2018-04-13 05:33:47,918 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 234 to 230. [2018-04-13 05:33:47,918 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 230 states. [2018-04-13 05:33:47,919 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 230 states to 230 states and 231 transitions. [2018-04-13 05:33:47,919 INFO L78 Accepts]: Start accepts. Automaton has 230 states and 231 transitions. Word has length 211 [2018-04-13 05:33:47,919 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:33:47,919 INFO L459 AbstractCegarLoop]: Abstraction has 230 states and 231 transitions. [2018-04-13 05:33:47,919 INFO L460 AbstractCegarLoop]: Interpolant automaton has 29 states. [2018-04-13 05:33:47,919 INFO L276 IsEmpty]: Start isEmpty. Operand 230 states and 231 transitions. [2018-04-13 05:33:47,920 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 220 [2018-04-13 05:33:47,920 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:33:47,920 INFO L355 BasicCegarLoop]: trace histogram [25, 25, 24, 24, 24, 24, 24, 24, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:33:47,920 INFO L408 AbstractCegarLoop]: === Iteration 30 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:33:47,920 INFO L82 PathProgramCache]: Analyzing trace with hash 1016699722, now seen corresponding path program 18 times [2018-04-13 05:33:47,920 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:33:47,920 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:33:47,921 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:33:47,921 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 05:33:47,921 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:33:47,932 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:33:47,933 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:33:48,245 INFO L134 CoverageAnalysis]: Checked inductivity of 2304 backedges. 0 proven. 1152 refuted. 0 times theorem prover too weak. 1152 trivial. 0 not checked. [2018-04-13 05:33:48,245 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:33:48,245 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:33:48,246 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-04-13 05:33:48,347 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 25 check-sat command(s) [2018-04-13 05:33:48,348 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 05:33:48,356 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:33:48,394 INFO L134 CoverageAnalysis]: Checked inductivity of 2304 backedges. 0 proven. 1152 refuted. 0 times theorem prover too weak. 1152 trivial. 0 not checked. [2018-04-13 05:33:48,395 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:33:48,395 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [29, 27] total 30 [2018-04-13 05:33:48,395 INFO L442 AbstractCegarLoop]: Interpolant automaton has 30 states [2018-04-13 05:33:48,395 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2018-04-13 05:33:48,395 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=382, Invalid=488, Unknown=0, NotChecked=0, Total=870 [2018-04-13 05:33:48,395 INFO L87 Difference]: Start difference. First operand 230 states and 231 transitions. Second operand 30 states. [2018-04-13 05:33:48,691 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:33:48,691 INFO L93 Difference]: Finished difference Result 242 states and 243 transitions. [2018-04-13 05:33:48,691 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2018-04-13 05:33:48,692 INFO L78 Accepts]: Start accepts. Automaton has 30 states. Word has length 219 [2018-04-13 05:33:48,692 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:33:48,692 INFO L225 Difference]: With dead ends: 242 [2018-04-13 05:33:48,692 INFO L226 Difference]: Without dead ends: 242 [2018-04-13 05:33:48,693 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 297 GetRequests, 244 SyntacticMatches, 0 SemanticMatches, 53 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 393 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=1083, Invalid=1887, Unknown=0, NotChecked=0, Total=2970 [2018-04-13 05:33:48,693 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 242 states. [2018-04-13 05:33:48,695 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 242 to 238. [2018-04-13 05:33:48,695 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 238 states. [2018-04-13 05:33:48,695 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 238 states to 238 states and 239 transitions. [2018-04-13 05:33:48,695 INFO L78 Accepts]: Start accepts. Automaton has 238 states and 239 transitions. Word has length 219 [2018-04-13 05:33:48,695 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:33:48,696 INFO L459 AbstractCegarLoop]: Abstraction has 238 states and 239 transitions. [2018-04-13 05:33:48,696 INFO L460 AbstractCegarLoop]: Interpolant automaton has 30 states. [2018-04-13 05:33:48,696 INFO L276 IsEmpty]: Start isEmpty. Operand 238 states and 239 transitions. [2018-04-13 05:33:48,696 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 228 [2018-04-13 05:33:48,696 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:33:48,696 INFO L355 BasicCegarLoop]: trace histogram [26, 26, 25, 25, 25, 25, 25, 25, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:33:48,696 INFO L408 AbstractCegarLoop]: === Iteration 31 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:33:48,697 INFO L82 PathProgramCache]: Analyzing trace with hash -2108164822, now seen corresponding path program 19 times [2018-04-13 05:33:48,697 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:33:48,697 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:33:48,697 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:33:48,697 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 05:33:48,697 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:33:48,710 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:33:48,711 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:33:49,033 INFO L134 CoverageAnalysis]: Checked inductivity of 2500 backedges. 0 proven. 1250 refuted. 0 times theorem prover too weak. 1250 trivial. 0 not checked. [2018-04-13 05:33:49,034 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:33:49,034 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:33:49,034 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 05:33:49,055 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:33:49,061 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:33:49,413 INFO L134 CoverageAnalysis]: Checked inductivity of 2500 backedges. 0 proven. 1250 refuted. 0 times theorem prover too weak. 1250 trivial. 0 not checked. [2018-04-13 05:33:49,414 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:33:49,414 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [30, 29] total 56 [2018-04-13 05:33:49,414 INFO L442 AbstractCegarLoop]: Interpolant automaton has 56 states [2018-04-13 05:33:49,414 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 56 interpolants. [2018-04-13 05:33:49,415 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1135, Invalid=1945, Unknown=0, NotChecked=0, Total=3080 [2018-04-13 05:33:49,415 INFO L87 Difference]: Start difference. First operand 238 states and 239 transitions. Second operand 56 states. [2018-04-13 05:33:49,602 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:33:49,602 INFO L93 Difference]: Finished difference Result 250 states and 251 transitions. [2018-04-13 05:33:49,602 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2018-04-13 05:33:49,603 INFO L78 Accepts]: Start accepts. Automaton has 56 states. Word has length 227 [2018-04-13 05:33:49,603 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:33:49,603 INFO L225 Difference]: With dead ends: 250 [2018-04-13 05:33:49,603 INFO L226 Difference]: Without dead ends: 250 [2018-04-13 05:33:49,604 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 257 GetRequests, 201 SyntacticMatches, 1 SemanticMatches, 55 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1323 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=1190, Invalid=2002, Unknown=0, NotChecked=0, Total=3192 [2018-04-13 05:33:49,604 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 250 states. [2018-04-13 05:33:49,605 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 250 to 246. [2018-04-13 05:33:49,605 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 246 states. [2018-04-13 05:33:49,606 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 246 states to 246 states and 247 transitions. [2018-04-13 05:33:49,606 INFO L78 Accepts]: Start accepts. Automaton has 246 states and 247 transitions. Word has length 227 [2018-04-13 05:33:49,606 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:33:49,606 INFO L459 AbstractCegarLoop]: Abstraction has 246 states and 247 transitions. [2018-04-13 05:33:49,606 INFO L460 AbstractCegarLoop]: Interpolant automaton has 56 states. [2018-04-13 05:33:49,606 INFO L276 IsEmpty]: Start isEmpty. Operand 246 states and 247 transitions. [2018-04-13 05:33:49,607 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 236 [2018-04-13 05:33:49,607 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:33:49,607 INFO L355 BasicCegarLoop]: trace histogram [27, 27, 26, 26, 26, 26, 26, 26, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:33:49,607 INFO L408 AbstractCegarLoop]: === Iteration 32 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:33:49,607 INFO L82 PathProgramCache]: Analyzing trace with hash -189966326, now seen corresponding path program 20 times [2018-04-13 05:33:49,607 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:33:49,607 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:33:49,608 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:33:49,608 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 05:33:49,608 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:33:49,620 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:33:49,621 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:33:49,863 INFO L134 CoverageAnalysis]: Checked inductivity of 2704 backedges. 0 proven. 1352 refuted. 0 times theorem prover too weak. 1352 trivial. 0 not checked. [2018-04-13 05:33:49,863 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:33:49,864 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:33:49,864 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-04-13 05:33:49,884 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-04-13 05:33:49,884 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 05:33:49,888 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:33:49,937 INFO L134 CoverageAnalysis]: Checked inductivity of 2704 backedges. 0 proven. 1352 refuted. 0 times theorem prover too weak. 1352 trivial. 0 not checked. [2018-04-13 05:33:49,938 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:33:49,938 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [31, 29] total 32 [2018-04-13 05:33:49,938 INFO L442 AbstractCegarLoop]: Interpolant automaton has 32 states [2018-04-13 05:33:49,938 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2018-04-13 05:33:49,938 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=439, Invalid=553, Unknown=0, NotChecked=0, Total=992 [2018-04-13 05:33:49,938 INFO L87 Difference]: Start difference. First operand 246 states and 247 transitions. Second operand 32 states. [2018-04-13 05:33:50,412 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:33:50,412 INFO L93 Difference]: Finished difference Result 258 states and 259 transitions. [2018-04-13 05:33:50,412 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2018-04-13 05:33:50,412 INFO L78 Accepts]: Start accepts. Automaton has 32 states. Word has length 235 [2018-04-13 05:33:50,412 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:33:50,413 INFO L225 Difference]: With dead ends: 258 [2018-04-13 05:33:50,413 INFO L226 Difference]: Without dead ends: 258 [2018-04-13 05:33:50,413 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 319 GetRequests, 262 SyntacticMatches, 0 SemanticMatches, 57 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 452 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=1250, Invalid=2172, Unknown=0, NotChecked=0, Total=3422 [2018-04-13 05:33:50,414 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 258 states. [2018-04-13 05:33:50,416 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 258 to 254. [2018-04-13 05:33:50,416 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 254 states. [2018-04-13 05:33:50,417 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 254 states to 254 states and 255 transitions. [2018-04-13 05:33:50,417 INFO L78 Accepts]: Start accepts. Automaton has 254 states and 255 transitions. Word has length 235 [2018-04-13 05:33:50,417 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:33:50,417 INFO L459 AbstractCegarLoop]: Abstraction has 254 states and 255 transitions. [2018-04-13 05:33:50,417 INFO L460 AbstractCegarLoop]: Interpolant automaton has 32 states. [2018-04-13 05:33:50,417 INFO L276 IsEmpty]: Start isEmpty. Operand 254 states and 255 transitions. [2018-04-13 05:33:50,418 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 244 [2018-04-13 05:33:50,418 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:33:50,418 INFO L355 BasicCegarLoop]: trace histogram [28, 28, 27, 27, 27, 27, 27, 27, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:33:50,419 INFO L408 AbstractCegarLoop]: === Iteration 33 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:33:50,419 INFO L82 PathProgramCache]: Analyzing trace with hash 149177322, now seen corresponding path program 21 times [2018-04-13 05:33:50,419 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:33:50,419 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:33:50,419 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:33:50,420 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 05:33:50,420 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:33:50,439 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:33:50,440 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:33:50,688 INFO L134 CoverageAnalysis]: Checked inductivity of 2916 backedges. 0 proven. 1458 refuted. 0 times theorem prover too weak. 1458 trivial. 0 not checked. [2018-04-13 05:33:50,688 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:33:50,689 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:33:50,689 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-04-13 05:33:50,735 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 28 check-sat command(s) [2018-04-13 05:33:50,735 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 05:33:50,747 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:33:51,137 INFO L134 CoverageAnalysis]: Checked inductivity of 2916 backedges. 0 proven. 1458 refuted. 0 times theorem prover too weak. 1458 trivial. 0 not checked. [2018-04-13 05:33:51,137 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:33:51,137 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [32, 31] total 60 [2018-04-13 05:33:51,137 INFO L442 AbstractCegarLoop]: Interpolant automaton has 60 states [2018-04-13 05:33:51,138 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 60 interpolants. [2018-04-13 05:33:51,138 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1306, Invalid=2234, Unknown=0, NotChecked=0, Total=3540 [2018-04-13 05:33:51,138 INFO L87 Difference]: Start difference. First operand 254 states and 255 transitions. Second operand 60 states. [2018-04-13 05:33:51,351 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:33:51,351 INFO L93 Difference]: Finished difference Result 266 states and 267 transitions. [2018-04-13 05:33:51,352 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2018-04-13 05:33:51,352 INFO L78 Accepts]: Start accepts. Automaton has 60 states. Word has length 243 [2018-04-13 05:33:51,352 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:33:51,352 INFO L225 Difference]: With dead ends: 266 [2018-04-13 05:33:51,352 INFO L226 Difference]: Without dead ends: 266 [2018-04-13 05:33:51,353 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 275 GetRequests, 215 SyntacticMatches, 1 SemanticMatches, 59 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1537 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=1365, Invalid=2295, Unknown=0, NotChecked=0, Total=3660 [2018-04-13 05:33:51,353 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 266 states. [2018-04-13 05:33:51,354 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 266 to 262. [2018-04-13 05:33:51,355 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 262 states. [2018-04-13 05:33:51,355 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 262 states to 262 states and 263 transitions. [2018-04-13 05:33:51,355 INFO L78 Accepts]: Start accepts. Automaton has 262 states and 263 transitions. Word has length 243 [2018-04-13 05:33:51,355 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:33:51,355 INFO L459 AbstractCegarLoop]: Abstraction has 262 states and 263 transitions. [2018-04-13 05:33:51,355 INFO L460 AbstractCegarLoop]: Interpolant automaton has 60 states. [2018-04-13 05:33:51,355 INFO L276 IsEmpty]: Start isEmpty. Operand 262 states and 263 transitions. [2018-04-13 05:33:51,356 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 252 [2018-04-13 05:33:51,356 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:33:51,356 INFO L355 BasicCegarLoop]: trace histogram [29, 29, 28, 28, 28, 28, 28, 28, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:33:51,356 INFO L408 AbstractCegarLoop]: === Iteration 34 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:33:51,356 INFO L82 PathProgramCache]: Analyzing trace with hash -1543030582, now seen corresponding path program 22 times [2018-04-13 05:33:51,356 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:33:51,356 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:33:51,357 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:33:51,357 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 05:33:51,357 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:33:51,369 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:33:51,370 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:33:51,605 INFO L134 CoverageAnalysis]: Checked inductivity of 3136 backedges. 0 proven. 1568 refuted. 0 times theorem prover too weak. 1568 trivial. 0 not checked. [2018-04-13 05:33:51,605 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:33:51,605 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:33:51,606 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-04-13 05:33:51,640 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-04-13 05:33:51,640 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 05:33:51,656 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:33:51,659 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-13 05:33:51,660 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 05:33:51,663 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:33:51,664 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:12, output treesize:11 [2018-04-13 05:33:53,120 INFO L134 CoverageAnalysis]: Checked inductivity of 3136 backedges. 1568 proven. 1568 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-13 05:33:53,120 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:33:53,120 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [33, 62] total 93 [2018-04-13 05:33:53,120 INFO L442 AbstractCegarLoop]: Interpolant automaton has 93 states [2018-04-13 05:33:53,121 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 93 interpolants. [2018-04-13 05:33:53,121 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1922, Invalid=6634, Unknown=0, NotChecked=0, Total=8556 [2018-04-13 05:33:53,121 INFO L87 Difference]: Start difference. First operand 262 states and 263 transitions. Second operand 93 states. [2018-04-13 05:33:54,022 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:33:54,022 INFO L93 Difference]: Finished difference Result 274 states and 275 transitions. [2018-04-13 05:33:54,022 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2018-04-13 05:33:54,022 INFO L78 Accepts]: Start accepts. Automaton has 93 states. Word has length 251 [2018-04-13 05:33:54,023 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:33:54,023 INFO L225 Difference]: With dead ends: 274 [2018-04-13 05:33:54,023 INFO L226 Difference]: Without dead ends: 274 [2018-04-13 05:33:54,024 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 316 GetRequests, 192 SyntacticMatches, 1 SemanticMatches, 123 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6057 ImplicationChecksByTransitivity, 1.9s TimeCoverageRelationStatistics Valid=3358, Invalid=12142, Unknown=0, NotChecked=0, Total=15500 [2018-04-13 05:33:54,024 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 274 states. [2018-04-13 05:33:54,027 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 274 to 270. [2018-04-13 05:33:54,027 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 270 states. [2018-04-13 05:33:54,027 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 270 states to 270 states and 271 transitions. [2018-04-13 05:33:54,027 INFO L78 Accepts]: Start accepts. Automaton has 270 states and 271 transitions. Word has length 251 [2018-04-13 05:33:54,028 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:33:54,028 INFO L459 AbstractCegarLoop]: Abstraction has 270 states and 271 transitions. [2018-04-13 05:33:54,028 INFO L460 AbstractCegarLoop]: Interpolant automaton has 93 states. [2018-04-13 05:33:54,028 INFO L276 IsEmpty]: Start isEmpty. Operand 270 states and 271 transitions. [2018-04-13 05:33:54,028 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 260 [2018-04-13 05:33:54,028 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:33:54,029 INFO L355 BasicCegarLoop]: trace histogram [30, 30, 29, 29, 29, 29, 29, 29, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:33:54,029 INFO L408 AbstractCegarLoop]: === Iteration 35 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:33:54,029 INFO L82 PathProgramCache]: Analyzing trace with hash 987805354, now seen corresponding path program 23 times [2018-04-13 05:33:54,029 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:33:54,029 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:33:54,029 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:33:54,029 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 05:33:54,029 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:33:54,043 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:33:54,044 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:33:54,305 INFO L134 CoverageAnalysis]: Checked inductivity of 3364 backedges. 0 proven. 1682 refuted. 0 times theorem prover too weak. 1682 trivial. 0 not checked. [2018-04-13 05:33:54,305 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:33:54,306 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:33:54,306 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-04-13 05:33:54,336 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 30 check-sat command(s) [2018-04-13 05:33:54,336 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 05:33:54,340 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:33:54,396 INFO L134 CoverageAnalysis]: Checked inductivity of 3364 backedges. 0 proven. 1682 refuted. 0 times theorem prover too weak. 1682 trivial. 0 not checked. [2018-04-13 05:33:54,396 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:33:54,396 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [34, 32] total 35 [2018-04-13 05:33:54,396 INFO L442 AbstractCegarLoop]: Interpolant automaton has 35 states [2018-04-13 05:33:54,396 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 35 interpolants. [2018-04-13 05:33:54,397 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=532, Invalid=658, Unknown=0, NotChecked=0, Total=1190 [2018-04-13 05:33:54,397 INFO L87 Difference]: Start difference. First operand 270 states and 271 transitions. Second operand 35 states. [2018-04-13 05:33:54,905 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:33:54,905 INFO L93 Difference]: Finished difference Result 282 states and 283 transitions. [2018-04-13 05:33:54,905 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2018-04-13 05:33:54,905 INFO L78 Accepts]: Start accepts. Automaton has 35 states. Word has length 259 [2018-04-13 05:33:54,906 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:33:54,906 INFO L225 Difference]: With dead ends: 282 [2018-04-13 05:33:54,907 INFO L226 Difference]: Without dead ends: 282 [2018-04-13 05:33:54,907 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 352 GetRequests, 289 SyntacticMatches, 0 SemanticMatches, 63 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 548 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=1523, Invalid=2637, Unknown=0, NotChecked=0, Total=4160 [2018-04-13 05:33:54,907 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 282 states. [2018-04-13 05:33:54,910 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 282 to 278. [2018-04-13 05:33:54,910 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 278 states. [2018-04-13 05:33:54,910 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 278 states to 278 states and 279 transitions. [2018-04-13 05:33:54,910 INFO L78 Accepts]: Start accepts. Automaton has 278 states and 279 transitions. Word has length 259 [2018-04-13 05:33:54,911 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:33:54,911 INFO L459 AbstractCegarLoop]: Abstraction has 278 states and 279 transitions. [2018-04-13 05:33:54,911 INFO L460 AbstractCegarLoop]: Interpolant automaton has 35 states. [2018-04-13 05:33:54,911 INFO L276 IsEmpty]: Start isEmpty. Operand 278 states and 279 transitions. [2018-04-13 05:33:54,912 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 268 [2018-04-13 05:33:54,912 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:33:54,912 INFO L355 BasicCegarLoop]: trace histogram [31, 31, 30, 30, 30, 30, 30, 30, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:33:54,912 INFO L408 AbstractCegarLoop]: === Iteration 36 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:33:54,913 INFO L82 PathProgramCache]: Analyzing trace with hash -235192950, now seen corresponding path program 24 times [2018-04-13 05:33:54,913 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:33:54,913 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:33:54,913 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:33:54,914 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 05:33:54,914 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:33:54,927 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:33:54,928 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:33:55,207 INFO L134 CoverageAnalysis]: Checked inductivity of 3600 backedges. 0 proven. 1800 refuted. 0 times theorem prover too weak. 1800 trivial. 0 not checked. [2018-04-13 05:33:55,208 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:33:55,208 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:33:55,208 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-04-13 05:33:55,252 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 31 check-sat command(s) [2018-04-13 05:33:55,252 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 05:33:55,267 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:33:55,743 INFO L134 CoverageAnalysis]: Checked inductivity of 3600 backedges. 0 proven. 1800 refuted. 0 times theorem prover too weak. 1800 trivial. 0 not checked. [2018-04-13 05:33:55,744 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:33:55,744 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [35, 34] total 66 [2018-04-13 05:33:55,744 INFO L442 AbstractCegarLoop]: Interpolant automaton has 66 states [2018-04-13 05:33:55,744 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 66 interpolants. [2018-04-13 05:33:55,744 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1585, Invalid=2705, Unknown=0, NotChecked=0, Total=4290 [2018-04-13 05:33:55,745 INFO L87 Difference]: Start difference. First operand 278 states and 279 transitions. Second operand 66 states. [2018-04-13 05:33:55,984 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:33:55,984 INFO L93 Difference]: Finished difference Result 290 states and 291 transitions. [2018-04-13 05:33:55,984 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2018-04-13 05:33:55,984 INFO L78 Accepts]: Start accepts. Automaton has 66 states. Word has length 267 [2018-04-13 05:33:55,985 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:33:55,986 INFO L225 Difference]: With dead ends: 290 [2018-04-13 05:33:55,986 INFO L226 Difference]: Without dead ends: 290 [2018-04-13 05:33:55,986 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 302 GetRequests, 236 SyntacticMatches, 1 SemanticMatches, 65 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1888 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=1650, Invalid=2772, Unknown=0, NotChecked=0, Total=4422 [2018-04-13 05:33:55,987 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 290 states. [2018-04-13 05:33:55,989 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 290 to 286. [2018-04-13 05:33:55,989 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 286 states. [2018-04-13 05:33:55,990 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 286 states to 286 states and 287 transitions. [2018-04-13 05:33:55,990 INFO L78 Accepts]: Start accepts. Automaton has 286 states and 287 transitions. Word has length 267 [2018-04-13 05:33:55,990 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:33:55,990 INFO L459 AbstractCegarLoop]: Abstraction has 286 states and 287 transitions. [2018-04-13 05:33:55,991 INFO L460 AbstractCegarLoop]: Interpolant automaton has 66 states. [2018-04-13 05:33:55,991 INFO L276 IsEmpty]: Start isEmpty. Operand 286 states and 287 transitions. [2018-04-13 05:33:55,992 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 276 [2018-04-13 05:33:55,992 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:33:55,992 INFO L355 BasicCegarLoop]: trace histogram [32, 32, 31, 31, 31, 31, 31, 31, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:33:55,992 INFO L408 AbstractCegarLoop]: === Iteration 37 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:33:55,992 INFO L82 PathProgramCache]: Analyzing trace with hash -1113502358, now seen corresponding path program 25 times [2018-04-13 05:33:55,992 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:33:55,993 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:33:55,993 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:33:55,993 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 05:33:55,993 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:33:56,016 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:33:56,017 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:33:56,401 INFO L134 CoverageAnalysis]: Checked inductivity of 3844 backedges. 0 proven. 1922 refuted. 0 times theorem prover too weak. 1922 trivial. 0 not checked. [2018-04-13 05:33:56,401 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:33:56,401 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:33:56,402 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 05:33:56,416 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:33:56,419 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:33:56,810 INFO L134 CoverageAnalysis]: Checked inductivity of 3844 backedges. 0 proven. 1922 refuted. 0 times theorem prover too weak. 1922 trivial. 0 not checked. [2018-04-13 05:33:56,811 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:33:56,811 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [36, 35] total 68 [2018-04-13 05:33:56,811 INFO L442 AbstractCegarLoop]: Interpolant automaton has 68 states [2018-04-13 05:33:56,812 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 68 interpolants. [2018-04-13 05:33:56,812 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1684, Invalid=2872, Unknown=0, NotChecked=0, Total=4556 [2018-04-13 05:33:56,812 INFO L87 Difference]: Start difference. First operand 286 states and 287 transitions. Second operand 68 states. [2018-04-13 05:33:57,064 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:33:57,065 INFO L93 Difference]: Finished difference Result 298 states and 299 transitions. [2018-04-13 05:33:57,065 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2018-04-13 05:33:57,065 INFO L78 Accepts]: Start accepts. Automaton has 68 states. Word has length 275 [2018-04-13 05:33:57,065 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:33:57,066 INFO L225 Difference]: With dead ends: 298 [2018-04-13 05:33:57,066 INFO L226 Difference]: Without dead ends: 298 [2018-04-13 05:33:57,066 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 311 GetRequests, 243 SyntacticMatches, 1 SemanticMatches, 67 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2013 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=1751, Invalid=2941, Unknown=0, NotChecked=0, Total=4692 [2018-04-13 05:33:57,066 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 298 states. [2018-04-13 05:33:57,068 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 298 to 294. [2018-04-13 05:33:57,068 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 294 states. [2018-04-13 05:33:57,069 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 294 states to 294 states and 295 transitions. [2018-04-13 05:33:57,069 INFO L78 Accepts]: Start accepts. Automaton has 294 states and 295 transitions. Word has length 275 [2018-04-13 05:33:57,069 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:33:57,069 INFO L459 AbstractCegarLoop]: Abstraction has 294 states and 295 transitions. [2018-04-13 05:33:57,069 INFO L460 AbstractCegarLoop]: Interpolant automaton has 68 states. [2018-04-13 05:33:57,069 INFO L276 IsEmpty]: Start isEmpty. Operand 294 states and 295 transitions. [2018-04-13 05:33:57,070 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 284 [2018-04-13 05:33:57,070 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:33:57,070 INFO L355 BasicCegarLoop]: trace histogram [33, 33, 32, 32, 32, 32, 32, 32, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:33:57,070 INFO L408 AbstractCegarLoop]: === Iteration 38 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:33:57,070 INFO L82 PathProgramCache]: Analyzing trace with hash -2116196790, now seen corresponding path program 26 times [2018-04-13 05:33:57,070 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:33:57,070 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:33:57,071 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:33:57,071 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 05:33:57,071 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:33:57,086 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:33:57,087 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:33:57,432 INFO L134 CoverageAnalysis]: Checked inductivity of 4096 backedges. 0 proven. 2048 refuted. 0 times theorem prover too weak. 2048 trivial. 0 not checked. [2018-04-13 05:33:57,433 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:33:57,433 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:33:57,433 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-04-13 05:33:57,453 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-04-13 05:33:57,453 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 05:33:57,458 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:33:57,515 INFO L134 CoverageAnalysis]: Checked inductivity of 4096 backedges. 0 proven. 2048 refuted. 0 times theorem prover too weak. 2048 trivial. 0 not checked. [2018-04-13 05:33:57,515 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:33:57,515 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [37, 35] total 38 [2018-04-13 05:33:57,516 INFO L442 AbstractCegarLoop]: Interpolant automaton has 38 states [2018-04-13 05:33:57,516 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2018-04-13 05:33:57,516 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=634, Invalid=772, Unknown=0, NotChecked=0, Total=1406 [2018-04-13 05:33:57,516 INFO L87 Difference]: Start difference. First operand 294 states and 295 transitions. Second operand 38 states. [2018-04-13 05:33:57,984 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:33:57,984 INFO L93 Difference]: Finished difference Result 306 states and 307 transitions. [2018-04-13 05:33:57,984 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 37 states. [2018-04-13 05:33:57,984 INFO L78 Accepts]: Start accepts. Automaton has 38 states. Word has length 283 [2018-04-13 05:33:57,985 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:33:57,985 INFO L225 Difference]: With dead ends: 306 [2018-04-13 05:33:57,985 INFO L226 Difference]: Without dead ends: 306 [2018-04-13 05:33:57,986 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 385 GetRequests, 316 SyntacticMatches, 0 SemanticMatches, 69 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 653 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=1823, Invalid=3147, Unknown=0, NotChecked=0, Total=4970 [2018-04-13 05:33:57,986 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 306 states. [2018-04-13 05:33:57,987 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 306 to 302. [2018-04-13 05:33:57,987 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 302 states. [2018-04-13 05:33:57,988 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 302 states to 302 states and 303 transitions. [2018-04-13 05:33:57,988 INFO L78 Accepts]: Start accepts. Automaton has 302 states and 303 transitions. Word has length 283 [2018-04-13 05:33:57,988 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:33:57,988 INFO L459 AbstractCegarLoop]: Abstraction has 302 states and 303 transitions. [2018-04-13 05:33:57,988 INFO L460 AbstractCegarLoop]: Interpolant automaton has 38 states. [2018-04-13 05:33:57,988 INFO L276 IsEmpty]: Start isEmpty. Operand 302 states and 303 transitions. [2018-04-13 05:33:57,989 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 292 [2018-04-13 05:33:57,989 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:33:57,989 INFO L355 BasicCegarLoop]: trace histogram [34, 34, 33, 33, 33, 33, 33, 33, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:33:57,989 INFO L408 AbstractCegarLoop]: === Iteration 39 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:33:57,989 INFO L82 PathProgramCache]: Analyzing trace with hash 846858282, now seen corresponding path program 27 times [2018-04-13 05:33:57,989 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:33:57,989 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:33:57,990 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:33:57,990 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 05:33:57,990 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:33:58,004 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:33:58,005 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:33:58,358 INFO L134 CoverageAnalysis]: Checked inductivity of 4356 backedges. 0 proven. 2178 refuted. 0 times theorem prover too weak. 2178 trivial. 0 not checked. [2018-04-13 05:33:58,358 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:33:58,358 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:33:58,359 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-04-13 05:33:58,402 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 34 check-sat command(s) [2018-04-13 05:33:58,402 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 05:33:58,411 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:33:58,447 INFO L134 CoverageAnalysis]: Checked inductivity of 4356 backedges. 0 proven. 2178 refuted. 0 times theorem prover too weak. 2178 trivial. 0 not checked. [2018-04-13 05:33:58,448 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:33:58,448 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [38, 36] total 39 [2018-04-13 05:33:58,448 INFO L442 AbstractCegarLoop]: Interpolant automaton has 39 states [2018-04-13 05:33:58,449 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 39 interpolants. [2018-04-13 05:33:58,449 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=670, Invalid=812, Unknown=0, NotChecked=0, Total=1482 [2018-04-13 05:33:58,449 INFO L87 Difference]: Start difference. First operand 302 states and 303 transitions. Second operand 39 states. [2018-04-13 05:33:59,031 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:33:59,031 INFO L93 Difference]: Finished difference Result 314 states and 315 transitions. [2018-04-13 05:33:59,031 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2018-04-13 05:33:59,031 INFO L78 Accepts]: Start accepts. Automaton has 39 states. Word has length 291 [2018-04-13 05:33:59,032 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:33:59,032 INFO L225 Difference]: With dead ends: 314 [2018-04-13 05:33:59,032 INFO L226 Difference]: Without dead ends: 314 [2018-04-13 05:33:59,033 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 396 GetRequests, 325 SyntacticMatches, 0 SemanticMatches, 71 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 690 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=1929, Invalid=3327, Unknown=0, NotChecked=0, Total=5256 [2018-04-13 05:33:59,033 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 314 states. [2018-04-13 05:33:59,035 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 314 to 310. [2018-04-13 05:33:59,035 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 310 states. [2018-04-13 05:33:59,035 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 310 states to 310 states and 311 transitions. [2018-04-13 05:33:59,035 INFO L78 Accepts]: Start accepts. Automaton has 310 states and 311 transitions. Word has length 291 [2018-04-13 05:33:59,035 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:33:59,035 INFO L459 AbstractCegarLoop]: Abstraction has 310 states and 311 transitions. [2018-04-13 05:33:59,035 INFO L460 AbstractCegarLoop]: Interpolant automaton has 39 states. [2018-04-13 05:33:59,035 INFO L276 IsEmpty]: Start isEmpty. Operand 310 states and 311 transitions. [2018-04-13 05:33:59,036 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 300 [2018-04-13 05:33:59,036 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:33:59,036 INFO L355 BasicCegarLoop]: trace histogram [35, 35, 34, 34, 34, 34, 34, 34, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:33:59,036 INFO L408 AbstractCegarLoop]: === Iteration 40 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:33:59,037 INFO L82 PathProgramCache]: Analyzing trace with hash -217992438, now seen corresponding path program 28 times [2018-04-13 05:33:59,037 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:33:59,037 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:33:59,037 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:33:59,037 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 05:33:59,037 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:33:59,052 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:33:59,053 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:33:59,415 INFO L134 CoverageAnalysis]: Checked inductivity of 4624 backedges. 0 proven. 2312 refuted. 0 times theorem prover too weak. 2312 trivial. 0 not checked. [2018-04-13 05:33:59,415 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:33:59,415 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:33:59,416 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-04-13 05:33:59,461 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-04-13 05:33:59,461 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 05:33:59,476 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:33:59,495 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-13 05:33:59,495 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 05:33:59,498 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:33:59,498 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:12, output treesize:11 [2018-04-13 05:34:01,608 INFO L134 CoverageAnalysis]: Checked inductivity of 4624 backedges. 2312 proven. 2312 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-13 05:34:01,608 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:34:01,608 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [39, 74] total 111 [2018-04-13 05:34:01,609 INFO L442 AbstractCegarLoop]: Interpolant automaton has 111 states [2018-04-13 05:34:01,609 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 111 interpolants. [2018-04-13 05:34:01,610 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2738, Invalid=9472, Unknown=0, NotChecked=0, Total=12210 [2018-04-13 05:34:01,610 INFO L87 Difference]: Start difference. First operand 310 states and 311 transitions. Second operand 111 states. [2018-04-13 05:34:03,171 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:34:03,172 INFO L93 Difference]: Finished difference Result 322 states and 323 transitions. [2018-04-13 05:34:03,172 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 42 states. [2018-04-13 05:34:03,172 INFO L78 Accepts]: Start accepts. Automaton has 111 states. Word has length 299 [2018-04-13 05:34:03,172 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:34:03,173 INFO L225 Difference]: With dead ends: 322 [2018-04-13 05:34:03,173 INFO L226 Difference]: Without dead ends: 322 [2018-04-13 05:34:03,174 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 376 GetRequests, 228 SyntacticMatches, 1 SemanticMatches, 147 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8781 ImplicationChecksByTransitivity, 2.8s TimeCoverageRelationStatistics Valid=4783, Invalid=17269, Unknown=0, NotChecked=0, Total=22052 [2018-04-13 05:34:03,174 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 322 states. [2018-04-13 05:34:03,175 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 322 to 318. [2018-04-13 05:34:03,176 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 318 states. [2018-04-13 05:34:03,176 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 318 states to 318 states and 319 transitions. [2018-04-13 05:34:03,176 INFO L78 Accepts]: Start accepts. Automaton has 318 states and 319 transitions. Word has length 299 [2018-04-13 05:34:03,176 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:34:03,176 INFO L459 AbstractCegarLoop]: Abstraction has 318 states and 319 transitions. [2018-04-13 05:34:03,176 INFO L460 AbstractCegarLoop]: Interpolant automaton has 111 states. [2018-04-13 05:34:03,176 INFO L276 IsEmpty]: Start isEmpty. Operand 318 states and 319 transitions. [2018-04-13 05:34:03,177 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 308 [2018-04-13 05:34:03,177 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:34:03,177 INFO L355 BasicCegarLoop]: trace histogram [36, 36, 35, 35, 35, 35, 35, 35, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:34:03,177 INFO L408 AbstractCegarLoop]: === Iteration 41 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:34:03,177 INFO L82 PathProgramCache]: Analyzing trace with hash 918480618, now seen corresponding path program 29 times [2018-04-13 05:34:03,177 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:34:03,177 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:34:03,178 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:34:03,178 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 05:34:03,178 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:34:03,193 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:34:03,194 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:34:03,588 INFO L134 CoverageAnalysis]: Checked inductivity of 4900 backedges. 0 proven. 2450 refuted. 0 times theorem prover too weak. 2450 trivial. 0 not checked. [2018-04-13 05:34:03,588 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:34:03,588 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:34:03,589 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-04-13 05:34:03,626 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 36 check-sat command(s) [2018-04-13 05:34:03,626 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 05:34:03,631 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:34:03,680 INFO L134 CoverageAnalysis]: Checked inductivity of 4900 backedges. 0 proven. 2450 refuted. 0 times theorem prover too weak. 2450 trivial. 0 not checked. [2018-04-13 05:34:03,680 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:34:03,680 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [40, 38] total 41 [2018-04-13 05:34:03,681 INFO L442 AbstractCegarLoop]: Interpolant automaton has 41 states [2018-04-13 05:34:03,681 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 41 interpolants. [2018-04-13 05:34:03,681 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=745, Invalid=895, Unknown=0, NotChecked=0, Total=1640 [2018-04-13 05:34:03,682 INFO L87 Difference]: Start difference. First operand 318 states and 319 transitions. Second operand 41 states. [2018-04-13 05:34:04,344 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:34:04,344 INFO L93 Difference]: Finished difference Result 330 states and 331 transitions. [2018-04-13 05:34:04,344 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 40 states. [2018-04-13 05:34:04,344 INFO L78 Accepts]: Start accepts. Automaton has 41 states. Word has length 307 [2018-04-13 05:34:04,344 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:34:04,345 INFO L225 Difference]: With dead ends: 330 [2018-04-13 05:34:04,345 INFO L226 Difference]: Without dead ends: 330 [2018-04-13 05:34:04,345 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 418 GetRequests, 343 SyntacticMatches, 0 SemanticMatches, 75 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 767 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=2150, Invalid=3702, Unknown=0, NotChecked=0, Total=5852 [2018-04-13 05:34:04,345 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 330 states. [2018-04-13 05:34:04,347 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 330 to 326. [2018-04-13 05:34:04,348 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 326 states. [2018-04-13 05:34:04,348 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 326 states to 326 states and 327 transitions. [2018-04-13 05:34:04,348 INFO L78 Accepts]: Start accepts. Automaton has 326 states and 327 transitions. Word has length 307 [2018-04-13 05:34:04,348 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:34:04,348 INFO L459 AbstractCegarLoop]: Abstraction has 326 states and 327 transitions. [2018-04-13 05:34:04,348 INFO L460 AbstractCegarLoop]: Interpolant automaton has 41 states. [2018-04-13 05:34:04,348 INFO L276 IsEmpty]: Start isEmpty. Operand 326 states and 327 transitions. [2018-04-13 05:34:04,349 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 316 [2018-04-13 05:34:04,349 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:34:04,349 INFO L355 BasicCegarLoop]: trace histogram [37, 37, 36, 36, 36, 36, 36, 36, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:34:04,349 INFO L408 AbstractCegarLoop]: === Iteration 42 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:34:04,349 INFO L82 PathProgramCache]: Analyzing trace with hash -524540982, now seen corresponding path program 30 times [2018-04-13 05:34:04,349 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:34:04,350 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:34:04,350 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:34:04,350 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 05:34:04,350 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:34:04,392 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:34:04,392 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:34:04,786 INFO L134 CoverageAnalysis]: Checked inductivity of 5184 backedges. 0 proven. 2592 refuted. 0 times theorem prover too weak. 2592 trivial. 0 not checked. [2018-04-13 05:34:04,787 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:34:04,787 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:34:04,787 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-04-13 05:34:04,830 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 37 check-sat command(s) [2018-04-13 05:34:04,830 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 05:34:04,843 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:34:05,373 INFO L134 CoverageAnalysis]: Checked inductivity of 5184 backedges. 0 proven. 2592 refuted. 0 times theorem prover too weak. 2592 trivial. 0 not checked. [2018-04-13 05:34:05,374 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:34:05,374 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [41, 40] total 78 [2018-04-13 05:34:05,374 INFO L442 AbstractCegarLoop]: Interpolant automaton has 78 states [2018-04-13 05:34:05,374 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 78 interpolants. [2018-04-13 05:34:05,375 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2224, Invalid=3782, Unknown=0, NotChecked=0, Total=6006 [2018-04-13 05:34:05,375 INFO L87 Difference]: Start difference. First operand 326 states and 327 transitions. Second operand 78 states. [2018-04-13 05:34:05,691 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:34:05,691 INFO L93 Difference]: Finished difference Result 338 states and 339 transitions. [2018-04-13 05:34:05,691 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 41 states. [2018-04-13 05:34:05,691 INFO L78 Accepts]: Start accepts. Automaton has 78 states. Word has length 315 [2018-04-13 05:34:05,691 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:34:05,692 INFO L225 Difference]: With dead ends: 338 [2018-04-13 05:34:05,692 INFO L226 Difference]: Without dead ends: 338 [2018-04-13 05:34:05,692 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 356 GetRequests, 278 SyntacticMatches, 1 SemanticMatches, 77 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2698 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=2301, Invalid=3861, Unknown=0, NotChecked=0, Total=6162 [2018-04-13 05:34:05,692 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 338 states. [2018-04-13 05:34:05,694 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 338 to 334. [2018-04-13 05:34:05,694 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 334 states. [2018-04-13 05:34:05,694 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 334 states to 334 states and 335 transitions. [2018-04-13 05:34:05,694 INFO L78 Accepts]: Start accepts. Automaton has 334 states and 335 transitions. Word has length 315 [2018-04-13 05:34:05,694 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:34:05,694 INFO L459 AbstractCegarLoop]: Abstraction has 334 states and 335 transitions. [2018-04-13 05:34:05,695 INFO L460 AbstractCegarLoop]: Interpolant automaton has 78 states. [2018-04-13 05:34:05,695 INFO L276 IsEmpty]: Start isEmpty. Operand 334 states and 335 transitions. [2018-04-13 05:34:05,695 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 324 [2018-04-13 05:34:05,695 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:34:05,696 INFO L355 BasicCegarLoop]: trace histogram [38, 38, 37, 37, 37, 37, 37, 37, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:34:05,696 INFO L408 AbstractCegarLoop]: === Iteration 43 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:34:05,696 INFO L82 PathProgramCache]: Analyzing trace with hash 1673783722, now seen corresponding path program 31 times [2018-04-13 05:34:05,696 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:34:05,696 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:34:05,696 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:34:05,696 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 05:34:05,696 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:34:05,713 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:34:05,714 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:34:06,150 INFO L134 CoverageAnalysis]: Checked inductivity of 5476 backedges. 0 proven. 2738 refuted. 0 times theorem prover too weak. 2738 trivial. 0 not checked. [2018-04-13 05:34:06,151 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:34:06,151 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:34:06,151 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 05:34:06,169 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:34:06,173 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:34:06,666 INFO L134 CoverageAnalysis]: Checked inductivity of 5476 backedges. 0 proven. 2738 refuted. 0 times theorem prover too weak. 2738 trivial. 0 not checked. [2018-04-13 05:34:06,667 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:34:06,667 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [42, 41] total 80 [2018-04-13 05:34:06,667 INFO L442 AbstractCegarLoop]: Interpolant automaton has 80 states [2018-04-13 05:34:06,667 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 80 interpolants. [2018-04-13 05:34:06,668 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2341, Invalid=3979, Unknown=0, NotChecked=0, Total=6320 [2018-04-13 05:34:06,668 INFO L87 Difference]: Start difference. First operand 334 states and 335 transitions. Second operand 80 states. [2018-04-13 05:34:07,036 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:34:07,036 INFO L93 Difference]: Finished difference Result 346 states and 347 transitions. [2018-04-13 05:34:07,036 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 42 states. [2018-04-13 05:34:07,036 INFO L78 Accepts]: Start accepts. Automaton has 80 states. Word has length 323 [2018-04-13 05:34:07,036 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:34:07,037 INFO L225 Difference]: With dead ends: 346 [2018-04-13 05:34:07,037 INFO L226 Difference]: Without dead ends: 346 [2018-04-13 05:34:07,037 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 365 GetRequests, 285 SyntacticMatches, 1 SemanticMatches, 79 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2847 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=2420, Invalid=4060, Unknown=0, NotChecked=0, Total=6480 [2018-04-13 05:34:07,038 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 346 states. [2018-04-13 05:34:07,039 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 346 to 342. [2018-04-13 05:34:07,039 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 342 states. [2018-04-13 05:34:07,040 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 342 states to 342 states and 343 transitions. [2018-04-13 05:34:07,040 INFO L78 Accepts]: Start accepts. Automaton has 342 states and 343 transitions. Word has length 323 [2018-04-13 05:34:07,040 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:34:07,040 INFO L459 AbstractCegarLoop]: Abstraction has 342 states and 343 transitions. [2018-04-13 05:34:07,040 INFO L460 AbstractCegarLoop]: Interpolant automaton has 80 states. [2018-04-13 05:34:07,040 INFO L276 IsEmpty]: Start isEmpty. Operand 342 states and 343 transitions. [2018-04-13 05:34:07,041 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 332 [2018-04-13 05:34:07,041 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:34:07,041 INFO L355 BasicCegarLoop]: trace histogram [39, 39, 38, 38, 38, 38, 38, 38, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:34:07,041 INFO L408 AbstractCegarLoop]: === Iteration 44 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:34:07,041 INFO L82 PathProgramCache]: Analyzing trace with hash -496977782, now seen corresponding path program 32 times [2018-04-13 05:34:07,041 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:34:07,041 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:34:07,042 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:34:07,042 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 05:34:07,042 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:34:07,061 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:34:07,062 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:34:07,493 INFO L134 CoverageAnalysis]: Checked inductivity of 5776 backedges. 0 proven. 2888 refuted. 0 times theorem prover too weak. 2888 trivial. 0 not checked. [2018-04-13 05:34:07,493 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:34:07,493 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:34:07,493 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-04-13 05:34:07,520 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-04-13 05:34:07,520 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 05:34:07,524 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:34:07,591 INFO L134 CoverageAnalysis]: Checked inductivity of 5776 backedges. 0 proven. 2888 refuted. 0 times theorem prover too weak. 2888 trivial. 0 not checked. [2018-04-13 05:34:07,591 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:34:07,591 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [43, 41] total 44 [2018-04-13 05:34:07,592 INFO L442 AbstractCegarLoop]: Interpolant automaton has 44 states [2018-04-13 05:34:07,592 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 44 interpolants. [2018-04-13 05:34:07,592 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=865, Invalid=1027, Unknown=0, NotChecked=0, Total=1892 [2018-04-13 05:34:07,592 INFO L87 Difference]: Start difference. First operand 342 states and 343 transitions. Second operand 44 states. [2018-04-13 05:34:08,260 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:34:08,260 INFO L93 Difference]: Finished difference Result 354 states and 355 transitions. [2018-04-13 05:34:08,260 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 43 states. [2018-04-13 05:34:08,260 INFO L78 Accepts]: Start accepts. Automaton has 44 states. Word has length 331 [2018-04-13 05:34:08,260 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:34:08,261 INFO L225 Difference]: With dead ends: 354 [2018-04-13 05:34:08,261 INFO L226 Difference]: Without dead ends: 354 [2018-04-13 05:34:08,261 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 451 GetRequests, 370 SyntacticMatches, 0 SemanticMatches, 81 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 890 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=2504, Invalid=4302, Unknown=0, NotChecked=0, Total=6806 [2018-04-13 05:34:08,261 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 354 states. [2018-04-13 05:34:08,263 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 354 to 350. [2018-04-13 05:34:08,263 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 350 states. [2018-04-13 05:34:08,263 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 350 states to 350 states and 351 transitions. [2018-04-13 05:34:08,263 INFO L78 Accepts]: Start accepts. Automaton has 350 states and 351 transitions. Word has length 331 [2018-04-13 05:34:08,264 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:34:08,264 INFO L459 AbstractCegarLoop]: Abstraction has 350 states and 351 transitions. [2018-04-13 05:34:08,264 INFO L460 AbstractCegarLoop]: Interpolant automaton has 44 states. [2018-04-13 05:34:08,264 INFO L276 IsEmpty]: Start isEmpty. Operand 350 states and 351 transitions. [2018-04-13 05:34:08,265 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 340 [2018-04-13 05:34:08,265 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:34:08,265 INFO L355 BasicCegarLoop]: trace histogram [40, 40, 39, 39, 39, 39, 39, 39, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:34:08,265 INFO L408 AbstractCegarLoop]: === Iteration 45 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:34:08,265 INFO L82 PathProgramCache]: Analyzing trace with hash 1323110506, now seen corresponding path program 33 times [2018-04-13 05:34:08,265 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:34:08,265 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:34:08,266 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:34:08,266 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 05:34:08,266 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:34:08,286 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:34:08,287 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:34:08,716 INFO L134 CoverageAnalysis]: Checked inductivity of 6084 backedges. 0 proven. 3042 refuted. 0 times theorem prover too weak. 3042 trivial. 0 not checked. [2018-04-13 05:34:08,716 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:34:08,716 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:34:08,716 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-04-13 05:34:08,761 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 40 check-sat command(s) [2018-04-13 05:34:08,761 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 05:34:08,771 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:34:09,339 INFO L134 CoverageAnalysis]: Checked inductivity of 6084 backedges. 0 proven. 3042 refuted. 0 times theorem prover too weak. 3042 trivial. 0 not checked. [2018-04-13 05:34:09,339 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:34:09,339 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [44, 43] total 84 [2018-04-13 05:34:09,340 INFO L442 AbstractCegarLoop]: Interpolant automaton has 84 states [2018-04-13 05:34:09,340 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 84 interpolants. [2018-04-13 05:34:09,341 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2584, Invalid=4388, Unknown=0, NotChecked=0, Total=6972 [2018-04-13 05:34:09,341 INFO L87 Difference]: Start difference. First operand 350 states and 351 transitions. Second operand 84 states. [2018-04-13 05:34:09,719 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:34:09,719 INFO L93 Difference]: Finished difference Result 362 states and 363 transitions. [2018-04-13 05:34:09,719 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 44 states. [2018-04-13 05:34:09,720 INFO L78 Accepts]: Start accepts. Automaton has 84 states. Word has length 339 [2018-04-13 05:34:09,720 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:34:09,720 INFO L225 Difference]: With dead ends: 362 [2018-04-13 05:34:09,720 INFO L226 Difference]: Without dead ends: 362 [2018-04-13 05:34:09,721 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 383 GetRequests, 299 SyntacticMatches, 1 SemanticMatches, 83 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3157 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=2667, Invalid=4473, Unknown=0, NotChecked=0, Total=7140 [2018-04-13 05:34:09,721 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 362 states. [2018-04-13 05:34:09,722 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 362 to 358. [2018-04-13 05:34:09,723 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 358 states. [2018-04-13 05:34:09,723 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 358 states to 358 states and 359 transitions. [2018-04-13 05:34:09,723 INFO L78 Accepts]: Start accepts. Automaton has 358 states and 359 transitions. Word has length 339 [2018-04-13 05:34:09,723 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:34:09,723 INFO L459 AbstractCegarLoop]: Abstraction has 358 states and 359 transitions. [2018-04-13 05:34:09,723 INFO L460 AbstractCegarLoop]: Interpolant automaton has 84 states. [2018-04-13 05:34:09,723 INFO L276 IsEmpty]: Start isEmpty. Operand 358 states and 359 transitions. [2018-04-13 05:34:09,724 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 348 [2018-04-13 05:34:09,725 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:34:09,725 INFO L355 BasicCegarLoop]: trace histogram [41, 41, 40, 40, 40, 40, 40, 40, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:34:09,725 INFO L408 AbstractCegarLoop]: === Iteration 46 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:34:09,725 INFO L82 PathProgramCache]: Analyzing trace with hash -1958514358, now seen corresponding path program 34 times [2018-04-13 05:34:09,725 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:34:09,725 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:34:09,726 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:34:09,726 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 05:34:09,726 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:34:09,757 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:34:09,758 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:34:10,257 INFO L134 CoverageAnalysis]: Checked inductivity of 6400 backedges. 0 proven. 3200 refuted. 0 times theorem prover too weak. 3200 trivial. 0 not checked. [2018-04-13 05:34:10,257 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:34:10,257 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:34:10,257 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-04-13 05:34:10,312 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-04-13 05:34:10,312 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 05:34:10,333 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:34:10,335 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-13 05:34:10,335 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 05:34:10,342 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:34:10,343 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:12, output treesize:11 [2018-04-13 05:34:12,851 INFO L134 CoverageAnalysis]: Checked inductivity of 6400 backedges. 3200 proven. 3200 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-13 05:34:12,851 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:34:12,851 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [45, 86] total 129 [2018-04-13 05:34:12,852 INFO L442 AbstractCegarLoop]: Interpolant automaton has 129 states [2018-04-13 05:34:12,853 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 129 interpolants. [2018-04-13 05:34:12,853 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3698, Invalid=12814, Unknown=0, NotChecked=0, Total=16512 [2018-04-13 05:34:12,853 INFO L87 Difference]: Start difference. First operand 358 states and 359 transitions. Second operand 129 states. [2018-04-13 05:34:14,235 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:34:14,236 INFO L93 Difference]: Finished difference Result 370 states and 371 transitions. [2018-04-13 05:34:14,236 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 48 states. [2018-04-13 05:34:14,236 INFO L78 Accepts]: Start accepts. Automaton has 129 states. Word has length 347 [2018-04-13 05:34:14,236 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:34:14,237 INFO L225 Difference]: With dead ends: 370 [2018-04-13 05:34:14,237 INFO L226 Difference]: Without dead ends: 370 [2018-04-13 05:34:14,238 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 436 GetRequests, 264 SyntacticMatches, 1 SemanticMatches, 171 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12009 ImplicationChecksByTransitivity, 3.3s TimeCoverageRelationStatistics Valid=6460, Invalid=23296, Unknown=0, NotChecked=0, Total=29756 [2018-04-13 05:34:14,238 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 370 states. [2018-04-13 05:34:14,240 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 370 to 366. [2018-04-13 05:34:14,240 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 366 states. [2018-04-13 05:34:14,241 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 366 states to 366 states and 367 transitions. [2018-04-13 05:34:14,241 INFO L78 Accepts]: Start accepts. Automaton has 366 states and 367 transitions. Word has length 347 [2018-04-13 05:34:14,241 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:34:14,241 INFO L459 AbstractCegarLoop]: Abstraction has 366 states and 367 transitions. [2018-04-13 05:34:14,241 INFO L460 AbstractCegarLoop]: Interpolant automaton has 129 states. [2018-04-13 05:34:14,241 INFO L276 IsEmpty]: Start isEmpty. Operand 366 states and 367 transitions. [2018-04-13 05:34:14,243 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 356 [2018-04-13 05:34:14,243 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:34:14,243 INFO L355 BasicCegarLoop]: trace histogram [42, 42, 41, 41, 41, 41, 41, 41, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:34:14,243 INFO L408 AbstractCegarLoop]: === Iteration 47 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:34:14,244 INFO L82 PathProgramCache]: Analyzing trace with hash -1990304982, now seen corresponding path program 35 times [2018-04-13 05:34:14,244 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:34:14,244 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:34:14,244 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:34:14,244 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 05:34:14,244 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:34:14,276 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:34:14,278 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:34:14,825 INFO L134 CoverageAnalysis]: Checked inductivity of 6724 backedges. 0 proven. 3362 refuted. 0 times theorem prover too weak. 3362 trivial. 0 not checked. [2018-04-13 05:34:14,825 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:34:14,825 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:34:14,825 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-04-13 05:34:14,873 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 42 check-sat command(s) [2018-04-13 05:34:14,873 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 05:34:14,879 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:34:14,925 INFO L134 CoverageAnalysis]: Checked inductivity of 6724 backedges. 0 proven. 3362 refuted. 0 times theorem prover too weak. 3362 trivial. 0 not checked. [2018-04-13 05:34:14,925 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:34:14,925 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [46, 44] total 47 [2018-04-13 05:34:14,926 INFO L442 AbstractCegarLoop]: Interpolant automaton has 47 states [2018-04-13 05:34:14,926 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 47 interpolants. [2018-04-13 05:34:14,926 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=994, Invalid=1168, Unknown=0, NotChecked=0, Total=2162 [2018-04-13 05:34:14,926 INFO L87 Difference]: Start difference. First operand 366 states and 367 transitions. Second operand 47 states. [2018-04-13 05:34:15,682 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:34:15,682 INFO L93 Difference]: Finished difference Result 378 states and 379 transitions. [2018-04-13 05:34:15,682 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 46 states. [2018-04-13 05:34:15,682 INFO L78 Accepts]: Start accepts. Automaton has 47 states. Word has length 355 [2018-04-13 05:34:15,682 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:34:15,683 INFO L225 Difference]: With dead ends: 378 [2018-04-13 05:34:15,683 INFO L226 Difference]: Without dead ends: 378 [2018-04-13 05:34:15,683 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 484 GetRequests, 397 SyntacticMatches, 0 SemanticMatches, 87 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1022 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=2885, Invalid=4947, Unknown=0, NotChecked=0, Total=7832 [2018-04-13 05:34:15,684 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 378 states. [2018-04-13 05:34:15,685 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 378 to 374. [2018-04-13 05:34:15,685 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 374 states. [2018-04-13 05:34:15,686 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 374 states to 374 states and 375 transitions. [2018-04-13 05:34:15,686 INFO L78 Accepts]: Start accepts. Automaton has 374 states and 375 transitions. Word has length 355 [2018-04-13 05:34:15,686 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:34:15,686 INFO L459 AbstractCegarLoop]: Abstraction has 374 states and 375 transitions. [2018-04-13 05:34:15,686 INFO L460 AbstractCegarLoop]: Interpolant automaton has 47 states. [2018-04-13 05:34:15,686 INFO L276 IsEmpty]: Start isEmpty. Operand 374 states and 375 transitions. [2018-04-13 05:34:15,687 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 364 [2018-04-13 05:34:15,687 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:34:15,687 INFO L355 BasicCegarLoop]: trace histogram [43, 43, 42, 42, 42, 42, 42, 42, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:34:15,687 INFO L408 AbstractCegarLoop]: === Iteration 48 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:34:15,688 INFO L82 PathProgramCache]: Analyzing trace with hash 1790463498, now seen corresponding path program 36 times [2018-04-13 05:34:15,688 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:34:15,688 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:34:15,688 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:34:15,688 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 05:34:15,688 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:34:15,720 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:34:15,722 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:34:16,289 INFO L134 CoverageAnalysis]: Checked inductivity of 7056 backedges. 0 proven. 3528 refuted. 0 times theorem prover too weak. 3528 trivial. 0 not checked. [2018-04-13 05:34:16,289 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:34:16,290 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:34:16,290 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-04-13 05:34:16,350 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 43 check-sat command(s) [2018-04-13 05:34:16,350 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 05:34:16,368 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:34:16,432 INFO L134 CoverageAnalysis]: Checked inductivity of 7056 backedges. 0 proven. 3528 refuted. 0 times theorem prover too weak. 3528 trivial. 0 not checked. [2018-04-13 05:34:16,432 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:34:16,433 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [47, 46] total 49 [2018-04-13 05:34:16,433 INFO L442 AbstractCegarLoop]: Interpolant automaton has 49 states [2018-04-13 05:34:16,433 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 49 interpolants. [2018-04-13 05:34:16,433 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1041, Invalid=1311, Unknown=0, NotChecked=0, Total=2352 [2018-04-13 05:34:16,433 INFO L87 Difference]: Start difference. First operand 374 states and 375 transitions. Second operand 49 states. [2018-04-13 05:34:17,185 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:34:17,185 INFO L93 Difference]: Finished difference Result 386 states and 387 transitions. [2018-04-13 05:34:17,185 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 48 states. [2018-04-13 05:34:17,185 INFO L78 Accepts]: Start accepts. Automaton has 49 states. Word has length 363 [2018-04-13 05:34:17,185 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:34:17,186 INFO L225 Difference]: With dead ends: 386 [2018-04-13 05:34:17,186 INFO L226 Difference]: Without dead ends: 386 [2018-04-13 05:34:17,187 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 497 GetRequests, 406 SyntacticMatches, 0 SemanticMatches, 91 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1154 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=3024, Invalid=5532, Unknown=0, NotChecked=0, Total=8556 [2018-04-13 05:34:17,187 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 386 states. [2018-04-13 05:34:17,188 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 386 to 382. [2018-04-13 05:34:17,189 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 382 states. [2018-04-13 05:34:17,189 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 382 states to 382 states and 383 transitions. [2018-04-13 05:34:17,189 INFO L78 Accepts]: Start accepts. Automaton has 382 states and 383 transitions. Word has length 363 [2018-04-13 05:34:17,189 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:34:17,189 INFO L459 AbstractCegarLoop]: Abstraction has 382 states and 383 transitions. [2018-04-13 05:34:17,189 INFO L460 AbstractCegarLoop]: Interpolant automaton has 49 states. [2018-04-13 05:34:17,189 INFO L276 IsEmpty]: Start isEmpty. Operand 382 states and 383 transitions. [2018-04-13 05:34:17,190 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 372 [2018-04-13 05:34:17,190 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:34:17,190 INFO L355 BasicCegarLoop]: trace histogram [44, 44, 43, 43, 43, 43, 43, 43, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:34:17,191 INFO L408 AbstractCegarLoop]: === Iteration 49 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:34:17,191 INFO L82 PathProgramCache]: Analyzing trace with hash -1600402966, now seen corresponding path program 37 times [2018-04-13 05:34:17,191 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:34:17,191 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:34:17,191 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:34:17,191 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 05:34:17,191 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:34:17,211 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:34:17,212 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:34:17,775 INFO L134 CoverageAnalysis]: Checked inductivity of 7396 backedges. 0 proven. 3698 refuted. 0 times theorem prover too weak. 3698 trivial. 0 not checked. [2018-04-13 05:34:17,775 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:34:17,775 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:34:17,775 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 05:34:17,794 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:34:17,799 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:34:18,442 INFO L134 CoverageAnalysis]: Checked inductivity of 7396 backedges. 0 proven. 3698 refuted. 0 times theorem prover too weak. 3698 trivial. 0 not checked. [2018-04-13 05:34:18,442 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:34:18,442 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [48, 47] total 92 [2018-04-13 05:34:18,442 INFO L442 AbstractCegarLoop]: Interpolant automaton has 92 states [2018-04-13 05:34:18,443 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 92 interpolants. [2018-04-13 05:34:18,443 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3106, Invalid=5266, Unknown=0, NotChecked=0, Total=8372 [2018-04-13 05:34:18,444 INFO L87 Difference]: Start difference. First operand 382 states and 383 transitions. Second operand 92 states. [2018-04-13 05:34:18,873 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:34:18,873 INFO L93 Difference]: Finished difference Result 394 states and 395 transitions. [2018-04-13 05:34:18,873 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 48 states. [2018-04-13 05:34:18,873 INFO L78 Accepts]: Start accepts. Automaton has 92 states. Word has length 371 [2018-04-13 05:34:18,873 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:34:18,874 INFO L225 Difference]: With dead ends: 394 [2018-04-13 05:34:18,874 INFO L226 Difference]: Without dead ends: 394 [2018-04-13 05:34:18,875 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 419 GetRequests, 327 SyntacticMatches, 1 SemanticMatches, 91 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3825 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=3197, Invalid=5359, Unknown=0, NotChecked=0, Total=8556 [2018-04-13 05:34:18,875 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 394 states. [2018-04-13 05:34:18,876 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 394 to 390. [2018-04-13 05:34:18,876 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 390 states. [2018-04-13 05:34:18,877 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 390 states to 390 states and 391 transitions. [2018-04-13 05:34:18,877 INFO L78 Accepts]: Start accepts. Automaton has 390 states and 391 transitions. Word has length 371 [2018-04-13 05:34:18,877 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:34:18,877 INFO L459 AbstractCegarLoop]: Abstraction has 390 states and 391 transitions. [2018-04-13 05:34:18,877 INFO L460 AbstractCegarLoop]: Interpolant automaton has 92 states. [2018-04-13 05:34:18,877 INFO L276 IsEmpty]: Start isEmpty. Operand 390 states and 391 transitions. [2018-04-13 05:34:18,879 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 380 [2018-04-13 05:34:18,879 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:34:18,879 INFO L355 BasicCegarLoop]: trace histogram [45, 45, 44, 44, 44, 44, 44, 44, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:34:18,879 INFO L408 AbstractCegarLoop]: === Iteration 50 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:34:18,879 INFO L82 PathProgramCache]: Analyzing trace with hash 202591946, now seen corresponding path program 38 times [2018-04-13 05:34:18,879 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:34:18,879 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:34:18,879 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:34:18,879 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 05:34:18,879 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:34:18,900 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:34:18,901 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:34:19,456 INFO L134 CoverageAnalysis]: Checked inductivity of 7744 backedges. 0 proven. 3872 refuted. 0 times theorem prover too weak. 3872 trivial. 0 not checked. [2018-04-13 05:34:19,456 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:34:19,456 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:34:19,456 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-04-13 05:34:19,485 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-04-13 05:34:19,485 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 05:34:19,491 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:34:19,543 INFO L134 CoverageAnalysis]: Checked inductivity of 7744 backedges. 0 proven. 3872 refuted. 0 times theorem prover too weak. 3872 trivial. 0 not checked. [2018-04-13 05:34:19,543 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:34:19,543 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [49, 47] total 50 [2018-04-13 05:34:19,544 INFO L442 AbstractCegarLoop]: Interpolant automaton has 50 states [2018-04-13 05:34:19,544 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 50 interpolants. [2018-04-13 05:34:19,544 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1132, Invalid=1318, Unknown=0, NotChecked=0, Total=2450 [2018-04-13 05:34:19,544 INFO L87 Difference]: Start difference. First operand 390 states and 391 transitions. Second operand 50 states. [2018-04-13 05:34:20,330 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:34:20,331 INFO L93 Difference]: Finished difference Result 402 states and 403 transitions. [2018-04-13 05:34:20,331 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 49 states. [2018-04-13 05:34:20,331 INFO L78 Accepts]: Start accepts. Automaton has 50 states. Word has length 379 [2018-04-13 05:34:20,331 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:34:20,332 INFO L225 Difference]: With dead ends: 402 [2018-04-13 05:34:20,332 INFO L226 Difference]: Without dead ends: 402 [2018-04-13 05:34:20,332 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 517 GetRequests, 424 SyntacticMatches, 0 SemanticMatches, 93 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1163 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=3293, Invalid=5637, Unknown=0, NotChecked=0, Total=8930 [2018-04-13 05:34:20,332 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 402 states. [2018-04-13 05:34:20,334 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 402 to 398. [2018-04-13 05:34:20,334 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 398 states. [2018-04-13 05:34:20,334 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 398 states to 398 states and 399 transitions. [2018-04-13 05:34:20,334 INFO L78 Accepts]: Start accepts. Automaton has 398 states and 399 transitions. Word has length 379 [2018-04-13 05:34:20,334 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:34:20,334 INFO L459 AbstractCegarLoop]: Abstraction has 398 states and 399 transitions. [2018-04-13 05:34:20,335 INFO L460 AbstractCegarLoop]: Interpolant automaton has 50 states. [2018-04-13 05:34:20,335 INFO L276 IsEmpty]: Start isEmpty. Operand 398 states and 399 transitions. [2018-04-13 05:34:20,336 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 388 [2018-04-13 05:34:20,336 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:34:20,336 INFO L355 BasicCegarLoop]: trace histogram [46, 46, 45, 45, 45, 45, 45, 45, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:34:20,336 INFO L408 AbstractCegarLoop]: === Iteration 51 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:34:20,336 INFO L82 PathProgramCache]: Analyzing trace with hash 501832874, now seen corresponding path program 39 times [2018-04-13 05:34:20,336 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:34:20,336 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:34:20,336 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:34:20,336 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 05:34:20,337 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:34:20,362 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:34:20,363 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:34:20,939 INFO L134 CoverageAnalysis]: Checked inductivity of 8100 backedges. 0 proven. 4050 refuted. 0 times theorem prover too weak. 4050 trivial. 0 not checked. [2018-04-13 05:34:20,940 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:34:20,940 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:34:20,940 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-04-13 05:34:21,011 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 46 check-sat command(s) [2018-04-13 05:34:21,011 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 05:34:21,028 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:34:21,083 INFO L134 CoverageAnalysis]: Checked inductivity of 8100 backedges. 0 proven. 4050 refuted. 0 times theorem prover too weak. 4050 trivial. 0 not checked. [2018-04-13 05:34:21,084 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:34:21,084 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [50, 48] total 51 [2018-04-13 05:34:21,084 INFO L442 AbstractCegarLoop]: Interpolant automaton has 51 states [2018-04-13 05:34:21,085 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 51 interpolants. [2018-04-13 05:34:21,085 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1180, Invalid=1370, Unknown=0, NotChecked=0, Total=2550 [2018-04-13 05:34:21,085 INFO L87 Difference]: Start difference. First operand 398 states and 399 transitions. Second operand 51 states. [2018-04-13 05:34:21,871 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:34:21,871 INFO L93 Difference]: Finished difference Result 410 states and 411 transitions. [2018-04-13 05:34:21,871 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 50 states. [2018-04-13 05:34:21,871 INFO L78 Accepts]: Start accepts. Automaton has 51 states. Word has length 387 [2018-04-13 05:34:21,871 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:34:21,872 INFO L225 Difference]: With dead ends: 410 [2018-04-13 05:34:21,872 INFO L226 Difference]: Without dead ends: 410 [2018-04-13 05:34:21,873 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 528 GetRequests, 433 SyntacticMatches, 0 SemanticMatches, 95 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1212 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=3435, Invalid=5877, Unknown=0, NotChecked=0, Total=9312 [2018-04-13 05:34:21,873 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 410 states. [2018-04-13 05:34:21,875 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 410 to 406. [2018-04-13 05:34:21,875 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 406 states. [2018-04-13 05:34:21,876 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 406 states to 406 states and 407 transitions. [2018-04-13 05:34:21,876 INFO L78 Accepts]: Start accepts. Automaton has 406 states and 407 transitions. Word has length 387 [2018-04-13 05:34:21,876 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:34:21,876 INFO L459 AbstractCegarLoop]: Abstraction has 406 states and 407 transitions. [2018-04-13 05:34:21,877 INFO L460 AbstractCegarLoop]: Interpolant automaton has 51 states. [2018-04-13 05:34:21,877 INFO L276 IsEmpty]: Start isEmpty. Operand 406 states and 407 transitions. [2018-04-13 05:34:21,878 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 396 [2018-04-13 05:34:21,878 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:34:21,878 INFO L355 BasicCegarLoop]: trace histogram [47, 47, 46, 46, 46, 46, 46, 46, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:34:21,878 INFO L408 AbstractCegarLoop]: === Iteration 52 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:34:21,878 INFO L82 PathProgramCache]: Analyzing trace with hash -156732534, now seen corresponding path program 40 times [2018-04-13 05:34:21,878 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:34:21,878 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:34:21,879 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:34:21,879 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 05:34:21,879 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:34:21,903 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:34:21,904 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:34:22,523 INFO L134 CoverageAnalysis]: Checked inductivity of 8464 backedges. 0 proven. 4232 refuted. 0 times theorem prover too weak. 4232 trivial. 0 not checked. [2018-04-13 05:34:22,523 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:34:22,523 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:34:22,523 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-04-13 05:34:22,600 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-04-13 05:34:22,600 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 05:34:22,627 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:34:22,629 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-13 05:34:22,629 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 05:34:22,631 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:34:22,632 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:12, output treesize:11 [2018-04-13 05:34:25,708 INFO L134 CoverageAnalysis]: Checked inductivity of 8464 backedges. 4232 proven. 4232 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-13 05:34:25,709 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:34:25,709 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [51, 98] total 147 [2018-04-13 05:34:25,709 INFO L442 AbstractCegarLoop]: Interpolant automaton has 147 states [2018-04-13 05:34:25,710 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 147 interpolants. [2018-04-13 05:34:25,710 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=4802, Invalid=16660, Unknown=0, NotChecked=0, Total=21462 [2018-04-13 05:34:25,710 INFO L87 Difference]: Start difference. First operand 406 states and 407 transitions. Second operand 147 states. [2018-04-13 05:34:27,473 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:34:27,473 INFO L93 Difference]: Finished difference Result 418 states and 419 transitions. [2018-04-13 05:34:27,473 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 54 states. [2018-04-13 05:34:27,473 INFO L78 Accepts]: Start accepts. Automaton has 147 states. Word has length 395 [2018-04-13 05:34:27,474 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:34:27,474 INFO L225 Difference]: With dead ends: 418 [2018-04-13 05:34:27,474 INFO L226 Difference]: Without dead ends: 418 [2018-04-13 05:34:27,476 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 496 GetRequests, 300 SyntacticMatches, 1 SemanticMatches, 195 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15741 ImplicationChecksByTransitivity, 4.2s TimeCoverageRelationStatistics Valid=8389, Invalid=30223, Unknown=0, NotChecked=0, Total=38612 [2018-04-13 05:34:27,476 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 418 states. [2018-04-13 05:34:27,477 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 418 to 414. [2018-04-13 05:34:27,477 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 414 states. [2018-04-13 05:34:27,478 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 414 states to 414 states and 415 transitions. [2018-04-13 05:34:27,478 INFO L78 Accepts]: Start accepts. Automaton has 414 states and 415 transitions. Word has length 395 [2018-04-13 05:34:27,478 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:34:27,478 INFO L459 AbstractCegarLoop]: Abstraction has 414 states and 415 transitions. [2018-04-13 05:34:27,478 INFO L460 AbstractCegarLoop]: Interpolant automaton has 147 states. [2018-04-13 05:34:27,478 INFO L276 IsEmpty]: Start isEmpty. Operand 414 states and 415 transitions. [2018-04-13 05:34:27,479 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 404 [2018-04-13 05:34:27,479 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:34:27,479 INFO L355 BasicCegarLoop]: trace histogram [48, 48, 47, 47, 47, 47, 47, 47, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:34:27,479 INFO L408 AbstractCegarLoop]: === Iteration 53 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:34:27,480 INFO L82 PathProgramCache]: Analyzing trace with hash -2036657302, now seen corresponding path program 41 times [2018-04-13 05:34:27,480 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:34:27,480 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:34:27,480 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:34:27,480 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 05:34:27,480 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:34:27,503 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:34:27,504 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:34:28,104 INFO L134 CoverageAnalysis]: Checked inductivity of 8836 backedges. 0 proven. 4418 refuted. 0 times theorem prover too weak. 4418 trivial. 0 not checked. [2018-04-13 05:34:28,104 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:34:28,104 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:34:28,104 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-04-13 05:34:28,166 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 48 check-sat command(s) [2018-04-13 05:34:28,167 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 05:34:28,174 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:34:28,331 INFO L134 CoverageAnalysis]: Checked inductivity of 8836 backedges. 0 proven. 4418 refuted. 0 times theorem prover too weak. 4418 trivial. 0 not checked. [2018-04-13 05:34:28,332 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:34:28,332 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [52, 50] total 53 [2018-04-13 05:34:28,332 INFO L442 AbstractCegarLoop]: Interpolant automaton has 53 states [2018-04-13 05:34:28,333 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 53 interpolants. [2018-04-13 05:34:28,333 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1279, Invalid=1477, Unknown=0, NotChecked=0, Total=2756 [2018-04-13 05:34:28,333 INFO L87 Difference]: Start difference. First operand 414 states and 415 transitions. Second operand 53 states. [2018-04-13 05:34:29,190 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:34:29,191 INFO L93 Difference]: Finished difference Result 426 states and 427 transitions. [2018-04-13 05:34:29,191 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 52 states. [2018-04-13 05:34:29,191 INFO L78 Accepts]: Start accepts. Automaton has 53 states. Word has length 403 [2018-04-13 05:34:29,191 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:34:29,192 INFO L225 Difference]: With dead ends: 426 [2018-04-13 05:34:29,192 INFO L226 Difference]: Without dead ends: 426 [2018-04-13 05:34:29,192 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 550 GetRequests, 451 SyntacticMatches, 0 SemanticMatches, 99 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1313 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=3728, Invalid=6372, Unknown=0, NotChecked=0, Total=10100 [2018-04-13 05:34:29,192 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 426 states. [2018-04-13 05:34:29,195 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 426 to 422. [2018-04-13 05:34:29,195 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 422 states. [2018-04-13 05:34:29,196 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 422 states to 422 states and 423 transitions. [2018-04-13 05:34:29,196 INFO L78 Accepts]: Start accepts. Automaton has 422 states and 423 transitions. Word has length 403 [2018-04-13 05:34:29,196 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:34:29,196 INFO L459 AbstractCegarLoop]: Abstraction has 422 states and 423 transitions. [2018-04-13 05:34:29,196 INFO L460 AbstractCegarLoop]: Interpolant automaton has 53 states. [2018-04-13 05:34:29,196 INFO L276 IsEmpty]: Start isEmpty. Operand 422 states and 423 transitions. [2018-04-13 05:34:29,198 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 412 [2018-04-13 05:34:29,198 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:34:29,198 INFO L355 BasicCegarLoop]: trace histogram [49, 49, 48, 48, 48, 48, 48, 48, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:34:29,198 INFO L408 AbstractCegarLoop]: === Iteration 54 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:34:29,198 INFO L82 PathProgramCache]: Analyzing trace with hash -1379156918, now seen corresponding path program 42 times [2018-04-13 05:34:29,198 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:34:29,199 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:34:29,199 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:34:29,199 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 05:34:29,199 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:34:29,236 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:34:29,237 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:34:29,875 INFO L134 CoverageAnalysis]: Checked inductivity of 9216 backedges. 0 proven. 4608 refuted. 0 times theorem prover too weak. 4608 trivial. 0 not checked. [2018-04-13 05:34:29,876 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:34:29,876 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:34:29,877 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-04-13 05:34:29,980 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 49 check-sat command(s) [2018-04-13 05:34:29,980 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 05:34:29,996 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:34:30,077 INFO L134 CoverageAnalysis]: Checked inductivity of 9216 backedges. 0 proven. 4608 refuted. 0 times theorem prover too weak. 4608 trivial. 0 not checked. [2018-04-13 05:34:30,077 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:34:30,077 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [53, 51] total 54 [2018-04-13 05:34:30,078 INFO L442 AbstractCegarLoop]: Interpolant automaton has 54 states [2018-04-13 05:34:30,078 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 54 interpolants. [2018-04-13 05:34:30,078 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1330, Invalid=1532, Unknown=0, NotChecked=0, Total=2862 [2018-04-13 05:34:30,078 INFO L87 Difference]: Start difference. First operand 422 states and 423 transitions. Second operand 54 states. [2018-04-13 05:34:31,037 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:34:31,037 INFO L93 Difference]: Finished difference Result 434 states and 435 transitions. [2018-04-13 05:34:31,037 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 53 states. [2018-04-13 05:34:31,037 INFO L78 Accepts]: Start accepts. Automaton has 54 states. Word has length 411 [2018-04-13 05:34:31,037 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:34:31,038 INFO L225 Difference]: With dead ends: 434 [2018-04-13 05:34:31,038 INFO L226 Difference]: Without dead ends: 434 [2018-04-13 05:34:31,038 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 561 GetRequests, 460 SyntacticMatches, 0 SemanticMatches, 101 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1365 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=3879, Invalid=6627, Unknown=0, NotChecked=0, Total=10506 [2018-04-13 05:34:31,039 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 434 states. [2018-04-13 05:34:31,040 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 434 to 430. [2018-04-13 05:34:31,040 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 430 states. [2018-04-13 05:34:31,041 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 430 states to 430 states and 431 transitions. [2018-04-13 05:34:31,041 INFO L78 Accepts]: Start accepts. Automaton has 430 states and 431 transitions. Word has length 411 [2018-04-13 05:34:31,041 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:34:31,041 INFO L459 AbstractCegarLoop]: Abstraction has 430 states and 431 transitions. [2018-04-13 05:34:31,041 INFO L460 AbstractCegarLoop]: Interpolant automaton has 54 states. [2018-04-13 05:34:31,041 INFO L276 IsEmpty]: Start isEmpty. Operand 430 states and 431 transitions. [2018-04-13 05:34:31,042 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 420 [2018-04-13 05:34:31,042 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:34:31,042 INFO L355 BasicCegarLoop]: trace histogram [50, 50, 49, 49, 49, 49, 49, 49, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:34:31,042 INFO L408 AbstractCegarLoop]: === Iteration 55 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:34:31,042 INFO L82 PathProgramCache]: Analyzing trace with hash 1543826986, now seen corresponding path program 43 times [2018-04-13 05:34:31,042 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:34:31,042 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:34:31,043 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:34:31,043 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 05:34:31,043 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:34:31,068 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:34:31,069 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:34:31,733 INFO L134 CoverageAnalysis]: Checked inductivity of 9604 backedges. 0 proven. 4802 refuted. 0 times theorem prover too weak. 4802 trivial. 0 not checked. [2018-04-13 05:34:31,734 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:34:31,734 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:34:31,734 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 05:34:31,757 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:34:31,762 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:34:32,603 INFO L134 CoverageAnalysis]: Checked inductivity of 9604 backedges. 0 proven. 4802 refuted. 0 times theorem prover too weak. 4802 trivial. 0 not checked. [2018-04-13 05:34:32,604 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:34:32,604 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [54, 53] total 104 [2018-04-13 05:34:32,605 INFO L442 AbstractCegarLoop]: Interpolant automaton has 104 states [2018-04-13 05:34:32,606 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 104 interpolants. [2018-04-13 05:34:32,607 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3979, Invalid=6733, Unknown=0, NotChecked=0, Total=10712 [2018-04-13 05:34:32,607 INFO L87 Difference]: Start difference. First operand 430 states and 431 transitions. Second operand 104 states. [2018-04-13 05:34:33,126 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:34:33,126 INFO L93 Difference]: Finished difference Result 442 states and 443 transitions. [2018-04-13 05:34:33,126 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 54 states. [2018-04-13 05:34:33,126 INFO L78 Accepts]: Start accepts. Automaton has 104 states. Word has length 419 [2018-04-13 05:34:33,126 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:34:33,127 INFO L225 Difference]: With dead ends: 442 [2018-04-13 05:34:33,127 INFO L226 Difference]: Without dead ends: 442 [2018-04-13 05:34:33,128 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 473 GetRequests, 369 SyntacticMatches, 1 SemanticMatches, 103 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4947 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=4082, Invalid=6838, Unknown=0, NotChecked=0, Total=10920 [2018-04-13 05:34:33,128 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 442 states. [2018-04-13 05:34:33,129 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 442 to 438. [2018-04-13 05:34:33,129 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 438 states. [2018-04-13 05:34:33,130 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 438 states to 438 states and 439 transitions. [2018-04-13 05:34:33,130 INFO L78 Accepts]: Start accepts. Automaton has 438 states and 439 transitions. Word has length 419 [2018-04-13 05:34:33,130 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:34:33,130 INFO L459 AbstractCegarLoop]: Abstraction has 438 states and 439 transitions. [2018-04-13 05:34:33,130 INFO L460 AbstractCegarLoop]: Interpolant automaton has 104 states. [2018-04-13 05:34:33,130 INFO L276 IsEmpty]: Start isEmpty. Operand 438 states and 439 transitions. [2018-04-13 05:34:33,131 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 428 [2018-04-13 05:34:33,131 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:34:33,131 INFO L355 BasicCegarLoop]: trace histogram [51, 51, 50, 50, 50, 50, 50, 50, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:34:33,131 INFO L408 AbstractCegarLoop]: === Iteration 56 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:34:33,131 INFO L82 PathProgramCache]: Analyzing trace with hash -1328469750, now seen corresponding path program 44 times [2018-04-13 05:34:33,131 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:34:33,131 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:34:33,132 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:34:33,132 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 05:34:33,132 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:34:33,157 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:34:33,158 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:34:33,984 INFO L134 CoverageAnalysis]: Checked inductivity of 10000 backedges. 0 proven. 5000 refuted. 0 times theorem prover too weak. 5000 trivial. 0 not checked. [2018-04-13 05:34:33,984 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:34:33,984 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:34:33,985 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-04-13 05:34:34,020 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-04-13 05:34:34,020 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 05:34:34,027 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:34:34,089 INFO L134 CoverageAnalysis]: Checked inductivity of 10000 backedges. 0 proven. 5000 refuted. 0 times theorem prover too weak. 5000 trivial. 0 not checked. [2018-04-13 05:34:34,089 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:34:34,089 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [55, 53] total 56 [2018-04-13 05:34:34,090 INFO L442 AbstractCegarLoop]: Interpolant automaton has 56 states [2018-04-13 05:34:34,090 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 56 interpolants. [2018-04-13 05:34:34,090 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1435, Invalid=1645, Unknown=0, NotChecked=0, Total=3080 [2018-04-13 05:34:34,090 INFO L87 Difference]: Start difference. First operand 438 states and 439 transitions. Second operand 56 states. [2018-04-13 05:34:35,130 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:34:35,130 INFO L93 Difference]: Finished difference Result 450 states and 451 transitions. [2018-04-13 05:34:35,130 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 55 states. [2018-04-13 05:34:35,130 INFO L78 Accepts]: Start accepts. Automaton has 56 states. Word has length 427 [2018-04-13 05:34:35,131 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:34:35,132 INFO L225 Difference]: With dead ends: 450 [2018-04-13 05:34:35,132 INFO L226 Difference]: Without dead ends: 450 [2018-04-13 05:34:35,132 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 583 GetRequests, 478 SyntacticMatches, 0 SemanticMatches, 105 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1472 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=4190, Invalid=7152, Unknown=0, NotChecked=0, Total=11342 [2018-04-13 05:34:35,132 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 450 states. [2018-04-13 05:34:35,134 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 450 to 446. [2018-04-13 05:34:35,134 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 446 states. [2018-04-13 05:34:35,135 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 446 states to 446 states and 447 transitions. [2018-04-13 05:34:35,135 INFO L78 Accepts]: Start accepts. Automaton has 446 states and 447 transitions. Word has length 427 [2018-04-13 05:34:35,135 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:34:35,135 INFO L459 AbstractCegarLoop]: Abstraction has 446 states and 447 transitions. [2018-04-13 05:34:35,135 INFO L460 AbstractCegarLoop]: Interpolant automaton has 56 states. [2018-04-13 05:34:35,135 INFO L276 IsEmpty]: Start isEmpty. Operand 446 states and 447 transitions. [2018-04-13 05:34:35,136 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 436 [2018-04-13 05:34:35,136 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:34:35,136 INFO L355 BasicCegarLoop]: trace histogram [52, 52, 51, 51, 51, 51, 51, 51, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:34:35,136 INFO L408 AbstractCegarLoop]: === Iteration 57 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:34:35,136 INFO L82 PathProgramCache]: Analyzing trace with hash 461040874, now seen corresponding path program 45 times [2018-04-13 05:34:35,136 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:34:35,137 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:34:35,137 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:34:35,137 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 05:34:35,137 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:34:35,164 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:34:35,165 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:34:35,885 INFO L134 CoverageAnalysis]: Checked inductivity of 10404 backedges. 0 proven. 5202 refuted. 0 times theorem prover too weak. 5202 trivial. 0 not checked. [2018-04-13 05:34:35,885 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:34:35,886 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:34:35,886 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-04-13 05:34:35,955 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 52 check-sat command(s) [2018-04-13 05:34:35,955 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 05:34:35,980 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:34:36,916 INFO L134 CoverageAnalysis]: Checked inductivity of 10404 backedges. 0 proven. 5202 refuted. 0 times theorem prover too weak. 5202 trivial. 0 not checked. [2018-04-13 05:34:36,916 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:34:36,916 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [56, 55] total 108 [2018-04-13 05:34:36,916 INFO L442 AbstractCegarLoop]: Interpolant automaton has 108 states [2018-04-13 05:34:36,917 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 108 interpolants. [2018-04-13 05:34:36,917 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=4294, Invalid=7262, Unknown=0, NotChecked=0, Total=11556 [2018-04-13 05:34:36,917 INFO L87 Difference]: Start difference. First operand 446 states and 447 transitions. Second operand 108 states. [2018-04-13 05:34:37,492 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:34:37,492 INFO L93 Difference]: Finished difference Result 458 states and 459 transitions. [2018-04-13 05:34:37,492 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 56 states. [2018-04-13 05:34:37,492 INFO L78 Accepts]: Start accepts. Automaton has 108 states. Word has length 435 [2018-04-13 05:34:37,493 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:34:37,493 INFO L225 Difference]: With dead ends: 458 [2018-04-13 05:34:37,493 INFO L226 Difference]: Without dead ends: 458 [2018-04-13 05:34:37,494 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 491 GetRequests, 383 SyntacticMatches, 1 SemanticMatches, 107 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5353 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=4401, Invalid=7371, Unknown=0, NotChecked=0, Total=11772 [2018-04-13 05:34:37,494 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 458 states. [2018-04-13 05:34:37,496 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 458 to 454. [2018-04-13 05:34:37,496 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 454 states. [2018-04-13 05:34:37,496 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 454 states to 454 states and 455 transitions. [2018-04-13 05:34:37,496 INFO L78 Accepts]: Start accepts. Automaton has 454 states and 455 transitions. Word has length 435 [2018-04-13 05:34:37,496 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:34:37,496 INFO L459 AbstractCegarLoop]: Abstraction has 454 states and 455 transitions. [2018-04-13 05:34:37,496 INFO L460 AbstractCegarLoop]: Interpolant automaton has 108 states. [2018-04-13 05:34:37,496 INFO L276 IsEmpty]: Start isEmpty. Operand 454 states and 455 transitions. [2018-04-13 05:34:37,498 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 444 [2018-04-13 05:34:37,498 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:34:37,498 INFO L355 BasicCegarLoop]: trace histogram [53, 53, 52, 52, 52, 52, 52, 52, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:34:37,498 INFO L408 AbstractCegarLoop]: === Iteration 58 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:34:37,498 INFO L82 PathProgramCache]: Analyzing trace with hash 2064431562, now seen corresponding path program 46 times [2018-04-13 05:34:37,498 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:34:37,498 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:34:37,498 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:34:37,499 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 05:34:37,499 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:34:37,526 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:34:37,527 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:34:38,290 INFO L134 CoverageAnalysis]: Checked inductivity of 10816 backedges. 0 proven. 5408 refuted. 0 times theorem prover too weak. 5408 trivial. 0 not checked. [2018-04-13 05:34:38,291 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:34:38,291 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:34:38,291 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-04-13 05:34:38,378 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-04-13 05:34:38,378 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 05:34:38,413 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:34:38,415 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-13 05:34:38,415 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 05:34:38,418 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:34:38,418 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:12, output treesize:11 [2018-04-13 05:34:42,383 INFO L134 CoverageAnalysis]: Checked inductivity of 10816 backedges. 5408 proven. 5408 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-13 05:34:42,383 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:34:42,383 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [57, 110] total 165 [2018-04-13 05:34:42,384 INFO L442 AbstractCegarLoop]: Interpolant automaton has 165 states [2018-04-13 05:34:42,384 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 165 interpolants. [2018-04-13 05:34:42,385 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=6050, Invalid=21010, Unknown=0, NotChecked=0, Total=27060 [2018-04-13 05:34:42,385 INFO L87 Difference]: Start difference. First operand 454 states and 455 transitions. Second operand 165 states. [2018-04-13 05:34:44,516 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:34:44,516 INFO L93 Difference]: Finished difference Result 466 states and 467 transitions. [2018-04-13 05:34:44,517 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 60 states. [2018-04-13 05:34:44,517 INFO L78 Accepts]: Start accepts. Automaton has 165 states. Word has length 443 [2018-04-13 05:34:44,517 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:34:44,517 INFO L225 Difference]: With dead ends: 466 [2018-04-13 05:34:44,517 INFO L226 Difference]: Without dead ends: 466 [2018-04-13 05:34:44,518 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 556 GetRequests, 336 SyntacticMatches, 1 SemanticMatches, 219 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 19977 ImplicationChecksByTransitivity, 5.4s TimeCoverageRelationStatistics Valid=10570, Invalid=38050, Unknown=0, NotChecked=0, Total=48620 [2018-04-13 05:34:44,519 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 466 states. [2018-04-13 05:34:44,520 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 466 to 462. [2018-04-13 05:34:44,520 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 462 states. [2018-04-13 05:34:44,521 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 462 states to 462 states and 463 transitions. [2018-04-13 05:34:44,521 INFO L78 Accepts]: Start accepts. Automaton has 462 states and 463 transitions. Word has length 443 [2018-04-13 05:34:44,521 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:34:44,521 INFO L459 AbstractCegarLoop]: Abstraction has 462 states and 463 transitions. [2018-04-13 05:34:44,521 INFO L460 AbstractCegarLoop]: Interpolant automaton has 165 states. [2018-04-13 05:34:44,521 INFO L276 IsEmpty]: Start isEmpty. Operand 462 states and 463 transitions. [2018-04-13 05:34:44,522 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 452 [2018-04-13 05:34:44,522 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:34:44,522 INFO L355 BasicCegarLoop]: trace histogram [54, 54, 53, 53, 53, 53, 53, 53, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:34:44,522 INFO L408 AbstractCegarLoop]: === Iteration 59 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:34:44,522 INFO L82 PathProgramCache]: Analyzing trace with hash 1045499818, now seen corresponding path program 47 times [2018-04-13 05:34:44,523 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:34:44,523 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:34:44,523 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:34:44,523 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 05:34:44,523 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:34:44,551 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:34:44,552 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:34:45,335 INFO L134 CoverageAnalysis]: Checked inductivity of 11236 backedges. 0 proven. 5618 refuted. 0 times theorem prover too weak. 5618 trivial. 0 not checked. [2018-04-13 05:34:45,335 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:34:45,335 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:34:45,336 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-04-13 05:34:45,413 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 54 check-sat command(s) [2018-04-13 05:34:45,413 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 05:34:45,422 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:34:45,504 INFO L134 CoverageAnalysis]: Checked inductivity of 11236 backedges. 0 proven. 5618 refuted. 0 times theorem prover too weak. 5618 trivial. 0 not checked. [2018-04-13 05:34:45,504 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:34:45,504 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [58, 56] total 59 [2018-04-13 05:34:45,505 INFO L442 AbstractCegarLoop]: Interpolant automaton has 59 states [2018-04-13 05:34:45,505 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 59 interpolants. [2018-04-13 05:34:45,505 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1600, Invalid=1822, Unknown=0, NotChecked=0, Total=3422 [2018-04-13 05:34:45,505 INFO L87 Difference]: Start difference. First operand 462 states and 463 transitions. Second operand 59 states. [2018-04-13 05:34:46,507 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:34:46,507 INFO L93 Difference]: Finished difference Result 474 states and 475 transitions. [2018-04-13 05:34:46,507 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 58 states. [2018-04-13 05:34:46,507 INFO L78 Accepts]: Start accepts. Automaton has 59 states. Word has length 451 [2018-04-13 05:34:46,508 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:34:46,508 INFO L225 Difference]: With dead ends: 474 [2018-04-13 05:34:46,508 INFO L226 Difference]: Without dead ends: 474 [2018-04-13 05:34:46,509 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 616 GetRequests, 505 SyntacticMatches, 0 SemanticMatches, 111 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1640 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=4679, Invalid=7977, Unknown=0, NotChecked=0, Total=12656 [2018-04-13 05:34:46,509 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 474 states. [2018-04-13 05:34:46,511 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 474 to 470. [2018-04-13 05:34:46,511 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 470 states. [2018-04-13 05:34:46,511 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 470 states to 470 states and 471 transitions. [2018-04-13 05:34:46,511 INFO L78 Accepts]: Start accepts. Automaton has 470 states and 471 transitions. Word has length 451 [2018-04-13 05:34:46,511 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:34:46,511 INFO L459 AbstractCegarLoop]: Abstraction has 470 states and 471 transitions. [2018-04-13 05:34:46,511 INFO L460 AbstractCegarLoop]: Interpolant automaton has 59 states. [2018-04-13 05:34:46,511 INFO L276 IsEmpty]: Start isEmpty. Operand 470 states and 471 transitions. [2018-04-13 05:34:46,512 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 460 [2018-04-13 05:34:46,513 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:34:46,513 INFO L355 BasicCegarLoop]: trace histogram [55, 55, 54, 54, 54, 54, 54, 54, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:34:46,513 INFO L408 AbstractCegarLoop]: === Iteration 60 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:34:46,513 INFO L82 PathProgramCache]: Analyzing trace with hash -2083361142, now seen corresponding path program 48 times [2018-04-13 05:34:46,513 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:34:46,513 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:34:46,513 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:34:46,513 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 05:34:46,513 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:34:46,542 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:34:46,543 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:34:47,339 INFO L134 CoverageAnalysis]: Checked inductivity of 11664 backedges. 0 proven. 5832 refuted. 0 times theorem prover too weak. 5832 trivial. 0 not checked. [2018-04-13 05:34:47,340 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:34:47,340 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:34:47,340 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-04-13 05:34:47,413 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 55 check-sat command(s) [2018-04-13 05:34:47,413 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 05:34:47,436 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:34:48,358 INFO L134 CoverageAnalysis]: Checked inductivity of 11664 backedges. 0 proven. 5832 refuted. 0 times theorem prover too weak. 5832 trivial. 0 not checked. [2018-04-13 05:34:48,359 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:34:48,359 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [59, 58] total 114 [2018-04-13 05:34:48,359 INFO L442 AbstractCegarLoop]: Interpolant automaton has 114 states [2018-04-13 05:34:48,360 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 114 interpolants. [2018-04-13 05:34:48,360 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=4789, Invalid=8093, Unknown=0, NotChecked=0, Total=12882 [2018-04-13 05:34:48,360 INFO L87 Difference]: Start difference. First operand 470 states and 471 transitions. Second operand 114 states. [2018-04-13 05:34:48,951 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:34:48,951 INFO L93 Difference]: Finished difference Result 482 states and 483 transitions. [2018-04-13 05:34:48,951 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 59 states. [2018-04-13 05:34:48,951 INFO L78 Accepts]: Start accepts. Automaton has 114 states. Word has length 459 [2018-04-13 05:34:48,951 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:34:48,952 INFO L225 Difference]: With dead ends: 482 [2018-04-13 05:34:48,952 INFO L226 Difference]: Without dead ends: 482 [2018-04-13 05:34:48,952 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 518 GetRequests, 404 SyntacticMatches, 1 SemanticMatches, 113 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5992 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=4902, Invalid=8208, Unknown=0, NotChecked=0, Total=13110 [2018-04-13 05:34:48,953 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 482 states. [2018-04-13 05:34:48,954 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 482 to 478. [2018-04-13 05:34:48,954 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 478 states. [2018-04-13 05:34:48,955 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 478 states to 478 states and 479 transitions. [2018-04-13 05:34:48,955 INFO L78 Accepts]: Start accepts. Automaton has 478 states and 479 transitions. Word has length 459 [2018-04-13 05:34:48,955 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:34:48,955 INFO L459 AbstractCegarLoop]: Abstraction has 478 states and 479 transitions. [2018-04-13 05:34:48,955 INFO L460 AbstractCegarLoop]: Interpolant automaton has 114 states. [2018-04-13 05:34:48,955 INFO L276 IsEmpty]: Start isEmpty. Operand 478 states and 479 transitions. [2018-04-13 05:34:48,956 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 468 [2018-04-13 05:34:48,956 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:34:48,956 INFO L355 BasicCegarLoop]: trace histogram [56, 56, 55, 55, 55, 55, 55, 55, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:34:48,956 INFO L408 AbstractCegarLoop]: === Iteration 61 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:34:48,957 INFO L82 PathProgramCache]: Analyzing trace with hash 970675818, now seen corresponding path program 49 times [2018-04-13 05:34:48,957 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:34:48,957 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:34:48,957 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:34:48,957 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 05:34:48,957 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:34:48,986 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:34:48,987 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:34:49,762 INFO L134 CoverageAnalysis]: Checked inductivity of 12100 backedges. 0 proven. 6050 refuted. 0 times theorem prover too weak. 6050 trivial. 0 not checked. [2018-04-13 05:34:49,762 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:34:49,762 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:34:49,763 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 05:34:49,822 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:34:49,828 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:34:50,777 INFO L134 CoverageAnalysis]: Checked inductivity of 12100 backedges. 0 proven. 6050 refuted. 0 times theorem prover too weak. 6050 trivial. 0 not checked. [2018-04-13 05:34:50,777 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:34:50,777 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [60, 59] total 116 [2018-04-13 05:34:50,778 INFO L442 AbstractCegarLoop]: Interpolant automaton has 116 states [2018-04-13 05:34:50,778 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 116 interpolants. [2018-04-13 05:34:50,779 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=4960, Invalid=8380, Unknown=0, NotChecked=0, Total=13340 [2018-04-13 05:34:50,779 INFO L87 Difference]: Start difference. First operand 478 states and 479 transitions. Second operand 116 states. [2018-04-13 05:34:51,404 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:34:51,404 INFO L93 Difference]: Finished difference Result 490 states and 491 transitions. [2018-04-13 05:34:51,404 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 60 states. [2018-04-13 05:34:51,404 INFO L78 Accepts]: Start accepts. Automaton has 116 states. Word has length 467 [2018-04-13 05:34:51,405 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:34:51,405 INFO L225 Difference]: With dead ends: 490 [2018-04-13 05:34:51,405 INFO L226 Difference]: Without dead ends: 490 [2018-04-13 05:34:51,406 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 527 GetRequests, 411 SyntacticMatches, 1 SemanticMatches, 115 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6213 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=5075, Invalid=8497, Unknown=0, NotChecked=0, Total=13572 [2018-04-13 05:34:51,406 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 490 states. [2018-04-13 05:34:51,408 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 490 to 486. [2018-04-13 05:34:51,408 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 486 states. [2018-04-13 05:34:51,409 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 486 states to 486 states and 487 transitions. [2018-04-13 05:34:51,409 INFO L78 Accepts]: Start accepts. Automaton has 486 states and 487 transitions. Word has length 467 [2018-04-13 05:34:51,409 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:34:51,409 INFO L459 AbstractCegarLoop]: Abstraction has 486 states and 487 transitions. [2018-04-13 05:34:51,409 INFO L460 AbstractCegarLoop]: Interpolant automaton has 116 states. [2018-04-13 05:34:51,409 INFO L276 IsEmpty]: Start isEmpty. Operand 486 states and 487 transitions. [2018-04-13 05:34:51,410 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 476 [2018-04-13 05:34:51,410 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:34:51,411 INFO L355 BasicCegarLoop]: trace histogram [57, 57, 56, 56, 56, 56, 56, 56, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:34:51,411 INFO L408 AbstractCegarLoop]: === Iteration 62 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:34:51,411 INFO L82 PathProgramCache]: Analyzing trace with hash 1047938890, now seen corresponding path program 50 times [2018-04-13 05:34:51,411 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:34:51,411 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:34:51,411 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:34:51,411 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 05:34:51,411 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:34:51,445 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:34:51,446 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:34:52,278 INFO L134 CoverageAnalysis]: Checked inductivity of 12544 backedges. 0 proven. 6272 refuted. 0 times theorem prover too weak. 6272 trivial. 0 not checked. [2018-04-13 05:34:52,278 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:34:52,278 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:34:52,279 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-04-13 05:34:52,328 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-04-13 05:34:52,329 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 05:34:52,339 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:34:52,449 INFO L134 CoverageAnalysis]: Checked inductivity of 12544 backedges. 0 proven. 6272 refuted. 0 times theorem prover too weak. 6272 trivial. 0 not checked. [2018-04-13 05:34:52,449 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:34:52,449 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [61, 59] total 62 [2018-04-13 05:34:52,450 INFO L442 AbstractCegarLoop]: Interpolant automaton has 62 states [2018-04-13 05:34:52,450 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 62 interpolants. [2018-04-13 05:34:52,450 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1774, Invalid=2008, Unknown=0, NotChecked=0, Total=3782 [2018-04-13 05:34:52,450 INFO L87 Difference]: Start difference. First operand 486 states and 487 transitions. Second operand 62 states. [2018-04-13 05:34:53,522 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:34:53,522 INFO L93 Difference]: Finished difference Result 498 states and 499 transitions. [2018-04-13 05:34:53,523 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 61 states. [2018-04-13 05:34:53,523 INFO L78 Accepts]: Start accepts. Automaton has 62 states. Word has length 475 [2018-04-13 05:34:53,523 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:34:53,523 INFO L225 Difference]: With dead ends: 498 [2018-04-13 05:34:53,524 INFO L226 Difference]: Without dead ends: 498 [2018-04-13 05:34:53,524 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 649 GetRequests, 532 SyntacticMatches, 0 SemanticMatches, 117 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1817 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=5195, Invalid=8847, Unknown=0, NotChecked=0, Total=14042 [2018-04-13 05:34:53,524 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 498 states. [2018-04-13 05:34:53,526 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 498 to 494. [2018-04-13 05:34:53,526 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 494 states. [2018-04-13 05:34:53,526 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 494 states to 494 states and 495 transitions. [2018-04-13 05:34:53,527 INFO L78 Accepts]: Start accepts. Automaton has 494 states and 495 transitions. Word has length 475 [2018-04-13 05:34:53,527 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:34:53,527 INFO L459 AbstractCegarLoop]: Abstraction has 494 states and 495 transitions. [2018-04-13 05:34:53,527 INFO L460 AbstractCegarLoop]: Interpolant automaton has 62 states. [2018-04-13 05:34:53,527 INFO L276 IsEmpty]: Start isEmpty. Operand 494 states and 495 transitions. [2018-04-13 05:34:53,528 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 484 [2018-04-13 05:34:53,528 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:34:53,528 INFO L355 BasicCegarLoop]: trace histogram [58, 58, 57, 57, 57, 57, 57, 57, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:34:53,528 INFO L408 AbstractCegarLoop]: === Iteration 63 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:34:53,528 INFO L82 PathProgramCache]: Analyzing trace with hash 2137899306, now seen corresponding path program 51 times [2018-04-13 05:34:53,529 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:34:53,529 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:34:53,529 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:34:53,529 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 05:34:53,529 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:34:53,560 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:34:53,561 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:34:54,411 INFO L134 CoverageAnalysis]: Checked inductivity of 12996 backedges. 0 proven. 6498 refuted. 0 times theorem prover too weak. 6498 trivial. 0 not checked. [2018-04-13 05:34:54,412 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:34:54,412 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:34:54,412 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-04-13 05:34:54,499 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 58 check-sat command(s) [2018-04-13 05:34:54,499 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 05:34:54,539 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:34:54,620 INFO L134 CoverageAnalysis]: Checked inductivity of 12996 backedges. 0 proven. 6498 refuted. 0 times theorem prover too weak. 6498 trivial. 0 not checked. [2018-04-13 05:34:54,620 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:34:54,620 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [62, 60] total 63 [2018-04-13 05:34:54,620 INFO L442 AbstractCegarLoop]: Interpolant automaton has 63 states [2018-04-13 05:34:54,621 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 63 interpolants. [2018-04-13 05:34:54,621 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1834, Invalid=2072, Unknown=0, NotChecked=0, Total=3906 [2018-04-13 05:34:54,621 INFO L87 Difference]: Start difference. First operand 494 states and 495 transitions. Second operand 63 states. [2018-04-13 05:34:55,748 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:34:55,748 INFO L93 Difference]: Finished difference Result 506 states and 507 transitions. [2018-04-13 05:34:55,749 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 62 states. [2018-04-13 05:34:55,749 INFO L78 Accepts]: Start accepts. Automaton has 63 states. Word has length 483 [2018-04-13 05:34:55,749 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:34:55,749 INFO L225 Difference]: With dead ends: 506 [2018-04-13 05:34:55,749 INFO L226 Difference]: Without dead ends: 506 [2018-04-13 05:34:55,750 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 660 GetRequests, 541 SyntacticMatches, 0 SemanticMatches, 119 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1878 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=5373, Invalid=9147, Unknown=0, NotChecked=0, Total=14520 [2018-04-13 05:34:55,750 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 506 states. [2018-04-13 05:34:55,752 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 506 to 502. [2018-04-13 05:34:55,752 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 502 states. [2018-04-13 05:34:55,752 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 502 states to 502 states and 503 transitions. [2018-04-13 05:34:55,752 INFO L78 Accepts]: Start accepts. Automaton has 502 states and 503 transitions. Word has length 483 [2018-04-13 05:34:55,752 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:34:55,752 INFO L459 AbstractCegarLoop]: Abstraction has 502 states and 503 transitions. [2018-04-13 05:34:55,752 INFO L460 AbstractCegarLoop]: Interpolant automaton has 63 states. [2018-04-13 05:34:55,753 INFO L276 IsEmpty]: Start isEmpty. Operand 502 states and 503 transitions. [2018-04-13 05:34:55,754 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 492 [2018-04-13 05:34:55,754 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:34:55,754 INFO L355 BasicCegarLoop]: trace histogram [59, 59, 58, 58, 58, 58, 58, 58, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:34:55,754 INFO L408 AbstractCegarLoop]: === Iteration 64 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:34:55,754 INFO L82 PathProgramCache]: Analyzing trace with hash 441205770, now seen corresponding path program 52 times [2018-04-13 05:34:55,754 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:34:55,754 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:34:55,755 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:34:55,755 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 05:34:55,755 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:34:55,786 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:34:55,787 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:34:56,671 INFO L134 CoverageAnalysis]: Checked inductivity of 13456 backedges. 0 proven. 6728 refuted. 0 times theorem prover too weak. 6728 trivial. 0 not checked. [2018-04-13 05:34:56,671 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:34:56,671 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:34:56,672 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-04-13 05:34:56,785 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-04-13 05:34:56,785 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 05:34:56,834 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:34:56,836 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-13 05:34:56,836 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 05:34:56,838 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:34:56,839 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:12, output treesize:11 [2018-04-13 05:35:01,299 INFO L134 CoverageAnalysis]: Checked inductivity of 13456 backedges. 6728 proven. 6728 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-13 05:35:01,299 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:35:01,300 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [63, 122] total 183 [2018-04-13 05:35:01,300 INFO L442 AbstractCegarLoop]: Interpolant automaton has 183 states [2018-04-13 05:35:01,301 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 183 interpolants. [2018-04-13 05:35:01,302 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7442, Invalid=25864, Unknown=0, NotChecked=0, Total=33306 [2018-04-13 05:35:01,302 INFO L87 Difference]: Start difference. First operand 502 states and 503 transitions. Second operand 183 states. [2018-04-13 05:35:03,975 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:35:03,975 INFO L93 Difference]: Finished difference Result 514 states and 515 transitions. [2018-04-13 05:35:03,976 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 66 states. [2018-04-13 05:35:03,976 INFO L78 Accepts]: Start accepts. Automaton has 183 states. Word has length 491 [2018-04-13 05:35:03,976 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:35:03,977 INFO L225 Difference]: With dead ends: 514 [2018-04-13 05:35:03,977 INFO L226 Difference]: Without dead ends: 514 [2018-04-13 05:35:03,978 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 616 GetRequests, 372 SyntacticMatches, 1 SemanticMatches, 243 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 24717 ImplicationChecksByTransitivity, 6.3s TimeCoverageRelationStatistics Valid=13003, Invalid=46777, Unknown=0, NotChecked=0, Total=59780 [2018-04-13 05:35:03,978 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 514 states. [2018-04-13 05:35:03,980 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 514 to 510. [2018-04-13 05:35:03,981 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 510 states. [2018-04-13 05:35:03,981 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 510 states to 510 states and 511 transitions. [2018-04-13 05:35:03,981 INFO L78 Accepts]: Start accepts. Automaton has 510 states and 511 transitions. Word has length 491 [2018-04-13 05:35:03,981 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:35:03,981 INFO L459 AbstractCegarLoop]: Abstraction has 510 states and 511 transitions. [2018-04-13 05:35:03,981 INFO L460 AbstractCegarLoop]: Interpolant automaton has 183 states. [2018-04-13 05:35:03,981 INFO L276 IsEmpty]: Start isEmpty. Operand 510 states and 511 transitions. [2018-04-13 05:35:03,983 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 500 [2018-04-13 05:35:03,983 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:35:03,983 INFO L355 BasicCegarLoop]: trace histogram [60, 60, 59, 59, 59, 59, 59, 59, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:35:03,983 INFO L408 AbstractCegarLoop]: === Iteration 65 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:35:03,983 INFO L82 PathProgramCache]: Analyzing trace with hash 2086424554, now seen corresponding path program 53 times [2018-04-13 05:35:03,983 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:35:03,983 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:35:03,983 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:35:03,984 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 05:35:03,984 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:35:04,016 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:35:04,017 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:35:04,916 INFO L134 CoverageAnalysis]: Checked inductivity of 13924 backedges. 0 proven. 6962 refuted. 0 times theorem prover too weak. 6962 trivial. 0 not checked. [2018-04-13 05:35:04,916 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:35:04,916 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:35:04,916 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-04-13 05:35:05,021 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 60 check-sat command(s) [2018-04-13 05:35:05,021 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 05:35:05,031 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:35:05,116 INFO L134 CoverageAnalysis]: Checked inductivity of 13924 backedges. 0 proven. 6962 refuted. 0 times theorem prover too weak. 6962 trivial. 0 not checked. [2018-04-13 05:35:05,116 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:35:05,116 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [64, 62] total 65 [2018-04-13 05:35:05,116 INFO L442 AbstractCegarLoop]: Interpolant automaton has 65 states [2018-04-13 05:35:05,117 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 65 interpolants. [2018-04-13 05:35:05,117 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1957, Invalid=2203, Unknown=0, NotChecked=0, Total=4160 [2018-04-13 05:35:05,117 INFO L87 Difference]: Start difference. First operand 510 states and 511 transitions. Second operand 65 states. [2018-04-13 05:35:06,333 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:35:06,333 INFO L93 Difference]: Finished difference Result 522 states and 523 transitions. [2018-04-13 05:35:06,333 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 64 states. [2018-04-13 05:35:06,333 INFO L78 Accepts]: Start accepts. Automaton has 65 states. Word has length 499 [2018-04-13 05:35:06,334 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:35:06,334 INFO L225 Difference]: With dead ends: 522 [2018-04-13 05:35:06,334 INFO L226 Difference]: Without dead ends: 522 [2018-04-13 05:35:06,335 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 682 GetRequests, 559 SyntacticMatches, 0 SemanticMatches, 123 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2003 ImplicationChecksByTransitivity, 1.6s TimeCoverageRelationStatistics Valid=5738, Invalid=9762, Unknown=0, NotChecked=0, Total=15500 [2018-04-13 05:35:06,335 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 522 states. [2018-04-13 05:35:06,337 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 522 to 518. [2018-04-13 05:35:06,337 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 518 states. [2018-04-13 05:35:06,337 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 518 states to 518 states and 519 transitions. [2018-04-13 05:35:06,338 INFO L78 Accepts]: Start accepts. Automaton has 518 states and 519 transitions. Word has length 499 [2018-04-13 05:35:06,338 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:35:06,338 INFO L459 AbstractCegarLoop]: Abstraction has 518 states and 519 transitions. [2018-04-13 05:35:06,338 INFO L460 AbstractCegarLoop]: Interpolant automaton has 65 states. [2018-04-13 05:35:06,338 INFO L276 IsEmpty]: Start isEmpty. Operand 518 states and 519 transitions. [2018-04-13 05:35:06,339 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 508 [2018-04-13 05:35:06,339 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:35:06,340 INFO L355 BasicCegarLoop]: trace histogram [61, 61, 60, 60, 60, 60, 60, 60, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:35:06,340 INFO L408 AbstractCegarLoop]: === Iteration 66 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:35:06,340 INFO L82 PathProgramCache]: Analyzing trace with hash -2102893366, now seen corresponding path program 54 times [2018-04-13 05:35:06,340 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:35:06,340 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:35:06,340 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:35:06,341 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 05:35:06,341 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:35:06,375 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:35:06,376 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:35:07,330 INFO L134 CoverageAnalysis]: Checked inductivity of 14400 backedges. 0 proven. 7200 refuted. 0 times theorem prover too weak. 7200 trivial. 0 not checked. [2018-04-13 05:35:07,330 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:35:07,330 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:35:07,330 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-04-13 05:35:07,426 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 61 check-sat command(s) [2018-04-13 05:35:07,426 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 05:35:07,459 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:35:07,545 INFO L134 CoverageAnalysis]: Checked inductivity of 14400 backedges. 0 proven. 7200 refuted. 0 times theorem prover too weak. 7200 trivial. 0 not checked. [2018-04-13 05:35:07,546 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:35:07,546 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [65, 63] total 66 [2018-04-13 05:35:07,546 INFO L442 AbstractCegarLoop]: Interpolant automaton has 66 states [2018-04-13 05:35:07,546 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 66 interpolants. [2018-04-13 05:35:07,547 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2020, Invalid=2270, Unknown=0, NotChecked=0, Total=4290 [2018-04-13 05:35:07,547 INFO L87 Difference]: Start difference. First operand 518 states and 519 transitions. Second operand 66 states. [2018-04-13 05:35:08,806 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:35:08,807 INFO L93 Difference]: Finished difference Result 530 states and 531 transitions. [2018-04-13 05:35:08,807 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 65 states. [2018-04-13 05:35:08,807 INFO L78 Accepts]: Start accepts. Automaton has 66 states. Word has length 507 [2018-04-13 05:35:08,807 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:35:08,808 INFO L225 Difference]: With dead ends: 530 [2018-04-13 05:35:08,808 INFO L226 Difference]: Without dead ends: 530 [2018-04-13 05:35:08,808 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 693 GetRequests, 568 SyntacticMatches, 0 SemanticMatches, 125 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2067 ImplicationChecksByTransitivity, 1.7s TimeCoverageRelationStatistics Valid=5925, Invalid=10077, Unknown=0, NotChecked=0, Total=16002 [2018-04-13 05:35:08,808 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 530 states. [2018-04-13 05:35:08,810 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 530 to 526. [2018-04-13 05:35:08,810 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 526 states. [2018-04-13 05:35:08,811 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 526 states to 526 states and 527 transitions. [2018-04-13 05:35:08,811 INFO L78 Accepts]: Start accepts. Automaton has 526 states and 527 transitions. Word has length 507 [2018-04-13 05:35:08,811 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:35:08,811 INFO L459 AbstractCegarLoop]: Abstraction has 526 states and 527 transitions. [2018-04-13 05:35:08,811 INFO L460 AbstractCegarLoop]: Interpolant automaton has 66 states. [2018-04-13 05:35:08,811 INFO L276 IsEmpty]: Start isEmpty. Operand 526 states and 527 transitions. [2018-04-13 05:35:08,812 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 516 [2018-04-13 05:35:08,812 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:35:08,813 INFO L355 BasicCegarLoop]: trace histogram [62, 62, 61, 61, 61, 61, 61, 61, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:35:08,813 INFO L408 AbstractCegarLoop]: === Iteration 67 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:35:08,813 INFO L82 PathProgramCache]: Analyzing trace with hash -1711603030, now seen corresponding path program 55 times [2018-04-13 05:35:08,813 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:35:08,813 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:35:08,813 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:35:08,813 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 05:35:08,813 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:35:08,849 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:35:08,850 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:35:09,802 INFO L134 CoverageAnalysis]: Checked inductivity of 14884 backedges. 0 proven. 7442 refuted. 0 times theorem prover too weak. 7442 trivial. 0 not checked. [2018-04-13 05:35:09,803 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:35:09,803 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:35:09,803 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 05:35:09,832 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:35:09,839 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:35:11,046 INFO L134 CoverageAnalysis]: Checked inductivity of 14884 backedges. 0 proven. 7442 refuted. 0 times theorem prover too weak. 7442 trivial. 0 not checked. [2018-04-13 05:35:11,046 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:35:11,046 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [66, 65] total 128 [2018-04-13 05:35:11,047 INFO L442 AbstractCegarLoop]: Interpolant automaton has 128 states [2018-04-13 05:35:11,047 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 128 interpolants. [2018-04-13 05:35:11,048 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=6049, Invalid=10207, Unknown=0, NotChecked=0, Total=16256 [2018-04-13 05:35:11,048 INFO L87 Difference]: Start difference. First operand 526 states and 527 transitions. Second operand 128 states. [2018-04-13 05:35:11,762 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:35:11,762 INFO L93 Difference]: Finished difference Result 538 states and 539 transitions. [2018-04-13 05:35:11,763 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 66 states. [2018-04-13 05:35:11,763 INFO L78 Accepts]: Start accepts. Automaton has 128 states. Word has length 515 [2018-04-13 05:35:11,763 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:35:11,764 INFO L225 Difference]: With dead ends: 538 [2018-04-13 05:35:11,764 INFO L226 Difference]: Without dead ends: 538 [2018-04-13 05:35:11,764 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 581 GetRequests, 453 SyntacticMatches, 1 SemanticMatches, 127 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7623 ImplicationChecksByTransitivity, 1.8s TimeCoverageRelationStatistics Valid=6176, Invalid=10336, Unknown=0, NotChecked=0, Total=16512 [2018-04-13 05:35:11,764 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 538 states. [2018-04-13 05:35:11,766 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 538 to 534. [2018-04-13 05:35:11,766 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 534 states. [2018-04-13 05:35:11,766 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 534 states to 534 states and 535 transitions. [2018-04-13 05:35:11,766 INFO L78 Accepts]: Start accepts. Automaton has 534 states and 535 transitions. Word has length 515 [2018-04-13 05:35:11,767 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:35:11,767 INFO L459 AbstractCegarLoop]: Abstraction has 534 states and 535 transitions. [2018-04-13 05:35:11,767 INFO L460 AbstractCegarLoop]: Interpolant automaton has 128 states. [2018-04-13 05:35:11,767 INFO L276 IsEmpty]: Start isEmpty. Operand 534 states and 535 transitions. [2018-04-13 05:35:11,768 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 524 [2018-04-13 05:35:11,768 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:35:11,768 INFO L355 BasicCegarLoop]: trace histogram [63, 63, 62, 62, 62, 62, 62, 62, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:35:11,768 INFO L408 AbstractCegarLoop]: === Iteration 68 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:35:11,769 INFO L82 PathProgramCache]: Analyzing trace with hash -555832950, now seen corresponding path program 56 times [2018-04-13 05:35:11,769 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:35:11,769 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:35:11,769 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:35:11,769 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 05:35:11,769 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:35:11,804 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:35:11,805 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:35:12,767 INFO L134 CoverageAnalysis]: Checked inductivity of 15376 backedges. 0 proven. 7688 refuted. 0 times theorem prover too weak. 7688 trivial. 0 not checked. [2018-04-13 05:35:12,768 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:35:12,768 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:35:12,768 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-04-13 05:35:12,816 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-04-13 05:35:12,817 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 05:35:12,824 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:35:12,917 INFO L134 CoverageAnalysis]: Checked inductivity of 15376 backedges. 0 proven. 7688 refuted. 0 times theorem prover too weak. 7688 trivial. 0 not checked. [2018-04-13 05:35:12,917 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:35:12,917 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [67, 65] total 68 [2018-04-13 05:35:12,918 INFO L442 AbstractCegarLoop]: Interpolant automaton has 68 states [2018-04-13 05:35:12,918 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 68 interpolants. [2018-04-13 05:35:12,918 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2149, Invalid=2407, Unknown=0, NotChecked=0, Total=4556 [2018-04-13 05:35:12,919 INFO L87 Difference]: Start difference. First operand 534 states and 535 transitions. Second operand 68 states. [2018-04-13 05:35:14,227 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:35:14,227 INFO L93 Difference]: Finished difference Result 546 states and 547 transitions. [2018-04-13 05:35:14,227 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 67 states. [2018-04-13 05:35:14,227 INFO L78 Accepts]: Start accepts. Automaton has 68 states. Word has length 523 [2018-04-13 05:35:14,228 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:35:14,228 INFO L225 Difference]: With dead ends: 546 [2018-04-13 05:35:14,228 INFO L226 Difference]: Without dead ends: 546 [2018-04-13 05:35:14,229 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 715 GetRequests, 586 SyntacticMatches, 0 SemanticMatches, 129 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2198 ImplicationChecksByTransitivity, 1.8s TimeCoverageRelationStatistics Valid=6308, Invalid=10722, Unknown=0, NotChecked=0, Total=17030 [2018-04-13 05:35:14,229 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 546 states. [2018-04-13 05:35:14,231 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 546 to 542. [2018-04-13 05:35:14,231 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 542 states. [2018-04-13 05:35:14,231 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 542 states to 542 states and 543 transitions. [2018-04-13 05:35:14,232 INFO L78 Accepts]: Start accepts. Automaton has 542 states and 543 transitions. Word has length 523 [2018-04-13 05:35:14,232 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:35:14,232 INFO L459 AbstractCegarLoop]: Abstraction has 542 states and 543 transitions. [2018-04-13 05:35:14,232 INFO L460 AbstractCegarLoop]: Interpolant automaton has 68 states. [2018-04-13 05:35:14,232 INFO L276 IsEmpty]: Start isEmpty. Operand 542 states and 543 transitions. [2018-04-13 05:35:14,233 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 532 [2018-04-13 05:35:14,233 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:35:14,234 INFO L355 BasicCegarLoop]: trace histogram [64, 64, 63, 63, 63, 63, 63, 63, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:35:14,234 INFO L408 AbstractCegarLoop]: === Iteration 69 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:35:14,234 INFO L82 PathProgramCache]: Analyzing trace with hash 1033754986, now seen corresponding path program 57 times [2018-04-13 05:35:14,234 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:35:14,234 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:35:14,234 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:35:14,234 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 05:35:14,234 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:35:14,271 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:35:14,272 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:35:15,337 INFO L134 CoverageAnalysis]: Checked inductivity of 15876 backedges. 0 proven. 7938 refuted. 0 times theorem prover too weak. 7938 trivial. 0 not checked. [2018-04-13 05:35:15,337 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:35:15,337 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:35:15,338 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-04-13 05:35:15,455 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 64 check-sat command(s) [2018-04-13 05:35:15,455 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 05:35:15,479 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:35:16,733 INFO L134 CoverageAnalysis]: Checked inductivity of 15876 backedges. 0 proven. 7938 refuted. 0 times theorem prover too weak. 7938 trivial. 0 not checked. [2018-04-13 05:35:16,733 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:35:16,733 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [68, 67] total 132 [2018-04-13 05:35:16,734 INFO L442 AbstractCegarLoop]: Interpolant automaton has 132 states [2018-04-13 05:35:16,734 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 132 interpolants. [2018-04-13 05:35:16,735 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=6436, Invalid=10856, Unknown=0, NotChecked=0, Total=17292 [2018-04-13 05:35:16,735 INFO L87 Difference]: Start difference. First operand 542 states and 543 transitions. Second operand 132 states. [2018-04-13 05:35:17,508 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:35:17,508 INFO L93 Difference]: Finished difference Result 554 states and 555 transitions. [2018-04-13 05:35:17,508 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 68 states. [2018-04-13 05:35:17,508 INFO L78 Accepts]: Start accepts. Automaton has 132 states. Word has length 531 [2018-04-13 05:35:17,508 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:35:17,509 INFO L225 Difference]: With dead ends: 554 [2018-04-13 05:35:17,509 INFO L226 Difference]: Without dead ends: 554 [2018-04-13 05:35:17,510 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 599 GetRequests, 467 SyntacticMatches, 1 SemanticMatches, 131 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8125 ImplicationChecksByTransitivity, 1.9s TimeCoverageRelationStatistics Valid=6567, Invalid=10989, Unknown=0, NotChecked=0, Total=17556 [2018-04-13 05:35:17,510 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 554 states. [2018-04-13 05:35:17,512 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 554 to 550. [2018-04-13 05:35:17,512 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 550 states. [2018-04-13 05:35:17,512 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 550 states to 550 states and 551 transitions. [2018-04-13 05:35:17,512 INFO L78 Accepts]: Start accepts. Automaton has 550 states and 551 transitions. Word has length 531 [2018-04-13 05:35:17,512 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:35:17,513 INFO L459 AbstractCegarLoop]: Abstraction has 550 states and 551 transitions. [2018-04-13 05:35:17,513 INFO L460 AbstractCegarLoop]: Interpolant automaton has 132 states. [2018-04-13 05:35:17,513 INFO L276 IsEmpty]: Start isEmpty. Operand 550 states and 551 transitions. [2018-04-13 05:35:17,514 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 540 [2018-04-13 05:35:17,514 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:35:17,514 INFO L355 BasicCegarLoop]: trace histogram [65, 65, 64, 64, 64, 64, 64, 64, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:35:17,514 INFO L408 AbstractCegarLoop]: === Iteration 70 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:35:17,515 INFO L82 PathProgramCache]: Analyzing trace with hash -1841098166, now seen corresponding path program 58 times [2018-04-13 05:35:17,515 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:35:17,515 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:35:17,515 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:35:17,516 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 05:35:17,516 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:35:17,554 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:35:17,555 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:35:18,596 INFO L134 CoverageAnalysis]: Checked inductivity of 16384 backedges. 0 proven. 8192 refuted. 0 times theorem prover too weak. 8192 trivial. 0 not checked. [2018-04-13 05:35:18,596 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:35:18,596 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:35:18,597 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-04-13 05:35:18,735 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-04-13 05:35:18,735 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 05:35:18,774 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:35:18,777 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-13 05:35:18,777 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 05:35:18,779 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:35:18,780 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:12, output treesize:11 [2018-04-13 05:35:24,189 INFO L134 CoverageAnalysis]: Checked inductivity of 16384 backedges. 8192 proven. 8192 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-13 05:35:24,189 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:35:24,189 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [69, 134] total 201 [2018-04-13 05:35:24,190 INFO L442 AbstractCegarLoop]: Interpolant automaton has 201 states [2018-04-13 05:35:24,190 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 201 interpolants. [2018-04-13 05:35:24,191 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=8978, Invalid=31222, Unknown=0, NotChecked=0, Total=40200 [2018-04-13 05:35:24,191 INFO L87 Difference]: Start difference. First operand 550 states and 551 transitions. Second operand 201 states. [2018-04-13 05:35:26,909 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:35:26,909 INFO L93 Difference]: Finished difference Result 562 states and 563 transitions. [2018-04-13 05:35:26,909 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 72 states. [2018-04-13 05:35:26,909 INFO L78 Accepts]: Start accepts. Automaton has 201 states. Word has length 539 [2018-04-13 05:35:26,909 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:35:26,910 INFO L225 Difference]: With dead ends: 562 [2018-04-13 05:35:26,910 INFO L226 Difference]: Without dead ends: 562 [2018-04-13 05:35:26,913 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 676 GetRequests, 408 SyntacticMatches, 1 SemanticMatches, 267 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 29961 ImplicationChecksByTransitivity, 7.3s TimeCoverageRelationStatistics Valid=15688, Invalid=56404, Unknown=0, NotChecked=0, Total=72092 [2018-04-13 05:35:26,913 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 562 states. [2018-04-13 05:35:26,915 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 562 to 558. [2018-04-13 05:35:26,915 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 558 states. [2018-04-13 05:35:26,915 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 558 states to 558 states and 559 transitions. [2018-04-13 05:35:26,915 INFO L78 Accepts]: Start accepts. Automaton has 558 states and 559 transitions. Word has length 539 [2018-04-13 05:35:26,915 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:35:26,916 INFO L459 AbstractCegarLoop]: Abstraction has 558 states and 559 transitions. [2018-04-13 05:35:26,916 INFO L460 AbstractCegarLoop]: Interpolant automaton has 201 states. [2018-04-13 05:35:26,916 INFO L276 IsEmpty]: Start isEmpty. Operand 558 states and 559 transitions. [2018-04-13 05:35:26,917 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 548 [2018-04-13 05:35:26,917 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:35:26,917 INFO L355 BasicCegarLoop]: trace histogram [66, 66, 65, 65, 65, 65, 65, 65, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:35:26,918 INFO L408 AbstractCegarLoop]: === Iteration 71 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:35:26,918 INFO L82 PathProgramCache]: Analyzing trace with hash -929508310, now seen corresponding path program 59 times [2018-04-13 05:35:26,918 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:35:26,918 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:35:26,918 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:35:26,918 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 05:35:26,918 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:35:26,958 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:35:26,959 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:35:28,062 INFO L134 CoverageAnalysis]: Checked inductivity of 16900 backedges. 0 proven. 8450 refuted. 0 times theorem prover too weak. 8450 trivial. 0 not checked. [2018-04-13 05:35:28,062 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:35:28,062 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:35:28,063 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-04-13 05:35:28,199 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 66 check-sat command(s) [2018-04-13 05:35:28,199 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 05:35:28,211 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:35:28,310 INFO L134 CoverageAnalysis]: Checked inductivity of 16900 backedges. 0 proven. 8450 refuted. 0 times theorem prover too weak. 8450 trivial. 0 not checked. [2018-04-13 05:35:28,310 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:35:28,310 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [70, 68] total 71 [2018-04-13 05:35:28,310 INFO L442 AbstractCegarLoop]: Interpolant automaton has 71 states [2018-04-13 05:35:28,311 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 71 interpolants. [2018-04-13 05:35:28,311 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2350, Invalid=2620, Unknown=0, NotChecked=0, Total=4970 [2018-04-13 05:35:28,311 INFO L87 Difference]: Start difference. First operand 558 states and 559 transitions. Second operand 71 states. [2018-04-13 05:35:29,692 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:35:29,692 INFO L93 Difference]: Finished difference Result 570 states and 571 transitions. [2018-04-13 05:35:29,692 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 70 states. [2018-04-13 05:35:29,692 INFO L78 Accepts]: Start accepts. Automaton has 71 states. Word has length 547 [2018-04-13 05:35:29,692 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:35:29,693 INFO L225 Difference]: With dead ends: 570 [2018-04-13 05:35:29,693 INFO L226 Difference]: Without dead ends: 570 [2018-04-13 05:35:29,694 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 748 GetRequests, 613 SyntacticMatches, 0 SemanticMatches, 135 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2402 ImplicationChecksByTransitivity, 1.9s TimeCoverageRelationStatistics Valid=6905, Invalid=11727, Unknown=0, NotChecked=0, Total=18632 [2018-04-13 05:35:29,694 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 570 states. [2018-04-13 05:35:29,697 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 570 to 566. [2018-04-13 05:35:29,697 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 566 states. [2018-04-13 05:35:29,697 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 566 states to 566 states and 567 transitions. [2018-04-13 05:35:29,697 INFO L78 Accepts]: Start accepts. Automaton has 566 states and 567 transitions. Word has length 547 [2018-04-13 05:35:29,697 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:35:29,697 INFO L459 AbstractCegarLoop]: Abstraction has 566 states and 567 transitions. [2018-04-13 05:35:29,697 INFO L460 AbstractCegarLoop]: Interpolant automaton has 71 states. [2018-04-13 05:35:29,697 INFO L276 IsEmpty]: Start isEmpty. Operand 566 states and 567 transitions. [2018-04-13 05:35:29,699 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 556 [2018-04-13 05:35:29,699 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:35:29,699 INFO L355 BasicCegarLoop]: trace histogram [67, 67, 66, 66, 66, 66, 66, 66, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:35:29,699 INFO L408 AbstractCegarLoop]: === Iteration 72 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:35:29,699 INFO L82 PathProgramCache]: Analyzing trace with hash -64381174, now seen corresponding path program 60 times [2018-04-13 05:35:29,699 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:35:29,699 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:35:29,700 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:35:29,700 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 05:35:29,700 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:35:29,742 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:35:29,743 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:35:30,838 INFO L134 CoverageAnalysis]: Checked inductivity of 17424 backedges. 0 proven. 8712 refuted. 0 times theorem prover too weak. 8712 trivial. 0 not checked. [2018-04-13 05:35:30,839 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:35:30,839 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:35:30,839 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-04-13 05:35:30,983 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 67 check-sat command(s) [2018-04-13 05:35:30,983 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 05:35:31,014 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:35:31,121 INFO L134 CoverageAnalysis]: Checked inductivity of 17424 backedges. 0 proven. 8712 refuted. 0 times theorem prover too weak. 8712 trivial. 0 not checked. [2018-04-13 05:35:31,121 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:35:31,121 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [71, 69] total 72 [2018-04-13 05:35:31,121 INFO L442 AbstractCegarLoop]: Interpolant automaton has 72 states [2018-04-13 05:35:31,122 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 72 interpolants. [2018-04-13 05:35:31,122 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2419, Invalid=2693, Unknown=0, NotChecked=0, Total=5112 [2018-04-13 05:35:31,122 INFO L87 Difference]: Start difference. First operand 566 states and 567 transitions. Second operand 72 states. [2018-04-13 05:35:32,531 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:35:32,531 INFO L93 Difference]: Finished difference Result 578 states and 579 transitions. [2018-04-13 05:35:32,532 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 71 states. [2018-04-13 05:35:32,532 INFO L78 Accepts]: Start accepts. Automaton has 72 states. Word has length 555 [2018-04-13 05:35:32,532 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:35:32,533 INFO L225 Difference]: With dead ends: 578 [2018-04-13 05:35:32,533 INFO L226 Difference]: Without dead ends: 578 [2018-04-13 05:35:32,534 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 759 GetRequests, 622 SyntacticMatches, 0 SemanticMatches, 137 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2472 ImplicationChecksByTransitivity, 1.9s TimeCoverageRelationStatistics Valid=7110, Invalid=12072, Unknown=0, NotChecked=0, Total=19182 [2018-04-13 05:35:32,534 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 578 states. [2018-04-13 05:35:32,536 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 578 to 574. [2018-04-13 05:35:32,537 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 574 states. [2018-04-13 05:35:32,537 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 574 states to 574 states and 575 transitions. [2018-04-13 05:35:32,537 INFO L78 Accepts]: Start accepts. Automaton has 574 states and 575 transitions. Word has length 555 [2018-04-13 05:35:32,537 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:35:32,537 INFO L459 AbstractCegarLoop]: Abstraction has 574 states and 575 transitions. [2018-04-13 05:35:32,537 INFO L460 AbstractCegarLoop]: Interpolant automaton has 72 states. [2018-04-13 05:35:32,537 INFO L276 IsEmpty]: Start isEmpty. Operand 574 states and 575 transitions. [2018-04-13 05:35:32,539 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 564 [2018-04-13 05:35:32,539 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:35:32,539 INFO L355 BasicCegarLoop]: trace histogram [68, 68, 67, 67, 67, 67, 67, 67, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:35:32,539 INFO L408 AbstractCegarLoop]: === Iteration 73 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:35:32,539 INFO L82 PathProgramCache]: Analyzing trace with hash -1740639510, now seen corresponding path program 61 times [2018-04-13 05:35:32,539 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:35:32,539 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:35:32,540 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:35:32,540 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 05:35:32,540 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:35:32,584 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:35:32,585 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:35:33,817 INFO L134 CoverageAnalysis]: Checked inductivity of 17956 backedges. 0 proven. 8978 refuted. 0 times theorem prover too weak. 8978 trivial. 0 not checked. [2018-04-13 05:35:33,817 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:35:33,818 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:35:33,818 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 05:35:33,851 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:35:33,860 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:35:35,264 INFO L134 CoverageAnalysis]: Checked inductivity of 17956 backedges. 0 proven. 8978 refuted. 0 times theorem prover too weak. 8978 trivial. 0 not checked. [2018-04-13 05:35:35,265 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:35:35,265 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [72, 71] total 140 [2018-04-13 05:35:35,265 INFO L442 AbstractCegarLoop]: Interpolant automaton has 140 states [2018-04-13 05:35:35,266 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 140 interpolants. [2018-04-13 05:35:35,267 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7246, Invalid=12214, Unknown=0, NotChecked=0, Total=19460 [2018-04-13 05:35:35,267 INFO L87 Difference]: Start difference. First operand 574 states and 575 transitions. Second operand 140 states. [2018-04-13 05:35:36,179 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:35:36,179 INFO L93 Difference]: Finished difference Result 586 states and 587 transitions. [2018-04-13 05:35:36,179 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 72 states. [2018-04-13 05:35:36,179 INFO L78 Accepts]: Start accepts. Automaton has 140 states. Word has length 563 [2018-04-13 05:35:36,179 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:35:36,180 INFO L225 Difference]: With dead ends: 586 [2018-04-13 05:35:36,181 INFO L226 Difference]: Without dead ends: 586 [2018-04-13 05:35:36,181 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 635 GetRequests, 495 SyntacticMatches, 1 SemanticMatches, 139 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9177 ImplicationChecksByTransitivity, 2.2s TimeCoverageRelationStatistics Valid=7385, Invalid=12355, Unknown=0, NotChecked=0, Total=19740 [2018-04-13 05:35:36,181 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 586 states. [2018-04-13 05:35:36,184 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 586 to 582. [2018-04-13 05:35:36,184 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 582 states. [2018-04-13 05:35:36,184 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 582 states to 582 states and 583 transitions. [2018-04-13 05:35:36,184 INFO L78 Accepts]: Start accepts. Automaton has 582 states and 583 transitions. Word has length 563 [2018-04-13 05:35:36,184 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:35:36,184 INFO L459 AbstractCegarLoop]: Abstraction has 582 states and 583 transitions. [2018-04-13 05:35:36,184 INFO L460 AbstractCegarLoop]: Interpolant automaton has 140 states. [2018-04-13 05:35:36,184 INFO L276 IsEmpty]: Start isEmpty. Operand 582 states and 583 transitions. [2018-04-13 05:35:36,186 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 572 [2018-04-13 05:35:36,186 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:35:36,186 INFO L355 BasicCegarLoop]: trace histogram [69, 69, 68, 68, 68, 68, 68, 68, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:35:36,186 INFO L408 AbstractCegarLoop]: === Iteration 74 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:35:36,187 INFO L82 PathProgramCache]: Analyzing trace with hash 2011582410, now seen corresponding path program 62 times [2018-04-13 05:35:36,187 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:35:36,187 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:35:36,187 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:35:36,187 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 05:35:36,187 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:35:36,237 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:35:36,238 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:35:37,378 INFO L134 CoverageAnalysis]: Checked inductivity of 18496 backedges. 0 proven. 9248 refuted. 0 times theorem prover too weak. 9248 trivial. 0 not checked. [2018-04-13 05:35:37,378 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:35:37,378 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:35:37,378 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-04-13 05:35:37,435 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-04-13 05:35:37,435 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 05:35:37,446 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:35:37,553 INFO L134 CoverageAnalysis]: Checked inductivity of 18496 backedges. 0 proven. 9248 refuted. 0 times theorem prover too weak. 9248 trivial. 0 not checked. [2018-04-13 05:35:37,553 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:35:37,553 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [73, 71] total 74 [2018-04-13 05:35:37,553 INFO L442 AbstractCegarLoop]: Interpolant automaton has 74 states [2018-04-13 05:35:37,554 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 74 interpolants. [2018-04-13 05:35:37,554 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2560, Invalid=2842, Unknown=0, NotChecked=0, Total=5402 [2018-04-13 05:35:37,554 INFO L87 Difference]: Start difference. First operand 582 states and 583 transitions. Second operand 74 states. [2018-04-13 05:35:39,121 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:35:39,121 INFO L93 Difference]: Finished difference Result 594 states and 595 transitions. [2018-04-13 05:35:39,121 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 73 states. [2018-04-13 05:35:39,121 INFO L78 Accepts]: Start accepts. Automaton has 74 states. Word has length 571 [2018-04-13 05:35:39,121 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:35:39,122 INFO L225 Difference]: With dead ends: 594 [2018-04-13 05:35:39,122 INFO L226 Difference]: Without dead ends: 594 [2018-04-13 05:35:39,123 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 781 GetRequests, 640 SyntacticMatches, 0 SemanticMatches, 141 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2615 ImplicationChecksByTransitivity, 2.1s TimeCoverageRelationStatistics Valid=7529, Invalid=12777, Unknown=0, NotChecked=0, Total=20306 [2018-04-13 05:35:39,123 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 594 states. [2018-04-13 05:35:39,125 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 594 to 590. [2018-04-13 05:35:39,125 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 590 states. [2018-04-13 05:35:39,125 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 590 states to 590 states and 591 transitions. [2018-04-13 05:35:39,125 INFO L78 Accepts]: Start accepts. Automaton has 590 states and 591 transitions. Word has length 571 [2018-04-13 05:35:39,125 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:35:39,125 INFO L459 AbstractCegarLoop]: Abstraction has 590 states and 591 transitions. [2018-04-13 05:35:39,125 INFO L460 AbstractCegarLoop]: Interpolant automaton has 74 states. [2018-04-13 05:35:39,126 INFO L276 IsEmpty]: Start isEmpty. Operand 590 states and 591 transitions. [2018-04-13 05:35:39,127 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 580 [2018-04-13 05:35:39,127 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:35:39,127 INFO L355 BasicCegarLoop]: trace histogram [70, 70, 69, 69, 69, 69, 69, 69, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:35:39,128 INFO L408 AbstractCegarLoop]: === Iteration 75 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:35:39,128 INFO L82 PathProgramCache]: Analyzing trace with hash 99038634, now seen corresponding path program 63 times [2018-04-13 05:35:39,128 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:35:39,128 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:35:39,128 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:35:39,128 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 05:35:39,128 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:35:39,172 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:35:39,173 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:35:40,405 INFO L134 CoverageAnalysis]: Checked inductivity of 19044 backedges. 0 proven. 9522 refuted. 0 times theorem prover too weak. 9522 trivial. 0 not checked. [2018-04-13 05:35:40,405 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:35:40,406 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:35:40,406 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-04-13 05:35:40,524 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 70 check-sat command(s) [2018-04-13 05:35:40,524 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 05:35:40,562 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:35:40,711 INFO L134 CoverageAnalysis]: Checked inductivity of 19044 backedges. 0 proven. 9522 refuted. 0 times theorem prover too weak. 9522 trivial. 0 not checked. [2018-04-13 05:35:40,712 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:35:40,712 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [74, 72] total 75 [2018-04-13 05:35:40,712 INFO L442 AbstractCegarLoop]: Interpolant automaton has 75 states [2018-04-13 05:35:40,713 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 75 interpolants. [2018-04-13 05:35:40,713 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2632, Invalid=2918, Unknown=0, NotChecked=0, Total=5550 [2018-04-13 05:35:40,713 INFO L87 Difference]: Start difference. First operand 590 states and 591 transitions. Second operand 75 states. [2018-04-13 05:35:42,252 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:35:42,252 INFO L93 Difference]: Finished difference Result 602 states and 603 transitions. [2018-04-13 05:35:42,253 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 74 states. [2018-04-13 05:35:42,253 INFO L78 Accepts]: Start accepts. Automaton has 75 states. Word has length 579 [2018-04-13 05:35:42,253 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:35:42,254 INFO L225 Difference]: With dead ends: 602 [2018-04-13 05:35:42,254 INFO L226 Difference]: Without dead ends: 602 [2018-04-13 05:35:42,255 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 792 GetRequests, 649 SyntacticMatches, 0 SemanticMatches, 143 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2688 ImplicationChecksByTransitivity, 2.2s TimeCoverageRelationStatistics Valid=7743, Invalid=13137, Unknown=0, NotChecked=0, Total=20880 [2018-04-13 05:35:42,255 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 602 states. [2018-04-13 05:35:42,257 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 602 to 598. [2018-04-13 05:35:42,258 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 598 states. [2018-04-13 05:35:42,258 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 598 states to 598 states and 599 transitions. [2018-04-13 05:35:42,258 INFO L78 Accepts]: Start accepts. Automaton has 598 states and 599 transitions. Word has length 579 [2018-04-13 05:35:42,258 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:35:42,258 INFO L459 AbstractCegarLoop]: Abstraction has 598 states and 599 transitions. [2018-04-13 05:35:42,258 INFO L460 AbstractCegarLoop]: Interpolant automaton has 75 states. [2018-04-13 05:35:42,258 INFO L276 IsEmpty]: Start isEmpty. Operand 598 states and 599 transitions. [2018-04-13 05:35:42,260 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 588 [2018-04-13 05:35:42,260 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:35:42,260 INFO L355 BasicCegarLoop]: trace histogram [71, 71, 70, 70, 70, 70, 70, 70, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:35:42,261 INFO L408 AbstractCegarLoop]: === Iteration 76 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:35:42,261 INFO L82 PathProgramCache]: Analyzing trace with hash 1556948106, now seen corresponding path program 64 times [2018-04-13 05:35:42,261 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:35:42,261 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:35:42,261 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:35:42,262 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 05:35:42,262 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:35:42,311 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:35:42,312 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:35:43,579 INFO L134 CoverageAnalysis]: Checked inductivity of 19600 backedges. 0 proven. 9800 refuted. 0 times theorem prover too weak. 9800 trivial. 0 not checked. [2018-04-13 05:35:43,579 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:35:43,579 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:35:43,579 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-04-13 05:35:43,742 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-04-13 05:35:43,742 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 05:35:43,793 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:35:43,807 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-13 05:35:43,807 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 05:35:43,810 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:35:43,810 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:12, output treesize:11 [2018-04-13 05:35:50,097 INFO L134 CoverageAnalysis]: Checked inductivity of 19600 backedges. 9800 proven. 9800 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-13 05:35:50,097 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:35:50,097 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [75, 146] total 219 [2018-04-13 05:35:50,098 INFO L442 AbstractCegarLoop]: Interpolant automaton has 219 states [2018-04-13 05:35:50,099 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 219 interpolants. [2018-04-13 05:35:50,100 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=10658, Invalid=37084, Unknown=0, NotChecked=0, Total=47742 [2018-04-13 05:35:50,100 INFO L87 Difference]: Start difference. First operand 598 states and 599 transitions. Second operand 219 states. [2018-04-13 05:35:53,563 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:35:53,563 INFO L93 Difference]: Finished difference Result 610 states and 611 transitions. [2018-04-13 05:35:53,563 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 78 states. [2018-04-13 05:35:53,563 INFO L78 Accepts]: Start accepts. Automaton has 219 states. Word has length 587 [2018-04-13 05:35:53,563 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:35:53,564 INFO L225 Difference]: With dead ends: 610 [2018-04-13 05:35:53,564 INFO L226 Difference]: Without dead ends: 610 [2018-04-13 05:35:53,566 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 736 GetRequests, 444 SyntacticMatches, 1 SemanticMatches, 291 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 35709 ImplicationChecksByTransitivity, 8.6s TimeCoverageRelationStatistics Valid=18625, Invalid=66931, Unknown=0, NotChecked=0, Total=85556 [2018-04-13 05:35:53,567 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 610 states. [2018-04-13 05:35:53,569 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 610 to 606. [2018-04-13 05:35:53,569 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 606 states. [2018-04-13 05:35:53,570 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 606 states to 606 states and 607 transitions. [2018-04-13 05:35:53,570 INFO L78 Accepts]: Start accepts. Automaton has 606 states and 607 transitions. Word has length 587 [2018-04-13 05:35:53,570 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:35:53,570 INFO L459 AbstractCegarLoop]: Abstraction has 606 states and 607 transitions. [2018-04-13 05:35:53,570 INFO L460 AbstractCegarLoop]: Interpolant automaton has 219 states. [2018-04-13 05:35:53,570 INFO L276 IsEmpty]: Start isEmpty. Operand 606 states and 607 transitions. [2018-04-13 05:35:53,572 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 596 [2018-04-13 05:35:53,572 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:35:53,572 INFO L355 BasicCegarLoop]: trace histogram [72, 72, 71, 71, 71, 71, 71, 71, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:35:53,572 INFO L408 AbstractCegarLoop]: === Iteration 77 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:35:53,572 INFO L82 PathProgramCache]: Analyzing trace with hash 1726127210, now seen corresponding path program 65 times [2018-04-13 05:35:53,572 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:35:53,572 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:35:53,573 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:35:53,573 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 05:35:53,573 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:35:53,617 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:35:53,619 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:35:54,891 INFO L134 CoverageAnalysis]: Checked inductivity of 20164 backedges. 0 proven. 10082 refuted. 0 times theorem prover too weak. 10082 trivial. 0 not checked. [2018-04-13 05:35:54,891 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:35:54,914 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:35:54,915 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-04-13 05:35:55,065 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 72 check-sat command(s) [2018-04-13 05:35:55,066 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 05:35:55,079 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:35:55,199 INFO L134 CoverageAnalysis]: Checked inductivity of 20164 backedges. 0 proven. 10082 refuted. 0 times theorem prover too weak. 10082 trivial. 0 not checked. [2018-04-13 05:35:55,200 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:35:55,200 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [76, 74] total 77 [2018-04-13 05:35:55,200 INFO L442 AbstractCegarLoop]: Interpolant automaton has 77 states [2018-04-13 05:35:55,201 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 77 interpolants. [2018-04-13 05:35:55,201 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2779, Invalid=3073, Unknown=0, NotChecked=0, Total=5852 [2018-04-13 05:35:55,201 INFO L87 Difference]: Start difference. First operand 606 states and 607 transitions. Second operand 77 states. [2018-04-13 05:35:56,812 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:35:56,813 INFO L93 Difference]: Finished difference Result 618 states and 619 transitions. [2018-04-13 05:35:56,813 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 76 states. [2018-04-13 05:35:56,813 INFO L78 Accepts]: Start accepts. Automaton has 77 states. Word has length 595 [2018-04-13 05:35:56,813 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:35:56,814 INFO L225 Difference]: With dead ends: 618 [2018-04-13 05:35:56,814 INFO L226 Difference]: Without dead ends: 618 [2018-04-13 05:35:56,815 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 814 GetRequests, 667 SyntacticMatches, 0 SemanticMatches, 147 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2837 ImplicationChecksByTransitivity, 2.2s TimeCoverageRelationStatistics Valid=8180, Invalid=13872, Unknown=0, NotChecked=0, Total=22052 [2018-04-13 05:35:56,815 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 618 states. [2018-04-13 05:35:56,817 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 618 to 614. [2018-04-13 05:35:56,817 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 614 states. [2018-04-13 05:35:56,817 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 614 states to 614 states and 615 transitions. [2018-04-13 05:35:56,818 INFO L78 Accepts]: Start accepts. Automaton has 614 states and 615 transitions. Word has length 595 [2018-04-13 05:35:56,818 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:35:56,818 INFO L459 AbstractCegarLoop]: Abstraction has 614 states and 615 transitions. [2018-04-13 05:35:56,818 INFO L460 AbstractCegarLoop]: Interpolant automaton has 77 states. [2018-04-13 05:35:56,818 INFO L276 IsEmpty]: Start isEmpty. Operand 614 states and 615 transitions. [2018-04-13 05:35:56,820 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 604 [2018-04-13 05:35:56,820 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:35:56,820 INFO L355 BasicCegarLoop]: trace histogram [73, 73, 72, 72, 72, 72, 72, 72, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:35:56,820 INFO L408 AbstractCegarLoop]: === Iteration 78 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:35:56,820 INFO L82 PathProgramCache]: Analyzing trace with hash -30270134, now seen corresponding path program 66 times [2018-04-13 05:35:56,820 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:35:56,820 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:35:56,821 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:35:56,821 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 05:35:56,821 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:35:56,868 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:35:56,869 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:35:58,179 INFO L134 CoverageAnalysis]: Checked inductivity of 20736 backedges. 0 proven. 10368 refuted. 0 times theorem prover too weak. 10368 trivial. 0 not checked. [2018-04-13 05:35:58,180 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:35:58,180 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:35:58,180 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-04-13 05:35:58,373 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 73 check-sat command(s) [2018-04-13 05:35:58,373 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 05:35:58,410 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:35:58,528 INFO L134 CoverageAnalysis]: Checked inductivity of 20736 backedges. 0 proven. 10368 refuted. 0 times theorem prover too weak. 10368 trivial. 0 not checked. [2018-04-13 05:35:58,529 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:35:58,529 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [77, 75] total 78 [2018-04-13 05:35:58,529 INFO L442 AbstractCegarLoop]: Interpolant automaton has 78 states [2018-04-13 05:35:58,530 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 78 interpolants. [2018-04-13 05:35:58,530 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2854, Invalid=3152, Unknown=0, NotChecked=0, Total=6006 [2018-04-13 05:35:58,530 INFO L87 Difference]: Start difference. First operand 614 states and 615 transitions. Second operand 78 states. [2018-04-13 05:36:00,174 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:36:00,174 INFO L93 Difference]: Finished difference Result 626 states and 627 transitions. [2018-04-13 05:36:00,206 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 77 states. [2018-04-13 05:36:00,206 INFO L78 Accepts]: Start accepts. Automaton has 78 states. Word has length 603 [2018-04-13 05:36:00,206 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:36:00,207 INFO L225 Difference]: With dead ends: 626 [2018-04-13 05:36:00,207 INFO L226 Difference]: Without dead ends: 626 [2018-04-13 05:36:00,208 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 825 GetRequests, 676 SyntacticMatches, 0 SemanticMatches, 149 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2913 ImplicationChecksByTransitivity, 2.3s TimeCoverageRelationStatistics Valid=8403, Invalid=14247, Unknown=0, NotChecked=0, Total=22650 [2018-04-13 05:36:00,208 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 626 states. [2018-04-13 05:36:00,210 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 626 to 622. [2018-04-13 05:36:00,211 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 622 states. [2018-04-13 05:36:00,211 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 622 states to 622 states and 623 transitions. [2018-04-13 05:36:00,211 INFO L78 Accepts]: Start accepts. Automaton has 622 states and 623 transitions. Word has length 603 [2018-04-13 05:36:00,211 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:36:00,211 INFO L459 AbstractCegarLoop]: Abstraction has 622 states and 623 transitions. [2018-04-13 05:36:00,211 INFO L460 AbstractCegarLoop]: Interpolant automaton has 78 states. [2018-04-13 05:36:00,211 INFO L276 IsEmpty]: Start isEmpty. Operand 622 states and 623 transitions. [2018-04-13 05:36:00,239 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 612 [2018-04-13 05:36:00,239 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:36:00,239 INFO L355 BasicCegarLoop]: trace histogram [74, 74, 73, 73, 73, 73, 73, 73, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:36:00,239 INFO L408 AbstractCegarLoop]: === Iteration 79 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:36:00,239 INFO L82 PathProgramCache]: Analyzing trace with hash 210118442, now seen corresponding path program 67 times [2018-04-13 05:36:00,240 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:36:00,240 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:36:00,240 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:36:00,240 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 05:36:00,240 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:36:00,291 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:36:00,292 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:36:01,832 INFO L134 CoverageAnalysis]: Checked inductivity of 21316 backedges. 0 proven. 10658 refuted. 0 times theorem prover too weak. 10658 trivial. 0 not checked. [2018-04-13 05:36:01,832 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:36:01,832 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:36:01,833 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 05:36:01,881 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:36:01,895 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:36:03,561 INFO L134 CoverageAnalysis]: Checked inductivity of 21316 backedges. 0 proven. 10658 refuted. 0 times theorem prover too weak. 10658 trivial. 0 not checked. [2018-04-13 05:36:03,562 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:36:03,562 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [78, 77] total 152 [2018-04-13 05:36:03,562 INFO L442 AbstractCegarLoop]: Interpolant automaton has 152 states [2018-04-13 05:36:03,563 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 152 interpolants. [2018-04-13 05:36:03,563 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=8551, Invalid=14401, Unknown=0, NotChecked=0, Total=22952 [2018-04-13 05:36:03,563 INFO L87 Difference]: Start difference. First operand 622 states and 623 transitions. Second operand 152 states. [2018-04-13 05:36:04,736 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:36:04,736 INFO L93 Difference]: Finished difference Result 634 states and 635 transitions. [2018-04-13 05:36:04,736 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 78 states. [2018-04-13 05:36:04,736 INFO L78 Accepts]: Start accepts. Automaton has 152 states. Word has length 611 [2018-04-13 05:36:04,736 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:36:04,737 INFO L225 Difference]: With dead ends: 634 [2018-04-13 05:36:04,737 INFO L226 Difference]: Without dead ends: 634 [2018-04-13 05:36:04,738 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 689 GetRequests, 537 SyntacticMatches, 1 SemanticMatches, 151 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10875 ImplicationChecksByTransitivity, 2.7s TimeCoverageRelationStatistics Valid=8702, Invalid=14554, Unknown=0, NotChecked=0, Total=23256 [2018-04-13 05:36:04,738 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 634 states. [2018-04-13 05:36:04,740 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 634 to 630. [2018-04-13 05:36:04,740 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 630 states. [2018-04-13 05:36:04,740 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 630 states to 630 states and 631 transitions. [2018-04-13 05:36:04,741 INFO L78 Accepts]: Start accepts. Automaton has 630 states and 631 transitions. Word has length 611 [2018-04-13 05:36:04,741 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:36:04,741 INFO L459 AbstractCegarLoop]: Abstraction has 630 states and 631 transitions. [2018-04-13 05:36:04,741 INFO L460 AbstractCegarLoop]: Interpolant automaton has 152 states. [2018-04-13 05:36:04,741 INFO L276 IsEmpty]: Start isEmpty. Operand 630 states and 631 transitions. [2018-04-13 05:36:04,743 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 620 [2018-04-13 05:36:04,743 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:36:04,743 INFO L355 BasicCegarLoop]: trace histogram [75, 75, 74, 74, 74, 74, 74, 74, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:36:04,743 INFO L408 AbstractCegarLoop]: === Iteration 80 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:36:04,743 INFO L82 PathProgramCache]: Analyzing trace with hash -1419167222, now seen corresponding path program 68 times [2018-04-13 05:36:04,743 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:36:04,743 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:36:04,744 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:36:04,744 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 05:36:04,744 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:36:04,797 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:36:04,798 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:36:06,193 INFO L134 CoverageAnalysis]: Checked inductivity of 21904 backedges. 0 proven. 10952 refuted. 0 times theorem prover too weak. 10952 trivial. 0 not checked. [2018-04-13 05:36:06,193 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:36:06,193 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:36:06,193 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-04-13 05:36:06,264 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-04-13 05:36:06,264 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 05:36:06,278 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:36:06,403 INFO L134 CoverageAnalysis]: Checked inductivity of 21904 backedges. 0 proven. 10952 refuted. 0 times theorem prover too weak. 10952 trivial. 0 not checked. [2018-04-13 05:36:06,403 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:36:06,403 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [79, 77] total 80 [2018-04-13 05:36:06,403 INFO L442 AbstractCegarLoop]: Interpolant automaton has 80 states [2018-04-13 05:36:06,404 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 80 interpolants. [2018-04-13 05:36:06,404 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3007, Invalid=3313, Unknown=0, NotChecked=0, Total=6320 [2018-04-13 05:36:06,404 INFO L87 Difference]: Start difference. First operand 630 states and 631 transitions. Second operand 80 states. [2018-04-13 05:36:08,119 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:36:08,119 INFO L93 Difference]: Finished difference Result 642 states and 643 transitions. [2018-04-13 05:36:08,119 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 79 states. [2018-04-13 05:36:08,119 INFO L78 Accepts]: Start accepts. Automaton has 80 states. Word has length 619 [2018-04-13 05:36:08,120 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:36:08,121 INFO L225 Difference]: With dead ends: 642 [2018-04-13 05:36:08,121 INFO L226 Difference]: Without dead ends: 642 [2018-04-13 05:36:08,122 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 847 GetRequests, 694 SyntacticMatches, 0 SemanticMatches, 153 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3068 ImplicationChecksByTransitivity, 2.4s TimeCoverageRelationStatistics Valid=8858, Invalid=15012, Unknown=0, NotChecked=0, Total=23870 [2018-04-13 05:36:08,122 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 642 states. [2018-04-13 05:36:08,124 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 642 to 638. [2018-04-13 05:36:08,124 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 638 states. [2018-04-13 05:36:08,125 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 638 states to 638 states and 639 transitions. [2018-04-13 05:36:08,125 INFO L78 Accepts]: Start accepts. Automaton has 638 states and 639 transitions. Word has length 619 [2018-04-13 05:36:08,125 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:36:08,125 INFO L459 AbstractCegarLoop]: Abstraction has 638 states and 639 transitions. [2018-04-13 05:36:08,125 INFO L460 AbstractCegarLoop]: Interpolant automaton has 80 states. [2018-04-13 05:36:08,125 INFO L276 IsEmpty]: Start isEmpty. Operand 638 states and 639 transitions. [2018-04-13 05:36:08,127 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 628 [2018-04-13 05:36:08,127 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:36:08,127 INFO L355 BasicCegarLoop]: trace histogram [76, 76, 75, 75, 75, 75, 75, 75, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:36:08,128 INFO L408 AbstractCegarLoop]: === Iteration 81 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:36:08,128 INFO L82 PathProgramCache]: Analyzing trace with hash 1143330282, now seen corresponding path program 69 times [2018-04-13 05:36:08,128 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:36:08,128 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:36:08,128 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:36:08,128 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 05:36:08,128 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:36:08,183 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:36:08,184 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:36:09,544 INFO L134 CoverageAnalysis]: Checked inductivity of 22500 backedges. 0 proven. 11250 refuted. 0 times theorem prover too weak. 11250 trivial. 0 not checked. [2018-04-13 05:36:09,544 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:36:09,544 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:36:09,544 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-04-13 05:36:09,708 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 76 check-sat command(s) [2018-04-13 05:36:09,708 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 05:36:09,772 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:36:11,486 INFO L134 CoverageAnalysis]: Checked inductivity of 22500 backedges. 0 proven. 11250 refuted. 0 times theorem prover too weak. 11250 trivial. 0 not checked. [2018-04-13 05:36:11,486 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:36:11,486 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [80, 79] total 156 [2018-04-13 05:36:11,487 INFO L442 AbstractCegarLoop]: Interpolant automaton has 156 states [2018-04-13 05:36:11,487 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 156 interpolants. [2018-04-13 05:36:11,488 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9010, Invalid=15170, Unknown=0, NotChecked=0, Total=24180 [2018-04-13 05:36:11,488 INFO L87 Difference]: Start difference. First operand 638 states and 639 transitions. Second operand 156 states. [2018-04-13 05:36:12,687 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:36:12,687 INFO L93 Difference]: Finished difference Result 650 states and 651 transitions. [2018-04-13 05:36:12,688 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 80 states. [2018-04-13 05:36:12,688 INFO L78 Accepts]: Start accepts. Automaton has 156 states. Word has length 627 [2018-04-13 05:36:12,688 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:36:12,689 INFO L225 Difference]: With dead ends: 650 [2018-04-13 05:36:12,689 INFO L226 Difference]: Without dead ends: 650 [2018-04-13 05:36:12,690 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 707 GetRequests, 551 SyntacticMatches, 1 SemanticMatches, 155 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11473 ImplicationChecksByTransitivity, 2.5s TimeCoverageRelationStatistics Valid=9165, Invalid=15327, Unknown=0, NotChecked=0, Total=24492 [2018-04-13 05:36:12,690 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 650 states. [2018-04-13 05:36:12,692 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 650 to 646. [2018-04-13 05:36:12,692 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 646 states. [2018-04-13 05:36:12,692 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 646 states to 646 states and 647 transitions. [2018-04-13 05:36:12,692 INFO L78 Accepts]: Start accepts. Automaton has 646 states and 647 transitions. Word has length 627 [2018-04-13 05:36:12,693 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:36:12,693 INFO L459 AbstractCegarLoop]: Abstraction has 646 states and 647 transitions. [2018-04-13 05:36:12,693 INFO L460 AbstractCegarLoop]: Interpolant automaton has 156 states. [2018-04-13 05:36:12,693 INFO L276 IsEmpty]: Start isEmpty. Operand 646 states and 647 transitions. [2018-04-13 05:36:12,695 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 636 [2018-04-13 05:36:12,695 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:36:12,695 INFO L355 BasicCegarLoop]: trace histogram [77, 77, 76, 76, 76, 76, 76, 76, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:36:12,695 INFO L408 AbstractCegarLoop]: === Iteration 82 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:36:12,695 INFO L82 PathProgramCache]: Analyzing trace with hash -1345946934, now seen corresponding path program 70 times [2018-04-13 05:36:12,695 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:36:12,695 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:36:12,696 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:36:12,696 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 05:36:12,696 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:36:12,746 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:36:12,747 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:36:14,162 INFO L134 CoverageAnalysis]: Checked inductivity of 23104 backedges. 0 proven. 11552 refuted. 0 times theorem prover too weak. 11552 trivial. 0 not checked. [2018-04-13 05:36:14,162 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:36:14,162 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:36:14,162 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-04-13 05:36:14,418 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-04-13 05:36:14,418 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 05:36:14,488 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:36:14,491 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-13 05:36:14,491 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 05:36:14,493 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:36:14,493 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:12, output treesize:11 [2018-04-13 05:36:21,850 INFO L134 CoverageAnalysis]: Checked inductivity of 23104 backedges. 11552 proven. 11552 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-13 05:36:21,850 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:36:21,850 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [81, 158] total 237 [2018-04-13 05:36:21,851 INFO L442 AbstractCegarLoop]: Interpolant automaton has 237 states [2018-04-13 05:36:21,852 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 237 interpolants. [2018-04-13 05:36:21,853 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=12482, Invalid=43450, Unknown=0, NotChecked=0, Total=55932 [2018-04-13 05:36:21,853 INFO L87 Difference]: Start difference. First operand 646 states and 647 transitions. Second operand 237 states. [2018-04-13 05:36:26,007 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:36:26,007 INFO L93 Difference]: Finished difference Result 658 states and 659 transitions. [2018-04-13 05:36:26,008 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 84 states. [2018-04-13 05:36:26,008 INFO L78 Accepts]: Start accepts. Automaton has 237 states. Word has length 635 [2018-04-13 05:36:26,008 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:36:26,009 INFO L225 Difference]: With dead ends: 658 [2018-04-13 05:36:26,009 INFO L226 Difference]: Without dead ends: 658 [2018-04-13 05:36:26,013 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 796 GetRequests, 480 SyntacticMatches, 1 SemanticMatches, 315 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 41961 ImplicationChecksByTransitivity, 10.0s TimeCoverageRelationStatistics Valid=21814, Invalid=78358, Unknown=0, NotChecked=0, Total=100172 [2018-04-13 05:36:26,013 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 658 states. [2018-04-13 05:36:26,016 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 658 to 654. [2018-04-13 05:36:26,016 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 654 states. [2018-04-13 05:36:26,016 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 654 states to 654 states and 655 transitions. [2018-04-13 05:36:26,016 INFO L78 Accepts]: Start accepts. Automaton has 654 states and 655 transitions. Word has length 635 [2018-04-13 05:36:26,017 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:36:26,017 INFO L459 AbstractCegarLoop]: Abstraction has 654 states and 655 transitions. [2018-04-13 05:36:26,017 INFO L460 AbstractCegarLoop]: Interpolant automaton has 237 states. [2018-04-13 05:36:26,017 INFO L276 IsEmpty]: Start isEmpty. Operand 654 states and 655 transitions. [2018-04-13 05:36:26,019 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 644 [2018-04-13 05:36:26,019 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:36:26,019 INFO L355 BasicCegarLoop]: trace histogram [78, 78, 77, 77, 77, 77, 77, 77, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:36:26,019 INFO L408 AbstractCegarLoop]: === Iteration 83 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:36:26,019 INFO L82 PathProgramCache]: Analyzing trace with hash 1461037226, now seen corresponding path program 71 times [2018-04-13 05:36:26,019 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:36:26,020 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:36:26,020 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:36:26,020 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 05:36:26,020 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:36:26,075 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:36:26,076 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:36:27,542 INFO L134 CoverageAnalysis]: Checked inductivity of 23716 backedges. 0 proven. 11858 refuted. 0 times theorem prover too weak. 11858 trivial. 0 not checked. [2018-04-13 05:36:27,542 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:36:27,543 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:36:27,543 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-04-13 05:36:27,724 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 78 check-sat command(s) [2018-04-13 05:36:27,725 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 05:36:27,740 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:36:27,875 INFO L134 CoverageAnalysis]: Checked inductivity of 23716 backedges. 0 proven. 11858 refuted. 0 times theorem prover too weak. 11858 trivial. 0 not checked. [2018-04-13 05:36:27,875 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:36:27,875 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [82, 80] total 83 [2018-04-13 05:36:27,876 INFO L442 AbstractCegarLoop]: Interpolant automaton has 83 states [2018-04-13 05:36:27,876 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 83 interpolants. [2018-04-13 05:36:27,876 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3244, Invalid=3562, Unknown=0, NotChecked=0, Total=6806 [2018-04-13 05:36:27,876 INFO L87 Difference]: Start difference. First operand 654 states and 655 transitions. Second operand 83 states. [2018-04-13 05:36:29,737 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:36:29,737 INFO L93 Difference]: Finished difference Result 666 states and 667 transitions. [2018-04-13 05:36:29,737 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 82 states. [2018-04-13 05:36:29,737 INFO L78 Accepts]: Start accepts. Automaton has 83 states. Word has length 643 [2018-04-13 05:36:29,737 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:36:29,738 INFO L225 Difference]: With dead ends: 666 [2018-04-13 05:36:29,738 INFO L226 Difference]: Without dead ends: 666 [2018-04-13 05:36:29,739 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 880 GetRequests, 721 SyntacticMatches, 0 SemanticMatches, 159 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3308 ImplicationChecksByTransitivity, 2.6s TimeCoverageRelationStatistics Valid=9563, Invalid=16197, Unknown=0, NotChecked=0, Total=25760 [2018-04-13 05:36:29,739 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 666 states. [2018-04-13 05:36:29,741 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 666 to 662. [2018-04-13 05:36:29,741 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 662 states. [2018-04-13 05:36:29,742 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 662 states to 662 states and 663 transitions. [2018-04-13 05:36:29,742 INFO L78 Accepts]: Start accepts. Automaton has 662 states and 663 transitions. Word has length 643 [2018-04-13 05:36:29,742 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:36:29,742 INFO L459 AbstractCegarLoop]: Abstraction has 662 states and 663 transitions. [2018-04-13 05:36:29,742 INFO L460 AbstractCegarLoop]: Interpolant automaton has 83 states. [2018-04-13 05:36:29,742 INFO L276 IsEmpty]: Start isEmpty. Operand 662 states and 663 transitions. [2018-04-13 05:36:29,744 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 652 [2018-04-13 05:36:29,744 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:36:29,745 INFO L355 BasicCegarLoop]: trace histogram [79, 79, 78, 78, 78, 78, 78, 78, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:36:29,745 INFO L408 AbstractCegarLoop]: === Iteration 84 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:36:29,745 INFO L82 PathProgramCache]: Analyzing trace with hash 1386078090, now seen corresponding path program 72 times [2018-04-13 05:36:29,745 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:36:29,745 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:36:29,745 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:36:29,745 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 05:36:29,745 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:36:29,800 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:36:29,801 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:36:31,269 INFO L134 CoverageAnalysis]: Checked inductivity of 24336 backedges. 0 proven. 12168 refuted. 0 times theorem prover too weak. 12168 trivial. 0 not checked. [2018-04-13 05:36:31,269 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:36:31,269 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:36:31,269 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-04-13 05:36:31,446 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 79 check-sat command(s) [2018-04-13 05:36:31,446 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 05:36:31,536 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:36:31,677 INFO L134 CoverageAnalysis]: Checked inductivity of 24336 backedges. 0 proven. 12168 refuted. 0 times theorem prover too weak. 12168 trivial. 0 not checked. [2018-04-13 05:36:31,677 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:36:31,677 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [83, 81] total 84 [2018-04-13 05:36:31,678 INFO L442 AbstractCegarLoop]: Interpolant automaton has 84 states [2018-04-13 05:36:31,678 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 84 interpolants. [2018-04-13 05:36:31,678 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3325, Invalid=3647, Unknown=0, NotChecked=0, Total=6972 [2018-04-13 05:36:31,678 INFO L87 Difference]: Start difference. First operand 662 states and 663 transitions. Second operand 84 states. [2018-04-13 05:36:33,585 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:36:33,585 INFO L93 Difference]: Finished difference Result 674 states and 675 transitions. [2018-04-13 05:36:33,585 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 83 states. [2018-04-13 05:36:33,585 INFO L78 Accepts]: Start accepts. Automaton has 84 states. Word has length 651 [2018-04-13 05:36:33,586 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:36:33,587 INFO L225 Difference]: With dead ends: 674 [2018-04-13 05:36:33,587 INFO L226 Difference]: Without dead ends: 674 [2018-04-13 05:36:33,588 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 891 GetRequests, 730 SyntacticMatches, 0 SemanticMatches, 161 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3390 ImplicationChecksByTransitivity, 2.7s TimeCoverageRelationStatistics Valid=9804, Invalid=16602, Unknown=0, NotChecked=0, Total=26406 [2018-04-13 05:36:33,588 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 674 states. [2018-04-13 05:36:33,591 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 674 to 670. [2018-04-13 05:36:33,591 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 670 states. [2018-04-13 05:36:33,591 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 670 states to 670 states and 671 transitions. [2018-04-13 05:36:33,591 INFO L78 Accepts]: Start accepts. Automaton has 670 states and 671 transitions. Word has length 651 [2018-04-13 05:36:33,592 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:36:33,592 INFO L459 AbstractCegarLoop]: Abstraction has 670 states and 671 transitions. [2018-04-13 05:36:33,592 INFO L460 AbstractCegarLoop]: Interpolant automaton has 84 states. [2018-04-13 05:36:33,592 INFO L276 IsEmpty]: Start isEmpty. Operand 670 states and 671 transitions. [2018-04-13 05:36:33,594 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 660 [2018-04-13 05:36:33,594 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:36:33,594 INFO L355 BasicCegarLoop]: trace histogram [80, 80, 79, 79, 79, 79, 79, 79, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:36:33,594 INFO L408 AbstractCegarLoop]: === Iteration 85 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:36:33,594 INFO L82 PathProgramCache]: Analyzing trace with hash -1968595094, now seen corresponding path program 73 times [2018-04-13 05:36:33,595 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:36:33,595 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:36:33,595 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:36:33,595 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 05:36:33,595 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:36:33,653 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:36:33,655 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:36:35,224 INFO L134 CoverageAnalysis]: Checked inductivity of 24964 backedges. 0 proven. 12482 refuted. 0 times theorem prover too weak. 12482 trivial. 0 not checked. [2018-04-13 05:36:35,224 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:36:35,224 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:36:35,225 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 05:36:35,270 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:36:35,281 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:36:37,202 INFO L134 CoverageAnalysis]: Checked inductivity of 24964 backedges. 0 proven. 12482 refuted. 0 times theorem prover too weak. 12482 trivial. 0 not checked. [2018-04-13 05:36:37,202 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:36:37,203 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [84, 83] total 164 [2018-04-13 05:36:37,203 INFO L442 AbstractCegarLoop]: Interpolant automaton has 164 states [2018-04-13 05:36:37,204 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 164 interpolants. [2018-04-13 05:36:37,204 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9964, Invalid=16768, Unknown=0, NotChecked=0, Total=26732 [2018-04-13 05:36:37,204 INFO L87 Difference]: Start difference. First operand 670 states and 671 transitions. Second operand 164 states. [2018-04-13 05:36:38,615 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:36:38,615 INFO L93 Difference]: Finished difference Result 682 states and 683 transitions. [2018-04-13 05:36:38,616 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 84 states. [2018-04-13 05:36:38,616 INFO L78 Accepts]: Start accepts. Automaton has 164 states. Word has length 659 [2018-04-13 05:36:38,616 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:36:38,617 INFO L225 Difference]: With dead ends: 682 [2018-04-13 05:36:38,617 INFO L226 Difference]: Without dead ends: 682 [2018-04-13 05:36:38,618 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 743 GetRequests, 579 SyntacticMatches, 1 SemanticMatches, 163 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12717 ImplicationChecksByTransitivity, 2.9s TimeCoverageRelationStatistics Valid=10127, Invalid=16933, Unknown=0, NotChecked=0, Total=27060 [2018-04-13 05:36:38,618 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 682 states. [2018-04-13 05:36:38,621 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 682 to 678. [2018-04-13 05:36:38,621 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 678 states. [2018-04-13 05:36:38,621 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 678 states to 678 states and 679 transitions. [2018-04-13 05:36:38,621 INFO L78 Accepts]: Start accepts. Automaton has 678 states and 679 transitions. Word has length 659 [2018-04-13 05:36:38,621 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:36:38,622 INFO L459 AbstractCegarLoop]: Abstraction has 678 states and 679 transitions. [2018-04-13 05:36:38,622 INFO L460 AbstractCegarLoop]: Interpolant automaton has 164 states. [2018-04-13 05:36:38,622 INFO L276 IsEmpty]: Start isEmpty. Operand 678 states and 679 transitions. [2018-04-13 05:36:38,624 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 668 [2018-04-13 05:36:38,624 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:36:38,624 INFO L355 BasicCegarLoop]: trace histogram [81, 81, 80, 80, 80, 80, 80, 80, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:36:38,624 INFO L408 AbstractCegarLoop]: === Iteration 86 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:36:38,624 INFO L82 PathProgramCache]: Analyzing trace with hash -683448246, now seen corresponding path program 74 times [2018-04-13 05:36:38,625 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:36:38,625 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:36:38,625 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:36:38,625 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 05:36:38,625 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:36:38,684 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:36:38,685 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:36:40,288 INFO L134 CoverageAnalysis]: Checked inductivity of 25600 backedges. 0 proven. 12800 refuted. 0 times theorem prover too weak. 12800 trivial. 0 not checked. [2018-04-13 05:36:40,288 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:36:40,288 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:36:40,289 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-04-13 05:36:40,370 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-04-13 05:36:40,371 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 05:36:40,385 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:36:40,530 INFO L134 CoverageAnalysis]: Checked inductivity of 25600 backedges. 0 proven. 12800 refuted. 0 times theorem prover too weak. 12800 trivial. 0 not checked. [2018-04-13 05:36:40,530 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:36:40,531 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [85, 83] total 86 [2018-04-13 05:36:40,531 INFO L442 AbstractCegarLoop]: Interpolant automaton has 86 states [2018-04-13 05:36:40,531 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 86 interpolants. [2018-04-13 05:36:40,532 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3490, Invalid=3820, Unknown=0, NotChecked=0, Total=7310 [2018-04-13 05:36:40,532 INFO L87 Difference]: Start difference. First operand 678 states and 679 transitions. Second operand 86 states. [2018-04-13 05:36:42,555 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:36:42,555 INFO L93 Difference]: Finished difference Result 690 states and 691 transitions. [2018-04-13 05:36:42,555 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 85 states. [2018-04-13 05:36:42,555 INFO L78 Accepts]: Start accepts. Automaton has 86 states. Word has length 667 [2018-04-13 05:36:42,556 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:36:42,557 INFO L225 Difference]: With dead ends: 690 [2018-04-13 05:36:42,557 INFO L226 Difference]: Without dead ends: 690 [2018-04-13 05:36:42,558 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 913 GetRequests, 748 SyntacticMatches, 0 SemanticMatches, 165 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3557 ImplicationChecksByTransitivity, 2.8s TimeCoverageRelationStatistics Valid=10295, Invalid=17427, Unknown=0, NotChecked=0, Total=27722 [2018-04-13 05:36:42,558 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 690 states. [2018-04-13 05:36:42,561 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 690 to 686. [2018-04-13 05:36:42,561 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 686 states. [2018-04-13 05:36:42,561 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 686 states to 686 states and 687 transitions. [2018-04-13 05:36:42,561 INFO L78 Accepts]: Start accepts. Automaton has 686 states and 687 transitions. Word has length 667 [2018-04-13 05:36:42,562 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:36:42,562 INFO L459 AbstractCegarLoop]: Abstraction has 686 states and 687 transitions. [2018-04-13 05:36:42,562 INFO L460 AbstractCegarLoop]: Interpolant automaton has 86 states. [2018-04-13 05:36:42,562 INFO L276 IsEmpty]: Start isEmpty. Operand 686 states and 687 transitions. [2018-04-13 05:36:42,564 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 676 [2018-04-13 05:36:42,564 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:36:42,564 INFO L355 BasicCegarLoop]: trace histogram [82, 82, 81, 81, 81, 81, 81, 81, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:36:42,564 INFO L408 AbstractCegarLoop]: === Iteration 87 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:36:42,565 INFO L82 PathProgramCache]: Analyzing trace with hash 540391978, now seen corresponding path program 75 times [2018-04-13 05:36:42,565 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:36:42,565 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:36:42,565 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:36:42,565 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 05:36:42,566 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:36:42,634 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:36:42,635 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:36:44,297 INFO L134 CoverageAnalysis]: Checked inductivity of 26244 backedges. 0 proven. 13122 refuted. 0 times theorem prover too weak. 13122 trivial. 0 not checked. [2018-04-13 05:36:44,297 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:36:44,297 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:36:44,297 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-04-13 05:36:44,464 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 82 check-sat command(s) [2018-04-13 05:36:44,465 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 05:36:44,523 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:36:44,700 INFO L134 CoverageAnalysis]: Checked inductivity of 26244 backedges. 0 proven. 13122 refuted. 0 times theorem prover too weak. 13122 trivial. 0 not checked. [2018-04-13 05:36:44,700 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:36:44,700 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [86, 84] total 87 [2018-04-13 05:36:44,701 INFO L442 AbstractCegarLoop]: Interpolant automaton has 87 states [2018-04-13 05:36:44,701 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 87 interpolants. [2018-04-13 05:36:44,701 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3574, Invalid=3908, Unknown=0, NotChecked=0, Total=7482 [2018-04-13 05:36:44,702 INFO L87 Difference]: Start difference. First operand 686 states and 687 transitions. Second operand 87 states. [2018-04-13 05:36:46,767 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:36:46,767 INFO L93 Difference]: Finished difference Result 698 states and 699 transitions. [2018-04-13 05:36:46,767 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 86 states. [2018-04-13 05:36:46,767 INFO L78 Accepts]: Start accepts. Automaton has 87 states. Word has length 675 [2018-04-13 05:36:46,767 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:36:46,769 INFO L225 Difference]: With dead ends: 698 [2018-04-13 05:36:46,769 INFO L226 Difference]: Without dead ends: 698 [2018-04-13 05:36:46,770 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 924 GetRequests, 757 SyntacticMatches, 0 SemanticMatches, 167 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3642 ImplicationChecksByTransitivity, 2.9s TimeCoverageRelationStatistics Valid=10545, Invalid=17847, Unknown=0, NotChecked=0, Total=28392 [2018-04-13 05:36:46,770 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 698 states. [2018-04-13 05:36:46,773 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 698 to 694. [2018-04-13 05:36:46,773 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 694 states. [2018-04-13 05:36:46,774 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 694 states to 694 states and 695 transitions. [2018-04-13 05:36:46,774 INFO L78 Accepts]: Start accepts. Automaton has 694 states and 695 transitions. Word has length 675 [2018-04-13 05:36:46,774 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:36:46,774 INFO L459 AbstractCegarLoop]: Abstraction has 694 states and 695 transitions. [2018-04-13 05:36:46,774 INFO L460 AbstractCegarLoop]: Interpolant automaton has 87 states. [2018-04-13 05:36:46,774 INFO L276 IsEmpty]: Start isEmpty. Operand 694 states and 695 transitions. [2018-04-13 05:36:46,776 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 684 [2018-04-13 05:36:46,776 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:36:46,776 INFO L355 BasicCegarLoop]: trace histogram [83, 83, 82, 82, 82, 82, 82, 82, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:36:46,776 INFO L408 AbstractCegarLoop]: === Iteration 88 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:36:46,777 INFO L82 PathProgramCache]: Analyzing trace with hash 2097878282, now seen corresponding path program 76 times [2018-04-13 05:36:46,777 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:36:46,777 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:36:46,777 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:36:46,777 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 05:36:46,777 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:36:46,837 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:36:46,838 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:36:48,513 INFO L134 CoverageAnalysis]: Checked inductivity of 26896 backedges. 0 proven. 13448 refuted. 0 times theorem prover too weak. 13448 trivial. 0 not checked. [2018-04-13 05:36:48,513 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:36:48,513 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:36:48,513 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-04-13 05:36:48,767 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-04-13 05:36:48,767 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 05:36:48,861 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:36:48,863 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-13 05:36:48,863 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 05:36:48,865 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:36:48,865 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:12, output treesize:11 [2018-04-13 05:36:57,308 INFO L134 CoverageAnalysis]: Checked inductivity of 26896 backedges. 13448 proven. 13448 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-13 05:36:57,309 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:36:57,309 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [87, 170] total 255 [2018-04-13 05:36:57,309 INFO L442 AbstractCegarLoop]: Interpolant automaton has 255 states [2018-04-13 05:36:57,310 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 255 interpolants. [2018-04-13 05:36:57,311 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=14450, Invalid=50320, Unknown=0, NotChecked=0, Total=64770 [2018-04-13 05:36:57,312 INFO L87 Difference]: Start difference. First operand 694 states and 695 transitions. Second operand 255 states. [2018-04-13 05:37:02,091 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:37:02,091 INFO L93 Difference]: Finished difference Result 706 states and 707 transitions. [2018-04-13 05:37:02,091 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 90 states. [2018-04-13 05:37:02,091 INFO L78 Accepts]: Start accepts. Automaton has 255 states. Word has length 683 [2018-04-13 05:37:02,091 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:37:02,093 INFO L225 Difference]: With dead ends: 706 [2018-04-13 05:37:02,093 INFO L226 Difference]: Without dead ends: 706 [2018-04-13 05:37:02,096 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 856 GetRequests, 516 SyntacticMatches, 1 SemanticMatches, 339 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 48717 ImplicationChecksByTransitivity, 11.5s TimeCoverageRelationStatistics Valid=25255, Invalid=90685, Unknown=0, NotChecked=0, Total=115940 [2018-04-13 05:37:02,096 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 706 states. [2018-04-13 05:37:02,099 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 706 to 702. [2018-04-13 05:37:02,099 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 702 states. [2018-04-13 05:37:02,100 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 702 states to 702 states and 703 transitions. [2018-04-13 05:37:02,100 INFO L78 Accepts]: Start accepts. Automaton has 702 states and 703 transitions. Word has length 683 [2018-04-13 05:37:02,100 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:37:02,100 INFO L459 AbstractCegarLoop]: Abstraction has 702 states and 703 transitions. [2018-04-13 05:37:02,100 INFO L460 AbstractCegarLoop]: Interpolant automaton has 255 states. [2018-04-13 05:37:02,100 INFO L276 IsEmpty]: Start isEmpty. Operand 702 states and 703 transitions. [2018-04-13 05:37:02,102 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 692 [2018-04-13 05:37:02,102 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:37:02,103 INFO L355 BasicCegarLoop]: trace histogram [84, 84, 83, 83, 83, 83, 83, 83, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:37:02,103 INFO L408 AbstractCegarLoop]: === Iteration 89 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:37:02,103 INFO L82 PathProgramCache]: Analyzing trace with hash 1426979050, now seen corresponding path program 77 times [2018-04-13 05:37:02,103 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:37:02,103 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:37:02,103 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:37:02,103 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 05:37:02,103 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:37:02,164 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:37:02,165 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:37:03,850 INFO L134 CoverageAnalysis]: Checked inductivity of 27556 backedges. 0 proven. 13778 refuted. 0 times theorem prover too weak. 13778 trivial. 0 not checked. [2018-04-13 05:37:03,850 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:37:03,850 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:37:03,851 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-04-13 05:37:04,076 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 84 check-sat command(s) [2018-04-13 05:37:04,077 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 05:37:04,094 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:37:04,249 INFO L134 CoverageAnalysis]: Checked inductivity of 27556 backedges. 0 proven. 13778 refuted. 0 times theorem prover too weak. 13778 trivial. 0 not checked. [2018-04-13 05:37:04,249 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:37:04,250 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [88, 86] total 89 [2018-04-13 05:37:04,250 INFO L442 AbstractCegarLoop]: Interpolant automaton has 89 states [2018-04-13 05:37:04,251 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 89 interpolants. [2018-04-13 05:37:04,251 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3745, Invalid=4087, Unknown=0, NotChecked=0, Total=7832 [2018-04-13 05:37:04,251 INFO L87 Difference]: Start difference. First operand 702 states and 703 transitions. Second operand 89 states. [2018-04-13 05:37:06,379 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:37:06,379 INFO L93 Difference]: Finished difference Result 714 states and 715 transitions. [2018-04-13 05:37:06,379 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 88 states. [2018-04-13 05:37:06,379 INFO L78 Accepts]: Start accepts. Automaton has 89 states. Word has length 691 [2018-04-13 05:37:06,379 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:37:06,380 INFO L225 Difference]: With dead ends: 714 [2018-04-13 05:37:06,380 INFO L226 Difference]: Without dead ends: 714 [2018-04-13 05:37:06,381 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 946 GetRequests, 775 SyntacticMatches, 0 SemanticMatches, 171 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3815 ImplicationChecksByTransitivity, 3.0s TimeCoverageRelationStatistics Valid=11054, Invalid=18702, Unknown=0, NotChecked=0, Total=29756 [2018-04-13 05:37:06,381 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 714 states. [2018-04-13 05:37:06,385 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 714 to 710. [2018-04-13 05:37:06,385 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 710 states. [2018-04-13 05:37:06,385 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 710 states to 710 states and 711 transitions. [2018-04-13 05:37:06,386 INFO L78 Accepts]: Start accepts. Automaton has 710 states and 711 transitions. Word has length 691 [2018-04-13 05:37:06,386 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:37:06,386 INFO L459 AbstractCegarLoop]: Abstraction has 710 states and 711 transitions. [2018-04-13 05:37:06,386 INFO L460 AbstractCegarLoop]: Interpolant automaton has 89 states. [2018-04-13 05:37:06,386 INFO L276 IsEmpty]: Start isEmpty. Operand 710 states and 711 transitions. [2018-04-13 05:37:06,388 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 700 [2018-04-13 05:37:06,388 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:37:06,388 INFO L355 BasicCegarLoop]: trace histogram [85, 85, 84, 84, 84, 84, 84, 84, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:37:06,388 INFO L408 AbstractCegarLoop]: === Iteration 90 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:37:06,389 INFO L82 PathProgramCache]: Analyzing trace with hash 2135483850, now seen corresponding path program 78 times [2018-04-13 05:37:06,389 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:37:06,389 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:37:06,389 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:37:06,389 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 05:37:06,389 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:37:06,462 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:37:06,463 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:37:08,199 INFO L134 CoverageAnalysis]: Checked inductivity of 28224 backedges. 0 proven. 14112 refuted. 0 times theorem prover too weak. 14112 trivial. 0 not checked. [2018-04-13 05:37:08,200 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:37:08,200 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:37:08,200 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-04-13 05:37:08,391 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 85 check-sat command(s) [2018-04-13 05:37:08,391 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 05:37:08,441 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:37:08,597 INFO L134 CoverageAnalysis]: Checked inductivity of 28224 backedges. 0 proven. 14112 refuted. 0 times theorem prover too weak. 14112 trivial. 0 not checked. [2018-04-13 05:37:08,597 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:37:08,597 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [89, 87] total 90 [2018-04-13 05:37:08,598 INFO L442 AbstractCegarLoop]: Interpolant automaton has 90 states [2018-04-13 05:37:08,599 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 90 interpolants. [2018-04-13 05:37:08,599 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3832, Invalid=4178, Unknown=0, NotChecked=0, Total=8010 [2018-04-13 05:37:08,599 INFO L87 Difference]: Start difference. First operand 710 states and 711 transitions. Second operand 90 states. [2018-04-13 05:37:10,791 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:37:10,791 INFO L93 Difference]: Finished difference Result 722 states and 723 transitions. [2018-04-13 05:37:10,791 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 89 states. [2018-04-13 05:37:10,791 INFO L78 Accepts]: Start accepts. Automaton has 90 states. Word has length 699 [2018-04-13 05:37:10,792 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:37:10,793 INFO L225 Difference]: With dead ends: 722 [2018-04-13 05:37:10,793 INFO L226 Difference]: Without dead ends: 722 [2018-04-13 05:37:10,794 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 957 GetRequests, 784 SyntacticMatches, 0 SemanticMatches, 173 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3903 ImplicationChecksByTransitivity, 3.1s TimeCoverageRelationStatistics Valid=11313, Invalid=19137, Unknown=0, NotChecked=0, Total=30450 [2018-04-13 05:37:10,794 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 722 states. [2018-04-13 05:37:10,798 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 722 to 718. [2018-04-13 05:37:10,798 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 718 states. [2018-04-13 05:37:10,799 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 718 states to 718 states and 719 transitions. [2018-04-13 05:37:10,799 INFO L78 Accepts]: Start accepts. Automaton has 718 states and 719 transitions. Word has length 699 [2018-04-13 05:37:10,800 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:37:10,800 INFO L459 AbstractCegarLoop]: Abstraction has 718 states and 719 transitions. [2018-04-13 05:37:10,800 INFO L460 AbstractCegarLoop]: Interpolant automaton has 90 states. [2018-04-13 05:37:10,800 INFO L276 IsEmpty]: Start isEmpty. Operand 718 states and 719 transitions. [2018-04-13 05:37:10,804 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 708 [2018-04-13 05:37:10,804 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:37:10,804 INFO L355 BasicCegarLoop]: trace histogram [86, 86, 85, 85, 85, 85, 85, 85, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:37:10,804 INFO L408 AbstractCegarLoop]: === Iteration 91 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:37:10,805 INFO L82 PathProgramCache]: Analyzing trace with hash 1652972458, now seen corresponding path program 79 times [2018-04-13 05:37:10,805 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:37:10,805 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:37:10,805 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:37:10,806 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 05:37:10,806 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:37:10,894 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:37:10,895 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:37:12,710 INFO L134 CoverageAnalysis]: Checked inductivity of 28900 backedges. 0 proven. 14450 refuted. 0 times theorem prover too weak. 14450 trivial. 0 not checked. [2018-04-13 05:37:12,710 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:37:12,710 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:37:12,711 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 05:37:12,757 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:37:12,770 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:37:14,899 INFO L134 CoverageAnalysis]: Checked inductivity of 28900 backedges. 0 proven. 14450 refuted. 0 times theorem prover too weak. 14450 trivial. 0 not checked. [2018-04-13 05:37:14,899 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:37:14,899 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [90, 89] total 176 [2018-04-13 05:37:14,900 INFO L442 AbstractCegarLoop]: Interpolant automaton has 176 states [2018-04-13 05:37:14,901 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 176 interpolants. [2018-04-13 05:37:14,902 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11485, Invalid=19315, Unknown=0, NotChecked=0, Total=30800 [2018-04-13 05:37:14,902 INFO L87 Difference]: Start difference. First operand 718 states and 719 transitions. Second operand 176 states. [2018-04-13 05:37:16,632 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:37:16,632 INFO L93 Difference]: Finished difference Result 730 states and 731 transitions. [2018-04-13 05:37:16,632 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 90 states. [2018-04-13 05:37:16,632 INFO L78 Accepts]: Start accepts. Automaton has 176 states. Word has length 707 [2018-04-13 05:37:16,633 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:37:16,634 INFO L225 Difference]: With dead ends: 730 [2018-04-13 05:37:16,634 INFO L226 Difference]: Without dead ends: 730 [2018-04-13 05:37:16,635 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 797 GetRequests, 621 SyntacticMatches, 1 SemanticMatches, 175 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14703 ImplicationChecksByTransitivity, 3.3s TimeCoverageRelationStatistics Valid=11660, Invalid=19492, Unknown=0, NotChecked=0, Total=31152 [2018-04-13 05:37:16,635 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 730 states. [2018-04-13 05:37:16,637 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 730 to 726. [2018-04-13 05:37:16,637 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 726 states. [2018-04-13 05:37:16,637 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 726 states to 726 states and 727 transitions. [2018-04-13 05:37:16,638 INFO L78 Accepts]: Start accepts. Automaton has 726 states and 727 transitions. Word has length 707 [2018-04-13 05:37:16,638 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:37:16,638 INFO L459 AbstractCegarLoop]: Abstraction has 726 states and 727 transitions. [2018-04-13 05:37:16,638 INFO L460 AbstractCegarLoop]: Interpolant automaton has 176 states. [2018-04-13 05:37:16,638 INFO L276 IsEmpty]: Start isEmpty. Operand 726 states and 727 transitions. [2018-04-13 05:37:16,640 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 716 [2018-04-13 05:37:16,640 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:37:16,640 INFO L355 BasicCegarLoop]: trace histogram [87, 87, 86, 86, 86, 86, 86, 86, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:37:16,640 INFO L408 AbstractCegarLoop]: === Iteration 92 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:37:16,641 INFO L82 PathProgramCache]: Analyzing trace with hash 357620362, now seen corresponding path program 80 times [2018-04-13 05:37:16,641 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:37:16,641 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:37:16,641 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:37:16,641 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 05:37:16,641 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:37:16,709 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:37:16,710 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:37:18,536 INFO L134 CoverageAnalysis]: Checked inductivity of 29584 backedges. 0 proven. 14792 refuted. 0 times theorem prover too weak. 14792 trivial. 0 not checked. [2018-04-13 05:37:18,536 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:37:18,536 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:37:18,537 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-04-13 05:37:18,629 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-04-13 05:37:18,629 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 05:37:18,646 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:37:18,835 INFO L134 CoverageAnalysis]: Checked inductivity of 29584 backedges. 0 proven. 14792 refuted. 0 times theorem prover too weak. 14792 trivial. 0 not checked. [2018-04-13 05:37:18,835 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:37:18,836 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [91, 89] total 92 [2018-04-13 05:37:18,836 INFO L442 AbstractCegarLoop]: Interpolant automaton has 92 states [2018-04-13 05:37:18,836 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 92 interpolants. [2018-04-13 05:37:18,837 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=4009, Invalid=4363, Unknown=0, NotChecked=0, Total=8372 [2018-04-13 05:37:18,837 INFO L87 Difference]: Start difference. First operand 726 states and 727 transitions. Second operand 92 states. [2018-04-13 05:37:21,125 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:37:21,125 INFO L93 Difference]: Finished difference Result 738 states and 739 transitions. [2018-04-13 05:37:21,125 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 91 states. [2018-04-13 05:37:21,125 INFO L78 Accepts]: Start accepts. Automaton has 92 states. Word has length 715 [2018-04-13 05:37:21,126 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:37:21,126 INFO L225 Difference]: With dead ends: 738 [2018-04-13 05:37:21,126 INFO L226 Difference]: Without dead ends: 738 [2018-04-13 05:37:21,128 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 979 GetRequests, 802 SyntacticMatches, 0 SemanticMatches, 177 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4082 ImplicationChecksByTransitivity, 3.3s TimeCoverageRelationStatistics Valid=11840, Invalid=20022, Unknown=0, NotChecked=0, Total=31862 [2018-04-13 05:37:21,128 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 738 states. [2018-04-13 05:37:21,130 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 738 to 734. [2018-04-13 05:37:21,130 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 734 states. [2018-04-13 05:37:21,130 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 734 states to 734 states and 735 transitions. [2018-04-13 05:37:21,130 INFO L78 Accepts]: Start accepts. Automaton has 734 states and 735 transitions. Word has length 715 [2018-04-13 05:37:21,130 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:37:21,130 INFO L459 AbstractCegarLoop]: Abstraction has 734 states and 735 transitions. [2018-04-13 05:37:21,131 INFO L460 AbstractCegarLoop]: Interpolant automaton has 92 states. [2018-04-13 05:37:21,131 INFO L276 IsEmpty]: Start isEmpty. Operand 734 states and 735 transitions. [2018-04-13 05:37:21,133 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 724 [2018-04-13 05:37:21,133 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:37:21,133 INFO L355 BasicCegarLoop]: trace histogram [88, 88, 87, 87, 87, 87, 87, 87, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:37:21,133 INFO L408 AbstractCegarLoop]: === Iteration 93 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:37:21,133 INFO L82 PathProgramCache]: Analyzing trace with hash 2113069674, now seen corresponding path program 81 times [2018-04-13 05:37:21,133 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:37:21,133 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:37:21,134 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:37:21,134 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 05:37:21,134 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:37:21,200 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:37:21,202 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:37:23,093 INFO L134 CoverageAnalysis]: Checked inductivity of 30276 backedges. 0 proven. 15138 refuted. 0 times theorem prover too weak. 15138 trivial. 0 not checked. [2018-04-13 05:37:23,093 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:37:23,093 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:37:23,094 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-04-13 05:37:23,288 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 88 check-sat command(s) [2018-04-13 05:37:23,288 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 05:37:23,337 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:37:25,600 INFO L134 CoverageAnalysis]: Checked inductivity of 30276 backedges. 0 proven. 15138 refuted. 0 times theorem prover too weak. 15138 trivial. 0 not checked. [2018-04-13 05:37:25,600 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:37:25,600 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [92, 91] total 180 [2018-04-13 05:37:25,601 INFO L442 AbstractCegarLoop]: Interpolant automaton has 180 states [2018-04-13 05:37:25,601 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 180 interpolants. [2018-04-13 05:37:25,602 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=12016, Invalid=20204, Unknown=0, NotChecked=0, Total=32220 [2018-04-13 05:37:25,602 INFO L87 Difference]: Start difference. First operand 734 states and 735 transitions. Second operand 180 states. [2018-04-13 05:37:27,550 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:37:27,550 INFO L93 Difference]: Finished difference Result 746 states and 747 transitions. [2018-04-13 05:37:27,550 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 92 states. [2018-04-13 05:37:27,550 INFO L78 Accepts]: Start accepts. Automaton has 180 states. Word has length 723 [2018-04-13 05:37:27,551 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:37:27,552 INFO L225 Difference]: With dead ends: 746 [2018-04-13 05:37:27,552 INFO L226 Difference]: Without dead ends: 746 [2018-04-13 05:37:27,552 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 815 GetRequests, 635 SyntacticMatches, 1 SemanticMatches, 179 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15397 ImplicationChecksByTransitivity, 3.5s TimeCoverageRelationStatistics Valid=12195, Invalid=20385, Unknown=0, NotChecked=0, Total=32580 [2018-04-13 05:37:27,553 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 746 states. [2018-04-13 05:37:27,555 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 746 to 742. [2018-04-13 05:37:27,555 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 742 states. [2018-04-13 05:37:27,556 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 742 states to 742 states and 743 transitions. [2018-04-13 05:37:27,556 INFO L78 Accepts]: Start accepts. Automaton has 742 states and 743 transitions. Word has length 723 [2018-04-13 05:37:27,556 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:37:27,556 INFO L459 AbstractCegarLoop]: Abstraction has 742 states and 743 transitions. [2018-04-13 05:37:27,556 INFO L460 AbstractCegarLoop]: Interpolant automaton has 180 states. [2018-04-13 05:37:27,556 INFO L276 IsEmpty]: Start isEmpty. Operand 742 states and 743 transitions. [2018-04-13 05:37:27,559 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 732 [2018-04-13 05:37:27,559 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:37:27,559 INFO L355 BasicCegarLoop]: trace histogram [89, 89, 88, 88, 88, 88, 88, 88, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:37:27,559 INFO L408 AbstractCegarLoop]: === Iteration 94 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:37:27,559 INFO L82 PathProgramCache]: Analyzing trace with hash 1920398154, now seen corresponding path program 82 times [2018-04-13 05:37:27,559 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:37:27,559 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:37:27,560 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:37:27,560 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 05:37:27,560 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:37:27,632 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:37:27,633 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:37:29,569 INFO L134 CoverageAnalysis]: Checked inductivity of 30976 backedges. 0 proven. 15488 refuted. 0 times theorem prover too weak. 15488 trivial. 0 not checked. [2018-04-13 05:37:29,569 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:37:29,569 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:37:29,569 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-04-13 05:37:29,886 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-04-13 05:37:29,886 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 05:37:30,005 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:37:30,007 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-13 05:37:30,007 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 05:37:30,009 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:37:30,009 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:12, output treesize:11 [2018-04-13 05:37:39,598 INFO L134 CoverageAnalysis]: Checked inductivity of 30976 backedges. 15488 proven. 15488 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-13 05:37:39,598 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:37:39,598 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [93, 182] total 273 [2018-04-13 05:37:39,598 INFO L442 AbstractCegarLoop]: Interpolant automaton has 273 states [2018-04-13 05:37:39,600 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 273 interpolants. [2018-04-13 05:37:39,601 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=16562, Invalid=57694, Unknown=0, NotChecked=0, Total=74256 [2018-04-13 05:37:39,601 INFO L87 Difference]: Start difference. First operand 742 states and 743 transitions. Second operand 273 states. [2018-04-13 05:37:45,065 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:37:45,065 INFO L93 Difference]: Finished difference Result 754 states and 755 transitions. [2018-04-13 05:37:45,065 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 96 states. [2018-04-13 05:37:45,065 INFO L78 Accepts]: Start accepts. Automaton has 273 states. Word has length 731 [2018-04-13 05:37:45,066 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:37:45,067 INFO L225 Difference]: With dead ends: 754 [2018-04-13 05:37:45,067 INFO L226 Difference]: Without dead ends: 754 [2018-04-13 05:37:45,069 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 916 GetRequests, 552 SyntacticMatches, 1 SemanticMatches, 363 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 55977 ImplicationChecksByTransitivity, 13.1s TimeCoverageRelationStatistics Valid=28948, Invalid=103912, Unknown=0, NotChecked=0, Total=132860 [2018-04-13 05:37:45,069 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 754 states. [2018-04-13 05:37:45,071 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 754 to 750. [2018-04-13 05:37:45,071 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 750 states. [2018-04-13 05:37:45,072 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 750 states to 750 states and 751 transitions. [2018-04-13 05:37:45,072 INFO L78 Accepts]: Start accepts. Automaton has 750 states and 751 transitions. Word has length 731 [2018-04-13 05:37:45,072 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:37:45,072 INFO L459 AbstractCegarLoop]: Abstraction has 750 states and 751 transitions. [2018-04-13 05:37:45,072 INFO L460 AbstractCegarLoop]: Interpolant automaton has 273 states. [2018-04-13 05:37:45,072 INFO L276 IsEmpty]: Start isEmpty. Operand 750 states and 751 transitions. [2018-04-13 05:37:45,075 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 740 [2018-04-13 05:37:45,075 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:37:45,075 INFO L355 BasicCegarLoop]: trace histogram [90, 90, 89, 89, 89, 89, 89, 89, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:37:45,075 INFO L408 AbstractCegarLoop]: === Iteration 95 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:37:45,075 INFO L82 PathProgramCache]: Analyzing trace with hash -660107990, now seen corresponding path program 83 times [2018-04-13 05:37:45,075 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:37:45,076 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:37:45,076 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:37:45,076 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 05:37:45,076 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:37:45,150 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:37:45,151 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:37:47,125 INFO L134 CoverageAnalysis]: Checked inductivity of 31684 backedges. 0 proven. 15842 refuted. 0 times theorem prover too weak. 15842 trivial. 0 not checked. [2018-04-13 05:37:47,125 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:37:47,125 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:37:47,125 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-04-13 05:37:47,416 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 90 check-sat command(s) [2018-04-13 05:37:47,416 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 05:37:47,437 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:37:47,611 INFO L134 CoverageAnalysis]: Checked inductivity of 31684 backedges. 0 proven. 15842 refuted. 0 times theorem prover too weak. 15842 trivial. 0 not checked. [2018-04-13 05:37:47,611 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:37:47,611 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [94, 92] total 95 [2018-04-13 05:37:47,612 INFO L442 AbstractCegarLoop]: Interpolant automaton has 95 states [2018-04-13 05:37:47,612 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 95 interpolants. [2018-04-13 05:37:47,612 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=4282, Invalid=4648, Unknown=0, NotChecked=0, Total=8930 [2018-04-13 05:37:47,612 INFO L87 Difference]: Start difference. First operand 750 states and 751 transitions. Second operand 95 states. [2018-04-13 05:37:50,132 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:37:50,133 INFO L93 Difference]: Finished difference Result 762 states and 763 transitions. [2018-04-13 05:37:50,133 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 94 states. [2018-04-13 05:37:50,133 INFO L78 Accepts]: Start accepts. Automaton has 95 states. Word has length 739 [2018-04-13 05:37:50,133 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:37:50,134 INFO L225 Difference]: With dead ends: 762 [2018-04-13 05:37:50,134 INFO L226 Difference]: Without dead ends: 762 [2018-04-13 05:37:50,135 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 1012 GetRequests, 829 SyntacticMatches, 0 SemanticMatches, 183 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4358 ImplicationChecksByTransitivity, 3.6s TimeCoverageRelationStatistics Valid=12653, Invalid=21387, Unknown=0, NotChecked=0, Total=34040 [2018-04-13 05:37:50,135 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 762 states. [2018-04-13 05:37:50,137 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 762 to 758. [2018-04-13 05:37:50,137 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 758 states. [2018-04-13 05:37:50,137 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 758 states to 758 states and 759 transitions. [2018-04-13 05:37:50,138 INFO L78 Accepts]: Start accepts. Automaton has 758 states and 759 transitions. Word has length 739 [2018-04-13 05:37:50,138 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:37:50,138 INFO L459 AbstractCegarLoop]: Abstraction has 758 states and 759 transitions. [2018-04-13 05:37:50,138 INFO L460 AbstractCegarLoop]: Interpolant automaton has 95 states. [2018-04-13 05:37:50,138 INFO L276 IsEmpty]: Start isEmpty. Operand 758 states and 759 transitions. [2018-04-13 05:37:50,140 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 748 [2018-04-13 05:37:50,140 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:37:50,141 INFO L355 BasicCegarLoop]: trace histogram [91, 91, 90, 90, 90, 90, 90, 90, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:37:50,141 INFO L408 AbstractCegarLoop]: === Iteration 96 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:37:50,141 INFO L82 PathProgramCache]: Analyzing trace with hash -972083190, now seen corresponding path program 84 times [2018-04-13 05:37:50,141 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:37:50,141 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:37:50,141 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:37:50,141 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 05:37:50,141 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:37:50,214 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:37:50,216 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:37:52,246 INFO L134 CoverageAnalysis]: Checked inductivity of 32400 backedges. 0 proven. 16200 refuted. 0 times theorem prover too weak. 16200 trivial. 0 not checked. [2018-04-13 05:37:52,247 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:37:52,247 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:37:52,247 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-04-13 05:37:52,403 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 91 check-sat command(s) [2018-04-13 05:37:52,404 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 05:37:52,468 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:37:52,675 INFO L134 CoverageAnalysis]: Checked inductivity of 32400 backedges. 0 proven. 16200 refuted. 0 times theorem prover too weak. 16200 trivial. 0 not checked. [2018-04-13 05:37:52,676 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:37:52,676 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [95, 94] total 97 [2018-04-13 05:37:52,676 INFO L442 AbstractCegarLoop]: Interpolant automaton has 97 states [2018-04-13 05:37:52,676 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 97 interpolants. [2018-04-13 05:37:52,677 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=4377, Invalid=4935, Unknown=0, NotChecked=0, Total=9312 [2018-04-13 05:37:52,677 INFO L87 Difference]: Start difference. First operand 758 states and 759 transitions. Second operand 97 states. [2018-04-13 05:37:55,234 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:37:55,234 INFO L93 Difference]: Finished difference Result 770 states and 771 transitions. [2018-04-13 05:37:55,274 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 96 states. [2018-04-13 05:37:55,275 INFO L78 Accepts]: Start accepts. Automaton has 97 states. Word has length 747 [2018-04-13 05:37:55,275 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:37:55,276 INFO L225 Difference]: With dead ends: 770 [2018-04-13 05:37:55,276 INFO L226 Difference]: Without dead ends: 770 [2018-04-13 05:37:55,276 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 1025 GetRequests, 838 SyntacticMatches, 0 SemanticMatches, 187 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4634 ImplicationChecksByTransitivity, 3.7s TimeCoverageRelationStatistics Valid=12936, Invalid=22596, Unknown=0, NotChecked=0, Total=35532 [2018-04-13 05:37:55,277 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 770 states. [2018-04-13 05:37:55,279 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 770 to 766. [2018-04-13 05:37:55,279 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 766 states. [2018-04-13 05:37:55,279 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 766 states to 766 states and 767 transitions. [2018-04-13 05:37:55,279 INFO L78 Accepts]: Start accepts. Automaton has 766 states and 767 transitions. Word has length 747 [2018-04-13 05:37:55,279 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:37:55,280 INFO L459 AbstractCegarLoop]: Abstraction has 766 states and 767 transitions. [2018-04-13 05:37:55,280 INFO L460 AbstractCegarLoop]: Interpolant automaton has 97 states. [2018-04-13 05:37:55,280 INFO L276 IsEmpty]: Start isEmpty. Operand 766 states and 767 transitions. [2018-04-13 05:37:55,282 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 756 [2018-04-13 05:37:55,282 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:37:55,282 INFO L355 BasicCegarLoop]: trace histogram [92, 92, 91, 91, 91, 91, 91, 91, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:37:55,283 INFO L408 AbstractCegarLoop]: === Iteration 97 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:37:55,283 INFO L82 PathProgramCache]: Analyzing trace with hash -1611113494, now seen corresponding path program 85 times [2018-04-13 05:37:55,283 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:37:55,283 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:37:55,283 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:37:55,283 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 05:37:55,283 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:37:55,362 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:37:55,363 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:37:57,371 INFO L134 CoverageAnalysis]: Checked inductivity of 33124 backedges. 0 proven. 16562 refuted. 0 times theorem prover too weak. 16562 trivial. 0 not checked. [2018-04-13 05:37:57,371 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:37:57,371 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:37:57,372 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 05:37:57,427 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:37:57,441 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:37:59,862 INFO L134 CoverageAnalysis]: Checked inductivity of 33124 backedges. 0 proven. 16562 refuted. 0 times theorem prover too weak. 16562 trivial. 0 not checked. [2018-04-13 05:37:59,862 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:37:59,862 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [96, 95] total 188 [2018-04-13 05:37:59,863 INFO L442 AbstractCegarLoop]: Interpolant automaton has 188 states [2018-04-13 05:37:59,863 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 188 interpolants. [2018-04-13 05:37:59,864 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=13114, Invalid=22042, Unknown=0, NotChecked=0, Total=35156 [2018-04-13 05:37:59,864 INFO L87 Difference]: Start difference. First operand 766 states and 767 transitions. Second operand 188 states. [2018-04-13 05:38:02,101 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:38:02,101 INFO L93 Difference]: Finished difference Result 778 states and 779 transitions. [2018-04-13 05:38:02,103 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 96 states. [2018-04-13 05:38:02,103 INFO L78 Accepts]: Start accepts. Automaton has 188 states. Word has length 755 [2018-04-13 05:38:02,103 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:38:02,105 INFO L225 Difference]: With dead ends: 778 [2018-04-13 05:38:02,105 INFO L226 Difference]: Without dead ends: 778 [2018-04-13 05:38:02,107 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 851 GetRequests, 663 SyntacticMatches, 1 SemanticMatches, 187 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16833 ImplicationChecksByTransitivity, 3.7s TimeCoverageRelationStatistics Valid=13301, Invalid=22231, Unknown=0, NotChecked=0, Total=35532 [2018-04-13 05:38:02,107 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 778 states. [2018-04-13 05:38:02,113 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 778 to 774. [2018-04-13 05:38:02,113 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 774 states. [2018-04-13 05:38:02,114 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 774 states to 774 states and 775 transitions. [2018-04-13 05:38:02,114 INFO L78 Accepts]: Start accepts. Automaton has 774 states and 775 transitions. Word has length 755 [2018-04-13 05:38:02,115 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:38:02,115 INFO L459 AbstractCegarLoop]: Abstraction has 774 states and 775 transitions. [2018-04-13 05:38:02,115 INFO L460 AbstractCegarLoop]: Interpolant automaton has 188 states. [2018-04-13 05:38:02,115 INFO L276 IsEmpty]: Start isEmpty. Operand 774 states and 775 transitions. [2018-04-13 05:38:02,120 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 764 [2018-04-13 05:38:02,120 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:38:02,121 INFO L355 BasicCegarLoop]: trace histogram [93, 93, 92, 92, 92, 92, 92, 92, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:38:02,121 INFO L408 AbstractCegarLoop]: === Iteration 98 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:38:02,121 INFO L82 PathProgramCache]: Analyzing trace with hash 997036234, now seen corresponding path program 86 times [2018-04-13 05:38:02,121 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:38:02,121 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:38:02,122 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:38:02,122 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 05:38:02,122 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:38:02,247 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:38:02,249 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:38:04,351 INFO L134 CoverageAnalysis]: Checked inductivity of 33856 backedges. 0 proven. 16928 refuted. 0 times theorem prover too weak. 16928 trivial. 0 not checked. [2018-04-13 05:38:04,351 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:38:04,351 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:38:04,352 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-04-13 05:38:04,459 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-04-13 05:38:04,460 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 05:38:04,478 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:38:04,667 INFO L134 CoverageAnalysis]: Checked inductivity of 33856 backedges. 0 proven. 16928 refuted. 0 times theorem prover too weak. 16928 trivial. 0 not checked. [2018-04-13 05:38:04,667 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:38:04,667 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [97, 95] total 98 [2018-04-13 05:38:04,668 INFO L442 AbstractCegarLoop]: Interpolant automaton has 98 states [2018-04-13 05:38:04,668 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 98 interpolants. [2018-04-13 05:38:04,668 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=4564, Invalid=4942, Unknown=0, NotChecked=0, Total=9506 [2018-04-13 05:38:04,668 INFO L87 Difference]: Start difference. First operand 774 states and 775 transitions. Second operand 98 states. [2018-04-13 05:38:07,193 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:38:07,193 INFO L93 Difference]: Finished difference Result 786 states and 787 transitions. [2018-04-13 05:38:07,193 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 97 states. [2018-04-13 05:38:07,193 INFO L78 Accepts]: Start accepts. Automaton has 98 states. Word has length 763 [2018-04-13 05:38:07,193 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:38:07,194 INFO L225 Difference]: With dead ends: 786 [2018-04-13 05:38:07,194 INFO L226 Difference]: Without dead ends: 786 [2018-04-13 05:38:07,195 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 1045 GetRequests, 856 SyntacticMatches, 0 SemanticMatches, 189 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4643 ImplicationChecksByTransitivity, 3.7s TimeCoverageRelationStatistics Valid=13493, Invalid=22797, Unknown=0, NotChecked=0, Total=36290 [2018-04-13 05:38:07,196 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 786 states. [2018-04-13 05:38:07,200 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 786 to 782. [2018-04-13 05:38:07,200 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 782 states. [2018-04-13 05:38:07,200 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 782 states to 782 states and 783 transitions. [2018-04-13 05:38:07,201 INFO L78 Accepts]: Start accepts. Automaton has 782 states and 783 transitions. Word has length 763 [2018-04-13 05:38:07,201 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:38:07,201 INFO L459 AbstractCegarLoop]: Abstraction has 782 states and 783 transitions. [2018-04-13 05:38:07,201 INFO L460 AbstractCegarLoop]: Interpolant automaton has 98 states. [2018-04-13 05:38:07,201 INFO L276 IsEmpty]: Start isEmpty. Operand 782 states and 783 transitions. [2018-04-13 05:38:07,205 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 772 [2018-04-13 05:38:07,206 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:38:07,206 INFO L355 BasicCegarLoop]: trace histogram [94, 94, 93, 93, 93, 93, 93, 93, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:38:07,206 INFO L408 AbstractCegarLoop]: === Iteration 99 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:38:07,206 INFO L82 PathProgramCache]: Analyzing trace with hash -46575958, now seen corresponding path program 87 times [2018-04-13 05:38:07,206 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:38:07,206 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:38:07,207 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:38:07,207 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 05:38:07,207 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:38:07,321 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:38:07,322 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:38:09,485 INFO L134 CoverageAnalysis]: Checked inductivity of 34596 backedges. 0 proven. 17298 refuted. 0 times theorem prover too weak. 17298 trivial. 0 not checked. [2018-04-13 05:38:09,485 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:38:09,485 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:38:09,485 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-04-13 05:38:09,705 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 94 check-sat command(s) [2018-04-13 05:38:09,705 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 05:38:09,787 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:38:09,982 INFO L134 CoverageAnalysis]: Checked inductivity of 34596 backedges. 0 proven. 17298 refuted. 0 times theorem prover too weak. 17298 trivial. 0 not checked. [2018-04-13 05:38:09,983 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:38:09,983 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [98, 96] total 99 [2018-04-13 05:38:09,983 INFO L442 AbstractCegarLoop]: Interpolant automaton has 99 states [2018-04-13 05:38:09,983 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 99 interpolants. [2018-04-13 05:38:09,984 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=4660, Invalid=5042, Unknown=0, NotChecked=0, Total=9702 [2018-04-13 05:38:09,984 INFO L87 Difference]: Start difference. First operand 782 states and 783 transitions. Second operand 99 states. [2018-04-13 05:38:12,606 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:38:12,606 INFO L93 Difference]: Finished difference Result 794 states and 795 transitions. [2018-04-13 05:38:12,606 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 98 states. [2018-04-13 05:38:12,606 INFO L78 Accepts]: Start accepts. Automaton has 99 states. Word has length 771 [2018-04-13 05:38:12,607 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:38:12,608 INFO L225 Difference]: With dead ends: 794 [2018-04-13 05:38:12,608 INFO L226 Difference]: Without dead ends: 794 [2018-04-13 05:38:12,608 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 1056 GetRequests, 865 SyntacticMatches, 0 SemanticMatches, 191 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4740 ImplicationChecksByTransitivity, 3.9s TimeCoverageRelationStatistics Valid=13779, Invalid=23277, Unknown=0, NotChecked=0, Total=37056 [2018-04-13 05:38:12,609 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 794 states. [2018-04-13 05:38:12,611 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 794 to 790. [2018-04-13 05:38:12,611 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 790 states. [2018-04-13 05:38:12,612 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 790 states to 790 states and 791 transitions. [2018-04-13 05:38:12,612 INFO L78 Accepts]: Start accepts. Automaton has 790 states and 791 transitions. Word has length 771 [2018-04-13 05:38:12,612 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:38:12,612 INFO L459 AbstractCegarLoop]: Abstraction has 790 states and 791 transitions. [2018-04-13 05:38:12,612 INFO L460 AbstractCegarLoop]: Interpolant automaton has 99 states. [2018-04-13 05:38:12,612 INFO L276 IsEmpty]: Start isEmpty. Operand 790 states and 791 transitions. [2018-04-13 05:38:12,615 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 780 [2018-04-13 05:38:12,615 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:38:12,615 INFO L355 BasicCegarLoop]: trace histogram [95, 95, 94, 94, 94, 94, 94, 94, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:38:12,615 INFO L408 AbstractCegarLoop]: === Iteration 100 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:38:12,615 INFO L82 PathProgramCache]: Analyzing trace with hash -102361718, now seen corresponding path program 88 times [2018-04-13 05:38:12,615 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:38:12,616 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:38:12,616 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:38:12,616 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 05:38:12,616 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:38:12,703 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:38:12,704 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:38:14,862 INFO L134 CoverageAnalysis]: Checked inductivity of 35344 backedges. 0 proven. 17672 refuted. 0 times theorem prover too weak. 17672 trivial. 0 not checked. [2018-04-13 05:38:14,862 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:38:14,862 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:38:14,862 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-04-13 05:38:15,219 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-04-13 05:38:15,219 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 05:38:15,364 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:38:15,366 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-13 05:38:15,367 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 05:38:15,371 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:38:15,372 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:12, output treesize:11 [2018-04-13 05:38:26,163 INFO L134 CoverageAnalysis]: Checked inductivity of 35344 backedges. 17672 proven. 17672 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-13 05:38:26,163 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:38:26,163 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [99, 194] total 291 [2018-04-13 05:38:26,164 INFO L442 AbstractCegarLoop]: Interpolant automaton has 291 states [2018-04-13 05:38:26,165 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 291 interpolants. [2018-04-13 05:38:26,166 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=18818, Invalid=65572, Unknown=0, NotChecked=0, Total=84390 [2018-04-13 05:38:26,166 INFO L87 Difference]: Start difference. First operand 790 states and 791 transitions. Second operand 291 states. [2018-04-13 05:38:32,269 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:38:32,270 INFO L93 Difference]: Finished difference Result 802 states and 803 transitions. [2018-04-13 05:38:32,270 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 102 states. [2018-04-13 05:38:32,270 INFO L78 Accepts]: Start accepts. Automaton has 291 states. Word has length 779 [2018-04-13 05:38:32,270 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:38:32,271 INFO L225 Difference]: With dead ends: 802 [2018-04-13 05:38:32,271 INFO L226 Difference]: Without dead ends: 802 [2018-04-13 05:38:32,277 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 976 GetRequests, 588 SyntacticMatches, 1 SemanticMatches, 387 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 63741 ImplicationChecksByTransitivity, 14.7s TimeCoverageRelationStatistics Valid=32893, Invalid=118039, Unknown=0, NotChecked=0, Total=150932 [2018-04-13 05:38:32,278 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 802 states. [2018-04-13 05:38:32,282 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 802 to 798. [2018-04-13 05:38:32,282 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 798 states. [2018-04-13 05:38:32,283 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 798 states to 798 states and 799 transitions. [2018-04-13 05:38:32,283 INFO L78 Accepts]: Start accepts. Automaton has 798 states and 799 transitions. Word has length 779 [2018-04-13 05:38:32,284 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:38:32,284 INFO L459 AbstractCegarLoop]: Abstraction has 798 states and 799 transitions. [2018-04-13 05:38:32,284 INFO L460 AbstractCegarLoop]: Interpolant automaton has 291 states. [2018-04-13 05:38:32,284 INFO L276 IsEmpty]: Start isEmpty. Operand 798 states and 799 transitions. [2018-04-13 05:38:32,289 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 788 [2018-04-13 05:38:32,289 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:38:32,289 INFO L355 BasicCegarLoop]: trace histogram [96, 96, 95, 95, 95, 95, 95, 95, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:38:32,289 INFO L408 AbstractCegarLoop]: === Iteration 101 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:38:32,290 INFO L82 PathProgramCache]: Analyzing trace with hash 364799338, now seen corresponding path program 89 times [2018-04-13 05:38:32,290 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:38:32,290 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:38:32,291 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:38:32,291 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 05:38:32,291 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:38:32,412 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:38:32,413 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:38:34,620 INFO L134 CoverageAnalysis]: Checked inductivity of 36100 backedges. 0 proven. 18050 refuted. 0 times theorem prover too weak. 18050 trivial. 0 not checked. [2018-04-13 05:38:34,621 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:38:34,621 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:38:34,621 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-04-13 05:38:34,954 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 96 check-sat command(s) [2018-04-13 05:38:34,955 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 05:38:34,977 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:38:35,204 INFO L134 CoverageAnalysis]: Checked inductivity of 36100 backedges. 0 proven. 18050 refuted. 0 times theorem prover too weak. 18050 trivial. 0 not checked. [2018-04-13 05:38:35,204 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:38:35,205 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [100, 98] total 101 [2018-04-13 05:38:35,205 INFO L442 AbstractCegarLoop]: Interpolant automaton has 101 states [2018-04-13 05:38:35,205 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 101 interpolants. [2018-04-13 05:38:35,206 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=4855, Invalid=5245, Unknown=0, NotChecked=0, Total=10100 [2018-04-13 05:38:35,206 INFO L87 Difference]: Start difference. First operand 798 states and 799 transitions. Second operand 101 states. [2018-04-13 05:38:37,909 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:38:37,909 INFO L93 Difference]: Finished difference Result 810 states and 811 transitions. [2018-04-13 05:38:37,909 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 100 states. [2018-04-13 05:38:37,909 INFO L78 Accepts]: Start accepts. Automaton has 101 states. Word has length 787 [2018-04-13 05:38:37,909 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:38:37,910 INFO L225 Difference]: With dead ends: 810 [2018-04-13 05:38:37,910 INFO L226 Difference]: Without dead ends: 810 [2018-04-13 05:38:37,912 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 1078 GetRequests, 883 SyntacticMatches, 0 SemanticMatches, 195 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4937 ImplicationChecksByTransitivity, 4.0s TimeCoverageRelationStatistics Valid=14360, Invalid=24252, Unknown=0, NotChecked=0, Total=38612 [2018-04-13 05:38:37,913 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 810 states. [2018-04-13 05:38:37,915 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 810 to 806. [2018-04-13 05:38:37,915 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 806 states. [2018-04-13 05:38:37,916 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 806 states to 806 states and 807 transitions. [2018-04-13 05:38:37,916 INFO L78 Accepts]: Start accepts. Automaton has 806 states and 807 transitions. Word has length 787 [2018-04-13 05:38:37,916 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:38:37,916 INFO L459 AbstractCegarLoop]: Abstraction has 806 states and 807 transitions. [2018-04-13 05:38:37,916 INFO L460 AbstractCegarLoop]: Interpolant automaton has 101 states. [2018-04-13 05:38:37,916 INFO L276 IsEmpty]: Start isEmpty. Operand 806 states and 807 transitions. [2018-04-13 05:38:37,919 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 796 [2018-04-13 05:38:37,919 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:38:37,920 INFO L355 BasicCegarLoop]: trace histogram [97, 97, 96, 96, 96, 96, 96, 96, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:38:37,920 INFO L408 AbstractCegarLoop]: === Iteration 102 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:38:37,920 INFO L82 PathProgramCache]: Analyzing trace with hash 617397834, now seen corresponding path program 90 times [2018-04-13 05:38:37,920 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:38:37,920 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:38:37,920 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:38:37,920 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 05:38:37,920 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:38:38,008 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:38:38,010 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:38:40,354 INFO L134 CoverageAnalysis]: Checked inductivity of 36864 backedges. 0 proven. 18432 refuted. 0 times theorem prover too weak. 18432 trivial. 0 not checked. [2018-04-13 05:38:40,354 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:38:40,354 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:38:40,354 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-04-13 05:38:40,699 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 97 check-sat command(s) [2018-04-13 05:38:40,699 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 05:38:40,779 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:38:43,464 INFO L134 CoverageAnalysis]: Checked inductivity of 36864 backedges. 0 proven. 18432 refuted. 0 times theorem prover too weak. 18432 trivial. 0 not checked. [2018-04-13 05:38:43,464 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:38:43,464 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [101, 100] total 198 [2018-04-13 05:38:43,464 INFO L442 AbstractCegarLoop]: Interpolant automaton has 198 states [2018-04-13 05:38:43,465 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 198 interpolants. [2018-04-13 05:38:43,466 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=14554, Invalid=24452, Unknown=0, NotChecked=0, Total=39006 [2018-04-13 05:38:43,466 INFO L87 Difference]: Start difference. First operand 806 states and 807 transitions. Second operand 198 states. [2018-04-13 05:38:45,765 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:38:45,765 INFO L93 Difference]: Finished difference Result 818 states and 819 transitions. [2018-04-13 05:38:45,765 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 101 states. [2018-04-13 05:38:45,765 INFO L78 Accepts]: Start accepts. Automaton has 198 states. Word has length 795 [2018-04-13 05:38:45,766 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:38:45,767 INFO L225 Difference]: With dead ends: 818 [2018-04-13 05:38:45,767 INFO L226 Difference]: Without dead ends: 818 [2018-04-13 05:38:45,768 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 896 GetRequests, 698 SyntacticMatches, 1 SemanticMatches, 197 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 18718 ImplicationChecksByTransitivity, 4.3s TimeCoverageRelationStatistics Valid=14751, Invalid=24651, Unknown=0, NotChecked=0, Total=39402 [2018-04-13 05:38:45,768 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 818 states. [2018-04-13 05:38:45,771 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 818 to 814. [2018-04-13 05:38:45,772 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 814 states. [2018-04-13 05:38:45,772 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 814 states to 814 states and 815 transitions. [2018-04-13 05:38:45,772 INFO L78 Accepts]: Start accepts. Automaton has 814 states and 815 transitions. Word has length 795 [2018-04-13 05:38:45,772 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:38:45,772 INFO L459 AbstractCegarLoop]: Abstraction has 814 states and 815 transitions. [2018-04-13 05:38:45,772 INFO L460 AbstractCegarLoop]: Interpolant automaton has 198 states. [2018-04-13 05:38:45,773 INFO L276 IsEmpty]: Start isEmpty. Operand 814 states and 815 transitions. [2018-04-13 05:38:45,775 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 804 [2018-04-13 05:38:45,775 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:38:45,776 INFO L355 BasicCegarLoop]: trace histogram [98, 98, 97, 97, 97, 97, 97, 97, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:38:45,776 INFO L408 AbstractCegarLoop]: === Iteration 103 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:38:45,776 INFO L82 PathProgramCache]: Analyzing trace with hash 182165546, now seen corresponding path program 91 times [2018-04-13 05:38:45,776 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:38:45,776 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:38:45,776 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:38:45,777 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 05:38:45,777 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:38:45,878 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:38:45,879 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:38:48,182 INFO L134 CoverageAnalysis]: Checked inductivity of 37636 backedges. 0 proven. 18818 refuted. 0 times theorem prover too weak. 18818 trivial. 0 not checked. [2018-04-13 05:38:48,182 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:38:48,182 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:38:48,183 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 05:38:48,253 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:38:48,270 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:38:51,015 INFO L134 CoverageAnalysis]: Checked inductivity of 37636 backedges. 0 proven. 18818 refuted. 0 times theorem prover too weak. 18818 trivial. 0 not checked. [2018-04-13 05:38:51,015 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:38:51,016 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [102, 101] total 200 [2018-04-13 05:38:51,016 INFO L442 AbstractCegarLoop]: Interpolant automaton has 200 states [2018-04-13 05:38:51,017 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 200 interpolants. [2018-04-13 05:38:51,017 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=14851, Invalid=24949, Unknown=0, NotChecked=0, Total=39800 [2018-04-13 05:38:51,018 INFO L87 Difference]: Start difference. First operand 814 states and 815 transitions. Second operand 200 states. [2018-04-13 05:38:53,437 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:38:53,438 INFO L93 Difference]: Finished difference Result 826 states and 827 transitions. [2018-04-13 05:38:53,438 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 102 states. [2018-04-13 05:38:53,438 INFO L78 Accepts]: Start accepts. Automaton has 200 states. Word has length 803 [2018-04-13 05:38:53,438 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:38:53,439 INFO L225 Difference]: With dead ends: 826 [2018-04-13 05:38:53,439 INFO L226 Difference]: Without dead ends: 826 [2018-04-13 05:38:53,440 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 905 GetRequests, 705 SyntacticMatches, 1 SemanticMatches, 199 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 19107 ImplicationChecksByTransitivity, 4.2s TimeCoverageRelationStatistics Valid=15050, Invalid=25150, Unknown=0, NotChecked=0, Total=40200 [2018-04-13 05:38:53,440 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 826 states. [2018-04-13 05:38:53,442 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 826 to 822. [2018-04-13 05:38:53,442 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 822 states. [2018-04-13 05:38:53,443 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 822 states to 822 states and 823 transitions. [2018-04-13 05:38:53,443 INFO L78 Accepts]: Start accepts. Automaton has 822 states and 823 transitions. Word has length 803 [2018-04-13 05:38:53,443 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:38:53,443 INFO L459 AbstractCegarLoop]: Abstraction has 822 states and 823 transitions. [2018-04-13 05:38:53,443 INFO L460 AbstractCegarLoop]: Interpolant automaton has 200 states. [2018-04-13 05:38:53,443 INFO L276 IsEmpty]: Start isEmpty. Operand 822 states and 823 transitions. [2018-04-13 05:38:53,446 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 812 [2018-04-13 05:38:53,446 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:38:53,446 INFO L355 BasicCegarLoop]: trace histogram [99, 99, 98, 98, 98, 98, 98, 98, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:38:53,446 INFO L408 AbstractCegarLoop]: === Iteration 104 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:38:53,446 INFO L82 PathProgramCache]: Analyzing trace with hash -613053686, now seen corresponding path program 92 times [2018-04-13 05:38:53,446 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:38:53,446 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:38:53,447 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:38:53,447 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 05:38:53,447 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:38:53,542 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:38:53,543 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:38:55,863 INFO L134 CoverageAnalysis]: Checked inductivity of 38416 backedges. 0 proven. 19208 refuted. 0 times theorem prover too weak. 19208 trivial. 0 not checked. [2018-04-13 05:38:55,864 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:38:55,864 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:38:55,864 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-04-13 05:38:55,994 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-04-13 05:38:55,994 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 05:38:56,015 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:38:56,250 INFO L134 CoverageAnalysis]: Checked inductivity of 38416 backedges. 0 proven. 19208 refuted. 0 times theorem prover too weak. 19208 trivial. 0 not checked. [2018-04-13 05:38:56,250 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:38:56,250 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [103, 101] total 104 [2018-04-13 05:38:56,250 INFO L442 AbstractCegarLoop]: Interpolant automaton has 104 states [2018-04-13 05:38:56,251 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 104 interpolants. [2018-04-13 05:38:56,251 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5155, Invalid=5557, Unknown=0, NotChecked=0, Total=10712 [2018-04-13 05:38:56,251 INFO L87 Difference]: Start difference. First operand 822 states and 823 transitions. Second operand 104 states. [2018-04-13 05:38:59,113 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:38:59,113 INFO L93 Difference]: Finished difference Result 834 states and 835 transitions. [2018-04-13 05:38:59,113 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 103 states. [2018-04-13 05:38:59,114 INFO L78 Accepts]: Start accepts. Automaton has 104 states. Word has length 811 [2018-04-13 05:38:59,114 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:38:59,115 INFO L225 Difference]: With dead ends: 834 [2018-04-13 05:38:59,115 INFO L226 Difference]: Without dead ends: 834 [2018-04-13 05:38:59,116 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 1111 GetRequests, 910 SyntacticMatches, 0 SemanticMatches, 201 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5240 ImplicationChecksByTransitivity, 4.2s TimeCoverageRelationStatistics Valid=15254, Invalid=25752, Unknown=0, NotChecked=0, Total=41006 [2018-04-13 05:38:59,116 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 834 states. [2018-04-13 05:38:59,119 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 834 to 830. [2018-04-13 05:38:59,119 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 830 states. [2018-04-13 05:38:59,119 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 830 states to 830 states and 831 transitions. [2018-04-13 05:38:59,119 INFO L78 Accepts]: Start accepts. Automaton has 830 states and 831 transitions. Word has length 811 [2018-04-13 05:38:59,119 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:38:59,119 INFO L459 AbstractCegarLoop]: Abstraction has 830 states and 831 transitions. [2018-04-13 05:38:59,120 INFO L460 AbstractCegarLoop]: Interpolant automaton has 104 states. [2018-04-13 05:38:59,120 INFO L276 IsEmpty]: Start isEmpty. Operand 830 states and 831 transitions. [2018-04-13 05:38:59,122 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 820 [2018-04-13 05:38:59,122 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:38:59,122 INFO L355 BasicCegarLoop]: trace histogram [100, 100, 99, 99, 99, 99, 99, 99, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:38:59,123 INFO L408 AbstractCegarLoop]: === Iteration 105 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:38:59,123 INFO L82 PathProgramCache]: Analyzing trace with hash -102433046, now seen corresponding path program 93 times [2018-04-13 05:38:59,123 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:38:59,123 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:38:59,123 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:38:59,123 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 05:38:59,123 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:38:59,227 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:38:59,228 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:39:01,608 INFO L134 CoverageAnalysis]: Checked inductivity of 39204 backedges. 0 proven. 19602 refuted. 0 times theorem prover too weak. 19602 trivial. 0 not checked. [2018-04-13 05:39:01,609 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:39:01,609 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:39:01,609 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-04-13 05:39:01,937 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 100 check-sat command(s) [2018-04-13 05:39:01,938 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 05:39:02,098 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:39:05,032 INFO L134 CoverageAnalysis]: Checked inductivity of 39204 backedges. 0 proven. 19602 refuted. 0 times theorem prover too weak. 19602 trivial. 0 not checked. [2018-04-13 05:39:05,033 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:39:05,033 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [104, 103] total 204 [2018-04-13 05:39:05,033 INFO L442 AbstractCegarLoop]: Interpolant automaton has 204 states [2018-04-13 05:39:05,034 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 204 interpolants. [2018-04-13 05:39:05,035 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=15454, Invalid=25958, Unknown=0, NotChecked=0, Total=41412 [2018-04-13 05:39:05,035 INFO L87 Difference]: Start difference. First operand 830 states and 831 transitions. Second operand 204 states. [2018-04-13 05:39:07,703 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:39:07,703 INFO L93 Difference]: Finished difference Result 842 states and 843 transitions. [2018-04-13 05:39:07,703 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 104 states. [2018-04-13 05:39:07,703 INFO L78 Accepts]: Start accepts. Automaton has 204 states. Word has length 819 [2018-04-13 05:39:07,703 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:39:07,704 INFO L225 Difference]: With dead ends: 842 [2018-04-13 05:39:07,704 INFO L226 Difference]: Without dead ends: 842 [2018-04-13 05:39:07,705 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 923 GetRequests, 719 SyntacticMatches, 1 SemanticMatches, 203 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 19897 ImplicationChecksByTransitivity, 4.5s TimeCoverageRelationStatistics Valid=15657, Invalid=26163, Unknown=0, NotChecked=0, Total=41820 [2018-04-13 05:39:07,705 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 842 states. [2018-04-13 05:39:07,707 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 842 to 838. [2018-04-13 05:39:07,707 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 838 states. [2018-04-13 05:39:07,708 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 838 states to 838 states and 839 transitions. [2018-04-13 05:39:07,708 INFO L78 Accepts]: Start accepts. Automaton has 838 states and 839 transitions. Word has length 819 [2018-04-13 05:39:07,708 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:39:07,708 INFO L459 AbstractCegarLoop]: Abstraction has 838 states and 839 transitions. [2018-04-13 05:39:07,708 INFO L460 AbstractCegarLoop]: Interpolant automaton has 204 states. [2018-04-13 05:39:07,708 INFO L276 IsEmpty]: Start isEmpty. Operand 838 states and 839 transitions. [2018-04-13 05:39:07,711 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 828 [2018-04-13 05:39:07,711 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:39:07,711 INFO L355 BasicCegarLoop]: trace histogram [101, 101, 100, 100, 100, 100, 100, 100, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:39:07,711 INFO L408 AbstractCegarLoop]: === Iteration 106 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:39:07,711 INFO L82 PathProgramCache]: Analyzing trace with hash 959740874, now seen corresponding path program 94 times [2018-04-13 05:39:07,711 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:39:07,712 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:39:07,712 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:39:07,712 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 05:39:07,712 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:39:07,816 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:39:07,817 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:39:10,227 INFO L134 CoverageAnalysis]: Checked inductivity of 40000 backedges. 0 proven. 20000 refuted. 0 times theorem prover too weak. 20000 trivial. 0 not checked. [2018-04-13 05:39:10,228 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:39:10,262 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:39:10,262 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-04-13 05:39:10,802 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-04-13 05:39:10,802 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 05:39:10,966 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:39:10,968 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-13 05:39:10,968 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 05:39:10,970 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:39:10,970 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:12, output treesize:11 [2018-04-13 05:39:15,184 WARN L148 SmtUtils]: Spent 102ms on a formula simplification that was a NOOP. DAG size: 15 [2018-04-13 05:39:23,293 INFO L134 CoverageAnalysis]: Checked inductivity of 40000 backedges. 20000 proven. 20000 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-13 05:39:23,294 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:39:23,294 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [105, 206] total 309 [2018-04-13 05:39:23,294 INFO L442 AbstractCegarLoop]: Interpolant automaton has 309 states [2018-04-13 05:39:23,295 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 309 interpolants. [2018-04-13 05:39:23,297 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=21218, Invalid=73954, Unknown=0, NotChecked=0, Total=95172 [2018-04-13 05:39:23,297 INFO L87 Difference]: Start difference. First operand 838 states and 839 transitions. Second operand 309 states. [2018-04-13 05:39:30,357 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:39:30,357 INFO L93 Difference]: Finished difference Result 850 states and 851 transitions. [2018-04-13 05:39:30,358 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 108 states. [2018-04-13 05:39:30,358 INFO L78 Accepts]: Start accepts. Automaton has 309 states. Word has length 827 [2018-04-13 05:39:30,358 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:39:30,359 INFO L225 Difference]: With dead ends: 850 [2018-04-13 05:39:30,359 INFO L226 Difference]: Without dead ends: 850 [2018-04-13 05:39:30,362 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 1036 GetRequests, 624 SyntacticMatches, 1 SemanticMatches, 411 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 72009 ImplicationChecksByTransitivity, 16.7s TimeCoverageRelationStatistics Valid=37090, Invalid=133066, Unknown=0, NotChecked=0, Total=170156 [2018-04-13 05:39:30,363 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 850 states. [2018-04-13 05:39:30,365 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 850 to 846. [2018-04-13 05:39:30,365 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 846 states. [2018-04-13 05:39:30,366 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 846 states to 846 states and 847 transitions. [2018-04-13 05:39:30,366 INFO L78 Accepts]: Start accepts. Automaton has 846 states and 847 transitions. Word has length 827 [2018-04-13 05:39:30,366 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:39:30,366 INFO L459 AbstractCegarLoop]: Abstraction has 846 states and 847 transitions. [2018-04-13 05:39:30,366 INFO L460 AbstractCegarLoop]: Interpolant automaton has 309 states. [2018-04-13 05:39:30,366 INFO L276 IsEmpty]: Start isEmpty. Operand 846 states and 847 transitions. [2018-04-13 05:39:30,369 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 836 [2018-04-13 05:39:30,369 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:39:30,370 INFO L355 BasicCegarLoop]: trace histogram [102, 102, 101, 101, 101, 101, 101, 101, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:39:30,370 INFO L408 AbstractCegarLoop]: === Iteration 107 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:39:30,370 INFO L82 PathProgramCache]: Analyzing trace with hash -64061014, now seen corresponding path program 95 times [2018-04-13 05:39:30,370 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:39:30,370 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:39:30,370 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:39:30,370 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 05:39:30,370 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:39:30,470 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:39:30,471 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:39:32,977 INFO L134 CoverageAnalysis]: Checked inductivity of 40804 backedges. 0 proven. 20402 refuted. 0 times theorem prover too weak. 20402 trivial. 0 not checked. [2018-04-13 05:39:32,978 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:39:32,994 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:39:32,994 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-04-13 05:39:33,358 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 102 check-sat command(s) [2018-04-13 05:39:33,358 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 05:39:33,382 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:39:33,643 INFO L134 CoverageAnalysis]: Checked inductivity of 40804 backedges. 0 proven. 20402 refuted. 0 times theorem prover too weak. 20402 trivial. 0 not checked. [2018-04-13 05:39:33,643 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:39:33,643 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [106, 104] total 107 [2018-04-13 05:39:33,644 INFO L442 AbstractCegarLoop]: Interpolant automaton has 107 states [2018-04-13 05:39:33,644 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 107 interpolants. [2018-04-13 05:39:33,644 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5464, Invalid=5878, Unknown=0, NotChecked=0, Total=11342 [2018-04-13 05:39:33,644 INFO L87 Difference]: Start difference. First operand 846 states and 847 transitions. Second operand 107 states. [2018-04-13 05:39:36,610 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:39:36,610 INFO L93 Difference]: Finished difference Result 858 states and 859 transitions. [2018-04-13 05:39:36,610 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 106 states. [2018-04-13 05:39:36,610 INFO L78 Accepts]: Start accepts. Automaton has 107 states. Word has length 835 [2018-04-13 05:39:36,611 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:39:36,611 INFO L225 Difference]: With dead ends: 858 [2018-04-13 05:39:36,611 INFO L226 Difference]: Without dead ends: 858 [2018-04-13 05:39:36,613 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 1144 GetRequests, 937 SyntacticMatches, 0 SemanticMatches, 207 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5552 ImplicationChecksByTransitivity, 4.5s TimeCoverageRelationStatistics Valid=16175, Invalid=27297, Unknown=0, NotChecked=0, Total=43472 [2018-04-13 05:39:36,613 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 858 states. [2018-04-13 05:39:36,615 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 858 to 854. [2018-04-13 05:39:36,616 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 854 states. [2018-04-13 05:39:36,616 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 854 states to 854 states and 855 transitions. [2018-04-13 05:39:36,616 INFO L78 Accepts]: Start accepts. Automaton has 854 states and 855 transitions. Word has length 835 [2018-04-13 05:39:36,616 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:39:36,616 INFO L459 AbstractCegarLoop]: Abstraction has 854 states and 855 transitions. [2018-04-13 05:39:36,616 INFO L460 AbstractCegarLoop]: Interpolant automaton has 107 states. [2018-04-13 05:39:36,616 INFO L276 IsEmpty]: Start isEmpty. Operand 854 states and 855 transitions. [2018-04-13 05:39:36,619 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 844 [2018-04-13 05:39:36,619 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:39:36,620 INFO L355 BasicCegarLoop]: trace histogram [103, 103, 102, 102, 102, 102, 102, 102, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:39:36,620 INFO L408 AbstractCegarLoop]: === Iteration 108 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:39:36,620 INFO L82 PathProgramCache]: Analyzing trace with hash 1432195210, now seen corresponding path program 96 times [2018-04-13 05:39:36,620 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:39:36,620 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:39:36,620 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:39:36,620 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 05:39:36,620 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:39:36,772 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:39:36,773 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:39:39,351 INFO L134 CoverageAnalysis]: Checked inductivity of 41616 backedges. 0 proven. 20808 refuted. 0 times theorem prover too weak. 20808 trivial. 0 not checked. [2018-04-13 05:39:39,351 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:39:39,351 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:39:39,351 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-04-13 05:39:39,614 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 103 check-sat command(s) [2018-04-13 05:39:39,614 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 05:39:39,760 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:39:42,771 INFO L134 CoverageAnalysis]: Checked inductivity of 41616 backedges. 0 proven. 20808 refuted. 0 times theorem prover too weak. 20808 trivial. 0 not checked. [2018-04-13 05:39:42,771 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:39:42,772 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [107, 106] total 210 [2018-04-13 05:39:42,772 INFO L442 AbstractCegarLoop]: Interpolant automaton has 210 states [2018-04-13 05:39:42,773 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 210 interpolants. [2018-04-13 05:39:42,774 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=16381, Invalid=27509, Unknown=0, NotChecked=0, Total=43890 [2018-04-13 05:39:42,774 INFO L87 Difference]: Start difference. First operand 854 states and 855 transitions. Second operand 210 states. [2018-04-13 05:39:45,511 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:39:45,511 INFO L93 Difference]: Finished difference Result 866 states and 867 transitions. [2018-04-13 05:39:45,511 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 107 states. [2018-04-13 05:39:45,511 INFO L78 Accepts]: Start accepts. Automaton has 210 states. Word has length 843 [2018-04-13 05:39:45,511 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:39:45,512 INFO L225 Difference]: With dead ends: 866 [2018-04-13 05:39:45,512 INFO L226 Difference]: Without dead ends: 866 [2018-04-13 05:39:45,513 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 950 GetRequests, 740 SyntacticMatches, 1 SemanticMatches, 209 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 21112 ImplicationChecksByTransitivity, 4.7s TimeCoverageRelationStatistics Valid=16590, Invalid=27720, Unknown=0, NotChecked=0, Total=44310 [2018-04-13 05:39:45,513 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 866 states. [2018-04-13 05:39:45,515 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 866 to 862. [2018-04-13 05:39:45,516 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 862 states. [2018-04-13 05:39:45,516 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 862 states to 862 states and 863 transitions. [2018-04-13 05:39:45,516 INFO L78 Accepts]: Start accepts. Automaton has 862 states and 863 transitions. Word has length 843 [2018-04-13 05:39:45,516 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:39:45,516 INFO L459 AbstractCegarLoop]: Abstraction has 862 states and 863 transitions. [2018-04-13 05:39:45,516 INFO L460 AbstractCegarLoop]: Interpolant automaton has 210 states. [2018-04-13 05:39:45,516 INFO L276 IsEmpty]: Start isEmpty. Operand 862 states and 863 transitions. [2018-04-13 05:39:45,519 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 852 [2018-04-13 05:39:45,519 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:39:45,519 INFO L355 BasicCegarLoop]: trace histogram [104, 104, 103, 103, 103, 103, 103, 103, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:39:45,520 INFO L408 AbstractCegarLoop]: === Iteration 109 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:39:45,520 INFO L82 PathProgramCache]: Analyzing trace with hash 655108202, now seen corresponding path program 97 times [2018-04-13 05:39:45,520 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:39:45,520 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:39:45,520 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:39:45,520 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 05:39:45,520 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:39:45,641 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:39:45,642 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:39:48,255 INFO L134 CoverageAnalysis]: Checked inductivity of 42436 backedges. 0 proven. 21218 refuted. 0 times theorem prover too weak. 21218 trivial. 0 not checked. [2018-04-13 05:39:48,255 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:39:48,255 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:39:48,255 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 05:39:48,333 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:39:48,352 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:39:51,397 INFO L134 CoverageAnalysis]: Checked inductivity of 42436 backedges. 0 proven. 21218 refuted. 0 times theorem prover too weak. 21218 trivial. 0 not checked. [2018-04-13 05:39:51,398 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:39:51,426 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [108, 107] total 212 [2018-04-13 05:39:51,427 INFO L442 AbstractCegarLoop]: Interpolant automaton has 212 states [2018-04-13 05:39:51,428 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 212 interpolants. [2018-04-13 05:39:51,429 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=16696, Invalid=28036, Unknown=0, NotChecked=0, Total=44732 [2018-04-13 05:39:51,429 INFO L87 Difference]: Start difference. First operand 862 states and 863 transitions. Second operand 212 states. [2018-04-13 05:39:54,435 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:39:54,435 INFO L93 Difference]: Finished difference Result 874 states and 875 transitions. [2018-04-13 05:39:54,435 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 108 states. [2018-04-13 05:39:54,435 INFO L78 Accepts]: Start accepts. Automaton has 212 states. Word has length 851 [2018-04-13 05:39:54,436 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:39:54,437 INFO L225 Difference]: With dead ends: 874 [2018-04-13 05:39:54,437 INFO L226 Difference]: Without dead ends: 874 [2018-04-13 05:39:54,437 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 959 GetRequests, 747 SyntacticMatches, 1 SemanticMatches, 211 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 21525 ImplicationChecksByTransitivity, 4.7s TimeCoverageRelationStatistics Valid=16907, Invalid=28249, Unknown=0, NotChecked=0, Total=45156 [2018-04-13 05:39:54,438 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 874 states. [2018-04-13 05:39:54,441 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 874 to 870. [2018-04-13 05:39:54,441 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 870 states. [2018-04-13 05:39:54,442 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 870 states to 870 states and 871 transitions. [2018-04-13 05:39:54,442 INFO L78 Accepts]: Start accepts. Automaton has 870 states and 871 transitions. Word has length 851 [2018-04-13 05:39:54,442 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:39:54,442 INFO L459 AbstractCegarLoop]: Abstraction has 870 states and 871 transitions. [2018-04-13 05:39:54,442 INFO L460 AbstractCegarLoop]: Interpolant automaton has 212 states. [2018-04-13 05:39:54,443 INFO L276 IsEmpty]: Start isEmpty. Operand 870 states and 871 transitions. [2018-04-13 05:39:54,447 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 860 [2018-04-13 05:39:54,448 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:39:54,448 INFO L355 BasicCegarLoop]: trace histogram [105, 105, 104, 104, 104, 104, 104, 104, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:39:54,448 INFO L408 AbstractCegarLoop]: === Iteration 110 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:39:54,448 INFO L82 PathProgramCache]: Analyzing trace with hash 1128581450, now seen corresponding path program 98 times [2018-04-13 05:39:54,448 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:39:54,448 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:39:54,449 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:39:54,449 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 05:39:54,449 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:39:54,570 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:39:54,571 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:39:57,232 INFO L134 CoverageAnalysis]: Checked inductivity of 43264 backedges. 0 proven. 21632 refuted. 0 times theorem prover too weak. 21632 trivial. 0 not checked. [2018-04-13 05:39:57,232 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:39:57,232 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:39:57,233 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-04-13 05:39:57,383 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-04-13 05:39:57,383 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 05:39:57,408 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:39:57,638 INFO L134 CoverageAnalysis]: Checked inductivity of 43264 backedges. 0 proven. 21632 refuted. 0 times theorem prover too weak. 21632 trivial. 0 not checked. [2018-04-13 05:39:57,638 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:39:57,638 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [109, 107] total 110 [2018-04-13 05:39:57,639 INFO L442 AbstractCegarLoop]: Interpolant automaton has 110 states [2018-04-13 05:39:57,639 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 110 interpolants. [2018-04-13 05:39:57,640 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5782, Invalid=6208, Unknown=0, NotChecked=0, Total=11990 [2018-04-13 05:39:57,640 INFO L87 Difference]: Start difference. First operand 870 states and 871 transitions. Second operand 110 states. [2018-04-13 05:40:00,861 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:40:00,861 INFO L93 Difference]: Finished difference Result 882 states and 883 transitions. [2018-04-13 05:40:00,861 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 109 states. [2018-04-13 05:40:00,861 INFO L78 Accepts]: Start accepts. Automaton has 110 states. Word has length 859 [2018-04-13 05:40:00,862 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:40:00,862 INFO L225 Difference]: With dead ends: 882 [2018-04-13 05:40:00,862 INFO L226 Difference]: Without dead ends: 882 [2018-04-13 05:40:00,864 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 1177 GetRequests, 964 SyntacticMatches, 0 SemanticMatches, 213 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5873 ImplicationChecksByTransitivity, 4.8s TimeCoverageRelationStatistics Valid=17123, Invalid=28887, Unknown=0, NotChecked=0, Total=46010 [2018-04-13 05:40:00,864 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 882 states. [2018-04-13 05:40:00,867 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 882 to 878. [2018-04-13 05:40:00,867 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 878 states. [2018-04-13 05:40:00,867 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 878 states to 878 states and 879 transitions. [2018-04-13 05:40:00,868 INFO L78 Accepts]: Start accepts. Automaton has 878 states and 879 transitions. Word has length 859 [2018-04-13 05:40:00,868 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:40:00,868 INFO L459 AbstractCegarLoop]: Abstraction has 878 states and 879 transitions. [2018-04-13 05:40:00,868 INFO L460 AbstractCegarLoop]: Interpolant automaton has 110 states. [2018-04-13 05:40:00,868 INFO L276 IsEmpty]: Start isEmpty. Operand 878 states and 879 transitions. [2018-04-13 05:40:00,871 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 868 [2018-04-13 05:40:00,871 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:40:00,871 INFO L355 BasicCegarLoop]: trace histogram [106, 106, 105, 105, 105, 105, 105, 105, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:40:00,871 INFO L408 AbstractCegarLoop]: === Iteration 111 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:40:00,872 INFO L82 PathProgramCache]: Analyzing trace with hash -1949174998, now seen corresponding path program 99 times [2018-04-13 05:40:00,872 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:40:00,872 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:40:00,872 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:40:00,872 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 05:40:00,872 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:40:00,990 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:40:00,991 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:40:04,001 INFO L134 CoverageAnalysis]: Checked inductivity of 44100 backedges. 0 proven. 22050 refuted. 0 times theorem prover too weak. 22050 trivial. 0 not checked. [2018-04-13 05:40:04,001 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:40:04,001 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:40:04,001 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-04-13 05:40:04,276 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 106 check-sat command(s) [2018-04-13 05:40:04,276 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 05:40:04,537 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:40:04,773 INFO L134 CoverageAnalysis]: Checked inductivity of 44100 backedges. 0 proven. 22050 refuted. 0 times theorem prover too weak. 22050 trivial. 0 not checked. [2018-04-13 05:40:04,774 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:40:04,774 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [110, 108] total 111 [2018-04-13 05:40:04,774 INFO L442 AbstractCegarLoop]: Interpolant automaton has 111 states [2018-04-13 05:40:04,775 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 111 interpolants. [2018-04-13 05:40:04,775 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5890, Invalid=6320, Unknown=0, NotChecked=0, Total=12210 [2018-04-13 05:40:04,775 INFO L87 Difference]: Start difference. First operand 878 states and 879 transitions. Second operand 111 states. [2018-04-13 05:40:08,067 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:40:08,067 INFO L93 Difference]: Finished difference Result 890 states and 891 transitions. [2018-04-13 05:40:08,067 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 110 states. [2018-04-13 05:40:08,067 INFO L78 Accepts]: Start accepts. Automaton has 111 states. Word has length 867 [2018-04-13 05:40:08,068 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:40:08,068 INFO L225 Difference]: With dead ends: 890 [2018-04-13 05:40:08,068 INFO L226 Difference]: Without dead ends: 890 [2018-04-13 05:40:08,070 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 1188 GetRequests, 973 SyntacticMatches, 0 SemanticMatches, 215 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5982 ImplicationChecksByTransitivity, 5.2s TimeCoverageRelationStatistics Valid=17445, Invalid=29427, Unknown=0, NotChecked=0, Total=46872 [2018-04-13 05:40:08,070 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 890 states. [2018-04-13 05:40:08,072 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 890 to 886. [2018-04-13 05:40:08,073 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 886 states. [2018-04-13 05:40:08,073 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 886 states to 886 states and 887 transitions. [2018-04-13 05:40:08,073 INFO L78 Accepts]: Start accepts. Automaton has 886 states and 887 transitions. Word has length 867 [2018-04-13 05:40:08,073 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:40:08,073 INFO L459 AbstractCegarLoop]: Abstraction has 886 states and 887 transitions. [2018-04-13 05:40:08,073 INFO L460 AbstractCegarLoop]: Interpolant automaton has 111 states. [2018-04-13 05:40:08,074 INFO L276 IsEmpty]: Start isEmpty. Operand 886 states and 887 transitions. [2018-04-13 05:40:08,077 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 876 [2018-04-13 05:40:08,077 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:40:08,077 INFO L355 BasicCegarLoop]: trace histogram [107, 107, 106, 106, 106, 106, 106, 106, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:40:08,077 INFO L408 AbstractCegarLoop]: === Iteration 112 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:40:08,077 INFO L82 PathProgramCache]: Analyzing trace with hash 306062858, now seen corresponding path program 100 times [2018-04-13 05:40:08,077 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:40:08,077 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:40:08,078 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:40:08,078 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 05:40:08,078 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:40:08,198 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:40:08,199 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:40:10,925 INFO L134 CoverageAnalysis]: Checked inductivity of 44944 backedges. 0 proven. 22472 refuted. 0 times theorem prover too weak. 22472 trivial. 0 not checked. [2018-04-13 05:40:10,925 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:40:10,925 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:40:10,926 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-04-13 05:40:11,473 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-04-13 05:40:11,474 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 05:40:11,676 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:40:11,678 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-13 05:40:11,678 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 05:40:11,680 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:40:11,680 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:12, output treesize:11 [2018-04-13 05:40:25,244 INFO L134 CoverageAnalysis]: Checked inductivity of 44944 backedges. 22472 proven. 22472 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-13 05:40:25,245 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:40:25,245 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [111, 218] total 327 [2018-04-13 05:40:25,245 INFO L442 AbstractCegarLoop]: Interpolant automaton has 327 states [2018-04-13 05:40:25,247 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 327 interpolants. [2018-04-13 05:40:25,248 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=23762, Invalid=82840, Unknown=0, NotChecked=0, Total=106602 [2018-04-13 05:40:25,248 INFO L87 Difference]: Start difference. First operand 886 states and 887 transitions. Second operand 327 states. [2018-04-13 05:40:33,480 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:40:33,480 INFO L93 Difference]: Finished difference Result 898 states and 899 transitions. [2018-04-13 05:40:33,481 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 114 states. [2018-04-13 05:40:33,481 INFO L78 Accepts]: Start accepts. Automaton has 327 states. Word has length 875 [2018-04-13 05:40:33,481 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:40:33,482 INFO L225 Difference]: With dead ends: 898 [2018-04-13 05:40:33,482 INFO L226 Difference]: Without dead ends: 898 [2018-04-13 05:40:33,485 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 1096 GetRequests, 660 SyntacticMatches, 1 SemanticMatches, 435 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 80781 ImplicationChecksByTransitivity, 18.5s TimeCoverageRelationStatistics Valid=41539, Invalid=148993, Unknown=0, NotChecked=0, Total=190532 [2018-04-13 05:40:33,485 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 898 states. [2018-04-13 05:40:33,488 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 898 to 894. [2018-04-13 05:40:33,488 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 894 states. [2018-04-13 05:40:33,488 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 894 states to 894 states and 895 transitions. [2018-04-13 05:40:33,488 INFO L78 Accepts]: Start accepts. Automaton has 894 states and 895 transitions. Word has length 875 [2018-04-13 05:40:33,489 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:40:33,489 INFO L459 AbstractCegarLoop]: Abstraction has 894 states and 895 transitions. [2018-04-13 05:40:33,489 INFO L460 AbstractCegarLoop]: Interpolant automaton has 327 states. [2018-04-13 05:40:33,489 INFO L276 IsEmpty]: Start isEmpty. Operand 894 states and 895 transitions. [2018-04-13 05:40:33,492 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 884 [2018-04-13 05:40:33,492 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:40:33,492 INFO L355 BasicCegarLoop]: trace histogram [108, 108, 107, 107, 107, 107, 107, 107, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:40:33,492 INFO L408 AbstractCegarLoop]: === Iteration 113 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:40:33,492 INFO L82 PathProgramCache]: Analyzing trace with hash 936632810, now seen corresponding path program 101 times [2018-04-13 05:40:33,492 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:40:33,492 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:40:33,493 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:40:33,493 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 05:40:33,493 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:40:33,617 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:40:33,618 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:40:36,325 INFO L134 CoverageAnalysis]: Checked inductivity of 45796 backedges. 0 proven. 22898 refuted. 0 times theorem prover too weak. 22898 trivial. 0 not checked. [2018-04-13 05:40:36,325 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:40:36,325 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:40:36,326 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-04-13 05:40:36,778 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 108 check-sat command(s) [2018-04-13 05:40:36,778 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 05:40:36,805 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:40:37,086 INFO L134 CoverageAnalysis]: Checked inductivity of 45796 backedges. 0 proven. 22898 refuted. 0 times theorem prover too weak. 22898 trivial. 0 not checked. [2018-04-13 05:40:37,086 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:40:37,086 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [112, 110] total 113 [2018-04-13 05:40:37,087 INFO L442 AbstractCegarLoop]: Interpolant automaton has 113 states [2018-04-13 05:40:37,087 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 113 interpolants. [2018-04-13 05:40:37,087 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=6109, Invalid=6547, Unknown=0, NotChecked=0, Total=12656 [2018-04-13 05:40:37,088 INFO L87 Difference]: Start difference. First operand 894 states and 895 transitions. Second operand 113 states. [2018-04-13 05:40:40,727 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:40:40,727 INFO L93 Difference]: Finished difference Result 906 states and 907 transitions. [2018-04-13 05:40:40,727 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 112 states. [2018-04-13 05:40:40,727 INFO L78 Accepts]: Start accepts. Automaton has 113 states. Word has length 883 [2018-04-13 05:40:40,728 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:40:40,728 INFO L225 Difference]: With dead ends: 906 [2018-04-13 05:40:40,728 INFO L226 Difference]: Without dead ends: 906 [2018-04-13 05:40:40,729 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 1210 GetRequests, 991 SyntacticMatches, 0 SemanticMatches, 219 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6203 ImplicationChecksByTransitivity, 5.2s TimeCoverageRelationStatistics Valid=18098, Invalid=30522, Unknown=0, NotChecked=0, Total=48620 [2018-04-13 05:40:40,729 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 906 states. [2018-04-13 05:40:40,732 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 906 to 902. [2018-04-13 05:40:40,732 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 902 states. [2018-04-13 05:40:40,732 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 902 states to 902 states and 903 transitions. [2018-04-13 05:40:40,732 INFO L78 Accepts]: Start accepts. Automaton has 902 states and 903 transitions. Word has length 883 [2018-04-13 05:40:40,732 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:40:40,732 INFO L459 AbstractCegarLoop]: Abstraction has 902 states and 903 transitions. [2018-04-13 05:40:40,732 INFO L460 AbstractCegarLoop]: Interpolant automaton has 113 states. [2018-04-13 05:40:40,732 INFO L276 IsEmpty]: Start isEmpty. Operand 902 states and 903 transitions. [2018-04-13 05:40:40,736 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 892 [2018-04-13 05:40:40,736 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:40:40,736 INFO L355 BasicCegarLoop]: trace histogram [109, 109, 108, 108, 108, 108, 108, 108, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:40:40,736 INFO L408 AbstractCegarLoop]: === Iteration 114 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:40:40,736 INFO L82 PathProgramCache]: Analyzing trace with hash -845306166, now seen corresponding path program 102 times [2018-04-13 05:40:40,736 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:40:40,736 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:40:40,736 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:40:40,737 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 05:40:40,737 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:40:40,861 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:40:40,862 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:40:43,641 INFO L134 CoverageAnalysis]: Checked inductivity of 46656 backedges. 0 proven. 23328 refuted. 0 times theorem prover too weak. 23328 trivial. 0 not checked. [2018-04-13 05:40:43,641 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:40:43,641 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:40:43,642 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-04-13 05:40:43,980 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 109 check-sat command(s) [2018-04-13 05:40:43,981 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 05:40:44,082 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:40:44,361 INFO L134 CoverageAnalysis]: Checked inductivity of 46656 backedges. 0 proven. 23328 refuted. 0 times theorem prover too weak. 23328 trivial. 0 not checked. [2018-04-13 05:40:44,361 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:40:44,361 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [113, 111] total 114 [2018-04-13 05:40:44,362 INFO L442 AbstractCegarLoop]: Interpolant automaton has 114 states [2018-04-13 05:40:44,362 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 114 interpolants. [2018-04-13 05:40:44,362 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=6220, Invalid=6662, Unknown=0, NotChecked=0, Total=12882 [2018-04-13 05:40:44,362 INFO L87 Difference]: Start difference. First operand 902 states and 903 transitions. Second operand 114 states. [2018-04-13 05:40:47,854 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:40:47,854 INFO L93 Difference]: Finished difference Result 914 states and 915 transitions. [2018-04-13 05:40:47,854 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 113 states. [2018-04-13 05:40:47,854 INFO L78 Accepts]: Start accepts. Automaton has 114 states. Word has length 891 [2018-04-13 05:40:47,854 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:40:47,855 INFO L225 Difference]: With dead ends: 914 [2018-04-13 05:40:47,855 INFO L226 Difference]: Without dead ends: 914 [2018-04-13 05:40:47,856 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 1221 GetRequests, 1000 SyntacticMatches, 0 SemanticMatches, 221 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6315 ImplicationChecksByTransitivity, 5.1s TimeCoverageRelationStatistics Valid=18429, Invalid=31077, Unknown=0, NotChecked=0, Total=49506 [2018-04-13 05:40:47,856 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 914 states. [2018-04-13 05:40:47,858 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 914 to 910. [2018-04-13 05:40:47,858 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 910 states. [2018-04-13 05:40:47,859 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 910 states to 910 states and 911 transitions. [2018-04-13 05:40:47,859 INFO L78 Accepts]: Start accepts. Automaton has 910 states and 911 transitions. Word has length 891 [2018-04-13 05:40:47,859 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:40:47,859 INFO L459 AbstractCegarLoop]: Abstraction has 910 states and 911 transitions. [2018-04-13 05:40:47,859 INFO L460 AbstractCegarLoop]: Interpolant automaton has 114 states. [2018-04-13 05:40:47,859 INFO L276 IsEmpty]: Start isEmpty. Operand 910 states and 911 transitions. [2018-04-13 05:40:47,862 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 900 [2018-04-13 05:40:47,862 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:40:47,862 INFO L355 BasicCegarLoop]: trace histogram [110, 110, 109, 109, 109, 109, 109, 109, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:40:47,863 INFO L408 AbstractCegarLoop]: === Iteration 115 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:40:47,863 INFO L82 PathProgramCache]: Analyzing trace with hash 879097002, now seen corresponding path program 103 times [2018-04-13 05:40:47,863 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:40:47,863 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:40:47,863 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:40:47,863 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 05:40:47,863 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:40:47,996 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:40:47,998 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:40:50,889 INFO L134 CoverageAnalysis]: Checked inductivity of 47524 backedges. 0 proven. 23762 refuted. 0 times theorem prover too weak. 23762 trivial. 0 not checked. [2018-04-13 05:40:50,889 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:40:50,889 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:40:50,889 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 05:40:50,970 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:40:50,991 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:40:54,346 INFO L134 CoverageAnalysis]: Checked inductivity of 47524 backedges. 0 proven. 23762 refuted. 0 times theorem prover too weak. 23762 trivial. 0 not checked. [2018-04-13 05:40:54,346 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:40:54,347 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [114, 113] total 224 [2018-04-13 05:40:54,347 INFO L442 AbstractCegarLoop]: Interpolant automaton has 224 states [2018-04-13 05:40:54,348 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 224 interpolants. [2018-04-13 05:40:54,349 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=18649, Invalid=31303, Unknown=0, NotChecked=0, Total=49952 [2018-04-13 05:40:54,349 INFO L87 Difference]: Start difference. First operand 910 states and 911 transitions. Second operand 224 states. [2018-04-13 05:40:57,875 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:40:57,875 INFO L93 Difference]: Finished difference Result 922 states and 923 transitions. [2018-04-13 05:40:57,890 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 114 states. [2018-04-13 05:40:57,890 INFO L78 Accepts]: Start accepts. Automaton has 224 states. Word has length 899 [2018-04-13 05:40:57,890 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:40:57,891 INFO L225 Difference]: With dead ends: 922 [2018-04-13 05:40:57,891 INFO L226 Difference]: Without dead ends: 922 [2018-04-13 05:40:57,892 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 1013 GetRequests, 789 SyntacticMatches, 1 SemanticMatches, 223 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 24087 ImplicationChecksByTransitivity, 5.3s TimeCoverageRelationStatistics Valid=18872, Invalid=31528, Unknown=0, NotChecked=0, Total=50400 [2018-04-13 05:40:57,892 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 922 states. [2018-04-13 05:40:57,895 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 922 to 918. [2018-04-13 05:40:57,895 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 918 states. [2018-04-13 05:40:57,895 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 918 states to 918 states and 919 transitions. [2018-04-13 05:40:57,895 INFO L78 Accepts]: Start accepts. Automaton has 918 states and 919 transitions. Word has length 899 [2018-04-13 05:40:57,896 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:40:57,896 INFO L459 AbstractCegarLoop]: Abstraction has 918 states and 919 transitions. [2018-04-13 05:40:57,896 INFO L460 AbstractCegarLoop]: Interpolant automaton has 224 states. [2018-04-13 05:40:57,896 INFO L276 IsEmpty]: Start isEmpty. Operand 918 states and 919 transitions. [2018-04-13 05:40:57,899 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 908 [2018-04-13 05:40:57,899 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:40:57,899 INFO L355 BasicCegarLoop]: trace histogram [111, 111, 110, 110, 110, 110, 110, 110, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:40:57,899 INFO L408 AbstractCegarLoop]: === Iteration 116 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:40:57,899 INFO L82 PathProgramCache]: Analyzing trace with hash 2092387210, now seen corresponding path program 104 times [2018-04-13 05:40:57,899 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:40:57,900 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:40:57,900 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:40:57,900 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 05:40:57,900 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:40:58,030 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:40:58,031 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:41:00,926 INFO L134 CoverageAnalysis]: Checked inductivity of 48400 backedges. 0 proven. 24200 refuted. 0 times theorem prover too weak. 24200 trivial. 0 not checked. [2018-04-13 05:41:00,926 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:41:00,926 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:41:00,926 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-04-13 05:41:01,109 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-04-13 05:41:01,109 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 05:41:01,132 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:41:01,417 INFO L134 CoverageAnalysis]: Checked inductivity of 48400 backedges. 0 proven. 24200 refuted. 0 times theorem prover too weak. 24200 trivial. 0 not checked. [2018-04-13 05:41:01,417 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:41:01,417 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [115, 113] total 116 [2018-04-13 05:41:01,417 INFO L442 AbstractCegarLoop]: Interpolant automaton has 116 states [2018-04-13 05:41:01,418 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 116 interpolants. [2018-04-13 05:41:01,418 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=6445, Invalid=6895, Unknown=0, NotChecked=0, Total=13340 [2018-04-13 05:41:01,418 INFO L87 Difference]: Start difference. First operand 918 states and 919 transitions. Second operand 116 states. [2018-04-13 05:41:05,201 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:41:05,201 INFO L93 Difference]: Finished difference Result 930 states and 931 transitions. [2018-04-13 05:41:05,201 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 115 states. [2018-04-13 05:41:05,201 INFO L78 Accepts]: Start accepts. Automaton has 116 states. Word has length 907 [2018-04-13 05:41:05,201 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:41:05,202 INFO L225 Difference]: With dead ends: 930 [2018-04-13 05:41:05,202 INFO L226 Difference]: Without dead ends: 930 [2018-04-13 05:41:05,203 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 1243 GetRequests, 1018 SyntacticMatches, 0 SemanticMatches, 225 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6542 ImplicationChecksByTransitivity, 5.4s TimeCoverageRelationStatistics Valid=19100, Invalid=32202, Unknown=0, NotChecked=0, Total=51302 [2018-04-13 05:41:05,203 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 930 states. [2018-04-13 05:41:05,205 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 930 to 926. [2018-04-13 05:41:05,206 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 926 states. [2018-04-13 05:41:05,206 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 926 states to 926 states and 927 transitions. [2018-04-13 05:41:05,206 INFO L78 Accepts]: Start accepts. Automaton has 926 states and 927 transitions. Word has length 907 [2018-04-13 05:41:05,206 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:41:05,206 INFO L459 AbstractCegarLoop]: Abstraction has 926 states and 927 transitions. [2018-04-13 05:41:05,207 INFO L460 AbstractCegarLoop]: Interpolant automaton has 116 states. [2018-04-13 05:41:05,207 INFO L276 IsEmpty]: Start isEmpty. Operand 926 states and 927 transitions. [2018-04-13 05:41:05,210 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 916 [2018-04-13 05:41:05,210 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:41:05,210 INFO L355 BasicCegarLoop]: trace histogram [112, 112, 111, 111, 111, 111, 111, 111, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:41:05,210 INFO L408 AbstractCegarLoop]: === Iteration 117 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:41:05,210 INFO L82 PathProgramCache]: Analyzing trace with hash -2032391318, now seen corresponding path program 105 times [2018-04-13 05:41:05,210 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:41:05,210 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:41:05,211 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:41:05,211 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 05:41:05,211 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:41:05,348 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:41:05,349 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:41:08,313 INFO L134 CoverageAnalysis]: Checked inductivity of 49284 backedges. 0 proven. 24642 refuted. 0 times theorem prover too weak. 24642 trivial. 0 not checked. [2018-04-13 05:41:08,313 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:41:08,313 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:41:08,313 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-04-13 05:41:08,628 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 112 check-sat command(s) [2018-04-13 05:41:08,628 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 05:41:08,715 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:41:12,232 INFO L134 CoverageAnalysis]: Checked inductivity of 49284 backedges. 0 proven. 24642 refuted. 0 times theorem prover too weak. 24642 trivial. 0 not checked. [2018-04-13 05:41:12,232 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:41:12,232 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [116, 115] total 228 [2018-04-13 05:41:12,233 INFO L442 AbstractCegarLoop]: Interpolant automaton has 228 states [2018-04-13 05:41:12,234 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 228 interpolants. [2018-04-13 05:41:12,235 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=19324, Invalid=32432, Unknown=0, NotChecked=0, Total=51756 [2018-04-13 05:41:12,235 INFO L87 Difference]: Start difference. First operand 926 states and 927 transitions. Second operand 228 states. [2018-04-13 05:41:15,992 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:41:15,992 INFO L93 Difference]: Finished difference Result 938 states and 939 transitions. [2018-04-13 05:41:15,992 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 116 states. [2018-04-13 05:41:15,992 INFO L78 Accepts]: Start accepts. Automaton has 228 states. Word has length 915 [2018-04-13 05:41:15,992 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:41:15,993 INFO L225 Difference]: With dead ends: 938 [2018-04-13 05:41:15,994 INFO L226 Difference]: Without dead ends: 938 [2018-04-13 05:41:15,994 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 1031 GetRequests, 803 SyntacticMatches, 1 SemanticMatches, 227 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 24973 ImplicationChecksByTransitivity, 5.5s TimeCoverageRelationStatistics Valid=19551, Invalid=32661, Unknown=0, NotChecked=0, Total=52212 [2018-04-13 05:41:15,995 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 938 states. [2018-04-13 05:41:15,997 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 938 to 934. [2018-04-13 05:41:15,998 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 934 states. [2018-04-13 05:41:15,998 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 934 states to 934 states and 935 transitions. [2018-04-13 05:41:15,998 INFO L78 Accepts]: Start accepts. Automaton has 934 states and 935 transitions. Word has length 915 [2018-04-13 05:41:15,998 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:41:15,998 INFO L459 AbstractCegarLoop]: Abstraction has 934 states and 935 transitions. [2018-04-13 05:41:15,999 INFO L460 AbstractCegarLoop]: Interpolant automaton has 228 states. [2018-04-13 05:41:15,999 INFO L276 IsEmpty]: Start isEmpty. Operand 934 states and 935 transitions. [2018-04-13 05:41:16,002 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 924 [2018-04-13 05:41:16,002 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:41:16,002 INFO L355 BasicCegarLoop]: trace histogram [113, 113, 112, 112, 112, 112, 112, 112, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:41:16,002 INFO L408 AbstractCegarLoop]: === Iteration 118 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:41:16,003 INFO L82 PathProgramCache]: Analyzing trace with hash 585045066, now seen corresponding path program 106 times [2018-04-13 05:41:16,003 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:41:16,003 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:41:16,003 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:41:16,003 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 05:41:16,003 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:41:16,156 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:41:16,157 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:41:19,182 INFO L134 CoverageAnalysis]: Checked inductivity of 50176 backedges. 0 proven. 25088 refuted. 0 times theorem prover too weak. 25088 trivial. 0 not checked. [2018-04-13 05:41:19,182 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:41:19,182 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:41:19,183 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-04-13 05:41:19,861 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-04-13 05:41:19,861 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 05:41:20,113 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:41:20,119 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-13 05:41:20,119 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 05:41:20,122 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:41:20,122 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:12, output treesize:11 [2018-04-13 05:41:35,068 INFO L134 CoverageAnalysis]: Checked inductivity of 50176 backedges. 25088 proven. 25088 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-13 05:41:35,068 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:41:35,068 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [117, 230] total 345 [2018-04-13 05:41:35,069 INFO L442 AbstractCegarLoop]: Interpolant automaton has 345 states [2018-04-13 05:41:35,070 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 345 interpolants. [2018-04-13 05:41:35,072 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=26450, Invalid=92230, Unknown=0, NotChecked=0, Total=118680 [2018-04-13 05:41:35,072 INFO L87 Difference]: Start difference. First operand 934 states and 935 transitions. Second operand 345 states. [2018-04-13 05:41:44,673 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:41:44,673 INFO L93 Difference]: Finished difference Result 946 states and 947 transitions. [2018-04-13 05:41:44,674 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 120 states. [2018-04-13 05:41:44,674 INFO L78 Accepts]: Start accepts. Automaton has 345 states. Word has length 923 [2018-04-13 05:41:44,674 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:41:44,675 INFO L225 Difference]: With dead ends: 946 [2018-04-13 05:41:44,675 INFO L226 Difference]: Without dead ends: 946 [2018-04-13 05:41:44,685 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 1156 GetRequests, 696 SyntacticMatches, 1 SemanticMatches, 459 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 90057 ImplicationChecksByTransitivity, 20.5s TimeCoverageRelationStatistics Valid=46240, Invalid=165820, Unknown=0, NotChecked=0, Total=212060 [2018-04-13 05:41:44,686 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 946 states. [2018-04-13 05:41:44,691 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 946 to 942. [2018-04-13 05:41:44,691 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 942 states. [2018-04-13 05:41:44,692 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 942 states to 942 states and 943 transitions. [2018-04-13 05:41:44,692 INFO L78 Accepts]: Start accepts. Automaton has 942 states and 943 transitions. Word has length 923 [2018-04-13 05:41:44,692 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:41:44,692 INFO L459 AbstractCegarLoop]: Abstraction has 942 states and 943 transitions. [2018-04-13 05:41:44,692 INFO L460 AbstractCegarLoop]: Interpolant automaton has 345 states. [2018-04-13 05:41:44,693 INFO L276 IsEmpty]: Start isEmpty. Operand 942 states and 943 transitions. [2018-04-13 05:41:44,699 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 932 [2018-04-13 05:41:44,699 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:41:44,699 INFO L355 BasicCegarLoop]: trace histogram [114, 114, 113, 113, 113, 113, 113, 113, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:41:44,699 INFO L408 AbstractCegarLoop]: === Iteration 119 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:41:44,699 INFO L82 PathProgramCache]: Analyzing trace with hash 814384682, now seen corresponding path program 107 times [2018-04-13 05:41:44,700 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:41:44,700 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:41:44,700 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:41:44,700 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 05:41:44,700 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:41:44,903 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:41:44,904 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:41:48,009 INFO L134 CoverageAnalysis]: Checked inductivity of 51076 backedges. 0 proven. 25538 refuted. 0 times theorem prover too weak. 25538 trivial. 0 not checked. [2018-04-13 05:41:48,009 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:41:48,009 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:41:48,010 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-04-13 05:41:48,510 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 114 check-sat command(s) [2018-04-13 05:41:48,510 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 05:41:48,540 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:41:48,842 INFO L134 CoverageAnalysis]: Checked inductivity of 51076 backedges. 0 proven. 25538 refuted. 0 times theorem prover too weak. 25538 trivial. 0 not checked. [2018-04-13 05:41:48,842 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:41:48,842 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [118, 116] total 119 [2018-04-13 05:41:48,843 INFO L442 AbstractCegarLoop]: Interpolant automaton has 119 states [2018-04-13 05:41:48,843 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 119 interpolants. [2018-04-13 05:41:48,843 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=6790, Invalid=7252, Unknown=0, NotChecked=0, Total=14042 [2018-04-13 05:41:48,844 INFO L87 Difference]: Start difference. First operand 942 states and 943 transitions. Second operand 119 states. [2018-04-13 05:41:52,666 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:41:52,666 INFO L93 Difference]: Finished difference Result 954 states and 955 transitions. [2018-04-13 05:41:52,666 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 118 states. [2018-04-13 05:41:52,666 INFO L78 Accepts]: Start accepts. Automaton has 119 states. Word has length 931 [2018-04-13 05:41:52,667 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:41:52,667 INFO L225 Difference]: With dead ends: 954 [2018-04-13 05:41:52,667 INFO L226 Difference]: Without dead ends: 954 [2018-04-13 05:41:52,668 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 1276 GetRequests, 1045 SyntacticMatches, 0 SemanticMatches, 231 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6890 ImplicationChecksByTransitivity, 5.6s TimeCoverageRelationStatistics Valid=20129, Invalid=33927, Unknown=0, NotChecked=0, Total=54056 [2018-04-13 05:41:52,668 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 954 states. [2018-04-13 05:41:52,670 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 954 to 950. [2018-04-13 05:41:52,670 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 950 states. [2018-04-13 05:41:52,671 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 950 states to 950 states and 951 transitions. [2018-04-13 05:41:52,671 INFO L78 Accepts]: Start accepts. Automaton has 950 states and 951 transitions. Word has length 931 [2018-04-13 05:41:52,671 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:41:52,671 INFO L459 AbstractCegarLoop]: Abstraction has 950 states and 951 transitions. [2018-04-13 05:41:52,671 INFO L460 AbstractCegarLoop]: Interpolant automaton has 119 states. [2018-04-13 05:41:52,671 INFO L276 IsEmpty]: Start isEmpty. Operand 950 states and 951 transitions. [2018-04-13 05:41:52,675 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 940 [2018-04-13 05:41:52,675 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:41:52,675 INFO L355 BasicCegarLoop]: trace histogram [115, 115, 114, 114, 114, 114, 114, 114, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:41:52,675 INFO L408 AbstractCegarLoop]: === Iteration 120 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:41:52,675 INFO L82 PathProgramCache]: Analyzing trace with hash -1083637494, now seen corresponding path program 108 times [2018-04-13 05:41:52,675 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:41:52,675 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:41:52,676 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:41:52,676 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 05:41:52,676 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:41:52,828 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:41:52,829 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:41:55,936 INFO L134 CoverageAnalysis]: Checked inductivity of 51984 backedges. 0 proven. 25992 refuted. 0 times theorem prover too weak. 25992 trivial. 0 not checked. [2018-04-13 05:41:55,936 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:41:55,936 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:41:55,937 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-04-13 05:41:56,319 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 115 check-sat command(s) [2018-04-13 05:41:56,319 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 05:41:56,441 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:42:00,150 INFO L134 CoverageAnalysis]: Checked inductivity of 51984 backedges. 0 proven. 25992 refuted. 0 times theorem prover too weak. 25992 trivial. 0 not checked. [2018-04-13 05:42:00,150 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:42:00,151 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [119, 118] total 234 [2018-04-13 05:42:00,151 INFO L442 AbstractCegarLoop]: Interpolant automaton has 234 states [2018-04-13 05:42:00,152 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 234 interpolants. [2018-04-13 05:42:00,153 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=20359, Invalid=34163, Unknown=0, NotChecked=0, Total=54522 [2018-04-13 05:42:00,154 INFO L87 Difference]: Start difference. First operand 950 states and 951 transitions. Second operand 234 states. [2018-04-13 05:42:04,340 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:42:04,340 INFO L93 Difference]: Finished difference Result 962 states and 963 transitions. [2018-04-13 05:42:04,341 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 119 states. [2018-04-13 05:42:04,341 INFO L78 Accepts]: Start accepts. Automaton has 234 states. Word has length 939 [2018-04-13 05:42:04,341 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:42:04,342 INFO L225 Difference]: With dead ends: 962 [2018-04-13 05:42:04,342 INFO L226 Difference]: Without dead ends: 962 [2018-04-13 05:42:04,343 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 1058 GetRequests, 824 SyntacticMatches, 1 SemanticMatches, 233 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 26332 ImplicationChecksByTransitivity, 5.8s TimeCoverageRelationStatistics Valid=20592, Invalid=34398, Unknown=0, NotChecked=0, Total=54990 [2018-04-13 05:42:04,343 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 962 states. [2018-04-13 05:42:04,346 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 962 to 958. [2018-04-13 05:42:04,346 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 958 states. [2018-04-13 05:42:04,346 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 958 states to 958 states and 959 transitions. [2018-04-13 05:42:04,346 INFO L78 Accepts]: Start accepts. Automaton has 958 states and 959 transitions. Word has length 939 [2018-04-13 05:42:04,347 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:42:04,347 INFO L459 AbstractCegarLoop]: Abstraction has 958 states and 959 transitions. [2018-04-13 05:42:04,347 INFO L460 AbstractCegarLoop]: Interpolant automaton has 234 states. [2018-04-13 05:42:04,347 INFO L276 IsEmpty]: Start isEmpty. Operand 958 states and 959 transitions. [2018-04-13 05:42:04,350 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 948 [2018-04-13 05:42:04,350 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:42:04,350 INFO L355 BasicCegarLoop]: trace histogram [116, 116, 115, 115, 115, 115, 115, 115, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:42:04,351 INFO L408 AbstractCegarLoop]: === Iteration 121 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:42:04,351 INFO L82 PathProgramCache]: Analyzing trace with hash 784663786, now seen corresponding path program 109 times [2018-04-13 05:42:04,351 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:42:04,351 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:42:04,351 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:42:04,351 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 05:42:04,351 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:42:04,519 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:42:04,520 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:42:07,738 INFO L134 CoverageAnalysis]: Checked inductivity of 52900 backedges. 0 proven. 26450 refuted. 0 times theorem prover too weak. 26450 trivial. 0 not checked. [2018-04-13 05:42:07,738 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:42:07,738 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:42:07,739 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 05:42:07,836 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:42:07,859 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:42:11,633 INFO L134 CoverageAnalysis]: Checked inductivity of 52900 backedges. 0 proven. 26450 refuted. 0 times theorem prover too weak. 26450 trivial. 0 not checked. [2018-04-13 05:42:11,633 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:42:11,633 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [120, 119] total 236 [2018-04-13 05:42:11,634 INFO L442 AbstractCegarLoop]: Interpolant automaton has 236 states [2018-04-13 05:42:11,635 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 236 interpolants. [2018-04-13 05:42:11,636 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=20710, Invalid=34750, Unknown=0, NotChecked=0, Total=55460 [2018-04-13 05:42:11,636 INFO L87 Difference]: Start difference. First operand 958 states and 959 transitions. Second operand 236 states. [2018-04-13 05:42:16,169 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:42:16,169 INFO L93 Difference]: Finished difference Result 970 states and 971 transitions. [2018-04-13 05:42:16,170 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 120 states. [2018-04-13 05:42:16,170 INFO L78 Accepts]: Start accepts. Automaton has 236 states. Word has length 947 [2018-04-13 05:42:16,170 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:42:16,171 INFO L225 Difference]: With dead ends: 970 [2018-04-13 05:42:16,172 INFO L226 Difference]: Without dead ends: 970 [2018-04-13 05:42:16,173 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 1067 GetRequests, 831 SyntacticMatches, 1 SemanticMatches, 235 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 26793 ImplicationChecksByTransitivity, 5.9s TimeCoverageRelationStatistics Valid=20945, Invalid=34987, Unknown=0, NotChecked=0, Total=55932 [2018-04-13 05:42:16,174 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 970 states. [2018-04-13 05:42:16,178 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 970 to 966. [2018-04-13 05:42:16,179 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 966 states. [2018-04-13 05:42:16,180 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 966 states to 966 states and 967 transitions. [2018-04-13 05:42:16,180 INFO L78 Accepts]: Start accepts. Automaton has 966 states and 967 transitions. Word has length 947 [2018-04-13 05:42:16,180 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:42:16,180 INFO L459 AbstractCegarLoop]: Abstraction has 966 states and 967 transitions. [2018-04-13 05:42:16,180 INFO L460 AbstractCegarLoop]: Interpolant automaton has 236 states. [2018-04-13 05:42:16,180 INFO L276 IsEmpty]: Start isEmpty. Operand 966 states and 967 transitions. [2018-04-13 05:42:16,185 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 956 [2018-04-13 05:42:16,185 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:42:16,185 INFO L355 BasicCegarLoop]: trace histogram [117, 117, 116, 116, 116, 116, 116, 116, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:42:16,185 INFO L408 AbstractCegarLoop]: === Iteration 122 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:42:16,185 INFO L82 PathProgramCache]: Analyzing trace with hash 1302925770, now seen corresponding path program 110 times [2018-04-13 05:42:16,185 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:42:16,185 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:42:16,186 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:42:16,186 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 05:42:16,186 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:42:16,422 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:42:16,424 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:42:19,958 INFO L134 CoverageAnalysis]: Checked inductivity of 53824 backedges. 0 proven. 26912 refuted. 0 times theorem prover too weak. 26912 trivial. 0 not checked. [2018-04-13 05:42:19,959 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:42:19,959 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:42:19,959 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-04-13 05:42:20,239 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-04-13 05:42:20,239 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 05:42:20,271 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:42:20,676 INFO L134 CoverageAnalysis]: Checked inductivity of 53824 backedges. 0 proven. 26912 refuted. 0 times theorem prover too weak. 26912 trivial. 0 not checked. [2018-04-13 05:42:20,677 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:42:20,677 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [121, 119] total 122 [2018-04-13 05:42:20,678 INFO L442 AbstractCegarLoop]: Interpolant automaton has 122 states [2018-04-13 05:42:20,679 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 122 interpolants. [2018-04-13 05:42:20,679 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7144, Invalid=7618, Unknown=0, NotChecked=0, Total=14762 [2018-04-13 05:42:20,679 INFO L87 Difference]: Start difference. First operand 966 states and 967 transitions. Second operand 122 states. [2018-04-13 05:42:25,065 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:42:25,065 INFO L93 Difference]: Finished difference Result 978 states and 979 transitions. [2018-04-13 05:42:25,065 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 121 states. [2018-04-13 05:42:25,065 INFO L78 Accepts]: Start accepts. Automaton has 122 states. Word has length 955 [2018-04-13 05:42:25,065 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:42:25,066 INFO L225 Difference]: With dead ends: 978 [2018-04-13 05:42:25,066 INFO L226 Difference]: Without dead ends: 978 [2018-04-13 05:42:25,068 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 1309 GetRequests, 1072 SyntacticMatches, 0 SemanticMatches, 237 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7247 ImplicationChecksByTransitivity, 6.5s TimeCoverageRelationStatistics Valid=21185, Invalid=35697, Unknown=0, NotChecked=0, Total=56882 [2018-04-13 05:42:25,068 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 978 states. [2018-04-13 05:42:25,071 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 978 to 974. [2018-04-13 05:42:25,071 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 974 states. [2018-04-13 05:42:25,072 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 974 states to 974 states and 975 transitions. [2018-04-13 05:42:25,072 INFO L78 Accepts]: Start accepts. Automaton has 974 states and 975 transitions. Word has length 955 [2018-04-13 05:42:25,072 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:42:25,072 INFO L459 AbstractCegarLoop]: Abstraction has 974 states and 975 transitions. [2018-04-13 05:42:25,072 INFO L460 AbstractCegarLoop]: Interpolant automaton has 122 states. [2018-04-13 05:42:25,072 INFO L276 IsEmpty]: Start isEmpty. Operand 974 states and 975 transitions. [2018-04-13 05:42:25,076 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 964 [2018-04-13 05:42:25,077 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:42:25,077 INFO L355 BasicCegarLoop]: trace histogram [118, 118, 117, 117, 117, 117, 117, 117, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:42:25,077 INFO L408 AbstractCegarLoop]: === Iteration 123 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:42:25,077 INFO L82 PathProgramCache]: Analyzing trace with hash 2061477802, now seen corresponding path program 111 times [2018-04-13 05:42:25,077 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:42:25,077 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:42:25,078 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:42:25,078 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 05:42:25,078 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:42:25,286 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:42:25,287 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:42:28,689 INFO L134 CoverageAnalysis]: Checked inductivity of 54756 backedges. 0 proven. 27378 refuted. 0 times theorem prover too weak. 27378 trivial. 0 not checked. [2018-04-13 05:42:28,690 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:42:28,690 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:42:28,690 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-04-13 05:42:29,027 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 118 check-sat command(s) [2018-04-13 05:42:29,027 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 05:42:29,177 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:42:29,503 INFO L134 CoverageAnalysis]: Checked inductivity of 54756 backedges. 0 proven. 27378 refuted. 0 times theorem prover too weak. 27378 trivial. 0 not checked. [2018-04-13 05:42:29,503 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:42:29,503 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [122, 120] total 123 [2018-04-13 05:42:29,504 INFO L442 AbstractCegarLoop]: Interpolant automaton has 123 states [2018-04-13 05:42:29,504 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 123 interpolants. [2018-04-13 05:42:29,505 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7264, Invalid=7742, Unknown=0, NotChecked=0, Total=15006 [2018-04-13 05:42:29,505 INFO L87 Difference]: Start difference. First operand 974 states and 975 transitions. Second operand 123 states. [2018-04-13 05:42:33,763 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:42:33,763 INFO L93 Difference]: Finished difference Result 986 states and 987 transitions. [2018-04-13 05:42:33,763 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 122 states. [2018-04-13 05:42:33,763 INFO L78 Accepts]: Start accepts. Automaton has 123 states. Word has length 963 [2018-04-13 05:42:33,764 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:42:33,764 INFO L225 Difference]: With dead ends: 986 [2018-04-13 05:42:33,764 INFO L226 Difference]: Without dead ends: 986 [2018-04-13 05:42:33,766 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 1320 GetRequests, 1081 SyntacticMatches, 0 SemanticMatches, 239 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7368 ImplicationChecksByTransitivity, 6.3s TimeCoverageRelationStatistics Valid=21543, Invalid=36297, Unknown=0, NotChecked=0, Total=57840 [2018-04-13 05:42:33,767 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 986 states. [2018-04-13 05:42:33,769 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 986 to 982. [2018-04-13 05:42:33,769 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 982 states. [2018-04-13 05:42:33,770 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 982 states to 982 states and 983 transitions. [2018-04-13 05:42:33,770 INFO L78 Accepts]: Start accepts. Automaton has 982 states and 983 transitions. Word has length 963 [2018-04-13 05:42:33,770 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:42:33,770 INFO L459 AbstractCegarLoop]: Abstraction has 982 states and 983 transitions. [2018-04-13 05:42:33,770 INFO L460 AbstractCegarLoop]: Interpolant automaton has 123 states. [2018-04-13 05:42:33,770 INFO L276 IsEmpty]: Start isEmpty. Operand 982 states and 983 transitions. [2018-04-13 05:42:33,774 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 972 [2018-04-13 05:42:33,774 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:42:33,774 INFO L355 BasicCegarLoop]: trace histogram [119, 119, 118, 118, 118, 118, 118, 118, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:42:33,774 INFO L408 AbstractCegarLoop]: === Iteration 124 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:42:33,774 INFO L82 PathProgramCache]: Analyzing trace with hash -990689654, now seen corresponding path program 112 times [2018-04-13 05:42:33,775 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:42:33,775 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:42:33,775 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:42:33,775 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 05:42:33,775 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:42:33,992 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:42:33,993 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:42:37,488 INFO L134 CoverageAnalysis]: Checked inductivity of 55696 backedges. 0 proven. 27848 refuted. 0 times theorem prover too weak. 27848 trivial. 0 not checked. [2018-04-13 05:42:37,489 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:42:37,489 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:42:37,489 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-04-13 05:42:38,244 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-04-13 05:42:38,244 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 05:42:38,535 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:42:38,537 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-13 05:42:38,537 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 05:42:38,540 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:42:38,540 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:12, output treesize:11 [2018-04-13 05:42:56,156 INFO L134 CoverageAnalysis]: Checked inductivity of 55696 backedges. 27848 proven. 27848 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-13 05:42:56,156 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:42:56,156 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [123, 242] total 363 [2018-04-13 05:42:56,157 INFO L442 AbstractCegarLoop]: Interpolant automaton has 363 states [2018-04-13 05:42:56,159 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 363 interpolants. [2018-04-13 05:42:56,160 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=29282, Invalid=102124, Unknown=0, NotChecked=0, Total=131406 [2018-04-13 05:42:56,161 INFO L87 Difference]: Start difference. First operand 982 states and 983 transitions. Second operand 363 states. [2018-04-13 05:43:07,379 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:43:07,379 INFO L93 Difference]: Finished difference Result 994 states and 995 transitions. [2018-04-13 05:43:07,379 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 126 states. [2018-04-13 05:43:07,379 INFO L78 Accepts]: Start accepts. Automaton has 363 states. Word has length 971 [2018-04-13 05:43:07,380 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:43:07,380 INFO L225 Difference]: With dead ends: 994 [2018-04-13 05:43:07,380 INFO L226 Difference]: Without dead ends: 994 [2018-04-13 05:43:07,385 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 1216 GetRequests, 732 SyntacticMatches, 1 SemanticMatches, 483 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 99837 ImplicationChecksByTransitivity, 24.1s TimeCoverageRelationStatistics Valid=51193, Invalid=183547, Unknown=0, NotChecked=0, Total=234740 [2018-04-13 05:43:07,385 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 994 states. [2018-04-13 05:43:07,388 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 994 to 990. [2018-04-13 05:43:07,388 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 990 states. [2018-04-13 05:43:07,388 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 990 states to 990 states and 991 transitions. [2018-04-13 05:43:07,388 INFO L78 Accepts]: Start accepts. Automaton has 990 states and 991 transitions. Word has length 971 [2018-04-13 05:43:07,389 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:43:07,389 INFO L459 AbstractCegarLoop]: Abstraction has 990 states and 991 transitions. [2018-04-13 05:43:07,389 INFO L460 AbstractCegarLoop]: Interpolant automaton has 363 states. [2018-04-13 05:43:07,389 INFO L276 IsEmpty]: Start isEmpty. Operand 990 states and 991 transitions. [2018-04-13 05:43:07,392 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 980 [2018-04-13 05:43:07,393 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:43:07,393 INFO L355 BasicCegarLoop]: trace histogram [120, 120, 119, 119, 119, 119, 119, 119, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:43:07,393 INFO L408 AbstractCegarLoop]: === Iteration 125 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:43:07,393 INFO L82 PathProgramCache]: Analyzing trace with hash 170815082, now seen corresponding path program 113 times [2018-04-13 05:43:07,393 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:43:07,393 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:43:07,393 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:43:07,393 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 05:43:07,393 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:43:07,561 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:43:07,562 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:43:11,101 INFO L134 CoverageAnalysis]: Checked inductivity of 56644 backedges. 0 proven. 28322 refuted. 0 times theorem prover too weak. 28322 trivial. 0 not checked. [2018-04-13 05:43:11,102 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:43:11,102 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:43:11,102 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-04-13 05:43:11,726 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 120 check-sat command(s) [2018-04-13 05:43:11,726 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 05:43:11,757 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:43:12,097 INFO L134 CoverageAnalysis]: Checked inductivity of 56644 backedges. 0 proven. 28322 refuted. 0 times theorem prover too weak. 28322 trivial. 0 not checked. [2018-04-13 05:43:12,098 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:43:12,098 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [124, 122] total 125 [2018-04-13 05:43:12,098 INFO L442 AbstractCegarLoop]: Interpolant automaton has 125 states [2018-04-13 05:43:12,099 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 125 interpolants. [2018-04-13 05:43:12,099 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7507, Invalid=7993, Unknown=0, NotChecked=0, Total=15500 [2018-04-13 05:43:12,099 INFO L87 Difference]: Start difference. First operand 990 states and 991 transitions. Second operand 125 states. [2018-04-13 05:43:16,356 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:43:16,356 INFO L93 Difference]: Finished difference Result 1002 states and 1003 transitions. [2018-04-13 05:43:16,356 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 124 states. [2018-04-13 05:43:16,356 INFO L78 Accepts]: Start accepts. Automaton has 125 states. Word has length 979 [2018-04-13 05:43:16,356 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:43:16,357 INFO L225 Difference]: With dead ends: 1002 [2018-04-13 05:43:16,357 INFO L226 Difference]: Without dead ends: 1002 [2018-04-13 05:43:16,358 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 1342 GetRequests, 1099 SyntacticMatches, 0 SemanticMatches, 243 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7613 ImplicationChecksByTransitivity, 6.4s TimeCoverageRelationStatistics Valid=22268, Invalid=37512, Unknown=0, NotChecked=0, Total=59780 [2018-04-13 05:43:16,358 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1002 states. [2018-04-13 05:43:16,361 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1002 to 998. [2018-04-13 05:43:16,361 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 998 states. [2018-04-13 05:43:16,361 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 998 states to 998 states and 999 transitions. [2018-04-13 05:43:16,362 INFO L78 Accepts]: Start accepts. Automaton has 998 states and 999 transitions. Word has length 979 [2018-04-13 05:43:16,362 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:43:16,362 INFO L459 AbstractCegarLoop]: Abstraction has 998 states and 999 transitions. [2018-04-13 05:43:16,362 INFO L460 AbstractCegarLoop]: Interpolant automaton has 125 states. [2018-04-13 05:43:16,362 INFO L276 IsEmpty]: Start isEmpty. Operand 998 states and 999 transitions. [2018-04-13 05:43:16,366 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 988 [2018-04-13 05:43:16,366 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:43:16,366 INFO L355 BasicCegarLoop]: trace histogram [121, 121, 120, 120, 120, 120, 120, 120, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:43:16,366 INFO L408 AbstractCegarLoop]: === Iteration 126 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:43:16,366 INFO L82 PathProgramCache]: Analyzing trace with hash 412852042, now seen corresponding path program 114 times [2018-04-13 05:43:16,366 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:43:16,366 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:43:16,367 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:43:16,367 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 05:43:16,367 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:43:16,598 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:43:16,600 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:43:20,200 INFO L134 CoverageAnalysis]: Checked inductivity of 57600 backedges. 0 proven. 28800 refuted. 0 times theorem prover too weak. 28800 trivial. 0 not checked. [2018-04-13 05:43:20,200 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:43:20,200 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:43:20,201 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-04-13 05:43:20,766 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 121 check-sat command(s) [2018-04-13 05:43:20,766 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 05:43:20,937 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:43:21,247 INFO L134 CoverageAnalysis]: Checked inductivity of 57600 backedges. 0 proven. 28800 refuted. 0 times theorem prover too weak. 28800 trivial. 0 not checked. [2018-04-13 05:43:21,247 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:43:21,247 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [125, 123] total 126 [2018-04-13 05:43:21,247 INFO L442 AbstractCegarLoop]: Interpolant automaton has 126 states [2018-04-13 05:43:21,248 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 126 interpolants. [2018-04-13 05:43:21,249 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7630, Invalid=8120, Unknown=0, NotChecked=0, Total=15750 [2018-04-13 05:43:21,249 INFO L87 Difference]: Start difference. First operand 998 states and 999 transitions. Second operand 126 states. [2018-04-13 05:43:25,555 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:43:25,555 INFO L93 Difference]: Finished difference Result 1010 states and 1011 transitions. [2018-04-13 05:43:25,555 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 125 states. [2018-04-13 05:43:25,555 INFO L78 Accepts]: Start accepts. Automaton has 126 states. Word has length 987 [2018-04-13 05:43:25,556 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:43:25,556 INFO L225 Difference]: With dead ends: 1010 [2018-04-13 05:43:25,557 INFO L226 Difference]: Without dead ends: 1010 [2018-04-13 05:43:25,558 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 1353 GetRequests, 1108 SyntacticMatches, 0 SemanticMatches, 245 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7737 ImplicationChecksByTransitivity, 6.5s TimeCoverageRelationStatistics Valid=22635, Invalid=38127, Unknown=0, NotChecked=0, Total=60762 [2018-04-13 05:43:25,559 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1010 states. [2018-04-13 05:43:25,561 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1010 to 1006. [2018-04-13 05:43:25,561 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1006 states. [2018-04-13 05:43:25,562 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1006 states to 1006 states and 1007 transitions. [2018-04-13 05:43:25,562 INFO L78 Accepts]: Start accepts. Automaton has 1006 states and 1007 transitions. Word has length 987 [2018-04-13 05:43:25,562 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:43:25,562 INFO L459 AbstractCegarLoop]: Abstraction has 1006 states and 1007 transitions. [2018-04-13 05:43:25,562 INFO L460 AbstractCegarLoop]: Interpolant automaton has 126 states. [2018-04-13 05:43:25,563 INFO L276 IsEmpty]: Start isEmpty. Operand 1006 states and 1007 transitions. [2018-04-13 05:43:25,566 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 996 [2018-04-13 05:43:25,566 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:43:25,566 INFO L355 BasicCegarLoop]: trace histogram [122, 122, 121, 121, 121, 121, 121, 121, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:43:25,567 INFO L408 AbstractCegarLoop]: === Iteration 127 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:43:25,567 INFO L82 PathProgramCache]: Analyzing trace with hash -838510294, now seen corresponding path program 115 times [2018-04-13 05:43:25,567 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:43:25,567 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:43:25,567 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:43:25,568 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 05:43:25,568 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:43:25,789 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:43:25,790 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:43:29,320 INFO L134 CoverageAnalysis]: Checked inductivity of 58564 backedges. 0 proven. 29282 refuted. 0 times theorem prover too weak. 29282 trivial. 0 not checked. [2018-04-13 05:43:29,320 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:43:29,320 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:43:29,320 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 05:43:29,422 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:43:29,444 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:43:33,578 INFO L134 CoverageAnalysis]: Checked inductivity of 58564 backedges. 0 proven. 29282 refuted. 0 times theorem prover too weak. 29282 trivial. 0 not checked. [2018-04-13 05:43:33,578 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:43:33,579 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [126, 125] total 248 [2018-04-13 05:43:33,579 INFO L442 AbstractCegarLoop]: Interpolant automaton has 248 states [2018-04-13 05:43:33,580 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 248 interpolants. [2018-04-13 05:43:33,581 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=22879, Invalid=38377, Unknown=0, NotChecked=0, Total=61256 [2018-04-13 05:43:33,582 INFO L87 Difference]: Start difference. First operand 1006 states and 1007 transitions. Second operand 248 states. [2018-04-13 05:43:38,350 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:43:38,350 INFO L93 Difference]: Finished difference Result 1018 states and 1019 transitions. [2018-04-13 05:43:38,351 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 126 states. [2018-04-13 05:43:38,351 INFO L78 Accepts]: Start accepts. Automaton has 248 states. Word has length 995 [2018-04-13 05:43:38,351 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:43:38,352 INFO L225 Difference]: With dead ends: 1018 [2018-04-13 05:43:38,352 INFO L226 Difference]: Without dead ends: 1018 [2018-04-13 05:43:38,353 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 1121 GetRequests, 873 SyntacticMatches, 1 SemanticMatches, 247 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 29643 ImplicationChecksByTransitivity, 6.5s TimeCoverageRelationStatistics Valid=23126, Invalid=38626, Unknown=0, NotChecked=0, Total=61752 [2018-04-13 05:43:38,354 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1018 states. [2018-04-13 05:43:38,356 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1018 to 1014. [2018-04-13 05:43:38,357 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1014 states. [2018-04-13 05:43:38,357 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1014 states to 1014 states and 1015 transitions. [2018-04-13 05:43:38,357 INFO L78 Accepts]: Start accepts. Automaton has 1014 states and 1015 transitions. Word has length 995 [2018-04-13 05:43:38,357 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:43:38,357 INFO L459 AbstractCegarLoop]: Abstraction has 1014 states and 1015 transitions. [2018-04-13 05:43:38,357 INFO L460 AbstractCegarLoop]: Interpolant automaton has 248 states. [2018-04-13 05:43:38,358 INFO L276 IsEmpty]: Start isEmpty. Operand 1014 states and 1015 transitions. [2018-04-13 05:43:38,362 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 1004 [2018-04-13 05:43:38,362 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:43:38,362 INFO L355 BasicCegarLoop]: trace histogram [123, 123, 122, 122, 122, 122, 122, 122, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:43:38,362 INFO L408 AbstractCegarLoop]: === Iteration 128 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:43:38,362 INFO L82 PathProgramCache]: Analyzing trace with hash 938875914, now seen corresponding path program 116 times [2018-04-13 05:43:38,362 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:43:38,362 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:43:38,363 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:43:38,363 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 05:43:38,363 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:43:38,534 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:43:38,557 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:43:42,070 INFO L134 CoverageAnalysis]: Checked inductivity of 59536 backedges. 0 proven. 29768 refuted. 0 times theorem prover too weak. 29768 trivial. 0 not checked. [2018-04-13 05:43:42,071 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:43:42,071 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:43:42,071 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-04-13 05:43:42,331 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-04-13 05:43:42,331 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 05:43:42,368 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:43:42,683 INFO L134 CoverageAnalysis]: Checked inductivity of 59536 backedges. 0 proven. 29768 refuted. 0 times theorem prover too weak. 29768 trivial. 0 not checked. [2018-04-13 05:43:42,683 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:43:42,684 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [127, 125] total 128 [2018-04-13 05:43:42,684 INFO L442 AbstractCegarLoop]: Interpolant automaton has 128 states [2018-04-13 05:43:42,685 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 128 interpolants. [2018-04-13 05:43:42,685 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7879, Invalid=8377, Unknown=0, NotChecked=0, Total=16256 [2018-04-13 05:43:42,685 INFO L87 Difference]: Start difference. First operand 1014 states and 1015 transitions. Second operand 128 states. [2018-04-13 05:43:47,019 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:43:47,020 INFO L93 Difference]: Finished difference Result 1026 states and 1027 transitions. [2018-04-13 05:43:47,020 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 127 states. [2018-04-13 05:43:47,020 INFO L78 Accepts]: Start accepts. Automaton has 128 states. Word has length 1003 [2018-04-13 05:43:47,020 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:43:47,021 INFO L225 Difference]: With dead ends: 1026 [2018-04-13 05:43:47,021 INFO L226 Difference]: Without dead ends: 1026 [2018-04-13 05:43:47,023 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 1375 GetRequests, 1126 SyntacticMatches, 0 SemanticMatches, 249 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7988 ImplicationChecksByTransitivity, 6.5s TimeCoverageRelationStatistics Valid=23378, Invalid=39372, Unknown=0, NotChecked=0, Total=62750 [2018-04-13 05:43:47,023 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1026 states. [2018-04-13 05:43:47,026 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1026 to 1022. [2018-04-13 05:43:47,026 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1022 states. [2018-04-13 05:43:47,027 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1022 states to 1022 states and 1023 transitions. [2018-04-13 05:43:47,027 INFO L78 Accepts]: Start accepts. Automaton has 1022 states and 1023 transitions. Word has length 1003 [2018-04-13 05:43:47,027 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:43:47,027 INFO L459 AbstractCegarLoop]: Abstraction has 1022 states and 1023 transitions. [2018-04-13 05:43:47,027 INFO L460 AbstractCegarLoop]: Interpolant automaton has 128 states. [2018-04-13 05:43:47,027 INFO L276 IsEmpty]: Start isEmpty. Operand 1022 states and 1023 transitions. [2018-04-13 05:43:47,031 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 1012 [2018-04-13 05:43:47,031 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:43:47,031 INFO L355 BasicCegarLoop]: trace histogram [124, 124, 123, 123, 123, 123, 123, 123, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:43:47,031 INFO L408 AbstractCegarLoop]: === Iteration 129 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:43:47,031 INFO L82 PathProgramCache]: Analyzing trace with hash -1279760406, now seen corresponding path program 117 times [2018-04-13 05:43:47,031 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:43:47,031 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:43:47,032 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:43:47,032 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 05:43:47,032 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:43:47,203 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:43:47,205 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:43:50,858 INFO L134 CoverageAnalysis]: Checked inductivity of 60516 backedges. 0 proven. 30258 refuted. 0 times theorem prover too weak. 30258 trivial. 0 not checked. [2018-04-13 05:43:50,858 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:43:50,858 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:43:50,859 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-04-13 05:43:51,239 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 124 check-sat command(s) [2018-04-13 05:43:51,239 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 05:43:51,493 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:43:55,766 INFO L134 CoverageAnalysis]: Checked inductivity of 60516 backedges. 0 proven. 30258 refuted. 0 times theorem prover too weak. 30258 trivial. 0 not checked. [2018-04-13 05:43:55,766 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:43:55,766 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [128, 127] total 252 [2018-04-13 05:43:55,767 INFO L442 AbstractCegarLoop]: Interpolant automaton has 252 states [2018-04-13 05:43:55,769 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 252 interpolants. [2018-04-13 05:43:55,771 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=23626, Invalid=39626, Unknown=0, NotChecked=0, Total=63252 [2018-04-13 05:43:55,771 INFO L87 Difference]: Start difference. First operand 1022 states and 1023 transitions. Second operand 252 states. [2018-04-13 05:44:00,760 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:44:00,760 INFO L93 Difference]: Finished difference Result 1034 states and 1035 transitions. [2018-04-13 05:44:00,761 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 128 states. [2018-04-13 05:44:00,761 INFO L78 Accepts]: Start accepts. Automaton has 252 states. Word has length 1011 [2018-04-13 05:44:00,761 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:44:00,762 INFO L225 Difference]: With dead ends: 1034 [2018-04-13 05:44:00,762 INFO L226 Difference]: Without dead ends: 1034 [2018-04-13 05:44:00,763 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 1139 GetRequests, 887 SyntacticMatches, 1 SemanticMatches, 251 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 30625 ImplicationChecksByTransitivity, 6.7s TimeCoverageRelationStatistics Valid=23877, Invalid=39879, Unknown=0, NotChecked=0, Total=63756 [2018-04-13 05:44:00,764 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1034 states. [2018-04-13 05:44:00,767 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1034 to 1030. [2018-04-13 05:44:00,767 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1030 states. [2018-04-13 05:44:00,767 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1030 states to 1030 states and 1031 transitions. [2018-04-13 05:44:00,768 INFO L78 Accepts]: Start accepts. Automaton has 1030 states and 1031 transitions. Word has length 1011 [2018-04-13 05:44:00,768 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:44:00,768 INFO L459 AbstractCegarLoop]: Abstraction has 1030 states and 1031 transitions. [2018-04-13 05:44:00,768 INFO L460 AbstractCegarLoop]: Interpolant automaton has 252 states. [2018-04-13 05:44:00,768 INFO L276 IsEmpty]: Start isEmpty. Operand 1030 states and 1031 transitions. [2018-04-13 05:44:00,772 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 1020 [2018-04-13 05:44:00,772 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:44:00,772 INFO L355 BasicCegarLoop]: trace histogram [125, 125, 124, 124, 124, 124, 124, 124, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:44:00,773 INFO L408 AbstractCegarLoop]: === Iteration 130 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:44:00,773 INFO L82 PathProgramCache]: Analyzing trace with hash 240565450, now seen corresponding path program 118 times [2018-04-13 05:44:00,773 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:44:00,773 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:44:00,773 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:44:00,773 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 05:44:00,774 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:44:01,036 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:44:01,037 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:44:05,002 INFO L134 CoverageAnalysis]: Checked inductivity of 61504 backedges. 0 proven. 30752 refuted. 0 times theorem prover too weak. 30752 trivial. 0 not checked. [2018-04-13 05:44:05,002 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:44:05,002 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:44:05,003 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-04-13 05:44:07,285 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-04-13 05:44:07,285 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 05:44:07,600 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:44:07,602 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-13 05:44:07,602 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 05:44:07,604 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:44:07,604 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:12, output treesize:11 [2018-04-13 05:44:26,188 INFO L134 CoverageAnalysis]: Checked inductivity of 61504 backedges. 30752 proven. 30752 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-13 05:44:26,188 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:44:26,189 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [129, 254] total 381 [2018-04-13 05:44:26,189 INFO L442 AbstractCegarLoop]: Interpolant automaton has 381 states [2018-04-13 05:44:26,191 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 381 interpolants. [2018-04-13 05:44:26,193 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=32258, Invalid=112522, Unknown=0, NotChecked=0, Total=144780 [2018-04-13 05:44:26,193 INFO L87 Difference]: Start difference. First operand 1030 states and 1031 transitions. Second operand 381 states. [2018-04-13 05:44:38,330 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:44:38,330 INFO L93 Difference]: Finished difference Result 1042 states and 1043 transitions. [2018-04-13 05:44:38,330 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 132 states. [2018-04-13 05:44:38,330 INFO L78 Accepts]: Start accepts. Automaton has 381 states. Word has length 1019 [2018-04-13 05:44:38,330 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:44:38,331 INFO L225 Difference]: With dead ends: 1042 [2018-04-13 05:44:38,331 INFO L226 Difference]: Without dead ends: 1042 [2018-04-13 05:44:38,336 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 1276 GetRequests, 768 SyntacticMatches, 1 SemanticMatches, 507 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 110121 ImplicationChecksByTransitivity, 25.6s TimeCoverageRelationStatistics Valid=56398, Invalid=202174, Unknown=0, NotChecked=0, Total=258572 [2018-04-13 05:44:38,336 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1042 states. [2018-04-13 05:44:38,341 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1042 to 1038. [2018-04-13 05:44:38,341 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1038 states. [2018-04-13 05:44:38,342 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1038 states to 1038 states and 1039 transitions. [2018-04-13 05:44:38,342 INFO L78 Accepts]: Start accepts. Automaton has 1038 states and 1039 transitions. Word has length 1019 [2018-04-13 05:44:38,342 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:44:38,342 INFO L459 AbstractCegarLoop]: Abstraction has 1038 states and 1039 transitions. [2018-04-13 05:44:38,342 INFO L460 AbstractCegarLoop]: Interpolant automaton has 381 states. [2018-04-13 05:44:38,343 INFO L276 IsEmpty]: Start isEmpty. Operand 1038 states and 1039 transitions. [2018-04-13 05:44:38,347 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 1028 [2018-04-13 05:44:38,347 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:44:38,347 INFO L355 BasicCegarLoop]: trace histogram [126, 126, 125, 125, 125, 125, 125, 125, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:44:38,348 INFO L408 AbstractCegarLoop]: === Iteration 131 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:44:38,348 INFO L82 PathProgramCache]: Analyzing trace with hash -1533306198, now seen corresponding path program 119 times [2018-04-13 05:44:38,348 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:44:38,348 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:44:38,348 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:44:38,348 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 05:44:38,348 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:44:38,569 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:44:38,570 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:44:42,381 INFO L134 CoverageAnalysis]: Checked inductivity of 62500 backedges. 0 proven. 31250 refuted. 0 times theorem prover too weak. 31250 trivial. 0 not checked. [2018-04-13 05:44:42,381 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:44:42,381 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:44:42,382 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-04-13 05:44:42,976 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 126 check-sat command(s) [2018-04-13 05:44:42,976 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 05:44:43,010 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:44:43,390 INFO L134 CoverageAnalysis]: Checked inductivity of 62500 backedges. 0 proven. 31250 refuted. 0 times theorem prover too weak. 31250 trivial. 0 not checked. [2018-04-13 05:44:43,390 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:44:43,390 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [130, 128] total 131 [2018-04-13 05:44:43,391 INFO L442 AbstractCegarLoop]: Interpolant automaton has 131 states [2018-04-13 05:44:43,391 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 131 interpolants. [2018-04-13 05:44:43,391 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=8260, Invalid=8770, Unknown=0, NotChecked=0, Total=17030 [2018-04-13 05:44:43,392 INFO L87 Difference]: Start difference. First operand 1038 states and 1039 transitions. Second operand 131 states. [2018-04-13 05:44:47,778 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:44:47,778 INFO L93 Difference]: Finished difference Result 1050 states and 1051 transitions. [2018-04-13 05:44:47,778 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 130 states. [2018-04-13 05:44:47,778 INFO L78 Accepts]: Start accepts. Automaton has 131 states. Word has length 1027 [2018-04-13 05:44:47,778 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:44:47,779 INFO L225 Difference]: With dead ends: 1050 [2018-04-13 05:44:47,779 INFO L226 Difference]: Without dead ends: 1050 [2018-04-13 05:44:47,781 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 1408 GetRequests, 1153 SyntacticMatches, 0 SemanticMatches, 255 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8372 ImplicationChecksByTransitivity, 6.8s TimeCoverageRelationStatistics Valid=24515, Invalid=41277, Unknown=0, NotChecked=0, Total=65792 [2018-04-13 05:44:47,781 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1050 states. [2018-04-13 05:44:47,783 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1050 to 1046. [2018-04-13 05:44:47,784 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1046 states. [2018-04-13 05:44:47,784 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1046 states to 1046 states and 1047 transitions. [2018-04-13 05:44:47,784 INFO L78 Accepts]: Start accepts. Automaton has 1046 states and 1047 transitions. Word has length 1027 [2018-04-13 05:44:47,784 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:44:47,784 INFO L459 AbstractCegarLoop]: Abstraction has 1046 states and 1047 transitions. [2018-04-13 05:44:47,784 INFO L460 AbstractCegarLoop]: Interpolant automaton has 131 states. [2018-04-13 05:44:47,784 INFO L276 IsEmpty]: Start isEmpty. Operand 1046 states and 1047 transitions. [2018-04-13 05:44:47,789 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 1036 [2018-04-13 05:44:47,789 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:44:47,789 INFO L355 BasicCegarLoop]: trace histogram [127, 127, 126, 126, 126, 126, 126, 126, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:44:47,789 INFO L408 AbstractCegarLoop]: === Iteration 132 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:44:47,789 INFO L82 PathProgramCache]: Analyzing trace with hash -2096004726, now seen corresponding path program 120 times [2018-04-13 05:44:47,789 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:44:47,789 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:44:47,790 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:44:47,790 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 05:44:47,790 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:44:47,965 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:44:47,966 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:44:51,783 INFO L134 CoverageAnalysis]: Checked inductivity of 63504 backedges. 0 proven. 31752 refuted. 0 times theorem prover too weak. 31752 trivial. 0 not checked. [2018-04-13 05:44:51,784 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:44:51,784 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:44:51,784 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-04-13 05:44:52,244 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 127 check-sat command(s) [2018-04-13 05:44:52,244 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 05:44:52,487 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:44:57,096 INFO L134 CoverageAnalysis]: Checked inductivity of 63504 backedges. 0 proven. 31752 refuted. 0 times theorem prover too weak. 31752 trivial. 0 not checked. [2018-04-13 05:44:57,096 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:44:57,097 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [131, 130] total 258 [2018-04-13 05:44:57,097 INFO L442 AbstractCegarLoop]: Interpolant automaton has 258 states [2018-04-13 05:44:57,099 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 258 interpolants. [2018-04-13 05:44:57,100 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=24769, Invalid=41537, Unknown=0, NotChecked=0, Total=66306 [2018-04-13 05:44:57,100 INFO L87 Difference]: Start difference. First operand 1046 states and 1047 transitions. Second operand 258 states. [2018-04-13 05:45:02,537 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:45:02,537 INFO L93 Difference]: Finished difference Result 1058 states and 1059 transitions. [2018-04-13 05:45:02,538 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 131 states. [2018-04-13 05:45:02,538 INFO L78 Accepts]: Start accepts. Automaton has 258 states. Word has length 1035 [2018-04-13 05:45:02,538 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:45:02,539 INFO L225 Difference]: With dead ends: 1058 [2018-04-13 05:45:02,539 INFO L226 Difference]: Without dead ends: 1058 [2018-04-13 05:45:02,540 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 1166 GetRequests, 908 SyntacticMatches, 1 SemanticMatches, 257 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 32128 ImplicationChecksByTransitivity, 7.0s TimeCoverageRelationStatistics Valid=25026, Invalid=41796, Unknown=0, NotChecked=0, Total=66822 [2018-04-13 05:45:02,541 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1058 states. [2018-04-13 05:45:02,544 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1058 to 1054. [2018-04-13 05:45:02,544 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1054 states. [2018-04-13 05:45:02,544 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1054 states to 1054 states and 1055 transitions. [2018-04-13 05:45:02,544 INFO L78 Accepts]: Start accepts. Automaton has 1054 states and 1055 transitions. Word has length 1035 [2018-04-13 05:45:02,545 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:45:02,545 INFO L459 AbstractCegarLoop]: Abstraction has 1054 states and 1055 transitions. [2018-04-13 05:45:02,545 INFO L460 AbstractCegarLoop]: Interpolant automaton has 258 states. [2018-04-13 05:45:02,545 INFO L276 IsEmpty]: Start isEmpty. Operand 1054 states and 1055 transitions. [2018-04-13 05:45:02,549 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 1044 [2018-04-13 05:45:02,549 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:45:02,549 INFO L355 BasicCegarLoop]: trace histogram [128, 128, 127, 127, 127, 127, 127, 127, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:45:02,549 INFO L408 AbstractCegarLoop]: === Iteration 133 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:45:02,550 INFO L82 PathProgramCache]: Analyzing trace with hash -2046627478, now seen corresponding path program 121 times [2018-04-13 05:45:02,550 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:45:02,550 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:45:02,550 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:45:02,550 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 05:45:02,550 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:45:02,819 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:45:02,820 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:45:06,789 INFO L134 CoverageAnalysis]: Checked inductivity of 64516 backedges. 0 proven. 32258 refuted. 0 times theorem prover too weak. 32258 trivial. 0 not checked. [2018-04-13 05:45:06,789 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:45:06,789 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:45:06,790 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 05:45:06,968 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:45:06,988 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:45:11,654 INFO L134 CoverageAnalysis]: Checked inductivity of 64516 backedges. 0 proven. 32258 refuted. 0 times theorem prover too weak. 32258 trivial. 0 not checked. [2018-04-13 05:45:11,654 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:45:11,654 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [132, 131] total 260 [2018-04-13 05:45:11,655 INFO L442 AbstractCegarLoop]: Interpolant automaton has 260 states [2018-04-13 05:45:11,656 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 260 interpolants. [2018-04-13 05:45:11,657 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=25156, Invalid=42184, Unknown=0, NotChecked=0, Total=67340 [2018-04-13 05:45:11,657 INFO L87 Difference]: Start difference. First operand 1054 states and 1055 transitions. Second operand 260 states. [2018-04-13 05:45:17,275 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:45:17,275 INFO L93 Difference]: Finished difference Result 1066 states and 1067 transitions. [2018-04-13 05:45:17,275 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 132 states. [2018-04-13 05:45:17,275 INFO L78 Accepts]: Start accepts. Automaton has 260 states. Word has length 1043 [2018-04-13 05:45:17,275 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:45:17,277 INFO L225 Difference]: With dead ends: 1066 [2018-04-13 05:45:17,277 INFO L226 Difference]: Without dead ends: 1066 [2018-04-13 05:45:17,278 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 1175 GetRequests, 915 SyntacticMatches, 1 SemanticMatches, 259 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 32637 ImplicationChecksByTransitivity, 7.3s TimeCoverageRelationStatistics Valid=25415, Invalid=42445, Unknown=0, NotChecked=0, Total=67860 [2018-04-13 05:45:17,278 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1066 states. [2018-04-13 05:45:17,281 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1066 to 1062. [2018-04-13 05:45:17,281 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1062 states. [2018-04-13 05:45:17,282 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1062 states to 1062 states and 1063 transitions. [2018-04-13 05:45:17,282 INFO L78 Accepts]: Start accepts. Automaton has 1062 states and 1063 transitions. Word has length 1043 [2018-04-13 05:45:17,282 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:45:17,282 INFO L459 AbstractCegarLoop]: Abstraction has 1062 states and 1063 transitions. [2018-04-13 05:45:17,282 INFO L460 AbstractCegarLoop]: Interpolant automaton has 260 states. [2018-04-13 05:45:17,282 INFO L276 IsEmpty]: Start isEmpty. Operand 1062 states and 1063 transitions. [2018-04-13 05:45:17,286 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 1052 [2018-04-13 05:45:17,287 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:45:17,287 INFO L355 BasicCegarLoop]: trace histogram [129, 129, 128, 128, 128, 128, 128, 128, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:45:17,287 INFO L408 AbstractCegarLoop]: === Iteration 134 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:45:17,287 INFO L82 PathProgramCache]: Analyzing trace with hash 2038065738, now seen corresponding path program 122 times [2018-04-13 05:45:17,287 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:45:17,287 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:45:17,287 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:45:17,287 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 05:45:17,287 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:45:17,517 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:45:17,518 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:45:21,559 INFO L134 CoverageAnalysis]: Checked inductivity of 65536 backedges. 0 proven. 32768 refuted. 0 times theorem prover too weak. 32768 trivial. 0 not checked. [2018-04-13 05:45:21,559 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:45:21,559 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:45:21,559 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-04-13 05:45:21,804 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-04-13 05:45:21,804 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 05:45:21,837 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:45:22,283 INFO L134 CoverageAnalysis]: Checked inductivity of 65536 backedges. 0 proven. 32768 refuted. 0 times theorem prover too weak. 32768 trivial. 0 not checked. [2018-04-13 05:45:22,283 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:45:22,284 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [133, 131] total 134 [2018-04-13 05:45:22,284 INFO L442 AbstractCegarLoop]: Interpolant automaton has 134 states [2018-04-13 05:45:22,285 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 134 interpolants. [2018-04-13 05:45:22,285 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=8650, Invalid=9172, Unknown=0, NotChecked=0, Total=17822 [2018-04-13 05:45:22,285 INFO L87 Difference]: Start difference. First operand 1062 states and 1063 transitions. Second operand 134 states. [2018-04-13 05:45:27,073 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:45:27,073 INFO L93 Difference]: Finished difference Result 1074 states and 1075 transitions. [2018-04-13 05:45:27,075 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 133 states. [2018-04-13 05:45:27,075 INFO L78 Accepts]: Start accepts. Automaton has 134 states. Word has length 1051 [2018-04-13 05:45:27,075 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:45:27,076 INFO L225 Difference]: With dead ends: 1074 [2018-04-13 05:45:27,076 INFO L226 Difference]: Without dead ends: 1074 [2018-04-13 05:45:27,077 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 1441 GetRequests, 1180 SyntacticMatches, 0 SemanticMatches, 261 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8765 ImplicationChecksByTransitivity, 7.3s TimeCoverageRelationStatistics Valid=25679, Invalid=43227, Unknown=0, NotChecked=0, Total=68906 [2018-04-13 05:45:27,078 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1074 states. [2018-04-13 05:45:27,081 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1074 to 1070. [2018-04-13 05:45:27,081 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1070 states. [2018-04-13 05:45:27,081 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1070 states to 1070 states and 1071 transitions. [2018-04-13 05:45:27,082 INFO L78 Accepts]: Start accepts. Automaton has 1070 states and 1071 transitions. Word has length 1051 [2018-04-13 05:45:27,082 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:45:27,082 INFO L459 AbstractCegarLoop]: Abstraction has 1070 states and 1071 transitions. [2018-04-13 05:45:27,082 INFO L460 AbstractCegarLoop]: Interpolant automaton has 134 states. [2018-04-13 05:45:27,082 INFO L276 IsEmpty]: Start isEmpty. Operand 1070 states and 1071 transitions. [2018-04-13 05:45:27,086 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 1060 [2018-04-13 05:45:27,086 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:45:27,087 INFO L355 BasicCegarLoop]: trace histogram [130, 130, 129, 129, 129, 129, 129, 129, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:45:27,087 INFO L408 AbstractCegarLoop]: === Iteration 135 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:45:27,087 INFO L82 PathProgramCache]: Analyzing trace with hash 960654378, now seen corresponding path program 123 times [2018-04-13 05:45:27,087 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:45:27,087 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:45:27,087 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:45:27,087 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 05:45:27,087 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:45:27,337 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:45:27,338 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:45:31,381 INFO L134 CoverageAnalysis]: Checked inductivity of 66564 backedges. 0 proven. 33282 refuted. 0 times theorem prover too weak. 33282 trivial. 0 not checked. [2018-04-13 05:45:31,381 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:45:31,381 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:45:31,382 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-04-13 05:45:31,770 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 130 check-sat command(s) [2018-04-13 05:45:31,771 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 05:45:31,994 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:45:32,338 INFO L134 CoverageAnalysis]: Checked inductivity of 66564 backedges. 0 proven. 33282 refuted. 0 times theorem prover too weak. 33282 trivial. 0 not checked. [2018-04-13 05:45:32,338 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:45:32,338 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [134, 132] total 135 [2018-04-13 05:45:32,339 INFO L442 AbstractCegarLoop]: Interpolant automaton has 135 states [2018-04-13 05:45:32,339 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 135 interpolants. [2018-04-13 05:45:32,340 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=8782, Invalid=9308, Unknown=0, NotChecked=0, Total=18090 [2018-04-13 05:45:32,340 INFO L87 Difference]: Start difference. First operand 1070 states and 1071 transitions. Second operand 135 states. [2018-04-13 05:45:37,092 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:45:37,092 INFO L93 Difference]: Finished difference Result 1082 states and 1083 transitions. [2018-04-13 05:45:37,092 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 134 states. [2018-04-13 05:45:37,092 INFO L78 Accepts]: Start accepts. Automaton has 135 states. Word has length 1059 [2018-04-13 05:45:37,093 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:45:37,093 INFO L225 Difference]: With dead ends: 1082 [2018-04-13 05:45:37,093 INFO L226 Difference]: Without dead ends: 1082 [2018-04-13 05:45:37,096 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 1452 GetRequests, 1189 SyntacticMatches, 0 SemanticMatches, 263 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8898 ImplicationChecksByTransitivity, 7.3s TimeCoverageRelationStatistics Valid=26073, Invalid=43887, Unknown=0, NotChecked=0, Total=69960 [2018-04-13 05:45:37,096 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1082 states. [2018-04-13 05:45:37,099 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1082 to 1078. [2018-04-13 05:45:37,099 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1078 states. [2018-04-13 05:45:37,099 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1078 states to 1078 states and 1079 transitions. [2018-04-13 05:45:37,099 INFO L78 Accepts]: Start accepts. Automaton has 1078 states and 1079 transitions. Word has length 1059 [2018-04-13 05:45:37,099 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:45:37,100 INFO L459 AbstractCegarLoop]: Abstraction has 1078 states and 1079 transitions. [2018-04-13 05:45:37,100 INFO L460 AbstractCegarLoop]: Interpolant automaton has 135 states. [2018-04-13 05:45:37,100 INFO L276 IsEmpty]: Start isEmpty. Operand 1078 states and 1079 transitions. [2018-04-13 05:45:37,104 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 1068 [2018-04-13 05:45:37,104 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:45:37,104 INFO L355 BasicCegarLoop]: trace histogram [131, 131, 130, 130, 130, 130, 130, 130, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:45:37,104 INFO L408 AbstractCegarLoop]: === Iteration 136 === [mainErr1RequiresViolation, mainErr6AssertViolationMEMORY_FREE, mainErr4AssertViolationMEMORY_FREE, mainErr10AssertViolationMEMORY_FREE, mainErr11AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr12EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7AssertViolationMEMORY_FREE, mainErr9AssertViolationMEMORY_FREE, mainErr2RequiresViolation, mainErr8AssertViolationMEMORY_FREE, mainErr5AssertViolationMEMORY_FREE, __U_MULTI_f_________true_valid_memsafety_i__fooErr0RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr3RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr1RequiresViolation, __U_MULTI_f_________true_valid_memsafety_i__fooErr2RequiresViolation]=== [2018-04-13 05:45:37,104 INFO L82 PathProgramCache]: Analyzing trace with hash -790268150, now seen corresponding path program 124 times [2018-04-13 05:45:37,105 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:45:37,105 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:45:37,105 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:45:37,105 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 05:45:37,105 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:45:37,304 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:45:37,305 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:45:41,335 INFO L134 CoverageAnalysis]: Checked inductivity of 67600 backedges. 0 proven. 33800 refuted. 0 times theorem prover too weak. 33800 trivial. 0 not checked. [2018-04-13 05:45:41,335 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:45:41,335 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:45:41,335 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-04-13 05:45:42,425 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-04-13 05:45:42,426 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 05:45:42,671 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:45:42,673 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-13 05:45:42,673 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 05:45:42,675 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:45:42,675 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:12, output treesize:11 Received shutdown request... [2018-04-13 05:45:58,758 INFO L175 TraceCheckSpWp]: Timeout while computing interpolants [2018-04-13 05:45:58,758 WARN L519 AbstractCegarLoop]: Verification canceled [2018-04-13 05:45:58,761 WARN L197 ceAbstractionStarter]: Timeout [2018-04-13 05:45:58,761 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 13.04 05:45:58 BoogieIcfgContainer [2018-04-13 05:45:58,761 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-04-13 05:45:58,761 INFO L168 Benchmark]: Toolchain (without parser) took 746975.68 ms. Allocated memory was 399.0 MB in the beginning and 2.8 GB in the end (delta: 2.4 GB). Free memory was 335.5 MB in the beginning and 1.9 GB in the end (delta: -1.5 GB). Peak memory consumption was 876.4 MB. Max. memory is 5.3 GB. [2018-04-13 05:45:58,762 INFO L168 Benchmark]: CDTParser took 0.10 ms. Allocated memory is still 399.0 MB. Free memory is still 362.2 MB. There was no memory consumed. Max. memory is 5.3 GB. [2018-04-13 05:45:58,762 INFO L168 Benchmark]: CACSL2BoogieTranslator took 222.45 ms. Allocated memory is still 399.0 MB. Free memory was 335.5 MB in the beginning and 311.6 MB in the end (delta: 23.9 MB). Peak memory consumption was 23.9 MB. Max. memory is 5.3 GB. [2018-04-13 05:45:58,762 INFO L168 Benchmark]: Boogie Preprocessor took 40.38 ms. Allocated memory is still 399.0 MB. Free memory was 311.6 MB in the beginning and 308.9 MB in the end (delta: 2.6 MB). Peak memory consumption was 2.6 MB. Max. memory is 5.3 GB. [2018-04-13 05:45:58,763 INFO L168 Benchmark]: RCFGBuilder took 363.98 ms. Allocated memory was 399.0 MB in the beginning and 606.1 MB in the end (delta: 207.1 MB). Free memory was 308.9 MB in the beginning and 542.0 MB in the end (delta: -233.1 MB). Peak memory consumption was 23.9 MB. Max. memory is 5.3 GB. [2018-04-13 05:45:58,763 INFO L168 Benchmark]: TraceAbstraction took 746346.42 ms. Allocated memory was 606.1 MB in the beginning and 2.8 GB in the end (delta: 2.2 GB). Free memory was 542.0 MB in the beginning and 1.9 GB in the end (delta: -1.3 GB). Peak memory consumption was 875.8 MB. Max. memory is 5.3 GB. [2018-04-13 05:45:58,764 INFO L344 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.10 ms. Allocated memory is still 399.0 MB. Free memory is still 362.2 MB. There was no memory consumed. Max. memory is 5.3 GB. * CACSL2BoogieTranslator took 222.45 ms. Allocated memory is still 399.0 MB. Free memory was 335.5 MB in the beginning and 311.6 MB in the end (delta: 23.9 MB). Peak memory consumption was 23.9 MB. Max. memory is 5.3 GB. * Boogie Preprocessor took 40.38 ms. Allocated memory is still 399.0 MB. Free memory was 311.6 MB in the beginning and 308.9 MB in the end (delta: 2.6 MB). Peak memory consumption was 2.6 MB. Max. memory is 5.3 GB. * RCFGBuilder took 363.98 ms. Allocated memory was 399.0 MB in the beginning and 606.1 MB in the end (delta: 207.1 MB). Free memory was 308.9 MB in the beginning and 542.0 MB in the end (delta: -233.1 MB). Peak memory consumption was 23.9 MB. Max. memory is 5.3 GB. * TraceAbstraction took 746346.42 ms. Allocated memory was 606.1 MB in the beginning and 2.8 GB in the end (delta: 2.2 GB). Free memory was 542.0 MB in the beginning and 1.9 GB in the end (delta: -1.3 GB). Peak memory consumption was 875.8 MB. Max. memory is 5.3 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - TimeoutResultAtElement [Line: 634]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 634). Cancelled while BasicCegarLoop was analyzing trace of length 1068 with TraceHistMax 131, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantifier-free) to 383 known predicates. - TimeoutResultAtElement [Line: 637]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 637). Cancelled while BasicCegarLoop was analyzing trace of length 1068 with TraceHistMax 131, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantifier-free) to 383 known predicates. - TimeoutResultAtElement [Line: 637]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 637). Cancelled while BasicCegarLoop was analyzing trace of length 1068 with TraceHistMax 131, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantifier-free) to 383 known predicates. - TimeoutResultAtElement [Line: 639]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 639). Cancelled while BasicCegarLoop was analyzing trace of length 1068 with TraceHistMax 131, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantifier-free) to 383 known predicates. - TimeoutResultAtElement [Line: 639]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 639). Cancelled while BasicCegarLoop was analyzing trace of length 1068 with TraceHistMax 131, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantifier-free) to 383 known predicates. - TimeoutResultAtElement [Line: 634]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 634). Cancelled while BasicCegarLoop was analyzing trace of length 1068 with TraceHistMax 131, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantifier-free) to 383 known predicates. - TimeoutResultAtElement [Line: 629]: Timeout (TraceAbstraction) Unable to prove that all allocated memory was freed (line 629). Cancelled while BasicCegarLoop was analyzing trace of length 1068 with TraceHistMax 131, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantifier-free) to 383 known predicates. - TimeoutResultAtElement [Line: 636]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 636). Cancelled while BasicCegarLoop was analyzing trace of length 1068 with TraceHistMax 131, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantifier-free) to 383 known predicates. - TimeoutResultAtElement [Line: 637]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 637). Cancelled while BasicCegarLoop was analyzing trace of length 1068 with TraceHistMax 131, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantifier-free) to 383 known predicates. - TimeoutResultAtElement [Line: 639]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 639). Cancelled while BasicCegarLoop was analyzing trace of length 1068 with TraceHistMax 131, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantifier-free) to 383 known predicates. - TimeoutResultAtElement [Line: 636]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 636). Cancelled while BasicCegarLoop was analyzing trace of length 1068 with TraceHistMax 131, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantifier-free) to 383 known predicates. - TimeoutResultAtElement [Line: 639]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 639). Cancelled while BasicCegarLoop was analyzing trace of length 1068 with TraceHistMax 131, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantifier-free) to 383 known predicates. - TimeoutResultAtElement [Line: 637]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 637). Cancelled while BasicCegarLoop was analyzing trace of length 1068 with TraceHistMax 131, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantifier-free) to 383 known predicates. - TimeoutResultAtElement [Line: 625]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 625). Cancelled while BasicCegarLoop was analyzing trace of length 1068 with TraceHistMax 131, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantifier-free) to 383 known predicates. - TimeoutResultAtElement [Line: 627]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 627). Cancelled while BasicCegarLoop was analyzing trace of length 1068 with TraceHistMax 131, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantifier-free) to 383 known predicates. - TimeoutResultAtElement [Line: 625]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 625). Cancelled while BasicCegarLoop was analyzing trace of length 1068 with TraceHistMax 131, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantifier-free) to 383 known predicates. - TimeoutResultAtElement [Line: 627]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 627). Cancelled while BasicCegarLoop was analyzing trace of length 1068 with TraceHistMax 131, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantifier-free) to 383 known predicates. - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 61 locations, 17 error locations. TIMEOUT Result, 746.3s OverallTime, 136 OverallIterations, 131 TraceHistogramMax, 276.0s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 4436 SDtfs, 121673 SDslu, 135777 SDs, 0 SdLazy, 95786 SolverSat, 30478 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 43.8s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 89704 GetRequests, 69371 SyntacticMatches, 61 SemanticMatches, 20272 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1509757 ImplicationChecksByTransitivity, 484.4s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=1078occurred in iteration=135, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.4s AutomataMinimizationTime, 135 MinimizatonAttempts, 555 StatesRemovedByMinimization, 131 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.9s SsaConstructionTime, 29.6s SatisfiabilityAnalysisTime, 395.9s InterpolantComputationTime, 141050 NumberOfCodeBlocks, 139646 NumberOfCodeBlocksAsserted, 4480 NumberOfCheckSat, 140679 ConstructedInterpolants, 110 QuantifiedInterpolants, 380973600 SizeOfPredicates, 263 NumberOfNonLiveVariables, 167138 ConjunctsInSsa, 10292 ConjunctsInUnsatCore, 262 InterpolantComputations, 7 PerfectInterpolantSequences, 2895356/5790868 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: Timeout Written .csv to /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/960521-1_true-valid-memsafety.i_svcomp-DerefFreeMemtrack-32bit-Automizer_SmtInterpol_NoArray.epf_AutomizerC.xml/Csv-Benchmark-0-2018-04-13_05-45-58-770.csv Written .csv to /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/960521-1_true-valid-memsafety.i_svcomp-DerefFreeMemtrack-32bit-Automizer_SmtInterpol_NoArray.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-0-2018-04-13_05-45-58-770.csv Completed graceful shutdown